From: Badal Nilawar <badal.nilawar@intel.com>
To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org,
linux-pci@vger.kernel.org
Cc: anshuman.gupta@intel.com, rafael@kernel.org, lenb@kernel.org,
bhelgaas@google.com, ilpo.jarvinen@linux.intel.com,
rodrigo.vivi@intel.com, varun.gupta@intel.com,
ville.syrjala@linux.intel.com, uma.shankar@intel.com,
karthik.poosa@intel.com, matthew.auld@intel.com,
sk.anirban@intel.com, raag.jadav@intel.com
Subject: [PATCH v6 04/12] drm/xe/vrsr: Detect VRSR Capability
Date: Tue, 13 Jan 2026 22:12:05 +0530 [thread overview]
Message-ID: <20260113164200.1151788-18-badal.nilawar@intel.com> (raw)
In-Reply-To: <20260113164200.1151788-14-badal.nilawar@intel.com>
From: Anshuman Gupta <anshuman.gupta@intel.com>
Detect VRAM Self Refresh(vrsr) Capability.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/xe/regs/xe_regs.h | 3 +++
drivers/gpu/drm/xe/xe_device_types.h | 4 ++++
drivers/gpu/drm/xe/xe_pm.c | 26 ++++++++++++++++++++++++++
3 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/xe/regs/xe_regs.h b/drivers/gpu/drm/xe/regs/xe_regs.h
index ad93c57edd17..153c0a3c98d2 100644
--- a/drivers/gpu/drm/xe/regs/xe_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_regs.h
@@ -57,6 +57,9 @@
#define MTL_MPE_FREQUENCY XE_REG(0x13802c)
#define MTL_RPE_MASK REG_GENMASK(8, 0)
+#define VRAM_SR_CAPABILITY XE_REG(0x138144)
+#define VRAM_SR_SUPPORTED REG_BIT(0)
+
#define VF_CAP_REG XE_REG(0x1901f8, XE_REG_OPTION_VF)
#define VF_CAP REG_BIT(0)
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index a7e9d981618c..17a577772794 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -576,6 +576,9 @@ struct xe_device {
/** @d3cold.allowed: Indicates if d3cold is a valid device state */
bool allowed;
+ /** @d3cold.vrsr_capable: Indicates if d3cold VRAM Self Refresh is supported */
+ bool vrsr_capable;
+
/**
* @d3cold.vram_threshold:
*
@@ -586,6 +589,7 @@ struct xe_device {
* Default threshold value is 300mb.
*/
u32 vram_threshold;
+
/** @d3cold.lock: protect vram_threshold */
struct mutex lock;
} d3cold;
diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index fa607be299a7..18a44b395559 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -13,15 +13,18 @@
#include <drm/ttm/ttm_placement.h>
#include "display/xe_display.h"
+#include "regs/xe_regs.h"
#include "xe_bo.h"
#include "xe_bo_evict.h"
#include "xe_device.h"
+#include "xe_force_wake.h"
#include "xe_ggtt.h"
#include "xe_gt.h"
#include "xe_gt_idle.h"
#include "xe_i2c.h"
#include "xe_irq.h"
#include "xe_late_bind_fw.h"
+#include "xe_mmio.h"
#include "xe_pcode.h"
#include "xe_pxp.h"
#include "xe_sriov_vf_ccs.h"
@@ -318,6 +321,28 @@ static bool xe_pm_pci_d3cold_capable(struct xe_device *xe)
return true;
}
+static bool xe_pm_vrsr_capable(struct xe_device *xe)
+{
+ struct xe_mmio *mmio = xe_root_tile_mmio(xe);
+ unsigned int fw_ref;
+ struct xe_gt *gt;
+ u32 val;
+
+ gt = xe_root_mmio_gt(xe);
+
+ if (!xe->info.probe_display)
+ return false;
+
+ fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+ if (!fw_ref)
+ return false;
+
+ val = xe_mmio_read32(mmio, VRAM_SR_CAPABILITY);
+ xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+
+ return val & VRAM_SR_SUPPORTED;
+}
+
static void xe_pm_runtime_init(struct xe_device *xe)
{
struct device *dev = xe->drm.dev;
@@ -462,6 +487,7 @@ int xe_pm_init(struct xe_device *xe)
err = xe_pm_set_vram_threshold(xe, vram_threshold);
if (err)
goto err_unregister;
+ xe->d3cold.vrsr_capable = xe_pm_vrsr_capable(xe);
}
xe_pm_runtime_init(xe);
--
2.52.0
next prev parent reply other threads:[~2026-01-13 16:32 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-13 16:42 [PATCH v6 00/12] VRAM Self Refresh Badal Nilawar
2026-01-13 16:40 ` ✓ CI.KUnit: success for VRAM Self Refresh (rev6) Patchwork
2026-01-13 16:42 ` [PATCH v6 01/12] PCI/ACPI: Add D3cold Aux Power Limit_DSM method Badal Nilawar
2026-01-14 20:24 ` Bjorn Helgaas
2026-01-20 14:03 ` Nilawar, Badal
2026-01-22 20:53 ` Bjorn Helgaas
2026-01-13 16:42 ` [PATCH v6 02/12] PCI/ACPI: Add PERST# Assertion Delay _DSM method Badal Nilawar
2026-01-13 17:04 ` Manivannan Sadhasivam
2026-01-14 13:47 ` Nilawar, Badal
2026-01-14 19:55 ` Bjorn Helgaas
2026-01-14 20:19 ` Bjorn Helgaas
2026-01-20 15:59 ` Nilawar, Badal
2026-01-22 23:27 ` Bjorn Helgaas
2026-01-13 16:42 ` [PATCH v6 03/12] drm/xe/vrsr: Introduce flag has_vrsr Badal Nilawar
2026-01-13 16:42 ` Badal Nilawar [this message]
2026-01-13 16:42 ` [PATCH v6 05/12] drm/xe/vrsr: Initialize VRSR feature Badal Nilawar
2026-01-13 16:42 ` [PATCH v6 06/12] drm/xe/vrsr: Enable VRSR on default VGA boot device Badal Nilawar
2026-01-15 14:25 ` Jani Nikula
2026-01-15 15:25 ` Rodrigo Vivi
2026-01-20 13:28 ` Nilawar, Badal
2026-01-20 13:43 ` Jani Nikula
2026-01-20 14:42 ` Shankar, Uma
2026-01-20 15:37 ` Nilawar, Badal
2026-01-20 15:07 ` Vivi, Rodrigo
2026-01-13 16:42 ` [PATCH v6 07/12] drm/xe/vrsr: Refactor d3cold.allowed to a enum Badal Nilawar
2026-01-13 16:42 ` [PATCH v6 08/12] drm/xe/pm: D3cold target state Badal Nilawar
2026-01-13 16:42 ` [PATCH v6 09/12] drm/xe/pm: Refactor PM Sleep Ops Badal Nilawar
2026-01-14 18:00 ` Bjorn Helgaas
2026-01-20 14:05 ` Nilawar, Badal
2026-01-13 16:42 ` [PATCH v6 10/12] drm/xe/vrsr: Enable VRSR Badal Nilawar
2026-01-14 18:02 ` Bjorn Helgaas
2026-01-13 16:42 ` [PATCH v6 11/12] drm/xe/pm/s2idle: Don't evict user BOs D3cold-VRSR state Badal Nilawar
2026-01-13 16:42 ` [PATCH v6 12/12] drm/xe/vrsr: Introduce a debugfs node named vrsr_capable Badal Nilawar
2026-01-13 16:55 ` ✗ CI.checksparse: warning for VRAM Self Refresh (rev6) Patchwork
2026-01-14 2:41 ` ✗ Xe.CI.Full: failure " Patchwork
2026-01-14 5:57 ` ✓ CI.KUnit: success for VRAM Self Refresh (rev7) Patchwork
2026-01-14 6:13 ` ✗ CI.checksparse: warning " Patchwork
2026-01-14 6:31 ` ✓ Xe.CI.BAT: success " Patchwork
2026-01-14 13:55 ` ✗ Xe.CI.Full: failure " Patchwork
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