From: Badal Nilawar <badal.nilawar@intel.com>
To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org,
linux-pci@vger.kernel.org
Cc: anshuman.gupta@intel.com, rafael@kernel.org, lenb@kernel.org,
bhelgaas@google.com, ilpo.jarvinen@linux.intel.com,
rodrigo.vivi@intel.com, varun.gupta@intel.com,
ville.syrjala@linux.intel.com, uma.shankar@intel.com,
karthik.poosa@intel.com, matthew.auld@intel.com,
sk.anirban@intel.com, raag.jadav@intel.com
Subject: [PATCH v6 10/12] drm/xe/vrsr: Enable VRSR
Date: Tue, 13 Jan 2026 22:12:11 +0530 [thread overview]
Message-ID: <20260113164200.1151788-24-badal.nilawar@intel.com> (raw)
In-Reply-To: <20260113164200.1151788-14-badal.nilawar@intel.com>
From: Anshuman Gupta <anshuman.gupta@intel.com>
Enable VRSR in runtime suspend and also in System wide suspend.
Also fix couple of typo in xe_pm.c.
V2: Disable VRSR in runtime/system resume path
V3: Handle BO eviction
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Acked-by: Karthik Poosa <karthik.poosa@intel.com>
---
drivers/gpu/drm/xe/xe_pci.c | 4 +--
drivers/gpu/drm/xe/xe_pm.c | 52 ++++++++++++++++++++++++++++---------
2 files changed, 42 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index f1ec6aa26faa..8fc650b2de02 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -1141,7 +1141,7 @@ static int xe_pci_suspend(struct device *dev)
/*
* Enabling D3Cold is needed for S2Idle/S0ix.
- * It is save to allow here since xe_pm_suspend has evicted
+ * It is safe to allow here since xe_pm_suspend has evicted
* the local memory and the direct complete optimization is disabled.
*/
d3cold_toggle(pdev, D3COLD_ENABLE);
@@ -1158,7 +1158,7 @@ static int xe_pci_resume(struct device *dev)
struct pci_dev *pdev = to_pci_dev(dev);
int err;
- /* Give back the D3Cold decision to the runtime P M*/
+ /* Give back the D3Cold decision to the runtime PM */
d3cold_toggle(pdev, D3COLD_DISABLE);
err = pci_set_power_state(pdev, PCI_D0);
diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index 2cbcb9de7586..1dd8e2c0f51e 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -205,10 +205,12 @@ int xe_pm_suspend(struct xe_device *xe, bool hibernation)
xe_display_pm_suspend(xe);
- /* FIXME: Super racey... */
- err = xe_bo_evict_all(xe);
- if (err)
- goto err_display;
+ if (hibernation || xe->d3cold.target_state != XE_D3COLD_VRSR) {
+ /* FIXME: Super racey... */
+ err = xe_bo_evict_all(xe);
+ if (err)
+ goto err;
+ }
for_each_gt(gt, xe, id) {
err = xe_gt_suspend(gt);
@@ -222,6 +224,12 @@ int xe_pm_suspend(struct xe_device *xe, bool hibernation)
xe_i2c_pm_suspend(xe);
+ if (!hibernation && xe->d3cold.target_state == XE_D3COLD_VRSR) {
+ err = xe_pm_vrsr_enable(xe);
+ if (err)
+ goto err_display;
+ }
+
drm_dbg(&xe->drm, "Device suspended\n");
xe_pm_block_end_signalling();
@@ -264,15 +272,20 @@ int xe_pm_resume(struct xe_device *xe, bool hibernation)
if (err)
return err;
+ if (!hibernation && xe->d3cold.target_state == XE_D3COLD_VRSR)
+ xe_pm_vrsr_disable(xe);
+
xe_display_pm_resume_early(xe);
/*
* This only restores pinned memory which is the memory required for the
* GT(s) to resume.
*/
- err = xe_bo_restore_early(xe);
- if (err)
- goto err;
+ if (hibernation || xe->d3cold.target_state != XE_D3COLD_VRSR) {
+ err = xe_bo_restore_early(xe);
+ if (err)
+ goto err;
+ }
xe_i2c_pm_resume(xe, true);
@@ -292,9 +305,11 @@ int xe_pm_resume(struct xe_device *xe, bool hibernation)
if (err)
goto err;
- err = xe_bo_restore_late(xe);
- if (err)
- goto err;
+ if (hibernation || xe->d3cold.target_state != XE_D3COLD_VRSR) {
+ err = xe_bo_restore_late(xe);
+ if (err)
+ goto err;
+ }
xe_pxp_pm_resume(xe->pxp);
@@ -740,7 +755,7 @@ int xe_pm_runtime_suspend(struct xe_device *xe)
xe_display_pm_runtime_suspend(xe);
- if (xe->d3cold.target_state) {
+ if (xe->d3cold.target_state == XE_D3COLD_OFF) {
err = xe_bo_evict_all(xe);
if (err)
goto out_resume;
@@ -758,6 +773,14 @@ int xe_pm_runtime_suspend(struct xe_device *xe)
xe_i2c_pm_suspend(xe);
+ if (xe->d3cold.target_state == XE_D3COLD_VRSR) {
+ err = xe_pm_vrsr_enable(xe);
+ if (err) {
+ drm_err(&xe->drm, "Failed to enable VRSR: %d\n", err);
+ goto out_resume;
+ }
+ }
+
xe_rpm_lockmap_release(xe);
xe_pm_write_callback_task(xe, NULL);
return 0;
@@ -789,6 +812,9 @@ int xe_pm_runtime_resume(struct xe_device *xe)
xe_rpm_lockmap_acquire(xe);
+ if (xe->d3cold.target_state == XE_D3COLD_VRSR)
+ xe_pm_vrsr_disable(xe);
+
if (xe->d3cold.target_state) {
for_each_gt(gt, xe, id)
xe_gt_idle_disable_c6(gt);
@@ -798,7 +824,9 @@ int xe_pm_runtime_resume(struct xe_device *xe)
goto out;
xe_display_pm_resume_early(xe);
+ }
+ if (xe->d3cold.target_state == XE_D3COLD_OFF) {
/*
* This only restores pinned memory which is the memory
* required for the GT(s) to resume.
@@ -826,7 +854,7 @@ int xe_pm_runtime_resume(struct xe_device *xe)
if (err)
goto out;
- if (xe->d3cold.target_state) {
+ if (xe->d3cold.target_state == XE_D3COLD_OFF) {
err = xe_bo_restore_late(xe);
if (err)
goto out;
--
2.52.0
next prev parent reply other threads:[~2026-01-13 16:32 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-13 16:42 [PATCH v6 00/12] VRAM Self Refresh Badal Nilawar
2026-01-13 16:40 ` ✓ CI.KUnit: success for VRAM Self Refresh (rev6) Patchwork
2026-01-13 16:42 ` [PATCH v6 01/12] PCI/ACPI: Add D3cold Aux Power Limit_DSM method Badal Nilawar
2026-01-14 20:24 ` Bjorn Helgaas
2026-01-20 14:03 ` Nilawar, Badal
2026-01-22 20:53 ` Bjorn Helgaas
2026-01-13 16:42 ` [PATCH v6 02/12] PCI/ACPI: Add PERST# Assertion Delay _DSM method Badal Nilawar
2026-01-13 17:04 ` Manivannan Sadhasivam
2026-01-14 13:47 ` Nilawar, Badal
2026-01-14 19:55 ` Bjorn Helgaas
2026-01-14 20:19 ` Bjorn Helgaas
2026-01-20 15:59 ` Nilawar, Badal
2026-01-22 23:27 ` Bjorn Helgaas
2026-01-13 16:42 ` [PATCH v6 03/12] drm/xe/vrsr: Introduce flag has_vrsr Badal Nilawar
2026-01-13 16:42 ` [PATCH v6 04/12] drm/xe/vrsr: Detect VRSR Capability Badal Nilawar
2026-01-13 16:42 ` [PATCH v6 05/12] drm/xe/vrsr: Initialize VRSR feature Badal Nilawar
2026-01-13 16:42 ` [PATCH v6 06/12] drm/xe/vrsr: Enable VRSR on default VGA boot device Badal Nilawar
2026-01-15 14:25 ` Jani Nikula
2026-01-15 15:25 ` Rodrigo Vivi
2026-01-20 13:28 ` Nilawar, Badal
2026-01-20 13:43 ` Jani Nikula
2026-01-20 14:42 ` Shankar, Uma
2026-01-20 15:37 ` Nilawar, Badal
2026-01-20 15:07 ` Vivi, Rodrigo
2026-01-13 16:42 ` [PATCH v6 07/12] drm/xe/vrsr: Refactor d3cold.allowed to a enum Badal Nilawar
2026-01-13 16:42 ` [PATCH v6 08/12] drm/xe/pm: D3cold target state Badal Nilawar
2026-01-13 16:42 ` [PATCH v6 09/12] drm/xe/pm: Refactor PM Sleep Ops Badal Nilawar
2026-01-14 18:00 ` Bjorn Helgaas
2026-01-20 14:05 ` Nilawar, Badal
2026-01-13 16:42 ` Badal Nilawar [this message]
2026-01-14 18:02 ` [PATCH v6 10/12] drm/xe/vrsr: Enable VRSR Bjorn Helgaas
2026-01-13 16:42 ` [PATCH v6 11/12] drm/xe/pm/s2idle: Don't evict user BOs D3cold-VRSR state Badal Nilawar
2026-01-13 16:42 ` [PATCH v6 12/12] drm/xe/vrsr: Introduce a debugfs node named vrsr_capable Badal Nilawar
2026-01-13 16:55 ` ✗ CI.checksparse: warning for VRAM Self Refresh (rev6) Patchwork
2026-01-14 2:41 ` ✗ Xe.CI.Full: failure " Patchwork
2026-01-14 5:57 ` ✓ CI.KUnit: success for VRAM Self Refresh (rev7) Patchwork
2026-01-14 6:13 ` ✗ CI.checksparse: warning " Patchwork
2026-01-14 6:31 ` ✓ Xe.CI.BAT: success " Patchwork
2026-01-14 13:55 ` ✗ Xe.CI.Full: failure " Patchwork
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