[PATCH v10 00/10] Use trans push mechanism to generate frame change event

[PATCH v10 00/10] Use trans push mechanism to generate frame change event

[Jouni Högander]

Currently we are using "automatic" frame change event generation. The
event is generated by any access to plane or pipe registers.

We have option to use "PSR PR Frame Change Enable" bit in TRANS_PUSH
register to enable frame change event generation only when doing trans
push. When this bit is set "automatic" frame change event generation
doesn't work anymore. Benfit from this is more controled updates send
by PSR HW.

This patch set is taking trans push mechanism into use.

v10:
  - added patch implementing helper for parsing value to be written
    into TRANS_PUSH
  - Adding HAS_PSR_FRAME_CHANGE macro moved to separate patch and
    renamed as HAS_PSR_TRANS_PUSH_FRAME_CHANGE
  - use intel_psr_use_trans_push instead of HAS_PSR_FRAME_CHANGE in
    intel_psr_trigger_frame_change
  - moved calling intel_vrr_psr_frame_change_enable away from this
    patch
  -
v9: always do PSR exit on frontbuffer flush for LunarLake and onwards
v8:
  - rebase
  - Wait for idle only after possible send
v7:
  - added bspec references
  - add HAS_PSR_FRAME_CHANGE macro
  - use TRANS_PUSH in instead of TRAN_VRR_CTL
  - "Do not trigger Frame Change events from frontbuffer flush" patch
    already merged
v6: use AND instead of OR in intel_psr_use_trans_push
v5: add missing patch
v4:
  - add intel_psr_use_trans_push to query if TRANS_PUSH is used
  - set DSB_SKIP_WAITS_EN chicken bit when TRANS_PUSH is used
  - Wait for vblank in case of PSR is using trans push
v3:
  - use rmw when enabling disabling transh push for PSR or VRR
  - rely on crtc_state->has_psr/has_vrr to keep trans push enabled
  - modify frontbuffer flush/invalidate to use disable/enable also for
    SU/SF on recent platforms.
  - send push before waiting for vblank
v2: implement intel_vrr_trans_push_enabled_set_clear and use that
    instead of rmw

Jouni Högander (10):
  drm/i915/psr: Add TRANS_PUSH register bit definition for PSR
  drm/i915/psr: Add intel_psr_use_trans_push to query if TRANS_PUSH is
    used
  drm/i915/vrr: Add helper for parsing value to be written into
    TRANS_PUSH
  drm/i915/vrr: Prepare to Use TRANS_PUSH mechanism for PSR frame change
  drm/i915/dsb: Set DSB_SKIP_WAITS_EN chicken bit for LunarLake and
    onwards
  drm/i915/display: Wait for vblank in case of PSR is using trans push
  drm/i915/psr: Wait for idle only after possible send push
  drm/i915/psr: Do PSR exit on frontbuffer flush on LunarLake and
    onwards
  drm/i915/display: Add HAS_PSR_TRANS_PUSH_FRAME_CHANGE macro
  drm/i915/psr: Use TRANS_PUSH to trigger frame change event

 drivers/gpu/drm/i915/display/intel_crtc.c     |  4 +-
 drivers/gpu/drm/i915/display/intel_display.c  | 33 ++++++++++++++--
 .../drm/i915/display/intel_display_device.h   |  1 +
 drivers/gpu/drm/i915/display/intel_dsb.c      | 15 +++++--
 drivers/gpu/drm/i915/display/intel_psr.c      | 36 +++++++++++------
 drivers/gpu/drm/i915/display/intel_psr.h      |  1 +
 drivers/gpu/drm/i915/display/intel_vrr.c      | 39 ++++++++++++++++---
 drivers/gpu/drm/i915/display/intel_vrr.h      |  1 +
 drivers/gpu/drm/i915/display/intel_vrr_regs.h |  1 +
 9 files changed, 106 insertions(+), 25 deletions(-)

-- 
2.43.0

[PATCH v10 01/10] drm/i915/psr: Add TRANS_PUSH register bit definition for PSR

[Jouni Högander]

Add TRANS_PUSH register bit LNL_TRANS_PUSH_PSR_PR_EN definition for PSR
usage.

v2: add bspec reference

Bspec: 69984
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr_regs.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr_regs.h b/drivers/gpu/drm/i915/display/intel_vrr_regs.h
index 427ada0d3973..9d4d6573a149 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr_regs.h
@@ -165,6 +165,7 @@
 #define TRANS_PUSH(display, trans)		_MMIO_TRANS2((display), (trans), _TRANS_PUSH_A)
 #define   TRANS_PUSH_EN				REG_BIT(31)
 #define   TRANS_PUSH_SEND			REG_BIT(30)
+#define   LNL_TRANS_PUSH_PSR_PR_EN		REG_BIT(16)
 
 #define _TRANS_VRR_VSYNC_A			0x60078
 #define TRANS_VRR_VSYNC(display, trans)		_MMIO_TRANS2((display), (trans), _TRANS_VRR_VSYNC_A)
-- 
2.43.0

[PATCH v10 02/10] drm/i915/psr: Add intel_psr_use_trans_push to query if TRANS_PUSH is used

[Jouni Högander]

This is a preparation to start using trans push as a PSR "Frame Change"
event. It adds intel_psr_use_trans_push placeholder which return false for
now until we have everything in place.

v2:
  - modify commit message
  - add TODO

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 6 ++++++
 drivers/gpu/drm/i915/display/intel_psr.h | 1 +
 2 files changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 62208ffc5101..b0d72c04db45 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -4562,3 +4562,9 @@ int intel_psr_min_guardband(struct intel_crtc_state *crtc_state)
 
 	return psr_min_guardband;
 }
+
+bool intel_psr_use_trans_push(const struct intel_crtc_state *crtc_state)
+{
+	/* TODO: Enable using trans push when everything is in place */
+	return false;
+}
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
index b41dc4d44ff2..394b641840b3 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -85,5 +85,6 @@ bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
 void intel_psr_compute_config_late(struct intel_dp *intel_dp,
 				   struct intel_crtc_state *crtc_state);
 int intel_psr_min_guardband(struct intel_crtc_state *crtc_state);
+bool intel_psr_use_trans_push(const struct intel_crtc_state *crtc_state);
 
 #endif /* __INTEL_PSR_H__ */
-- 
2.43.0

[PATCH v10 03/10] drm/i915/vrr: Add helper for parsing value to be written into TRANS_PUSH

[Jouni Högander]

On Lunarlake and onwards it is possible to generate PSR "frame change"
event using TRANS_PUSH mechanism. As a preparation add new helper to parse
value to be written into TRANS_PUSH register. Setting
LNL_TRANS_PUSH_PSR_PR_EN is done in upcoming patch.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 22 +++++++++++++++++++---
 1 file changed, 19 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index db74744ddb31..f26989c74268 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -676,6 +676,22 @@ intel_vrr_dcb_reset(const struct intel_crtc_state *old_crtc_state,
 	intel_de_write(display, PIPEDMC_DCB_BALANCE_RESET(pipe), 0);
 }
 
+static u32 trans_vrr_push(const struct intel_crtc_state *crtc_state,
+			  bool send_push)
+{
+	struct intel_display *display = to_intel_display(crtc_state);
+	u32 trans_vrr_push = 0;
+
+	if (intel_vrr_always_use_vrr_tg(display) ||
+	    crtc_state->vrr.enable)
+		trans_vrr_push |= TRANS_PUSH_EN;
+
+	if (send_push)
+		trans_vrr_push |= TRANS_PUSH_SEND;
+
+	return trans_vrr_push;
+}
+
 void intel_vrr_send_push(struct intel_dsb *dsb,
 			 const struct intel_crtc_state *crtc_state)
 {
@@ -690,8 +706,7 @@ void intel_vrr_send_push(struct intel_dsb *dsb,
 
 	intel_de_write_dsb(display, dsb,
 			   TRANS_PUSH(display, cpu_transcoder),
-			   TRANS_PUSH_EN | TRANS_PUSH_SEND);
-
+			   trans_vrr_push(crtc_state, true));
 	if (dsb)
 		intel_dsb_nonpost_end(dsb);
 }
@@ -876,7 +891,8 @@ static void intel_vrr_tg_enable(const struct intel_crtc_state *crtc_state,
 	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 	u32 vrr_ctl;
 
-	intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), TRANS_PUSH_EN);
+	intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
+		       trans_vrr_push(crtc_state, false));
 
 	vrr_ctl = VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state);
 
-- 
2.43.0

[PATCH v10 04/10] drm/i915/vrr: Prepare to Use TRANS_PUSH mechanism for PSR frame change

[Jouni Högander]

On Lunarlake and onwards it is possible to generate PSR "frame change"
event using TRANS_PUSH mechanism. Implement function to enable this and
take PSR into account in intel_vrr_send_push.

v7:
  - HAS_PSR_FRAME_CHANGE macro moved to separate patch and renamed as
    HAS_PSR_TRANS_PUSH_FRAME_CHANGE
  - use intel_psr_use_trans_push instead of HAS_PSR_FRAME_CHANGE in
    intel_psr_trigger_frame_change
  - moved calling intel_vrr_psr_frame_change_enable away from this patch
v6:
  - add HAS_PSR_FRAME_CHANGE macro
  - use TRANS_PUSH in instead of TRAN_VRR_CTL
v5: use intel_psr_use_trans_push for intel_vrr_psr_frame_change_enable
v4:
  - use rmw when enabling/disabling transcoder
  - set TRANS_PUSH_EN conditionally in intel_vrr_send_push
  - do not call intel_vrr_send_push from intel_psr_trigger_frame_change
  - do not enable using TRANS_PUSH mechanism for PSR "Frame Change"
v3:
  - use rmw when enabling/disabling
  - keep LNL_TRANS_PUSH_PSR_PR_EN set always on LunarLake and onwards
v2: use intel_vrr_trans_push_enabled_set_clear instead of rmw

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_crtc.c |  4 +++-
 drivers/gpu/drm/i915/display/intel_psr.c  |  8 +++++---
 drivers/gpu/drm/i915/display/intel_vrr.c  | 14 ++++++++++++--
 drivers/gpu/drm/i915/display/intel_vrr.h  |  1 +
 4 files changed, 21 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 778ebc5095c3..ed3c6c4ce025 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -747,7 +747,9 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
 	 * which would cause the next frame to terminate already at vmin
 	 * vblank start instead of vmax vblank start.
 	 */
-	if (!state->base.legacy_cursor_update)
+	if (!state->base.legacy_cursor_update ||
+	    (intel_psr_use_trans_push(new_crtc_state) &&
+	     !new_crtc_state->vrr.enable))
 		intel_vrr_send_push(NULL, new_crtc_state);
 
 	local_irq_enable();
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index b0d72c04db45..9613c50623dc 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2516,9 +2516,11 @@ void intel_psr_trigger_frame_change_event(struct intel_dsb *dsb,
 		intel_pre_commit_crtc_state(state, crtc);
 	struct intel_display *display = to_intel_display(crtc);
 
-	if (crtc_state->has_psr)
-		intel_de_write_dsb(display, dsb,
-				   CURSURFLIVE(display, crtc->pipe), 0);
+	if (!crtc_state->has_psr || intel_psr_use_trans_push(crtc_state))
+		return;
+
+	intel_de_write_dsb(display, dsb,
+			   CURSURFLIVE(display, crtc->pipe), 0);
 }
 
 /**
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index f26989c74268..8a072f90049f 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -698,7 +698,7 @@ void intel_vrr_send_push(struct intel_dsb *dsb,
 	struct intel_display *display = to_intel_display(crtc_state);
 	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 
-	if (!crtc_state->vrr.enable)
+	if (!crtc_state->vrr.enable && !intel_psr_use_trans_push(crtc_state))
 		return;
 
 	if (dsb)
@@ -920,7 +920,8 @@ static void intel_vrr_tg_disable(const struct intel_crtc_state *old_crtc_state)
 				       VRR_STATUS_VRR_EN_LIVE, 1000))
 		drm_err(display->drm, "Timed out waiting for VRR live status to clear\n");
 
-	intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0);
+	intel_de_rmw(display, TRANS_PUSH(display, cpu_transcoder),
+		     TRANS_PUSH_EN, 0);
 }
 
 void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
@@ -973,6 +974,15 @@ void intel_vrr_transcoder_disable(const struct intel_crtc_state *old_crtc_state)
 		intel_vrr_tg_disable(old_crtc_state);
 }
 
+void intel_vrr_psr_frame_change_enable(const struct intel_crtc_state *crtc_state)
+{
+	struct intel_display *display = to_intel_display(crtc_state);
+	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+
+	intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
+		       trans_vrr_push(crtc_state, false));
+}
+
 bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state)
 {
 	return crtc_state->vrr.flipline &&
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
index bedcc8c4bff2..4f16ca4af91f 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr.h
@@ -33,6 +33,7 @@ void intel_vrr_dcb_increment_flip_count(struct intel_crtc_state *crtc_state,
 					struct intel_crtc *crtc);
 bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state);
 void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state);
+void intel_vrr_psr_frame_change_enable(const struct intel_crtc_state *crtc_state);
 void intel_vrr_get_config(struct intel_crtc_state *crtc_state);
 int intel_vrr_vmax_vtotal(const struct intel_crtc_state *crtc_state);
 int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state);
-- 
2.43.0

[PATCH v10 05/10] drm/i915/dsb: Set DSB_SKIP_WAITS_EN chicken bit for LunarLake and onwards

[Jouni Högander]

On LunarLake we are using TRANS_PUSH mechanism to trigger "Frame Change"
event. This way we have more control on when PSR HW is woken up. I.e. not
every display register write is triggering sending update. This allows us
setting DSB_SKIP_WAITS_EN chicken bit as well.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dsb.c | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index 91060e2a5762..3f083211a7ca 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -17,6 +17,7 @@
 #include "intel_dsb.h"
 #include "intel_dsb_buffer.h"
 #include "intel_dsb_regs.h"
+#include "intel_psr.h"
 #include "intel_vblank.h"
 #include "intel_vrr.h"
 #include "skl_watermark.h"
@@ -166,18 +167,24 @@ static int dsb_scanline_to_hw(struct intel_atomic_state *state,
  * definitely do not want to skip vblank wait. We also have concern what comes
  * to skipping vblank evasion. I.e. arming registers are latched before we have
  * managed writing them. Due to these reasons we are not setting
- * DSB_SKIP_WAITS_EN.
+ * DSB_SKIP_WAITS_EN except when using TRANS_PUSH mechanism to trigger
+ * "frame change" event.
  */
 static u32 dsb_chicken(struct intel_atomic_state *state,
 		       struct intel_crtc *crtc)
 {
+	const struct intel_crtc_state *new_crtc_state =
+		intel_atomic_get_new_crtc_state(state, crtc);
+	u32 chicken = intel_psr_use_trans_push(new_crtc_state) ?
+		DSB_SKIP_WAITS_EN : 0;
+
 	if (pre_commit_is_vrr_active(state, crtc))
-		return DSB_CTRL_WAIT_SAFE_WINDOW |
+		chicken |= DSB_CTRL_WAIT_SAFE_WINDOW |
 			DSB_CTRL_NO_WAIT_VBLANK |
 			DSB_INST_WAIT_SAFE_WINDOW |
 			DSB_INST_NO_WAIT_VBLANK;
-	else
-		return 0;
+
+	return chicken;
 }
 
 static bool assert_dsb_has_room(struct intel_dsb *dsb)
-- 
2.43.0

[PATCH v10 06/10] drm/i915/display: Wait for vblank in case of PSR is using trans push

[Jouni Högander]

In case PSR uses trans push as a "frame change" event and we need to wait
vblank after triggering PSR "frame change" event. Otherwise we may miss
selective updates.

DSB skips all waits while PSR is active. Check push send is skipped as well
because trans push send bit is not clearn by the HW if VRR is not enabled
-> we may start configuring new selective update while previous is not
complete. Avoid this by waiting for vblank after sending trans push.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 7491e00e3858..b47c9d3d0d85 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7390,9 +7390,27 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
 				new_crtc_state->dsb_color);
 
 	if (new_crtc_state->use_dsb && !intel_color_uses_chained_dsb(new_crtc_state)) {
-		intel_dsb_wait_vblanks(new_crtc_state->dsb_commit, 1);
+		/*
+		 * Dsb wait vblank may or may not skip. Let's remove it for PSR
+		 * trans push case to ensure we are not waiting two vblanks
+		 */
+		if (!intel_psr_use_trans_push(new_crtc_state))
+			intel_dsb_wait_vblanks(new_crtc_state->dsb_commit, 1);
 
 		intel_vrr_send_push(new_crtc_state->dsb_commit, new_crtc_state);
+
+		/*
+		 * In case PSR uses trans push as a "frame change" event and
+		 * VRR is not in use we need to wait vblank. Othervise we may
+		 * miss selective updates. DSB skips all waits while PSR is
+		 * active. Check push send is skipped as well because trans push
+		 * send bit is not clearn by the HW if VRR is not enabled -> we
+		 * may start configuring new selective update while previous is
+		 * not complete.
+		 */
+		if (intel_psr_use_trans_push(new_crtc_state))
+			intel_dsb_wait_vblanks(new_crtc_state->dsb_commit, 1);
+
 		intel_dsb_wait_for_delayed_vblank(state, new_crtc_state->dsb_commit);
 		intel_vrr_check_push_sent(new_crtc_state->dsb_commit,
 					  new_crtc_state);
-- 
2.43.0

[PATCH v10 07/10] drm/i915/psr: Wait for idle only after possible send push

[Jouni Högander]

We are planning to move using trans push mechanism to trigger the Frame
Change event. In that case we can't wait PSR to idle before send push
happens. Due to this move wait for idle to be done after possible send push
is done.

This should be ok for Frame Change event triggered by register write as
well. Wait for idle is needed only for corner case where PSR is
transitioning into DEEP_SLEEP when Frame Change event is triggered. It just
has to be before wait for vblank. Otherwise we may have vblank before PSR
enters DEEP_SLEEP and still using old frame buffers for first frame after
wake up.

v2: some typos fixed

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index b47c9d3d0d85..d7267c926c40 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7357,9 +7357,6 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
 		intel_psr_trigger_frame_change_event(new_crtc_state->dsb_commit,
 						     state, crtc);
 
-		intel_psr_wait_for_idle_dsb(new_crtc_state->dsb_commit,
-					    new_crtc_state);
-
 		if (new_crtc_state->use_dsb)
 			intel_dsb_vblank_evade(state, new_crtc_state->dsb_commit);
 
@@ -7399,6 +7396,16 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
 
 		intel_vrr_send_push(new_crtc_state->dsb_commit, new_crtc_state);
 
+		/*
+		 * Wait for idle is needed for corner case where PSR HW
+		 * is transitioning into DEEP_SLEEP/SRDENT_OFF when
+		 * new Frame Change event comes in. It is ok to do it
+		 * here for both Frame Change mechanism (trans push
+		 * and register write).
+		 */
+		intel_psr_wait_for_idle_dsb(new_crtc_state->dsb_commit,
+					    new_crtc_state);
+
 		/*
 		 * In case PSR uses trans push as a "frame change" event and
 		 * VRR is not in use we need to wait vblank. Othervise we may
-- 
2.43.0

[PATCH v10 08/10] drm/i915/psr: Do PSR exit on frontbuffer flush on LunarLake and onwards

[Jouni Högander]

We need to use intel_psr_exit in frontbuffer flush on LunarLake and
onwards if we want to move using trans push mechanism to trigger Frame
Change event.

Keep PSR1 and PSR2 HW tracking as it is for older platforms as this was
seen causing problems there.

v2: typo fixed

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 18 ++++++++++--------
 1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 9613c50623dc..9a4354c6bdda 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -3559,7 +3559,14 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
 
-	if (DISPLAY_VER(display) < 20 && intel_dp->psr.psr2_sel_fetch_enabled) {
+	if (DISPLAY_VER(display) >= 20) {
+		/*
+		 * We can use PSR exit on LunarLake onwards. Also
+		 * using trans push mechanism to trigger Frame Change
+		 * event requires using PSR exit.
+		 */
+		intel_psr_exit(intel_dp);
+	} else if (intel_dp->psr.psr2_sel_fetch_enabled) {
 		/* Selective fetch prior LNL */
 		if (intel_dp->psr.psr2_sel_fetch_cff_enabled) {
 			/* can we turn CFF off? */
@@ -3579,16 +3586,11 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
 		intel_psr_configure_full_frame_update(intel_dp);
 
 		intel_psr_force_update(intel_dp);
-	} else if (!intel_dp->psr.psr2_sel_fetch_enabled) {
+	} else {
 		/*
-		 * PSR1 on all platforms
-		 * PSR2 HW tracking
-		 * Panel Replay Full frame update
+		 * On older platforms using PSR exit was seen causing problems
 		 */
 		intel_psr_force_update(intel_dp);
-	} else {
-		/* Selective update LNL onwards */
-		intel_psr_exit(intel_dp);
 	}
 
 	if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits)
-- 
2.43.0

[PATCH v10 09/10] drm/i915/display: Add HAS_PSR_TRANS_PUSH_FRAME_CHANGE macro

[Jouni Högander]

Add macro telling platform supports triggering Frame Change event using
Trans Push mechanism.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 6c74d6b0cc48..13558bc648ab 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -196,6 +196,7 @@ struct intel_display_platforms {
 #define HAS_PSR(__display)		(DISPLAY_INFO(__display)->has_psr)
 #define HAS_PSR_HW_TRACKING(__display)	(DISPLAY_INFO(__display)->has_psr_hw_tracking)
 #define HAS_PSR2_SEL_FETCH(__display)	(DISPLAY_VER(__display) >= 12)
+#define HAS_PSR_TRANS_PUSH_FRAME_CHANGE(__display)	(DISPLAY_VER(__display) >= 20)
 #define HAS_SAGV(__display)		(DISPLAY_VER(__display) >= 9 && \
 					 !(__display)->platform.broxton && !(__display)->platform.geminilake)
 #define HAS_TRANSCODER(__display, trans)	((DISPLAY_RUNTIME_INFO(__display)->cpu_transcoder_mask & \
-- 
2.43.0

[PATCH v10 10/10] drm/i915/psr: Use TRANS_PUSH to trigger frame change event

[Jouni Högander]

Now we have everything in place for triggering PSR "frame change" event
using TRANS_PUSH: use TRANS_PUSH for LunarLake and onwards.

v4:
  - Added call to intel_vrr_psr_frame_change_enable call
  - added setting LNL_TRANS_PUSH_PSR_PR_EN into intel_vrr_send_push
v3: use HAS_PSR_FRAME_CHANGE macro
v2: use AND instead of OR in intel_psr_use_trans_push

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 8 ++++++--
 drivers/gpu/drm/i915/display/intel_vrr.c | 3 +++
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 9a4354c6bdda..4e644711c571 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2125,6 +2125,9 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
 		intel_dmc_block_pkgc(display, intel_dp->psr.pipe, true);
 
 	intel_alpm_configure(intel_dp, crtc_state);
+
+	if (HAS_PSR_TRANS_PUSH_FRAME_CHANGE(display))
+		intel_vrr_psr_frame_change_enable(crtc_state);
 }
 
 static bool psr_interrupt_error_check(struct intel_dp *intel_dp)
@@ -4569,6 +4572,7 @@ int intel_psr_min_guardband(struct intel_crtc_state *crtc_state)
 
 bool intel_psr_use_trans_push(const struct intel_crtc_state *crtc_state)
 {
-	/* TODO: Enable using trans push when everything is in place */
-	return false;
+	struct intel_display *display = to_intel_display(crtc_state);
+
+	return HAS_PSR_TRANS_PUSH_FRAME_CHANGE(display) && crtc_state->has_psr;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 8a072f90049f..9d814cc2d608 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -689,6 +689,9 @@ static u32 trans_vrr_push(const struct intel_crtc_state *crtc_state,
 	if (send_push)
 		trans_vrr_push |= TRANS_PUSH_SEND;
 
+	if (HAS_PSR_TRANS_PUSH_FRAME_CHANGE(display))
+		trans_vrr_push |= LNL_TRANS_PUSH_PSR_PR_EN;
+
 	return trans_vrr_push;
 }
 
-- 
2.43.0

✓ CI.KUnit: success for Use trans push mechanism to generate frame change event (rev10)

[Patchwork]

== Series Details ==

Series: Use trans push mechanism to generate frame change event (rev10)
URL   : https://patchwork.freedesktop.org/series/139831/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[08:08:06] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:08:10] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:08:42] Starting KUnit Kernel (1/1)...
[08:08:42] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:08:42] ================== guc_buf (11 subtests) ===================
[08:08:42] [PASSED] test_smallest
[08:08:42] [PASSED] test_largest
[08:08:42] [PASSED] test_granular
[08:08:42] [PASSED] test_unique
[08:08:42] [PASSED] test_overlap
[08:08:42] [PASSED] test_reusable
[08:08:42] [PASSED] test_too_big
[08:08:42] [PASSED] test_flush
[08:08:42] [PASSED] test_lookup
[08:08:42] [PASSED] test_data
[08:08:42] [PASSED] test_class
[08:08:42] ===================== [PASSED] guc_buf =====================
[08:08:42] =================== guc_dbm (7 subtests) ===================
[08:08:42] [PASSED] test_empty
[08:08:42] [PASSED] test_default
[08:08:42] ======================== test_size  ========================
[08:08:42] [PASSED] 4
[08:08:42] [PASSED] 8
[08:08:42] [PASSED] 32
[08:08:42] [PASSED] 256
[08:08:42] ==================== [PASSED] test_size ====================
[08:08:42] ======================= test_reuse  ========================
[08:08:42] [PASSED] 4
[08:08:42] [PASSED] 8
[08:08:42] [PASSED] 32
[08:08:42] [PASSED] 256
[08:08:42] =================== [PASSED] test_reuse ====================
[08:08:42] =================== test_range_overlap  ====================
[08:08:42] [PASSED] 4
[08:08:42] [PASSED] 8
[08:08:42] [PASSED] 32
[08:08:42] [PASSED] 256
[08:08:42] =============== [PASSED] test_range_overlap ================
[08:08:42] =================== test_range_compact  ====================
[08:08:42] [PASSED] 4
[08:08:42] [PASSED] 8
[08:08:42] [PASSED] 32
[08:08:42] [PASSED] 256
[08:08:42] =============== [PASSED] test_range_compact ================
[08:08:42] ==================== test_range_spare  =====================
[08:08:42] [PASSED] 4
[08:08:42] [PASSED] 8
[08:08:42] [PASSED] 32
[08:08:42] [PASSED] 256
[08:08:42] ================ [PASSED] test_range_spare =================
[08:08:42] ===================== [PASSED] guc_dbm =====================
[08:08:42] =================== guc_idm (6 subtests) ===================
[08:08:42] [PASSED] bad_init
[08:08:42] [PASSED] no_init
[08:08:42] [PASSED] init_fini
[08:08:42] [PASSED] check_used
[08:08:42] [PASSED] check_quota
[08:08:42] [PASSED] check_all
[08:08:42] ===================== [PASSED] guc_idm =====================
[08:08:42] ================== no_relay (3 subtests) ===================
[08:08:42] [PASSED] xe_drops_guc2pf_if_not_ready
[08:08:42] [PASSED] xe_drops_guc2vf_if_not_ready
[08:08:42] [PASSED] xe_rejects_send_if_not_ready
[08:08:42] ==================== [PASSED] no_relay =====================
[08:08:42] ================== pf_relay (14 subtests) ==================
[08:08:42] [PASSED] pf_rejects_guc2pf_too_short
[08:08:42] [PASSED] pf_rejects_guc2pf_too_long
[08:08:42] [PASSED] pf_rejects_guc2pf_no_payload
[08:08:42] [PASSED] pf_fails_no_payload
[08:08:42] [PASSED] pf_fails_bad_origin
[08:08:42] [PASSED] pf_fails_bad_type
[08:08:42] [PASSED] pf_txn_reports_error
[08:08:42] [PASSED] pf_txn_sends_pf2guc
[08:08:42] [PASSED] pf_sends_pf2guc
[08:08:42] [SKIPPED] pf_loopback_nop
[08:08:42] [SKIPPED] pf_loopback_echo
[08:08:42] [SKIPPED] pf_loopback_fail
[08:08:42] [SKIPPED] pf_loopback_busy
[08:08:42] [SKIPPED] pf_loopback_retry
[08:08:42] ==================== [PASSED] pf_relay =====================
[08:08:42] ================== vf_relay (3 subtests) ===================
[08:08:42] [PASSED] vf_rejects_guc2vf_too_short
[08:08:42] [PASSED] vf_rejects_guc2vf_too_long
[08:08:42] [PASSED] vf_rejects_guc2vf_no_payload
[08:08:42] ==================== [PASSED] vf_relay =====================
[08:08:42] ================ pf_gt_config (6 subtests) =================
[08:08:42] [PASSED] fair_contexts_1vf
[08:08:42] [PASSED] fair_doorbells_1vf
[08:08:42] [PASSED] fair_ggtt_1vf
[08:08:42] ====================== fair_contexts  ======================
[08:08:42] [PASSED] 1 VF
[08:08:42] [PASSED] 2 VFs
[08:08:42] [PASSED] 3 VFs
[08:08:42] [PASSED] 4 VFs
[08:08:42] [PASSED] 5 VFs
[08:08:42] [PASSED] 6 VFs
[08:08:42] [PASSED] 7 VFs
[08:08:42] [PASSED] 8 VFs
[08:08:42] [PASSED] 9 VFs
[08:08:42] [PASSED] 10 VFs
[08:08:42] [PASSED] 11 VFs
[08:08:42] [PASSED] 12 VFs
[08:08:42] [PASSED] 13 VFs
[08:08:42] [PASSED] 14 VFs
[08:08:42] [PASSED] 15 VFs
[08:08:42] [PASSED] 16 VFs
[08:08:42] [PASSED] 17 VFs
[08:08:42] [PASSED] 18 VFs
[08:08:42] [PASSED] 19 VFs
[08:08:42] [PASSED] 20 VFs
[08:08:42] [PASSED] 21 VFs
[08:08:42] [PASSED] 22 VFs
[08:08:42] [PASSED] 23 VFs
[08:08:42] [PASSED] 24 VFs
[08:08:42] [PASSED] 25 VFs
[08:08:42] [PASSED] 26 VFs
[08:08:42] [PASSED] 27 VFs
[08:08:42] [PASSED] 28 VFs
[08:08:42] [PASSED] 29 VFs
[08:08:42] [PASSED] 30 VFs
[08:08:42] [PASSED] 31 VFs
[08:08:42] [PASSED] 32 VFs
[08:08:42] [PASSED] 33 VFs
[08:08:42] [PASSED] 34 VFs
[08:08:42] [PASSED] 35 VFs
[08:08:42] [PASSED] 36 VFs
[08:08:42] [PASSED] 37 VFs
[08:08:42] [PASSED] 38 VFs
[08:08:42] [PASSED] 39 VFs
[08:08:42] [PASSED] 40 VFs
[08:08:42] [PASSED] 41 VFs
[08:08:42] [PASSED] 42 VFs
[08:08:42] [PASSED] 43 VFs
[08:08:42] [PASSED] 44 VFs
[08:08:42] [PASSED] 45 VFs
[08:08:42] [PASSED] 46 VFs
[08:08:42] [PASSED] 47 VFs
[08:08:42] [PASSED] 48 VFs
[08:08:42] [PASSED] 49 VFs
[08:08:42] [PASSED] 50 VFs
[08:08:42] [PASSED] 51 VFs
[08:08:42] [PASSED] 52 VFs
[08:08:42] [PASSED] 53 VFs
[08:08:42] [PASSED] 54 VFs
[08:08:42] [PASSED] 55 VFs
[08:08:42] [PASSED] 56 VFs
[08:08:42] [PASSED] 57 VFs
[08:08:42] [PASSED] 58 VFs
[08:08:42] [PASSED] 59 VFs
[08:08:42] [PASSED] 60 VFs
[08:08:42] [PASSED] 61 VFs
[08:08:42] [PASSED] 62 VFs
[08:08:42] [PASSED] 63 VFs
[08:08:42] ================== [PASSED] fair_contexts ==================
[08:08:42] ===================== fair_doorbells  ======================
[08:08:42] [PASSED] 1 VF
[08:08:42] [PASSED] 2 VFs
[08:08:42] [PASSED] 3 VFs
[08:08:42] [PASSED] 4 VFs
[08:08:42] [PASSED] 5 VFs
[08:08:42] [PASSED] 6 VFs
[08:08:42] [PASSED] 7 VFs
[08:08:42] [PASSED] 8 VFs
[08:08:42] [PASSED] 9 VFs
[08:08:42] [PASSED] 10 VFs
[08:08:42] [PASSED] 11 VFs
[08:08:42] [PASSED] 12 VFs
[08:08:42] [PASSED] 13 VFs
[08:08:42] [PASSED] 14 VFs
[08:08:42] [PASSED] 15 VFs
[08:08:42] [PASSED] 16 VFs
[08:08:42] [PASSED] 17 VFs
[08:08:42] [PASSED] 18 VFs
[08:08:42] [PASSED] 19 VFs
[08:08:42] [PASSED] 20 VFs
[08:08:42] [PASSED] 21 VFs
[08:08:42] [PASSED] 22 VFs
[08:08:42] [PASSED] 23 VFs
[08:08:42] [PASSED] 24 VFs
[08:08:42] [PASSED] 25 VFs
[08:08:42] [PASSED] 26 VFs
[08:08:42] [PASSED] 27 VFs
[08:08:42] [PASSED] 28 VFs
[08:08:42] [PASSED] 29 VFs
[08:08:42] [PASSED] 30 VFs
[08:08:42] [PASSED] 31 VFs
[08:08:42] [PASSED] 32 VFs
[08:08:42] [PASSED] 33 VFs
[08:08:42] [PASSED] 34 VFs
[08:08:42] [PASSED] 35 VFs
[08:08:42] [PASSED] 36 VFs
[08:08:42] [PASSED] 37 VFs
[08:08:42] [PASSED] 38 VFs
[08:08:42] [PASSED] 39 VFs
[08:08:42] [PASSED] 40 VFs
[08:08:42] [PASSED] 41 VFs
[08:08:42] [PASSED] 42 VFs
[08:08:42] [PASSED] 43 VFs
[08:08:42] [PASSED] 44 VFs
[08:08:42] [PASSED] 45 VFs
[08:08:42] [PASSED] 46 VFs
[08:08:42] [PASSED] 47 VFs
[08:08:42] [PASSED] 48 VFs
[08:08:42] [PASSED] 49 VFs
[08:08:42] [PASSED] 50 VFs
[08:08:42] [PASSED] 51 VFs
[08:08:42] [PASSED] 52 VFs
[08:08:42] [PASSED] 53 VFs
[08:08:42] [PASSED] 54 VFs
[08:08:42] [PASSED] 55 VFs
[08:08:42] [PASSED] 56 VFs
[08:08:42] [PASSED] 57 VFs
[08:08:42] [PASSED] 58 VFs
[08:08:42] [PASSED] 59 VFs
[08:08:42] [PASSED] 60 VFs
[08:08:42] [PASSED] 61 VFs
[08:08:42] [PASSED] 62 VFs
[08:08:42] [PASSED] 63 VFs
[08:08:42] ================= [PASSED] fair_doorbells ==================
[08:08:42] ======================== fair_ggtt  ========================
[08:08:42] [PASSED] 1 VF
[08:08:42] [PASSED] 2 VFs
[08:08:42] [PASSED] 3 VFs
[08:08:42] [PASSED] 4 VFs
[08:08:42] [PASSED] 5 VFs
[08:08:42] [PASSED] 6 VFs
[08:08:42] [PASSED] 7 VFs
[08:08:42] [PASSED] 8 VFs
[08:08:42] [PASSED] 9 VFs
[08:08:42] [PASSED] 10 VFs
[08:08:42] [PASSED] 11 VFs
[08:08:42] [PASSED] 12 VFs
[08:08:42] [PASSED] 13 VFs
[08:08:42] [PASSED] 14 VFs
[08:08:42] [PASSED] 15 VFs
[08:08:42] [PASSED] 16 VFs
[08:08:42] [PASSED] 17 VFs
[08:08:42] [PASSED] 18 VFs
[08:08:42] [PASSED] 19 VFs
[08:08:42] [PASSED] 20 VFs
[08:08:42] [PASSED] 21 VFs
[08:08:42] [PASSED] 22 VFs
[08:08:42] [PASSED] 23 VFs
[08:08:42] [PASSED] 24 VFs
[08:08:42] [PASSED] 25 VFs
[08:08:42] [PASSED] 26 VFs
[08:08:42] [PASSED] 27 VFs
[08:08:42] [PASSED] 28 VFs
[08:08:42] [PASSED] 29 VFs
[08:08:42] [PASSED] 30 VFs
[08:08:42] [PASSED] 31 VFs
[08:08:42] [PASSED] 32 VFs
[08:08:42] [PASSED] 33 VFs
[08:08:42] [PASSED] 34 VFs
[08:08:42] [PASSED] 35 VFs
[08:08:42] [PASSED] 36 VFs
[08:08:42] [PASSED] 37 VFs
[08:08:42] [PASSED] 38 VFs
[08:08:42] [PASSED] 39 VFs
[08:08:42] [PASSED] 40 VFs
[08:08:42] [PASSED] 41 VFs
[08:08:42] [PASSED] 42 VFs
[08:08:42] [PASSED] 43 VFs
[08:08:42] [PASSED] 44 VFs
[08:08:42] [PASSED] 45 VFs
[08:08:42] [PASSED] 46 VFs
[08:08:42] [PASSED] 47 VFs
[08:08:42] [PASSED] 48 VFs
[08:08:42] [PASSED] 49 VFs
[08:08:42] [PASSED] 50 VFs
[08:08:42] [PASSED] 51 VFs
[08:08:42] [PASSED] 52 VFs
[08:08:42] [PASSED] 53 VFs
[08:08:42] [PASSED] 54 VFs
[08:08:42] [PASSED] 55 VFs
[08:08:42] [PASSED] 56 VFs
[08:08:42] [PASSED] 57 VFs
[08:08:42] [PASSED] 58 VFs
[08:08:42] [PASSED] 59 VFs
[08:08:42] [PASSED] 60 VFs
[08:08:42] [PASSED] 61 VFs
[08:08:42] [PASSED] 62 VFs
[08:08:42] [PASSED] 63 VFs
[08:08:42] ==================== [PASSED] fair_ggtt ====================
[08:08:42] ================== [PASSED] pf_gt_config ===================
[08:08:42] ===================== lmtt (1 subtest) =====================
[08:08:42] ======================== test_ops  =========================
[08:08:42] [PASSED] 2-level
[08:08:42] [PASSED] multi-level
[08:08:42] ==================== [PASSED] test_ops =====================
[08:08:42] ====================== [PASSED] lmtt =======================
[08:08:42] ================= pf_service (11 subtests) =================
[08:08:42] [PASSED] pf_negotiate_any
[08:08:42] [PASSED] pf_negotiate_base_match
[08:08:42] [PASSED] pf_negotiate_base_newer
[08:08:42] [PASSED] pf_negotiate_base_next
[08:08:42] [SKIPPED] pf_negotiate_base_older
[08:08:42] [PASSED] pf_negotiate_base_prev
[08:08:42] [PASSED] pf_negotiate_latest_match
[08:08:42] [PASSED] pf_negotiate_latest_newer
[08:08:42] [PASSED] pf_negotiate_latest_next
[08:08:42] [SKIPPED] pf_negotiate_latest_older
[08:08:42] [SKIPPED] pf_negotiate_latest_prev
[08:08:42] =================== [PASSED] pf_service ====================
[08:08:42] ================= xe_guc_g2g (2 subtests) ==================
[08:08:42] ============== xe_live_guc_g2g_kunit_default  ==============
[08:08:42] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[08:08:42] ============== xe_live_guc_g2g_kunit_allmem  ===============
[08:08:42] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[08:08:42] =================== [SKIPPED] xe_guc_g2g ===================
[08:08:42] =================== xe_mocs (2 subtests) ===================
[08:08:42] ================ xe_live_mocs_kernel_kunit  ================
[08:08:42] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[08:08:42] ================ xe_live_mocs_reset_kunit  =================
[08:08:42] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[08:08:42] ==================== [SKIPPED] xe_mocs =====================
[08:08:42] ================= xe_migrate (2 subtests) ==================
[08:08:42] ================= xe_migrate_sanity_kunit  =================
[08:08:42] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[08:08:42] ================== xe_validate_ccs_kunit  ==================
[08:08:42] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[08:08:42] =================== [SKIPPED] xe_migrate ===================
[08:08:42] ================== xe_dma_buf (1 subtest) ==================
[08:08:42] ==================== xe_dma_buf_kunit  =====================
[08:08:42] ================ [SKIPPED] xe_dma_buf_kunit ================
[08:08:42] =================== [SKIPPED] xe_dma_buf ===================
[08:08:42] ================= xe_bo_shrink (1 subtest) =================
[08:08:42] =================== xe_bo_shrink_kunit  ====================
[08:08:42] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[08:08:42] ================== [SKIPPED] xe_bo_shrink ==================
[08:08:42] ==================== xe_bo (2 subtests) ====================
[08:08:42] ================== xe_ccs_migrate_kunit  ===================
[08:08:42] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[08:08:42] ==================== xe_bo_evict_kunit  ====================
[08:08:42] =============== [SKIPPED] xe_bo_evict_kunit ================
[08:08:42] ===================== [SKIPPED] xe_bo ======================
[08:08:42] ==================== args (13 subtests) ====================
[08:08:42] [PASSED] count_args_test
[08:08:42] [PASSED] call_args_example
[08:08:42] [PASSED] call_args_test
[08:08:42] [PASSED] drop_first_arg_example
[08:08:42] [PASSED] drop_first_arg_test
[08:08:42] [PASSED] first_arg_example
[08:08:42] [PASSED] first_arg_test
[08:08:42] [PASSED] last_arg_example
[08:08:42] [PASSED] last_arg_test
[08:08:42] [PASSED] pick_arg_example
[08:08:42] [PASSED] if_args_example
[08:08:42] [PASSED] if_args_test
[08:08:42] [PASSED] sep_comma_example
[08:08:42] ====================== [PASSED] args =======================
[08:08:42] =================== xe_pci (3 subtests) ====================
[08:08:42] ==================== check_graphics_ip  ====================
[08:08:42] [PASSED] 12.00 Xe_LP
[08:08:42] [PASSED] 12.10 Xe_LP+
[08:08:42] [PASSED] 12.55 Xe_HPG
[08:08:42] [PASSED] 12.60 Xe_HPC
[08:08:42] [PASSED] 12.70 Xe_LPG
[08:08:42] [PASSED] 12.71 Xe_LPG
[08:08:42] [PASSED] 12.74 Xe_LPG+
[08:08:42] [PASSED] 20.01 Xe2_HPG
[08:08:42] [PASSED] 20.02 Xe2_HPG
[08:08:42] [PASSED] 20.04 Xe2_LPG
[08:08:42] [PASSED] 30.00 Xe3_LPG
[08:08:42] [PASSED] 30.01 Xe3_LPG
[08:08:42] [PASSED] 30.03 Xe3_LPG
[08:08:42] [PASSED] 30.04 Xe3_LPG
[08:08:42] [PASSED] 30.05 Xe3_LPG
[08:08:42] [PASSED] 35.11 Xe3p_XPC
[08:08:42] ================ [PASSED] check_graphics_ip ================
[08:08:42] ===================== check_media_ip  ======================
[08:08:42] [PASSED] 12.00 Xe_M
[08:08:42] [PASSED] 12.55 Xe_HPM
[08:08:42] [PASSED] 13.00 Xe_LPM+
[08:08:42] [PASSED] 13.01 Xe2_HPM
[08:08:42] [PASSED] 20.00 Xe2_LPM
[08:08:42] [PASSED] 30.00 Xe3_LPM
[08:08:42] [PASSED] 30.02 Xe3_LPM
[08:08:42] [PASSED] 35.00 Xe3p_LPM
[08:08:42] [PASSED] 35.03 Xe3p_HPM
[08:08:42] ================= [PASSED] check_media_ip ==================
[08:08:42] =================== check_platform_desc  ===================
[08:08:42] [PASSED] 0x9A60 (TIGERLAKE)
[08:08:42] [PASSED] 0x9A68 (TIGERLAKE)
[08:08:42] [PASSED] 0x9A70 (TIGERLAKE)
[08:08:42] [PASSED] 0x9A40 (TIGERLAKE)
[08:08:42] [PASSED] 0x9A49 (TIGERLAKE)
[08:08:42] [PASSED] 0x9A59 (TIGERLAKE)
[08:08:42] [PASSED] 0x9A78 (TIGERLAKE)
[08:08:42] [PASSED] 0x9AC0 (TIGERLAKE)
[08:08:42] [PASSED] 0x9AC9 (TIGERLAKE)
[08:08:42] [PASSED] 0x9AD9 (TIGERLAKE)
[08:08:42] [PASSED] 0x9AF8 (TIGERLAKE)
[08:08:42] [PASSED] 0x4C80 (ROCKETLAKE)
[08:08:42] [PASSED] 0x4C8A (ROCKETLAKE)
[08:08:42] [PASSED] 0x4C8B (ROCKETLAKE)
[08:08:42] [PASSED] 0x4C8C (ROCKETLAKE)
[08:08:42] [PASSED] 0x4C90 (ROCKETLAKE)
[08:08:42] [PASSED] 0x4C9A (ROCKETLAKE)
[08:08:42] [PASSED] 0x4680 (ALDERLAKE_S)
[08:08:42] [PASSED] 0x4682 (ALDERLAKE_S)
[08:08:42] [PASSED] 0x4688 (ALDERLAKE_S)
[08:08:42] [PASSED] 0x468A (ALDERLAKE_S)
[08:08:42] [PASSED] 0x468B (ALDERLAKE_S)
[08:08:42] [PASSED] 0x4690 (ALDERLAKE_S)
[08:08:42] [PASSED] 0x4692 (ALDERLAKE_S)
[08:08:42] [PASSED] 0x4693 (ALDERLAKE_S)
[08:08:42] [PASSED] 0x46A0 (ALDERLAKE_P)
[08:08:42] [PASSED] 0x46A1 (ALDERLAKE_P)
[08:08:42] [PASSED] 0x46A2 (ALDERLAKE_P)
[08:08:42] [PASSED] 0x46A3 (ALDERLAKE_P)
[08:08:42] [PASSED] 0x46A6 (ALDERLAKE_P)
[08:08:42] [PASSED] 0x46A8 (ALDERLAKE_P)
[08:08:42] [PASSED] 0x46AA (ALDERLAKE_P)
[08:08:42] [PASSED] 0x462A (ALDERLAKE_P)
[08:08:42] [PASSED] 0x4626 (ALDERLAKE_P)
[08:08:42] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[08:08:42] [PASSED] 0x46B0 (ALDERLAKE_P)
[08:08:42] [PASSED] 0x46B1 (ALDERLAKE_P)
[08:08:42] [PASSED] 0x46B2 (ALDERLAKE_P)
[08:08:42] [PASSED] 0x46B3 (ALDERLAKE_P)
[08:08:42] [PASSED] 0x46C0 (ALDERLAKE_P)
[08:08:42] [PASSED] 0x46C1 (ALDERLAKE_P)
[08:08:42] [PASSED] 0x46C2 (ALDERLAKE_P)
[08:08:42] [PASSED] 0x46C3 (ALDERLAKE_P)
[08:08:42] [PASSED] 0x46D0 (ALDERLAKE_N)
[08:08:42] [PASSED] 0x46D1 (ALDERLAKE_N)
[08:08:42] [PASSED] 0x46D2 (ALDERLAKE_N)
[08:08:42] [PASSED] 0x46D3 (ALDERLAKE_N)
[08:08:42] [PASSED] 0x46D4 (ALDERLAKE_N)
[08:08:42] [PASSED] 0xA721 (ALDERLAKE_P)
[08:08:42] [PASSED] 0xA7A1 (ALDERLAKE_P)
[08:08:42] [PASSED] 0xA7A9 (ALDERLAKE_P)
[08:08:42] [PASSED] 0xA7AC (ALDERLAKE_P)
[08:08:42] [PASSED] 0xA7AD (ALDERLAKE_P)
[08:08:42] [PASSED] 0xA720 (ALDERLAKE_P)
[08:08:42] [PASSED] 0xA7A0 (ALDERLAKE_P)
[08:08:42] [PASSED] 0xA7A8 (ALDERLAKE_P)
[08:08:42] [PASSED] 0xA7AA (ALDERLAKE_P)
[08:08:42] [PASSED] 0xA7AB (ALDERLAKE_P)
[08:08:42] [PASSED] 0xA780 (ALDERLAKE_S)
[08:08:42] [PASSED] 0xA781 (ALDERLAKE_S)
[08:08:42] [PASSED] 0xA782 (ALDERLAKE_S)
[08:08:42] [PASSED] 0xA783 (ALDERLAKE_S)
[08:08:42] [PASSED] 0xA788 (ALDERLAKE_S)
[08:08:42] [PASSED] 0xA789 (ALDERLAKE_S)
[08:08:42] [PASSED] 0xA78A (ALDERLAKE_S)
[08:08:42] [PASSED] 0xA78B (ALDERLAKE_S)
[08:08:42] [PASSED] 0x4905 (DG1)
[08:08:42] [PASSED] 0x4906 (DG1)
[08:08:42] [PASSED] 0x4907 (DG1)
[08:08:42] [PASSED] 0x4908 (DG1)
[08:08:42] [PASSED] 0x4909 (DG1)
[08:08:42] [PASSED] 0x56C0 (DG2)
[08:08:42] [PASSED] 0x56C2 (DG2)
[08:08:42] [PASSED] 0x56C1 (DG2)
[08:08:42] [PASSED] 0x7D51 (METEORLAKE)
[08:08:42] [PASSED] 0x7DD1 (METEORLAKE)
[08:08:42] [PASSED] 0x7D41 (METEORLAKE)
[08:08:42] [PASSED] 0x7D67 (METEORLAKE)
[08:08:42] [PASSED] 0xB640 (METEORLAKE)
[08:08:42] [PASSED] 0x56A0 (DG2)
[08:08:42] [PASSED] 0x56A1 (DG2)
[08:08:42] [PASSED] 0x56A2 (DG2)
[08:08:42] [PASSED] 0x56BE (DG2)
[08:08:42] [PASSED] 0x56BF (DG2)
[08:08:42] [PASSED] 0x5690 (DG2)
[08:08:42] [PASSED] 0x5691 (DG2)
[08:08:42] [PASSED] 0x5692 (DG2)
[08:08:42] [PASSED] 0x56A5 (DG2)
[08:08:42] [PASSED] 0x56A6 (DG2)
[08:08:42] [PASSED] 0x56B0 (DG2)
[08:08:42] [PASSED] 0x56B1 (DG2)
[08:08:42] [PASSED] 0x56BA (DG2)
[08:08:42] [PASSED] 0x56BB (DG2)
[08:08:42] [PASSED] 0x56BC (DG2)
[08:08:42] [PASSED] 0x56BD (DG2)
[08:08:42] [PASSED] 0x5693 (DG2)
[08:08:42] [PASSED] 0x5694 (DG2)
[08:08:42] [PASSED] 0x5695 (DG2)
[08:08:42] [PASSED] 0x56A3 (DG2)
[08:08:42] [PASSED] 0x56A4 (DG2)
[08:08:42] [PASSED] 0x56B2 (DG2)
[08:08:42] [PASSED] 0x56B3 (DG2)
[08:08:42] [PASSED] 0x5696 (DG2)
[08:08:42] [PASSED] 0x5697 (DG2)
[08:08:42] [PASSED] 0xB69 (PVC)
[08:08:42] [PASSED] 0xB6E (PVC)
[08:08:42] [PASSED] 0xBD4 (PVC)
[08:08:42] [PASSED] 0xBD5 (PVC)
[08:08:42] [PASSED] 0xBD6 (PVC)
[08:08:42] [PASSED] 0xBD7 (PVC)
[08:08:42] [PASSED] 0xBD8 (PVC)
[08:08:42] [PASSED] 0xBD9 (PVC)
[08:08:42] [PASSED] 0xBDA (PVC)
[08:08:42] [PASSED] 0xBDB (PVC)
[08:08:42] [PASSED] 0xBE0 (PVC)
[08:08:42] [PASSED] 0xBE1 (PVC)
[08:08:42] [PASSED] 0xBE5 (PVC)
[08:08:42] [PASSED] 0x7D40 (METEORLAKE)
[08:08:42] [PASSED] 0x7D45 (METEORLAKE)
[08:08:42] [PASSED] 0x7D55 (METEORLAKE)
[08:08:42] [PASSED] 0x7D60 (METEORLAKE)
[08:08:42] [PASSED] 0x7DD5 (METEORLAKE)
[08:08:42] [PASSED] 0x6420 (LUNARLAKE)
[08:08:42] [PASSED] 0x64A0 (LUNARLAKE)
[08:08:42] [PASSED] 0x64B0 (LUNARLAKE)
[08:08:42] [PASSED] 0xE202 (BATTLEMAGE)
[08:08:42] [PASSED] 0xE209 (BATTLEMAGE)
[08:08:42] [PASSED] 0xE20B (BATTLEMAGE)
[08:08:42] [PASSED] 0xE20C (BATTLEMAGE)
[08:08:42] [PASSED] 0xE20D (BATTLEMAGE)
[08:08:42] [PASSED] 0xE210 (BATTLEMAGE)
[08:08:42] [PASSED] 0xE211 (BATTLEMAGE)
[08:08:42] [PASSED] 0xE212 (BATTLEMAGE)
[08:08:42] [PASSED] 0xE216 (BATTLEMAGE)
[08:08:42] [PASSED] 0xE220 (BATTLEMAGE)
[08:08:42] [PASSED] 0xE221 (BATTLEMAGE)
[08:08:42] [PASSED] 0xE222 (BATTLEMAGE)
[08:08:42] [PASSED] 0xE223 (BATTLEMAGE)
[08:08:42] [PASSED] 0xB080 (PANTHERLAKE)
[08:08:42] [PASSED] 0xB081 (PANTHERLAKE)
[08:08:42] [PASSED] 0xB082 (PANTHERLAKE)
[08:08:42] [PASSED] 0xB083 (PANTHERLAKE)
[08:08:42] [PASSED] 0xB084 (PANTHERLAKE)
[08:08:42] [PASSED] 0xB085 (PANTHERLAKE)
[08:08:42] [PASSED] 0xB086 (PANTHERLAKE)
[08:08:42] [PASSED] 0xB087 (PANTHERLAKE)
[08:08:42] [PASSED] 0xB08F (PANTHERLAKE)
[08:08:42] [PASSED] 0xB090 (PANTHERLAKE)
[08:08:42] [PASSED] 0xB0A0 (PANTHERLAKE)
[08:08:42] [PASSED] 0xB0B0 (PANTHERLAKE)
[08:08:42] [PASSED] 0xFD80 (PANTHERLAKE)
[08:08:42] [PASSED] 0xFD81 (PANTHERLAKE)
[08:08:42] [PASSED] 0xD740 (NOVALAKE_S)
[08:08:42] [PASSED] 0xD741 (NOVALAKE_S)
[08:08:42] [PASSED] 0xD742 (NOVALAKE_S)
[08:08:42] [PASSED] 0xD743 (NOVALAKE_S)
[08:08:42] [PASSED] 0xD744 (NOVALAKE_S)
[08:08:42] [PASSED] 0xD745 (NOVALAKE_S)
[08:08:42] [PASSED] 0x674C (CRESCENTISLAND)
[08:08:42] =============== [PASSED] check_platform_desc ===============
[08:08:42] ===================== [PASSED] xe_pci ======================
[08:08:42] =================== xe_rtp (2 subtests) ====================
[08:08:42] =============== xe_rtp_process_to_sr_tests  ================
[08:08:42] [PASSED] coalesce-same-reg
[08:08:42] [PASSED] no-match-no-add
[08:08:42] [PASSED] match-or
[08:08:42] [PASSED] match-or-xfail
[08:08:42] [PASSED] no-match-no-add-multiple-rules
[08:08:42] [PASSED] two-regs-two-entries
[08:08:42] [PASSED] clr-one-set-other
[08:08:42] [PASSED] set-field
[08:08:42] [PASSED] conflict-duplicate
[08:08:42] [PASSED] conflict-not-disjoint
[08:08:42] [PASSED] conflict-reg-type
[08:08:42] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[08:08:42] ================== xe_rtp_process_tests  ===================
[08:08:42] [PASSED] active1
[08:08:42] [PASSED] active2
[08:08:42] [PASSED] active-inactive
[08:08:42] [PASSED] inactive-active
[08:08:42] [PASSED] inactive-1st_or_active-inactive
[08:08:42] [PASSED] inactive-2nd_or_active-inactive
[08:08:42] [PASSED] inactive-last_or_active-inactive
[08:08:42] [PASSED] inactive-no_or_active-inactive
[08:08:42] ============== [PASSED] xe_rtp_process_tests ===============
[08:08:42] ===================== [PASSED] xe_rtp ======================
[08:08:42] ==================== xe_wa (1 subtest) =====================
[08:08:42] ======================== xe_wa_gt  =========================
[08:08:42] [PASSED] TIGERLAKE B0
[08:08:42] [PASSED] DG1 A0
[08:08:42] [PASSED] DG1 B0
[08:08:42] [PASSED] ALDERLAKE_S A0
[08:08:42] [PASSED] ALDERLAKE_S B0
[08:08:42] [PASSED] ALDERLAKE_S C0
[08:08:42] [PASSED] ALDERLAKE_S D0
[08:08:42] [PASSED] ALDERLAKE_P A0
[08:08:42] [PASSED] ALDERLAKE_P B0
[08:08:42] [PASSED] ALDERLAKE_P C0
[08:08:42] [PASSED] ALDERLAKE_S RPLS D0
[08:08:42] [PASSED] ALDERLAKE_P RPLU E0
[08:08:42] [PASSED] DG2 G10 C0
[08:08:42] [PASSED] DG2 G11 B1
[08:08:42] [PASSED] DG2 G12 A1
[08:08:42] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[08:08:42] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[08:08:42] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[08:08:42] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[08:08:42] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[08:08:42] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[08:08:42] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[08:08:42] ==================== [PASSED] xe_wa_gt =====================
[08:08:42] ====================== [PASSED] xe_wa ======================
[08:08:42] ============================================================
[08:08:42] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[08:08:42] Elapsed time: 36.308s total, 4.170s configuring, 31.621s building, 0.470s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[08:08:42] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:08:44] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:09:09] Starting KUnit Kernel (1/1)...
[08:09:09] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:09:09] ============ drm_test_pick_cmdline (2 subtests) ============
[08:09:09] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[08:09:09] =============== drm_test_pick_cmdline_named  ===============
[08:09:09] [PASSED] NTSC
[08:09:09] [PASSED] NTSC-J
[08:09:09] [PASSED] PAL
[08:09:09] [PASSED] PAL-M
[08:09:09] =========== [PASSED] drm_test_pick_cmdline_named ===========
[08:09:09] ============== [PASSED] drm_test_pick_cmdline ==============
[08:09:09] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[08:09:09] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[08:09:09] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[08:09:09] =========== drm_validate_clone_mode (2 subtests) ===========
[08:09:09] ============== drm_test_check_in_clone_mode  ===============
[08:09:09] [PASSED] in_clone_mode
[08:09:09] [PASSED] not_in_clone_mode
[08:09:09] ========== [PASSED] drm_test_check_in_clone_mode ===========
[08:09:09] =============== drm_test_check_valid_clones  ===============
[08:09:09] [PASSED] not_in_clone_mode
[08:09:09] [PASSED] valid_clone
[08:09:09] [PASSED] invalid_clone
[08:09:09] =========== [PASSED] drm_test_check_valid_clones ===========
[08:09:09] ============= [PASSED] drm_validate_clone_mode =============
[08:09:09] ============= drm_validate_modeset (1 subtest) =============
[08:09:09] [PASSED] drm_test_check_connector_changed_modeset
[08:09:09] ============== [PASSED] drm_validate_modeset ===============
[08:09:09] ====== drm_test_bridge_get_current_state (2 subtests) ======
[08:09:09] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[08:09:09] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[08:09:09] ======== [PASSED] drm_test_bridge_get_current_state ========
[08:09:09] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[08:09:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[08:09:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[08:09:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[08:09:09] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[08:09:09] ============== drm_bridge_alloc (2 subtests) ===============
[08:09:09] [PASSED] drm_test_drm_bridge_alloc_basic
[08:09:09] [PASSED] drm_test_drm_bridge_alloc_get_put
[08:09:09] ================ [PASSED] drm_bridge_alloc =================
[08:09:09] ================== drm_buddy (9 subtests) ==================
[08:09:09] [PASSED] drm_test_buddy_alloc_limit
[08:09:09] [PASSED] drm_test_buddy_alloc_optimistic
[08:09:09] [PASSED] drm_test_buddy_alloc_pessimistic
[08:09:09] [PASSED] drm_test_buddy_alloc_pathological
[08:09:09] [PASSED] drm_test_buddy_alloc_contiguous
[08:09:09] [PASSED] drm_test_buddy_alloc_clear
[08:09:09] [PASSED] drm_test_buddy_alloc_range_bias
[08:09:09] [PASSED] drm_test_buddy_fragmentation_performance
[08:09:09] [PASSED] drm_test_buddy_alloc_exceeds_max_order
[08:09:09] ==================== [PASSED] drm_buddy ====================
[08:09:09] ============= drm_cmdline_parser (40 subtests) =============
[08:09:09] [PASSED] drm_test_cmdline_force_d_only
[08:09:09] [PASSED] drm_test_cmdline_force_D_only_dvi
[08:09:09] [PASSED] drm_test_cmdline_force_D_only_hdmi
[08:09:09] [PASSED] drm_test_cmdline_force_D_only_not_digital
[08:09:09] [PASSED] drm_test_cmdline_force_e_only
[08:09:09] [PASSED] drm_test_cmdline_res
[08:09:09] [PASSED] drm_test_cmdline_res_vesa
[08:09:09] [PASSED] drm_test_cmdline_res_vesa_rblank
[08:09:09] [PASSED] drm_test_cmdline_res_rblank
[08:09:09] [PASSED] drm_test_cmdline_res_bpp
[08:09:09] [PASSED] drm_test_cmdline_res_refresh
[08:09:09] [PASSED] drm_test_cmdline_res_bpp_refresh
[08:09:09] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[08:09:09] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[08:09:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[08:09:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[08:09:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[08:09:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[08:09:09] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[08:09:09] [PASSED] drm_test_cmdline_res_margins_force_on
[08:09:09] [PASSED] drm_test_cmdline_res_vesa_margins
[08:09:09] [PASSED] drm_test_cmdline_name
[08:09:09] [PASSED] drm_test_cmdline_name_bpp
[08:09:09] [PASSED] drm_test_cmdline_name_option
[08:09:09] [PASSED] drm_test_cmdline_name_bpp_option
[08:09:09] [PASSED] drm_test_cmdline_rotate_0
[08:09:09] [PASSED] drm_test_cmdline_rotate_90
[08:09:09] [PASSED] drm_test_cmdline_rotate_180
[08:09:09] [PASSED] drm_test_cmdline_rotate_270
[08:09:09] [PASSED] drm_test_cmdline_hmirror
[08:09:09] [PASSED] drm_test_cmdline_vmirror
[08:09:09] [PASSED] drm_test_cmdline_margin_options
[08:09:09] [PASSED] drm_test_cmdline_multiple_options
[08:09:09] [PASSED] drm_test_cmdline_bpp_extra_and_option
[08:09:09] [PASSED] drm_test_cmdline_extra_and_option
[08:09:09] [PASSED] drm_test_cmdline_freestanding_options
[08:09:09] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[08:09:09] [PASSED] drm_test_cmdline_panel_orientation
[08:09:09] ================ drm_test_cmdline_invalid  =================
[08:09:09] [PASSED] margin_only
[08:09:09] [PASSED] interlace_only
[08:09:09] [PASSED] res_missing_x
[08:09:09] [PASSED] res_missing_y
[08:09:09] [PASSED] res_bad_y
[08:09:09] [PASSED] res_missing_y_bpp
[08:09:09] [PASSED] res_bad_bpp
[08:09:09] [PASSED] res_bad_refresh
[08:09:09] [PASSED] res_bpp_refresh_force_on_off
[08:09:09] [PASSED] res_invalid_mode
[08:09:09] [PASSED] res_bpp_wrong_place_mode
[08:09:09] [PASSED] name_bpp_refresh
[08:09:09] [PASSED] name_refresh
[08:09:09] [PASSED] name_refresh_wrong_mode
[08:09:09] [PASSED] name_refresh_invalid_mode
[08:09:09] [PASSED] rotate_multiple
[08:09:09] [PASSED] rotate_invalid_val
[08:09:09] [PASSED] rotate_truncated
[08:09:09] [PASSED] invalid_option
[08:09:09] [PASSED] invalid_tv_option
[08:09:09] [PASSED] truncated_tv_option
[08:09:09] ============ [PASSED] drm_test_cmdline_invalid =============
[08:09:09] =============== drm_test_cmdline_tv_options  ===============
[08:09:09] [PASSED] NTSC
[08:09:09] [PASSED] NTSC_443
[08:09:09] [PASSED] NTSC_J
[08:09:09] [PASSED] PAL
[08:09:09] [PASSED] PAL_M
[08:09:09] [PASSED] PAL_N
[08:09:09] [PASSED] SECAM
[08:09:09] [PASSED] MONO_525
[08:09:09] [PASSED] MONO_625
[08:09:09] =========== [PASSED] drm_test_cmdline_tv_options ===========
[08:09:09] =============== [PASSED] drm_cmdline_parser ================
[08:09:09] ========== drmm_connector_hdmi_init (20 subtests) ==========
[08:09:09] [PASSED] drm_test_connector_hdmi_init_valid
[08:09:09] [PASSED] drm_test_connector_hdmi_init_bpc_8
[08:09:09] [PASSED] drm_test_connector_hdmi_init_bpc_10
[08:09:09] [PASSED] drm_test_connector_hdmi_init_bpc_12
[08:09:09] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[08:09:09] [PASSED] drm_test_connector_hdmi_init_bpc_null
[08:09:09] [PASSED] drm_test_connector_hdmi_init_formats_empty
[08:09:09] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[08:09:09] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[08:09:09] [PASSED] supported_formats=0x9 yuv420_allowed=1
[08:09:09] [PASSED] supported_formats=0x9 yuv420_allowed=0
[08:09:09] [PASSED] supported_formats=0x3 yuv420_allowed=1
[08:09:09] [PASSED] supported_formats=0x3 yuv420_allowed=0
[08:09:09] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[08:09:09] [PASSED] drm_test_connector_hdmi_init_null_ddc
[08:09:09] [PASSED] drm_test_connector_hdmi_init_null_product
[08:09:09] [PASSED] drm_test_connector_hdmi_init_null_vendor
[08:09:09] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[08:09:09] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[08:09:09] [PASSED] drm_test_connector_hdmi_init_product_valid
[08:09:09] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[08:09:09] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[08:09:09] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[08:09:09] ========= drm_test_connector_hdmi_init_type_valid  =========
[08:09:09] [PASSED] HDMI-A
[08:09:09] [PASSED] HDMI-B
[08:09:09] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[08:09:09] ======== drm_test_connector_hdmi_init_type_invalid  ========
[08:09:09] [PASSED] Unknown
[08:09:09] [PASSED] VGA
[08:09:09] [PASSED] DVI-I
[08:09:09] [PASSED] DVI-D
[08:09:09] [PASSED] DVI-A
[08:09:09] [PASSED] Composite
[08:09:09] [PASSED] SVIDEO
[08:09:09] [PASSED] LVDS
[08:09:09] [PASSED] Component
[08:09:09] [PASSED] DIN
[08:09:09] [PASSED] DP
[08:09:09] [PASSED] TV
[08:09:09] [PASSED] eDP
[08:09:09] [PASSED] Virtual
[08:09:09] [PASSED] DSI
[08:09:09] [PASSED] DPI
[08:09:09] [PASSED] Writeback
[08:09:09] [PASSED] SPI
[08:09:09] [PASSED] USB
[08:09:09] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[08:09:09] ============ [PASSED] drmm_connector_hdmi_init =============
[08:09:09] ============= drmm_connector_init (3 subtests) =============
[08:09:09] [PASSED] drm_test_drmm_connector_init
[08:09:09] [PASSED] drm_test_drmm_connector_init_null_ddc
[08:09:09] ========= drm_test_drmm_connector_init_type_valid  =========
[08:09:09] [PASSED] Unknown
[08:09:09] [PASSED] VGA
[08:09:09] [PASSED] DVI-I
[08:09:09] [PASSED] DVI-D
[08:09:09] [PASSED] DVI-A
[08:09:09] [PASSED] Composite
[08:09:09] [PASSED] SVIDEO
[08:09:09] [PASSED] LVDS
[08:09:09] [PASSED] Component
[08:09:09] [PASSED] DIN
[08:09:09] [PASSED] DP
[08:09:09] [PASSED] HDMI-A
[08:09:09] [PASSED] HDMI-B
[08:09:09] [PASSED] TV
[08:09:09] [PASSED] eDP
[08:09:09] [PASSED] Virtual
[08:09:09] [PASSED] DSI
[08:09:09] [PASSED] DPI
[08:09:09] [PASSED] Writeback
[08:09:09] [PASSED] SPI
[08:09:09] [PASSED] USB
[08:09:09] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[08:09:09] =============== [PASSED] drmm_connector_init ===============
[08:09:09] ========= drm_connector_dynamic_init (6 subtests) ==========
[08:09:09] [PASSED] drm_test_drm_connector_dynamic_init
[08:09:09] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[08:09:09] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[08:09:09] [PASSED] drm_test_drm_connector_dynamic_init_properties
[08:09:09] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[08:09:09] [PASSED] Unknown
[08:09:09] [PASSED] VGA
[08:09:09] [PASSED] DVI-I
[08:09:09] [PASSED] DVI-D
[08:09:09] [PASSED] DVI-A
[08:09:09] [PASSED] Composite
[08:09:09] [PASSED] SVIDEO
[08:09:09] [PASSED] LVDS
[08:09:09] [PASSED] Component
[08:09:09] [PASSED] DIN
[08:09:09] [PASSED] DP
[08:09:09] [PASSED] HDMI-A
[08:09:09] [PASSED] HDMI-B
[08:09:09] [PASSED] TV
[08:09:09] [PASSED] eDP
[08:09:09] [PASSED] Virtual
[08:09:09] [PASSED] DSI
[08:09:09] [PASSED] DPI
[08:09:09] [PASSED] Writeback
[08:09:09] [PASSED] SPI
[08:09:09] [PASSED] USB
[08:09:09] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[08:09:09] ======== drm_test_drm_connector_dynamic_init_name  =========
[08:09:09] [PASSED] Unknown
[08:09:09] [PASSED] VGA
[08:09:09] [PASSED] DVI-I
[08:09:09] [PASSED] DVI-D
[08:09:09] [PASSED] DVI-A
[08:09:09] [PASSED] Composite
[08:09:09] [PASSED] SVIDEO
[08:09:09] [PASSED] LVDS
[08:09:09] [PASSED] Component
[08:09:09] [PASSED] DIN
[08:09:09] [PASSED] DP
[08:09:09] [PASSED] HDMI-A
[08:09:09] [PASSED] HDMI-B
[08:09:09] [PASSED] TV
[08:09:09] [PASSED] eDP
[08:09:09] [PASSED] Virtual
[08:09:09] [PASSED] DSI
[08:09:09] [PASSED] DPI
[08:09:09] [PASSED] Writeback
[08:09:09] [PASSED] SPI
[08:09:09] [PASSED] USB
[08:09:09] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[08:09:09] =========== [PASSED] drm_connector_dynamic_init ============
[08:09:09] ==== drm_connector_dynamic_register_early (4 subtests) =====
[08:09:09] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[08:09:09] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[08:09:09] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[08:09:09] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[08:09:09] ====== [PASSED] drm_connector_dynamic_register_early =======
[08:09:09] ======= drm_connector_dynamic_register (7 subtests) ========
[08:09:09] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[08:09:09] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[08:09:09] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[08:09:09] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[08:09:09] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[08:09:09] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[08:09:09] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[08:09:09] ========= [PASSED] drm_connector_dynamic_register ==========
[08:09:09] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[08:09:09] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[08:09:09] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[08:09:09] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[08:09:09] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[08:09:09] ========== drm_test_get_tv_mode_from_name_valid  ===========
[08:09:09] [PASSED] NTSC
[08:09:09] [PASSED] NTSC-443
[08:09:09] [PASSED] NTSC-J
[08:09:09] [PASSED] PAL
[08:09:09] [PASSED] PAL-M
[08:09:09] [PASSED] PAL-N
[08:09:09] [PASSED] SECAM
[08:09:09] [PASSED] Mono
[08:09:09] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[08:09:09] [PASSED] drm_test_get_tv_mode_from_name_truncated
[08:09:09] ============ [PASSED] drm_get_tv_mode_from_name ============
[08:09:09] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[08:09:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[08:09:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[08:09:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[08:09:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[08:09:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[08:09:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[08:09:09] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[08:09:09] [PASSED] VIC 96
[08:09:09] [PASSED] VIC 97
[08:09:09] [PASSED] VIC 101
[08:09:09] [PASSED] VIC 102
[08:09:09] [PASSED] VIC 106
[08:09:09] [PASSED] VIC 107
[08:09:09] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[08:09:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[08:09:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[08:09:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[08:09:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[08:09:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[08:09:09] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[08:09:09] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[08:09:09] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[08:09:09] [PASSED] Automatic
[08:09:09] [PASSED] Full
[08:09:09] [PASSED] Limited 16:235
[08:09:09] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[08:09:09] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[08:09:09] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[08:09:09] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[08:09:09] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[08:09:09] [PASSED] RGB
[08:09:09] [PASSED] YUV 4:2:0
[08:09:09] [PASSED] YUV 4:2:2
[08:09:09] [PASSED] YUV 4:4:4
[08:09:09] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[08:09:09] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[08:09:09] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[08:09:09] ============= drm_damage_helper (21 subtests) ==============
[08:09:09] [PASSED] drm_test_damage_iter_no_damage
[08:09:09] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[08:09:09] [PASSED] drm_test_damage_iter_no_damage_src_moved
[08:09:09] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[08:09:09] [PASSED] drm_test_damage_iter_no_damage_not_visible
[08:09:09] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[08:09:09] [PASSED] drm_test_damage_iter_no_damage_no_fb
[08:09:09] [PASSED] drm_test_damage_iter_simple_damage
[08:09:09] [PASSED] drm_test_damage_iter_single_damage
[08:09:09] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[08:09:09] [PASSED] drm_test_damage_iter_single_damage_outside_src
[08:09:09] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[08:09:09] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[08:09:09] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[08:09:09] [PASSED] drm_test_damage_iter_single_damage_src_moved
[08:09:09] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[08:09:09] [PASSED] drm_test_damage_iter_damage
[08:09:09] [PASSED] drm_test_damage_iter_damage_one_intersect
[08:09:09] [PASSED] drm_test_damage_iter_damage_one_outside
[08:09:09] [PASSED] drm_test_damage_iter_damage_src_moved
[08:09:09] [PASSED] drm_test_damage_iter_damage_not_visible
[08:09:09] ================ [PASSED] drm_damage_helper ================
[08:09:09] ============== drm_dp_mst_helper (3 subtests) ==============
[08:09:09] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[08:09:09] [PASSED] Clock 154000 BPP 30 DSC disabled
[08:09:09] [PASSED] Clock 234000 BPP 30 DSC disabled
[08:09:09] [PASSED] Clock 297000 BPP 24 DSC disabled
[08:09:09] [PASSED] Clock 332880 BPP 24 DSC enabled
[08:09:09] [PASSED] Clock 324540 BPP 24 DSC enabled
[08:09:09] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[08:09:09] ============== drm_test_dp_mst_calc_pbn_div  ===============
[08:09:09] [PASSED] Link rate 2000000 lane count 4
[08:09:09] [PASSED] Link rate 2000000 lane count 2
[08:09:09] [PASSED] Link rate 2000000 lane count 1
[08:09:09] [PASSED] Link rate 1350000 lane count 4
[08:09:09] [PASSED] Link rate 1350000 lane count 2
[08:09:09] [PASSED] Link rate 1350000 lane count 1
[08:09:09] [PASSED] Link rate 1000000 lane count 4
[08:09:09] [PASSED] Link rate 1000000 lane count 2
[08:09:09] [PASSED] Link rate 1000000 lane count 1
[08:09:09] [PASSED] Link rate 810000 lane count 4
[08:09:09] [PASSED] Link rate 810000 lane count 2
[08:09:09] [PASSED] Link rate 810000 lane count 1
[08:09:09] [PASSED] Link rate 540000 lane count 4
[08:09:09] [PASSED] Link rate 540000 lane count 2
[08:09:09] [PASSED] Link rate 540000 lane count 1
[08:09:09] [PASSED] Link rate 270000 lane count 4
[08:09:09] [PASSED] Link rate 270000 lane count 2
[08:09:09] [PASSED] Link rate 270000 lane count 1
[08:09:09] [PASSED] Link rate 162000 lane count 4
[08:09:09] [PASSED] Link rate 162000 lane count 2
[08:09:09] [PASSED] Link rate 162000 lane count 1
[08:09:09] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[08:09:09] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[08:09:09] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[08:09:09] [PASSED] DP_POWER_UP_PHY with port number
[08:09:09] [PASSED] DP_POWER_DOWN_PHY with port number
[08:09:09] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[08:09:09] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[08:09:09] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[08:09:09] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[08:09:09] [PASSED] DP_QUERY_PAYLOAD with port number
[08:09:09] [PASSED] DP_QUERY_PAYLOAD with VCPI
[08:09:09] [PASSED] DP_REMOTE_DPCD_READ with port number
[08:09:09] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[08:09:09] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[08:09:09] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[08:09:09] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[08:09:09] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[08:09:09] [PASSED] DP_REMOTE_I2C_READ with port number
[08:09:09] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[08:09:09] [PASSED] DP_REMOTE_I2C_READ with transactions array
[08:09:09] [PASSED] DP_REMOTE_I2C_WRITE with port number
[08:09:09] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[08:09:09] [PASSED] DP_REMOTE_I2C_WRITE with data array
[08:09:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[08:09:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[08:09:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[08:09:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[08:09:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[08:09:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[08:09:09] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[08:09:09] ================ [PASSED] drm_dp_mst_helper ================
[08:09:09] ================== drm_exec (7 subtests) ===================
[08:09:09] [PASSED] sanitycheck
[08:09:09] [PASSED] test_lock
[08:09:09] [PASSED] test_lock_unlock
[08:09:09] [PASSED] test_duplicates
[08:09:09] [PASSED] test_prepare
[08:09:09] [PASSED] test_prepare_array
[08:09:09] [PASSED] test_multiple_loops
[08:09:09] ==================== [PASSED] drm_exec =====================
[08:09:09] =========== drm_format_helper_test (17 subtests) ===========
[08:09:09] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[08:09:09] [PASSED] single_pixel_source_buffer
[08:09:09] [PASSED] single_pixel_clip_rectangle
[08:09:09] [PASSED] well_known_colors
[08:09:09] [PASSED] destination_pitch
[08:09:09] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[08:09:09] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[08:09:09] [PASSED] single_pixel_source_buffer
[08:09:09] [PASSED] single_pixel_clip_rectangle
[08:09:09] [PASSED] well_known_colors
[08:09:09] [PASSED] destination_pitch
[08:09:09] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[08:09:09] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[08:09:09] [PASSED] single_pixel_source_buffer
[08:09:09] [PASSED] single_pixel_clip_rectangle
[08:09:09] [PASSED] well_known_colors
[08:09:09] [PASSED] destination_pitch
[08:09:09] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[08:09:09] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[08:09:09] [PASSED] single_pixel_source_buffer
[08:09:09] [PASSED] single_pixel_clip_rectangle
[08:09:09] [PASSED] well_known_colors
[08:09:09] [PASSED] destination_pitch
[08:09:09] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[08:09:09] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[08:09:09] [PASSED] single_pixel_source_buffer
[08:09:09] [PASSED] single_pixel_clip_rectangle
[08:09:09] [PASSED] well_known_colors
[08:09:09] [PASSED] destination_pitch
[08:09:09] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[08:09:09] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[08:09:09] [PASSED] single_pixel_source_buffer
[08:09:09] [PASSED] single_pixel_clip_rectangle
[08:09:09] [PASSED] well_known_colors
[08:09:09] [PASSED] destination_pitch
[08:09:09] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[08:09:09] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[08:09:09] [PASSED] single_pixel_source_buffer
[08:09:09] [PASSED] single_pixel_clip_rectangle
[08:09:09] [PASSED] well_known_colors
[08:09:09] [PASSED] destination_pitch
[08:09:09] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[08:09:09] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[08:09:09] [PASSED] single_pixel_source_buffer
[08:09:09] [PASSED] single_pixel_clip_rectangle
[08:09:09] [PASSED] well_known_colors
[08:09:09] [PASSED] destination_pitch
[08:09:09] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[08:09:09] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[08:09:09] [PASSED] single_pixel_source_buffer
[08:09:09] [PASSED] single_pixel_clip_rectangle
[08:09:09] [PASSED] well_known_colors
[08:09:09] [PASSED] destination_pitch
[08:09:09] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[08:09:09] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[08:09:09] [PASSED] single_pixel_source_buffer
[08:09:09] [PASSED] single_pixel_clip_rectangle
[08:09:09] [PASSED] well_known_colors
[08:09:09] [PASSED] destination_pitch
[08:09:09] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[08:09:09] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[08:09:09] [PASSED] single_pixel_source_buffer
[08:09:09] [PASSED] single_pixel_clip_rectangle
[08:09:09] [PASSED] well_known_colors
[08:09:09] [PASSED] destination_pitch
[08:09:09] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[08:09:09] ============== drm_test_fb_xrgb8888_to_mono  ===============
[08:09:09] [PASSED] single_pixel_source_buffer
[08:09:09] [PASSED] single_pixel_clip_rectangle
[08:09:09] [PASSED] well_known_colors
[08:09:09] [PASSED] destination_pitch
[08:09:09] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[08:09:09] ==================== drm_test_fb_swab  =====================
[08:09:09] [PASSED] single_pixel_source_buffer
[08:09:09] [PASSED] single_pixel_clip_rectangle
[08:09:09] [PASSED] well_known_colors
[08:09:09] [PASSED] destination_pitch
[08:09:09] ================ [PASSED] drm_test_fb_swab =================
[08:09:09] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[08:09:09] [PASSED] single_pixel_source_buffer
[08:09:09] [PASSED] single_pixel_clip_rectangle
[08:09:09] [PASSED] well_known_colors
[08:09:09] [PASSED] destination_pitch
[08:09:09] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[08:09:09] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[08:09:09] [PASSED] single_pixel_source_buffer
[08:09:09] [PASSED] single_pixel_clip_rectangle
[08:09:09] [PASSED] well_known_colors
[08:09:09] [PASSED] destination_pitch
[08:09:09] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[08:09:09] ================= drm_test_fb_clip_offset  =================
[08:09:09] [PASSED] pass through
[08:09:09] [PASSED] horizontal offset
[08:09:09] [PASSED] vertical offset
[08:09:09] [PASSED] horizontal and vertical offset
[08:09:09] [PASSED] horizontal offset (custom pitch)
[08:09:09] [PASSED] vertical offset (custom pitch)
[08:09:09] [PASSED] horizontal and vertical offset (custom pitch)
[08:09:09] ============= [PASSED] drm_test_fb_clip_offset =============
[08:09:09] =================== drm_test_fb_memcpy  ====================
[08:09:09] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[08:09:09] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[08:09:09] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[08:09:09] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[08:09:09] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[08:09:09] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[08:09:09] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[08:09:09] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[08:09:09] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[08:09:09] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[08:09:09] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[08:09:09] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[08:09:09] =============== [PASSED] drm_test_fb_memcpy ================
[08:09:09] ============= [PASSED] drm_format_helper_test ==============
[08:09:09] ================= drm_format (18 subtests) =================
[08:09:09] [PASSED] drm_test_format_block_width_invalid
[08:09:09] [PASSED] drm_test_format_block_width_one_plane
[08:09:09] [PASSED] drm_test_format_block_width_two_plane
[08:09:09] [PASSED] drm_test_format_block_width_three_plane
[08:09:09] [PASSED] drm_test_format_block_width_tiled
[08:09:09] [PASSED] drm_test_format_block_height_invalid
[08:09:09] [PASSED] drm_test_format_block_height_one_plane
[08:09:09] [PASSED] drm_test_format_block_height_two_plane
[08:09:09] [PASSED] drm_test_format_block_height_three_plane
[08:09:09] [PASSED] drm_test_format_block_height_tiled
[08:09:09] [PASSED] drm_test_format_min_pitch_invalid
[08:09:09] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[08:09:09] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[08:09:09] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[08:09:09] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[08:09:09] [PASSED] drm_test_format_min_pitch_two_plane
[08:09:09] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[08:09:09] [PASSED] drm_test_format_min_pitch_tiled
[08:09:09] =================== [PASSED] drm_format ====================
[08:09:09] ============== drm_framebuffer (10 subtests) ===============
[08:09:09] ========== drm_test_framebuffer_check_src_coords  ==========
[08:09:09] [PASSED] Success: source fits into fb
[08:09:09] [PASSED] Fail: overflowing fb with x-axis coordinate
[08:09:09] [PASSED] Fail: overflowing fb with y-axis coordinate
[08:09:09] [PASSED] Fail: overflowing fb with source width
[08:09:09] [PASSED] Fail: overflowing fb with source height
[08:09:09] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[08:09:09] [PASSED] drm_test_framebuffer_cleanup
[08:09:09] =============== drm_test_framebuffer_create  ===============
[08:09:09] [PASSED] ABGR8888 normal sizes
[08:09:09] [PASSED] ABGR8888 max sizes
[08:09:09] [PASSED] ABGR8888 pitch greater than min required
[08:09:09] [PASSED] ABGR8888 pitch less than min required
[08:09:09] [PASSED] ABGR8888 Invalid width
[08:09:09] [PASSED] ABGR8888 Invalid buffer handle
[08:09:09] [PASSED] No pixel format
[08:09:09] [PASSED] ABGR8888 Width 0
[08:09:09] [PASSED] ABGR8888 Height 0
[08:09:09] [PASSED] ABGR8888 Out of bound height * pitch combination
[08:09:09] [PASSED] ABGR8888 Large buffer offset
[08:09:09] [PASSED] ABGR8888 Buffer offset for inexistent plane
[08:09:09] [PASSED] ABGR8888 Invalid flag
[08:09:09] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[08:09:09] [PASSED] ABGR8888 Valid buffer modifier
[08:09:09] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[08:09:09] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[08:09:09] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[08:09:09] [PASSED] NV12 Normal sizes
[08:09:09] [PASSED] NV12 Max sizes
[08:09:09] [PASSED] NV12 Invalid pitch
[08:09:09] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[08:09:09] [PASSED] NV12 different  modifier per-plane
[08:09:09] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[08:09:09] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[08:09:09] [PASSED] NV12 Modifier for inexistent plane
[08:09:09] [PASSED] NV12 Handle for inexistent plane
[08:09:09] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[08:09:09] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[08:09:09] [PASSED] YVU420 Normal sizes
[08:09:09] [PASSED] YVU420 Max sizes
[08:09:09] [PASSED] YVU420 Invalid pitch
[08:09:09] [PASSED] YVU420 Different pitches
[08:09:09] [PASSED] YVU420 Different buffer offsets/pitches
[08:09:09] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[08:09:09] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[08:09:09] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[08:09:09] [PASSED] YVU420 Valid modifier
[08:09:09] [PASSED] YVU420 Different modifiers per plane
[08:09:09] [PASSED] YVU420 Modifier for inexistent plane
[08:09:09] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[08:09:09] [PASSED] X0L2 Normal sizes
[08:09:09] [PASSED] X0L2 Max sizes
[08:09:09] [PASSED] X0L2 Invalid pitch
[08:09:09] [PASSED] X0L2 Pitch greater than minimum required
[08:09:09] [PASSED] X0L2 Handle for inexistent plane
[08:09:09] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[08:09:09] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[08:09:09] [PASSED] X0L2 Valid modifier
[08:09:09] [PASSED] X0L2 Modifier for inexistent plane
[08:09:09] =========== [PASSED] drm_test_framebuffer_create ===========
[08:09:09] [PASSED] drm_test_framebuffer_free
[08:09:09] [PASSED] drm_test_framebuffer_init
[08:09:09] [PASSED] drm_test_framebuffer_init_bad_format
[08:09:09] [PASSED] drm_test_framebuffer_init_dev_mismatch
[08:09:09] [PASSED] drm_test_framebuffer_lookup
[08:09:09] [PASSED] drm_test_framebuffer_lookup_inexistent
[08:09:09] [PASSED] drm_test_framebuffer_modifiers_not_supported
[08:09:09] ================= [PASSED] drm_framebuffer =================
[08:09:09] ================ drm_gem_shmem (8 subtests) ================
[08:09:09] [PASSED] drm_gem_shmem_test_obj_create
[08:09:09] [PASSED] drm_gem_shmem_test_obj_create_private
[08:09:09] [PASSED] drm_gem_shmem_test_pin_pages
[08:09:09] [PASSED] drm_gem_shmem_test_vmap
[08:09:09] [PASSED] drm_gem_shmem_test_get_sg_table
[08:09:09] [PASSED] drm_gem_shmem_test_get_pages_sgt
[08:09:09] [PASSED] drm_gem_shmem_test_madvise
[08:09:09] [PASSED] drm_gem_shmem_test_purge
[08:09:09] ================== [PASSED] drm_gem_shmem ==================
[08:09:09] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[08:09:09] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[08:09:09] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[08:09:09] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[08:09:09] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[08:09:09] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[08:09:09] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[08:09:09] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[08:09:09] [PASSED] Automatic
[08:09:09] [PASSED] Full
[08:09:09] [PASSED] Limited 16:235
[08:09:09] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[08:09:09] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[08:09:09] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[08:09:09] [PASSED] drm_test_check_disable_connector
[08:09:09] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[08:09:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[08:09:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[08:09:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[08:09:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[08:09:09] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[08:09:09] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[08:09:09] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[08:09:09] [PASSED] drm_test_check_output_bpc_dvi
[08:09:09] [PASSED] drm_test_check_output_bpc_format_vic_1
[08:09:09] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[08:09:09] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[08:09:09] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[08:09:09] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[08:09:09] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[08:09:09] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[08:09:09] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[08:09:09] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[08:09:09] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[08:09:09] [PASSED] drm_test_check_broadcast_rgb_value
[08:09:09] [PASSED] drm_test_check_bpc_8_value
[08:09:09] [PASSED] drm_test_check_bpc_10_value
[08:09:09] [PASSED] drm_test_check_bpc_12_value
[08:09:09] [PASSED] drm_test_check_format_value
[08:09:09] [PASSED] drm_test_check_tmds_char_value
[08:09:09] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[08:09:09] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[08:09:09] [PASSED] drm_test_check_mode_valid
[08:09:09] [PASSED] drm_test_check_mode_valid_reject
[08:09:09] [PASSED] drm_test_check_mode_valid_reject_rate
[08:09:09] [PASSED] drm_test_check_mode_valid_reject_max_clock
[08:09:09] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[08:09:09] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[08:09:09] [PASSED] drm_test_check_infoframes
[08:09:09] [PASSED] drm_test_check_reject_avi_infoframe
[08:09:09] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[08:09:09] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[08:09:09] [PASSED] drm_test_check_reject_audio_infoframe
[08:09:09] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[08:09:09] ================= drm_managed (2 subtests) =================
[08:09:09] [PASSED] drm_test_managed_release_action
[08:09:09] [PASSED] drm_test_managed_run_action
[08:09:09] =================== [PASSED] drm_managed ===================
[08:09:09] =================== drm_mm (6 subtests) ====================
[08:09:09] [PASSED] drm_test_mm_init
[08:09:09] [PASSED] drm_test_mm_debug
[08:09:09] [PASSED] drm_test_mm_align32
[08:09:09] [PASSED] drm_test_mm_align64
[08:09:09] [PASSED] drm_test_mm_lowest
[08:09:09] [PASSED] drm_test_mm_highest
[08:09:09] ===================== [PASSED] drm_mm ======================
[08:09:09] ============= drm_modes_analog_tv (5 subtests) =============
[08:09:09] [PASSED] drm_test_modes_analog_tv_mono_576i
[08:09:09] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[08:09:09] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[08:09:09] [PASSED] drm_test_modes_analog_tv_pal_576i
[08:09:09] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[08:09:09] =============== [PASSED] drm_modes_analog_tv ===============
[08:09:09] ============== drm_plane_helper (2 subtests) ===============
[08:09:09] =============== drm_test_check_plane_state  ================
[08:09:09] [PASSED] clipping_simple
[08:09:09] [PASSED] clipping_rotate_reflect
[08:09:09] [PASSED] positioning_simple
[08:09:09] [PASSED] upscaling
[08:09:09] [PASSED] downscaling
[08:09:09] [PASSED] rounding1
[08:09:09] [PASSED] rounding2
[08:09:09] [PASSED] rounding3
[08:09:09] [PASSED] rounding4
[08:09:09] =========== [PASSED] drm_test_check_plane_state ============
[08:09:09] =========== drm_test_check_invalid_plane_state  ============
[08:09:09] [PASSED] positioning_invalid
[08:09:09] [PASSED] upscaling_invalid
[08:09:09] [PASSED] downscaling_invalid
[08:09:09] ======= [PASSED] drm_test_check_invalid_plane_state ========
[08:09:09] ================ [PASSED] drm_plane_helper =================
[08:09:09] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[08:09:09] ====== drm_test_connector_helper_tv_get_modes_check  =======
[08:09:09] [PASSED] None
[08:09:09] [PASSED] PAL
[08:09:09] [PASSED] NTSC
[08:09:09] [PASSED] Both, NTSC Default
[08:09:09] [PASSED] Both, PAL Default
[08:09:09] [PASSED] Both, NTSC Default, with PAL on command-line
[08:09:09] [PASSED] Both, PAL Default, with NTSC on command-line
[08:09:09] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[08:09:09] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[08:09:09] ================== drm_rect (9 subtests) ===================
[08:09:09] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[08:09:09] [PASSED] drm_test_rect_clip_scaled_not_clipped
[08:09:09] [PASSED] drm_test_rect_clip_scaled_clipped
[08:09:09] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[08:09:09] ================= drm_test_rect_intersect  =================
[08:09:09] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[08:09:09] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[08:09:09] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[08:09:09] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[08:09:09] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[08:09:09] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[08:09:09] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[08:09:09] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[08:09:09] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[08:09:09] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[08:09:09] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[08:09:09] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[08:09:09] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[08:09:09] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[08:09:09] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
stty: 'standard input': Inappropriate ioctl for device
[08:09:09] ============= [PASSED] drm_test_rect_intersect =============
[08:09:09] ================ drm_test_rect_calc_hscale  ================
[08:09:09] [PASSED] normal use
[08:09:09] [PASSED] out of max range
[08:09:09] [PASSED] out of min range
[08:09:09] [PASSED] zero dst
[08:09:09] [PASSED] negative src
[08:09:09] [PASSED] negative dst
[08:09:09] ============ [PASSED] drm_test_rect_calc_hscale ============
[08:09:09] ================ drm_test_rect_calc_vscale  ================
[08:09:09] [PASSED] normal use
[08:09:09] [PASSED] out of max range
[08:09:09] [PASSED] out of min range
[08:09:09] [PASSED] zero dst
[08:09:09] [PASSED] negative src
[08:09:09] [PASSED] negative dst
[08:09:09] ============ [PASSED] drm_test_rect_calc_vscale ============
[08:09:09] ================== drm_test_rect_rotate  ===================
[08:09:09] [PASSED] reflect-x
[08:09:09] [PASSED] reflect-y
[08:09:09] [PASSED] rotate-0
[08:09:09] [PASSED] rotate-90
[08:09:09] [PASSED] rotate-180
[08:09:09] [PASSED] rotate-270
[08:09:09] ============== [PASSED] drm_test_rect_rotate ===============
[08:09:09] ================ drm_test_rect_rotate_inv  =================
[08:09:09] [PASSED] reflect-x
[08:09:09] [PASSED] reflect-y
[08:09:09] [PASSED] rotate-0
[08:09:09] [PASSED] rotate-90
[08:09:09] [PASSED] rotate-180
[08:09:09] [PASSED] rotate-270
[08:09:09] ============ [PASSED] drm_test_rect_rotate_inv =============
[08:09:09] ==================== [PASSED] drm_rect =====================
[08:09:09] ============ drm_sysfb_modeset_test (1 subtest) ============
[08:09:09] ============ drm_test_sysfb_build_fourcc_list  =============
[08:09:09] [PASSED] no native formats
[08:09:09] [PASSED] XRGB8888 as native format
[08:09:09] [PASSED] remove duplicates
[08:09:09] [PASSED] convert alpha formats
[08:09:09] [PASSED] random formats
[08:09:09] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[08:09:09] ============= [PASSED] drm_sysfb_modeset_test ==============
[08:09:09] ================== drm_fixp (2 subtests) ===================
[08:09:09] [PASSED] drm_test_int2fixp
[08:09:09] [PASSED] drm_test_sm2fixp
[08:09:09] ==================== [PASSED] drm_fixp =====================
[08:09:09] ============================================================
[08:09:09] Testing complete. Ran 630 tests: passed: 630
[08:09:10] Elapsed time: 27.373s total, 1.663s configuring, 25.291s building, 0.387s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[08:09:10] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:09:11] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:09:21] Starting KUnit Kernel (1/1)...
[08:09:21] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:09:21] ================= ttm_device (5 subtests) ==================
[08:09:21] [PASSED] ttm_device_init_basic
[08:09:21] [PASSED] ttm_device_init_multiple
[08:09:21] [PASSED] ttm_device_fini_basic
[08:09:21] [PASSED] ttm_device_init_no_vma_man
[08:09:21] ================== ttm_device_init_pools  ==================
[08:09:21] [PASSED] No DMA allocations, no DMA32 required
[08:09:21] [PASSED] DMA allocations, DMA32 required
[08:09:21] [PASSED] No DMA allocations, DMA32 required
[08:09:21] [PASSED] DMA allocations, no DMA32 required
[08:09:21] ============== [PASSED] ttm_device_init_pools ==============
[08:09:21] =================== [PASSED] ttm_device ====================
[08:09:21] ================== ttm_pool (8 subtests) ===================
[08:09:21] ================== ttm_pool_alloc_basic  ===================
[08:09:21] [PASSED] One page
[08:09:21] [PASSED] More than one page
[08:09:21] [PASSED] Above the allocation limit
[08:09:21] [PASSED] One page, with coherent DMA mappings enabled
[08:09:21] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:09:21] ============== [PASSED] ttm_pool_alloc_basic ===============
[08:09:21] ============== ttm_pool_alloc_basic_dma_addr  ==============
[08:09:21] [PASSED] One page
[08:09:21] [PASSED] More than one page
[08:09:21] [PASSED] Above the allocation limit
[08:09:21] [PASSED] One page, with coherent DMA mappings enabled
[08:09:21] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:09:21] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[08:09:21] [PASSED] ttm_pool_alloc_order_caching_match
[08:09:21] [PASSED] ttm_pool_alloc_caching_mismatch
[08:09:21] [PASSED] ttm_pool_alloc_order_mismatch
[08:09:21] [PASSED] ttm_pool_free_dma_alloc
[08:09:21] [PASSED] ttm_pool_free_no_dma_alloc
[08:09:21] [PASSED] ttm_pool_fini_basic
[08:09:21] ==================== [PASSED] ttm_pool =====================
[08:09:21] ================ ttm_resource (8 subtests) =================
[08:09:21] ================= ttm_resource_init_basic  =================
[08:09:21] [PASSED] Init resource in TTM_PL_SYSTEM
[08:09:21] [PASSED] Init resource in TTM_PL_VRAM
[08:09:21] [PASSED] Init resource in a private placement
[08:09:21] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[08:09:21] ============= [PASSED] ttm_resource_init_basic =============
[08:09:21] [PASSED] ttm_resource_init_pinned
[08:09:21] [PASSED] ttm_resource_fini_basic
[08:09:21] [PASSED] ttm_resource_manager_init_basic
[08:09:21] [PASSED] ttm_resource_manager_usage_basic
[08:09:21] [PASSED] ttm_resource_manager_set_used_basic
[08:09:21] [PASSED] ttm_sys_man_alloc_basic
[08:09:21] [PASSED] ttm_sys_man_free_basic
[08:09:21] ================== [PASSED] ttm_resource ===================
[08:09:21] =================== ttm_tt (15 subtests) ===================
[08:09:21] ==================== ttm_tt_init_basic  ====================
[08:09:21] [PASSED] Page-aligned size
[08:09:21] [PASSED] Extra pages requested
[08:09:21] ================ [PASSED] ttm_tt_init_basic ================
[08:09:21] [PASSED] ttm_tt_init_misaligned
[08:09:21] [PASSED] ttm_tt_fini_basic
[08:09:21] [PASSED] ttm_tt_fini_sg
[08:09:21] [PASSED] ttm_tt_fini_shmem
[08:09:21] [PASSED] ttm_tt_create_basic
[08:09:21] [PASSED] ttm_tt_create_invalid_bo_type
[08:09:21] [PASSED] ttm_tt_create_ttm_exists
[08:09:21] [PASSED] ttm_tt_create_failed
[08:09:21] [PASSED] ttm_tt_destroy_basic
[08:09:21] [PASSED] ttm_tt_populate_null_ttm
[08:09:21] [PASSED] ttm_tt_populate_populated_ttm
[08:09:21] [PASSED] ttm_tt_unpopulate_basic
[08:09:21] [PASSED] ttm_tt_unpopulate_empty_ttm
[08:09:21] [PASSED] ttm_tt_swapin_basic
[08:09:21] ===================== [PASSED] ttm_tt ======================
[08:09:21] =================== ttm_bo (14 subtests) ===================
[08:09:21] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[08:09:21] [PASSED] Cannot be interrupted and sleeps
[08:09:21] [PASSED] Cannot be interrupted, locks straight away
[08:09:21] [PASSED] Can be interrupted, sleeps
[08:09:21] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[08:09:21] [PASSED] ttm_bo_reserve_locked_no_sleep
[08:09:21] [PASSED] ttm_bo_reserve_no_wait_ticket
[08:09:21] [PASSED] ttm_bo_reserve_double_resv
[08:09:21] [PASSED] ttm_bo_reserve_interrupted
[08:09:21] [PASSED] ttm_bo_reserve_deadlock
[08:09:21] [PASSED] ttm_bo_unreserve_basic
[08:09:21] [PASSED] ttm_bo_unreserve_pinned
[08:09:21] [PASSED] ttm_bo_unreserve_bulk
[08:09:21] [PASSED] ttm_bo_fini_basic
[08:09:21] [PASSED] ttm_bo_fini_shared_resv
[08:09:21] [PASSED] ttm_bo_pin_basic
[08:09:21] [PASSED] ttm_bo_pin_unpin_resource
[08:09:21] [PASSED] ttm_bo_multiple_pin_one_unpin
[08:09:21] ===================== [PASSED] ttm_bo ======================
[08:09:21] ============== ttm_bo_validate (21 subtests) ===============
[08:09:21] ============== ttm_bo_init_reserved_sys_man  ===============
[08:09:21] [PASSED] Buffer object for userspace
[08:09:21] [PASSED] Kernel buffer object
[08:09:21] [PASSED] Shared buffer object
[08:09:21] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[08:09:21] ============== ttm_bo_init_reserved_mock_man  ==============
[08:09:21] [PASSED] Buffer object for userspace
[08:09:21] [PASSED] Kernel buffer object
[08:09:21] [PASSED] Shared buffer object
[08:09:21] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[08:09:21] [PASSED] ttm_bo_init_reserved_resv
[08:09:21] ================== ttm_bo_validate_basic  ==================
[08:09:21] [PASSED] Buffer object for userspace
[08:09:21] [PASSED] Kernel buffer object
[08:09:21] [PASSED] Shared buffer object
[08:09:21] ============== [PASSED] ttm_bo_validate_basic ==============
[08:09:21] [PASSED] ttm_bo_validate_invalid_placement
[08:09:21] ============= ttm_bo_validate_same_placement  ==============
[08:09:21] [PASSED] System manager
[08:09:21] [PASSED] VRAM manager
[08:09:21] ========= [PASSED] ttm_bo_validate_same_placement ==========
[08:09:21] [PASSED] ttm_bo_validate_failed_alloc
[08:09:21] [PASSED] ttm_bo_validate_pinned
[08:09:21] [PASSED] ttm_bo_validate_busy_placement
[08:09:21] ================ ttm_bo_validate_multihop  =================
[08:09:21] [PASSED] Buffer object for userspace
[08:09:21] [PASSED] Kernel buffer object
[08:09:21] [PASSED] Shared buffer object
[08:09:21] ============ [PASSED] ttm_bo_validate_multihop =============
[08:09:21] ========== ttm_bo_validate_no_placement_signaled  ==========
[08:09:21] [PASSED] Buffer object in system domain, no page vector
[08:09:21] [PASSED] Buffer object in system domain with an existing page vector
[08:09:21] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[08:09:21] ======== ttm_bo_validate_no_placement_not_signaled  ========
[08:09:21] [PASSED] Buffer object for userspace
[08:09:21] [PASSED] Kernel buffer object
[08:09:21] [PASSED] Shared buffer object
[08:09:21] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[08:09:21] [PASSED] ttm_bo_validate_move_fence_signaled
[08:09:21] ========= ttm_bo_validate_move_fence_not_signaled  =========
[08:09:21] [PASSED] Waits for GPU
[08:09:21] [PASSED] Tries to lock straight away
[08:09:21] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[08:09:21] [PASSED] ttm_bo_validate_happy_evict
[08:09:21] [PASSED] ttm_bo_validate_all_pinned_evict
[08:09:21] [PASSED] ttm_bo_validate_allowed_only_evict
[08:09:21] [PASSED] ttm_bo_validate_deleted_evict
[08:09:21] [PASSED] ttm_bo_validate_busy_domain_evict
[08:09:21] [PASSED] ttm_bo_validate_evict_gutting
[08:09:21] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[08:09:21] ================= [PASSED] ttm_bo_validate =================
[08:09:21] ============================================================
[08:09:21] Testing complete. Ran 101 tests: passed: 101
[08:09:21] Elapsed time: 11.424s total, 1.676s configuring, 9.532s building, 0.188s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ CI.checksparse: warning for Use trans push mechanism to generate frame change event (rev10)

[Patchwork]

== Series Details ==

Series: Use trans push mechanism to generate frame change event (rev10)
URL   : https://patchwork.freedesktop.org/series/139831/
State : warning

== Summary ==

+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 6d7af7c5b6b121d5595b64be7dfcbf33be53287b
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
+drivers/gpu/drm/i915/display/g4x_dp.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/g4x_hdmi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/hsw_ips.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/i9xx_plane.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/i9xx_wm.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/icl_dsi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_dsi.h):
+drivers/gpu/drm/i915/display/intel_acpi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_alpm.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_atomic.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_audio.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_backlight.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_bios.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_bw.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_casf.c:153:21: error: too long token expansion
+drivers/gpu/drm/i915/display/intel_casf.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_cdclk.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_color.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_color_pipeline.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_combo_phy.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_connector.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_crtc.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_crt.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_crtc_state_dump.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_cursor.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_cx0_phy.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dbuf_bw.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_ddi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_debugfs.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_device.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_driver.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_irq.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_display_power.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_power_map.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_power_well.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_reset.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_rps.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dmc.c:131:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:134:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:137:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:140:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:143:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:146:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:149:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:153:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:154:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:157:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:160:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:163:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:166:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:170:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:174:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:178:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:182:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:186:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp_aux.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp_hdcp.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dpio_phy.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp_link_training.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dpll.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dpll_mgr.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp_mst.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dpt.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dpt_common.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp_test.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_drrs.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dsb.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dsi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_dsi.h):
+drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dsi_vbt.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dvo.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_encoder.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_fb_bo.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_fbc.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_fb.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_fb_pin.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_fdi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_fifo_underrun.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_flipq.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_frontbuffer.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_global_state.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_gmbus.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_hdcp.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_hdmi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_hotplug.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_hotplug_irq.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_initial_plane.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_link_bw.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_load_detect.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_lspcon.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_lt_phy.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_lvds.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_modeset_setup.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_modeset_verify.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_opregion.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_overlay.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_panel.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_pch_display.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_pch_refclk.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_pfit.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_pipe_crc.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_plane.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_pmdemand.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_pps.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_quirks.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_sdvo.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_snps_phy.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_sprite.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_sprite_uapi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_tc.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_tv.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_vblank.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_vdsc.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_vga.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_wm.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/skl_prefill.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/skl_scaler.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/skl_universal_plane.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/skl_watermark.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/vlv_clock.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/vlv_dsi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/vlv_dsi_pll.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/vlv_sideband.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/intel_uncore.c:1930:1: warning: context imbalance in 'fwtable_read8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1931:1: warning: context imbalance in 'fwtable_read16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1932:1: warning: context imbalance in 'fwtable_read32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1933:1: warning: context imbalance in 'fwtable_read64' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1998:1: warning: context imbalance in 'gen6_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1999:1: warning: context imbalance in 'gen6_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2000:1: warning: context imbalance in 'gen6_write32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2020:1: warning: context imbalance in 'fwtable_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2021:1: warning: context imbalance in 'fwtable_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2022:1: warning: context imbalance in 'fwtable_write32' - unexpected unlock
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Use trans push mechanism to generate frame change event (rev10)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 891 bytes --]

== Series Details ==

Series: Use trans push mechanism to generate frame change event (rev10)
URL   : https://patchwork.freedesktop.org/series/139831/
State : success

== Summary ==

CI Bug Log - changes from xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b_BAT -> xe-pw-139831v10_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (12 -> 12)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b -> xe-pw-139831v10

  IGT_8716: 8716
  xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b: 6d7af7c5b6b121d5595b64be7dfcbf33be53287b
  xe-pw-139831v10: 139831v10

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/index.html

[-- Attachment #2: Type: text/html, Size: 1440 bytes --]

✗ Xe.CI.Full: failure for Use trans push mechanism to generate frame change event (rev10)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 31138 bytes --]

== Series Details ==

Series: Use trans push mechanism to generate frame change event (rev10)
URL   : https://patchwork.freedesktop.org/series/139831/
State : failure

== Summary ==

CI Bug Log - changes from xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b_FULL -> xe-pw-139831v10_FULL
====================================================

Summary
-------

  **WARNING**

  Minor unknown changes coming with xe-pw-139831v10_FULL need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-139831v10_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-139831v10_FULL:

### IGT changes ###

#### Warnings ####

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-rebind:
    - shard-bmg:          [SKIP][1] ([Intel XE#7136]) -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-3/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-rebind.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-2/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-rebind.html

  
Known issues
------------

  Here are the changes found in xe-pw-139831v10_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_async_flips@async-flip-with-page-flip-events-linear:
    - shard-lnl:          [PASS][3] -> [FAIL][4] ([Intel XE#5993]) +3 other tests fail
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-1/igt@kms_async_flips@async-flip-with-page-flip-events-linear.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-lnl-8/igt@kms_async_flips@async-flip-with-page-flip-events-linear.html

  * igt@kms_big_fb@linear-8bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#2327]) +1 other test skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_big_fb@linear-8bpp-rotate-90.html

  * igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#7059])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-10/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#1124]) +2 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2314] / [Intel XE#2894])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p.html

  * igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#2887]) +3 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#3432])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_cdclk@mode-transition:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#2724])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_cdclk@mode-transition.html

  * igt@kms_chamelium_hpd@hdmi-hpd-enable-disable-mode:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2252]) +3 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_chamelium_hpd@hdmi-hpd-enable-disable-mode.html

  * igt@kms_content_protection@legacy:
    - shard-bmg:          NOTRUN -> [FAIL][13] ([Intel XE#1178] / [Intel XE#3304]) +1 other test fail
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_content_protection@legacy.html

  * igt@kms_cursor_crc@cursor-offscreen-512x512:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#2321])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_cursor_crc@cursor-offscreen-512x512.html

  * igt@kms_cursor_crc@cursor-random-256x85:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#2320]) +1 other test skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-10/igt@kms_cursor_crc@cursor-random-256x85.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [PASS][16] -> [FAIL][17] ([Intel XE#4633])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-9/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-bmg:          [PASS][18] -> [FAIL][19] ([Intel XE#5299])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-4/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2286])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#4422])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
    - shard-bmg:          [PASS][22] -> [FAIL][23] ([Intel XE#7030]) +1 other test fail
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#2293] / [Intel XE#2380]) +2 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#2293]) +2 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#4141]) +4 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#2311]) +14 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#7061]) +3 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-rte:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#2313]) +11 other tests skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-rte.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#6901])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-10/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#2486])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_pipe_stress@stress-xrgb8888-yftiled:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#6912])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#5021])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#1406] / [Intel XE#1489]) +2 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb.html

  * igt@kms_psr@pr-primary-render:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +5 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-10/igt@kms_psr@pr-primary-render.html

  * igt@kms_psr@psr2-primary-render:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#1406] / [Intel XE#2234])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_psr@psr2-primary-render.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#1406] / [Intel XE#2414])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#3414] / [Intel XE#3904])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html

  * igt@kms_scaling_modes@scaling-mode-center:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#2413])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-1/igt@kms_scaling_modes@scaling-mode-center.html

  * igt@kms_sharpness_filter@invalid-filter-with-scaling-mode:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#6503])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_sharpness_filter@invalid-filter-with-scaling-mode.html

  * igt@xe_create@multigpu-create-massive-size:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#2504])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-10/igt@xe_create@multigpu-create-massive-size.html

  * igt@xe_eudebug@vm-bind-clear:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#4837]) +1 other test skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@xe_eudebug@vm-bind-clear.html

  * igt@xe_eudebug_online@pagefault-write-stress:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#6665] / [Intel XE#6681])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@xe_eudebug_online@pagefault-write-stress.html

  * igt@xe_eudebug_online@writes-caching-sram-bb-sram-target-sram:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#4837] / [Intel XE#6665])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-10/igt@xe_eudebug_online@writes-caching-sram-bb-sram-target-sram.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#2322]) +7 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-4/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate.html

  * igt@xe_exec_fault_mode@once-multi-queue-userptr-invalidate-race-imm:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#7136]) +6 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-10/igt@xe_exec_fault_mode@once-multi-queue-userptr-invalidate-race-imm.html

  * igt@xe_exec_fault_mode@twice-userptr-invalidate-race-prefetch:
    - shard-bmg:          [PASS][47] -> [SKIP][48] ([Intel XE#6703]) +23 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-3/igt@xe_exec_fault_mode@twice-userptr-invalidate-race-prefetch.html
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-2/igt@xe_exec_fault_mode@twice-userptr-invalidate-race-prefetch.html

  * igt@xe_exec_multi_queue@max-queues-basic:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#6874]) +8 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@xe_exec_multi_queue@max-queues-basic.html

  * igt@xe_exec_system_allocator@many-64k-mmap-huge:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#5007])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@xe_exec_system_allocator@many-64k-mmap-huge.html

  * igt@xe_exec_system_allocator@many-execqueues-mmap-huge-nomemset:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#4943]) +6 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@xe_exec_system_allocator@many-execqueues-mmap-huge-nomemset.html

  * igt@xe_exec_system_allocator@threads-many-stride-mmap-remap-ro:
    - shard-bmg:          [PASS][52] -> [ABORT][53] ([Intel XE#5545])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-2/igt@xe_exec_system_allocator@threads-many-stride-mmap-remap-ro.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-2/igt@xe_exec_system_allocator@threads-many-stride-mmap-remap-ro.html

  * igt@xe_exec_threads@threads-multi-queue-hang-fd-userptr-invalidate-race:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#7138]) +5 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-1/igt@xe_exec_threads@threads-multi-queue-hang-fd-userptr-invalidate-race.html

  * igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#6281])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add.html

  * igt@xe_multigpu_svm@mgpu-latency-basic:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#6964]) +1 other test skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@xe_multigpu_svm@mgpu-latency-basic.html

  * igt@xe_peer2peer@write:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#2427] / [Intel XE#6953])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-1/igt@xe_peer2peer@write.html

  * igt@xe_pxp@pxp-src-to-pxp-dest-rendercopy:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#4733])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-10/igt@xe_pxp@pxp-src-to-pxp-dest-rendercopy.html

  * igt@xe_query@multigpu-query-mem-usage:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#944])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@xe_query@multigpu-query-mem-usage.html

  
#### Possible fixes ####

  * igt@kms_atomic_transition@plane-all-transition-fencing@pipe-b-dp-2:
    - shard-bmg:          [INCOMPLETE][60] -> [PASS][61] +1 other test pass
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-3/igt@kms_atomic_transition@plane-all-transition-fencing@pipe-b-dp-2.html
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-1/igt@kms_atomic_transition@plane-all-transition-fencing@pipe-b-dp-2.html

  * igt@kms_cursor_crc@cursor-sliding-256x256:
    - shard-bmg:          [FAIL][62] ([Intel XE#6747]) -> [PASS][63] +1 other test pass
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-2/igt@kms_cursor_crc@cursor-sliding-256x256.html
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-1/igt@kms_cursor_crc@cursor-sliding-256x256.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [FAIL][64] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][65] +1 other test pass
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [SKIP][66] ([Intel XE#1503]) -> [PASS][67]
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-9/igt@kms_hdr@invalid-hdr.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-7/igt@kms_hdr@invalid-hdr.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][68] ([Intel XE#6321]) -> [PASS][69]
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-9/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-4/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_exec_system_allocator@many-execqueues-new-busy-nomemset:
    - shard-bmg:          [ABORT][70] -> [PASS][71]
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-7/igt@xe_exec_system_allocator@many-execqueues-new-busy-nomemset.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-4/igt@xe_exec_system_allocator@many-execqueues-new-busy-nomemset.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma:
    - shard-lnl:          [FAIL][72] ([Intel XE#5625]) -> [PASS][73]
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-5/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-lnl-3/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html

  
#### Warnings ####

  * igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs:
    - shard-bmg:          [SKIP][74] ([Intel XE#2887]) -> [SKIP][75] ([Intel XE#6703]) +1 other test skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-3/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-2/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs.html

  * igt@kms_chamelium_color@ctm-0-75:
    - shard-bmg:          [SKIP][76] ([Intel XE#2325]) -> [SKIP][77] ([Intel XE#6703])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-3/igt@kms_chamelium_color@ctm-0-75.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-2/igt@kms_chamelium_color@ctm-0-75.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-blt:
    - shard-bmg:          [ABORT][78] -> [SKIP][79] ([Intel XE#4141])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-10/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-blt.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-render:
    - shard-bmg:          [SKIP][80] ([Intel XE#7061]) -> [SKIP][81] ([Intel XE#6703])
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-render.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-render.html

  * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-sf:
    - shard-bmg:          [SKIP][82] ([Intel XE#1406] / [Intel XE#1489]) -> [SKIP][83] ([Intel XE#1406] / [Intel XE#6703])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-3/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-sf.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-2/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-sf.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [FAIL][84] ([Intel XE#1729]) -> [SKIP][85] ([Intel XE#2426])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-10/igt@kms_tiled_display@basic-test-pattern.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern.html

  * igt@xe_eudebug@basic-vm-bind-extended-discovery:
    - shard-bmg:          [SKIP][86] ([Intel XE#4837]) -> [SKIP][87] ([Intel XE#6703])
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-3/igt@xe_eudebug@basic-vm-bind-extended-discovery.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-2/igt@xe_eudebug@basic-vm-bind-extended-discovery.html

  * igt@xe_eudebug_online@set-breakpoint-sigint-debugger:
    - shard-bmg:          [SKIP][88] ([Intel XE#4837] / [Intel XE#6665]) -> [SKIP][89] ([Intel XE#6703])
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-3/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-2/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html

  * igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-close-fd-smem:
    - shard-bmg:          [SKIP][90] ([Intel XE#6874]) -> [SKIP][91] ([Intel XE#6703]) +1 other test skip
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-3/igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-close-fd-smem.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-2/igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-close-fd-smem.html

  * igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-file:
    - shard-lnl:          [DMESG-WARN][92] ([Intel XE#4537] / [Intel XE#7063]) -> [DMESG-WARN][93] ([Intel XE#7063])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-lnl-5/igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-file.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-lnl-7/igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-file.html

  * igt@xe_exec_system_allocator@twice-large-mmap-free-huge:
    - shard-bmg:          [SKIP][94] ([Intel XE#4943]) -> [SKIP][95] ([Intel XE#6703])
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-3/igt@xe_exec_system_allocator@twice-large-mmap-free-huge.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-2/igt@xe_exec_system_allocator@twice-large-mmap-free-huge.html

  * igt@xe_exec_threads@threads-multi-queue-userptr:
    - shard-bmg:          [SKIP][96] ([Intel XE#7138]) -> [SKIP][97] ([Intel XE#6703])
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-3/igt@xe_exec_threads@threads-multi-queue-userptr.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-2/igt@xe_exec_threads@threads-multi-queue-userptr.html

  * igt@xe_pm@d3cold-multiple-execs:
    - shard-bmg:          [SKIP][98] ([Intel XE#2284]) -> [SKIP][99] ([Intel XE#6703])
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b/shard-bmg-3/igt@xe_pm@d3cold-multiple-execs.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/shard-bmg-2/igt@xe_pm@d3cold-multiple-execs.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
  [Intel XE#2414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2414
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
  [Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
  [Intel XE#2504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2504
  [Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4537]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4537
  [Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5299]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5299
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
  [Intel XE#5993]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5993
  [Intel XE#6281]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6281
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
  [Intel XE#6681]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6681
  [Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
  [Intel XE#6747]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6747
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
  [Intel XE#6912]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6912
  [Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#7030]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7030
  [Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7063]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7063
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b -> xe-pw-139831v10

  IGT_8716: 8716
  xe-4447-6d7af7c5b6b121d5595b64be7dfcbf33be53287b: 6d7af7c5b6b121d5595b64be7dfcbf33be53287b
  xe-pw-139831v10: 139831v10

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-139831v10/index.html

[-- Attachment #2: Type: text/html, Size: 35453 bytes --]

Re: [PATCH v10 04/10] drm/i915/vrr: Prepare to Use TRANS_PUSH mechanism for PSR frame change

[Nautiyal, Ankit K]

On 1/26/2026 1:29 PM, Jouni Högander wrote:
> On Lunarlake and onwards it is possible to generate PSR "frame change"
> event using TRANS_PUSH mechanism. Implement function to enable this and
> take PSR into account in intel_vrr_send_push.
>
> v7:
>    - HAS_PSR_FRAME_CHANGE macro moved to separate patch and renamed as
>      HAS_PSR_TRANS_PUSH_FRAME_CHANGE
>    - use intel_psr_use_trans_push instead of HAS_PSR_FRAME_CHANGE in
>      intel_psr_trigger_frame_change
>    - moved calling intel_vrr_psr_frame_change_enable away from this patch
> v6:
>    - add HAS_PSR_FRAME_CHANGE macro
>    - use TRANS_PUSH in instead of TRAN_VRR_CTL
> v5: use intel_psr_use_trans_push for intel_vrr_psr_frame_change_enable
> v4:
>    - use rmw when enabling/disabling transcoder
>    - set TRANS_PUSH_EN conditionally in intel_vrr_send_push
>    - do not call intel_vrr_send_push from intel_psr_trigger_frame_change
>    - do not enable using TRANS_PUSH mechanism for PSR "Frame Change"
> v3:
>    - use rmw when enabling/disabling
>    - keep LNL_TRANS_PUSH_PSR_PR_EN set always on LunarLake and onwards
> v2: use intel_vrr_trans_push_enabled_set_clear instead of rmw
>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_crtc.c |  4 +++-
>   drivers/gpu/drm/i915/display/intel_psr.c  |  8 +++++---
>   drivers/gpu/drm/i915/display/intel_vrr.c  | 14 ++++++++++++--
>   drivers/gpu/drm/i915/display/intel_vrr.h  |  1 +
>   4 files changed, 21 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
> index 778ebc5095c3..ed3c6c4ce025 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc.c
> @@ -747,7 +747,9 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
>   	 * which would cause the next frame to terminate already at vmin
>   	 * vblank start instead of vmax vblank start.
>   	 */
> -	if (!state->base.legacy_cursor_update)
> +	if (!state->base.legacy_cursor_update ||
> +	    (intel_psr_use_trans_push(new_crtc_state) &&
> +	     !new_crtc_state->vrr.enable))
>   		intel_vrr_send_push(NULL, new_crtc_state);
>   
>   	local_irq_enable();
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index b0d72c04db45..9613c50623dc 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2516,9 +2516,11 @@ void intel_psr_trigger_frame_change_event(struct intel_dsb *dsb,
>   		intel_pre_commit_crtc_state(state, crtc);
>   	struct intel_display *display = to_intel_display(crtc);
>   
> -	if (crtc_state->has_psr)
> -		intel_de_write_dsb(display, dsb,
> -				   CURSURFLIVE(display, crtc->pipe), 0);
> +	if (!crtc_state->has_psr || intel_psr_use_trans_push(crtc_state))
> +		return;
> +
> +	intel_de_write_dsb(display, dsb,
> +			   CURSURFLIVE(display, crtc->pipe), 0);
>   }
>   
>   /**
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index f26989c74268..8a072f90049f 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -698,7 +698,7 @@ void intel_vrr_send_push(struct intel_dsb *dsb,
>   	struct intel_display *display = to_intel_display(crtc_state);
>   	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>   
> -	if (!crtc_state->vrr.enable)
> +	if (!crtc_state->vrr.enable && !intel_psr_use_trans_push(crtc_state))
>   		return;
>   
>   	if (dsb)
> @@ -920,7 +920,8 @@ static void intel_vrr_tg_disable(const struct intel_crtc_state *old_crtc_state)
>   				       VRR_STATUS_VRR_EN_LIVE, 1000))
>   		drm_err(display->drm, "Timed out waiting for VRR live status to clear\n");
>   
> -	intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0);
> +	intel_de_rmw(display, TRANS_PUSH(display, cpu_transcoder),
> +		     TRANS_PUSH_EN, 0);
>   }
>   
>   void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
> @@ -973,6 +974,15 @@ void intel_vrr_transcoder_disable(const struct intel_crtc_state *old_crtc_state)
>   		intel_vrr_tg_disable(old_crtc_state);
>   }
>   
> +void intel_vrr_psr_frame_change_enable(const struct intel_crtc_state *crtc_state)


I think introduction to this helper can be a separate patch.

So in the current patch, we are essentially preparing PSR HW to hook to 
the new frame change enable based on intel_psr_use_trans_push().

IMO, the helper to enable this new functionality can be a separate thing.

Overall I agree with the changes.

Regards,

Ankit

> +{
> +	struct intel_display *display = to_intel_display(crtc_state);
> +	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +
> +	intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
> +		       trans_vrr_push(crtc_state, false));
> +}
> +
>   bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state)
>   {
>   	return crtc_state->vrr.flipline &&
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
> index bedcc8c4bff2..4f16ca4af91f 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.h
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.h
> @@ -33,6 +33,7 @@ void intel_vrr_dcb_increment_flip_count(struct intel_crtc_state *crtc_state,
>   					struct intel_crtc *crtc);
>   bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state);
>   void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state);
> +void intel_vrr_psr_frame_change_enable(const struct intel_crtc_state *crtc_state);
>   void intel_vrr_get_config(struct intel_crtc_state *crtc_state);
>   int intel_vrr_vmax_vtotal(const struct intel_crtc_state *crtc_state);
>   int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state);

Re: [PATCH v10 02/10] drm/i915/psr: Add intel_psr_use_trans_push to query if TRANS_PUSH is used

[Nautiyal, Ankit K]

On 1/26/2026 1:29 PM, Jouni Högander wrote:
> This is a preparation to start using trans push as a PSR "Frame Change"
> event. It adds intel_psr_use_trans_push placeholder which return false for
> now until we have everything in place.
>
> v2:
>    - modify commit message
>    - add TODO
>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


> ---
>   drivers/gpu/drm/i915/display/intel_psr.c | 6 ++++++
>   drivers/gpu/drm/i915/display/intel_psr.h | 1 +
>   2 files changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 62208ffc5101..b0d72c04db45 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -4562,3 +4562,9 @@ int intel_psr_min_guardband(struct intel_crtc_state *crtc_state)
>   
>   	return psr_min_guardband;
>   }
> +
> +bool intel_psr_use_trans_push(const struct intel_crtc_state *crtc_state)
> +{
> +	/* TODO: Enable using trans push when everything is in place */
> +	return false;
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
> index b41dc4d44ff2..394b641840b3 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr.h
> @@ -85,5 +85,6 @@ bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
>   void intel_psr_compute_config_late(struct intel_dp *intel_dp,
>   				   struct intel_crtc_state *crtc_state);
>   int intel_psr_min_guardband(struct intel_crtc_state *crtc_state);
> +bool intel_psr_use_trans_push(const struct intel_crtc_state *crtc_state);
>   
>   #endif /* __INTEL_PSR_H__ */

Re: [PATCH v10 03/10] drm/i915/vrr: Add helper for parsing value to be written into TRANS_PUSH

[Nautiyal, Ankit K]

On 1/26/2026 1:29 PM, Jouni Högander wrote:
> On Lunarlake and onwards it is possible to generate PSR "frame change"
> event using TRANS_PUSH mechanism. As a preparation add new helper to parse
> value to be written into TRANS_PUSH register. Setting
> LNL_TRANS_PUSH_PSR_PR_EN is done in upcoming patch.


Nitpick : As I have learnt, when the series/patches are merged these 
will no longer be patches, but become commits.

So we should avoid referring to them as patches. Perhaps we can use 
'change' instead of 'patch' here.

In any case the change looks good to me.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_vrr.c | 22 +++++++++++++++++++---
>   1 file changed, 19 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index db74744ddb31..f26989c74268 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -676,6 +676,22 @@ intel_vrr_dcb_reset(const struct intel_crtc_state *old_crtc_state,
>   	intel_de_write(display, PIPEDMC_DCB_BALANCE_RESET(pipe), 0);
>   }
>   
> +static u32 trans_vrr_push(const struct intel_crtc_state *crtc_state,
> +			  bool send_push)
> +{
> +	struct intel_display *display = to_intel_display(crtc_state);
> +	u32 trans_vrr_push = 0;
> +
> +	if (intel_vrr_always_use_vrr_tg(display) ||
> +	    crtc_state->vrr.enable)
> +		trans_vrr_push |= TRANS_PUSH_EN;
> +
> +	if (send_push)
> +		trans_vrr_push |= TRANS_PUSH_SEND;
> +
> +	return trans_vrr_push;
> +}
> +
>   void intel_vrr_send_push(struct intel_dsb *dsb,
>   			 const struct intel_crtc_state *crtc_state)
>   {
> @@ -690,8 +706,7 @@ void intel_vrr_send_push(struct intel_dsb *dsb,
>   
>   	intel_de_write_dsb(display, dsb,
>   			   TRANS_PUSH(display, cpu_transcoder),
> -			   TRANS_PUSH_EN | TRANS_PUSH_SEND);
> -
> +			   trans_vrr_push(crtc_state, true));
>   	if (dsb)
>   		intel_dsb_nonpost_end(dsb);
>   }
> @@ -876,7 +891,8 @@ static void intel_vrr_tg_enable(const struct intel_crtc_state *crtc_state,
>   	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>   	u32 vrr_ctl;
>   
> -	intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), TRANS_PUSH_EN);
> +	intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
> +		       trans_vrr_push(crtc_state, false));
>   
>   	vrr_ctl = VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state);
>   

Re: [PATCH v10 05/10] drm/i915/dsb: Set DSB_SKIP_WAITS_EN chicken bit for LunarLake and onwards

[Nautiyal, Ankit K]

On 1/26/2026 1:29 PM, Jouni Högander wrote:
> On LunarLake we are using TRANS_PUSH mechanism to trigger "Frame Change"
> event. This way we have more control on when PSR HW is woken up. I.e. not
> every display register write is triggering sending update. This allows us
> setting DSB_SKIP_WAITS_EN chicken bit as well.
>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>


Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


> ---
>   drivers/gpu/drm/i915/display/intel_dsb.c | 15 +++++++++++----
>   1 file changed, 11 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
> index 91060e2a5762..3f083211a7ca 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -17,6 +17,7 @@
>   #include "intel_dsb.h"
>   #include "intel_dsb_buffer.h"
>   #include "intel_dsb_regs.h"
> +#include "intel_psr.h"
>   #include "intel_vblank.h"
>   #include "intel_vrr.h"
>   #include "skl_watermark.h"
> @@ -166,18 +167,24 @@ static int dsb_scanline_to_hw(struct intel_atomic_state *state,
>    * definitely do not want to skip vblank wait. We also have concern what comes
>    * to skipping vblank evasion. I.e. arming registers are latched before we have
>    * managed writing them. Due to these reasons we are not setting
> - * DSB_SKIP_WAITS_EN.
> + * DSB_SKIP_WAITS_EN except when using TRANS_PUSH mechanism to trigger
> + * "frame change" event.
>    */
>   static u32 dsb_chicken(struct intel_atomic_state *state,
>   		       struct intel_crtc *crtc)
>   {
> +	const struct intel_crtc_state *new_crtc_state =
> +		intel_atomic_get_new_crtc_state(state, crtc);
> +	u32 chicken = intel_psr_use_trans_push(new_crtc_state) ?
> +		DSB_SKIP_WAITS_EN : 0;
> +
>   	if (pre_commit_is_vrr_active(state, crtc))
> -		return DSB_CTRL_WAIT_SAFE_WINDOW |
> +		chicken |= DSB_CTRL_WAIT_SAFE_WINDOW |
>   			DSB_CTRL_NO_WAIT_VBLANK |
>   			DSB_INST_WAIT_SAFE_WINDOW |
>   			DSB_INST_NO_WAIT_VBLANK;
> -	else
> -		return 0;
> +
> +	return chicken;
>   }
>   
>   static bool assert_dsb_has_room(struct intel_dsb *dsb)

Re: [PATCH v10 06/10] drm/i915/display: Wait for vblank in case of PSR is using trans push

[Nautiyal, Ankit K]

On 1/26/2026 1:29 PM, Jouni Högander wrote:
> In case PSR uses trans push as a "frame change" event and we need to wait
> vblank after triggering PSR "frame change" event. Otherwise we may miss
> selective updates.
>
> DSB skips all waits while PSR is active. Check push send is skipped as well
> because trans push send bit is not clearn by the HW if VRR is not enabled

typo:

s/clearn/clean


> -> we may start configuring new selective update while previous is not
> complete. Avoid this by waiting for vblank after sending trans push.
>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_display.c | 20 +++++++++++++++++++-
>   1 file changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 7491e00e3858..b47c9d3d0d85 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7390,9 +7390,27 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
>   				new_crtc_state->dsb_color);
>   
>   	if (new_crtc_state->use_dsb && !intel_color_uses_chained_dsb(new_crtc_state)) {
> -		intel_dsb_wait_vblanks(new_crtc_state->dsb_commit, 1);
> +		/*
> +		 * Dsb wait vblank may or may not skip. Let's remove it for PSR
> +		 * trans push case to ensure we are not waiting two vblanks
> +		 */
> +		if (!intel_psr_use_trans_push(new_crtc_state))
> +			intel_dsb_wait_vblanks(new_crtc_state->dsb_commit, 1);
>   
>   		intel_vrr_send_push(new_crtc_state->dsb_commit, new_crtc_state);
> +
> +		/*
> +		 * In case PSR uses trans push as a "frame change" event and
> +		 * VRR is not in use we need to wait vblank. Othervise we may

typo:

s/Othervise/Otherwise


> +		 * miss selective updates. DSB skips all waits while PSR is
> +		 * active. Check push send is skipped as well because trans push
> +		 * send bit is not clearn by the HW if VRR is not enabled -> we


s/clearn/clean

With above fixed,

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

> +		 * may start configuring new selective update while previous is
> +		 * not complete.
> +		 */
> +		if (intel_psr_use_trans_push(new_crtc_state))
> +			intel_dsb_wait_vblanks(new_crtc_state->dsb_commit, 1);
> +
>   		intel_dsb_wait_for_delayed_vblank(state, new_crtc_state->dsb_commit);
>   		intel_vrr_check_push_sent(new_crtc_state->dsb_commit,
>   					  new_crtc_state);

Re: [PATCH v10 09/10] drm/i915/display: Add HAS_PSR_TRANS_PUSH_FRAME_CHANGE macro

[Nautiyal, Ankit K]

On 1/26/2026 1:29 PM, Jouni Högander wrote:
> Add macro telling platform supports triggering Frame Change event using
> Trans Push mechanism.

Perhaps :

Add a macro indicating that the platform supports triggering a Frame 
Change event for the PSR HW using the TRANS PUSH mechanism.

>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_display_device.h | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 6c74d6b0cc48..13558bc648ab 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -196,6 +196,7 @@ struct intel_display_platforms {
>   #define HAS_PSR(__display)		(DISPLAY_INFO(__display)->has_psr)
>   #define HAS_PSR_HW_TRACKING(__display)	(DISPLAY_INFO(__display)->has_psr_hw_tracking)
>   #define HAS_PSR2_SEL_FETCH(__display)	(DISPLAY_VER(__display) >= 12)
> +#define HAS_PSR_TRANS_PUSH_FRAME_CHANGE(__display)	(DISPLAY_VER(__display) >= 20)

The HAS_PSR_HW_TRACKING should be below HAS_PSR2_SEL_FETCH, but can be a 
separate patch, as not related to the series.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

>   #define HAS_SAGV(__display)		(DISPLAY_VER(__display) >= 9 && \
>   					 !(__display)->platform.broxton && !(__display)->platform.geminilake)
>   #define HAS_TRANSCODER(__display, trans)	((DISPLAY_RUNTIME_INFO(__display)->cpu_transcoder_mask & \

Re: [PATCH v10 10/10] drm/i915/psr: Use TRANS_PUSH to trigger frame change event

[Nautiyal, Ankit K]

On 1/26/2026 1:29 PM, Jouni Högander wrote:
> Now we have everything in place for triggering PSR "frame change" event
> using TRANS_PUSH: use TRANS_PUSH for LunarLake and onwards.
>
> v4:
>    - Added call to intel_vrr_psr_frame_change_enable call
>    - added setting LNL_TRANS_PUSH_PSR_PR_EN into intel_vrr_send_push
> v3: use HAS_PSR_FRAME_CHANGE macro
> v2: use AND instead of OR in intel_psr_use_trans_push
>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


> ---
>   drivers/gpu/drm/i915/display/intel_psr.c | 8 ++++++--
>   drivers/gpu/drm/i915/display/intel_vrr.c | 3 +++
>   2 files changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 9a4354c6bdda..4e644711c571 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2125,6 +2125,9 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
>   		intel_dmc_block_pkgc(display, intel_dp->psr.pipe, true);
>   
>   	intel_alpm_configure(intel_dp, crtc_state);
> +
> +	if (HAS_PSR_TRANS_PUSH_FRAME_CHANGE(display))
> +		intel_vrr_psr_frame_change_enable(crtc_state);
>   }
>   
>   static bool psr_interrupt_error_check(struct intel_dp *intel_dp)
> @@ -4569,6 +4572,7 @@ int intel_psr_min_guardband(struct intel_crtc_state *crtc_state)
>   
>   bool intel_psr_use_trans_push(const struct intel_crtc_state *crtc_state)
>   {
> -	/* TODO: Enable using trans push when everything is in place */
> -	return false;
> +	struct intel_display *display = to_intel_display(crtc_state);
> +
> +	return HAS_PSR_TRANS_PUSH_FRAME_CHANGE(display) && crtc_state->has_psr;
>   }
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 8a072f90049f..9d814cc2d608 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -689,6 +689,9 @@ static u32 trans_vrr_push(const struct intel_crtc_state *crtc_state,
>   	if (send_push)
>   		trans_vrr_push |= TRANS_PUSH_SEND;
>   
> +	if (HAS_PSR_TRANS_PUSH_FRAME_CHANGE(display))
> +		trans_vrr_push |= LNL_TRANS_PUSH_PSR_PR_EN;
> +
>   	return trans_vrr_push;
>   }
>