From: Varun Gupta <varun.gupta@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: matthew.brost@intel.com, matthew.d.roper@intel.com,
priyanka.dandamudi@intel.com, himal.prasad.ghimiray@intel.com
Subject: [PATCH v2 0/2] drm/xe: Add prefetch pagefault support for Xe3p
Date: Tue, 27 Jan 2026 17:27:11 +0530 [thread overview]
Message-ID: <20260127115713.869000-1-varun.gupta@intel.com> (raw)
Xe3p hardware prefetches memory ranges and notifies software via an
additional bit (bit 11) in the page fault descriptor that the fault
was caused by prefetch.
Patch 1 renames xe_pagefault_print to xe_pagefault_error_account and
adds an err parameter to prepare for prefetch error handling.
Patch 2 implements the prefetch support by extracting the prefetch bit
from the fault descriptor and echoing it in the response (bit 6) only
when handling fails. This prevents CAT errors for prefetch faults.
Stats are incremented for prefetch errors without verbose logging to
avoid log spam.
Based on original patches by Brian Welty and Priyanka Dandamudi.
v2: Clarified first commit message to describe only the changes made
in that commit.
Changed comment wording from "repairs" to "handling" for clarity.
(Matt Roper)
Varun Gupta (2):
drm/xe: Rename xe_pagefault_print to xe_pagefault_error_account
drm/xe: Add prefetch fault support for Xe3p
drivers/gpu/drm/xe/xe_gt_stats.c | 1 +
drivers/gpu/drm/xe/xe_gt_stats_types.h | 1 +
drivers/gpu/drm/xe/xe_guc_fwif.h | 5 +++--
drivers/gpu/drm/xe/xe_guc_pagefault.c | 2 ++
drivers/gpu/drm/xe/xe_pagefault.c | 16 ++++++++++++++--
drivers/gpu/drm/xe/xe_pagefault_types.h | 8 +++++++-
6 files changed, 28 insertions(+), 5 deletions(-)
--
2.43.0
next reply other threads:[~2026-01-27 11:57 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-27 11:57 Varun Gupta [this message]
2026-01-27 11:57 ` [PATCH v2 1/2] drm/xe: Rename xe_pagefault_print to xe_pagefault_error_account Varun Gupta
2026-01-27 20:32 ` Matthew Brost
2026-01-27 11:57 ` [PATCH v2 2/2] drm/xe: Add prefetch fault support for Xe3p Varun Gupta
2026-01-27 20:31 ` Matthew Brost
2026-01-27 20:47 ` Matthew Brost
2026-01-28 9:53 ` ✗ CI.checkpatch: warning for drm/xe: Add prefetch pagefault support for Xe3p (rev2) Patchwork
2026-01-28 9:55 ` ✓ CI.KUnit: success " Patchwork
2026-01-28 10:43 ` ✓ Xe.CI.BAT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260127115713.869000-1-varun.gupta@intel.com \
--to=varun.gupta@intel.com \
--cc=himal.prasad.ghimiray@intel.com \
--cc=intel-xe@lists.freedesktop.org \
--cc=matthew.brost@intel.com \
--cc=matthew.d.roper@intel.com \
--cc=priyanka.dandamudi@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox