* [PATCH v3 0/2] drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset
@ 2026-01-28 11:51 Sk Anirban
2026-01-28 11:51 ` [PATCH v3 1/2] drm/xe/rtp: Extend support for max rules/actions per entry Sk Anirban
` (4 more replies)
0 siblings, 5 replies; 8+ messages in thread
From: Sk Anirban @ 2026-01-28 11:51 UTC (permalink / raw)
To: intel-xe
Cc: anshuman.gupta, badal.nilawar, riana.tauro, karthik.poosa,
raag.jadav, soham.purkait, mallesh.koujalagi, vinay.belgaumkar,
daniele.ceraolospurio, nishanth.p.reddy, rodrigo.vivi,
matthew.d.roper, Sk Anirban
Prevent GuC firmware DMA failures during GuC-only reset by disabling
idle flow and verifying SRAM handling completion. Without this, reset
can be issued while SRAM handler is copying WOPCM to SRAM,
causing GuC HW to get stuck.
v2: Modify error message (Badal)
Rename reg bit name (Daniele)
Update WA skip condition (Daniele)
Update SRAM handling logic (Daniele)
v3: Reorder WA call (Badal)
Wait for GuC ready status (Daniele)
Sk Anirban (2):
drm/xe/rtp: Extend support for max rules/actions per entry
drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset
drivers/gpu/drm/xe/regs/xe_guc_regs.h | 8 ++++++
drivers/gpu/drm/xe/xe_guc.c | 37 +++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_rtp.h | 4 +--
drivers/gpu/drm/xe/xe_rtp_helpers.h | 3 +++
drivers/gpu/drm/xe/xe_wa_oob.rules | 9 +++++++
5 files changed, 59 insertions(+), 2 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v3 1/2] drm/xe/rtp: Extend support for max rules/actions per entry
2026-01-28 11:51 [PATCH v3 0/2] drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset Sk Anirban
@ 2026-01-28 11:51 ` Sk Anirban
2026-01-28 11:51 ` [PATCH v3 2/2] drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset Sk Anirban
` (3 subsequent siblings)
4 siblings, 0 replies; 8+ messages in thread
From: Sk Anirban @ 2026-01-28 11:51 UTC (permalink / raw)
To: intel-xe
Cc: anshuman.gupta, badal.nilawar, riana.tauro, karthik.poosa,
raag.jadav, soham.purkait, mallesh.koujalagi, vinay.belgaumkar,
daniele.ceraolospurio, nishanth.p.reddy, rodrigo.vivi,
matthew.d.roper, Sk Anirban
Increase XE_RTP_PASTE macro coverage to 15 arguments
to support workarounds with many platform-specific conditions.
Signed-off-by: Sk Anirban <sk.anirban@intel.com>
---
drivers/gpu/drm/xe/xe_rtp.h | 4 ++--
drivers/gpu/drm/xe/xe_rtp_helpers.h | 3 +++
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_rtp.h b/drivers/gpu/drm/xe/xe_rtp.h
index ba5f940c0a96..072dedc4ebf2 100644
--- a/drivers/gpu/drm/xe/xe_rtp.h
+++ b/drivers/gpu/drm/xe/xe_rtp.h
@@ -374,7 +374,7 @@ struct xe_reg_sr;
* XE_RTP_RULES - Helper to set multiple rules to a struct xe_rtp_entry_sr entry
* @...: Rules
*
- * At least one rule is needed and up to 12 are supported. Multiple rules are
+ * At least one rule is needed and up to 15 are supported. Multiple rules are
* AND'ed together, i.e. all the rules must evaluate to true for the entry to
* be processed. See XE_RTP_MATCH_* for the possible match rules. Example:
*
@@ -399,7 +399,7 @@ struct xe_reg_sr;
* XE_RTP_ACTIONS - Helper to set multiple actions to a struct xe_rtp_entry_sr
* @...: Actions to be taken
*
- * At least one action is needed and up to 12 are supported. See XE_RTP_ACTION_*
+ * At least one action is needed and up to 15 are supported. See XE_RTP_ACTION_*
* for the possible actions. Example:
*
* .. code-block:: c
diff --git a/drivers/gpu/drm/xe/xe_rtp_helpers.h b/drivers/gpu/drm/xe/xe_rtp_helpers.h
index a33b0ae98bbc..2de0274bac04 100644
--- a/drivers/gpu/drm/xe/xe_rtp_helpers.h
+++ b/drivers/gpu/drm/xe/xe_rtp_helpers.h
@@ -66,6 +66,9 @@
#define XE_RTP_PASTE_10(prefix_, sep_, args_) _XE_RTP_CONCAT(prefix_, FIRST_ARG args_) __XE_RTP_PASTE_SEP_ ## sep_ XE_RTP_PASTE_9(prefix_, sep_, _XE_TUPLE_TAIL args_)
#define XE_RTP_PASTE_11(prefix_, sep_, args_) _XE_RTP_CONCAT(prefix_, FIRST_ARG args_) __XE_RTP_PASTE_SEP_ ## sep_ XE_RTP_PASTE_10(prefix_, sep_, _XE_TUPLE_TAIL args_)
#define XE_RTP_PASTE_12(prefix_, sep_, args_) _XE_RTP_CONCAT(prefix_, FIRST_ARG args_) __XE_RTP_PASTE_SEP_ ## sep_ XE_RTP_PASTE_11(prefix_, sep_, _XE_TUPLE_TAIL args_)
+#define XE_RTP_PASTE_13(prefix_, sep_, args_) _XE_RTP_CONCAT(prefix_, FIRST_ARG args_) __XE_RTP_PASTE_SEP_ ## sep_ XE_RTP_PASTE_12(prefix_, sep_, _XE_TUPLE_TAIL args_)
+#define XE_RTP_PASTE_14(prefix_, sep_, args_) _XE_RTP_CONCAT(prefix_, FIRST_ARG args_) __XE_RTP_PASTE_SEP_ ## sep_ XE_RTP_PASTE_13(prefix_, sep_, _XE_TUPLE_TAIL args_)
+#define XE_RTP_PASTE_15(prefix_, sep_, args_) _XE_RTP_CONCAT(prefix_, FIRST_ARG args_) __XE_RTP_PASTE_SEP_ ## sep_ XE_RTP_PASTE_14(prefix_, sep_, _XE_TUPLE_TAIL args_)
/*
* XE_RTP_DROP_CAST - Drop cast to convert a compound statement to a initializer
--
2.43.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v3 2/2] drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset
2026-01-28 11:51 [PATCH v3 0/2] drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset Sk Anirban
2026-01-28 11:51 ` [PATCH v3 1/2] drm/xe/rtp: Extend support for max rules/actions per entry Sk Anirban
@ 2026-01-28 11:51 ` Sk Anirban
2026-01-29 0:58 ` Daniele Ceraolo Spurio
2026-01-28 18:09 ` ✗ CI.checkpatch: warning for drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset (rev3) Patchwork
` (2 subsequent siblings)
4 siblings, 1 reply; 8+ messages in thread
From: Sk Anirban @ 2026-01-28 11:51 UTC (permalink / raw)
To: intel-xe
Cc: anshuman.gupta, badal.nilawar, riana.tauro, karthik.poosa,
raag.jadav, soham.purkait, mallesh.koujalagi, vinay.belgaumkar,
daniele.ceraolospurio, nishanth.p.reddy, rodrigo.vivi,
matthew.d.roper, Sk Anirban
Prevent GuC firmware DMA failures during GuC-only reset by disabling
idle flow and verifying SRAM handling completion. Without this, reset
can be issued while SRAM handler is copying WOPCM to SRAM,
causing GuC HW to get stuck.
v2: Modify error message (Badal)
Rename reg bit name (Daniele)
Update WA skip condition (Daniele)
Update SRAM handling logic (Daniele)
v3: Reorder WA call (Badal)
Wait for GuC ready status (Daniele)
Signed-off-by: Sk Anirban <sk.anirban@intel.com>
---
drivers/gpu/drm/xe/regs/xe_guc_regs.h | 8 ++++++
drivers/gpu/drm/xe/xe_guc.c | 37 +++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_wa_oob.rules | 9 +++++++
3 files changed, 54 insertions(+)
diff --git a/drivers/gpu/drm/xe/regs/xe_guc_regs.h b/drivers/gpu/drm/xe/regs/xe_guc_regs.h
index 87984713dd12..c9cb02f32f5a 100644
--- a/drivers/gpu/drm/xe/regs/xe_guc_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_guc_regs.h
@@ -40,6 +40,9 @@
#define GS_BOOTROM_JUMP_PASSED REG_FIELD_PREP(GS_BOOTROM_MASK, 0x76)
#define GS_MIA_IN_RESET REG_BIT(0)
+#define GUC_HASH_BOOT_CHECK XE_REG(0xc010)
+#define GUC_BOOT_UKERNEL_VALID REG_BIT(31)
+
#define GUC_HEADER_INFO XE_REG(0xc014)
#define GUC_WOPCM_SIZE XE_REG(0xc050)
@@ -83,7 +86,12 @@
#define GUC_WOPCM_OFFSET_MASK REG_GENMASK(31, GUC_WOPCM_OFFSET_SHIFT)
#define HUC_LOADING_AGENT_GUC REG_BIT(1)
#define GUC_WOPCM_OFFSET_VALID REG_BIT(0)
+
+#define GUC_SRAM_STATUS XE_REG(0xc398)
+#define GUC_SRAM_HANDLING_MASK REG_GENMASK(8, 7)
+
#define GUC_MAX_IDLE_COUNT XE_REG(0xc3e4)
+#define GUC_IDLE_FLOW_DISABLE REG_BIT(31)
#define GUC_PMTIMESTAMP_LO XE_REG(0xc3e8)
#define GUC_PMTIMESTAMP_HI XE_REG(0xc3ec)
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 44360437beeb..d28542d980ac 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -900,6 +900,40 @@ int xe_guc_post_load_init(struct xe_guc *guc)
return xe_guc_submit_enable(guc);
}
+/*
+ * Wa_14025883347: Prevent GuC firmware DMA failures during GuC-only reset by ensuring
+ * SRAM save/restore operations are complete before reset.
+ */
+static void guc_prevent_fw_dma_failure_on_reset(struct xe_guc *guc)
+{
+ struct xe_gt *gt = guc_to_gt(guc);
+ u32 boot_hash_chk, guc_status, sram_status;
+ int ret;
+
+ guc_status = xe_mmio_read32(>->mmio, GUC_STATUS);
+ if (guc_status & GS_MIA_IN_RESET)
+ return;
+
+ boot_hash_chk = xe_mmio_read32(>->mmio, GUC_HASH_BOOT_CHECK);
+ if (!(boot_hash_chk & GUC_BOOT_UKERNEL_VALID))
+ return;
+
+ xe_mmio_rmw32(>->mmio, GUC_MAX_IDLE_COUNT, 0, GUC_IDLE_FLOW_DISABLE);
+
+ ret = xe_mmio_wait32(>->mmio, GUC_STATUS, GS_UKERNEL_MASK,
+ FIELD_PREP(GS_UKERNEL_MASK, XE_GUC_LOAD_STATUS_READY),
+ 100000, &guc_status, false);
+ if (ret)
+ xe_gt_warn(gt, "GuC not ready after disabling idle flow (GUC_STATUS: 0x%x)\n",
+ guc_status);
+
+ ret = xe_mmio_wait32(>->mmio, GUC_SRAM_STATUS, GUC_SRAM_HANDLING_MASK,
+ 0, 5000, &sram_status, false);
+ if (ret)
+ xe_gt_warn(gt, "SRAM handling not complete (GUC_SRAM_STATUS: 0x%x)\n",
+ sram_status);
+}
+
int xe_guc_reset(struct xe_guc *guc)
{
struct xe_gt *gt = guc_to_gt(guc);
@@ -912,6 +946,9 @@ int xe_guc_reset(struct xe_guc *guc)
if (IS_SRIOV_VF(gt_to_xe(gt)))
return xe_gt_sriov_vf_bootstrap(gt);
+ if (XE_GT_WA(gt, 14025883347))
+ guc_prevent_fw_dma_failure_on_reset(guc);
+
xe_mmio_write32(mmio, GDRST, GRDOM_GUC);
ret = xe_mmio_wait32(mmio, GDRST, GRDOM_GUC, 0, 5000, &gdrst, false);
diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index 5cd7fa6d2a5c..ff2efc7a68cc 100644
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -73,3 +73,12 @@
15015404425_disable PLATFORM(PANTHERLAKE), MEDIA_STEP(B0, FOREVER)
16026007364 MEDIA_VERSION(3000)
14020316580 MEDIA_VERSION(1301)
+
+14025883347 MEDIA_VERSION(1301)
+ MEDIA_VERSION(2000)
+ MEDIA_VERSION(3000)
+ MEDIA_VERSION(3002)
+ MEDIA_VERSION(3500)
+ MEDIA_VERSION(3503)
+ GRAPHICS_VERSION_RANGE(3000, 3001)
+ GRAPHICS_VERSION_RANGE(3003, 3005)
--
2.43.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* ✗ CI.checkpatch: warning for drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset (rev3)
2026-01-28 11:51 [PATCH v3 0/2] drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset Sk Anirban
2026-01-28 11:51 ` [PATCH v3 1/2] drm/xe/rtp: Extend support for max rules/actions per entry Sk Anirban
2026-01-28 11:51 ` [PATCH v3 2/2] drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset Sk Anirban
@ 2026-01-28 18:09 ` Patchwork
2026-01-28 18:10 ` ✓ CI.KUnit: success " Patchwork
2026-01-28 18:57 ` ✓ Xe.CI.BAT: " Patchwork
4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2026-01-28 18:09 UTC (permalink / raw)
To: Sk Anirban; +Cc: intel-xe
== Series Details ==
Series: drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset (rev3)
URL : https://patchwork.freedesktop.org/series/160091/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 9b8b31f58ca833c9dd07717f5850d1c377f5e898
Author: Sk Anirban <sk.anirban@intel.com>
Date: Wed Jan 28 17:21:37 2026 +0530
drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset
Prevent GuC firmware DMA failures during GuC-only reset by disabling
idle flow and verifying SRAM handling completion. Without this, reset
can be issued while SRAM handler is copying WOPCM to SRAM,
causing GuC HW to get stuck.
v2: Modify error message (Badal)
Rename reg bit name (Daniele)
Update WA skip condition (Daniele)
Update SRAM handling logic (Daniele)
v3: Reorder WA call (Badal)
Wait for GuC ready status (Daniele)
Signed-off-by: Sk Anirban <sk.anirban@intel.com>
+ /mt/dim checkpatch 8059f097e25f736bb3da09af6a9b283079abfd4f drm-intel
3d7ec4cc64fb drm/xe/rtp: Extend support for max rules/actions per entry
-:41: WARNING:LONG_LINE: line length of 167 exceeds 100 columns
#41: FILE: drivers/gpu/drm/xe/xe_rtp_helpers.h:69:
+#define XE_RTP_PASTE_13(prefix_, sep_, args_) _XE_RTP_CONCAT(prefix_, FIRST_ARG args_) __XE_RTP_PASTE_SEP_ ## sep_ XE_RTP_PASTE_12(prefix_, sep_, _XE_TUPLE_TAIL args_)
-:41: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#41: FILE: drivers/gpu/drm/xe/xe_rtp_helpers.h:69:
+#define XE_RTP_PASTE_13(prefix_, sep_, args_) _XE_RTP_CONCAT(prefix_, FIRST_ARG args_) __XE_RTP_PASTE_SEP_ ## sep_ XE_RTP_PASTE_12(prefix_, sep_, _XE_TUPLE_TAIL args_)
BUT SEE:
do {} while (0) advice is over-stated in a few situations:
The more obvious case is macros, like MODULE_PARM_DESC, invoked at
file-scope, where C disallows code (it must be in functions). See
$exceptions if you have one to add by name.
More troublesome is declarative macros used at top of new scope,
like DECLARE_PER_CPU. These might just compile with a do-while-0
wrapper, but would be incorrect. Most of these are handled by
detecting struct,union,etc declaration primitives in $exceptions.
Theres also macros called inside an if (block), which "return" an
expression. These cannot do-while, and need a ({}) wrapper.
Enjoy this qualification while we work to improve our heuristics.
-:41: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'prefix_' - possible side-effects?
#41: FILE: drivers/gpu/drm/xe/xe_rtp_helpers.h:69:
+#define XE_RTP_PASTE_13(prefix_, sep_, args_) _XE_RTP_CONCAT(prefix_, FIRST_ARG args_) __XE_RTP_PASTE_SEP_ ## sep_ XE_RTP_PASTE_12(prefix_, sep_, _XE_TUPLE_TAIL args_)
-:41: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'args_' - possible side-effects?
#41: FILE: drivers/gpu/drm/xe/xe_rtp_helpers.h:69:
+#define XE_RTP_PASTE_13(prefix_, sep_, args_) _XE_RTP_CONCAT(prefix_, FIRST_ARG args_) __XE_RTP_PASTE_SEP_ ## sep_ XE_RTP_PASTE_12(prefix_, sep_, _XE_TUPLE_TAIL args_)
-:42: WARNING:LONG_LINE: line length of 167 exceeds 100 columns
#42: FILE: drivers/gpu/drm/xe/xe_rtp_helpers.h:70:
+#define XE_RTP_PASTE_14(prefix_, sep_, args_) _XE_RTP_CONCAT(prefix_, FIRST_ARG args_) __XE_RTP_PASTE_SEP_ ## sep_ XE_RTP_PASTE_13(prefix_, sep_, _XE_TUPLE_TAIL args_)
-:42: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#42: FILE: drivers/gpu/drm/xe/xe_rtp_helpers.h:70:
+#define XE_RTP_PASTE_14(prefix_, sep_, args_) _XE_RTP_CONCAT(prefix_, FIRST_ARG args_) __XE_RTP_PASTE_SEP_ ## sep_ XE_RTP_PASTE_13(prefix_, sep_, _XE_TUPLE_TAIL args_)
BUT SEE:
do {} while (0) advice is over-stated in a few situations:
The more obvious case is macros, like MODULE_PARM_DESC, invoked at
file-scope, where C disallows code (it must be in functions). See
$exceptions if you have one to add by name.
More troublesome is declarative macros used at top of new scope,
like DECLARE_PER_CPU. These might just compile with a do-while-0
wrapper, but would be incorrect. Most of these are handled by
detecting struct,union,etc declaration primitives in $exceptions.
Theres also macros called inside an if (block), which "return" an
expression. These cannot do-while, and need a ({}) wrapper.
Enjoy this qualification while we work to improve our heuristics.
-:42: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'prefix_' - possible side-effects?
#42: FILE: drivers/gpu/drm/xe/xe_rtp_helpers.h:70:
+#define XE_RTP_PASTE_14(prefix_, sep_, args_) _XE_RTP_CONCAT(prefix_, FIRST_ARG args_) __XE_RTP_PASTE_SEP_ ## sep_ XE_RTP_PASTE_13(prefix_, sep_, _XE_TUPLE_TAIL args_)
-:42: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'args_' - possible side-effects?
#42: FILE: drivers/gpu/drm/xe/xe_rtp_helpers.h:70:
+#define XE_RTP_PASTE_14(prefix_, sep_, args_) _XE_RTP_CONCAT(prefix_, FIRST_ARG args_) __XE_RTP_PASTE_SEP_ ## sep_ XE_RTP_PASTE_13(prefix_, sep_, _XE_TUPLE_TAIL args_)
-:43: WARNING:LONG_LINE: line length of 167 exceeds 100 columns
#43: FILE: drivers/gpu/drm/xe/xe_rtp_helpers.h:71:
+#define XE_RTP_PASTE_15(prefix_, sep_, args_) _XE_RTP_CONCAT(prefix_, FIRST_ARG args_) __XE_RTP_PASTE_SEP_ ## sep_ XE_RTP_PASTE_14(prefix_, sep_, _XE_TUPLE_TAIL args_)
-:43: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#43: FILE: drivers/gpu/drm/xe/xe_rtp_helpers.h:71:
+#define XE_RTP_PASTE_15(prefix_, sep_, args_) _XE_RTP_CONCAT(prefix_, FIRST_ARG args_) __XE_RTP_PASTE_SEP_ ## sep_ XE_RTP_PASTE_14(prefix_, sep_, _XE_TUPLE_TAIL args_)
BUT SEE:
do {} while (0) advice is over-stated in a few situations:
The more obvious case is macros, like MODULE_PARM_DESC, invoked at
file-scope, where C disallows code (it must be in functions). See
$exceptions if you have one to add by name.
More troublesome is declarative macros used at top of new scope,
like DECLARE_PER_CPU. These might just compile with a do-while-0
wrapper, but would be incorrect. Most of these are handled by
detecting struct,union,etc declaration primitives in $exceptions.
Theres also macros called inside an if (block), which "return" an
expression. These cannot do-while, and need a ({}) wrapper.
Enjoy this qualification while we work to improve our heuristics.
-:43: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'prefix_' - possible side-effects?
#43: FILE: drivers/gpu/drm/xe/xe_rtp_helpers.h:71:
+#define XE_RTP_PASTE_15(prefix_, sep_, args_) _XE_RTP_CONCAT(prefix_, FIRST_ARG args_) __XE_RTP_PASTE_SEP_ ## sep_ XE_RTP_PASTE_14(prefix_, sep_, _XE_TUPLE_TAIL args_)
-:43: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'args_' - possible side-effects?
#43: FILE: drivers/gpu/drm/xe/xe_rtp_helpers.h:71:
+#define XE_RTP_PASTE_15(prefix_, sep_, args_) _XE_RTP_CONCAT(prefix_, FIRST_ARG args_) __XE_RTP_PASTE_SEP_ ## sep_ XE_RTP_PASTE_14(prefix_, sep_, _XE_TUPLE_TAIL args_)
total: 3 errors, 3 warnings, 6 checks, 25 lines checked
9b8b31f58ca8 drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset
^ permalink raw reply [flat|nested] 8+ messages in thread
* ✓ CI.KUnit: success for drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset (rev3)
2026-01-28 11:51 [PATCH v3 0/2] drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset Sk Anirban
` (2 preceding siblings ...)
2026-01-28 18:09 ` ✗ CI.checkpatch: warning for drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset (rev3) Patchwork
@ 2026-01-28 18:10 ` Patchwork
2026-01-28 18:57 ` ✓ Xe.CI.BAT: " Patchwork
4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2026-01-28 18:10 UTC (permalink / raw)
To: Sk Anirban; +Cc: intel-xe
== Series Details ==
Series: drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset (rev3)
URL : https://patchwork.freedesktop.org/series/160091/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[18:09:32] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:09:36] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:10:08] Starting KUnit Kernel (1/1)...
[18:10:08] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:10:08] ================== guc_buf (11 subtests) ===================
[18:10:08] [PASSED] test_smallest
[18:10:08] [PASSED] test_largest
[18:10:08] [PASSED] test_granular
[18:10:08] [PASSED] test_unique
[18:10:08] [PASSED] test_overlap
[18:10:08] [PASSED] test_reusable
[18:10:08] [PASSED] test_too_big
[18:10:08] [PASSED] test_flush
[18:10:08] [PASSED] test_lookup
[18:10:08] [PASSED] test_data
[18:10:08] [PASSED] test_class
[18:10:08] ===================== [PASSED] guc_buf =====================
[18:10:08] =================== guc_dbm (7 subtests) ===================
[18:10:08] [PASSED] test_empty
[18:10:08] [PASSED] test_default
[18:10:08] ======================== test_size ========================
[18:10:08] [PASSED] 4
[18:10:08] [PASSED] 8
[18:10:08] [PASSED] 32
[18:10:08] [PASSED] 256
[18:10:08] ==================== [PASSED] test_size ====================
[18:10:08] ======================= test_reuse ========================
[18:10:08] [PASSED] 4
[18:10:08] [PASSED] 8
[18:10:08] [PASSED] 32
[18:10:08] [PASSED] 256
[18:10:08] =================== [PASSED] test_reuse ====================
[18:10:08] =================== test_range_overlap ====================
[18:10:08] [PASSED] 4
[18:10:08] [PASSED] 8
[18:10:08] [PASSED] 32
[18:10:08] [PASSED] 256
[18:10:08] =============== [PASSED] test_range_overlap ================
[18:10:08] =================== test_range_compact ====================
[18:10:08] [PASSED] 4
[18:10:08] [PASSED] 8
[18:10:08] [PASSED] 32
[18:10:08] [PASSED] 256
[18:10:08] =============== [PASSED] test_range_compact ================
[18:10:08] ==================== test_range_spare =====================
[18:10:08] [PASSED] 4
[18:10:08] [PASSED] 8
[18:10:08] [PASSED] 32
[18:10:08] [PASSED] 256
[18:10:08] ================ [PASSED] test_range_spare =================
[18:10:08] ===================== [PASSED] guc_dbm =====================
[18:10:08] =================== guc_idm (6 subtests) ===================
[18:10:08] [PASSED] bad_init
[18:10:08] [PASSED] no_init
[18:10:08] [PASSED] init_fini
[18:10:08] [PASSED] check_used
[18:10:08] [PASSED] check_quota
[18:10:08] [PASSED] check_all
[18:10:08] ===================== [PASSED] guc_idm =====================
[18:10:08] ================== no_relay (3 subtests) ===================
[18:10:08] [PASSED] xe_drops_guc2pf_if_not_ready
[18:10:08] [PASSED] xe_drops_guc2vf_if_not_ready
[18:10:08] [PASSED] xe_rejects_send_if_not_ready
[18:10:08] ==================== [PASSED] no_relay =====================
[18:10:08] ================== pf_relay (14 subtests) ==================
[18:10:08] [PASSED] pf_rejects_guc2pf_too_short
[18:10:08] [PASSED] pf_rejects_guc2pf_too_long
[18:10:08] [PASSED] pf_rejects_guc2pf_no_payload
[18:10:08] [PASSED] pf_fails_no_payload
[18:10:08] [PASSED] pf_fails_bad_origin
[18:10:08] [PASSED] pf_fails_bad_type
[18:10:08] [PASSED] pf_txn_reports_error
[18:10:08] [PASSED] pf_txn_sends_pf2guc
[18:10:08] [PASSED] pf_sends_pf2guc
[18:10:08] [SKIPPED] pf_loopback_nop
[18:10:08] [SKIPPED] pf_loopback_echo
[18:10:08] [SKIPPED] pf_loopback_fail
[18:10:08] [SKIPPED] pf_loopback_busy
[18:10:08] [SKIPPED] pf_loopback_retry
[18:10:08] ==================== [PASSED] pf_relay =====================
[18:10:08] ================== vf_relay (3 subtests) ===================
[18:10:08] [PASSED] vf_rejects_guc2vf_too_short
[18:10:08] [PASSED] vf_rejects_guc2vf_too_long
[18:10:08] [PASSED] vf_rejects_guc2vf_no_payload
[18:10:08] ==================== [PASSED] vf_relay =====================
[18:10:08] ================ pf_gt_config (6 subtests) =================
[18:10:08] [PASSED] fair_contexts_1vf
[18:10:08] [PASSED] fair_doorbells_1vf
[18:10:08] [PASSED] fair_ggtt_1vf
[18:10:08] ====================== fair_contexts ======================
[18:10:08] [PASSED] 1 VF
[18:10:08] [PASSED] 2 VFs
[18:10:08] [PASSED] 3 VFs
[18:10:08] [PASSED] 4 VFs
[18:10:08] [PASSED] 5 VFs
[18:10:08] [PASSED] 6 VFs
[18:10:08] [PASSED] 7 VFs
[18:10:08] [PASSED] 8 VFs
[18:10:08] [PASSED] 9 VFs
[18:10:08] [PASSED] 10 VFs
[18:10:08] [PASSED] 11 VFs
[18:10:08] [PASSED] 12 VFs
[18:10:08] [PASSED] 13 VFs
[18:10:08] [PASSED] 14 VFs
[18:10:08] [PASSED] 15 VFs
[18:10:08] [PASSED] 16 VFs
[18:10:08] [PASSED] 17 VFs
[18:10:08] [PASSED] 18 VFs
[18:10:08] [PASSED] 19 VFs
[18:10:08] [PASSED] 20 VFs
[18:10:08] [PASSED] 21 VFs
[18:10:08] [PASSED] 22 VFs
[18:10:08] [PASSED] 23 VFs
[18:10:08] [PASSED] 24 VFs
[18:10:08] [PASSED] 25 VFs
[18:10:08] [PASSED] 26 VFs
[18:10:08] [PASSED] 27 VFs
[18:10:08] [PASSED] 28 VFs
[18:10:08] [PASSED] 29 VFs
[18:10:08] [PASSED] 30 VFs
[18:10:08] [PASSED] 31 VFs
[18:10:08] [PASSED] 32 VFs
[18:10:08] [PASSED] 33 VFs
[18:10:08] [PASSED] 34 VFs
[18:10:08] [PASSED] 35 VFs
[18:10:08] [PASSED] 36 VFs
[18:10:08] [PASSED] 37 VFs
[18:10:08] [PASSED] 38 VFs
[18:10:08] [PASSED] 39 VFs
[18:10:08] [PASSED] 40 VFs
[18:10:08] [PASSED] 41 VFs
[18:10:08] [PASSED] 42 VFs
[18:10:08] [PASSED] 43 VFs
[18:10:08] [PASSED] 44 VFs
[18:10:08] [PASSED] 45 VFs
[18:10:08] [PASSED] 46 VFs
[18:10:08] [PASSED] 47 VFs
[18:10:08] [PASSED] 48 VFs
[18:10:08] [PASSED] 49 VFs
[18:10:08] [PASSED] 50 VFs
[18:10:08] [PASSED] 51 VFs
[18:10:08] [PASSED] 52 VFs
[18:10:08] [PASSED] 53 VFs
[18:10:08] [PASSED] 54 VFs
[18:10:08] [PASSED] 55 VFs
[18:10:08] [PASSED] 56 VFs
[18:10:08] [PASSED] 57 VFs
[18:10:08] [PASSED] 58 VFs
[18:10:08] [PASSED] 59 VFs
[18:10:08] [PASSED] 60 VFs
[18:10:08] [PASSED] 61 VFs
[18:10:08] [PASSED] 62 VFs
[18:10:08] [PASSED] 63 VFs
[18:10:08] ================== [PASSED] fair_contexts ==================
[18:10:08] ===================== fair_doorbells ======================
[18:10:08] [PASSED] 1 VF
[18:10:08] [PASSED] 2 VFs
[18:10:08] [PASSED] 3 VFs
[18:10:08] [PASSED] 4 VFs
[18:10:08] [PASSED] 5 VFs
[18:10:08] [PASSED] 6 VFs
[18:10:08] [PASSED] 7 VFs
[18:10:08] [PASSED] 8 VFs
[18:10:08] [PASSED] 9 VFs
[18:10:08] [PASSED] 10 VFs
[18:10:08] [PASSED] 11 VFs
[18:10:08] [PASSED] 12 VFs
[18:10:08] [PASSED] 13 VFs
[18:10:08] [PASSED] 14 VFs
[18:10:08] [PASSED] 15 VFs
[18:10:08] [PASSED] 16 VFs
[18:10:08] [PASSED] 17 VFs
[18:10:08] [PASSED] 18 VFs
[18:10:08] [PASSED] 19 VFs
[18:10:08] [PASSED] 20 VFs
[18:10:08] [PASSED] 21 VFs
[18:10:08] [PASSED] 22 VFs
[18:10:08] [PASSED] 23 VFs
[18:10:08] [PASSED] 24 VFs
[18:10:08] [PASSED] 25 VFs
[18:10:08] [PASSED] 26 VFs
[18:10:08] [PASSED] 27 VFs
[18:10:08] [PASSED] 28 VFs
[18:10:08] [PASSED] 29 VFs
[18:10:08] [PASSED] 30 VFs
[18:10:08] [PASSED] 31 VFs
[18:10:08] [PASSED] 32 VFs
[18:10:08] [PASSED] 33 VFs
[18:10:08] [PASSED] 34 VFs
[18:10:08] [PASSED] 35 VFs
[18:10:08] [PASSED] 36 VFs
[18:10:08] [PASSED] 37 VFs
[18:10:08] [PASSED] 38 VFs
[18:10:08] [PASSED] 39 VFs
[18:10:08] [PASSED] 40 VFs
[18:10:08] [PASSED] 41 VFs
[18:10:08] [PASSED] 42 VFs
[18:10:08] [PASSED] 43 VFs
[18:10:08] [PASSED] 44 VFs
[18:10:08] [PASSED] 45 VFs
[18:10:08] [PASSED] 46 VFs
[18:10:08] [PASSED] 47 VFs
[18:10:08] [PASSED] 48 VFs
[18:10:08] [PASSED] 49 VFs
[18:10:08] [PASSED] 50 VFs
[18:10:08] [PASSED] 51 VFs
[18:10:08] [PASSED] 52 VFs
[18:10:08] [PASSED] 53 VFs
[18:10:08] [PASSED] 54 VFs
[18:10:08] [PASSED] 55 VFs
[18:10:08] [PASSED] 56 VFs
[18:10:08] [PASSED] 57 VFs
[18:10:08] [PASSED] 58 VFs
[18:10:08] [PASSED] 59 VFs
[18:10:08] [PASSED] 60 VFs
[18:10:08] [PASSED] 61 VFs
[18:10:08] [PASSED] 62 VFs
[18:10:08] [PASSED] 63 VFs
[18:10:08] ================= [PASSED] fair_doorbells ==================
[18:10:08] ======================== fair_ggtt ========================
[18:10:08] [PASSED] 1 VF
[18:10:08] [PASSED] 2 VFs
[18:10:08] [PASSED] 3 VFs
[18:10:08] [PASSED] 4 VFs
[18:10:08] [PASSED] 5 VFs
[18:10:08] [PASSED] 6 VFs
[18:10:08] [PASSED] 7 VFs
[18:10:08] [PASSED] 8 VFs
[18:10:08] [PASSED] 9 VFs
[18:10:08] [PASSED] 10 VFs
[18:10:08] [PASSED] 11 VFs
[18:10:08] [PASSED] 12 VFs
[18:10:08] [PASSED] 13 VFs
[18:10:08] [PASSED] 14 VFs
[18:10:08] [PASSED] 15 VFs
[18:10:08] [PASSED] 16 VFs
[18:10:08] [PASSED] 17 VFs
[18:10:08] [PASSED] 18 VFs
[18:10:08] [PASSED] 19 VFs
[18:10:08] [PASSED] 20 VFs
[18:10:08] [PASSED] 21 VFs
[18:10:08] [PASSED] 22 VFs
[18:10:08] [PASSED] 23 VFs
[18:10:08] [PASSED] 24 VFs
[18:10:08] [PASSED] 25 VFs
[18:10:08] [PASSED] 26 VFs
[18:10:08] [PASSED] 27 VFs
[18:10:08] [PASSED] 28 VFs
[18:10:08] [PASSED] 29 VFs
[18:10:08] [PASSED] 30 VFs
[18:10:08] [PASSED] 31 VFs
[18:10:08] [PASSED] 32 VFs
[18:10:08] [PASSED] 33 VFs
[18:10:08] [PASSED] 34 VFs
[18:10:08] [PASSED] 35 VFs
[18:10:08] [PASSED] 36 VFs
[18:10:08] [PASSED] 37 VFs
[18:10:08] [PASSED] 38 VFs
[18:10:08] [PASSED] 39 VFs
[18:10:08] [PASSED] 40 VFs
[18:10:08] [PASSED] 41 VFs
[18:10:08] [PASSED] 42 VFs
[18:10:08] [PASSED] 43 VFs
[18:10:08] [PASSED] 44 VFs
[18:10:08] [PASSED] 45 VFs
[18:10:08] [PASSED] 46 VFs
[18:10:08] [PASSED] 47 VFs
[18:10:08] [PASSED] 48 VFs
[18:10:08] [PASSED] 49 VFs
[18:10:08] [PASSED] 50 VFs
[18:10:08] [PASSED] 51 VFs
[18:10:08] [PASSED] 52 VFs
[18:10:08] [PASSED] 53 VFs
[18:10:08] [PASSED] 54 VFs
[18:10:08] [PASSED] 55 VFs
[18:10:08] [PASSED] 56 VFs
[18:10:08] [PASSED] 57 VFs
[18:10:08] [PASSED] 58 VFs
[18:10:08] [PASSED] 59 VFs
[18:10:08] [PASSED] 60 VFs
[18:10:08] [PASSED] 61 VFs
[18:10:08] [PASSED] 62 VFs
[18:10:08] [PASSED] 63 VFs
[18:10:08] ==================== [PASSED] fair_ggtt ====================
[18:10:08] ================== [PASSED] pf_gt_config ===================
[18:10:08] ===================== lmtt (1 subtest) =====================
[18:10:08] ======================== test_ops =========================
[18:10:08] [PASSED] 2-level
[18:10:08] [PASSED] multi-level
[18:10:08] ==================== [PASSED] test_ops =====================
[18:10:08] ====================== [PASSED] lmtt =======================
[18:10:08] ================= pf_service (11 subtests) =================
[18:10:08] [PASSED] pf_negotiate_any
[18:10:08] [PASSED] pf_negotiate_base_match
[18:10:08] [PASSED] pf_negotiate_base_newer
[18:10:08] [PASSED] pf_negotiate_base_next
[18:10:08] [SKIPPED] pf_negotiate_base_older
[18:10:08] [PASSED] pf_negotiate_base_prev
[18:10:08] [PASSED] pf_negotiate_latest_match
[18:10:08] [PASSED] pf_negotiate_latest_newer
[18:10:08] [PASSED] pf_negotiate_latest_next
[18:10:08] [SKIPPED] pf_negotiate_latest_older
[18:10:08] [SKIPPED] pf_negotiate_latest_prev
[18:10:08] =================== [PASSED] pf_service ====================
[18:10:08] ================= xe_guc_g2g (2 subtests) ==================
[18:10:08] ============== xe_live_guc_g2g_kunit_default ==============
[18:10:08] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[18:10:08] ============== xe_live_guc_g2g_kunit_allmem ===============
[18:10:08] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[18:10:08] =================== [SKIPPED] xe_guc_g2g ===================
[18:10:08] =================== xe_mocs (2 subtests) ===================
[18:10:08] ================ xe_live_mocs_kernel_kunit ================
[18:10:08] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[18:10:08] ================ xe_live_mocs_reset_kunit =================
[18:10:08] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[18:10:08] ==================== [SKIPPED] xe_mocs =====================
[18:10:08] ================= xe_migrate (2 subtests) ==================
[18:10:08] ================= xe_migrate_sanity_kunit =================
[18:10:08] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[18:10:08] ================== xe_validate_ccs_kunit ==================
[18:10:08] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[18:10:08] =================== [SKIPPED] xe_migrate ===================
[18:10:08] ================== xe_dma_buf (1 subtest) ==================
[18:10:08] ==================== xe_dma_buf_kunit =====================
[18:10:08] ================ [SKIPPED] xe_dma_buf_kunit ================
[18:10:08] =================== [SKIPPED] xe_dma_buf ===================
[18:10:08] ================= xe_bo_shrink (1 subtest) =================
[18:10:08] =================== xe_bo_shrink_kunit ====================
[18:10:08] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[18:10:08] ================== [SKIPPED] xe_bo_shrink ==================
[18:10:08] ==================== xe_bo (2 subtests) ====================
[18:10:08] ================== xe_ccs_migrate_kunit ===================
[18:10:08] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[18:10:08] ==================== xe_bo_evict_kunit ====================
[18:10:08] =============== [SKIPPED] xe_bo_evict_kunit ================
[18:10:08] ===================== [SKIPPED] xe_bo ======================
[18:10:08] ==================== args (13 subtests) ====================
[18:10:08] [PASSED] count_args_test
[18:10:08] [PASSED] call_args_example
[18:10:08] [PASSED] call_args_test
[18:10:08] [PASSED] drop_first_arg_example
[18:10:08] [PASSED] drop_first_arg_test
[18:10:08] [PASSED] first_arg_example
[18:10:08] [PASSED] first_arg_test
[18:10:08] [PASSED] last_arg_example
[18:10:08] [PASSED] last_arg_test
[18:10:08] [PASSED] pick_arg_example
[18:10:08] [PASSED] if_args_example
[18:10:08] [PASSED] if_args_test
[18:10:08] [PASSED] sep_comma_example
[18:10:08] ====================== [PASSED] args =======================
[18:10:08] =================== xe_pci (3 subtests) ====================
[18:10:08] ==================== check_graphics_ip ====================
[18:10:08] [PASSED] 12.00 Xe_LP
[18:10:08] [PASSED] 12.10 Xe_LP+
[18:10:08] [PASSED] 12.55 Xe_HPG
[18:10:08] [PASSED] 12.60 Xe_HPC
[18:10:08] [PASSED] 12.70 Xe_LPG
[18:10:08] [PASSED] 12.71 Xe_LPG
[18:10:08] [PASSED] 12.74 Xe_LPG+
[18:10:08] [PASSED] 20.01 Xe2_HPG
[18:10:08] [PASSED] 20.02 Xe2_HPG
[18:10:08] [PASSED] 20.04 Xe2_LPG
[18:10:08] [PASSED] 30.00 Xe3_LPG
[18:10:08] [PASSED] 30.01 Xe3_LPG
[18:10:08] [PASSED] 30.03 Xe3_LPG
[18:10:08] [PASSED] 30.04 Xe3_LPG
[18:10:08] [PASSED] 30.05 Xe3_LPG
[18:10:08] [PASSED] 35.11 Xe3p_XPC
[18:10:08] ================ [PASSED] check_graphics_ip ================
[18:10:08] ===================== check_media_ip ======================
[18:10:08] [PASSED] 12.00 Xe_M
[18:10:08] [PASSED] 12.55 Xe_HPM
[18:10:08] [PASSED] 13.00 Xe_LPM+
[18:10:08] [PASSED] 13.01 Xe2_HPM
[18:10:08] [PASSED] 20.00 Xe2_LPM
[18:10:08] [PASSED] 30.00 Xe3_LPM
[18:10:08] [PASSED] 30.02 Xe3_LPM
[18:10:08] [PASSED] 35.00 Xe3p_LPM
[18:10:08] [PASSED] 35.03 Xe3p_HPM
[18:10:08] ================= [PASSED] check_media_ip ==================
[18:10:08] =================== check_platform_desc ===================
[18:10:08] [PASSED] 0x9A60 (TIGERLAKE)
[18:10:08] [PASSED] 0x9A68 (TIGERLAKE)
[18:10:08] [PASSED] 0x9A70 (TIGERLAKE)
[18:10:08] [PASSED] 0x9A40 (TIGERLAKE)
[18:10:08] [PASSED] 0x9A49 (TIGERLAKE)
[18:10:08] [PASSED] 0x9A59 (TIGERLAKE)
[18:10:08] [PASSED] 0x9A78 (TIGERLAKE)
[18:10:08] [PASSED] 0x9AC0 (TIGERLAKE)
[18:10:08] [PASSED] 0x9AC9 (TIGERLAKE)
[18:10:08] [PASSED] 0x9AD9 (TIGERLAKE)
[18:10:08] [PASSED] 0x9AF8 (TIGERLAKE)
[18:10:08] [PASSED] 0x4C80 (ROCKETLAKE)
[18:10:08] [PASSED] 0x4C8A (ROCKETLAKE)
[18:10:08] [PASSED] 0x4C8B (ROCKETLAKE)
[18:10:08] [PASSED] 0x4C8C (ROCKETLAKE)
[18:10:08] [PASSED] 0x4C90 (ROCKETLAKE)
[18:10:08] [PASSED] 0x4C9A (ROCKETLAKE)
[18:10:08] [PASSED] 0x4680 (ALDERLAKE_S)
[18:10:08] [PASSED] 0x4682 (ALDERLAKE_S)
[18:10:08] [PASSED] 0x4688 (ALDERLAKE_S)
[18:10:08] [PASSED] 0x468A (ALDERLAKE_S)
[18:10:08] [PASSED] 0x468B (ALDERLAKE_S)
[18:10:08] [PASSED] 0x4690 (ALDERLAKE_S)
[18:10:08] [PASSED] 0x4692 (ALDERLAKE_S)
[18:10:08] [PASSED] 0x4693 (ALDERLAKE_S)
[18:10:08] [PASSED] 0x46A0 (ALDERLAKE_P)
[18:10:08] [PASSED] 0x46A1 (ALDERLAKE_P)
[18:10:08] [PASSED] 0x46A2 (ALDERLAKE_P)
[18:10:08] [PASSED] 0x46A3 (ALDERLAKE_P)
[18:10:08] [PASSED] 0x46A6 (ALDERLAKE_P)
[18:10:08] [PASSED] 0x46A8 (ALDERLAKE_P)
[18:10:08] [PASSED] 0x46AA (ALDERLAKE_P)
[18:10:08] [PASSED] 0x462A (ALDERLAKE_P)
[18:10:08] [PASSED] 0x4626 (ALDERLAKE_P)
[18:10:08] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[18:10:08] [PASSED] 0x46B0 (ALDERLAKE_P)
[18:10:08] [PASSED] 0x46B1 (ALDERLAKE_P)
[18:10:08] [PASSED] 0x46B2 (ALDERLAKE_P)
[18:10:08] [PASSED] 0x46B3 (ALDERLAKE_P)
[18:10:08] [PASSED] 0x46C0 (ALDERLAKE_P)
[18:10:08] [PASSED] 0x46C1 (ALDERLAKE_P)
[18:10:08] [PASSED] 0x46C2 (ALDERLAKE_P)
[18:10:08] [PASSED] 0x46C3 (ALDERLAKE_P)
[18:10:08] [PASSED] 0x46D0 (ALDERLAKE_N)
[18:10:08] [PASSED] 0x46D1 (ALDERLAKE_N)
[18:10:08] [PASSED] 0x46D2 (ALDERLAKE_N)
[18:10:08] [PASSED] 0x46D3 (ALDERLAKE_N)
[18:10:08] [PASSED] 0x46D4 (ALDERLAKE_N)
[18:10:08] [PASSED] 0xA721 (ALDERLAKE_P)
[18:10:08] [PASSED] 0xA7A1 (ALDERLAKE_P)
[18:10:08] [PASSED] 0xA7A9 (ALDERLAKE_P)
[18:10:08] [PASSED] 0xA7AC (ALDERLAKE_P)
[18:10:08] [PASSED] 0xA7AD (ALDERLAKE_P)
[18:10:08] [PASSED] 0xA720 (ALDERLAKE_P)
[18:10:08] [PASSED] 0xA7A0 (ALDERLAKE_P)
[18:10:08] [PASSED] 0xA7A8 (ALDERLAKE_P)
[18:10:08] [PASSED] 0xA7AA (ALDERLAKE_P)
[18:10:08] [PASSED] 0xA7AB (ALDERLAKE_P)
[18:10:08] [PASSED] 0xA780 (ALDERLAKE_S)
[18:10:08] [PASSED] 0xA781 (ALDERLAKE_S)
[18:10:08] [PASSED] 0xA782 (ALDERLAKE_S)
[18:10:08] [PASSED] 0xA783 (ALDERLAKE_S)
[18:10:08] [PASSED] 0xA788 (ALDERLAKE_S)
[18:10:08] [PASSED] 0xA789 (ALDERLAKE_S)
[18:10:08] [PASSED] 0xA78A (ALDERLAKE_S)
[18:10:08] [PASSED] 0xA78B (ALDERLAKE_S)
[18:10:08] [PASSED] 0x4905 (DG1)
[18:10:08] [PASSED] 0x4906 (DG1)
[18:10:08] [PASSED] 0x4907 (DG1)
[18:10:08] [PASSED] 0x4908 (DG1)
[18:10:08] [PASSED] 0x4909 (DG1)
[18:10:08] [PASSED] 0x56C0 (DG2)
[18:10:08] [PASSED] 0x56C2 (DG2)
[18:10:08] [PASSED] 0x56C1 (DG2)
[18:10:08] [PASSED] 0x7D51 (METEORLAKE)
[18:10:08] [PASSED] 0x7DD1 (METEORLAKE)
[18:10:08] [PASSED] 0x7D41 (METEORLAKE)
[18:10:08] [PASSED] 0x7D67 (METEORLAKE)
[18:10:08] [PASSED] 0xB640 (METEORLAKE)
[18:10:08] [PASSED] 0x56A0 (DG2)
[18:10:08] [PASSED] 0x56A1 (DG2)
[18:10:08] [PASSED] 0x56A2 (DG2)
[18:10:08] [PASSED] 0x56BE (DG2)
[18:10:08] [PASSED] 0x56BF (DG2)
[18:10:08] [PASSED] 0x5690 (DG2)
[18:10:08] [PASSED] 0x5691 (DG2)
[18:10:08] [PASSED] 0x5692 (DG2)
[18:10:08] [PASSED] 0x56A5 (DG2)
[18:10:08] [PASSED] 0x56A6 (DG2)
[18:10:08] [PASSED] 0x56B0 (DG2)
[18:10:08] [PASSED] 0x56B1 (DG2)
[18:10:08] [PASSED] 0x56BA (DG2)
[18:10:08] [PASSED] 0x56BB (DG2)
[18:10:08] [PASSED] 0x56BC (DG2)
[18:10:08] [PASSED] 0x56BD (DG2)
[18:10:08] [PASSED] 0x5693 (DG2)
[18:10:08] [PASSED] 0x5694 (DG2)
[18:10:08] [PASSED] 0x5695 (DG2)
[18:10:08] [PASSED] 0x56A3 (DG2)
[18:10:08] [PASSED] 0x56A4 (DG2)
[18:10:08] [PASSED] 0x56B2 (DG2)
[18:10:08] [PASSED] 0x56B3 (DG2)
[18:10:08] [PASSED] 0x5696 (DG2)
[18:10:08] [PASSED] 0x5697 (DG2)
[18:10:08] [PASSED] 0xB69 (PVC)
[18:10:08] [PASSED] 0xB6E (PVC)
[18:10:08] [PASSED] 0xBD4 (PVC)
[18:10:08] [PASSED] 0xBD5 (PVC)
[18:10:08] [PASSED] 0xBD6 (PVC)
[18:10:08] [PASSED] 0xBD7 (PVC)
[18:10:08] [PASSED] 0xBD8 (PVC)
[18:10:08] [PASSED] 0xBD9 (PVC)
[18:10:08] [PASSED] 0xBDA (PVC)
[18:10:08] [PASSED] 0xBDB (PVC)
[18:10:08] [PASSED] 0xBE0 (PVC)
[18:10:08] [PASSED] 0xBE1 (PVC)
[18:10:08] [PASSED] 0xBE5 (PVC)
[18:10:08] [PASSED] 0x7D40 (METEORLAKE)
[18:10:08] [PASSED] 0x7D45 (METEORLAKE)
[18:10:08] [PASSED] 0x7D55 (METEORLAKE)
[18:10:08] [PASSED] 0x7D60 (METEORLAKE)
[18:10:08] [PASSED] 0x7DD5 (METEORLAKE)
[18:10:08] [PASSED] 0x6420 (LUNARLAKE)
[18:10:08] [PASSED] 0x64A0 (LUNARLAKE)
[18:10:08] [PASSED] 0x64B0 (LUNARLAKE)
[18:10:08] [PASSED] 0xE202 (BATTLEMAGE)
[18:10:08] [PASSED] 0xE209 (BATTLEMAGE)
[18:10:08] [PASSED] 0xE20B (BATTLEMAGE)
[18:10:08] [PASSED] 0xE20C (BATTLEMAGE)
[18:10:08] [PASSED] 0xE20D (BATTLEMAGE)
[18:10:08] [PASSED] 0xE210 (BATTLEMAGE)
[18:10:08] [PASSED] 0xE211 (BATTLEMAGE)
[18:10:08] [PASSED] 0xE212 (BATTLEMAGE)
[18:10:08] [PASSED] 0xE216 (BATTLEMAGE)
[18:10:08] [PASSED] 0xE220 (BATTLEMAGE)
[18:10:08] [PASSED] 0xE221 (BATTLEMAGE)
[18:10:08] [PASSED] 0xE222 (BATTLEMAGE)
[18:10:08] [PASSED] 0xE223 (BATTLEMAGE)
[18:10:08] [PASSED] 0xB080 (PANTHERLAKE)
[18:10:08] [PASSED] 0xB081 (PANTHERLAKE)
[18:10:08] [PASSED] 0xB082 (PANTHERLAKE)
[18:10:08] [PASSED] 0xB083 (PANTHERLAKE)
[18:10:08] [PASSED] 0xB084 (PANTHERLAKE)
[18:10:08] [PASSED] 0xB085 (PANTHERLAKE)
[18:10:08] [PASSED] 0xB086 (PANTHERLAKE)
[18:10:08] [PASSED] 0xB087 (PANTHERLAKE)
[18:10:08] [PASSED] 0xB08F (PANTHERLAKE)
[18:10:08] [PASSED] 0xB090 (PANTHERLAKE)
[18:10:08] [PASSED] 0xB0A0 (PANTHERLAKE)
[18:10:08] [PASSED] 0xB0B0 (PANTHERLAKE)
[18:10:08] [PASSED] 0xFD80 (PANTHERLAKE)
[18:10:08] [PASSED] 0xFD81 (PANTHERLAKE)
[18:10:08] [PASSED] 0xD740 (NOVALAKE_S)
[18:10:08] [PASSED] 0xD741 (NOVALAKE_S)
[18:10:08] [PASSED] 0xD742 (NOVALAKE_S)
[18:10:08] [PASSED] 0xD743 (NOVALAKE_S)
[18:10:08] [PASSED] 0xD744 (NOVALAKE_S)
[18:10:08] [PASSED] 0xD745 (NOVALAKE_S)
[18:10:08] [PASSED] 0x674C (CRESCENTISLAND)
[18:10:08] =============== [PASSED] check_platform_desc ===============
[18:10:08] ===================== [PASSED] xe_pci ======================
[18:10:08] =================== xe_rtp (2 subtests) ====================
[18:10:08] =============== xe_rtp_process_to_sr_tests ================
[18:10:08] [PASSED] coalesce-same-reg
[18:10:08] [PASSED] no-match-no-add
[18:10:08] [PASSED] match-or
[18:10:08] [PASSED] match-or-xfail
[18:10:08] [PASSED] no-match-no-add-multiple-rules
[18:10:08] [PASSED] two-regs-two-entries
[18:10:08] [PASSED] clr-one-set-other
[18:10:08] [PASSED] set-field
[18:10:08] [PASSED] conflict-duplicate
[18:10:08] [PASSED] conflict-not-disjoint
[18:10:08] [PASSED] conflict-reg-type
[18:10:08] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[18:10:08] ================== xe_rtp_process_tests ===================
[18:10:08] [PASSED] active1
[18:10:08] [PASSED] active2
[18:10:08] [PASSED] active-inactive
[18:10:08] [PASSED] inactive-active
[18:10:08] [PASSED] inactive-1st_or_active-inactive
[18:10:08] [PASSED] inactive-2nd_or_active-inactive
[18:10:08] [PASSED] inactive-last_or_active-inactive
[18:10:08] [PASSED] inactive-no_or_active-inactive
[18:10:08] ============== [PASSED] xe_rtp_process_tests ===============
[18:10:08] ===================== [PASSED] xe_rtp ======================
[18:10:08] ==================== xe_wa (1 subtest) =====================
[18:10:08] ======================== xe_wa_gt =========================
[18:10:08] [PASSED] TIGERLAKE B0
[18:10:08] [PASSED] DG1 A0
[18:10:08] [PASSED] DG1 B0
[18:10:08] [PASSED] ALDERLAKE_S A0
[18:10:08] [PASSED] ALDERLAKE_S B0
[18:10:08] [PASSED] ALDERLAKE_S C0
[18:10:08] [PASSED] ALDERLAKE_S D0
[18:10:08] [PASSED] ALDERLAKE_P A0
[18:10:08] [PASSED] ALDERLAKE_P B0
[18:10:08] [PASSED] ALDERLAKE_P C0
[18:10:08] [PASSED] ALDERLAKE_S RPLS D0
[18:10:08] [PASSED] ALDERLAKE_P RPLU E0
[18:10:08] [PASSED] DG2 G10 C0
[18:10:08] [PASSED] DG2 G11 B1
[18:10:08] [PASSED] DG2 G12 A1
[18:10:08] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:10:08] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:10:08] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[18:10:08] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[18:10:08] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[18:10:08] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[18:10:08] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[18:10:08] ==================== [PASSED] xe_wa_gt =====================
[18:10:08] ====================== [PASSED] xe_wa ======================
[18:10:08] ============================================================
[18:10:08] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[18:10:08] Elapsed time: 36.257s total, 4.268s configuring, 31.473s building, 0.463s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[18:10:08] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:10:10] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:10:35] Starting KUnit Kernel (1/1)...
[18:10:35] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:10:36] ============ drm_test_pick_cmdline (2 subtests) ============
[18:10:36] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[18:10:36] =============== drm_test_pick_cmdline_named ===============
[18:10:36] [PASSED] NTSC
[18:10:36] [PASSED] NTSC-J
[18:10:36] [PASSED] PAL
[18:10:36] [PASSED] PAL-M
[18:10:36] =========== [PASSED] drm_test_pick_cmdline_named ===========
[18:10:36] ============== [PASSED] drm_test_pick_cmdline ==============
[18:10:36] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[18:10:36] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[18:10:36] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[18:10:36] =========== drm_validate_clone_mode (2 subtests) ===========
[18:10:36] ============== drm_test_check_in_clone_mode ===============
[18:10:36] [PASSED] in_clone_mode
[18:10:36] [PASSED] not_in_clone_mode
[18:10:36] ========== [PASSED] drm_test_check_in_clone_mode ===========
[18:10:36] =============== drm_test_check_valid_clones ===============
[18:10:36] [PASSED] not_in_clone_mode
[18:10:36] [PASSED] valid_clone
[18:10:36] [PASSED] invalid_clone
[18:10:36] =========== [PASSED] drm_test_check_valid_clones ===========
[18:10:36] ============= [PASSED] drm_validate_clone_mode =============
[18:10:36] ============= drm_validate_modeset (1 subtest) =============
[18:10:36] [PASSED] drm_test_check_connector_changed_modeset
[18:10:36] ============== [PASSED] drm_validate_modeset ===============
[18:10:36] ====== drm_test_bridge_get_current_state (2 subtests) ======
[18:10:36] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[18:10:36] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[18:10:36] ======== [PASSED] drm_test_bridge_get_current_state ========
[18:10:36] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[18:10:36] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[18:10:36] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[18:10:36] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[18:10:36] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[18:10:36] ============== drm_bridge_alloc (2 subtests) ===============
[18:10:36] [PASSED] drm_test_drm_bridge_alloc_basic
[18:10:36] [PASSED] drm_test_drm_bridge_alloc_get_put
[18:10:36] ================ [PASSED] drm_bridge_alloc =================
[18:10:36] ================== drm_buddy (9 subtests) ==================
[18:10:36] [PASSED] drm_test_buddy_alloc_limit
[18:10:36] [PASSED] drm_test_buddy_alloc_optimistic
[18:10:36] [PASSED] drm_test_buddy_alloc_pessimistic
[18:10:36] [PASSED] drm_test_buddy_alloc_pathological
[18:10:36] [PASSED] drm_test_buddy_alloc_contiguous
[18:10:36] [PASSED] drm_test_buddy_alloc_clear
[18:10:36] [PASSED] drm_test_buddy_alloc_range_bias
[18:10:36] [PASSED] drm_test_buddy_fragmentation_performance
[18:10:36] [PASSED] drm_test_buddy_alloc_exceeds_max_order
[18:10:36] ==================== [PASSED] drm_buddy ====================
[18:10:36] ============= drm_cmdline_parser (40 subtests) =============
[18:10:36] [PASSED] drm_test_cmdline_force_d_only
[18:10:36] [PASSED] drm_test_cmdline_force_D_only_dvi
[18:10:36] [PASSED] drm_test_cmdline_force_D_only_hdmi
[18:10:36] [PASSED] drm_test_cmdline_force_D_only_not_digital
[18:10:36] [PASSED] drm_test_cmdline_force_e_only
[18:10:36] [PASSED] drm_test_cmdline_res
[18:10:36] [PASSED] drm_test_cmdline_res_vesa
[18:10:36] [PASSED] drm_test_cmdline_res_vesa_rblank
[18:10:36] [PASSED] drm_test_cmdline_res_rblank
[18:10:36] [PASSED] drm_test_cmdline_res_bpp
[18:10:36] [PASSED] drm_test_cmdline_res_refresh
[18:10:36] [PASSED] drm_test_cmdline_res_bpp_refresh
[18:10:36] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[18:10:36] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[18:10:36] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[18:10:36] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[18:10:36] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[18:10:36] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[18:10:36] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[18:10:36] [PASSED] drm_test_cmdline_res_margins_force_on
[18:10:36] [PASSED] drm_test_cmdline_res_vesa_margins
[18:10:36] [PASSED] drm_test_cmdline_name
[18:10:36] [PASSED] drm_test_cmdline_name_bpp
[18:10:36] [PASSED] drm_test_cmdline_name_option
[18:10:36] [PASSED] drm_test_cmdline_name_bpp_option
[18:10:36] [PASSED] drm_test_cmdline_rotate_0
[18:10:36] [PASSED] drm_test_cmdline_rotate_90
[18:10:36] [PASSED] drm_test_cmdline_rotate_180
[18:10:36] [PASSED] drm_test_cmdline_rotate_270
[18:10:36] [PASSED] drm_test_cmdline_hmirror
[18:10:36] [PASSED] drm_test_cmdline_vmirror
[18:10:36] [PASSED] drm_test_cmdline_margin_options
[18:10:36] [PASSED] drm_test_cmdline_multiple_options
[18:10:36] [PASSED] drm_test_cmdline_bpp_extra_and_option
[18:10:36] [PASSED] drm_test_cmdline_extra_and_option
[18:10:36] [PASSED] drm_test_cmdline_freestanding_options
[18:10:36] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[18:10:36] [PASSED] drm_test_cmdline_panel_orientation
[18:10:36] ================ drm_test_cmdline_invalid =================
[18:10:36] [PASSED] margin_only
[18:10:36] [PASSED] interlace_only
[18:10:36] [PASSED] res_missing_x
[18:10:36] [PASSED] res_missing_y
[18:10:36] [PASSED] res_bad_y
[18:10:36] [PASSED] res_missing_y_bpp
[18:10:36] [PASSED] res_bad_bpp
[18:10:36] [PASSED] res_bad_refresh
[18:10:36] [PASSED] res_bpp_refresh_force_on_off
[18:10:36] [PASSED] res_invalid_mode
[18:10:36] [PASSED] res_bpp_wrong_place_mode
[18:10:36] [PASSED] name_bpp_refresh
[18:10:36] [PASSED] name_refresh
[18:10:36] [PASSED] name_refresh_wrong_mode
[18:10:36] [PASSED] name_refresh_invalid_mode
[18:10:36] [PASSED] rotate_multiple
[18:10:36] [PASSED] rotate_invalid_val
[18:10:36] [PASSED] rotate_truncated
[18:10:36] [PASSED] invalid_option
[18:10:36] [PASSED] invalid_tv_option
[18:10:36] [PASSED] truncated_tv_option
[18:10:36] ============ [PASSED] drm_test_cmdline_invalid =============
[18:10:36] =============== drm_test_cmdline_tv_options ===============
[18:10:36] [PASSED] NTSC
[18:10:36] [PASSED] NTSC_443
[18:10:36] [PASSED] NTSC_J
[18:10:36] [PASSED] PAL
[18:10:36] [PASSED] PAL_M
[18:10:36] [PASSED] PAL_N
[18:10:36] [PASSED] SECAM
[18:10:36] [PASSED] MONO_525
[18:10:36] [PASSED] MONO_625
[18:10:36] =========== [PASSED] drm_test_cmdline_tv_options ===========
[18:10:36] =============== [PASSED] drm_cmdline_parser ================
[18:10:36] ========== drmm_connector_hdmi_init (20 subtests) ==========
[18:10:36] [PASSED] drm_test_connector_hdmi_init_valid
[18:10:36] [PASSED] drm_test_connector_hdmi_init_bpc_8
[18:10:36] [PASSED] drm_test_connector_hdmi_init_bpc_10
[18:10:36] [PASSED] drm_test_connector_hdmi_init_bpc_12
[18:10:36] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[18:10:36] [PASSED] drm_test_connector_hdmi_init_bpc_null
[18:10:36] [PASSED] drm_test_connector_hdmi_init_formats_empty
[18:10:36] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[18:10:36] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[18:10:36] [PASSED] supported_formats=0x9 yuv420_allowed=1
[18:10:36] [PASSED] supported_formats=0x9 yuv420_allowed=0
[18:10:36] [PASSED] supported_formats=0x3 yuv420_allowed=1
[18:10:36] [PASSED] supported_formats=0x3 yuv420_allowed=0
[18:10:36] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[18:10:36] [PASSED] drm_test_connector_hdmi_init_null_ddc
[18:10:36] [PASSED] drm_test_connector_hdmi_init_null_product
[18:10:36] [PASSED] drm_test_connector_hdmi_init_null_vendor
[18:10:36] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[18:10:36] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[18:10:36] [PASSED] drm_test_connector_hdmi_init_product_valid
[18:10:36] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[18:10:36] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[18:10:36] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[18:10:36] ========= drm_test_connector_hdmi_init_type_valid =========
[18:10:36] [PASSED] HDMI-A
[18:10:36] [PASSED] HDMI-B
[18:10:36] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[18:10:36] ======== drm_test_connector_hdmi_init_type_invalid ========
[18:10:36] [PASSED] Unknown
[18:10:36] [PASSED] VGA
[18:10:36] [PASSED] DVI-I
[18:10:36] [PASSED] DVI-D
[18:10:36] [PASSED] DVI-A
[18:10:36] [PASSED] Composite
[18:10:36] [PASSED] SVIDEO
[18:10:36] [PASSED] LVDS
[18:10:36] [PASSED] Component
[18:10:36] [PASSED] DIN
[18:10:36] [PASSED] DP
[18:10:36] [PASSED] TV
[18:10:36] [PASSED] eDP
[18:10:36] [PASSED] Virtual
[18:10:36] [PASSED] DSI
[18:10:36] [PASSED] DPI
[18:10:36] [PASSED] Writeback
[18:10:36] [PASSED] SPI
[18:10:36] [PASSED] USB
[18:10:36] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[18:10:36] ============ [PASSED] drmm_connector_hdmi_init =============
[18:10:36] ============= drmm_connector_init (3 subtests) =============
[18:10:36] [PASSED] drm_test_drmm_connector_init
[18:10:36] [PASSED] drm_test_drmm_connector_init_null_ddc
[18:10:36] ========= drm_test_drmm_connector_init_type_valid =========
[18:10:36] [PASSED] Unknown
[18:10:36] [PASSED] VGA
[18:10:36] [PASSED] DVI-I
[18:10:36] [PASSED] DVI-D
[18:10:36] [PASSED] DVI-A
[18:10:36] [PASSED] Composite
[18:10:36] [PASSED] SVIDEO
[18:10:36] [PASSED] LVDS
[18:10:36] [PASSED] Component
[18:10:36] [PASSED] DIN
[18:10:36] [PASSED] DP
[18:10:36] [PASSED] HDMI-A
[18:10:36] [PASSED] HDMI-B
[18:10:36] [PASSED] TV
[18:10:36] [PASSED] eDP
[18:10:36] [PASSED] Virtual
[18:10:36] [PASSED] DSI
[18:10:36] [PASSED] DPI
[18:10:36] [PASSED] Writeback
[18:10:36] [PASSED] SPI
[18:10:36] [PASSED] USB
[18:10:36] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[18:10:36] =============== [PASSED] drmm_connector_init ===============
[18:10:36] ========= drm_connector_dynamic_init (6 subtests) ==========
[18:10:36] [PASSED] drm_test_drm_connector_dynamic_init
[18:10:36] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[18:10:36] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[18:10:36] [PASSED] drm_test_drm_connector_dynamic_init_properties
[18:10:36] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[18:10:36] [PASSED] Unknown
[18:10:36] [PASSED] VGA
[18:10:36] [PASSED] DVI-I
[18:10:36] [PASSED] DVI-D
[18:10:36] [PASSED] DVI-A
[18:10:36] [PASSED] Composite
[18:10:36] [PASSED] SVIDEO
[18:10:36] [PASSED] LVDS
[18:10:36] [PASSED] Component
[18:10:36] [PASSED] DIN
[18:10:36] [PASSED] DP
[18:10:36] [PASSED] HDMI-A
[18:10:36] [PASSED] HDMI-B
[18:10:36] [PASSED] TV
[18:10:36] [PASSED] eDP
[18:10:36] [PASSED] Virtual
[18:10:36] [PASSED] DSI
[18:10:36] [PASSED] DPI
[18:10:36] [PASSED] Writeback
[18:10:36] [PASSED] SPI
[18:10:36] [PASSED] USB
[18:10:36] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[18:10:36] ======== drm_test_drm_connector_dynamic_init_name =========
[18:10:36] [PASSED] Unknown
[18:10:36] [PASSED] VGA
[18:10:36] [PASSED] DVI-I
[18:10:36] [PASSED] DVI-D
[18:10:36] [PASSED] DVI-A
[18:10:36] [PASSED] Composite
[18:10:36] [PASSED] SVIDEO
[18:10:36] [PASSED] LVDS
[18:10:36] [PASSED] Component
[18:10:36] [PASSED] DIN
[18:10:36] [PASSED] DP
[18:10:36] [PASSED] HDMI-A
[18:10:36] [PASSED] HDMI-B
[18:10:36] [PASSED] TV
[18:10:36] [PASSED] eDP
[18:10:36] [PASSED] Virtual
[18:10:36] [PASSED] DSI
[18:10:36] [PASSED] DPI
[18:10:36] [PASSED] Writeback
[18:10:36] [PASSED] SPI
[18:10:36] [PASSED] USB
[18:10:36] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[18:10:36] =========== [PASSED] drm_connector_dynamic_init ============
[18:10:36] ==== drm_connector_dynamic_register_early (4 subtests) =====
[18:10:36] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[18:10:36] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[18:10:36] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[18:10:36] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[18:10:36] ====== [PASSED] drm_connector_dynamic_register_early =======
[18:10:36] ======= drm_connector_dynamic_register (7 subtests) ========
[18:10:36] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[18:10:36] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[18:10:36] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[18:10:36] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[18:10:36] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[18:10:36] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[18:10:36] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[18:10:36] ========= [PASSED] drm_connector_dynamic_register ==========
[18:10:36] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[18:10:36] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[18:10:36] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[18:10:36] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[18:10:36] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[18:10:36] ========== drm_test_get_tv_mode_from_name_valid ===========
[18:10:36] [PASSED] NTSC
[18:10:36] [PASSED] NTSC-443
[18:10:36] [PASSED] NTSC-J
[18:10:36] [PASSED] PAL
[18:10:36] [PASSED] PAL-M
[18:10:36] [PASSED] PAL-N
[18:10:36] [PASSED] SECAM
[18:10:36] [PASSED] Mono
[18:10:36] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[18:10:36] [PASSED] drm_test_get_tv_mode_from_name_truncated
[18:10:36] ============ [PASSED] drm_get_tv_mode_from_name ============
[18:10:36] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[18:10:36] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[18:10:36] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[18:10:36] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[18:10:36] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[18:10:36] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[18:10:36] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[18:10:36] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[18:10:36] [PASSED] VIC 96
[18:10:36] [PASSED] VIC 97
[18:10:36] [PASSED] VIC 101
[18:10:36] [PASSED] VIC 102
[18:10:36] [PASSED] VIC 106
[18:10:36] [PASSED] VIC 107
[18:10:36] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[18:10:36] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[18:10:36] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[18:10:36] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[18:10:36] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[18:10:36] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[18:10:36] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[18:10:36] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[18:10:36] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[18:10:36] [PASSED] Automatic
[18:10:36] [PASSED] Full
[18:10:36] [PASSED] Limited 16:235
[18:10:36] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[18:10:36] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[18:10:36] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[18:10:36] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[18:10:36] === drm_test_drm_hdmi_connector_get_output_format_name ====
[18:10:36] [PASSED] RGB
[18:10:36] [PASSED] YUV 4:2:0
[18:10:36] [PASSED] YUV 4:2:2
[18:10:36] [PASSED] YUV 4:4:4
[18:10:36] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[18:10:36] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[18:10:36] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[18:10:36] ============= drm_damage_helper (21 subtests) ==============
[18:10:36] [PASSED] drm_test_damage_iter_no_damage
[18:10:36] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[18:10:36] [PASSED] drm_test_damage_iter_no_damage_src_moved
[18:10:36] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[18:10:36] [PASSED] drm_test_damage_iter_no_damage_not_visible
[18:10:36] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[18:10:36] [PASSED] drm_test_damage_iter_no_damage_no_fb
[18:10:36] [PASSED] drm_test_damage_iter_simple_damage
[18:10:36] [PASSED] drm_test_damage_iter_single_damage
[18:10:36] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[18:10:36] [PASSED] drm_test_damage_iter_single_damage_outside_src
[18:10:36] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[18:10:36] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[18:10:36] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[18:10:36] [PASSED] drm_test_damage_iter_single_damage_src_moved
[18:10:36] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[18:10:36] [PASSED] drm_test_damage_iter_damage
[18:10:36] [PASSED] drm_test_damage_iter_damage_one_intersect
[18:10:36] [PASSED] drm_test_damage_iter_damage_one_outside
[18:10:36] [PASSED] drm_test_damage_iter_damage_src_moved
[18:10:36] [PASSED] drm_test_damage_iter_damage_not_visible
[18:10:36] ================ [PASSED] drm_damage_helper ================
[18:10:36] ============== drm_dp_mst_helper (3 subtests) ==============
[18:10:36] ============== drm_test_dp_mst_calc_pbn_mode ==============
[18:10:36] [PASSED] Clock 154000 BPP 30 DSC disabled
[18:10:36] [PASSED] Clock 234000 BPP 30 DSC disabled
[18:10:36] [PASSED] Clock 297000 BPP 24 DSC disabled
[18:10:36] [PASSED] Clock 332880 BPP 24 DSC enabled
[18:10:36] [PASSED] Clock 324540 BPP 24 DSC enabled
[18:10:36] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[18:10:36] ============== drm_test_dp_mst_calc_pbn_div ===============
[18:10:36] [PASSED] Link rate 2000000 lane count 4
[18:10:36] [PASSED] Link rate 2000000 lane count 2
[18:10:36] [PASSED] Link rate 2000000 lane count 1
[18:10:36] [PASSED] Link rate 1350000 lane count 4
[18:10:36] [PASSED] Link rate 1350000 lane count 2
[18:10:36] [PASSED] Link rate 1350000 lane count 1
[18:10:36] [PASSED] Link rate 1000000 lane count 4
[18:10:36] [PASSED] Link rate 1000000 lane count 2
[18:10:36] [PASSED] Link rate 1000000 lane count 1
[18:10:36] [PASSED] Link rate 810000 lane count 4
[18:10:36] [PASSED] Link rate 810000 lane count 2
[18:10:36] [PASSED] Link rate 810000 lane count 1
[18:10:36] [PASSED] Link rate 540000 lane count 4
[18:10:36] [PASSED] Link rate 540000 lane count 2
[18:10:36] [PASSED] Link rate 540000 lane count 1
[18:10:36] [PASSED] Link rate 270000 lane count 4
[18:10:36] [PASSED] Link rate 270000 lane count 2
[18:10:36] [PASSED] Link rate 270000 lane count 1
[18:10:36] [PASSED] Link rate 162000 lane count 4
[18:10:36] [PASSED] Link rate 162000 lane count 2
[18:10:36] [PASSED] Link rate 162000 lane count 1
[18:10:36] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[18:10:36] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[18:10:36] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[18:10:36] [PASSED] DP_POWER_UP_PHY with port number
[18:10:36] [PASSED] DP_POWER_DOWN_PHY with port number
[18:10:36] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[18:10:36] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[18:10:36] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[18:10:36] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[18:10:36] [PASSED] DP_QUERY_PAYLOAD with port number
[18:10:36] [PASSED] DP_QUERY_PAYLOAD with VCPI
[18:10:36] [PASSED] DP_REMOTE_DPCD_READ with port number
[18:10:36] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[18:10:36] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[18:10:36] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[18:10:36] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[18:10:36] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[18:10:36] [PASSED] DP_REMOTE_I2C_READ with port number
[18:10:36] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[18:10:36] [PASSED] DP_REMOTE_I2C_READ with transactions array
[18:10:36] [PASSED] DP_REMOTE_I2C_WRITE with port number
[18:10:36] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[18:10:36] [PASSED] DP_REMOTE_I2C_WRITE with data array
[18:10:36] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[18:10:36] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[18:10:36] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[18:10:36] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[18:10:36] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[18:10:36] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[18:10:36] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[18:10:36] ================ [PASSED] drm_dp_mst_helper ================
[18:10:36] ================== drm_exec (7 subtests) ===================
[18:10:36] [PASSED] sanitycheck
[18:10:36] [PASSED] test_lock
[18:10:36] [PASSED] test_lock_unlock
[18:10:36] [PASSED] test_duplicates
[18:10:36] [PASSED] test_prepare
[18:10:36] [PASSED] test_prepare_array
[18:10:36] [PASSED] test_multiple_loops
[18:10:36] ==================== [PASSED] drm_exec =====================
[18:10:36] =========== drm_format_helper_test (17 subtests) ===========
[18:10:36] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[18:10:36] [PASSED] single_pixel_source_buffer
[18:10:36] [PASSED] single_pixel_clip_rectangle
[18:10:36] [PASSED] well_known_colors
[18:10:36] [PASSED] destination_pitch
[18:10:36] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[18:10:36] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[18:10:36] [PASSED] single_pixel_source_buffer
[18:10:36] [PASSED] single_pixel_clip_rectangle
[18:10:36] [PASSED] well_known_colors
[18:10:36] [PASSED] destination_pitch
[18:10:36] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[18:10:36] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[18:10:36] [PASSED] single_pixel_source_buffer
[18:10:36] [PASSED] single_pixel_clip_rectangle
[18:10:36] [PASSED] well_known_colors
[18:10:36] [PASSED] destination_pitch
[18:10:36] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[18:10:36] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[18:10:36] [PASSED] single_pixel_source_buffer
[18:10:36] [PASSED] single_pixel_clip_rectangle
[18:10:36] [PASSED] well_known_colors
[18:10:36] [PASSED] destination_pitch
[18:10:36] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[18:10:36] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[18:10:36] [PASSED] single_pixel_source_buffer
[18:10:36] [PASSED] single_pixel_clip_rectangle
[18:10:36] [PASSED] well_known_colors
[18:10:36] [PASSED] destination_pitch
[18:10:36] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[18:10:36] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[18:10:36] [PASSED] single_pixel_source_buffer
[18:10:36] [PASSED] single_pixel_clip_rectangle
[18:10:36] [PASSED] well_known_colors
[18:10:36] [PASSED] destination_pitch
[18:10:36] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[18:10:36] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[18:10:36] [PASSED] single_pixel_source_buffer
[18:10:36] [PASSED] single_pixel_clip_rectangle
[18:10:36] [PASSED] well_known_colors
[18:10:36] [PASSED] destination_pitch
[18:10:36] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[18:10:36] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[18:10:36] [PASSED] single_pixel_source_buffer
[18:10:36] [PASSED] single_pixel_clip_rectangle
[18:10:36] [PASSED] well_known_colors
[18:10:36] [PASSED] destination_pitch
[18:10:36] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[18:10:36] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[18:10:36] [PASSED] single_pixel_source_buffer
[18:10:36] [PASSED] single_pixel_clip_rectangle
[18:10:36] [PASSED] well_known_colors
[18:10:36] [PASSED] destination_pitch
[18:10:36] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[18:10:36] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[18:10:36] [PASSED] single_pixel_source_buffer
[18:10:36] [PASSED] single_pixel_clip_rectangle
[18:10:36] [PASSED] well_known_colors
[18:10:36] [PASSED] destination_pitch
[18:10:36] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[18:10:36] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[18:10:36] [PASSED] single_pixel_source_buffer
[18:10:36] [PASSED] single_pixel_clip_rectangle
[18:10:36] [PASSED] well_known_colors
[18:10:36] [PASSED] destination_pitch
[18:10:36] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[18:10:36] ============== drm_test_fb_xrgb8888_to_mono ===============
[18:10:36] [PASSED] single_pixel_source_buffer
[18:10:36] [PASSED] single_pixel_clip_rectangle
[18:10:36] [PASSED] well_known_colors
[18:10:36] [PASSED] destination_pitch
[18:10:36] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[18:10:36] ==================== drm_test_fb_swab =====================
[18:10:36] [PASSED] single_pixel_source_buffer
[18:10:36] [PASSED] single_pixel_clip_rectangle
[18:10:36] [PASSED] well_known_colors
[18:10:36] [PASSED] destination_pitch
[18:10:36] ================ [PASSED] drm_test_fb_swab =================
[18:10:36] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[18:10:36] [PASSED] single_pixel_source_buffer
[18:10:36] [PASSED] single_pixel_clip_rectangle
[18:10:36] [PASSED] well_known_colors
[18:10:36] [PASSED] destination_pitch
[18:10:36] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[18:10:36] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[18:10:36] [PASSED] single_pixel_source_buffer
[18:10:36] [PASSED] single_pixel_clip_rectangle
[18:10:36] [PASSED] well_known_colors
[18:10:36] [PASSED] destination_pitch
[18:10:36] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[18:10:36] ================= drm_test_fb_clip_offset =================
[18:10:36] [PASSED] pass through
[18:10:36] [PASSED] horizontal offset
[18:10:36] [PASSED] vertical offset
[18:10:36] [PASSED] horizontal and vertical offset
[18:10:36] [PASSED] horizontal offset (custom pitch)
[18:10:36] [PASSED] vertical offset (custom pitch)
[18:10:36] [PASSED] horizontal and vertical offset (custom pitch)
[18:10:36] ============= [PASSED] drm_test_fb_clip_offset =============
[18:10:36] =================== drm_test_fb_memcpy ====================
[18:10:36] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[18:10:36] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[18:10:36] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[18:10:36] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[18:10:36] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[18:10:36] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[18:10:36] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[18:10:36] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[18:10:36] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[18:10:36] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[18:10:36] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[18:10:36] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[18:10:36] =============== [PASSED] drm_test_fb_memcpy ================
[18:10:36] ============= [PASSED] drm_format_helper_test ==============
[18:10:36] ================= drm_format (18 subtests) =================
[18:10:36] [PASSED] drm_test_format_block_width_invalid
[18:10:36] [PASSED] drm_test_format_block_width_one_plane
[18:10:36] [PASSED] drm_test_format_block_width_two_plane
[18:10:36] [PASSED] drm_test_format_block_width_three_plane
[18:10:36] [PASSED] drm_test_format_block_width_tiled
[18:10:36] [PASSED] drm_test_format_block_height_invalid
[18:10:36] [PASSED] drm_test_format_block_height_one_plane
[18:10:36] [PASSED] drm_test_format_block_height_two_plane
[18:10:36] [PASSED] drm_test_format_block_height_three_plane
[18:10:36] [PASSED] drm_test_format_block_height_tiled
[18:10:36] [PASSED] drm_test_format_min_pitch_invalid
[18:10:36] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[18:10:36] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[18:10:36] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[18:10:36] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[18:10:36] [PASSED] drm_test_format_min_pitch_two_plane
[18:10:36] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[18:10:36] [PASSED] drm_test_format_min_pitch_tiled
[18:10:36] =================== [PASSED] drm_format ====================
[18:10:36] ============== drm_framebuffer (10 subtests) ===============
[18:10:36] ========== drm_test_framebuffer_check_src_coords ==========
[18:10:36] [PASSED] Success: source fits into fb
[18:10:36] [PASSED] Fail: overflowing fb with x-axis coordinate
[18:10:36] [PASSED] Fail: overflowing fb with y-axis coordinate
[18:10:36] [PASSED] Fail: overflowing fb with source width
[18:10:36] [PASSED] Fail: overflowing fb with source height
[18:10:36] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[18:10:36] [PASSED] drm_test_framebuffer_cleanup
[18:10:36] =============== drm_test_framebuffer_create ===============
[18:10:36] [PASSED] ABGR8888 normal sizes
[18:10:36] [PASSED] ABGR8888 max sizes
[18:10:36] [PASSED] ABGR8888 pitch greater than min required
[18:10:36] [PASSED] ABGR8888 pitch less than min required
[18:10:36] [PASSED] ABGR8888 Invalid width
[18:10:36] [PASSED] ABGR8888 Invalid buffer handle
[18:10:36] [PASSED] No pixel format
[18:10:36] [PASSED] ABGR8888 Width 0
[18:10:36] [PASSED] ABGR8888 Height 0
[18:10:36] [PASSED] ABGR8888 Out of bound height * pitch combination
[18:10:36] [PASSED] ABGR8888 Large buffer offset
[18:10:36] [PASSED] ABGR8888 Buffer offset for inexistent plane
[18:10:36] [PASSED] ABGR8888 Invalid flag
[18:10:36] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[18:10:36] [PASSED] ABGR8888 Valid buffer modifier
[18:10:36] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[18:10:36] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[18:10:36] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[18:10:36] [PASSED] NV12 Normal sizes
[18:10:36] [PASSED] NV12 Max sizes
[18:10:36] [PASSED] NV12 Invalid pitch
[18:10:36] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[18:10:36] [PASSED] NV12 different modifier per-plane
[18:10:36] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[18:10:36] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[18:10:36] [PASSED] NV12 Modifier for inexistent plane
[18:10:36] [PASSED] NV12 Handle for inexistent plane
[18:10:36] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[18:10:36] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[18:10:36] [PASSED] YVU420 Normal sizes
[18:10:36] [PASSED] YVU420 Max sizes
[18:10:36] [PASSED] YVU420 Invalid pitch
[18:10:36] [PASSED] YVU420 Different pitches
[18:10:36] [PASSED] YVU420 Different buffer offsets/pitches
[18:10:36] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[18:10:36] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[18:10:36] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[18:10:36] [PASSED] YVU420 Valid modifier
[18:10:36] [PASSED] YVU420 Different modifiers per plane
[18:10:36] [PASSED] YVU420 Modifier for inexistent plane
[18:10:36] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[18:10:36] [PASSED] X0L2 Normal sizes
[18:10:36] [PASSED] X0L2 Max sizes
[18:10:36] [PASSED] X0L2 Invalid pitch
[18:10:36] [PASSED] X0L2 Pitch greater than minimum required
[18:10:36] [PASSED] X0L2 Handle for inexistent plane
[18:10:36] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[18:10:36] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[18:10:36] [PASSED] X0L2 Valid modifier
[18:10:36] [PASSED] X0L2 Modifier for inexistent plane
[18:10:36] =========== [PASSED] drm_test_framebuffer_create ===========
[18:10:36] [PASSED] drm_test_framebuffer_free
[18:10:36] [PASSED] drm_test_framebuffer_init
[18:10:36] [PASSED] drm_test_framebuffer_init_bad_format
[18:10:36] [PASSED] drm_test_framebuffer_init_dev_mismatch
[18:10:36] [PASSED] drm_test_framebuffer_lookup
[18:10:36] [PASSED] drm_test_framebuffer_lookup_inexistent
[18:10:36] [PASSED] drm_test_framebuffer_modifiers_not_supported
[18:10:36] ================= [PASSED] drm_framebuffer =================
[18:10:36] ================ drm_gem_shmem (8 subtests) ================
[18:10:36] [PASSED] drm_gem_shmem_test_obj_create
[18:10:36] [PASSED] drm_gem_shmem_test_obj_create_private
[18:10:36] [PASSED] drm_gem_shmem_test_pin_pages
[18:10:36] [PASSED] drm_gem_shmem_test_vmap
[18:10:36] [PASSED] drm_gem_shmem_test_get_sg_table
[18:10:36] [PASSED] drm_gem_shmem_test_get_pages_sgt
[18:10:36] [PASSED] drm_gem_shmem_test_madvise
[18:10:36] [PASSED] drm_gem_shmem_test_purge
[18:10:36] ================== [PASSED] drm_gem_shmem ==================
[18:10:36] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[18:10:36] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[18:10:36] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[18:10:36] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[18:10:36] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[18:10:36] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[18:10:36] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[18:10:36] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[18:10:36] [PASSED] Automatic
[18:10:36] [PASSED] Full
[18:10:36] [PASSED] Limited 16:235
[18:10:36] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[18:10:36] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[18:10:36] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[18:10:36] [PASSED] drm_test_check_disable_connector
[18:10:36] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[18:10:36] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[18:10:36] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[18:10:36] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[18:10:36] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[18:10:36] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[18:10:36] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[18:10:36] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[18:10:36] [PASSED] drm_test_check_output_bpc_dvi
[18:10:36] [PASSED] drm_test_check_output_bpc_format_vic_1
[18:10:36] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[18:10:36] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[18:10:36] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[18:10:36] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[18:10:36] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[18:10:36] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[18:10:36] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[18:10:36] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[18:10:36] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[18:10:36] [PASSED] drm_test_check_broadcast_rgb_value
[18:10:36] [PASSED] drm_test_check_bpc_8_value
[18:10:36] [PASSED] drm_test_check_bpc_10_value
[18:10:36] [PASSED] drm_test_check_bpc_12_value
[18:10:36] [PASSED] drm_test_check_format_value
[18:10:36] [PASSED] drm_test_check_tmds_char_value
[18:10:36] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[18:10:36] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[18:10:36] [PASSED] drm_test_check_mode_valid
[18:10:36] [PASSED] drm_test_check_mode_valid_reject
[18:10:36] [PASSED] drm_test_check_mode_valid_reject_rate
[18:10:36] [PASSED] drm_test_check_mode_valid_reject_max_clock
[18:10:36] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[18:10:36] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[18:10:36] [PASSED] drm_test_check_infoframes
[18:10:36] [PASSED] drm_test_check_reject_avi_infoframe
[18:10:36] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[18:10:36] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[18:10:36] [PASSED] drm_test_check_reject_audio_infoframe
[18:10:36] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[18:10:36] ================= drm_managed (2 subtests) =================
[18:10:36] [PASSED] drm_test_managed_release_action
[18:10:36] [PASSED] drm_test_managed_run_action
[18:10:36] =================== [PASSED] drm_managed ===================
[18:10:36] =================== drm_mm (6 subtests) ====================
[18:10:36] [PASSED] drm_test_mm_init
[18:10:36] [PASSED] drm_test_mm_debug
[18:10:36] [PASSED] drm_test_mm_align32
[18:10:36] [PASSED] drm_test_mm_align64
[18:10:36] [PASSED] drm_test_mm_lowest
[18:10:36] [PASSED] drm_test_mm_highest
[18:10:36] ===================== [PASSED] drm_mm ======================
[18:10:36] ============= drm_modes_analog_tv (5 subtests) =============
[18:10:36] [PASSED] drm_test_modes_analog_tv_mono_576i
[18:10:36] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[18:10:36] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[18:10:36] [PASSED] drm_test_modes_analog_tv_pal_576i
[18:10:36] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[18:10:36] =============== [PASSED] drm_modes_analog_tv ===============
[18:10:36] ============== drm_plane_helper (2 subtests) ===============
[18:10:36] =============== drm_test_check_plane_state ================
[18:10:36] [PASSED] clipping_simple
[18:10:36] [PASSED] clipping_rotate_reflect
[18:10:36] [PASSED] positioning_simple
[18:10:36] [PASSED] upscaling
[18:10:36] [PASSED] downscaling
[18:10:36] [PASSED] rounding1
[18:10:36] [PASSED] rounding2
[18:10:36] [PASSED] rounding3
[18:10:36] [PASSED] rounding4
[18:10:36] =========== [PASSED] drm_test_check_plane_state ============
[18:10:36] =========== drm_test_check_invalid_plane_state ============
[18:10:36] [PASSED] positioning_invalid
[18:10:36] [PASSED] upscaling_invalid
[18:10:36] [PASSED] downscaling_invalid
[18:10:36] ======= [PASSED] drm_test_check_invalid_plane_state ========
[18:10:36] ================ [PASSED] drm_plane_helper =================
[18:10:36] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[18:10:36] ====== drm_test_connector_helper_tv_get_modes_check =======
[18:10:36] [PASSED] None
[18:10:36] [PASSED] PAL
[18:10:36] [PASSED] NTSC
[18:10:36] [PASSED] Both, NTSC Default
[18:10:36] [PASSED] Both, PAL Default
[18:10:36] [PASSED] Both, NTSC Default, with PAL on command-line
[18:10:36] [PASSED] Both, PAL Default, with NTSC on command-line
[18:10:36] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[18:10:36] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[18:10:36] ================== drm_rect (9 subtests) ===================
[18:10:36] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[18:10:36] [PASSED] drm_test_rect_clip_scaled_not_clipped
[18:10:36] [PASSED] drm_test_rect_clip_scaled_clipped
[18:10:36] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[18:10:36] ================= drm_test_rect_intersect =================
[18:10:36] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[18:10:36] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[18:10:36] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[18:10:36] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[18:10:36] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[18:10:36] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[18:10:36] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[18:10:36] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[18:10:36] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[18:10:36] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[18:10:36] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[18:10:36] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[18:10:36] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[18:10:36] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[18:10:36] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
stty: 'standard input': Inappropriate ioctl for device
[18:10:36] ============= [PASSED] drm_test_rect_intersect =============
[18:10:36] ================ drm_test_rect_calc_hscale ================
[18:10:36] [PASSED] normal use
[18:10:36] [PASSED] out of max range
[18:10:36] [PASSED] out of min range
[18:10:36] [PASSED] zero dst
[18:10:36] [PASSED] negative src
[18:10:36] [PASSED] negative dst
[18:10:36] ============ [PASSED] drm_test_rect_calc_hscale ============
[18:10:36] ================ drm_test_rect_calc_vscale ================
[18:10:36] [PASSED] normal use
[18:10:36] [PASSED] out of max range
[18:10:36] [PASSED] out of min range
[18:10:36] [PASSED] zero dst
[18:10:36] [PASSED] negative src
[18:10:36] [PASSED] negative dst
[18:10:36] ============ [PASSED] drm_test_rect_calc_vscale ============
[18:10:36] ================== drm_test_rect_rotate ===================
[18:10:36] [PASSED] reflect-x
[18:10:36] [PASSED] reflect-y
[18:10:36] [PASSED] rotate-0
[18:10:36] [PASSED] rotate-90
[18:10:36] [PASSED] rotate-180
[18:10:36] [PASSED] rotate-270
[18:10:36] ============== [PASSED] drm_test_rect_rotate ===============
[18:10:36] ================ drm_test_rect_rotate_inv =================
[18:10:36] [PASSED] reflect-x
[18:10:36] [PASSED] reflect-y
[18:10:36] [PASSED] rotate-0
[18:10:36] [PASSED] rotate-90
[18:10:36] [PASSED] rotate-180
[18:10:36] [PASSED] rotate-270
[18:10:36] ============ [PASSED] drm_test_rect_rotate_inv =============
[18:10:36] ==================== [PASSED] drm_rect =====================
[18:10:36] ============ drm_sysfb_modeset_test (1 subtest) ============
[18:10:36] ============ drm_test_sysfb_build_fourcc_list =============
[18:10:36] [PASSED] no native formats
[18:10:36] [PASSED] XRGB8888 as native format
[18:10:36] [PASSED] remove duplicates
[18:10:36] [PASSED] convert alpha formats
[18:10:36] [PASSED] random formats
[18:10:36] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[18:10:36] ============= [PASSED] drm_sysfb_modeset_test ==============
[18:10:36] ================== drm_fixp (2 subtests) ===================
[18:10:36] [PASSED] drm_test_int2fixp
[18:10:36] [PASSED] drm_test_sm2fixp
[18:10:36] ==================== [PASSED] drm_fixp =====================
[18:10:36] ============================================================
[18:10:36] Testing complete. Ran 630 tests: passed: 630
[18:10:36] Elapsed time: 27.455s total, 1.551s configuring, 25.436s building, 0.426s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[18:10:36] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:10:38] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:10:47] Starting KUnit Kernel (1/1)...
[18:10:47] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:10:47] ================= ttm_device (5 subtests) ==================
[18:10:47] [PASSED] ttm_device_init_basic
[18:10:47] [PASSED] ttm_device_init_multiple
[18:10:47] [PASSED] ttm_device_fini_basic
[18:10:47] [PASSED] ttm_device_init_no_vma_man
[18:10:47] ================== ttm_device_init_pools ==================
[18:10:47] [PASSED] No DMA allocations, no DMA32 required
[18:10:47] [PASSED] DMA allocations, DMA32 required
[18:10:47] [PASSED] No DMA allocations, DMA32 required
[18:10:47] [PASSED] DMA allocations, no DMA32 required
[18:10:47] ============== [PASSED] ttm_device_init_pools ==============
[18:10:47] =================== [PASSED] ttm_device ====================
[18:10:47] ================== ttm_pool (8 subtests) ===================
[18:10:47] ================== ttm_pool_alloc_basic ===================
[18:10:47] [PASSED] One page
[18:10:47] [PASSED] More than one page
[18:10:47] [PASSED] Above the allocation limit
[18:10:47] [PASSED] One page, with coherent DMA mappings enabled
[18:10:47] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:10:47] ============== [PASSED] ttm_pool_alloc_basic ===============
[18:10:47] ============== ttm_pool_alloc_basic_dma_addr ==============
[18:10:47] [PASSED] One page
[18:10:47] [PASSED] More than one page
[18:10:47] [PASSED] Above the allocation limit
[18:10:47] [PASSED] One page, with coherent DMA mappings enabled
[18:10:47] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:10:47] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[18:10:47] [PASSED] ttm_pool_alloc_order_caching_match
[18:10:47] [PASSED] ttm_pool_alloc_caching_mismatch
[18:10:47] [PASSED] ttm_pool_alloc_order_mismatch
[18:10:47] [PASSED] ttm_pool_free_dma_alloc
[18:10:47] [PASSED] ttm_pool_free_no_dma_alloc
[18:10:47] [PASSED] ttm_pool_fini_basic
[18:10:47] ==================== [PASSED] ttm_pool =====================
[18:10:47] ================ ttm_resource (8 subtests) =================
[18:10:47] ================= ttm_resource_init_basic =================
[18:10:47] [PASSED] Init resource in TTM_PL_SYSTEM
[18:10:47] [PASSED] Init resource in TTM_PL_VRAM
[18:10:47] [PASSED] Init resource in a private placement
[18:10:47] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[18:10:47] ============= [PASSED] ttm_resource_init_basic =============
[18:10:47] [PASSED] ttm_resource_init_pinned
[18:10:47] [PASSED] ttm_resource_fini_basic
[18:10:47] [PASSED] ttm_resource_manager_init_basic
[18:10:47] [PASSED] ttm_resource_manager_usage_basic
[18:10:47] [PASSED] ttm_resource_manager_set_used_basic
[18:10:47] [PASSED] ttm_sys_man_alloc_basic
[18:10:47] [PASSED] ttm_sys_man_free_basic
[18:10:47] ================== [PASSED] ttm_resource ===================
[18:10:47] =================== ttm_tt (15 subtests) ===================
[18:10:47] ==================== ttm_tt_init_basic ====================
[18:10:47] [PASSED] Page-aligned size
[18:10:47] [PASSED] Extra pages requested
[18:10:47] ================ [PASSED] ttm_tt_init_basic ================
[18:10:47] [PASSED] ttm_tt_init_misaligned
[18:10:47] [PASSED] ttm_tt_fini_basic
[18:10:47] [PASSED] ttm_tt_fini_sg
[18:10:47] [PASSED] ttm_tt_fini_shmem
[18:10:47] [PASSED] ttm_tt_create_basic
[18:10:47] [PASSED] ttm_tt_create_invalid_bo_type
[18:10:47] [PASSED] ttm_tt_create_ttm_exists
[18:10:47] [PASSED] ttm_tt_create_failed
[18:10:47] [PASSED] ttm_tt_destroy_basic
[18:10:47] [PASSED] ttm_tt_populate_null_ttm
[18:10:47] [PASSED] ttm_tt_populate_populated_ttm
[18:10:47] [PASSED] ttm_tt_unpopulate_basic
[18:10:47] [PASSED] ttm_tt_unpopulate_empty_ttm
[18:10:47] [PASSED] ttm_tt_swapin_basic
[18:10:47] ===================== [PASSED] ttm_tt ======================
[18:10:47] =================== ttm_bo (14 subtests) ===================
[18:10:47] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[18:10:47] [PASSED] Cannot be interrupted and sleeps
[18:10:47] [PASSED] Cannot be interrupted, locks straight away
[18:10:47] [PASSED] Can be interrupted, sleeps
[18:10:47] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[18:10:47] [PASSED] ttm_bo_reserve_locked_no_sleep
[18:10:47] [PASSED] ttm_bo_reserve_no_wait_ticket
[18:10:47] [PASSED] ttm_bo_reserve_double_resv
[18:10:47] [PASSED] ttm_bo_reserve_interrupted
[18:10:47] [PASSED] ttm_bo_reserve_deadlock
[18:10:47] [PASSED] ttm_bo_unreserve_basic
[18:10:47] [PASSED] ttm_bo_unreserve_pinned
[18:10:47] [PASSED] ttm_bo_unreserve_bulk
[18:10:47] [PASSED] ttm_bo_fini_basic
[18:10:47] [PASSED] ttm_bo_fini_shared_resv
[18:10:47] [PASSED] ttm_bo_pin_basic
[18:10:47] [PASSED] ttm_bo_pin_unpin_resource
[18:10:47] [PASSED] ttm_bo_multiple_pin_one_unpin
[18:10:47] ===================== [PASSED] ttm_bo ======================
[18:10:47] ============== ttm_bo_validate (21 subtests) ===============
[18:10:47] ============== ttm_bo_init_reserved_sys_man ===============
[18:10:47] [PASSED] Buffer object for userspace
[18:10:47] [PASSED] Kernel buffer object
[18:10:47] [PASSED] Shared buffer object
[18:10:47] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[18:10:47] ============== ttm_bo_init_reserved_mock_man ==============
[18:10:47] [PASSED] Buffer object for userspace
[18:10:47] [PASSED] Kernel buffer object
[18:10:47] [PASSED] Shared buffer object
[18:10:47] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[18:10:47] [PASSED] ttm_bo_init_reserved_resv
[18:10:47] ================== ttm_bo_validate_basic ==================
[18:10:47] [PASSED] Buffer object for userspace
[18:10:47] [PASSED] Kernel buffer object
[18:10:47] [PASSED] Shared buffer object
[18:10:47] ============== [PASSED] ttm_bo_validate_basic ==============
[18:10:47] [PASSED] ttm_bo_validate_invalid_placement
[18:10:47] ============= ttm_bo_validate_same_placement ==============
[18:10:47] [PASSED] System manager
[18:10:47] [PASSED] VRAM manager
[18:10:47] ========= [PASSED] ttm_bo_validate_same_placement ==========
[18:10:47] [PASSED] ttm_bo_validate_failed_alloc
[18:10:47] [PASSED] ttm_bo_validate_pinned
[18:10:47] [PASSED] ttm_bo_validate_busy_placement
[18:10:47] ================ ttm_bo_validate_multihop =================
[18:10:47] [PASSED] Buffer object for userspace
[18:10:47] [PASSED] Kernel buffer object
[18:10:47] [PASSED] Shared buffer object
[18:10:47] ============ [PASSED] ttm_bo_validate_multihop =============
[18:10:47] ========== ttm_bo_validate_no_placement_signaled ==========
[18:10:47] [PASSED] Buffer object in system domain, no page vector
[18:10:47] [PASSED] Buffer object in system domain with an existing page vector
[18:10:47] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[18:10:47] ======== ttm_bo_validate_no_placement_not_signaled ========
[18:10:47] [PASSED] Buffer object for userspace
[18:10:47] [PASSED] Kernel buffer object
[18:10:47] [PASSED] Shared buffer object
[18:10:47] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[18:10:47] [PASSED] ttm_bo_validate_move_fence_signaled
[18:10:48] ========= ttm_bo_validate_move_fence_not_signaled =========
[18:10:48] [PASSED] Waits for GPU
[18:10:48] [PASSED] Tries to lock straight away
[18:10:48] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[18:10:48] [PASSED] ttm_bo_validate_happy_evict
[18:10:48] [PASSED] ttm_bo_validate_all_pinned_evict
[18:10:48] [PASSED] ttm_bo_validate_allowed_only_evict
[18:10:48] [PASSED] ttm_bo_validate_deleted_evict
[18:10:48] [PASSED] ttm_bo_validate_busy_domain_evict
[18:10:48] [PASSED] ttm_bo_validate_evict_gutting
[18:10:48] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[18:10:48] ================= [PASSED] ttm_bo_validate =================
[18:10:48] ============================================================
[18:10:48] Testing complete. Ran 101 tests: passed: 101
[18:10:48] Elapsed time: 11.554s total, 1.687s configuring, 9.650s building, 0.183s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 8+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset (rev3)
2026-01-28 11:51 [PATCH v3 0/2] drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset Sk Anirban
` (3 preceding siblings ...)
2026-01-28 18:10 ` ✓ CI.KUnit: success " Patchwork
@ 2026-01-28 18:57 ` Patchwork
4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2026-01-28 18:57 UTC (permalink / raw)
To: Sk Anirban; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1569 bytes --]
== Series Details ==
Series: drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset (rev3)
URL : https://patchwork.freedesktop.org/series/160091/
State : success
== Summary ==
CI Bug Log - changes from xe-4465-8059f097e25f736bb3da09af6a9b283079abfd4f_BAT -> xe-pw-160091v3_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-160091v3_BAT that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@xe_waitfence@engine:
- bat-dg2-oem2: [FAIL][1] ([Intel XE#6519]) -> [PASS][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4465-8059f097e25f736bb3da09af6a9b283079abfd4f/bat-dg2-oem2/igt@xe_waitfence@engine.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160091v3/bat-dg2-oem2/igt@xe_waitfence@engine.html
[Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
Build changes
-------------
* IGT: IGT_8721 -> IGT_8723
* Linux: xe-4465-8059f097e25f736bb3da09af6a9b283079abfd4f -> xe-pw-160091v3
IGT_8721: 3707bb4267de22a18d61b232c4ab5fbaf61db90c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8723: 8723
xe-4465-8059f097e25f736bb3da09af6a9b283079abfd4f: 8059f097e25f736bb3da09af6a9b283079abfd4f
xe-pw-160091v3: 160091v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160091v3/index.html
[-- Attachment #2: Type: text/html, Size: 2148 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3 2/2] drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset
2026-01-28 11:51 ` [PATCH v3 2/2] drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset Sk Anirban
@ 2026-01-29 0:58 ` Daniele Ceraolo Spurio
2026-01-29 8:55 ` Anirban, Sk
0 siblings, 1 reply; 8+ messages in thread
From: Daniele Ceraolo Spurio @ 2026-01-29 0:58 UTC (permalink / raw)
To: Sk Anirban, intel-xe
Cc: anshuman.gupta, badal.nilawar, riana.tauro, karthik.poosa,
raag.jadav, soham.purkait, mallesh.koujalagi, vinay.belgaumkar,
nishanth.p.reddy, rodrigo.vivi, matthew.d.roper
On 1/28/2026 3:51 AM, Sk Anirban wrote:
> Prevent GuC firmware DMA failures during GuC-only reset by disabling
> idle flow and verifying SRAM handling completion. Without this, reset
> can be issued while SRAM handler is copying WOPCM to SRAM,
> causing GuC HW to get stuck.
>
> v2: Modify error message (Badal)
> Rename reg bit name (Daniele)
> Update WA skip condition (Daniele)
> Update SRAM handling logic (Daniele)
> v3: Reorder WA call (Badal)
> Wait for GuC ready status (Daniele)
>
> Signed-off-by: Sk Anirban <sk.anirban@intel.com>
> ---
> drivers/gpu/drm/xe/regs/xe_guc_regs.h | 8 ++++++
> drivers/gpu/drm/xe/xe_guc.c | 37 +++++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_wa_oob.rules | 9 +++++++
> 3 files changed, 54 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_guc_regs.h b/drivers/gpu/drm/xe/regs/xe_guc_regs.h
> index 87984713dd12..c9cb02f32f5a 100644
> --- a/drivers/gpu/drm/xe/regs/xe_guc_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_guc_regs.h
> @@ -40,6 +40,9 @@
> #define GS_BOOTROM_JUMP_PASSED REG_FIELD_PREP(GS_BOOTROM_MASK, 0x76)
> #define GS_MIA_IN_RESET REG_BIT(0)
>
> +#define GUC_HASH_BOOT_CHECK XE_REG(0xc010)
> +#define GUC_BOOT_UKERNEL_VALID REG_BIT(31)
> +
> #define GUC_HEADER_INFO XE_REG(0xc014)
>
> #define GUC_WOPCM_SIZE XE_REG(0xc050)
> @@ -83,7 +86,12 @@
> #define GUC_WOPCM_OFFSET_MASK REG_GENMASK(31, GUC_WOPCM_OFFSET_SHIFT)
> #define HUC_LOADING_AGENT_GUC REG_BIT(1)
> #define GUC_WOPCM_OFFSET_VALID REG_BIT(0)
> +
> +#define GUC_SRAM_STATUS XE_REG(0xc398)
> +#define GUC_SRAM_HANDLING_MASK REG_GENMASK(8, 7)
> +
> #define GUC_MAX_IDLE_COUNT XE_REG(0xc3e4)
> +#define GUC_IDLE_FLOW_DISABLE REG_BIT(31)
> #define GUC_PMTIMESTAMP_LO XE_REG(0xc3e8)
> #define GUC_PMTIMESTAMP_HI XE_REG(0xc3ec)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index 44360437beeb..d28542d980ac 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -900,6 +900,40 @@ int xe_guc_post_load_init(struct xe_guc *guc)
> return xe_guc_submit_enable(guc);
> }
>
> +/*
> + * Wa_14025883347: Prevent GuC firmware DMA failures during GuC-only reset by ensuring
> + * SRAM save/restore operations are complete before reset.
> + */
> +static void guc_prevent_fw_dma_failure_on_reset(struct xe_guc *guc)
> +{
> + struct xe_gt *gt = guc_to_gt(guc);
> + u32 boot_hash_chk, guc_status, sram_status;
> + int ret;
> +
> + guc_status = xe_mmio_read32(>->mmio, GUC_STATUS);
> + if (guc_status & GS_MIA_IN_RESET)
> + return;
> +
> + boot_hash_chk = xe_mmio_read32(>->mmio, GUC_HASH_BOOT_CHECK);
> + if (!(boot_hash_chk & GUC_BOOT_UKERNEL_VALID))
> + return;
> +
> + xe_mmio_rmw32(>->mmio, GUC_MAX_IDLE_COUNT, 0, GUC_IDLE_FLOW_DISABLE);
IIRC in one of the previous rev we agreed to put a comment here to
explain why we don't need to explicitly turn this back on.
> +
> + ret = xe_mmio_wait32(>->mmio, GUC_STATUS, GS_UKERNEL_MASK,
> + FIELD_PREP(GS_UKERNEL_MASK, XE_GUC_LOAD_STATUS_READY),
> + 100000, &guc_status, false);
> + if (ret)
> + xe_gt_warn(gt, "GuC not ready after disabling idle flow (GUC_STATUS: 0x%x)\n",
> + guc_status);
> +
> + ret = xe_mmio_wait32(>->mmio, GUC_SRAM_STATUS, GUC_SRAM_HANDLING_MASK,
> + 0, 5000, &sram_status, false);
> + if (ret)
> + xe_gt_warn(gt, "SRAM handling not complete (GUC_SRAM_STATUS: 0x%x)\n",
> + sram_status);
> +}
> +
> int xe_guc_reset(struct xe_guc *guc)
> {
> struct xe_gt *gt = guc_to_gt(guc);
> @@ -912,6 +946,9 @@ int xe_guc_reset(struct xe_guc *guc)
> if (IS_SRIOV_VF(gt_to_xe(gt)))
> return xe_gt_sriov_vf_bootstrap(gt);
>
> + if (XE_GT_WA(gt, 14025883347))
> + guc_prevent_fw_dma_failure_on_reset(guc);
> +
> xe_mmio_write32(mmio, GDRST, GRDOM_GUC);
>
> ret = xe_mmio_wait32(mmio, GDRST, GRDOM_GUC, 0, 5000, &gdrst, false);
> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> index 5cd7fa6d2a5c..ff2efc7a68cc 100644
> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> @@ -73,3 +73,12 @@
> 15015404425_disable PLATFORM(PANTHERLAKE), MEDIA_STEP(B0, FOREVER)
> 16026007364 MEDIA_VERSION(3000)
> 14020316580 MEDIA_VERSION(1301)
> +
> +14025883347 MEDIA_VERSION(1301)
> + MEDIA_VERSION(2000)
> + MEDIA_VERSION(3000)
> + MEDIA_VERSION(3002)
> + MEDIA_VERSION(3500)
> + MEDIA_VERSION(3503)
> + GRAPHICS_VERSION_RANGE(3000, 3001)
> + GRAPHICS_VERSION_RANGE(3003, 3005)
I was re-checking the WA platform details and it looks like the WA was
recently extended to graphics version 2004 as well.
Daniele
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3 2/2] drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset
2026-01-29 0:58 ` Daniele Ceraolo Spurio
@ 2026-01-29 8:55 ` Anirban, Sk
0 siblings, 0 replies; 8+ messages in thread
From: Anirban, Sk @ 2026-01-29 8:55 UTC (permalink / raw)
To: Daniele Ceraolo Spurio, intel-xe
Cc: anshuman.gupta, badal.nilawar, riana.tauro, karthik.poosa,
raag.jadav, soham.purkait, mallesh.koujalagi, vinay.belgaumkar,
nishanth.p.reddy, rodrigo.vivi, matthew.d.roper
Hi,
On 29-01-2026 06:28 am, Daniele Ceraolo Spurio wrote:
>
>
> On 1/28/2026 3:51 AM, Sk Anirban wrote:
>> Prevent GuC firmware DMA failures during GuC-only reset by disabling
>> idle flow and verifying SRAM handling completion. Without this, reset
>> can be issued while SRAM handler is copying WOPCM to SRAM,
>> causing GuC HW to get stuck.
>>
>> v2: Modify error message (Badal)
>> Rename reg bit name (Daniele)
>> Update WA skip condition (Daniele)
>> Update SRAM handling logic (Daniele)
>> v3: Reorder WA call (Badal)
>> Wait for GuC ready status (Daniele)
>>
>> Signed-off-by: Sk Anirban <sk.anirban@intel.com>
>> ---
>> drivers/gpu/drm/xe/regs/xe_guc_regs.h | 8 ++++++
>> drivers/gpu/drm/xe/xe_guc.c | 37 +++++++++++++++++++++++++++
>> drivers/gpu/drm/xe/xe_wa_oob.rules | 9 +++++++
>> 3 files changed, 54 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/regs/xe_guc_regs.h
>> b/drivers/gpu/drm/xe/regs/xe_guc_regs.h
>> index 87984713dd12..c9cb02f32f5a 100644
>> --- a/drivers/gpu/drm/xe/regs/xe_guc_regs.h
>> +++ b/drivers/gpu/drm/xe/regs/xe_guc_regs.h
>> @@ -40,6 +40,9 @@
>> #define GS_BOOTROM_JUMP_PASSED REG_FIELD_PREP(GS_BOOTROM_MASK, 0x76)
>> #define GS_MIA_IN_RESET REG_BIT(0)
>> +#define GUC_HASH_BOOT_CHECK XE_REG(0xc010)
>> +#define GUC_BOOT_UKERNEL_VALID REG_BIT(31)
>> +
>> #define GUC_HEADER_INFO XE_REG(0xc014)
>> #define GUC_WOPCM_SIZE XE_REG(0xc050)
>> @@ -83,7 +86,12 @@
>> #define GUC_WOPCM_OFFSET_MASK REG_GENMASK(31,
>> GUC_WOPCM_OFFSET_SHIFT)
>> #define HUC_LOADING_AGENT_GUC REG_BIT(1)
>> #define GUC_WOPCM_OFFSET_VALID REG_BIT(0)
>> +
>> +#define GUC_SRAM_STATUS XE_REG(0xc398)
>> +#define GUC_SRAM_HANDLING_MASK REG_GENMASK(8, 7)
>> +
>> #define GUC_MAX_IDLE_COUNT XE_REG(0xc3e4)
>> +#define GUC_IDLE_FLOW_DISABLE REG_BIT(31)
>> #define GUC_PMTIMESTAMP_LO XE_REG(0xc3e8)
>> #define GUC_PMTIMESTAMP_HI XE_REG(0xc3ec)
>> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
>> index 44360437beeb..d28542d980ac 100644
>> --- a/drivers/gpu/drm/xe/xe_guc.c
>> +++ b/drivers/gpu/drm/xe/xe_guc.c
>> @@ -900,6 +900,40 @@ int xe_guc_post_load_init(struct xe_guc *guc)
>> return xe_guc_submit_enable(guc);
>> }
>> +/*
>> + * Wa_14025883347: Prevent GuC firmware DMA failures during GuC-only
>> reset by ensuring
>> + * SRAM save/restore operations are complete before reset.
>> + */
>> +static void guc_prevent_fw_dma_failure_on_reset(struct xe_guc *guc)
>> +{
>> + struct xe_gt *gt = guc_to_gt(guc);
>> + u32 boot_hash_chk, guc_status, sram_status;
>> + int ret;
>> +
>> + guc_status = xe_mmio_read32(>->mmio, GUC_STATUS);
>> + if (guc_status & GS_MIA_IN_RESET)
>> + return;
>> +
>> + boot_hash_chk = xe_mmio_read32(>->mmio, GUC_HASH_BOOT_CHECK);
>> + if (!(boot_hash_chk & GUC_BOOT_UKERNEL_VALID))
>> + return;
>> +
>> + xe_mmio_rmw32(>->mmio, GUC_MAX_IDLE_COUNT, 0,
>> GUC_IDLE_FLOW_DISABLE);
>
> IIRC in one of the previous rev we agreed to put a comment here to
> explain why we don't need to explicitly turn this back on.
>
Thanks for the clarification. Although I thought the mailing list
comment would suffice, I'll provide additional details here.
>> +
>> + ret = xe_mmio_wait32(>->mmio, GUC_STATUS, GS_UKERNEL_MASK,
>> + FIELD_PREP(GS_UKERNEL_MASK, XE_GUC_LOAD_STATUS_READY),
>> + 100000, &guc_status, false);
>> + if (ret)
>> + xe_gt_warn(gt, "GuC not ready after disabling idle flow
>> (GUC_STATUS: 0x%x)\n",
>> + guc_status);
>> +
>> + ret = xe_mmio_wait32(>->mmio, GUC_SRAM_STATUS,
>> GUC_SRAM_HANDLING_MASK,
>> + 0, 5000, &sram_status, false);
>> + if (ret)
>> + xe_gt_warn(gt, "SRAM handling not complete (GUC_SRAM_STATUS:
>> 0x%x)\n",
>> + sram_status);
>> +}
>> +
>> int xe_guc_reset(struct xe_guc *guc)
>> {
>> struct xe_gt *gt = guc_to_gt(guc);
>> @@ -912,6 +946,9 @@ int xe_guc_reset(struct xe_guc *guc)
>> if (IS_SRIOV_VF(gt_to_xe(gt)))
>> return xe_gt_sriov_vf_bootstrap(gt);
>> + if (XE_GT_WA(gt, 14025883347))
>> + guc_prevent_fw_dma_failure_on_reset(guc);
>> +
>> xe_mmio_write32(mmio, GDRST, GRDOM_GUC);
>> ret = xe_mmio_wait32(mmio, GDRST, GRDOM_GUC, 0, 5000, &gdrst,
>> false);
>> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules
>> b/drivers/gpu/drm/xe/xe_wa_oob.rules
>> index 5cd7fa6d2a5c..ff2efc7a68cc 100644
>> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
>> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
>> @@ -73,3 +73,12 @@
>> 15015404425_disable PLATFORM(PANTHERLAKE), MEDIA_STEP(B0, FOREVER)
>> 16026007364 MEDIA_VERSION(3000)
>> 14020316580 MEDIA_VERSION(1301)
>> +
>> +14025883347 MEDIA_VERSION(1301)
>> + MEDIA_VERSION(2000)
>> + MEDIA_VERSION(3000)
>> + MEDIA_VERSION(3002)
>> + MEDIA_VERSION(3500)
>> + MEDIA_VERSION(3503)
>> + GRAPHICS_VERSION_RANGE(3000, 3001)
>> + GRAPHICS_VERSION_RANGE(3003, 3005)
>
> I was re-checking the WA platform details and it looks like the WA was
> recently extended to graphics version 2004 as well.
Yeah, I just checked, will add the platform in next rev.
Thanks,
Anirban
>
> Daniele
>
>
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2026-01-29 8:56 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-01-28 11:51 [PATCH v3 0/2] drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset Sk Anirban
2026-01-28 11:51 ` [PATCH v3 1/2] drm/xe/rtp: Extend support for max rules/actions per entry Sk Anirban
2026-01-28 11:51 ` [PATCH v3 2/2] drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset Sk Anirban
2026-01-29 0:58 ` Daniele Ceraolo Spurio
2026-01-29 8:55 ` Anirban, Sk
2026-01-28 18:09 ` ✗ CI.checkpatch: warning for drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset (rev3) Patchwork
2026-01-28 18:10 ` ✓ CI.KUnit: success " Patchwork
2026-01-28 18:57 ` ✓ Xe.CI.BAT: " Patchwork
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