* [PATCH v5 1/6] drm/xe: Always kill exec queues in xe_guc_submit_pause_abort
2026-01-28 23:16 [PATCH v5 0/6] Attempt to fixup reset, wedge, unload corner cases Zhanjun Dong
@ 2026-01-28 23:16 ` Zhanjun Dong
2026-01-28 23:16 ` [PATCH v5 2/6] drm/xe: Forcefully tear down exec queues in GuC submit fini Zhanjun Dong
` (6 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Zhanjun Dong @ 2026-01-28 23:16 UTC (permalink / raw)
To: intel-xe; +Cc: Matthew Brost, stable, Zhanjun Dong, Stuart Summers
From: Matthew Brost <matthew.brost@intel.com>
xe_guc_submit_pause_abort is intended to be called after something
disastrous occurs (e.g., VF migration fails, device wedging, or driver
unload) and should immediately trigger the teardown of remaining
submission state. With that, kill any remaining queues in this function.
Fixes: 7c4b7e34c83b ("drm/xe/vf: Abort VF post migration recovery on failure")
Cc: stable@vger.kernel.org
Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Stuart Summers <stuart.summers@intel.com>
---
drivers/gpu/drm/xe/xe_guc_submit.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 456f549c16f6..d61bd0094e0b 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -2774,8 +2774,7 @@ void xe_guc_submit_pause_abort(struct xe_guc *guc)
continue;
xe_sched_submission_start(sched);
- if (exec_queue_killed_or_banned_or_wedged(q))
- xe_guc_exec_queue_trigger_cleanup(q);
+ guc_exec_queue_kill(q);
}
mutex_unlock(&guc->submission_state.lock);
}
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v5 2/6] drm/xe: Forcefully tear down exec queues in GuC submit fini
2026-01-28 23:16 [PATCH v5 0/6] Attempt to fixup reset, wedge, unload corner cases Zhanjun Dong
2026-01-28 23:16 ` [PATCH v5 1/6] drm/xe: Always kill exec queues in xe_guc_submit_pause_abort Zhanjun Dong
@ 2026-01-28 23:16 ` Zhanjun Dong
2026-01-28 23:16 ` [PATCH v5 3/6] drm/xe: Trigger queue cleanup if not in wedged mode 2 Zhanjun Dong
` (5 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Zhanjun Dong @ 2026-01-28 23:16 UTC (permalink / raw)
To: intel-xe; +Cc: Matthew Brost, stable, Zhanjun Dong
From: Matthew Brost <matthew.brost@intel.com>
In GuC submit fini, forcefully tear down any exec queues by disabling
CTs, stopping the scheduler (which cleans up lost G2H), killing all
remaining queues, and resuming scheduling to allow any remaining cleanup
actions to complete and signal any remaining fences.
guc_submit_fini requires access to device hardware. Using a device-managed
action guarantees the correct ordering of cleanup.
v3:
- Add page fault fix
v2:
- Fix VF failure (CI)
Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Cc: stable@vger.kernel.org
Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_guc_submit.c | 31 +++++++++++++++++++++---------
1 file changed, 22 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index d61bd0094e0b..92ea32423838 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -239,13 +239,21 @@ static bool exec_queue_killed_or_banned_or_wedged(struct xe_exec_queue *q)
EXEC_QUEUE_STATE_BANNED));
}
-static void guc_submit_fini(struct drm_device *drm, void *arg)
+static int __xe_guc_submit_reset_prepare(struct xe_guc *guc);
+
+static void guc_submit_fini(void *arg)
{
struct xe_guc *guc = arg;
struct xe_device *xe = guc_to_xe(guc);
struct xe_gt *gt = guc_to_gt(guc);
int ret;
+ /* Forcefully kill any remaining exec queues */
+ xe_guc_ct_stop(&guc->ct);
+ __xe_guc_submit_reset_prepare(guc);
+ xe_guc_submit_stop(guc);
+ xe_guc_submit_pause_abort(guc);
+
ret = wait_event_timeout(guc->submission_state.fini_wq,
xa_empty(&guc->submission_state.exec_queue_lookup),
HZ * 5);
@@ -326,7 +334,7 @@ int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids)
guc->submission_state.initialized = true;
- return drmm_add_action_or_reset(&xe->drm, guc_submit_fini, guc);
+ return devm_add_action_or_reset(xe->drm.dev, guc_submit_fini, guc);
}
/*
@@ -2354,16 +2362,10 @@ static void guc_exec_queue_stop(struct xe_guc *guc, struct xe_exec_queue *q)
}
}
-int xe_guc_submit_reset_prepare(struct xe_guc *guc)
+static int __xe_guc_submit_reset_prepare(struct xe_guc *guc)
{
int ret;
- if (xe_gt_WARN_ON(guc_to_gt(guc), vf_recovery(guc)))
- return 0;
-
- if (!guc->submission_state.initialized)
- return 0;
-
/*
* Using an atomic here rather than submission_state.lock as this
* function can be called while holding the CT lock (engine reset
@@ -2378,6 +2380,17 @@ int xe_guc_submit_reset_prepare(struct xe_guc *guc)
return ret;
}
+int xe_guc_submit_reset_prepare(struct xe_guc *guc)
+{
+ if (xe_gt_WARN_ON(guc_to_gt(guc), vf_recovery(guc)))
+ return 0;
+
+ if (!guc->submission_state.initialized)
+ return 0;
+
+ return __xe_guc_submit_reset_prepare(guc);
+}
+
void xe_guc_submit_reset_wait(struct xe_guc *guc)
{
wait_event(guc->ct.wq, xe_device_wedged(guc_to_xe(guc)) ||
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v5 3/6] drm/xe: Trigger queue cleanup if not in wedged mode 2
2026-01-28 23:16 [PATCH v5 0/6] Attempt to fixup reset, wedge, unload corner cases Zhanjun Dong
2026-01-28 23:16 ` [PATCH v5 1/6] drm/xe: Always kill exec queues in xe_guc_submit_pause_abort Zhanjun Dong
2026-01-28 23:16 ` [PATCH v5 2/6] drm/xe: Forcefully tear down exec queues in GuC submit fini Zhanjun Dong
@ 2026-01-28 23:16 ` Zhanjun Dong
2026-01-28 23:16 ` [PATCH v5 4/6] drm/xe: Use XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET enum instead of magic number Zhanjun Dong
` (4 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Zhanjun Dong @ 2026-01-28 23:16 UTC (permalink / raw)
To: intel-xe; +Cc: Zhanjun Dong, stable, Matthew Brost
The intent of wedging a device is to allow queues to continue running
only in wedged mode 2. In other modes, queues should initiate cleanup
and signal all remaining fences. Fix xe_guc_submit_wedge to correctly
clean up queues when wedge mode != 2.
Fixes: 7dbe8af13c18 ("drm/xe: Wedge the entire device")
Cc: stable@vger.kernel.org
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
---
drivers/gpu/drm/xe/xe_guc_submit.c | 32 ++++++++++++++++++------------
1 file changed, 19 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 92ea32423838..612ded5878fd 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -1326,6 +1326,7 @@ static void disable_scheduling_deregister(struct xe_guc *guc,
*/
void xe_guc_submit_wedge(struct xe_guc *guc)
{
+ struct xe_device *xe = guc_to_xe(guc);
struct xe_gt *gt = guc_to_gt(guc);
struct xe_exec_queue *q;
unsigned long index;
@@ -1340,20 +1341,25 @@ void xe_guc_submit_wedge(struct xe_guc *guc)
if (!guc->submission_state.initialized)
return;
- err = devm_add_action_or_reset(guc_to_xe(guc)->drm.dev,
- guc_submit_wedged_fini, guc);
- if (err) {
- xe_gt_err(gt, "Failed to register clean-up in wedged.mode=%s; "
- "Although device is wedged.\n",
- xe_wedged_mode_to_string(XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET));
- return;
- }
+ if (xe->wedged.mode == 2) {
+ err = devm_add_action_or_reset(guc_to_xe(guc)->drm.dev,
+ guc_submit_wedged_fini, guc);
+ if (err) {
+ xe_gt_err(gt, "Failed to register clean-up on wedged.mode=2; "
+ "Although device is wedged.\n");
+ return;
+ }
- mutex_lock(&guc->submission_state.lock);
- xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
- if (xe_exec_queue_get_unless_zero(q))
- set_exec_queue_wedged(q);
- mutex_unlock(&guc->submission_state.lock);
+ mutex_lock(&guc->submission_state.lock);
+ xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
+ if (xe_exec_queue_get_unless_zero(q))
+ set_exec_queue_wedged(q);
+ mutex_unlock(&guc->submission_state.lock);
+ } else {
+ /* Forcefully kill any remaining exec queues, signal fences */
+ xe_guc_submit_stop(guc);
+ xe_guc_submit_pause_abort(guc);
+ }
}
static bool guc_submit_hint_wedged(struct xe_guc *guc)
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v5 4/6] drm/xe: Use XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET enum instead of magic number
2026-01-28 23:16 [PATCH v5 0/6] Attempt to fixup reset, wedge, unload corner cases Zhanjun Dong
` (2 preceding siblings ...)
2026-01-28 23:16 ` [PATCH v5 3/6] drm/xe: Trigger queue cleanup if not in wedged mode 2 Zhanjun Dong
@ 2026-01-28 23:16 ` Zhanjun Dong
2026-01-28 23:16 ` [PATCH v5 5/6] drm/xe/guc: Ensure CT state transitions via STOP before DISABLED Zhanjun Dong
` (3 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Zhanjun Dong @ 2026-01-28 23:16 UTC (permalink / raw)
To: intel-xe; +Cc: Zhanjun Dong
Replace the magic number 2 with the proper enum value
XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET for better code readability
and maintainability.
Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
---
drivers/gpu/drm/xe/xe_guc_submit.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 612ded5878fd..bdeca09a9530 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -1341,12 +1341,13 @@ void xe_guc_submit_wedge(struct xe_guc *guc)
if (!guc->submission_state.initialized)
return;
- if (xe->wedged.mode == 2) {
+ if (xe->wedged.mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET) {
err = devm_add_action_or_reset(guc_to_xe(guc)->drm.dev,
guc_submit_wedged_fini, guc);
if (err) {
- xe_gt_err(gt, "Failed to register clean-up on wedged.mode=2; "
- "Although device is wedged.\n");
+ xe_gt_err(gt, "Failed to register clean-up on wedged.mode=%s; "
+ "Although device is wedged.\n",
+ xe_wedged_mode_to_string(XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET));
return;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v5 5/6] drm/xe/guc: Ensure CT state transitions via STOP before DISABLED
2026-01-28 23:16 [PATCH v5 0/6] Attempt to fixup reset, wedge, unload corner cases Zhanjun Dong
` (3 preceding siblings ...)
2026-01-28 23:16 ` [PATCH v5 4/6] drm/xe: Use XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET enum instead of magic number Zhanjun Dong
@ 2026-01-28 23:16 ` Zhanjun Dong
2026-01-28 23:16 ` [PATCH v5 6/6] drm/xe/uc: Drop xe_guc_sanitize in favor of managed cleanup Zhanjun Dong
` (2 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Zhanjun Dong @ 2026-01-28 23:16 UTC (permalink / raw)
To: intel-xe; +Cc: Zhanjun Dong, stable, Matthew Brost
The GuC CT state transition requires moving to the STOP state before
entering the DISABLED state. Update the driver teardown sequence to make
the proper state machine transitions.
Fixes: ee4b32220a6b ("drm/xe/guc: Add devm release action to safely tear down CT")
Cc: stable@vger.kernel.org
Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_guc_ct.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
index dfbf76037b04..6a658f085e0f 100644
--- a/drivers/gpu/drm/xe/xe_guc_ct.c
+++ b/drivers/gpu/drm/xe/xe_guc_ct.c
@@ -345,6 +345,7 @@ static void guc_action_disable_ct(void *arg)
{
struct xe_guc_ct *ct = arg;
+ xe_guc_ct_stop(ct);
guc_ct_change_state(ct, XE_GUC_CT_STATE_DISABLED);
}
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v5 6/6] drm/xe/uc: Drop xe_guc_sanitize in favor of managed cleanup
2026-01-28 23:16 [PATCH v5 0/6] Attempt to fixup reset, wedge, unload corner cases Zhanjun Dong
` (4 preceding siblings ...)
2026-01-28 23:16 ` [PATCH v5 5/6] drm/xe/guc: Ensure CT state transitions via STOP before DISABLED Zhanjun Dong
@ 2026-01-28 23:16 ` Zhanjun Dong
2026-01-28 23:27 ` ✓ CI.KUnit: success for Attempt to fixup reset, wedge, unload corner cases Patchwork
2026-01-29 0:01 ` ✓ Xe.CI.BAT: " Patchwork
7 siblings, 0 replies; 9+ messages in thread
From: Zhanjun Dong @ 2026-01-28 23:16 UTC (permalink / raw)
To: intel-xe; +Cc: Zhanjun Dong, Matthew Brost
If the firmware fails to load in GT resets the device is wedged also
initiating a GuC state cleanup.
Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_uc.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
index 3f63c2a7e86d..39101120d43a 100644
--- a/drivers/gpu/drm/xe/xe_uc.c
+++ b/drivers/gpu/drm/xe/xe_uc.c
@@ -171,7 +171,6 @@ static int vf_uc_load_hw(struct xe_uc *uc)
return 0;
err_out:
- xe_guc_sanitize(&uc->guc);
return err;
}
@@ -229,7 +228,6 @@ int xe_uc_load_hw(struct xe_uc *uc)
return 0;
err_out:
- xe_guc_sanitize(&uc->guc);
return ret;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* ✓ CI.KUnit: success for Attempt to fixup reset, wedge, unload corner cases
2026-01-28 23:16 [PATCH v5 0/6] Attempt to fixup reset, wedge, unload corner cases Zhanjun Dong
` (5 preceding siblings ...)
2026-01-28 23:16 ` [PATCH v5 6/6] drm/xe/uc: Drop xe_guc_sanitize in favor of managed cleanup Zhanjun Dong
@ 2026-01-28 23:27 ` Patchwork
2026-01-29 0:01 ` ✓ Xe.CI.BAT: " Patchwork
7 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2026-01-28 23:27 UTC (permalink / raw)
To: Zhanjun Dong; +Cc: intel-xe
== Series Details ==
Series: Attempt to fixup reset, wedge, unload corner cases
URL : https://patchwork.freedesktop.org/series/160795/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[23:26:11] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:26:15] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:26:47] Starting KUnit Kernel (1/1)...
[23:26:47] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:26:47] ================== guc_buf (11 subtests) ===================
[23:26:47] [PASSED] test_smallest
[23:26:47] [PASSED] test_largest
[23:26:47] [PASSED] test_granular
[23:26:47] [PASSED] test_unique
[23:26:47] [PASSED] test_overlap
[23:26:47] [PASSED] test_reusable
[23:26:47] [PASSED] test_too_big
[23:26:47] [PASSED] test_flush
[23:26:47] [PASSED] test_lookup
[23:26:47] [PASSED] test_data
[23:26:47] [PASSED] test_class
[23:26:47] ===================== [PASSED] guc_buf =====================
[23:26:47] =================== guc_dbm (7 subtests) ===================
[23:26:47] [PASSED] test_empty
[23:26:47] [PASSED] test_default
[23:26:47] ======================== test_size ========================
[23:26:47] [PASSED] 4
[23:26:47] [PASSED] 8
[23:26:47] [PASSED] 32
[23:26:47] [PASSED] 256
[23:26:47] ==================== [PASSED] test_size ====================
[23:26:47] ======================= test_reuse ========================
[23:26:47] [PASSED] 4
[23:26:47] [PASSED] 8
[23:26:47] [PASSED] 32
[23:26:47] [PASSED] 256
[23:26:47] =================== [PASSED] test_reuse ====================
[23:26:47] =================== test_range_overlap ====================
[23:26:47] [PASSED] 4
[23:26:47] [PASSED] 8
[23:26:47] [PASSED] 32
[23:26:47] [PASSED] 256
[23:26:47] =============== [PASSED] test_range_overlap ================
[23:26:47] =================== test_range_compact ====================
[23:26:47] [PASSED] 4
[23:26:47] [PASSED] 8
[23:26:47] [PASSED] 32
[23:26:47] [PASSED] 256
[23:26:47] =============== [PASSED] test_range_compact ================
[23:26:47] ==================== test_range_spare =====================
[23:26:47] [PASSED] 4
[23:26:47] [PASSED] 8
[23:26:47] [PASSED] 32
[23:26:47] [PASSED] 256
[23:26:47] ================ [PASSED] test_range_spare =================
[23:26:47] ===================== [PASSED] guc_dbm =====================
[23:26:47] =================== guc_idm (6 subtests) ===================
[23:26:47] [PASSED] bad_init
[23:26:47] [PASSED] no_init
[23:26:47] [PASSED] init_fini
[23:26:47] [PASSED] check_used
[23:26:47] [PASSED] check_quota
[23:26:47] [PASSED] check_all
[23:26:47] ===================== [PASSED] guc_idm =====================
[23:26:47] ================== no_relay (3 subtests) ===================
[23:26:47] [PASSED] xe_drops_guc2pf_if_not_ready
[23:26:47] [PASSED] xe_drops_guc2vf_if_not_ready
[23:26:47] [PASSED] xe_rejects_send_if_not_ready
[23:26:47] ==================== [PASSED] no_relay =====================
[23:26:47] ================== pf_relay (14 subtests) ==================
[23:26:47] [PASSED] pf_rejects_guc2pf_too_short
[23:26:47] [PASSED] pf_rejects_guc2pf_too_long
[23:26:47] [PASSED] pf_rejects_guc2pf_no_payload
[23:26:47] [PASSED] pf_fails_no_payload
[23:26:47] [PASSED] pf_fails_bad_origin
[23:26:47] [PASSED] pf_fails_bad_type
[23:26:47] [PASSED] pf_txn_reports_error
[23:26:47] [PASSED] pf_txn_sends_pf2guc
[23:26:47] [PASSED] pf_sends_pf2guc
[23:26:47] [SKIPPED] pf_loopback_nop
[23:26:47] [SKIPPED] pf_loopback_echo
[23:26:47] [SKIPPED] pf_loopback_fail
[23:26:47] [SKIPPED] pf_loopback_busy
[23:26:47] [SKIPPED] pf_loopback_retry
[23:26:47] ==================== [PASSED] pf_relay =====================
[23:26:47] ================== vf_relay (3 subtests) ===================
[23:26:47] [PASSED] vf_rejects_guc2vf_too_short
[23:26:47] [PASSED] vf_rejects_guc2vf_too_long
[23:26:47] [PASSED] vf_rejects_guc2vf_no_payload
[23:26:47] ==================== [PASSED] vf_relay =====================
[23:26:47] ================ pf_gt_config (6 subtests) =================
[23:26:47] [PASSED] fair_contexts_1vf
[23:26:47] [PASSED] fair_doorbells_1vf
[23:26:47] [PASSED] fair_ggtt_1vf
[23:26:47] ====================== fair_contexts ======================
[23:26:47] [PASSED] 1 VF
[23:26:47] [PASSED] 2 VFs
[23:26:47] [PASSED] 3 VFs
[23:26:47] [PASSED] 4 VFs
[23:26:47] [PASSED] 5 VFs
[23:26:47] [PASSED] 6 VFs
[23:26:47] [PASSED] 7 VFs
[23:26:47] [PASSED] 8 VFs
[23:26:47] [PASSED] 9 VFs
[23:26:47] [PASSED] 10 VFs
[23:26:47] [PASSED] 11 VFs
[23:26:47] [PASSED] 12 VFs
[23:26:47] [PASSED] 13 VFs
[23:26:47] [PASSED] 14 VFs
[23:26:47] [PASSED] 15 VFs
[23:26:47] [PASSED] 16 VFs
[23:26:47] [PASSED] 17 VFs
[23:26:47] [PASSED] 18 VFs
[23:26:47] [PASSED] 19 VFs
[23:26:47] [PASSED] 20 VFs
[23:26:47] [PASSED] 21 VFs
[23:26:47] [PASSED] 22 VFs
[23:26:47] [PASSED] 23 VFs
[23:26:47] [PASSED] 24 VFs
[23:26:47] [PASSED] 25 VFs
[23:26:47] [PASSED] 26 VFs
[23:26:47] [PASSED] 27 VFs
[23:26:47] [PASSED] 28 VFs
[23:26:47] [PASSED] 29 VFs
[23:26:47] [PASSED] 30 VFs
[23:26:47] [PASSED] 31 VFs
[23:26:47] [PASSED] 32 VFs
[23:26:47] [PASSED] 33 VFs
[23:26:47] [PASSED] 34 VFs
[23:26:47] [PASSED] 35 VFs
[23:26:47] [PASSED] 36 VFs
[23:26:47] [PASSED] 37 VFs
[23:26:47] [PASSED] 38 VFs
[23:26:47] [PASSED] 39 VFs
[23:26:47] [PASSED] 40 VFs
[23:26:47] [PASSED] 41 VFs
[23:26:47] [PASSED] 42 VFs
[23:26:47] [PASSED] 43 VFs
[23:26:47] [PASSED] 44 VFs
[23:26:47] [PASSED] 45 VFs
[23:26:47] [PASSED] 46 VFs
[23:26:47] [PASSED] 47 VFs
[23:26:47] [PASSED] 48 VFs
[23:26:47] [PASSED] 49 VFs
[23:26:47] [PASSED] 50 VFs
[23:26:47] [PASSED] 51 VFs
[23:26:47] [PASSED] 52 VFs
[23:26:47] [PASSED] 53 VFs
[23:26:47] [PASSED] 54 VFs
[23:26:47] [PASSED] 55 VFs
[23:26:47] [PASSED] 56 VFs
[23:26:47] [PASSED] 57 VFs
[23:26:47] [PASSED] 58 VFs
[23:26:47] [PASSED] 59 VFs
[23:26:47] [PASSED] 60 VFs
[23:26:47] [PASSED] 61 VFs
[23:26:47] [PASSED] 62 VFs
[23:26:47] [PASSED] 63 VFs
[23:26:47] ================== [PASSED] fair_contexts ==================
[23:26:47] ===================== fair_doorbells ======================
[23:26:47] [PASSED] 1 VF
[23:26:47] [PASSED] 2 VFs
[23:26:47] [PASSED] 3 VFs
[23:26:47] [PASSED] 4 VFs
[23:26:47] [PASSED] 5 VFs
[23:26:47] [PASSED] 6 VFs
[23:26:47] [PASSED] 7 VFs
[23:26:47] [PASSED] 8 VFs
[23:26:47] [PASSED] 9 VFs
[23:26:47] [PASSED] 10 VFs
[23:26:47] [PASSED] 11 VFs
[23:26:47] [PASSED] 12 VFs
[23:26:47] [PASSED] 13 VFs
[23:26:47] [PASSED] 14 VFs
[23:26:47] [PASSED] 15 VFs
[23:26:47] [PASSED] 16 VFs
[23:26:47] [PASSED] 17 VFs
[23:26:47] [PASSED] 18 VFs
[23:26:47] [PASSED] 19 VFs
[23:26:47] [PASSED] 20 VFs
[23:26:47] [PASSED] 21 VFs
[23:26:47] [PASSED] 22 VFs
[23:26:47] [PASSED] 23 VFs
[23:26:47] [PASSED] 24 VFs
[23:26:47] [PASSED] 25 VFs
[23:26:47] [PASSED] 26 VFs
[23:26:47] [PASSED] 27 VFs
[23:26:47] [PASSED] 28 VFs
[23:26:47] [PASSED] 29 VFs
[23:26:47] [PASSED] 30 VFs
[23:26:47] [PASSED] 31 VFs
[23:26:47] [PASSED] 32 VFs
[23:26:47] [PASSED] 33 VFs
[23:26:47] [PASSED] 34 VFs
[23:26:47] [PASSED] 35 VFs
[23:26:47] [PASSED] 36 VFs
[23:26:47] [PASSED] 37 VFs
[23:26:47] [PASSED] 38 VFs
[23:26:47] [PASSED] 39 VFs
[23:26:47] [PASSED] 40 VFs
[23:26:47] [PASSED] 41 VFs
[23:26:47] [PASSED] 42 VFs
[23:26:47] [PASSED] 43 VFs
[23:26:47] [PASSED] 44 VFs
[23:26:47] [PASSED] 45 VFs
[23:26:47] [PASSED] 46 VFs
[23:26:47] [PASSED] 47 VFs
[23:26:47] [PASSED] 48 VFs
[23:26:47] [PASSED] 49 VFs
[23:26:47] [PASSED] 50 VFs
[23:26:47] [PASSED] 51 VFs
[23:26:47] [PASSED] 52 VFs
[23:26:47] [PASSED] 53 VFs
[23:26:47] [PASSED] 54 VFs
[23:26:47] [PASSED] 55 VFs
[23:26:47] [PASSED] 56 VFs
[23:26:47] [PASSED] 57 VFs
[23:26:47] [PASSED] 58 VFs
[23:26:47] [PASSED] 59 VFs
[23:26:47] [PASSED] 60 VFs
[23:26:47] [PASSED] 61 VFs
[23:26:47] [PASSED] 62 VFs
[23:26:47] [PASSED] 63 VFs
[23:26:47] ================= [PASSED] fair_doorbells ==================
[23:26:47] ======================== fair_ggtt ========================
[23:26:47] [PASSED] 1 VF
[23:26:47] [PASSED] 2 VFs
[23:26:47] [PASSED] 3 VFs
[23:26:47] [PASSED] 4 VFs
[23:26:47] [PASSED] 5 VFs
[23:26:47] [PASSED] 6 VFs
[23:26:47] [PASSED] 7 VFs
[23:26:47] [PASSED] 8 VFs
[23:26:47] [PASSED] 9 VFs
[23:26:47] [PASSED] 10 VFs
[23:26:47] [PASSED] 11 VFs
[23:26:47] [PASSED] 12 VFs
[23:26:47] [PASSED] 13 VFs
[23:26:47] [PASSED] 14 VFs
[23:26:47] [PASSED] 15 VFs
[23:26:47] [PASSED] 16 VFs
[23:26:47] [PASSED] 17 VFs
[23:26:47] [PASSED] 18 VFs
[23:26:47] [PASSED] 19 VFs
[23:26:47] [PASSED] 20 VFs
[23:26:47] [PASSED] 21 VFs
[23:26:47] [PASSED] 22 VFs
[23:26:47] [PASSED] 23 VFs
[23:26:47] [PASSED] 24 VFs
[23:26:47] [PASSED] 25 VFs
[23:26:47] [PASSED] 26 VFs
[23:26:47] [PASSED] 27 VFs
[23:26:47] [PASSED] 28 VFs
[23:26:47] [PASSED] 29 VFs
[23:26:47] [PASSED] 30 VFs
[23:26:47] [PASSED] 31 VFs
[23:26:47] [PASSED] 32 VFs
[23:26:47] [PASSED] 33 VFs
[23:26:47] [PASSED] 34 VFs
[23:26:47] [PASSED] 35 VFs
[23:26:47] [PASSED] 36 VFs
[23:26:47] [PASSED] 37 VFs
[23:26:47] [PASSED] 38 VFs
[23:26:47] [PASSED] 39 VFs
[23:26:47] [PASSED] 40 VFs
[23:26:47] [PASSED] 41 VFs
[23:26:47] [PASSED] 42 VFs
[23:26:47] [PASSED] 43 VFs
[23:26:47] [PASSED] 44 VFs
[23:26:47] [PASSED] 45 VFs
[23:26:47] [PASSED] 46 VFs
[23:26:47] [PASSED] 47 VFs
[23:26:47] [PASSED] 48 VFs
[23:26:47] [PASSED] 49 VFs
[23:26:47] [PASSED] 50 VFs
[23:26:47] [PASSED] 51 VFs
[23:26:47] [PASSED] 52 VFs
[23:26:47] [PASSED] 53 VFs
[23:26:47] [PASSED] 54 VFs
[23:26:47] [PASSED] 55 VFs
[23:26:47] [PASSED] 56 VFs
[23:26:47] [PASSED] 57 VFs
[23:26:47] [PASSED] 58 VFs
[23:26:47] [PASSED] 59 VFs
[23:26:47] [PASSED] 60 VFs
[23:26:47] [PASSED] 61 VFs
[23:26:47] [PASSED] 62 VFs
[23:26:47] [PASSED] 63 VFs
[23:26:47] ==================== [PASSED] fair_ggtt ====================
[23:26:47] ================== [PASSED] pf_gt_config ===================
[23:26:47] ===================== lmtt (1 subtest) =====================
[23:26:47] ======================== test_ops =========================
[23:26:47] [PASSED] 2-level
[23:26:47] [PASSED] multi-level
[23:26:47] ==================== [PASSED] test_ops =====================
[23:26:47] ====================== [PASSED] lmtt =======================
[23:26:47] ================= pf_service (11 subtests) =================
[23:26:47] [PASSED] pf_negotiate_any
[23:26:47] [PASSED] pf_negotiate_base_match
[23:26:47] [PASSED] pf_negotiate_base_newer
[23:26:47] [PASSED] pf_negotiate_base_next
[23:26:47] [SKIPPED] pf_negotiate_base_older
[23:26:47] [PASSED] pf_negotiate_base_prev
[23:26:47] [PASSED] pf_negotiate_latest_match
[23:26:47] [PASSED] pf_negotiate_latest_newer
[23:26:47] [PASSED] pf_negotiate_latest_next
[23:26:47] [SKIPPED] pf_negotiate_latest_older
[23:26:47] [SKIPPED] pf_negotiate_latest_prev
[23:26:47] =================== [PASSED] pf_service ====================
[23:26:47] ================= xe_guc_g2g (2 subtests) ==================
[23:26:47] ============== xe_live_guc_g2g_kunit_default ==============
[23:26:47] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[23:26:47] ============== xe_live_guc_g2g_kunit_allmem ===============
[23:26:47] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[23:26:47] =================== [SKIPPED] xe_guc_g2g ===================
[23:26:47] =================== xe_mocs (2 subtests) ===================
[23:26:47] ================ xe_live_mocs_kernel_kunit ================
[23:26:47] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[23:26:47] ================ xe_live_mocs_reset_kunit =================
[23:26:47] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[23:26:47] ==================== [SKIPPED] xe_mocs =====================
[23:26:47] ================= xe_migrate (2 subtests) ==================
[23:26:47] ================= xe_migrate_sanity_kunit =================
[23:26:47] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[23:26:47] ================== xe_validate_ccs_kunit ==================
[23:26:47] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[23:26:47] =================== [SKIPPED] xe_migrate ===================
[23:26:47] ================== xe_dma_buf (1 subtest) ==================
[23:26:47] ==================== xe_dma_buf_kunit =====================
[23:26:47] ================ [SKIPPED] xe_dma_buf_kunit ================
[23:26:47] =================== [SKIPPED] xe_dma_buf ===================
[23:26:47] ================= xe_bo_shrink (1 subtest) =================
[23:26:47] =================== xe_bo_shrink_kunit ====================
[23:26:47] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[23:26:47] ================== [SKIPPED] xe_bo_shrink ==================
[23:26:47] ==================== xe_bo (2 subtests) ====================
[23:26:47] ================== xe_ccs_migrate_kunit ===================
[23:26:47] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[23:26:47] ==================== xe_bo_evict_kunit ====================
[23:26:47] =============== [SKIPPED] xe_bo_evict_kunit ================
[23:26:47] ===================== [SKIPPED] xe_bo ======================
[23:26:47] ==================== args (13 subtests) ====================
[23:26:47] [PASSED] count_args_test
[23:26:47] [PASSED] call_args_example
[23:26:47] [PASSED] call_args_test
[23:26:47] [PASSED] drop_first_arg_example
[23:26:47] [PASSED] drop_first_arg_test
[23:26:47] [PASSED] first_arg_example
[23:26:47] [PASSED] first_arg_test
[23:26:47] [PASSED] last_arg_example
[23:26:47] [PASSED] last_arg_test
[23:26:47] [PASSED] pick_arg_example
[23:26:47] [PASSED] if_args_example
[23:26:47] [PASSED] if_args_test
[23:26:47] [PASSED] sep_comma_example
[23:26:47] ====================== [PASSED] args =======================
[23:26:47] =================== xe_pci (3 subtests) ====================
[23:26:47] ==================== check_graphics_ip ====================
[23:26:47] [PASSED] 12.00 Xe_LP
[23:26:47] [PASSED] 12.10 Xe_LP+
[23:26:47] [PASSED] 12.55 Xe_HPG
[23:26:47] [PASSED] 12.60 Xe_HPC
[23:26:47] [PASSED] 12.70 Xe_LPG
[23:26:47] [PASSED] 12.71 Xe_LPG
[23:26:47] [PASSED] 12.74 Xe_LPG+
[23:26:47] [PASSED] 20.01 Xe2_HPG
[23:26:47] [PASSED] 20.02 Xe2_HPG
[23:26:47] [PASSED] 20.04 Xe2_LPG
[23:26:47] [PASSED] 30.00 Xe3_LPG
[23:26:47] [PASSED] 30.01 Xe3_LPG
[23:26:47] [PASSED] 30.03 Xe3_LPG
[23:26:47] [PASSED] 30.04 Xe3_LPG
[23:26:47] [PASSED] 30.05 Xe3_LPG
[23:26:47] [PASSED] 35.11 Xe3p_XPC
[23:26:47] ================ [PASSED] check_graphics_ip ================
[23:26:47] ===================== check_media_ip ======================
[23:26:47] [PASSED] 12.00 Xe_M
[23:26:47] [PASSED] 12.55 Xe_HPM
[23:26:47] [PASSED] 13.00 Xe_LPM+
[23:26:47] [PASSED] 13.01 Xe2_HPM
[23:26:47] [PASSED] 20.00 Xe2_LPM
[23:26:47] [PASSED] 30.00 Xe3_LPM
[23:26:47] [PASSED] 30.02 Xe3_LPM
[23:26:47] [PASSED] 35.00 Xe3p_LPM
[23:26:47] [PASSED] 35.03 Xe3p_HPM
[23:26:47] ================= [PASSED] check_media_ip ==================
[23:26:47] =================== check_platform_desc ===================
[23:26:47] [PASSED] 0x9A60 (TIGERLAKE)
[23:26:47] [PASSED] 0x9A68 (TIGERLAKE)
[23:26:47] [PASSED] 0x9A70 (TIGERLAKE)
[23:26:47] [PASSED] 0x9A40 (TIGERLAKE)
[23:26:47] [PASSED] 0x9A49 (TIGERLAKE)
[23:26:47] [PASSED] 0x9A59 (TIGERLAKE)
[23:26:47] [PASSED] 0x9A78 (TIGERLAKE)
[23:26:47] [PASSED] 0x9AC0 (TIGERLAKE)
[23:26:47] [PASSED] 0x9AC9 (TIGERLAKE)
[23:26:47] [PASSED] 0x9AD9 (TIGERLAKE)
[23:26:48] [PASSED] 0x9AF8 (TIGERLAKE)
[23:26:48] [PASSED] 0x4C80 (ROCKETLAKE)
[23:26:48] [PASSED] 0x4C8A (ROCKETLAKE)
[23:26:48] [PASSED] 0x4C8B (ROCKETLAKE)
[23:26:48] [PASSED] 0x4C8C (ROCKETLAKE)
[23:26:48] [PASSED] 0x4C90 (ROCKETLAKE)
[23:26:48] [PASSED] 0x4C9A (ROCKETLAKE)
[23:26:48] [PASSED] 0x4680 (ALDERLAKE_S)
[23:26:48] [PASSED] 0x4682 (ALDERLAKE_S)
[23:26:48] [PASSED] 0x4688 (ALDERLAKE_S)
[23:26:48] [PASSED] 0x468A (ALDERLAKE_S)
[23:26:48] [PASSED] 0x468B (ALDERLAKE_S)
[23:26:48] [PASSED] 0x4690 (ALDERLAKE_S)
[23:26:48] [PASSED] 0x4692 (ALDERLAKE_S)
[23:26:48] [PASSED] 0x4693 (ALDERLAKE_S)
[23:26:48] [PASSED] 0x46A0 (ALDERLAKE_P)
[23:26:48] [PASSED] 0x46A1 (ALDERLAKE_P)
[23:26:48] [PASSED] 0x46A2 (ALDERLAKE_P)
[23:26:48] [PASSED] 0x46A3 (ALDERLAKE_P)
[23:26:48] [PASSED] 0x46A6 (ALDERLAKE_P)
[23:26:48] [PASSED] 0x46A8 (ALDERLAKE_P)
[23:26:48] [PASSED] 0x46AA (ALDERLAKE_P)
[23:26:48] [PASSED] 0x462A (ALDERLAKE_P)
[23:26:48] [PASSED] 0x4626 (ALDERLAKE_P)
[23:26:48] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[23:26:48] [PASSED] 0x46B0 (ALDERLAKE_P)
[23:26:48] [PASSED] 0x46B1 (ALDERLAKE_P)
[23:26:48] [PASSED] 0x46B2 (ALDERLAKE_P)
[23:26:48] [PASSED] 0x46B3 (ALDERLAKE_P)
[23:26:48] [PASSED] 0x46C0 (ALDERLAKE_P)
[23:26:48] [PASSED] 0x46C1 (ALDERLAKE_P)
[23:26:48] [PASSED] 0x46C2 (ALDERLAKE_P)
[23:26:48] [PASSED] 0x46C3 (ALDERLAKE_P)
[23:26:48] [PASSED] 0x46D0 (ALDERLAKE_N)
[23:26:48] [PASSED] 0x46D1 (ALDERLAKE_N)
[23:26:48] [PASSED] 0x46D2 (ALDERLAKE_N)
[23:26:48] [PASSED] 0x46D3 (ALDERLAKE_N)
[23:26:48] [PASSED] 0x46D4 (ALDERLAKE_N)
[23:26:48] [PASSED] 0xA721 (ALDERLAKE_P)
[23:26:48] [PASSED] 0xA7A1 (ALDERLAKE_P)
[23:26:48] [PASSED] 0xA7A9 (ALDERLAKE_P)
[23:26:48] [PASSED] 0xA7AC (ALDERLAKE_P)
[23:26:48] [PASSED] 0xA7AD (ALDERLAKE_P)
[23:26:48] [PASSED] 0xA720 (ALDERLAKE_P)
[23:26:48] [PASSED] 0xA7A0 (ALDERLAKE_P)
[23:26:48] [PASSED] 0xA7A8 (ALDERLAKE_P)
[23:26:48] [PASSED] 0xA7AA (ALDERLAKE_P)
[23:26:48] [PASSED] 0xA7AB (ALDERLAKE_P)
[23:26:48] [PASSED] 0xA780 (ALDERLAKE_S)
[23:26:48] [PASSED] 0xA781 (ALDERLAKE_S)
[23:26:48] [PASSED] 0xA782 (ALDERLAKE_S)
[23:26:48] [PASSED] 0xA783 (ALDERLAKE_S)
[23:26:48] [PASSED] 0xA788 (ALDERLAKE_S)
[23:26:48] [PASSED] 0xA789 (ALDERLAKE_S)
[23:26:48] [PASSED] 0xA78A (ALDERLAKE_S)
[23:26:48] [PASSED] 0xA78B (ALDERLAKE_S)
[23:26:48] [PASSED] 0x4905 (DG1)
[23:26:48] [PASSED] 0x4906 (DG1)
[23:26:48] [PASSED] 0x4907 (DG1)
[23:26:48] [PASSED] 0x4908 (DG1)
[23:26:48] [PASSED] 0x4909 (DG1)
[23:26:48] [PASSED] 0x56C0 (DG2)
[23:26:48] [PASSED] 0x56C2 (DG2)
[23:26:48] [PASSED] 0x56C1 (DG2)
[23:26:48] [PASSED] 0x7D51 (METEORLAKE)
[23:26:48] [PASSED] 0x7DD1 (METEORLAKE)
[23:26:48] [PASSED] 0x7D41 (METEORLAKE)
[23:26:48] [PASSED] 0x7D67 (METEORLAKE)
[23:26:48] [PASSED] 0xB640 (METEORLAKE)
[23:26:48] [PASSED] 0x56A0 (DG2)
[23:26:48] [PASSED] 0x56A1 (DG2)
[23:26:48] [PASSED] 0x56A2 (DG2)
[23:26:48] [PASSED] 0x56BE (DG2)
[23:26:48] [PASSED] 0x56BF (DG2)
[23:26:48] [PASSED] 0x5690 (DG2)
[23:26:48] [PASSED] 0x5691 (DG2)
[23:26:48] [PASSED] 0x5692 (DG2)
[23:26:48] [PASSED] 0x56A5 (DG2)
[23:26:48] [PASSED] 0x56A6 (DG2)
[23:26:48] [PASSED] 0x56B0 (DG2)
[23:26:48] [PASSED] 0x56B1 (DG2)
[23:26:48] [PASSED] 0x56BA (DG2)
[23:26:48] [PASSED] 0x56BB (DG2)
[23:26:48] [PASSED] 0x56BC (DG2)
[23:26:48] [PASSED] 0x56BD (DG2)
[23:26:48] [PASSED] 0x5693 (DG2)
[23:26:48] [PASSED] 0x5694 (DG2)
[23:26:48] [PASSED] 0x5695 (DG2)
[23:26:48] [PASSED] 0x56A3 (DG2)
[23:26:48] [PASSED] 0x56A4 (DG2)
[23:26:48] [PASSED] 0x56B2 (DG2)
[23:26:48] [PASSED] 0x56B3 (DG2)
[23:26:48] [PASSED] 0x5696 (DG2)
[23:26:48] [PASSED] 0x5697 (DG2)
[23:26:48] [PASSED] 0xB69 (PVC)
[23:26:48] [PASSED] 0xB6E (PVC)
[23:26:48] [PASSED] 0xBD4 (PVC)
[23:26:48] [PASSED] 0xBD5 (PVC)
[23:26:48] [PASSED] 0xBD6 (PVC)
[23:26:48] [PASSED] 0xBD7 (PVC)
[23:26:48] [PASSED] 0xBD8 (PVC)
[23:26:48] [PASSED] 0xBD9 (PVC)
[23:26:48] [PASSED] 0xBDA (PVC)
[23:26:48] [PASSED] 0xBDB (PVC)
[23:26:48] [PASSED] 0xBE0 (PVC)
[23:26:48] [PASSED] 0xBE1 (PVC)
[23:26:48] [PASSED] 0xBE5 (PVC)
[23:26:48] [PASSED] 0x7D40 (METEORLAKE)
[23:26:48] [PASSED] 0x7D45 (METEORLAKE)
[23:26:48] [PASSED] 0x7D55 (METEORLAKE)
[23:26:48] [PASSED] 0x7D60 (METEORLAKE)
[23:26:48] [PASSED] 0x7DD5 (METEORLAKE)
[23:26:48] [PASSED] 0x6420 (LUNARLAKE)
[23:26:48] [PASSED] 0x64A0 (LUNARLAKE)
[23:26:48] [PASSED] 0x64B0 (LUNARLAKE)
[23:26:48] [PASSED] 0xE202 (BATTLEMAGE)
[23:26:48] [PASSED] 0xE209 (BATTLEMAGE)
[23:26:48] [PASSED] 0xE20B (BATTLEMAGE)
[23:26:48] [PASSED] 0xE20C (BATTLEMAGE)
[23:26:48] [PASSED] 0xE20D (BATTLEMAGE)
[23:26:48] [PASSED] 0xE210 (BATTLEMAGE)
[23:26:48] [PASSED] 0xE211 (BATTLEMAGE)
[23:26:48] [PASSED] 0xE212 (BATTLEMAGE)
[23:26:48] [PASSED] 0xE216 (BATTLEMAGE)
[23:26:48] [PASSED] 0xE220 (BATTLEMAGE)
[23:26:48] [PASSED] 0xE221 (BATTLEMAGE)
[23:26:48] [PASSED] 0xE222 (BATTLEMAGE)
[23:26:48] [PASSED] 0xE223 (BATTLEMAGE)
[23:26:48] [PASSED] 0xB080 (PANTHERLAKE)
[23:26:48] [PASSED] 0xB081 (PANTHERLAKE)
[23:26:48] [PASSED] 0xB082 (PANTHERLAKE)
[23:26:48] [PASSED] 0xB083 (PANTHERLAKE)
[23:26:48] [PASSED] 0xB084 (PANTHERLAKE)
[23:26:48] [PASSED] 0xB085 (PANTHERLAKE)
[23:26:48] [PASSED] 0xB086 (PANTHERLAKE)
[23:26:48] [PASSED] 0xB087 (PANTHERLAKE)
[23:26:48] [PASSED] 0xB08F (PANTHERLAKE)
[23:26:48] [PASSED] 0xB090 (PANTHERLAKE)
[23:26:48] [PASSED] 0xB0A0 (PANTHERLAKE)
[23:26:48] [PASSED] 0xB0B0 (PANTHERLAKE)
[23:26:48] [PASSED] 0xFD80 (PANTHERLAKE)
[23:26:48] [PASSED] 0xFD81 (PANTHERLAKE)
[23:26:48] [PASSED] 0xD740 (NOVALAKE_S)
[23:26:48] [PASSED] 0xD741 (NOVALAKE_S)
[23:26:48] [PASSED] 0xD742 (NOVALAKE_S)
[23:26:48] [PASSED] 0xD743 (NOVALAKE_S)
[23:26:48] [PASSED] 0xD744 (NOVALAKE_S)
[23:26:48] [PASSED] 0xD745 (NOVALAKE_S)
[23:26:48] [PASSED] 0x674C (CRESCENTISLAND)
[23:26:48] =============== [PASSED] check_platform_desc ===============
[23:26:48] ===================== [PASSED] xe_pci ======================
[23:26:48] =================== xe_rtp (2 subtests) ====================
[23:26:48] =============== xe_rtp_process_to_sr_tests ================
[23:26:48] [PASSED] coalesce-same-reg
[23:26:48] [PASSED] no-match-no-add
[23:26:48] [PASSED] match-or
[23:26:48] [PASSED] match-or-xfail
[23:26:48] [PASSED] no-match-no-add-multiple-rules
[23:26:48] [PASSED] two-regs-two-entries
[23:26:48] [PASSED] clr-one-set-other
[23:26:48] [PASSED] set-field
[23:26:48] [PASSED] conflict-duplicate
[23:26:48] [PASSED] conflict-not-disjoint
[23:26:48] [PASSED] conflict-reg-type
[23:26:48] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[23:26:48] ================== xe_rtp_process_tests ===================
[23:26:48] [PASSED] active1
[23:26:48] [PASSED] active2
[23:26:48] [PASSED] active-inactive
[23:26:48] [PASSED] inactive-active
[23:26:48] [PASSED] inactive-1st_or_active-inactive
[23:26:48] [PASSED] inactive-2nd_or_active-inactive
[23:26:48] [PASSED] inactive-last_or_active-inactive
[23:26:48] [PASSED] inactive-no_or_active-inactive
[23:26:48] ============== [PASSED] xe_rtp_process_tests ===============
[23:26:48] ===================== [PASSED] xe_rtp ======================
[23:26:48] ==================== xe_wa (1 subtest) =====================
[23:26:48] ======================== xe_wa_gt =========================
[23:26:48] [PASSED] TIGERLAKE B0
[23:26:48] [PASSED] DG1 A0
[23:26:48] [PASSED] DG1 B0
[23:26:48] [PASSED] ALDERLAKE_S A0
[23:26:48] [PASSED] ALDERLAKE_S B0
[23:26:48] [PASSED] ALDERLAKE_S C0
[23:26:48] [PASSED] ALDERLAKE_S D0
[23:26:48] [PASSED] ALDERLAKE_P A0
[23:26:48] [PASSED] ALDERLAKE_P B0
[23:26:48] [PASSED] ALDERLAKE_P C0
[23:26:48] [PASSED] ALDERLAKE_S RPLS D0
[23:26:48] [PASSED] ALDERLAKE_P RPLU E0
[23:26:48] [PASSED] DG2 G10 C0
[23:26:48] [PASSED] DG2 G11 B1
[23:26:48] [PASSED] DG2 G12 A1
[23:26:48] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:26:48] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:26:48] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[23:26:48] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[23:26:48] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[23:26:48] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[23:26:48] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[23:26:48] ==================== [PASSED] xe_wa_gt =====================
[23:26:48] ====================== [PASSED] xe_wa ======================
[23:26:48] ============================================================
[23:26:48] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[23:26:48] Elapsed time: 36.445s total, 4.284s configuring, 31.644s building, 0.474s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[23:26:48] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:26:49] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:27:15] Starting KUnit Kernel (1/1)...
[23:27:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:27:15] ============ drm_test_pick_cmdline (2 subtests) ============
[23:27:15] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[23:27:15] =============== drm_test_pick_cmdline_named ===============
[23:27:15] [PASSED] NTSC
[23:27:15] [PASSED] NTSC-J
[23:27:15] [PASSED] PAL
[23:27:15] [PASSED] PAL-M
[23:27:15] =========== [PASSED] drm_test_pick_cmdline_named ===========
[23:27:15] ============== [PASSED] drm_test_pick_cmdline ==============
[23:27:15] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[23:27:15] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[23:27:15] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[23:27:15] =========== drm_validate_clone_mode (2 subtests) ===========
[23:27:15] ============== drm_test_check_in_clone_mode ===============
[23:27:15] [PASSED] in_clone_mode
[23:27:15] [PASSED] not_in_clone_mode
[23:27:15] ========== [PASSED] drm_test_check_in_clone_mode ===========
[23:27:15] =============== drm_test_check_valid_clones ===============
[23:27:15] [PASSED] not_in_clone_mode
[23:27:15] [PASSED] valid_clone
[23:27:15] [PASSED] invalid_clone
[23:27:15] =========== [PASSED] drm_test_check_valid_clones ===========
[23:27:15] ============= [PASSED] drm_validate_clone_mode =============
[23:27:15] ============= drm_validate_modeset (1 subtest) =============
[23:27:15] [PASSED] drm_test_check_connector_changed_modeset
[23:27:15] ============== [PASSED] drm_validate_modeset ===============
[23:27:15] ====== drm_test_bridge_get_current_state (2 subtests) ======
[23:27:15] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[23:27:15] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[23:27:15] ======== [PASSED] drm_test_bridge_get_current_state ========
[23:27:15] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[23:27:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[23:27:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[23:27:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[23:27:15] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[23:27:15] ============== drm_bridge_alloc (2 subtests) ===============
[23:27:15] [PASSED] drm_test_drm_bridge_alloc_basic
[23:27:15] [PASSED] drm_test_drm_bridge_alloc_get_put
[23:27:15] ================ [PASSED] drm_bridge_alloc =================
[23:27:15] ================== drm_buddy (9 subtests) ==================
[23:27:15] [PASSED] drm_test_buddy_alloc_limit
[23:27:15] [PASSED] drm_test_buddy_alloc_optimistic
[23:27:15] [PASSED] drm_test_buddy_alloc_pessimistic
[23:27:15] [PASSED] drm_test_buddy_alloc_pathological
[23:27:15] [PASSED] drm_test_buddy_alloc_contiguous
[23:27:15] [PASSED] drm_test_buddy_alloc_clear
[23:27:15] [PASSED] drm_test_buddy_alloc_range_bias
[23:27:15] [PASSED] drm_test_buddy_fragmentation_performance
[23:27:15] [PASSED] drm_test_buddy_alloc_exceeds_max_order
[23:27:15] ==================== [PASSED] drm_buddy ====================
[23:27:15] ============= drm_cmdline_parser (40 subtests) =============
[23:27:15] [PASSED] drm_test_cmdline_force_d_only
[23:27:15] [PASSED] drm_test_cmdline_force_D_only_dvi
[23:27:15] [PASSED] drm_test_cmdline_force_D_only_hdmi
[23:27:15] [PASSED] drm_test_cmdline_force_D_only_not_digital
[23:27:15] [PASSED] drm_test_cmdline_force_e_only
[23:27:15] [PASSED] drm_test_cmdline_res
[23:27:15] [PASSED] drm_test_cmdline_res_vesa
[23:27:15] [PASSED] drm_test_cmdline_res_vesa_rblank
[23:27:15] [PASSED] drm_test_cmdline_res_rblank
[23:27:15] [PASSED] drm_test_cmdline_res_bpp
[23:27:15] [PASSED] drm_test_cmdline_res_refresh
[23:27:15] [PASSED] drm_test_cmdline_res_bpp_refresh
[23:27:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[23:27:15] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[23:27:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[23:27:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[23:27:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[23:27:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[23:27:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[23:27:15] [PASSED] drm_test_cmdline_res_margins_force_on
[23:27:15] [PASSED] drm_test_cmdline_res_vesa_margins
[23:27:15] [PASSED] drm_test_cmdline_name
[23:27:15] [PASSED] drm_test_cmdline_name_bpp
[23:27:15] [PASSED] drm_test_cmdline_name_option
[23:27:15] [PASSED] drm_test_cmdline_name_bpp_option
[23:27:15] [PASSED] drm_test_cmdline_rotate_0
[23:27:15] [PASSED] drm_test_cmdline_rotate_90
[23:27:15] [PASSED] drm_test_cmdline_rotate_180
[23:27:15] [PASSED] drm_test_cmdline_rotate_270
[23:27:15] [PASSED] drm_test_cmdline_hmirror
[23:27:15] [PASSED] drm_test_cmdline_vmirror
[23:27:15] [PASSED] drm_test_cmdline_margin_options
[23:27:15] [PASSED] drm_test_cmdline_multiple_options
[23:27:15] [PASSED] drm_test_cmdline_bpp_extra_and_option
[23:27:15] [PASSED] drm_test_cmdline_extra_and_option
[23:27:15] [PASSED] drm_test_cmdline_freestanding_options
[23:27:15] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[23:27:15] [PASSED] drm_test_cmdline_panel_orientation
[23:27:15] ================ drm_test_cmdline_invalid =================
[23:27:15] [PASSED] margin_only
[23:27:15] [PASSED] interlace_only
[23:27:15] [PASSED] res_missing_x
[23:27:15] [PASSED] res_missing_y
[23:27:15] [PASSED] res_bad_y
[23:27:15] [PASSED] res_missing_y_bpp
[23:27:15] [PASSED] res_bad_bpp
[23:27:15] [PASSED] res_bad_refresh
[23:27:15] [PASSED] res_bpp_refresh_force_on_off
[23:27:15] [PASSED] res_invalid_mode
[23:27:15] [PASSED] res_bpp_wrong_place_mode
[23:27:15] [PASSED] name_bpp_refresh
[23:27:15] [PASSED] name_refresh
[23:27:15] [PASSED] name_refresh_wrong_mode
[23:27:15] [PASSED] name_refresh_invalid_mode
[23:27:15] [PASSED] rotate_multiple
[23:27:15] [PASSED] rotate_invalid_val
[23:27:15] [PASSED] rotate_truncated
[23:27:15] [PASSED] invalid_option
[23:27:15] [PASSED] invalid_tv_option
[23:27:15] [PASSED] truncated_tv_option
[23:27:15] ============ [PASSED] drm_test_cmdline_invalid =============
[23:27:15] =============== drm_test_cmdline_tv_options ===============
[23:27:15] [PASSED] NTSC
[23:27:15] [PASSED] NTSC_443
[23:27:15] [PASSED] NTSC_J
[23:27:15] [PASSED] PAL
[23:27:15] [PASSED] PAL_M
[23:27:15] [PASSED] PAL_N
[23:27:15] [PASSED] SECAM
[23:27:15] [PASSED] MONO_525
[23:27:15] [PASSED] MONO_625
[23:27:15] =========== [PASSED] drm_test_cmdline_tv_options ===========
[23:27:15] =============== [PASSED] drm_cmdline_parser ================
[23:27:15] ========== drmm_connector_hdmi_init (20 subtests) ==========
[23:27:15] [PASSED] drm_test_connector_hdmi_init_valid
[23:27:15] [PASSED] drm_test_connector_hdmi_init_bpc_8
[23:27:15] [PASSED] drm_test_connector_hdmi_init_bpc_10
[23:27:15] [PASSED] drm_test_connector_hdmi_init_bpc_12
[23:27:15] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[23:27:15] [PASSED] drm_test_connector_hdmi_init_bpc_null
[23:27:15] [PASSED] drm_test_connector_hdmi_init_formats_empty
[23:27:15] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[23:27:15] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[23:27:15] [PASSED] supported_formats=0x9 yuv420_allowed=1
[23:27:15] [PASSED] supported_formats=0x9 yuv420_allowed=0
[23:27:15] [PASSED] supported_formats=0x3 yuv420_allowed=1
[23:27:15] [PASSED] supported_formats=0x3 yuv420_allowed=0
[23:27:15] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[23:27:15] [PASSED] drm_test_connector_hdmi_init_null_ddc
[23:27:15] [PASSED] drm_test_connector_hdmi_init_null_product
[23:27:15] [PASSED] drm_test_connector_hdmi_init_null_vendor
[23:27:15] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[23:27:15] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[23:27:15] [PASSED] drm_test_connector_hdmi_init_product_valid
[23:27:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[23:27:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[23:27:15] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[23:27:15] ========= drm_test_connector_hdmi_init_type_valid =========
[23:27:15] [PASSED] HDMI-A
[23:27:15] [PASSED] HDMI-B
[23:27:15] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[23:27:15] ======== drm_test_connector_hdmi_init_type_invalid ========
[23:27:15] [PASSED] Unknown
[23:27:15] [PASSED] VGA
[23:27:15] [PASSED] DVI-I
[23:27:15] [PASSED] DVI-D
[23:27:15] [PASSED] DVI-A
[23:27:15] [PASSED] Composite
[23:27:15] [PASSED] SVIDEO
[23:27:15] [PASSED] LVDS
[23:27:15] [PASSED] Component
[23:27:15] [PASSED] DIN
[23:27:15] [PASSED] DP
[23:27:15] [PASSED] TV
[23:27:15] [PASSED] eDP
[23:27:15] [PASSED] Virtual
[23:27:15] [PASSED] DSI
[23:27:15] [PASSED] DPI
[23:27:15] [PASSED] Writeback
[23:27:15] [PASSED] SPI
[23:27:15] [PASSED] USB
[23:27:15] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[23:27:15] ============ [PASSED] drmm_connector_hdmi_init =============
[23:27:15] ============= drmm_connector_init (3 subtests) =============
[23:27:15] [PASSED] drm_test_drmm_connector_init
[23:27:15] [PASSED] drm_test_drmm_connector_init_null_ddc
[23:27:15] ========= drm_test_drmm_connector_init_type_valid =========
[23:27:15] [PASSED] Unknown
[23:27:15] [PASSED] VGA
[23:27:15] [PASSED] DVI-I
[23:27:15] [PASSED] DVI-D
[23:27:15] [PASSED] DVI-A
[23:27:15] [PASSED] Composite
[23:27:15] [PASSED] SVIDEO
[23:27:15] [PASSED] LVDS
[23:27:15] [PASSED] Component
[23:27:15] [PASSED] DIN
[23:27:15] [PASSED] DP
[23:27:15] [PASSED] HDMI-A
[23:27:15] [PASSED] HDMI-B
[23:27:15] [PASSED] TV
[23:27:15] [PASSED] eDP
[23:27:15] [PASSED] Virtual
[23:27:15] [PASSED] DSI
[23:27:15] [PASSED] DPI
[23:27:15] [PASSED] Writeback
[23:27:15] [PASSED] SPI
[23:27:15] [PASSED] USB
[23:27:15] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[23:27:15] =============== [PASSED] drmm_connector_init ===============
[23:27:15] ========= drm_connector_dynamic_init (6 subtests) ==========
[23:27:15] [PASSED] drm_test_drm_connector_dynamic_init
[23:27:15] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[23:27:15] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[23:27:15] [PASSED] drm_test_drm_connector_dynamic_init_properties
[23:27:15] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[23:27:15] [PASSED] Unknown
[23:27:15] [PASSED] VGA
[23:27:15] [PASSED] DVI-I
[23:27:15] [PASSED] DVI-D
[23:27:15] [PASSED] DVI-A
[23:27:15] [PASSED] Composite
[23:27:15] [PASSED] SVIDEO
[23:27:15] [PASSED] LVDS
[23:27:15] [PASSED] Component
[23:27:15] [PASSED] DIN
[23:27:15] [PASSED] DP
[23:27:15] [PASSED] HDMI-A
[23:27:15] [PASSED] HDMI-B
[23:27:15] [PASSED] TV
[23:27:15] [PASSED] eDP
[23:27:15] [PASSED] Virtual
[23:27:15] [PASSED] DSI
[23:27:15] [PASSED] DPI
[23:27:15] [PASSED] Writeback
[23:27:15] [PASSED] SPI
[23:27:15] [PASSED] USB
[23:27:15] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[23:27:15] ======== drm_test_drm_connector_dynamic_init_name =========
[23:27:15] [PASSED] Unknown
[23:27:15] [PASSED] VGA
[23:27:15] [PASSED] DVI-I
[23:27:15] [PASSED] DVI-D
[23:27:15] [PASSED] DVI-A
[23:27:15] [PASSED] Composite
[23:27:15] [PASSED] SVIDEO
[23:27:15] [PASSED] LVDS
[23:27:15] [PASSED] Component
[23:27:15] [PASSED] DIN
[23:27:15] [PASSED] DP
[23:27:15] [PASSED] HDMI-A
[23:27:15] [PASSED] HDMI-B
[23:27:15] [PASSED] TV
[23:27:15] [PASSED] eDP
[23:27:15] [PASSED] Virtual
[23:27:15] [PASSED] DSI
[23:27:15] [PASSED] DPI
[23:27:15] [PASSED] Writeback
[23:27:15] [PASSED] SPI
[23:27:15] [PASSED] USB
[23:27:15] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[23:27:15] =========== [PASSED] drm_connector_dynamic_init ============
[23:27:15] ==== drm_connector_dynamic_register_early (4 subtests) =====
[23:27:15] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[23:27:15] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[23:27:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[23:27:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[23:27:15] ====== [PASSED] drm_connector_dynamic_register_early =======
[23:27:15] ======= drm_connector_dynamic_register (7 subtests) ========
[23:27:15] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[23:27:15] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[23:27:15] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[23:27:15] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[23:27:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[23:27:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[23:27:15] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[23:27:15] ========= [PASSED] drm_connector_dynamic_register ==========
[23:27:15] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[23:27:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[23:27:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[23:27:15] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[23:27:15] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[23:27:15] ========== drm_test_get_tv_mode_from_name_valid ===========
[23:27:15] [PASSED] NTSC
[23:27:15] [PASSED] NTSC-443
[23:27:15] [PASSED] NTSC-J
[23:27:15] [PASSED] PAL
[23:27:15] [PASSED] PAL-M
[23:27:15] [PASSED] PAL-N
[23:27:15] [PASSED] SECAM
[23:27:15] [PASSED] Mono
[23:27:15] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[23:27:15] [PASSED] drm_test_get_tv_mode_from_name_truncated
[23:27:15] ============ [PASSED] drm_get_tv_mode_from_name ============
[23:27:15] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[23:27:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[23:27:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[23:27:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[23:27:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[23:27:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[23:27:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[23:27:15] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[23:27:15] [PASSED] VIC 96
[23:27:15] [PASSED] VIC 97
[23:27:15] [PASSED] VIC 101
[23:27:15] [PASSED] VIC 102
[23:27:15] [PASSED] VIC 106
[23:27:15] [PASSED] VIC 107
[23:27:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[23:27:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[23:27:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[23:27:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[23:27:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[23:27:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[23:27:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[23:27:15] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[23:27:15] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[23:27:15] [PASSED] Automatic
[23:27:15] [PASSED] Full
[23:27:15] [PASSED] Limited 16:235
[23:27:15] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[23:27:15] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[23:27:15] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[23:27:15] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[23:27:15] === drm_test_drm_hdmi_connector_get_output_format_name ====
[23:27:15] [PASSED] RGB
[23:27:15] [PASSED] YUV 4:2:0
[23:27:15] [PASSED] YUV 4:2:2
[23:27:15] [PASSED] YUV 4:4:4
[23:27:15] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[23:27:15] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[23:27:15] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[23:27:15] ============= drm_damage_helper (21 subtests) ==============
[23:27:15] [PASSED] drm_test_damage_iter_no_damage
[23:27:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[23:27:15] [PASSED] drm_test_damage_iter_no_damage_src_moved
[23:27:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[23:27:15] [PASSED] drm_test_damage_iter_no_damage_not_visible
[23:27:15] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[23:27:15] [PASSED] drm_test_damage_iter_no_damage_no_fb
[23:27:15] [PASSED] drm_test_damage_iter_simple_damage
[23:27:15] [PASSED] drm_test_damage_iter_single_damage
[23:27:15] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[23:27:15] [PASSED] drm_test_damage_iter_single_damage_outside_src
[23:27:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[23:27:15] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[23:27:15] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[23:27:15] [PASSED] drm_test_damage_iter_single_damage_src_moved
[23:27:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[23:27:15] [PASSED] drm_test_damage_iter_damage
[23:27:15] [PASSED] drm_test_damage_iter_damage_one_intersect
[23:27:15] [PASSED] drm_test_damage_iter_damage_one_outside
[23:27:15] [PASSED] drm_test_damage_iter_damage_src_moved
[23:27:15] [PASSED] drm_test_damage_iter_damage_not_visible
[23:27:15] ================ [PASSED] drm_damage_helper ================
[23:27:15] ============== drm_dp_mst_helper (3 subtests) ==============
[23:27:15] ============== drm_test_dp_mst_calc_pbn_mode ==============
[23:27:15] [PASSED] Clock 154000 BPP 30 DSC disabled
[23:27:15] [PASSED] Clock 234000 BPP 30 DSC disabled
[23:27:15] [PASSED] Clock 297000 BPP 24 DSC disabled
[23:27:15] [PASSED] Clock 332880 BPP 24 DSC enabled
[23:27:15] [PASSED] Clock 324540 BPP 24 DSC enabled
[23:27:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[23:27:15] ============== drm_test_dp_mst_calc_pbn_div ===============
[23:27:15] [PASSED] Link rate 2000000 lane count 4
[23:27:15] [PASSED] Link rate 2000000 lane count 2
[23:27:15] [PASSED] Link rate 2000000 lane count 1
[23:27:15] [PASSED] Link rate 1350000 lane count 4
[23:27:15] [PASSED] Link rate 1350000 lane count 2
[23:27:15] [PASSED] Link rate 1350000 lane count 1
[23:27:15] [PASSED] Link rate 1000000 lane count 4
[23:27:15] [PASSED] Link rate 1000000 lane count 2
[23:27:15] [PASSED] Link rate 1000000 lane count 1
[23:27:15] [PASSED] Link rate 810000 lane count 4
[23:27:15] [PASSED] Link rate 810000 lane count 2
[23:27:15] [PASSED] Link rate 810000 lane count 1
[23:27:15] [PASSED] Link rate 540000 lane count 4
[23:27:15] [PASSED] Link rate 540000 lane count 2
[23:27:15] [PASSED] Link rate 540000 lane count 1
[23:27:15] [PASSED] Link rate 270000 lane count 4
[23:27:15] [PASSED] Link rate 270000 lane count 2
[23:27:15] [PASSED] Link rate 270000 lane count 1
[23:27:15] [PASSED] Link rate 162000 lane count 4
[23:27:15] [PASSED] Link rate 162000 lane count 2
[23:27:15] [PASSED] Link rate 162000 lane count 1
[23:27:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[23:27:15] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[23:27:15] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[23:27:15] [PASSED] DP_POWER_UP_PHY with port number
[23:27:15] [PASSED] DP_POWER_DOWN_PHY with port number
[23:27:15] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[23:27:15] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[23:27:15] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[23:27:15] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[23:27:15] [PASSED] DP_QUERY_PAYLOAD with port number
[23:27:15] [PASSED] DP_QUERY_PAYLOAD with VCPI
[23:27:15] [PASSED] DP_REMOTE_DPCD_READ with port number
[23:27:15] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[23:27:15] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[23:27:15] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[23:27:15] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[23:27:15] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[23:27:15] [PASSED] DP_REMOTE_I2C_READ with port number
[23:27:15] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[23:27:15] [PASSED] DP_REMOTE_I2C_READ with transactions array
[23:27:15] [PASSED] DP_REMOTE_I2C_WRITE with port number
[23:27:15] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[23:27:15] [PASSED] DP_REMOTE_I2C_WRITE with data array
[23:27:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[23:27:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[23:27:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[23:27:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[23:27:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[23:27:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[23:27:15] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[23:27:15] ================ [PASSED] drm_dp_mst_helper ================
[23:27:15] ================== drm_exec (7 subtests) ===================
[23:27:15] [PASSED] sanitycheck
[23:27:15] [PASSED] test_lock
[23:27:15] [PASSED] test_lock_unlock
[23:27:15] [PASSED] test_duplicates
[23:27:15] [PASSED] test_prepare
[23:27:15] [PASSED] test_prepare_array
[23:27:15] [PASSED] test_multiple_loops
[23:27:15] ==================== [PASSED] drm_exec =====================
[23:27:15] =========== drm_format_helper_test (17 subtests) ===========
[23:27:15] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[23:27:15] [PASSED] single_pixel_source_buffer
[23:27:15] [PASSED] single_pixel_clip_rectangle
[23:27:15] [PASSED] well_known_colors
[23:27:15] [PASSED] destination_pitch
[23:27:15] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[23:27:15] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[23:27:15] [PASSED] single_pixel_source_buffer
[23:27:15] [PASSED] single_pixel_clip_rectangle
[23:27:15] [PASSED] well_known_colors
[23:27:15] [PASSED] destination_pitch
[23:27:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[23:27:15] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[23:27:15] [PASSED] single_pixel_source_buffer
[23:27:15] [PASSED] single_pixel_clip_rectangle
[23:27:15] [PASSED] well_known_colors
[23:27:15] [PASSED] destination_pitch
[23:27:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[23:27:15] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[23:27:15] [PASSED] single_pixel_source_buffer
[23:27:15] [PASSED] single_pixel_clip_rectangle
[23:27:15] [PASSED] well_known_colors
[23:27:15] [PASSED] destination_pitch
[23:27:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[23:27:15] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[23:27:15] [PASSED] single_pixel_source_buffer
[23:27:15] [PASSED] single_pixel_clip_rectangle
[23:27:15] [PASSED] well_known_colors
[23:27:15] [PASSED] destination_pitch
[23:27:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[23:27:15] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[23:27:15] [PASSED] single_pixel_source_buffer
[23:27:15] [PASSED] single_pixel_clip_rectangle
[23:27:15] [PASSED] well_known_colors
[23:27:15] [PASSED] destination_pitch
[23:27:15] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[23:27:15] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[23:27:15] [PASSED] single_pixel_source_buffer
[23:27:15] [PASSED] single_pixel_clip_rectangle
[23:27:15] [PASSED] well_known_colors
[23:27:15] [PASSED] destination_pitch
[23:27:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[23:27:15] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[23:27:15] [PASSED] single_pixel_source_buffer
[23:27:15] [PASSED] single_pixel_clip_rectangle
[23:27:15] [PASSED] well_known_colors
[23:27:15] [PASSED] destination_pitch
[23:27:15] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[23:27:15] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[23:27:15] [PASSED] single_pixel_source_buffer
[23:27:15] [PASSED] single_pixel_clip_rectangle
[23:27:15] [PASSED] well_known_colors
[23:27:15] [PASSED] destination_pitch
[23:27:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[23:27:15] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[23:27:15] [PASSED] single_pixel_source_buffer
[23:27:15] [PASSED] single_pixel_clip_rectangle
[23:27:15] [PASSED] well_known_colors
[23:27:15] [PASSED] destination_pitch
[23:27:15] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[23:27:15] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[23:27:15] [PASSED] single_pixel_source_buffer
[23:27:15] [PASSED] single_pixel_clip_rectangle
[23:27:15] [PASSED] well_known_colors
[23:27:15] [PASSED] destination_pitch
[23:27:15] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[23:27:15] ============== drm_test_fb_xrgb8888_to_mono ===============
[23:27:15] [PASSED] single_pixel_source_buffer
[23:27:15] [PASSED] single_pixel_clip_rectangle
[23:27:15] [PASSED] well_known_colors
[23:27:15] [PASSED] destination_pitch
[23:27:15] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[23:27:15] ==================== drm_test_fb_swab =====================
[23:27:15] [PASSED] single_pixel_source_buffer
[23:27:15] [PASSED] single_pixel_clip_rectangle
[23:27:15] [PASSED] well_known_colors
[23:27:15] [PASSED] destination_pitch
[23:27:15] ================ [PASSED] drm_test_fb_swab =================
[23:27:15] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[23:27:15] [PASSED] single_pixel_source_buffer
[23:27:15] [PASSED] single_pixel_clip_rectangle
[23:27:15] [PASSED] well_known_colors
[23:27:15] [PASSED] destination_pitch
[23:27:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[23:27:15] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[23:27:15] [PASSED] single_pixel_source_buffer
[23:27:15] [PASSED] single_pixel_clip_rectangle
[23:27:15] [PASSED] well_known_colors
[23:27:15] [PASSED] destination_pitch
[23:27:15] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[23:27:15] ================= drm_test_fb_clip_offset =================
[23:27:15] [PASSED] pass through
[23:27:15] [PASSED] horizontal offset
[23:27:15] [PASSED] vertical offset
[23:27:15] [PASSED] horizontal and vertical offset
[23:27:15] [PASSED] horizontal offset (custom pitch)
[23:27:15] [PASSED] vertical offset (custom pitch)
[23:27:15] [PASSED] horizontal and vertical offset (custom pitch)
[23:27:15] ============= [PASSED] drm_test_fb_clip_offset =============
[23:27:15] =================== drm_test_fb_memcpy ====================
[23:27:15] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[23:27:15] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[23:27:15] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[23:27:15] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[23:27:15] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[23:27:15] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[23:27:15] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[23:27:15] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[23:27:15] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[23:27:15] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[23:27:15] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[23:27:15] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[23:27:15] =============== [PASSED] drm_test_fb_memcpy ================
[23:27:15] ============= [PASSED] drm_format_helper_test ==============
[23:27:15] ================= drm_format (18 subtests) =================
[23:27:15] [PASSED] drm_test_format_block_width_invalid
[23:27:15] [PASSED] drm_test_format_block_width_one_plane
[23:27:15] [PASSED] drm_test_format_block_width_two_plane
[23:27:15] [PASSED] drm_test_format_block_width_three_plane
[23:27:15] [PASSED] drm_test_format_block_width_tiled
[23:27:15] [PASSED] drm_test_format_block_height_invalid
[23:27:15] [PASSED] drm_test_format_block_height_one_plane
[23:27:15] [PASSED] drm_test_format_block_height_two_plane
[23:27:15] [PASSED] drm_test_format_block_height_three_plane
[23:27:15] [PASSED] drm_test_format_block_height_tiled
[23:27:15] [PASSED] drm_test_format_min_pitch_invalid
[23:27:15] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[23:27:15] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[23:27:15] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[23:27:15] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[23:27:15] [PASSED] drm_test_format_min_pitch_two_plane
[23:27:15] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[23:27:15] [PASSED] drm_test_format_min_pitch_tiled
[23:27:15] =================== [PASSED] drm_format ====================
[23:27:15] ============== drm_framebuffer (10 subtests) ===============
[23:27:15] ========== drm_test_framebuffer_check_src_coords ==========
[23:27:15] [PASSED] Success: source fits into fb
[23:27:15] [PASSED] Fail: overflowing fb with x-axis coordinate
[23:27:15] [PASSED] Fail: overflowing fb with y-axis coordinate
[23:27:15] [PASSED] Fail: overflowing fb with source width
[23:27:15] [PASSED] Fail: overflowing fb with source height
[23:27:15] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[23:27:15] [PASSED] drm_test_framebuffer_cleanup
[23:27:15] =============== drm_test_framebuffer_create ===============
[23:27:15] [PASSED] ABGR8888 normal sizes
[23:27:15] [PASSED] ABGR8888 max sizes
[23:27:15] [PASSED] ABGR8888 pitch greater than min required
[23:27:15] [PASSED] ABGR8888 pitch less than min required
[23:27:15] [PASSED] ABGR8888 Invalid width
[23:27:15] [PASSED] ABGR8888 Invalid buffer handle
[23:27:15] [PASSED] No pixel format
[23:27:15] [PASSED] ABGR8888 Width 0
[23:27:15] [PASSED] ABGR8888 Height 0
[23:27:15] [PASSED] ABGR8888 Out of bound height * pitch combination
[23:27:15] [PASSED] ABGR8888 Large buffer offset
[23:27:15] [PASSED] ABGR8888 Buffer offset for inexistent plane
[23:27:15] [PASSED] ABGR8888 Invalid flag
[23:27:15] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[23:27:15] [PASSED] ABGR8888 Valid buffer modifier
[23:27:15] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[23:27:15] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[23:27:15] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[23:27:15] [PASSED] NV12 Normal sizes
[23:27:15] [PASSED] NV12 Max sizes
[23:27:15] [PASSED] NV12 Invalid pitch
[23:27:15] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[23:27:15] [PASSED] NV12 different modifier per-plane
[23:27:15] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[23:27:15] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[23:27:15] [PASSED] NV12 Modifier for inexistent plane
[23:27:15] [PASSED] NV12 Handle for inexistent plane
[23:27:15] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[23:27:15] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[23:27:15] [PASSED] YVU420 Normal sizes
[23:27:15] [PASSED] YVU420 Max sizes
[23:27:15] [PASSED] YVU420 Invalid pitch
[23:27:15] [PASSED] YVU420 Different pitches
[23:27:15] [PASSED] YVU420 Different buffer offsets/pitches
[23:27:15] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[23:27:15] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[23:27:15] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[23:27:15] [PASSED] YVU420 Valid modifier
[23:27:15] [PASSED] YVU420 Different modifiers per plane
[23:27:15] [PASSED] YVU420 Modifier for inexistent plane
[23:27:15] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[23:27:15] [PASSED] X0L2 Normal sizes
[23:27:15] [PASSED] X0L2 Max sizes
[23:27:15] [PASSED] X0L2 Invalid pitch
[23:27:15] [PASSED] X0L2 Pitch greater than minimum required
[23:27:15] [PASSED] X0L2 Handle for inexistent plane
[23:27:15] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[23:27:15] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[23:27:15] [PASSED] X0L2 Valid modifier
[23:27:15] [PASSED] X0L2 Modifier for inexistent plane
[23:27:15] =========== [PASSED] drm_test_framebuffer_create ===========
[23:27:15] [PASSED] drm_test_framebuffer_free
[23:27:15] [PASSED] drm_test_framebuffer_init
[23:27:15] [PASSED] drm_test_framebuffer_init_bad_format
[23:27:15] [PASSED] drm_test_framebuffer_init_dev_mismatch
[23:27:15] [PASSED] drm_test_framebuffer_lookup
[23:27:15] [PASSED] drm_test_framebuffer_lookup_inexistent
[23:27:15] [PASSED] drm_test_framebuffer_modifiers_not_supported
[23:27:15] ================= [PASSED] drm_framebuffer =================
[23:27:15] ================ drm_gem_shmem (8 subtests) ================
[23:27:15] [PASSED] drm_gem_shmem_test_obj_create
[23:27:15] [PASSED] drm_gem_shmem_test_obj_create_private
[23:27:15] [PASSED] drm_gem_shmem_test_pin_pages
[23:27:15] [PASSED] drm_gem_shmem_test_vmap
[23:27:15] [PASSED] drm_gem_shmem_test_get_sg_table
[23:27:15] [PASSED] drm_gem_shmem_test_get_pages_sgt
[23:27:15] [PASSED] drm_gem_shmem_test_madvise
[23:27:15] [PASSED] drm_gem_shmem_test_purge
[23:27:15] ================== [PASSED] drm_gem_shmem ==================
[23:27:15] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[23:27:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[23:27:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[23:27:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[23:27:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[23:27:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[23:27:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[23:27:15] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[23:27:15] [PASSED] Automatic
[23:27:15] [PASSED] Full
[23:27:15] [PASSED] Limited 16:235
[23:27:15] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[23:27:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[23:27:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[23:27:15] [PASSED] drm_test_check_disable_connector
[23:27:15] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[23:27:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[23:27:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[23:27:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[23:27:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[23:27:15] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[23:27:15] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[23:27:15] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[23:27:15] [PASSED] drm_test_check_output_bpc_dvi
[23:27:15] [PASSED] drm_test_check_output_bpc_format_vic_1
[23:27:15] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[23:27:15] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[23:27:15] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[23:27:15] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[23:27:15] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[23:27:15] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[23:27:15] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[23:27:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[23:27:15] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[23:27:15] [PASSED] drm_test_check_broadcast_rgb_value
[23:27:15] [PASSED] drm_test_check_bpc_8_value
[23:27:15] [PASSED] drm_test_check_bpc_10_value
[23:27:15] [PASSED] drm_test_check_bpc_12_value
[23:27:15] [PASSED] drm_test_check_format_value
[23:27:15] [PASSED] drm_test_check_tmds_char_value
[23:27:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[23:27:15] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[23:27:15] [PASSED] drm_test_check_mode_valid
[23:27:15] [PASSED] drm_test_check_mode_valid_reject
[23:27:15] [PASSED] drm_test_check_mode_valid_reject_rate
[23:27:15] [PASSED] drm_test_check_mode_valid_reject_max_clock
[23:27:15] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[23:27:15] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[23:27:15] [PASSED] drm_test_check_infoframes
[23:27:15] [PASSED] drm_test_check_reject_avi_infoframe
[23:27:15] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[23:27:15] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[23:27:15] [PASSED] drm_test_check_reject_audio_infoframe
[23:27:15] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[23:27:15] ================= drm_managed (2 subtests) =================
[23:27:15] [PASSED] drm_test_managed_release_action
[23:27:15] [PASSED] drm_test_managed_run_action
[23:27:15] =================== [PASSED] drm_managed ===================
[23:27:15] =================== drm_mm (6 subtests) ====================
[23:27:15] [PASSED] drm_test_mm_init
[23:27:15] [PASSED] drm_test_mm_debug
[23:27:15] [PASSED] drm_test_mm_align32
[23:27:15] [PASSED] drm_test_mm_align64
[23:27:15] [PASSED] drm_test_mm_lowest
[23:27:15] [PASSED] drm_test_mm_highest
[23:27:15] ===================== [PASSED] drm_mm ======================
[23:27:15] ============= drm_modes_analog_tv (5 subtests) =============
[23:27:15] [PASSED] drm_test_modes_analog_tv_mono_576i
[23:27:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[23:27:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[23:27:15] [PASSED] drm_test_modes_analog_tv_pal_576i
[23:27:15] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[23:27:15] =============== [PASSED] drm_modes_analog_tv ===============
[23:27:15] ============== drm_plane_helper (2 subtests) ===============
[23:27:15] =============== drm_test_check_plane_state ================
[23:27:15] [PASSED] clipping_simple
[23:27:15] [PASSED] clipping_rotate_reflect
[23:27:15] [PASSED] positioning_simple
[23:27:15] [PASSED] upscaling
[23:27:15] [PASSED] downscaling
[23:27:15] [PASSED] rounding1
[23:27:15] [PASSED] rounding2
[23:27:15] [PASSED] rounding3
[23:27:15] [PASSED] rounding4
[23:27:15] =========== [PASSED] drm_test_check_plane_state ============
[23:27:15] =========== drm_test_check_invalid_plane_state ============
[23:27:15] [PASSED] positioning_invalid
[23:27:15] [PASSED] upscaling_invalid
[23:27:15] [PASSED] downscaling_invalid
[23:27:15] ======= [PASSED] drm_test_check_invalid_plane_state ========
[23:27:15] ================ [PASSED] drm_plane_helper =================
[23:27:15] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[23:27:15] ====== drm_test_connector_helper_tv_get_modes_check =======
[23:27:15] [PASSED] None
[23:27:15] [PASSED] PAL
[23:27:15] [PASSED] NTSC
[23:27:15] [PASSED] Both, NTSC Default
[23:27:15] [PASSED] Both, PAL Default
[23:27:15] [PASSED] Both, NTSC Default, with PAL on command-line
[23:27:15] [PASSED] Both, PAL Default, with NTSC on command-line
[23:27:15] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[23:27:15] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[23:27:15] ================== drm_rect (9 subtests) ===================
[23:27:15] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[23:27:15] [PASSED] drm_test_rect_clip_scaled_not_clipped
[23:27:15] [PASSED] drm_test_rect_clip_scaled_clipped
[23:27:15] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[23:27:15] ================= drm_test_rect_intersect =================
[23:27:15] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[23:27:15] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[23:27:15] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[23:27:15] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[23:27:15] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[23:27:15] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[23:27:15] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[23:27:15] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[23:27:15] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[23:27:15] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[23:27:15] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[23:27:15] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[23:27:15] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[23:27:15] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[23:27:15] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
stty: 'standard input': Inappropriate ioctl for device
[23:27:15] ============= [PASSED] drm_test_rect_intersect =============
[23:27:15] ================ drm_test_rect_calc_hscale ================
[23:27:15] [PASSED] normal use
[23:27:15] [PASSED] out of max range
[23:27:15] [PASSED] out of min range
[23:27:15] [PASSED] zero dst
[23:27:15] [PASSED] negative src
[23:27:15] [PASSED] negative dst
[23:27:15] ============ [PASSED] drm_test_rect_calc_hscale ============
[23:27:15] ================ drm_test_rect_calc_vscale ================
[23:27:15] [PASSED] normal use
[23:27:15] [PASSED] out of max range
[23:27:15] [PASSED] out of min range
[23:27:15] [PASSED] zero dst
[23:27:15] [PASSED] negative src
[23:27:15] [PASSED] negative dst
[23:27:15] ============ [PASSED] drm_test_rect_calc_vscale ============
[23:27:15] ================== drm_test_rect_rotate ===================
[23:27:15] [PASSED] reflect-x
[23:27:15] [PASSED] reflect-y
[23:27:15] [PASSED] rotate-0
[23:27:15] [PASSED] rotate-90
[23:27:15] [PASSED] rotate-180
[23:27:15] [PASSED] rotate-270
[23:27:15] ============== [PASSED] drm_test_rect_rotate ===============
[23:27:15] ================ drm_test_rect_rotate_inv =================
[23:27:15] [PASSED] reflect-x
[23:27:15] [PASSED] reflect-y
[23:27:15] [PASSED] rotate-0
[23:27:15] [PASSED] rotate-90
[23:27:15] [PASSED] rotate-180
[23:27:15] [PASSED] rotate-270
[23:27:15] ============ [PASSED] drm_test_rect_rotate_inv =============
[23:27:15] ==================== [PASSED] drm_rect =====================
[23:27:15] ============ drm_sysfb_modeset_test (1 subtest) ============
[23:27:15] ============ drm_test_sysfb_build_fourcc_list =============
[23:27:15] [PASSED] no native formats
[23:27:15] [PASSED] XRGB8888 as native format
[23:27:15] [PASSED] remove duplicates
[23:27:15] [PASSED] convert alpha formats
[23:27:15] [PASSED] random formats
[23:27:15] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[23:27:15] ============= [PASSED] drm_sysfb_modeset_test ==============
[23:27:15] ================== drm_fixp (2 subtests) ===================
[23:27:15] [PASSED] drm_test_int2fixp
[23:27:15] [PASSED] drm_test_sm2fixp
[23:27:15] ==================== [PASSED] drm_fixp =====================
[23:27:15] ============================================================
[23:27:15] Testing complete. Ran 630 tests: passed: 630
[23:27:15] Elapsed time: 27.525s total, 1.646s configuring, 25.457s building, 0.416s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[23:27:15] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:27:17] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:27:27] Starting KUnit Kernel (1/1)...
[23:27:27] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:27:27] ================= ttm_device (5 subtests) ==================
[23:27:27] [PASSED] ttm_device_init_basic
[23:27:27] [PASSED] ttm_device_init_multiple
[23:27:27] [PASSED] ttm_device_fini_basic
[23:27:27] [PASSED] ttm_device_init_no_vma_man
[23:27:27] ================== ttm_device_init_pools ==================
[23:27:27] [PASSED] No DMA allocations, no DMA32 required
[23:27:27] [PASSED] DMA allocations, DMA32 required
[23:27:27] [PASSED] No DMA allocations, DMA32 required
[23:27:27] [PASSED] DMA allocations, no DMA32 required
[23:27:27] ============== [PASSED] ttm_device_init_pools ==============
[23:27:27] =================== [PASSED] ttm_device ====================
[23:27:27] ================== ttm_pool (8 subtests) ===================
[23:27:27] ================== ttm_pool_alloc_basic ===================
[23:27:27] [PASSED] One page
[23:27:27] [PASSED] More than one page
[23:27:27] [PASSED] Above the allocation limit
[23:27:27] [PASSED] One page, with coherent DMA mappings enabled
[23:27:27] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[23:27:27] ============== [PASSED] ttm_pool_alloc_basic ===============
[23:27:27] ============== ttm_pool_alloc_basic_dma_addr ==============
[23:27:27] [PASSED] One page
[23:27:27] [PASSED] More than one page
[23:27:27] [PASSED] Above the allocation limit
[23:27:27] [PASSED] One page, with coherent DMA mappings enabled
[23:27:27] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[23:27:27] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[23:27:27] [PASSED] ttm_pool_alloc_order_caching_match
[23:27:27] [PASSED] ttm_pool_alloc_caching_mismatch
[23:27:27] [PASSED] ttm_pool_alloc_order_mismatch
[23:27:27] [PASSED] ttm_pool_free_dma_alloc
[23:27:27] [PASSED] ttm_pool_free_no_dma_alloc
[23:27:27] [PASSED] ttm_pool_fini_basic
[23:27:27] ==================== [PASSED] ttm_pool =====================
[23:27:27] ================ ttm_resource (8 subtests) =================
[23:27:27] ================= ttm_resource_init_basic =================
[23:27:27] [PASSED] Init resource in TTM_PL_SYSTEM
[23:27:27] [PASSED] Init resource in TTM_PL_VRAM
[23:27:27] [PASSED] Init resource in a private placement
[23:27:27] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[23:27:27] ============= [PASSED] ttm_resource_init_basic =============
[23:27:27] [PASSED] ttm_resource_init_pinned
[23:27:27] [PASSED] ttm_resource_fini_basic
[23:27:27] [PASSED] ttm_resource_manager_init_basic
[23:27:27] [PASSED] ttm_resource_manager_usage_basic
[23:27:27] [PASSED] ttm_resource_manager_set_used_basic
[23:27:27] [PASSED] ttm_sys_man_alloc_basic
[23:27:27] [PASSED] ttm_sys_man_free_basic
[23:27:27] ================== [PASSED] ttm_resource ===================
[23:27:27] =================== ttm_tt (15 subtests) ===================
[23:27:27] ==================== ttm_tt_init_basic ====================
[23:27:27] [PASSED] Page-aligned size
[23:27:27] [PASSED] Extra pages requested
[23:27:27] ================ [PASSED] ttm_tt_init_basic ================
[23:27:27] [PASSED] ttm_tt_init_misaligned
[23:27:27] [PASSED] ttm_tt_fini_basic
[23:27:27] [PASSED] ttm_tt_fini_sg
[23:27:27] [PASSED] ttm_tt_fini_shmem
[23:27:27] [PASSED] ttm_tt_create_basic
[23:27:27] [PASSED] ttm_tt_create_invalid_bo_type
[23:27:27] [PASSED] ttm_tt_create_ttm_exists
[23:27:27] [PASSED] ttm_tt_create_failed
[23:27:27] [PASSED] ttm_tt_destroy_basic
[23:27:27] [PASSED] ttm_tt_populate_null_ttm
[23:27:27] [PASSED] ttm_tt_populate_populated_ttm
[23:27:27] [PASSED] ttm_tt_unpopulate_basic
[23:27:27] [PASSED] ttm_tt_unpopulate_empty_ttm
[23:27:27] [PASSED] ttm_tt_swapin_basic
[23:27:27] ===================== [PASSED] ttm_tt ======================
[23:27:27] =================== ttm_bo (14 subtests) ===================
[23:27:27] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[23:27:27] [PASSED] Cannot be interrupted and sleeps
[23:27:27] [PASSED] Cannot be interrupted, locks straight away
[23:27:27] [PASSED] Can be interrupted, sleeps
[23:27:27] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[23:27:27] [PASSED] ttm_bo_reserve_locked_no_sleep
[23:27:27] [PASSED] ttm_bo_reserve_no_wait_ticket
[23:27:27] [PASSED] ttm_bo_reserve_double_resv
[23:27:27] [PASSED] ttm_bo_reserve_interrupted
[23:27:27] [PASSED] ttm_bo_reserve_deadlock
[23:27:27] [PASSED] ttm_bo_unreserve_basic
[23:27:27] [PASSED] ttm_bo_unreserve_pinned
[23:27:27] [PASSED] ttm_bo_unreserve_bulk
[23:27:27] [PASSED] ttm_bo_fini_basic
[23:27:27] [PASSED] ttm_bo_fini_shared_resv
[23:27:27] [PASSED] ttm_bo_pin_basic
[23:27:27] [PASSED] ttm_bo_pin_unpin_resource
[23:27:27] [PASSED] ttm_bo_multiple_pin_one_unpin
[23:27:27] ===================== [PASSED] ttm_bo ======================
[23:27:27] ============== ttm_bo_validate (21 subtests) ===============
[23:27:27] ============== ttm_bo_init_reserved_sys_man ===============
[23:27:27] [PASSED] Buffer object for userspace
[23:27:27] [PASSED] Kernel buffer object
[23:27:27] [PASSED] Shared buffer object
[23:27:27] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[23:27:27] ============== ttm_bo_init_reserved_mock_man ==============
[23:27:27] [PASSED] Buffer object for userspace
[23:27:27] [PASSED] Kernel buffer object
[23:27:27] [PASSED] Shared buffer object
[23:27:27] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[23:27:27] [PASSED] ttm_bo_init_reserved_resv
[23:27:27] ================== ttm_bo_validate_basic ==================
[23:27:27] [PASSED] Buffer object for userspace
[23:27:27] [PASSED] Kernel buffer object
[23:27:27] [PASSED] Shared buffer object
[23:27:27] ============== [PASSED] ttm_bo_validate_basic ==============
[23:27:27] [PASSED] ttm_bo_validate_invalid_placement
[23:27:27] ============= ttm_bo_validate_same_placement ==============
[23:27:27] [PASSED] System manager
[23:27:27] [PASSED] VRAM manager
[23:27:27] ========= [PASSED] ttm_bo_validate_same_placement ==========
[23:27:27] [PASSED] ttm_bo_validate_failed_alloc
[23:27:27] [PASSED] ttm_bo_validate_pinned
[23:27:27] [PASSED] ttm_bo_validate_busy_placement
[23:27:27] ================ ttm_bo_validate_multihop =================
[23:27:27] [PASSED] Buffer object for userspace
[23:27:27] [PASSED] Kernel buffer object
[23:27:27] [PASSED] Shared buffer object
[23:27:27] ============ [PASSED] ttm_bo_validate_multihop =============
[23:27:27] ========== ttm_bo_validate_no_placement_signaled ==========
[23:27:27] [PASSED] Buffer object in system domain, no page vector
[23:27:27] [PASSED] Buffer object in system domain with an existing page vector
[23:27:27] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[23:27:27] ======== ttm_bo_validate_no_placement_not_signaled ========
[23:27:27] [PASSED] Buffer object for userspace
[23:27:27] [PASSED] Kernel buffer object
[23:27:27] [PASSED] Shared buffer object
[23:27:27] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[23:27:27] [PASSED] ttm_bo_validate_move_fence_signaled
[23:27:27] ========= ttm_bo_validate_move_fence_not_signaled =========
[23:27:27] [PASSED] Waits for GPU
[23:27:27] [PASSED] Tries to lock straight away
[23:27:27] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[23:27:27] [PASSED] ttm_bo_validate_happy_evict
[23:27:27] [PASSED] ttm_bo_validate_all_pinned_evict
[23:27:27] [PASSED] ttm_bo_validate_allowed_only_evict
[23:27:27] [PASSED] ttm_bo_validate_deleted_evict
[23:27:27] [PASSED] ttm_bo_validate_busy_domain_evict
[23:27:27] [PASSED] ttm_bo_validate_evict_gutting
[23:27:27] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[23:27:27] ================= [PASSED] ttm_bo_validate =================
[23:27:27] ============================================================
[23:27:27] Testing complete. Ran 101 tests: passed: 101
[23:27:27] Elapsed time: 11.520s total, 1.677s configuring, 9.577s building, 0.228s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 9+ messages in thread* ✓ Xe.CI.BAT: success for Attempt to fixup reset, wedge, unload corner cases
2026-01-28 23:16 [PATCH v5 0/6] Attempt to fixup reset, wedge, unload corner cases Zhanjun Dong
` (6 preceding siblings ...)
2026-01-28 23:27 ` ✓ CI.KUnit: success for Attempt to fixup reset, wedge, unload corner cases Patchwork
@ 2026-01-29 0:01 ` Patchwork
7 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2026-01-29 0:01 UTC (permalink / raw)
To: Zhanjun Dong; +Cc: intel-xe
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== Series Details ==
Series: Attempt to fixup reset, wedge, unload corner cases
URL : https://patchwork.freedesktop.org/series/160795/
State : success
== Summary ==
CI Bug Log - changes from xe-4465-8059f097e25f736bb3da09af6a9b283079abfd4f_BAT -> xe-pw-160795v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 12)
------------------------------
Additional (1): bat-bmg-3
Known issues
------------
Here are the changes found in xe-pw-160795v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_peer2peer@read@read-gpua-vram01-gpub-vram01-p2p:
- bat-bmg-3: NOTRUN -> [SKIP][1] ([Intel XE#6566]) +3 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160795v1/bat-bmg-3/igt@xe_peer2peer@read@read-gpua-vram01-gpub-vram01-p2p.html
#### Possible fixes ####
* igt@xe_waitfence@engine:
- bat-dg2-oem2: [FAIL][2] ([Intel XE#6519]) -> [PASS][3]
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4465-8059f097e25f736bb3da09af6a9b283079abfd4f/bat-dg2-oem2/igt@xe_waitfence@engine.html
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160795v1/bat-dg2-oem2/igt@xe_waitfence@engine.html
[Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
[Intel XE#6566]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6566
Build changes
-------------
* IGT: IGT_8721 -> IGT_8723
* Linux: xe-4465-8059f097e25f736bb3da09af6a9b283079abfd4f -> xe-pw-160795v1
IGT_8721: 3707bb4267de22a18d61b232c4ab5fbaf61db90c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8723: 8723
xe-4465-8059f097e25f736bb3da09af6a9b283079abfd4f: 8059f097e25f736bb3da09af6a9b283079abfd4f
xe-pw-160795v1: 160795v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160795v1/index.html
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