* [PATCH v3 1/2] drm/xe: Add counter for invalid prefetch pagefaults
2026-02-02 5:14 [PATCH v3 0/2] drm/xe: Add prefetch fault support for Xe3p Varun Gupta
@ 2026-02-02 5:14 ` Varun Gupta
2026-02-02 5:14 ` [PATCH v3 2/2] drm/xe: Add prefetch fault support for Xe3p Varun Gupta
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Varun Gupta @ 2026-02-02 5:14 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, matthew.d.roper, himal.prasad.ghimiray,
priyanka.dandamudi
Add a stats counter for invalid prefetch page faults to avoid
excessive logging.
Originally-by: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Varun Gupta <varun.gupta@intel.com>
---
v3:
- New patch splitting stats counter from main prefetch implementation (Matt Brost)
- Renamed from PREFETCH_PAGEFAULT_COUNT to INVALID_PREFETCH_PAGEFAULT_COUNT (Matt Brost)
---
drivers/gpu/drm/xe/xe_gt_stats.c | 1 +
drivers/gpu/drm/xe/xe_gt_stats_types.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_gt_stats.c b/drivers/gpu/drm/xe/xe_gt_stats.c
index fb2904bd0abd..202aebe3300b 100644
--- a/drivers/gpu/drm/xe/xe_gt_stats.c
+++ b/drivers/gpu/drm/xe/xe_gt_stats.c
@@ -35,6 +35,7 @@ static const char *const stat_description[__XE_GT_STATS_NUM_IDS] = {
DEF_STAT_STR(SVM_TLB_INVAL_US, "svm_tlb_inval_us"),
DEF_STAT_STR(VMA_PAGEFAULT_COUNT, "vma_pagefault_count"),
DEF_STAT_STR(VMA_PAGEFAULT_KB, "vma_pagefault_kb"),
+ DEF_STAT_STR(INVALID_PREFETCH_PAGEFAULT_COUNT, "invalid_prefetch_pagefault_count"),
DEF_STAT_STR(SVM_4K_PAGEFAULT_COUNT, "svm_4K_pagefault_count"),
DEF_STAT_STR(SVM_64K_PAGEFAULT_COUNT, "svm_64K_pagefault_count"),
DEF_STAT_STR(SVM_2M_PAGEFAULT_COUNT, "svm_2M_pagefault_count"),
diff --git a/drivers/gpu/drm/xe/xe_gt_stats_types.h b/drivers/gpu/drm/xe/xe_gt_stats_types.h
index b92d013091d5..bc4116c70171 100644
--- a/drivers/gpu/drm/xe/xe_gt_stats_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_stats_types.h
@@ -13,6 +13,7 @@ enum xe_gt_stats_id {
XE_GT_STATS_ID_SVM_TLB_INVAL_US,
XE_GT_STATS_ID_VMA_PAGEFAULT_COUNT,
XE_GT_STATS_ID_VMA_PAGEFAULT_KB,
+ XE_GT_STATS_ID_INVALID_PREFETCH_PAGEFAULT_COUNT,
XE_GT_STATS_ID_SVM_4K_PAGEFAULT_COUNT,
XE_GT_STATS_ID_SVM_64K_PAGEFAULT_COUNT,
XE_GT_STATS_ID_SVM_2M_PAGEFAULT_COUNT,
--
2.43.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v3 2/2] drm/xe: Add prefetch fault support for Xe3p
2026-02-02 5:14 [PATCH v3 0/2] drm/xe: Add prefetch fault support for Xe3p Varun Gupta
2026-02-02 5:14 ` [PATCH v3 1/2] drm/xe: Add counter for invalid prefetch pagefaults Varun Gupta
@ 2026-02-02 5:14 ` Varun Gupta
2026-02-02 5:18 ` [PATCH v3 0/2] " Gupta, Varun
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Varun Gupta @ 2026-02-02 5:14 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, matthew.d.roper, himal.prasad.ghimiray,
priyanka.dandamudi
Xe3p hardware prefetches memory ranges and notifies software via an
additional bit (bit 11) in the page fault descriptor that the fault
was caused by prefetch.
Extract the prefetch bit from the fault descriptor. When page fault
handling fails, echo the prefetch bit in the response (bit 6) to allow
the HW to suppress CAT errors for unsuccessful prefetch faults. On
successful handling, clear the prefetch bit so it's not echoed.
For failed prefetch faults, increment a stats counter and print a
single-line error message with the prefetch bit value to reduce
excessive logging.
Based on original patches by Brian Welty <brian.welty@intel.com> and
Priyanka Dandamudi <priyanka.dandamudi@intel.com>.
Bspec: 59311
Originally-by: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Priyanka Dandamudi <priyanka.dandamudi@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Varun Gupta <varun.gupta@intel.com>
---
v3:
- Drop the rename patch, keep xe_pagefault_print() unchanged (Matt Brost)
- Move prefetch check to caller instead of inside print function (Matt Brost)
- Remove XE3P_ prefix from prefetch bit defines and add platform comment (Matt Brost)
- Show prefetch bit in error messages for debugging (Matt Brost)
- Split stats counter into separate patch (Matt Brost)
v2:
- Changed comment wording from "repairs" to "handling" for clarity (Matt Roper)
---
drivers/gpu/drm/xe/xe_guc_fwif.h | 5 +++--
drivers/gpu/drm/xe/xe_guc_pagefault.c | 2 ++
drivers/gpu/drm/xe/xe_pagefault.c | 16 +++++++++++++---
drivers/gpu/drm/xe/xe_pagefault_types.h | 8 +++++++-
4 files changed, 25 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
index a33ea288b907..1a8674daa26e 100644
--- a/drivers/gpu/drm/xe/xe_guc_fwif.h
+++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
@@ -261,7 +261,8 @@ struct xe_guc_pagefault_desc {
#define PFD_ACCESS_TYPE GENMASK(1, 0)
#define PFD_FAULT_TYPE GENMASK(3, 2)
#define PFD_VFID GENMASK(9, 4)
-#define PFD_RSVD_1 GENMASK(11, 10)
+#define PFD_RSVD_1 BIT(10)
+#define PFD_PREFETCH BIT(11) /* Only valid on Xe3+, reserved on prior platforms */
#define PFD_VIRTUAL_ADDR_LO GENMASK(31, 12)
#define PFD_VIRTUAL_ADDR_LO_SHIFT 12
@@ -281,7 +282,7 @@ struct xe_guc_pagefault_reply {
u32 dw1;
#define PFR_VFID GENMASK(5, 0)
-#define PFR_RSVD_1 BIT(6)
+#define PFR_PREFETCH BIT(6) /* Only valid on Xe3+, reserved on prior platforms */
#define PFR_ENG_INSTANCE GENMASK(12, 7)
#define PFR_ENG_CLASS GENMASK(15, 13)
#define PFR_PDATA GENMASK(31, 16)
diff --git a/drivers/gpu/drm/xe/xe_guc_pagefault.c b/drivers/gpu/drm/xe/xe_guc_pagefault.c
index 719a18187a31..ca7f769848a9 100644
--- a/drivers/gpu/drm/xe/xe_guc_pagefault.c
+++ b/drivers/gpu/drm/xe/xe_guc_pagefault.c
@@ -27,6 +27,7 @@ static void guc_ack_fault(struct xe_pagefault *pf, int err)
FIELD_PREP(PFR_ASID, pf->consumer.asid),
FIELD_PREP(PFR_VFID, vfid) |
+ FIELD_PREP(PFR_PREFETCH, pf->consumer.prefetch) |
FIELD_PREP(PFR_ENG_INSTANCE, engine_instance) |
FIELD_PREP(PFR_ENG_CLASS, engine_class) |
FIELD_PREP(PFR_PDATA, pdata),
@@ -77,6 +78,7 @@ int xe_guc_pagefault_handler(struct xe_guc *guc, u32 *msg, u32 len)
pf.consumer.asid = FIELD_GET(PFD_ASID, msg[1]);
pf.consumer.access_type = FIELD_GET(PFD_ACCESS_TYPE, msg[2]);
pf.consumer.fault_type = FIELD_GET(PFD_FAULT_TYPE, msg[2]);
+ pf.consumer.prefetch = FIELD_GET(PFD_PREFETCH, msg[2]);
if (FIELD_GET(XE2_PFD_TRVA_FAULT, msg[0]))
pf.consumer.fault_level = XE_PAGEFAULT_LEVEL_NACK;
else
diff --git a/drivers/gpu/drm/xe/xe_pagefault.c b/drivers/gpu/drm/xe/xe_pagefault.c
index 6bee53d6ffc3..733d4ad28914 100644
--- a/drivers/gpu/drm/xe/xe_pagefault.c
+++ b/drivers/gpu/drm/xe/xe_pagefault.c
@@ -259,9 +259,19 @@ static void xe_pagefault_queue_work(struct work_struct *w)
err = xe_pagefault_service(&pf);
if (err) {
- xe_pagefault_print(&pf);
- xe_gt_info(pf.gt, "Fault response: Unsuccessful %pe\n",
- ERR_PTR(err));
+ if (!pf.consumer.prefetch) {
+ xe_pagefault_print(&pf);
+ } else {
+ xe_gt_stats_incr(pf.gt, XE_GT_STATS_ID_INVALID_PREFETCH_PAGEFAULT_COUNT, 1);
+ }
+ xe_gt_info(pf.gt, "Fault response: Unsuccessful %pe, prefetch=%d\n",
+ ERR_PTR(err), pf.consumer.prefetch);
+ } else {
+ /*
+ * Clear prefetch bit - only needed to suppress CAT errors
+ * on unsuccessful handling.
+ */
+ pf.consumer.prefetch = 0;
}
pf.producer.ops->ack_fault(&pf, err);
diff --git a/drivers/gpu/drm/xe/xe_pagefault_types.h b/drivers/gpu/drm/xe/xe_pagefault_types.h
index d3b516407d60..9e38d6e2dac5 100644
--- a/drivers/gpu/drm/xe/xe_pagefault_types.h
+++ b/drivers/gpu/drm/xe/xe_pagefault_types.h
@@ -84,8 +84,14 @@ struct xe_pagefault {
u8 engine_class;
/** @consumer.engine_instance: engine instance */
u8 engine_instance;
+ /**
+ * @consumer.prefetch: fault is caused by HW prefetch.
+ * Echo in response to suppress CAT errors on
+ * unsuccessful handling.
+ */
+ u8 prefetch;
/** consumer.reserved: reserved bits for future expansion */
- u8 reserved[7];
+ u8 reserved[6];
} consumer;
/**
* @producer: State for the producer (i.e., HW/FW interface). Populated
--
2.43.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v3 0/2] drm/xe: Add prefetch fault support for Xe3p
2026-02-02 5:14 [PATCH v3 0/2] drm/xe: Add prefetch fault support for Xe3p Varun Gupta
2026-02-02 5:14 ` [PATCH v3 1/2] drm/xe: Add counter for invalid prefetch pagefaults Varun Gupta
2026-02-02 5:14 ` [PATCH v3 2/2] drm/xe: Add prefetch fault support for Xe3p Varun Gupta
@ 2026-02-02 5:18 ` Gupta, Varun
2026-02-02 5:20 ` ✗ CI.checkpatch: warning for " Patchwork
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Gupta, Varun @ 2026-02-02 5:18 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, matthew.d.roper, himal.prasad.ghimiray,
priyanka.dandamudi
[-- Attachment #1: Type: text/plain, Size: 1949 bytes --]
Please ignore! This series was created due to subject line change by
mistake.
Will Resend the version in original series.
Thanks,
Varun
On 02-Feb-26 10:44 AM, Varun Gupta wrote:
> Xe3p hardware prefetches memory ranges and notifies software via an
> additional bit (bit 11) in the page fault descriptor that the fault
> was caused by prefetch.
>
> Patch 1 adds a dedicated stats counter to track invalid prefetch
> pagefaults separately from regular faults.
>
> Patch 2 implements the prefetch support by extracting the prefetch bit
> from the fault descriptor and echoing it in the response (bit 6) only
> when handling fails. This prevents CAT errors for prefetch faults.
> For failed prefetch faults, a single-line error message with the prefetch
> bit value is printed to reduce excessive logging.
>
> Based on original patches by Brian Welty and Priyanka Dandamudi.
>
> v3:
> - Split stats counter into separate patch (Matt Brost)
> - Drop xe_guc_pagefault_types.h rename patch (Matt Brost)
> - Move prefetch check to caller of xe_pagefault_print (Matt Brost)
> - Rename XE3P_PFD_PREFETCH/PFR_PREFETCH to remove XE3P_ prefix,
> add comments about Xe3+ platform support (Matt Brost)
> - Rename PREFETCH_PAGEFAULT_COUNT to INVALID_PREFETCH_PAGEFAULT_COUNT
> for clarity (Matt Brost)
> - Include prefetch bit value in error message (Matt Brost)
>
> v2:
> - Initial implementation combining all changes
>
> Varun Gupta (2):
> drm/xe: Add counter for invalid prefetch pagefaults
> drm/xe: Add prefetch fault support for Xe3p
>
> drivers/gpu/drm/xe/xe_gt_stats.c | 1 +
> drivers/gpu/drm/xe/xe_gt_stats_types.h | 1 +
> drivers/gpu/drm/xe/xe_guc_fwif.h | 5 +++--
> drivers/gpu/drm/xe/xe_guc_pagefault.c | 2 ++
> drivers/gpu/drm/xe/xe_pagefault.c | 16 +++++++++++++---
> drivers/gpu/drm/xe/xe_pagefault_types.h | 8 +++++++-
> 6 files changed, 27 insertions(+), 6 deletions(-)
>
[-- Attachment #2: Type: text/html, Size: 37814 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread* ✗ CI.checkpatch: warning for drm/xe: Add prefetch fault support for Xe3p
2026-02-02 5:14 [PATCH v3 0/2] drm/xe: Add prefetch fault support for Xe3p Varun Gupta
` (2 preceding siblings ...)
2026-02-02 5:18 ` [PATCH v3 0/2] " Gupta, Varun
@ 2026-02-02 5:20 ` Patchwork
2026-02-02 5:21 ` ✓ CI.KUnit: success " Patchwork
2026-02-02 5:55 ` ✓ Xe.CI.BAT: " Patchwork
5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2026-02-02 5:20 UTC (permalink / raw)
To: Varun Gupta; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Add prefetch fault support for Xe3p
URL : https://patchwork.freedesktop.org/series/160978/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 3183f46f854b02f9e4e57a220cc6502e0b5b2f5f
Author: Varun Gupta <varun.gupta@intel.com>
Date: Mon Feb 2 10:44:04 2026 +0530
drm/xe: Add prefetch fault support for Xe3p
Xe3p hardware prefetches memory ranges and notifies software via an
additional bit (bit 11) in the page fault descriptor that the fault
was caused by prefetch.
Extract the prefetch bit from the fault descriptor. When page fault
handling fails, echo the prefetch bit in the response (bit 6) to allow
the HW to suppress CAT errors for unsuccessful prefetch faults. On
successful handling, clear the prefetch bit so it's not echoed.
For failed prefetch faults, increment a stats counter and print a
single-line error message with the prefetch bit value to reduce
excessive logging.
Based on original patches by Brian Welty <brian.welty@intel.com> and
Priyanka Dandamudi <priyanka.dandamudi@intel.com>.
Bspec: 59311
Originally-by: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Priyanka Dandamudi <priyanka.dandamudi@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Varun Gupta <varun.gupta@intel.com>
+ /mt/dim checkpatch cd1fd615b2ba56ea3fb033262d4fbd0503055d3c drm-intel
d340b8184885 drm/xe: Add counter for invalid prefetch pagefaults
-:9: WARNING:BAD_SIGN_OFF: Non-standard signature: Originally-by:
#9:
Originally-by: Lucas De Marchi <lucas.demarchi@intel.com>
total: 0 errors, 1 warnings, 0 checks, 14 lines checked
3183f46f854b drm/xe: Add prefetch fault support for Xe3p
-:23: WARNING:BAD_SIGN_OFF: Non-standard signature: Originally-by:
#23:
Originally-by: Lucas De Marchi <lucas.demarchi@intel.com>
-:84: WARNING:BRACES: braces {} are not necessary for any arm of this statement
#84: FILE: drivers/gpu/drm/xe/xe_pagefault.c:262:
+ if (!pf.consumer.prefetch) {
[...]
+ } else {
[...]
-:87: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#87: FILE: drivers/gpu/drm/xe/xe_pagefault.c:265:
+ xe_gt_stats_incr(pf.gt, XE_GT_STATS_ID_INVALID_PREFETCH_PAGEFAULT_COUNT, 1);
total: 0 errors, 3 warnings, 0 checks, 68 lines checked
^ permalink raw reply [flat|nested] 7+ messages in thread* ✓ CI.KUnit: success for drm/xe: Add prefetch fault support for Xe3p
2026-02-02 5:14 [PATCH v3 0/2] drm/xe: Add prefetch fault support for Xe3p Varun Gupta
` (3 preceding siblings ...)
2026-02-02 5:20 ` ✗ CI.checkpatch: warning for " Patchwork
@ 2026-02-02 5:21 ` Patchwork
2026-02-02 5:55 ` ✓ Xe.CI.BAT: " Patchwork
5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2026-02-02 5:21 UTC (permalink / raw)
To: Varun Gupta; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Add prefetch fault support for Xe3p
URL : https://patchwork.freedesktop.org/series/160978/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[05:20:14] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:20:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:20:50] Starting KUnit Kernel (1/1)...
[05:20:50] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:20:50] ================== guc_buf (11 subtests) ===================
[05:20:50] [PASSED] test_smallest
[05:20:50] [PASSED] test_largest
[05:20:50] [PASSED] test_granular
[05:20:50] [PASSED] test_unique
[05:20:50] [PASSED] test_overlap
[05:20:50] [PASSED] test_reusable
[05:20:50] [PASSED] test_too_big
[05:20:50] [PASSED] test_flush
[05:20:50] [PASSED] test_lookup
[05:20:50] [PASSED] test_data
[05:20:50] [PASSED] test_class
[05:20:50] ===================== [PASSED] guc_buf =====================
[05:20:50] =================== guc_dbm (7 subtests) ===================
[05:20:50] [PASSED] test_empty
[05:20:50] [PASSED] test_default
[05:20:50] ======================== test_size ========================
[05:20:50] [PASSED] 4
[05:20:50] [PASSED] 8
[05:20:50] [PASSED] 32
[05:20:50] [PASSED] 256
[05:20:50] ==================== [PASSED] test_size ====================
[05:20:50] ======================= test_reuse ========================
[05:20:50] [PASSED] 4
[05:20:50] [PASSED] 8
[05:20:50] [PASSED] 32
[05:20:50] [PASSED] 256
[05:20:50] =================== [PASSED] test_reuse ====================
[05:20:50] =================== test_range_overlap ====================
[05:20:50] [PASSED] 4
[05:20:51] [PASSED] 8
[05:20:51] [PASSED] 32
[05:20:51] [PASSED] 256
[05:20:51] =============== [PASSED] test_range_overlap ================
[05:20:51] =================== test_range_compact ====================
[05:20:51] [PASSED] 4
[05:20:51] [PASSED] 8
[05:20:51] [PASSED] 32
[05:20:51] [PASSED] 256
[05:20:51] =============== [PASSED] test_range_compact ================
[05:20:51] ==================== test_range_spare =====================
[05:20:51] [PASSED] 4
[05:20:51] [PASSED] 8
[05:20:51] [PASSED] 32
[05:20:51] [PASSED] 256
[05:20:51] ================ [PASSED] test_range_spare =================
[05:20:51] ===================== [PASSED] guc_dbm =====================
[05:20:51] =================== guc_idm (6 subtests) ===================
[05:20:51] [PASSED] bad_init
[05:20:51] [PASSED] no_init
[05:20:51] [PASSED] init_fini
[05:20:51] [PASSED] check_used
[05:20:51] [PASSED] check_quota
[05:20:51] [PASSED] check_all
[05:20:51] ===================== [PASSED] guc_idm =====================
[05:20:51] ================== no_relay (3 subtests) ===================
[05:20:51] [PASSED] xe_drops_guc2pf_if_not_ready
[05:20:51] [PASSED] xe_drops_guc2vf_if_not_ready
[05:20:51] [PASSED] xe_rejects_send_if_not_ready
[05:20:51] ==================== [PASSED] no_relay =====================
[05:20:51] ================== pf_relay (14 subtests) ==================
[05:20:51] [PASSED] pf_rejects_guc2pf_too_short
[05:20:51] [PASSED] pf_rejects_guc2pf_too_long
[05:20:51] [PASSED] pf_rejects_guc2pf_no_payload
[05:20:51] [PASSED] pf_fails_no_payload
[05:20:51] [PASSED] pf_fails_bad_origin
[05:20:51] [PASSED] pf_fails_bad_type
[05:20:51] [PASSED] pf_txn_reports_error
[05:20:51] [PASSED] pf_txn_sends_pf2guc
[05:20:51] [PASSED] pf_sends_pf2guc
[05:20:51] [SKIPPED] pf_loopback_nop
[05:20:51] [SKIPPED] pf_loopback_echo
[05:20:51] [SKIPPED] pf_loopback_fail
[05:20:51] [SKIPPED] pf_loopback_busy
[05:20:51] [SKIPPED] pf_loopback_retry
[05:20:51] ==================== [PASSED] pf_relay =====================
[05:20:51] ================== vf_relay (3 subtests) ===================
[05:20:51] [PASSED] vf_rejects_guc2vf_too_short
[05:20:51] [PASSED] vf_rejects_guc2vf_too_long
[05:20:51] [PASSED] vf_rejects_guc2vf_no_payload
[05:20:51] ==================== [PASSED] vf_relay =====================
[05:20:51] ================ pf_gt_config (6 subtests) =================
[05:20:51] [PASSED] fair_contexts_1vf
[05:20:51] [PASSED] fair_doorbells_1vf
[05:20:51] [PASSED] fair_ggtt_1vf
[05:20:51] ====================== fair_contexts ======================
[05:20:51] [PASSED] 1 VF
[05:20:51] [PASSED] 2 VFs
[05:20:51] [PASSED] 3 VFs
[05:20:51] [PASSED] 4 VFs
[05:20:51] [PASSED] 5 VFs
[05:20:51] [PASSED] 6 VFs
[05:20:51] [PASSED] 7 VFs
[05:20:51] [PASSED] 8 VFs
[05:20:51] [PASSED] 9 VFs
[05:20:51] [PASSED] 10 VFs
[05:20:51] [PASSED] 11 VFs
[05:20:51] [PASSED] 12 VFs
[05:20:51] [PASSED] 13 VFs
[05:20:51] [PASSED] 14 VFs
[05:20:51] [PASSED] 15 VFs
[05:20:51] [PASSED] 16 VFs
[05:20:51] [PASSED] 17 VFs
[05:20:51] [PASSED] 18 VFs
[05:20:51] [PASSED] 19 VFs
[05:20:51] [PASSED] 20 VFs
[05:20:51] [PASSED] 21 VFs
[05:20:51] [PASSED] 22 VFs
[05:20:51] [PASSED] 23 VFs
[05:20:51] [PASSED] 24 VFs
[05:20:51] [PASSED] 25 VFs
[05:20:51] [PASSED] 26 VFs
[05:20:51] [PASSED] 27 VFs
[05:20:51] [PASSED] 28 VFs
[05:20:51] [PASSED] 29 VFs
[05:20:51] [PASSED] 30 VFs
[05:20:51] [PASSED] 31 VFs
[05:20:51] [PASSED] 32 VFs
[05:20:51] [PASSED] 33 VFs
[05:20:51] [PASSED] 34 VFs
[05:20:51] [PASSED] 35 VFs
[05:20:51] [PASSED] 36 VFs
[05:20:51] [PASSED] 37 VFs
[05:20:51] [PASSED] 38 VFs
[05:20:51] [PASSED] 39 VFs
[05:20:51] [PASSED] 40 VFs
[05:20:51] [PASSED] 41 VFs
[05:20:51] [PASSED] 42 VFs
[05:20:51] [PASSED] 43 VFs
[05:20:51] [PASSED] 44 VFs
[05:20:51] [PASSED] 45 VFs
[05:20:51] [PASSED] 46 VFs
[05:20:51] [PASSED] 47 VFs
[05:20:51] [PASSED] 48 VFs
[05:20:51] [PASSED] 49 VFs
[05:20:51] [PASSED] 50 VFs
[05:20:51] [PASSED] 51 VFs
[05:20:51] [PASSED] 52 VFs
[05:20:51] [PASSED] 53 VFs
[05:20:51] [PASSED] 54 VFs
[05:20:51] [PASSED] 55 VFs
[05:20:51] [PASSED] 56 VFs
[05:20:51] [PASSED] 57 VFs
[05:20:51] [PASSED] 58 VFs
[05:20:51] [PASSED] 59 VFs
[05:20:51] [PASSED] 60 VFs
[05:20:51] [PASSED] 61 VFs
[05:20:51] [PASSED] 62 VFs
[05:20:51] [PASSED] 63 VFs
[05:20:51] ================== [PASSED] fair_contexts ==================
[05:20:51] ===================== fair_doorbells ======================
[05:20:51] [PASSED] 1 VF
[05:20:51] [PASSED] 2 VFs
[05:20:51] [PASSED] 3 VFs
[05:20:51] [PASSED] 4 VFs
[05:20:51] [PASSED] 5 VFs
[05:20:51] [PASSED] 6 VFs
[05:20:51] [PASSED] 7 VFs
[05:20:51] [PASSED] 8 VFs
[05:20:51] [PASSED] 9 VFs
[05:20:51] [PASSED] 10 VFs
[05:20:51] [PASSED] 11 VFs
[05:20:51] [PASSED] 12 VFs
[05:20:51] [PASSED] 13 VFs
[05:20:51] [PASSED] 14 VFs
[05:20:51] [PASSED] 15 VFs
[05:20:51] [PASSED] 16 VFs
[05:20:51] [PASSED] 17 VFs
[05:20:51] [PASSED] 18 VFs
[05:20:51] [PASSED] 19 VFs
[05:20:51] [PASSED] 20 VFs
[05:20:51] [PASSED] 21 VFs
[05:20:51] [PASSED] 22 VFs
[05:20:51] [PASSED] 23 VFs
[05:20:51] [PASSED] 24 VFs
[05:20:51] [PASSED] 25 VFs
[05:20:51] [PASSED] 26 VFs
[05:20:51] [PASSED] 27 VFs
[05:20:51] [PASSED] 28 VFs
[05:20:51] [PASSED] 29 VFs
[05:20:51] [PASSED] 30 VFs
[05:20:51] [PASSED] 31 VFs
[05:20:51] [PASSED] 32 VFs
[05:20:51] [PASSED] 33 VFs
[05:20:51] [PASSED] 34 VFs
[05:20:51] [PASSED] 35 VFs
[05:20:51] [PASSED] 36 VFs
[05:20:51] [PASSED] 37 VFs
[05:20:51] [PASSED] 38 VFs
[05:20:51] [PASSED] 39 VFs
[05:20:51] [PASSED] 40 VFs
[05:20:51] [PASSED] 41 VFs
[05:20:51] [PASSED] 42 VFs
[05:20:51] [PASSED] 43 VFs
[05:20:51] [PASSED] 44 VFs
[05:20:51] [PASSED] 45 VFs
[05:20:51] [PASSED] 46 VFs
[05:20:51] [PASSED] 47 VFs
[05:20:51] [PASSED] 48 VFs
[05:20:51] [PASSED] 49 VFs
[05:20:51] [PASSED] 50 VFs
[05:20:51] [PASSED] 51 VFs
[05:20:51] [PASSED] 52 VFs
[05:20:51] [PASSED] 53 VFs
[05:20:51] [PASSED] 54 VFs
[05:20:51] [PASSED] 55 VFs
[05:20:51] [PASSED] 56 VFs
[05:20:51] [PASSED] 57 VFs
[05:20:51] [PASSED] 58 VFs
[05:20:51] [PASSED] 59 VFs
[05:20:51] [PASSED] 60 VFs
[05:20:51] [PASSED] 61 VFs
[05:20:51] [PASSED] 62 VFs
[05:20:51] [PASSED] 63 VFs
[05:20:51] ================= [PASSED] fair_doorbells ==================
[05:20:51] ======================== fair_ggtt ========================
[05:20:51] [PASSED] 1 VF
[05:20:51] [PASSED] 2 VFs
[05:20:51] [PASSED] 3 VFs
[05:20:51] [PASSED] 4 VFs
[05:20:51] [PASSED] 5 VFs
[05:20:51] [PASSED] 6 VFs
[05:20:51] [PASSED] 7 VFs
[05:20:51] [PASSED] 8 VFs
[05:20:51] [PASSED] 9 VFs
[05:20:51] [PASSED] 10 VFs
[05:20:51] [PASSED] 11 VFs
[05:20:51] [PASSED] 12 VFs
[05:20:51] [PASSED] 13 VFs
[05:20:51] [PASSED] 14 VFs
[05:20:51] [PASSED] 15 VFs
[05:20:51] [PASSED] 16 VFs
[05:20:51] [PASSED] 17 VFs
[05:20:51] [PASSED] 18 VFs
[05:20:51] [PASSED] 19 VFs
[05:20:51] [PASSED] 20 VFs
[05:20:51] [PASSED] 21 VFs
[05:20:51] [PASSED] 22 VFs
[05:20:51] [PASSED] 23 VFs
[05:20:51] [PASSED] 24 VFs
[05:20:51] [PASSED] 25 VFs
[05:20:51] [PASSED] 26 VFs
[05:20:51] [PASSED] 27 VFs
[05:20:51] [PASSED] 28 VFs
[05:20:51] [PASSED] 29 VFs
[05:20:51] [PASSED] 30 VFs
[05:20:51] [PASSED] 31 VFs
[05:20:51] [PASSED] 32 VFs
[05:20:51] [PASSED] 33 VFs
[05:20:51] [PASSED] 34 VFs
[05:20:51] [PASSED] 35 VFs
[05:20:51] [PASSED] 36 VFs
[05:20:51] [PASSED] 37 VFs
[05:20:51] [PASSED] 38 VFs
[05:20:51] [PASSED] 39 VFs
[05:20:51] [PASSED] 40 VFs
[05:20:51] [PASSED] 41 VFs
[05:20:51] [PASSED] 42 VFs
[05:20:51] [PASSED] 43 VFs
[05:20:51] [PASSED] 44 VFs
[05:20:51] [PASSED] 45 VFs
[05:20:51] [PASSED] 46 VFs
[05:20:51] [PASSED] 47 VFs
[05:20:51] [PASSED] 48 VFs
[05:20:51] [PASSED] 49 VFs
[05:20:51] [PASSED] 50 VFs
[05:20:51] [PASSED] 51 VFs
[05:20:51] [PASSED] 52 VFs
[05:20:51] [PASSED] 53 VFs
[05:20:51] [PASSED] 54 VFs
[05:20:51] [PASSED] 55 VFs
[05:20:51] [PASSED] 56 VFs
[05:20:51] [PASSED] 57 VFs
[05:20:51] [PASSED] 58 VFs
[05:20:51] [PASSED] 59 VFs
[05:20:51] [PASSED] 60 VFs
[05:20:51] [PASSED] 61 VFs
[05:20:51] [PASSED] 62 VFs
[05:20:51] [PASSED] 63 VFs
[05:20:51] ==================== [PASSED] fair_ggtt ====================
[05:20:51] ================== [PASSED] pf_gt_config ===================
[05:20:51] ===================== lmtt (1 subtest) =====================
[05:20:51] ======================== test_ops =========================
[05:20:51] [PASSED] 2-level
[05:20:51] [PASSED] multi-level
[05:20:51] ==================== [PASSED] test_ops =====================
[05:20:51] ====================== [PASSED] lmtt =======================
[05:20:51] ================= pf_service (11 subtests) =================
[05:20:51] [PASSED] pf_negotiate_any
[05:20:51] [PASSED] pf_negotiate_base_match
[05:20:51] [PASSED] pf_negotiate_base_newer
[05:20:51] [PASSED] pf_negotiate_base_next
[05:20:51] [SKIPPED] pf_negotiate_base_older
[05:20:51] [PASSED] pf_negotiate_base_prev
[05:20:51] [PASSED] pf_negotiate_latest_match
[05:20:51] [PASSED] pf_negotiate_latest_newer
[05:20:51] [PASSED] pf_negotiate_latest_next
[05:20:51] [SKIPPED] pf_negotiate_latest_older
[05:20:51] [SKIPPED] pf_negotiate_latest_prev
[05:20:51] =================== [PASSED] pf_service ====================
[05:20:51] ================= xe_guc_g2g (2 subtests) ==================
[05:20:51] ============== xe_live_guc_g2g_kunit_default ==============
[05:20:51] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[05:20:51] ============== xe_live_guc_g2g_kunit_allmem ===============
[05:20:51] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[05:20:51] =================== [SKIPPED] xe_guc_g2g ===================
[05:20:51] =================== xe_mocs (2 subtests) ===================
[05:20:51] ================ xe_live_mocs_kernel_kunit ================
[05:20:51] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[05:20:51] ================ xe_live_mocs_reset_kunit =================
[05:20:51] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[05:20:51] ==================== [SKIPPED] xe_mocs =====================
[05:20:51] ================= xe_migrate (2 subtests) ==================
[05:20:51] ================= xe_migrate_sanity_kunit =================
[05:20:51] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[05:20:51] ================== xe_validate_ccs_kunit ==================
[05:20:51] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[05:20:51] =================== [SKIPPED] xe_migrate ===================
[05:20:51] ================== xe_dma_buf (1 subtest) ==================
[05:20:51] ==================== xe_dma_buf_kunit =====================
[05:20:51] ================ [SKIPPED] xe_dma_buf_kunit ================
[05:20:51] =================== [SKIPPED] xe_dma_buf ===================
[05:20:51] ================= xe_bo_shrink (1 subtest) =================
[05:20:51] =================== xe_bo_shrink_kunit ====================
[05:20:51] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[05:20:51] ================== [SKIPPED] xe_bo_shrink ==================
[05:20:51] ==================== xe_bo (2 subtests) ====================
[05:20:51] ================== xe_ccs_migrate_kunit ===================
[05:20:51] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[05:20:51] ==================== xe_bo_evict_kunit ====================
[05:20:51] =============== [SKIPPED] xe_bo_evict_kunit ================
[05:20:51] ===================== [SKIPPED] xe_bo ======================
[05:20:51] ==================== args (13 subtests) ====================
[05:20:51] [PASSED] count_args_test
[05:20:51] [PASSED] call_args_example
[05:20:51] [PASSED] call_args_test
[05:20:51] [PASSED] drop_first_arg_example
[05:20:51] [PASSED] drop_first_arg_test
[05:20:51] [PASSED] first_arg_example
[05:20:51] [PASSED] first_arg_test
[05:20:51] [PASSED] last_arg_example
[05:20:51] [PASSED] last_arg_test
[05:20:51] [PASSED] pick_arg_example
[05:20:51] [PASSED] if_args_example
[05:20:51] [PASSED] if_args_test
[05:20:51] [PASSED] sep_comma_example
[05:20:51] ====================== [PASSED] args =======================
[05:20:51] =================== xe_pci (3 subtests) ====================
[05:20:51] ==================== check_graphics_ip ====================
[05:20:51] [PASSED] 12.00 Xe_LP
[05:20:51] [PASSED] 12.10 Xe_LP+
[05:20:51] [PASSED] 12.55 Xe_HPG
[05:20:51] [PASSED] 12.60 Xe_HPC
[05:20:51] [PASSED] 12.70 Xe_LPG
[05:20:51] [PASSED] 12.71 Xe_LPG
[05:20:51] [PASSED] 12.74 Xe_LPG+
[05:20:51] [PASSED] 20.01 Xe2_HPG
[05:20:51] [PASSED] 20.02 Xe2_HPG
[05:20:51] [PASSED] 20.04 Xe2_LPG
[05:20:51] [PASSED] 30.00 Xe3_LPG
[05:20:51] [PASSED] 30.01 Xe3_LPG
[05:20:51] [PASSED] 30.03 Xe3_LPG
[05:20:51] [PASSED] 30.04 Xe3_LPG
[05:20:51] [PASSED] 30.05 Xe3_LPG
[05:20:51] [PASSED] 35.11 Xe3p_XPC
[05:20:51] ================ [PASSED] check_graphics_ip ================
[05:20:51] ===================== check_media_ip ======================
[05:20:51] [PASSED] 12.00 Xe_M
[05:20:51] [PASSED] 12.55 Xe_HPM
[05:20:51] [PASSED] 13.00 Xe_LPM+
[05:20:51] [PASSED] 13.01 Xe2_HPM
[05:20:51] [PASSED] 20.00 Xe2_LPM
[05:20:51] [PASSED] 30.00 Xe3_LPM
[05:20:51] [PASSED] 30.02 Xe3_LPM
[05:20:51] [PASSED] 35.00 Xe3p_LPM
[05:20:51] [PASSED] 35.03 Xe3p_HPM
[05:20:51] ================= [PASSED] check_media_ip ==================
[05:20:51] =================== check_platform_desc ===================
[05:20:51] [PASSED] 0x9A60 (TIGERLAKE)
[05:20:51] [PASSED] 0x9A68 (TIGERLAKE)
[05:20:51] [PASSED] 0x9A70 (TIGERLAKE)
[05:20:51] [PASSED] 0x9A40 (TIGERLAKE)
[05:20:51] [PASSED] 0x9A49 (TIGERLAKE)
[05:20:51] [PASSED] 0x9A59 (TIGERLAKE)
[05:20:51] [PASSED] 0x9A78 (TIGERLAKE)
[05:20:51] [PASSED] 0x9AC0 (TIGERLAKE)
[05:20:51] [PASSED] 0x9AC9 (TIGERLAKE)
[05:20:51] [PASSED] 0x9AD9 (TIGERLAKE)
[05:20:51] [PASSED] 0x9AF8 (TIGERLAKE)
[05:20:51] [PASSED] 0x4C80 (ROCKETLAKE)
[05:20:51] [PASSED] 0x4C8A (ROCKETLAKE)
[05:20:51] [PASSED] 0x4C8B (ROCKETLAKE)
[05:20:51] [PASSED] 0x4C8C (ROCKETLAKE)
[05:20:51] [PASSED] 0x4C90 (ROCKETLAKE)
[05:20:51] [PASSED] 0x4C9A (ROCKETLAKE)
[05:20:51] [PASSED] 0x4680 (ALDERLAKE_S)
[05:20:51] [PASSED] 0x4682 (ALDERLAKE_S)
[05:20:51] [PASSED] 0x4688 (ALDERLAKE_S)
[05:20:51] [PASSED] 0x468A (ALDERLAKE_S)
[05:20:51] [PASSED] 0x468B (ALDERLAKE_S)
[05:20:51] [PASSED] 0x4690 (ALDERLAKE_S)
[05:20:51] [PASSED] 0x4692 (ALDERLAKE_S)
[05:20:51] [PASSED] 0x4693 (ALDERLAKE_S)
[05:20:51] [PASSED] 0x46A0 (ALDERLAKE_P)
[05:20:51] [PASSED] 0x46A1 (ALDERLAKE_P)
[05:20:51] [PASSED] 0x46A2 (ALDERLAKE_P)
[05:20:51] [PASSED] 0x46A3 (ALDERLAKE_P)
[05:20:51] [PASSED] 0x46A6 (ALDERLAKE_P)
[05:20:51] [PASSED] 0x46A8 (ALDERLAKE_P)
[05:20:51] [PASSED] 0x46AA (ALDERLAKE_P)
[05:20:51] [PASSED] 0x462A (ALDERLAKE_P)
[05:20:51] [PASSED] 0x4626 (ALDERLAKE_P)
[05:20:51] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[05:20:51] [PASSED] 0x46B0 (ALDERLAKE_P)
[05:20:51] [PASSED] 0x46B1 (ALDERLAKE_P)
[05:20:51] [PASSED] 0x46B2 (ALDERLAKE_P)
[05:20:51] [PASSED] 0x46B3 (ALDERLAKE_P)
[05:20:51] [PASSED] 0x46C0 (ALDERLAKE_P)
[05:20:51] [PASSED] 0x46C1 (ALDERLAKE_P)
[05:20:51] [PASSED] 0x46C2 (ALDERLAKE_P)
[05:20:51] [PASSED] 0x46C3 (ALDERLAKE_P)
[05:20:51] [PASSED] 0x46D0 (ALDERLAKE_N)
[05:20:51] [PASSED] 0x46D1 (ALDERLAKE_N)
[05:20:51] [PASSED] 0x46D2 (ALDERLAKE_N)
[05:20:51] [PASSED] 0x46D3 (ALDERLAKE_N)
[05:20:51] [PASSED] 0x46D4 (ALDERLAKE_N)
[05:20:51] [PASSED] 0xA721 (ALDERLAKE_P)
[05:20:51] [PASSED] 0xA7A1 (ALDERLAKE_P)
[05:20:51] [PASSED] 0xA7A9 (ALDERLAKE_P)
[05:20:51] [PASSED] 0xA7AC (ALDERLAKE_P)
[05:20:51] [PASSED] 0xA7AD (ALDERLAKE_P)
[05:20:51] [PASSED] 0xA720 (ALDERLAKE_P)
[05:20:51] [PASSED] 0xA7A0 (ALDERLAKE_P)
[05:20:51] [PASSED] 0xA7A8 (ALDERLAKE_P)
[05:20:51] [PASSED] 0xA7AA (ALDERLAKE_P)
[05:20:51] [PASSED] 0xA7AB (ALDERLAKE_P)
[05:20:51] [PASSED] 0xA780 (ALDERLAKE_S)
[05:20:51] [PASSED] 0xA781 (ALDERLAKE_S)
[05:20:51] [PASSED] 0xA782 (ALDERLAKE_S)
[05:20:51] [PASSED] 0xA783 (ALDERLAKE_S)
[05:20:51] [PASSED] 0xA788 (ALDERLAKE_S)
[05:20:51] [PASSED] 0xA789 (ALDERLAKE_S)
[05:20:51] [PASSED] 0xA78A (ALDERLAKE_S)
[05:20:51] [PASSED] 0xA78B (ALDERLAKE_S)
[05:20:51] [PASSED] 0x4905 (DG1)
[05:20:51] [PASSED] 0x4906 (DG1)
[05:20:51] [PASSED] 0x4907 (DG1)
[05:20:51] [PASSED] 0x4908 (DG1)
[05:20:51] [PASSED] 0x4909 (DG1)
[05:20:51] [PASSED] 0x56C0 (DG2)
[05:20:51] [PASSED] 0x56C2 (DG2)
[05:20:51] [PASSED] 0x56C1 (DG2)
[05:20:51] [PASSED] 0x7D51 (METEORLAKE)
[05:20:51] [PASSED] 0x7DD1 (METEORLAKE)
[05:20:51] [PASSED] 0x7D41 (METEORLAKE)
[05:20:51] [PASSED] 0x7D67 (METEORLAKE)
[05:20:51] [PASSED] 0xB640 (METEORLAKE)
[05:20:51] [PASSED] 0x56A0 (DG2)
[05:20:51] [PASSED] 0x56A1 (DG2)
[05:20:51] [PASSED] 0x56A2 (DG2)
[05:20:51] [PASSED] 0x56BE (DG2)
[05:20:51] [PASSED] 0x56BF (DG2)
[05:20:51] [PASSED] 0x5690 (DG2)
[05:20:51] [PASSED] 0x5691 (DG2)
[05:20:51] [PASSED] 0x5692 (DG2)
[05:20:51] [PASSED] 0x56A5 (DG2)
[05:20:51] [PASSED] 0x56A6 (DG2)
[05:20:51] [PASSED] 0x56B0 (DG2)
[05:20:51] [PASSED] 0x56B1 (DG2)
[05:20:51] [PASSED] 0x56BA (DG2)
[05:20:51] [PASSED] 0x56BB (DG2)
[05:20:51] [PASSED] 0x56BC (DG2)
[05:20:51] [PASSED] 0x56BD (DG2)
[05:20:51] [PASSED] 0x5693 (DG2)
[05:20:51] [PASSED] 0x5694 (DG2)
[05:20:51] [PASSED] 0x5695 (DG2)
[05:20:51] [PASSED] 0x56A3 (DG2)
[05:20:51] [PASSED] 0x56A4 (DG2)
[05:20:51] [PASSED] 0x56B2 (DG2)
[05:20:51] [PASSED] 0x56B3 (DG2)
[05:20:51] [PASSED] 0x5696 (DG2)
[05:20:51] [PASSED] 0x5697 (DG2)
[05:20:51] [PASSED] 0xB69 (PVC)
[05:20:51] [PASSED] 0xB6E (PVC)
[05:20:51] [PASSED] 0xBD4 (PVC)
[05:20:51] [PASSED] 0xBD5 (PVC)
[05:20:51] [PASSED] 0xBD6 (PVC)
[05:20:51] [PASSED] 0xBD7 (PVC)
[05:20:51] [PASSED] 0xBD8 (PVC)
[05:20:51] [PASSED] 0xBD9 (PVC)
[05:20:51] [PASSED] 0xBDA (PVC)
[05:20:51] [PASSED] 0xBDB (PVC)
[05:20:51] [PASSED] 0xBE0 (PVC)
[05:20:51] [PASSED] 0xBE1 (PVC)
[05:20:51] [PASSED] 0xBE5 (PVC)
[05:20:51] [PASSED] 0x7D40 (METEORLAKE)
[05:20:51] [PASSED] 0x7D45 (METEORLAKE)
[05:20:51] [PASSED] 0x7D55 (METEORLAKE)
[05:20:51] [PASSED] 0x7D60 (METEORLAKE)
[05:20:51] [PASSED] 0x7DD5 (METEORLAKE)
[05:20:51] [PASSED] 0x6420 (LUNARLAKE)
[05:20:51] [PASSED] 0x64A0 (LUNARLAKE)
[05:20:51] [PASSED] 0x64B0 (LUNARLAKE)
[05:20:51] [PASSED] 0xE202 (BATTLEMAGE)
[05:20:51] [PASSED] 0xE209 (BATTLEMAGE)
[05:20:51] [PASSED] 0xE20B (BATTLEMAGE)
[05:20:51] [PASSED] 0xE20C (BATTLEMAGE)
[05:20:51] [PASSED] 0xE20D (BATTLEMAGE)
[05:20:51] [PASSED] 0xE210 (BATTLEMAGE)
[05:20:51] [PASSED] 0xE211 (BATTLEMAGE)
[05:20:51] [PASSED] 0xE212 (BATTLEMAGE)
[05:20:51] [PASSED] 0xE216 (BATTLEMAGE)
[05:20:51] [PASSED] 0xE220 (BATTLEMAGE)
[05:20:51] [PASSED] 0xE221 (BATTLEMAGE)
[05:20:51] [PASSED] 0xE222 (BATTLEMAGE)
[05:20:51] [PASSED] 0xE223 (BATTLEMAGE)
[05:20:51] [PASSED] 0xB080 (PANTHERLAKE)
[05:20:51] [PASSED] 0xB081 (PANTHERLAKE)
[05:20:51] [PASSED] 0xB082 (PANTHERLAKE)
[05:20:51] [PASSED] 0xB083 (PANTHERLAKE)
[05:20:51] [PASSED] 0xB084 (PANTHERLAKE)
[05:20:51] [PASSED] 0xB085 (PANTHERLAKE)
[05:20:51] [PASSED] 0xB086 (PANTHERLAKE)
[05:20:51] [PASSED] 0xB087 (PANTHERLAKE)
[05:20:51] [PASSED] 0xB08F (PANTHERLAKE)
[05:20:51] [PASSED] 0xB090 (PANTHERLAKE)
[05:20:51] [PASSED] 0xB0A0 (PANTHERLAKE)
[05:20:51] [PASSED] 0xB0B0 (PANTHERLAKE)
[05:20:51] [PASSED] 0xFD80 (PANTHERLAKE)
[05:20:51] [PASSED] 0xFD81 (PANTHERLAKE)
[05:20:51] [PASSED] 0xD740 (NOVALAKE_S)
[05:20:51] [PASSED] 0xD741 (NOVALAKE_S)
[05:20:51] [PASSED] 0xD742 (NOVALAKE_S)
[05:20:51] [PASSED] 0xD743 (NOVALAKE_S)
[05:20:51] [PASSED] 0xD744 (NOVALAKE_S)
[05:20:51] [PASSED] 0xD745 (NOVALAKE_S)
[05:20:51] [PASSED] 0x674C (CRESCENTISLAND)
[05:20:51] =============== [PASSED] check_platform_desc ===============
[05:20:51] ===================== [PASSED] xe_pci ======================
[05:20:51] =================== xe_rtp (2 subtests) ====================
[05:20:51] =============== xe_rtp_process_to_sr_tests ================
[05:20:51] [PASSED] coalesce-same-reg
[05:20:51] [PASSED] no-match-no-add
[05:20:51] [PASSED] match-or
[05:20:51] [PASSED] match-or-xfail
[05:20:51] [PASSED] no-match-no-add-multiple-rules
[05:20:51] [PASSED] two-regs-two-entries
[05:20:51] [PASSED] clr-one-set-other
[05:20:51] [PASSED] set-field
[05:20:51] [PASSED] conflict-duplicate
[05:20:51] [PASSED] conflict-not-disjoint
[05:20:51] [PASSED] conflict-reg-type
[05:20:51] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[05:20:51] ================== xe_rtp_process_tests ===================
[05:20:51] [PASSED] active1
[05:20:51] [PASSED] active2
[05:20:51] [PASSED] active-inactive
[05:20:51] [PASSED] inactive-active
[05:20:51] [PASSED] inactive-1st_or_active-inactive
[05:20:51] [PASSED] inactive-2nd_or_active-inactive
[05:20:51] [PASSED] inactive-last_or_active-inactive
[05:20:51] [PASSED] inactive-no_or_active-inactive
[05:20:51] ============== [PASSED] xe_rtp_process_tests ===============
[05:20:51] ===================== [PASSED] xe_rtp ======================
[05:20:51] ==================== xe_wa (1 subtest) =====================
[05:20:51] ======================== xe_wa_gt =========================
[05:20:51] [PASSED] TIGERLAKE B0
[05:20:51] [PASSED] DG1 A0
[05:20:51] [PASSED] DG1 B0
[05:20:51] [PASSED] ALDERLAKE_S A0
[05:20:51] [PASSED] ALDERLAKE_S B0
[05:20:51] [PASSED] ALDERLAKE_S C0
[05:20:51] [PASSED] ALDERLAKE_S D0
[05:20:51] [PASSED] ALDERLAKE_P A0
[05:20:51] [PASSED] ALDERLAKE_P B0
[05:20:51] [PASSED] ALDERLAKE_P C0
[05:20:51] [PASSED] ALDERLAKE_S RPLS D0
[05:20:51] [PASSED] ALDERLAKE_P RPLU E0
[05:20:51] [PASSED] DG2 G10 C0
[05:20:51] [PASSED] DG2 G11 B1
[05:20:51] [PASSED] DG2 G12 A1
[05:20:51] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[05:20:51] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[05:20:51] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[05:20:51] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[05:20:51] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[05:20:51] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[05:20:51] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[05:20:51] ==================== [PASSED] xe_wa_gt =====================
[05:20:51] ====================== [PASSED] xe_wa ======================
[05:20:51] ============================================================
[05:20:51] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[05:20:51] Elapsed time: 36.351s total, 4.227s configuring, 31.657s building, 0.460s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[05:20:51] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:20:52] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:21:18] Starting KUnit Kernel (1/1)...
[05:21:18] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:21:18] ============ drm_test_pick_cmdline (2 subtests) ============
[05:21:18] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[05:21:18] =============== drm_test_pick_cmdline_named ===============
[05:21:18] [PASSED] NTSC
[05:21:18] [PASSED] NTSC-J
[05:21:18] [PASSED] PAL
[05:21:18] [PASSED] PAL-M
[05:21:18] =========== [PASSED] drm_test_pick_cmdline_named ===========
[05:21:18] ============== [PASSED] drm_test_pick_cmdline ==============
[05:21:18] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[05:21:18] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[05:21:18] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[05:21:18] =========== drm_validate_clone_mode (2 subtests) ===========
[05:21:18] ============== drm_test_check_in_clone_mode ===============
[05:21:18] [PASSED] in_clone_mode
[05:21:18] [PASSED] not_in_clone_mode
[05:21:18] ========== [PASSED] drm_test_check_in_clone_mode ===========
[05:21:18] =============== drm_test_check_valid_clones ===============
[05:21:18] [PASSED] not_in_clone_mode
[05:21:18] [PASSED] valid_clone
[05:21:18] [PASSED] invalid_clone
[05:21:18] =========== [PASSED] drm_test_check_valid_clones ===========
[05:21:18] ============= [PASSED] drm_validate_clone_mode =============
[05:21:18] ============= drm_validate_modeset (1 subtest) =============
[05:21:18] [PASSED] drm_test_check_connector_changed_modeset
[05:21:18] ============== [PASSED] drm_validate_modeset ===============
[05:21:18] ====== drm_test_bridge_get_current_state (2 subtests) ======
[05:21:18] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[05:21:18] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[05:21:18] ======== [PASSED] drm_test_bridge_get_current_state ========
[05:21:18] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[05:21:18] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[05:21:18] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[05:21:18] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[05:21:18] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[05:21:18] ============== drm_bridge_alloc (2 subtests) ===============
[05:21:18] [PASSED] drm_test_drm_bridge_alloc_basic
[05:21:18] [PASSED] drm_test_drm_bridge_alloc_get_put
[05:21:18] ================ [PASSED] drm_bridge_alloc =================
[05:21:18] ================== drm_buddy (9 subtests) ==================
[05:21:18] [PASSED] drm_test_buddy_alloc_limit
[05:21:18] [PASSED] drm_test_buddy_alloc_optimistic
[05:21:18] [PASSED] drm_test_buddy_alloc_pessimistic
[05:21:18] [PASSED] drm_test_buddy_alloc_pathological
[05:21:18] [PASSED] drm_test_buddy_alloc_contiguous
[05:21:18] [PASSED] drm_test_buddy_alloc_clear
[05:21:18] [PASSED] drm_test_buddy_alloc_range_bias
[05:21:18] [PASSED] drm_test_buddy_fragmentation_performance
[05:21:18] [PASSED] drm_test_buddy_alloc_exceeds_max_order
[05:21:18] ==================== [PASSED] drm_buddy ====================
[05:21:18] ============= drm_cmdline_parser (40 subtests) =============
[05:21:18] [PASSED] drm_test_cmdline_force_d_only
[05:21:18] [PASSED] drm_test_cmdline_force_D_only_dvi
[05:21:18] [PASSED] drm_test_cmdline_force_D_only_hdmi
[05:21:18] [PASSED] drm_test_cmdline_force_D_only_not_digital
[05:21:18] [PASSED] drm_test_cmdline_force_e_only
[05:21:18] [PASSED] drm_test_cmdline_res
[05:21:18] [PASSED] drm_test_cmdline_res_vesa
[05:21:18] [PASSED] drm_test_cmdline_res_vesa_rblank
[05:21:18] [PASSED] drm_test_cmdline_res_rblank
[05:21:18] [PASSED] drm_test_cmdline_res_bpp
[05:21:18] [PASSED] drm_test_cmdline_res_refresh
[05:21:18] [PASSED] drm_test_cmdline_res_bpp_refresh
[05:21:18] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[05:21:18] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[05:21:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[05:21:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[05:21:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[05:21:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[05:21:18] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[05:21:18] [PASSED] drm_test_cmdline_res_margins_force_on
[05:21:18] [PASSED] drm_test_cmdline_res_vesa_margins
[05:21:18] [PASSED] drm_test_cmdline_name
[05:21:18] [PASSED] drm_test_cmdline_name_bpp
[05:21:18] [PASSED] drm_test_cmdline_name_option
[05:21:18] [PASSED] drm_test_cmdline_name_bpp_option
[05:21:18] [PASSED] drm_test_cmdline_rotate_0
[05:21:18] [PASSED] drm_test_cmdline_rotate_90
[05:21:18] [PASSED] drm_test_cmdline_rotate_180
[05:21:18] [PASSED] drm_test_cmdline_rotate_270
[05:21:18] [PASSED] drm_test_cmdline_hmirror
[05:21:18] [PASSED] drm_test_cmdline_vmirror
[05:21:18] [PASSED] drm_test_cmdline_margin_options
[05:21:18] [PASSED] drm_test_cmdline_multiple_options
[05:21:18] [PASSED] drm_test_cmdline_bpp_extra_and_option
[05:21:18] [PASSED] drm_test_cmdline_extra_and_option
[05:21:18] [PASSED] drm_test_cmdline_freestanding_options
[05:21:18] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[05:21:18] [PASSED] drm_test_cmdline_panel_orientation
[05:21:18] ================ drm_test_cmdline_invalid =================
[05:21:18] [PASSED] margin_only
[05:21:18] [PASSED] interlace_only
[05:21:18] [PASSED] res_missing_x
[05:21:18] [PASSED] res_missing_y
[05:21:18] [PASSED] res_bad_y
[05:21:18] [PASSED] res_missing_y_bpp
[05:21:18] [PASSED] res_bad_bpp
[05:21:18] [PASSED] res_bad_refresh
[05:21:18] [PASSED] res_bpp_refresh_force_on_off
[05:21:18] [PASSED] res_invalid_mode
[05:21:18] [PASSED] res_bpp_wrong_place_mode
[05:21:18] [PASSED] name_bpp_refresh
[05:21:18] [PASSED] name_refresh
[05:21:18] [PASSED] name_refresh_wrong_mode
[05:21:18] [PASSED] name_refresh_invalid_mode
[05:21:18] [PASSED] rotate_multiple
[05:21:18] [PASSED] rotate_invalid_val
[05:21:18] [PASSED] rotate_truncated
[05:21:18] [PASSED] invalid_option
[05:21:18] [PASSED] invalid_tv_option
[05:21:18] [PASSED] truncated_tv_option
[05:21:18] ============ [PASSED] drm_test_cmdline_invalid =============
[05:21:18] =============== drm_test_cmdline_tv_options ===============
[05:21:18] [PASSED] NTSC
[05:21:18] [PASSED] NTSC_443
[05:21:18] [PASSED] NTSC_J
[05:21:18] [PASSED] PAL
[05:21:18] [PASSED] PAL_M
[05:21:18] [PASSED] PAL_N
[05:21:18] [PASSED] SECAM
[05:21:18] [PASSED] MONO_525
[05:21:18] [PASSED] MONO_625
[05:21:18] =========== [PASSED] drm_test_cmdline_tv_options ===========
[05:21:18] =============== [PASSED] drm_cmdline_parser ================
[05:21:18] ========== drmm_connector_hdmi_init (20 subtests) ==========
[05:21:18] [PASSED] drm_test_connector_hdmi_init_valid
[05:21:18] [PASSED] drm_test_connector_hdmi_init_bpc_8
[05:21:18] [PASSED] drm_test_connector_hdmi_init_bpc_10
[05:21:18] [PASSED] drm_test_connector_hdmi_init_bpc_12
[05:21:18] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[05:21:18] [PASSED] drm_test_connector_hdmi_init_bpc_null
[05:21:18] [PASSED] drm_test_connector_hdmi_init_formats_empty
[05:21:18] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[05:21:18] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[05:21:18] [PASSED] supported_formats=0x9 yuv420_allowed=1
[05:21:18] [PASSED] supported_formats=0x9 yuv420_allowed=0
[05:21:18] [PASSED] supported_formats=0x3 yuv420_allowed=1
[05:21:18] [PASSED] supported_formats=0x3 yuv420_allowed=0
[05:21:18] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[05:21:18] [PASSED] drm_test_connector_hdmi_init_null_ddc
[05:21:18] [PASSED] drm_test_connector_hdmi_init_null_product
[05:21:18] [PASSED] drm_test_connector_hdmi_init_null_vendor
[05:21:18] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[05:21:18] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[05:21:18] [PASSED] drm_test_connector_hdmi_init_product_valid
[05:21:18] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[05:21:18] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[05:21:18] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[05:21:18] ========= drm_test_connector_hdmi_init_type_valid =========
[05:21:18] [PASSED] HDMI-A
[05:21:18] [PASSED] HDMI-B
[05:21:18] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[05:21:18] ======== drm_test_connector_hdmi_init_type_invalid ========
[05:21:18] [PASSED] Unknown
[05:21:18] [PASSED] VGA
[05:21:18] [PASSED] DVI-I
[05:21:18] [PASSED] DVI-D
[05:21:18] [PASSED] DVI-A
[05:21:18] [PASSED] Composite
[05:21:18] [PASSED] SVIDEO
[05:21:18] [PASSED] LVDS
[05:21:18] [PASSED] Component
[05:21:18] [PASSED] DIN
[05:21:18] [PASSED] DP
[05:21:18] [PASSED] TV
[05:21:18] [PASSED] eDP
[05:21:18] [PASSED] Virtual
[05:21:18] [PASSED] DSI
[05:21:18] [PASSED] DPI
[05:21:18] [PASSED] Writeback
[05:21:18] [PASSED] SPI
[05:21:18] [PASSED] USB
[05:21:18] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[05:21:18] ============ [PASSED] drmm_connector_hdmi_init =============
[05:21:18] ============= drmm_connector_init (3 subtests) =============
[05:21:18] [PASSED] drm_test_drmm_connector_init
[05:21:18] [PASSED] drm_test_drmm_connector_init_null_ddc
[05:21:18] ========= drm_test_drmm_connector_init_type_valid =========
[05:21:18] [PASSED] Unknown
[05:21:18] [PASSED] VGA
[05:21:18] [PASSED] DVI-I
[05:21:18] [PASSED] DVI-D
[05:21:18] [PASSED] DVI-A
[05:21:18] [PASSED] Composite
[05:21:18] [PASSED] SVIDEO
[05:21:18] [PASSED] LVDS
[05:21:18] [PASSED] Component
[05:21:18] [PASSED] DIN
[05:21:18] [PASSED] DP
[05:21:18] [PASSED] HDMI-A
[05:21:18] [PASSED] HDMI-B
[05:21:18] [PASSED] TV
[05:21:18] [PASSED] eDP
[05:21:18] [PASSED] Virtual
[05:21:18] [PASSED] DSI
[05:21:18] [PASSED] DPI
[05:21:18] [PASSED] Writeback
[05:21:18] [PASSED] SPI
[05:21:18] [PASSED] USB
[05:21:18] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[05:21:18] =============== [PASSED] drmm_connector_init ===============
[05:21:18] ========= drm_connector_dynamic_init (6 subtests) ==========
[05:21:18] [PASSED] drm_test_drm_connector_dynamic_init
[05:21:18] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[05:21:18] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[05:21:18] [PASSED] drm_test_drm_connector_dynamic_init_properties
[05:21:18] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[05:21:18] [PASSED] Unknown
[05:21:18] [PASSED] VGA
[05:21:18] [PASSED] DVI-I
[05:21:18] [PASSED] DVI-D
[05:21:18] [PASSED] DVI-A
[05:21:18] [PASSED] Composite
[05:21:18] [PASSED] SVIDEO
[05:21:18] [PASSED] LVDS
[05:21:18] [PASSED] Component
[05:21:18] [PASSED] DIN
[05:21:18] [PASSED] DP
[05:21:18] [PASSED] HDMI-A
[05:21:18] [PASSED] HDMI-B
[05:21:18] [PASSED] TV
[05:21:18] [PASSED] eDP
[05:21:18] [PASSED] Virtual
[05:21:18] [PASSED] DSI
[05:21:18] [PASSED] DPI
[05:21:18] [PASSED] Writeback
[05:21:18] [PASSED] SPI
[05:21:18] [PASSED] USB
[05:21:18] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[05:21:18] ======== drm_test_drm_connector_dynamic_init_name =========
[05:21:18] [PASSED] Unknown
[05:21:18] [PASSED] VGA
[05:21:18] [PASSED] DVI-I
[05:21:18] [PASSED] DVI-D
[05:21:18] [PASSED] DVI-A
[05:21:18] [PASSED] Composite
[05:21:18] [PASSED] SVIDEO
[05:21:18] [PASSED] LVDS
[05:21:18] [PASSED] Component
[05:21:18] [PASSED] DIN
[05:21:18] [PASSED] DP
[05:21:18] [PASSED] HDMI-A
[05:21:18] [PASSED] HDMI-B
[05:21:18] [PASSED] TV
[05:21:18] [PASSED] eDP
[05:21:18] [PASSED] Virtual
[05:21:18] [PASSED] DSI
[05:21:18] [PASSED] DPI
[05:21:18] [PASSED] Writeback
[05:21:18] [PASSED] SPI
[05:21:18] [PASSED] USB
[05:21:18] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[05:21:18] =========== [PASSED] drm_connector_dynamic_init ============
[05:21:18] ==== drm_connector_dynamic_register_early (4 subtests) =====
[05:21:18] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[05:21:18] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[05:21:18] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[05:21:18] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[05:21:18] ====== [PASSED] drm_connector_dynamic_register_early =======
[05:21:18] ======= drm_connector_dynamic_register (7 subtests) ========
[05:21:18] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[05:21:18] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[05:21:18] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[05:21:18] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[05:21:18] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[05:21:18] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[05:21:18] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[05:21:18] ========= [PASSED] drm_connector_dynamic_register ==========
[05:21:18] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[05:21:18] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[05:21:18] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[05:21:18] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[05:21:18] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[05:21:18] ========== drm_test_get_tv_mode_from_name_valid ===========
[05:21:18] [PASSED] NTSC
[05:21:18] [PASSED] NTSC-443
[05:21:18] [PASSED] NTSC-J
[05:21:18] [PASSED] PAL
[05:21:18] [PASSED] PAL-M
[05:21:18] [PASSED] PAL-N
[05:21:18] [PASSED] SECAM
[05:21:18] [PASSED] Mono
[05:21:18] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[05:21:18] [PASSED] drm_test_get_tv_mode_from_name_truncated
[05:21:18] ============ [PASSED] drm_get_tv_mode_from_name ============
[05:21:18] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[05:21:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[05:21:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[05:21:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[05:21:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[05:21:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[05:21:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[05:21:18] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[05:21:18] [PASSED] VIC 96
[05:21:18] [PASSED] VIC 97
[05:21:18] [PASSED] VIC 101
[05:21:18] [PASSED] VIC 102
[05:21:18] [PASSED] VIC 106
[05:21:18] [PASSED] VIC 107
[05:21:18] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[05:21:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[05:21:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[05:21:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[05:21:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[05:21:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[05:21:18] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[05:21:18] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[05:21:18] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[05:21:18] [PASSED] Automatic
[05:21:18] [PASSED] Full
[05:21:18] [PASSED] Limited 16:235
[05:21:18] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[05:21:18] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[05:21:18] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[05:21:18] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[05:21:18] === drm_test_drm_hdmi_connector_get_output_format_name ====
[05:21:18] [PASSED] RGB
[05:21:18] [PASSED] YUV 4:2:0
[05:21:18] [PASSED] YUV 4:2:2
[05:21:18] [PASSED] YUV 4:4:4
[05:21:18] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[05:21:18] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[05:21:18] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[05:21:18] ============= drm_damage_helper (21 subtests) ==============
[05:21:18] [PASSED] drm_test_damage_iter_no_damage
[05:21:18] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[05:21:18] [PASSED] drm_test_damage_iter_no_damage_src_moved
[05:21:18] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[05:21:18] [PASSED] drm_test_damage_iter_no_damage_not_visible
[05:21:18] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[05:21:18] [PASSED] drm_test_damage_iter_no_damage_no_fb
[05:21:18] [PASSED] drm_test_damage_iter_simple_damage
[05:21:18] [PASSED] drm_test_damage_iter_single_damage
[05:21:18] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[05:21:18] [PASSED] drm_test_damage_iter_single_damage_outside_src
[05:21:18] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[05:21:18] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[05:21:18] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[05:21:18] [PASSED] drm_test_damage_iter_single_damage_src_moved
[05:21:18] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[05:21:18] [PASSED] drm_test_damage_iter_damage
[05:21:18] [PASSED] drm_test_damage_iter_damage_one_intersect
[05:21:18] [PASSED] drm_test_damage_iter_damage_one_outside
[05:21:18] [PASSED] drm_test_damage_iter_damage_src_moved
[05:21:18] [PASSED] drm_test_damage_iter_damage_not_visible
[05:21:18] ================ [PASSED] drm_damage_helper ================
[05:21:18] ============== drm_dp_mst_helper (3 subtests) ==============
[05:21:18] ============== drm_test_dp_mst_calc_pbn_mode ==============
[05:21:18] [PASSED] Clock 154000 BPP 30 DSC disabled
[05:21:18] [PASSED] Clock 234000 BPP 30 DSC disabled
[05:21:18] [PASSED] Clock 297000 BPP 24 DSC disabled
[05:21:18] [PASSED] Clock 332880 BPP 24 DSC enabled
[05:21:18] [PASSED] Clock 324540 BPP 24 DSC enabled
[05:21:18] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[05:21:18] ============== drm_test_dp_mst_calc_pbn_div ===============
[05:21:18] [PASSED] Link rate 2000000 lane count 4
[05:21:18] [PASSED] Link rate 2000000 lane count 2
[05:21:18] [PASSED] Link rate 2000000 lane count 1
[05:21:18] [PASSED] Link rate 1350000 lane count 4
[05:21:18] [PASSED] Link rate 1350000 lane count 2
[05:21:18] [PASSED] Link rate 1350000 lane count 1
[05:21:18] [PASSED] Link rate 1000000 lane count 4
[05:21:18] [PASSED] Link rate 1000000 lane count 2
[05:21:18] [PASSED] Link rate 1000000 lane count 1
[05:21:18] [PASSED] Link rate 810000 lane count 4
[05:21:18] [PASSED] Link rate 810000 lane count 2
[05:21:18] [PASSED] Link rate 810000 lane count 1
[05:21:18] [PASSED] Link rate 540000 lane count 4
[05:21:18] [PASSED] Link rate 540000 lane count 2
[05:21:18] [PASSED] Link rate 540000 lane count 1
[05:21:18] [PASSED] Link rate 270000 lane count 4
[05:21:18] [PASSED] Link rate 270000 lane count 2
[05:21:18] [PASSED] Link rate 270000 lane count 1
[05:21:18] [PASSED] Link rate 162000 lane count 4
[05:21:18] [PASSED] Link rate 162000 lane count 2
[05:21:18] [PASSED] Link rate 162000 lane count 1
[05:21:18] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[05:21:18] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[05:21:18] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[05:21:18] [PASSED] DP_POWER_UP_PHY with port number
[05:21:18] [PASSED] DP_POWER_DOWN_PHY with port number
[05:21:18] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[05:21:18] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[05:21:18] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[05:21:18] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[05:21:18] [PASSED] DP_QUERY_PAYLOAD with port number
[05:21:18] [PASSED] DP_QUERY_PAYLOAD with VCPI
[05:21:18] [PASSED] DP_REMOTE_DPCD_READ with port number
[05:21:18] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[05:21:18] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[05:21:18] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[05:21:18] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[05:21:18] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[05:21:18] [PASSED] DP_REMOTE_I2C_READ with port number
[05:21:18] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[05:21:18] [PASSED] DP_REMOTE_I2C_READ with transactions array
[05:21:18] [PASSED] DP_REMOTE_I2C_WRITE with port number
[05:21:18] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[05:21:18] [PASSED] DP_REMOTE_I2C_WRITE with data array
[05:21:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[05:21:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[05:21:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[05:21:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[05:21:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[05:21:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[05:21:18] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[05:21:18] ================ [PASSED] drm_dp_mst_helper ================
[05:21:18] ================== drm_exec (7 subtests) ===================
[05:21:18] [PASSED] sanitycheck
[05:21:18] [PASSED] test_lock
[05:21:18] [PASSED] test_lock_unlock
[05:21:18] [PASSED] test_duplicates
[05:21:18] [PASSED] test_prepare
[05:21:18] [PASSED] test_prepare_array
[05:21:18] [PASSED] test_multiple_loops
[05:21:18] ==================== [PASSED] drm_exec =====================
[05:21:18] =========== drm_format_helper_test (17 subtests) ===========
[05:21:18] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[05:21:18] [PASSED] single_pixel_source_buffer
[05:21:18] [PASSED] single_pixel_clip_rectangle
[05:21:18] [PASSED] well_known_colors
[05:21:18] [PASSED] destination_pitch
[05:21:18] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[05:21:18] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[05:21:18] [PASSED] single_pixel_source_buffer
[05:21:18] [PASSED] single_pixel_clip_rectangle
[05:21:18] [PASSED] well_known_colors
[05:21:18] [PASSED] destination_pitch
[05:21:18] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[05:21:18] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[05:21:18] [PASSED] single_pixel_source_buffer
[05:21:18] [PASSED] single_pixel_clip_rectangle
[05:21:18] [PASSED] well_known_colors
[05:21:18] [PASSED] destination_pitch
[05:21:18] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[05:21:18] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[05:21:18] [PASSED] single_pixel_source_buffer
[05:21:18] [PASSED] single_pixel_clip_rectangle
[05:21:18] [PASSED] well_known_colors
[05:21:18] [PASSED] destination_pitch
[05:21:18] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[05:21:18] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[05:21:18] [PASSED] single_pixel_source_buffer
[05:21:18] [PASSED] single_pixel_clip_rectangle
[05:21:18] [PASSED] well_known_colors
[05:21:18] [PASSED] destination_pitch
[05:21:18] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[05:21:18] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[05:21:18] [PASSED] single_pixel_source_buffer
[05:21:18] [PASSED] single_pixel_clip_rectangle
[05:21:18] [PASSED] well_known_colors
[05:21:18] [PASSED] destination_pitch
[05:21:18] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[05:21:18] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[05:21:18] [PASSED] single_pixel_source_buffer
[05:21:18] [PASSED] single_pixel_clip_rectangle
[05:21:18] [PASSED] well_known_colors
[05:21:18] [PASSED] destination_pitch
[05:21:18] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[05:21:18] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[05:21:18] [PASSED] single_pixel_source_buffer
[05:21:18] [PASSED] single_pixel_clip_rectangle
[05:21:18] [PASSED] well_known_colors
[05:21:18] [PASSED] destination_pitch
[05:21:18] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[05:21:18] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[05:21:18] [PASSED] single_pixel_source_buffer
[05:21:18] [PASSED] single_pixel_clip_rectangle
[05:21:18] [PASSED] well_known_colors
[05:21:18] [PASSED] destination_pitch
[05:21:18] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[05:21:18] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[05:21:18] [PASSED] single_pixel_source_buffer
[05:21:18] [PASSED] single_pixel_clip_rectangle
[05:21:18] [PASSED] well_known_colors
[05:21:18] [PASSED] destination_pitch
[05:21:18] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[05:21:18] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[05:21:18] [PASSED] single_pixel_source_buffer
[05:21:18] [PASSED] single_pixel_clip_rectangle
[05:21:18] [PASSED] well_known_colors
[05:21:18] [PASSED] destination_pitch
[05:21:18] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[05:21:18] ============== drm_test_fb_xrgb8888_to_mono ===============
[05:21:18] [PASSED] single_pixel_source_buffer
[05:21:18] [PASSED] single_pixel_clip_rectangle
[05:21:18] [PASSED] well_known_colors
[05:21:18] [PASSED] destination_pitch
[05:21:18] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[05:21:18] ==================== drm_test_fb_swab =====================
[05:21:18] [PASSED] single_pixel_source_buffer
[05:21:18] [PASSED] single_pixel_clip_rectangle
[05:21:18] [PASSED] well_known_colors
[05:21:18] [PASSED] destination_pitch
[05:21:18] ================ [PASSED] drm_test_fb_swab =================
[05:21:18] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[05:21:18] [PASSED] single_pixel_source_buffer
[05:21:18] [PASSED] single_pixel_clip_rectangle
[05:21:18] [PASSED] well_known_colors
[05:21:18] [PASSED] destination_pitch
[05:21:18] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[05:21:18] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[05:21:18] [PASSED] single_pixel_source_buffer
[05:21:18] [PASSED] single_pixel_clip_rectangle
[05:21:18] [PASSED] well_known_colors
[05:21:18] [PASSED] destination_pitch
[05:21:18] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[05:21:18] ================= drm_test_fb_clip_offset =================
[05:21:18] [PASSED] pass through
[05:21:18] [PASSED] horizontal offset
[05:21:18] [PASSED] vertical offset
[05:21:18] [PASSED] horizontal and vertical offset
[05:21:18] [PASSED] horizontal offset (custom pitch)
[05:21:18] [PASSED] vertical offset (custom pitch)
[05:21:18] [PASSED] horizontal and vertical offset (custom pitch)
[05:21:18] ============= [PASSED] drm_test_fb_clip_offset =============
[05:21:18] =================== drm_test_fb_memcpy ====================
[05:21:18] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[05:21:18] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[05:21:18] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[05:21:18] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[05:21:18] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[05:21:18] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[05:21:18] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[05:21:18] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[05:21:18] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[05:21:18] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[05:21:18] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[05:21:18] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[05:21:18] =============== [PASSED] drm_test_fb_memcpy ================
[05:21:18] ============= [PASSED] drm_format_helper_test ==============
[05:21:18] ================= drm_format (18 subtests) =================
[05:21:18] [PASSED] drm_test_format_block_width_invalid
[05:21:18] [PASSED] drm_test_format_block_width_one_plane
[05:21:18] [PASSED] drm_test_format_block_width_two_plane
[05:21:18] [PASSED] drm_test_format_block_width_three_plane
[05:21:18] [PASSED] drm_test_format_block_width_tiled
[05:21:18] [PASSED] drm_test_format_block_height_invalid
[05:21:18] [PASSED] drm_test_format_block_height_one_plane
[05:21:18] [PASSED] drm_test_format_block_height_two_plane
[05:21:18] [PASSED] drm_test_format_block_height_three_plane
[05:21:18] [PASSED] drm_test_format_block_height_tiled
[05:21:18] [PASSED] drm_test_format_min_pitch_invalid
[05:21:18] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[05:21:18] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[05:21:18] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[05:21:18] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[05:21:18] [PASSED] drm_test_format_min_pitch_two_plane
[05:21:18] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[05:21:18] [PASSED] drm_test_format_min_pitch_tiled
[05:21:18] =================== [PASSED] drm_format ====================
[05:21:18] ============== drm_framebuffer (10 subtests) ===============
[05:21:18] ========== drm_test_framebuffer_check_src_coords ==========
[05:21:18] [PASSED] Success: source fits into fb
[05:21:18] [PASSED] Fail: overflowing fb with x-axis coordinate
[05:21:18] [PASSED] Fail: overflowing fb with y-axis coordinate
[05:21:18] [PASSED] Fail: overflowing fb with source width
[05:21:18] [PASSED] Fail: overflowing fb with source height
[05:21:18] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[05:21:18] [PASSED] drm_test_framebuffer_cleanup
[05:21:18] =============== drm_test_framebuffer_create ===============
[05:21:18] [PASSED] ABGR8888 normal sizes
[05:21:18] [PASSED] ABGR8888 max sizes
[05:21:18] [PASSED] ABGR8888 pitch greater than min required
[05:21:18] [PASSED] ABGR8888 pitch less than min required
[05:21:18] [PASSED] ABGR8888 Invalid width
[05:21:18] [PASSED] ABGR8888 Invalid buffer handle
[05:21:18] [PASSED] No pixel format
[05:21:18] [PASSED] ABGR8888 Width 0
[05:21:18] [PASSED] ABGR8888 Height 0
[05:21:18] [PASSED] ABGR8888 Out of bound height * pitch combination
[05:21:18] [PASSED] ABGR8888 Large buffer offset
[05:21:18] [PASSED] ABGR8888 Buffer offset for inexistent plane
[05:21:18] [PASSED] ABGR8888 Invalid flag
[05:21:18] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[05:21:18] [PASSED] ABGR8888 Valid buffer modifier
[05:21:18] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[05:21:18] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[05:21:18] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[05:21:18] [PASSED] NV12 Normal sizes
[05:21:18] [PASSED] NV12 Max sizes
[05:21:18] [PASSED] NV12 Invalid pitch
[05:21:18] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[05:21:18] [PASSED] NV12 different modifier per-plane
[05:21:18] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[05:21:18] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[05:21:18] [PASSED] NV12 Modifier for inexistent plane
[05:21:18] [PASSED] NV12 Handle for inexistent plane
[05:21:18] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[05:21:18] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[05:21:18] [PASSED] YVU420 Normal sizes
[05:21:18] [PASSED] YVU420 Max sizes
[05:21:18] [PASSED] YVU420 Invalid pitch
[05:21:18] [PASSED] YVU420 Different pitches
[05:21:18] [PASSED] YVU420 Different buffer offsets/pitches
[05:21:18] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[05:21:18] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[05:21:18] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[05:21:18] [PASSED] YVU420 Valid modifier
[05:21:18] [PASSED] YVU420 Different modifiers per plane
[05:21:18] [PASSED] YVU420 Modifier for inexistent plane
[05:21:18] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[05:21:18] [PASSED] X0L2 Normal sizes
[05:21:18] [PASSED] X0L2 Max sizes
[05:21:18] [PASSED] X0L2 Invalid pitch
[05:21:18] [PASSED] X0L2 Pitch greater than minimum required
[05:21:18] [PASSED] X0L2 Handle for inexistent plane
[05:21:18] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[05:21:18] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[05:21:18] [PASSED] X0L2 Valid modifier
[05:21:18] [PASSED] X0L2 Modifier for inexistent plane
[05:21:18] =========== [PASSED] drm_test_framebuffer_create ===========
[05:21:18] [PASSED] drm_test_framebuffer_free
[05:21:18] [PASSED] drm_test_framebuffer_init
[05:21:18] [PASSED] drm_test_framebuffer_init_bad_format
[05:21:18] [PASSED] drm_test_framebuffer_init_dev_mismatch
[05:21:18] [PASSED] drm_test_framebuffer_lookup
[05:21:18] [PASSED] drm_test_framebuffer_lookup_inexistent
[05:21:18] [PASSED] drm_test_framebuffer_modifiers_not_supported
[05:21:18] ================= [PASSED] drm_framebuffer =================
[05:21:18] ================ drm_gem_shmem (8 subtests) ================
[05:21:18] [PASSED] drm_gem_shmem_test_obj_create
[05:21:18] [PASSED] drm_gem_shmem_test_obj_create_private
[05:21:18] [PASSED] drm_gem_shmem_test_pin_pages
[05:21:18] [PASSED] drm_gem_shmem_test_vmap
[05:21:18] [PASSED] drm_gem_shmem_test_get_sg_table
[05:21:18] [PASSED] drm_gem_shmem_test_get_pages_sgt
[05:21:18] [PASSED] drm_gem_shmem_test_madvise
[05:21:18] [PASSED] drm_gem_shmem_test_purge
[05:21:18] ================== [PASSED] drm_gem_shmem ==================
[05:21:18] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[05:21:18] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[05:21:18] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[05:21:18] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[05:21:18] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[05:21:18] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[05:21:18] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[05:21:18] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[05:21:18] [PASSED] Automatic
[05:21:18] [PASSED] Full
[05:21:18] [PASSED] Limited 16:235
[05:21:18] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[05:21:18] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[05:21:18] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[05:21:18] [PASSED] drm_test_check_disable_connector
[05:21:18] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[05:21:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[05:21:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[05:21:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[05:21:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[05:21:18] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[05:21:18] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[05:21:18] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[05:21:18] [PASSED] drm_test_check_output_bpc_dvi
[05:21:18] [PASSED] drm_test_check_output_bpc_format_vic_1
[05:21:18] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[05:21:18] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[05:21:18] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[05:21:18] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[05:21:18] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[05:21:18] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[05:21:18] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[05:21:18] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[05:21:18] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[05:21:18] [PASSED] drm_test_check_broadcast_rgb_value
[05:21:18] [PASSED] drm_test_check_bpc_8_value
[05:21:18] [PASSED] drm_test_check_bpc_10_value
[05:21:18] [PASSED] drm_test_check_bpc_12_value
[05:21:18] [PASSED] drm_test_check_format_value
[05:21:18] [PASSED] drm_test_check_tmds_char_value
[05:21:18] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[05:21:18] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[05:21:18] [PASSED] drm_test_check_mode_valid
[05:21:18] [PASSED] drm_test_check_mode_valid_reject
[05:21:18] [PASSED] drm_test_check_mode_valid_reject_rate
[05:21:18] [PASSED] drm_test_check_mode_valid_reject_max_clock
[05:21:18] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[05:21:18] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[05:21:18] [PASSED] drm_test_check_infoframes
[05:21:18] [PASSED] drm_test_check_reject_avi_infoframe
[05:21:18] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[05:21:18] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[05:21:18] [PASSED] drm_test_check_reject_audio_infoframe
[05:21:18] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[05:21:18] ================= drm_managed (2 subtests) =================
[05:21:18] [PASSED] drm_test_managed_release_action
[05:21:18] [PASSED] drm_test_managed_run_action
[05:21:18] =================== [PASSED] drm_managed ===================
[05:21:18] =================== drm_mm (6 subtests) ====================
[05:21:18] [PASSED] drm_test_mm_init
[05:21:18] [PASSED] drm_test_mm_debug
[05:21:18] [PASSED] drm_test_mm_align32
[05:21:18] [PASSED] drm_test_mm_align64
[05:21:18] [PASSED] drm_test_mm_lowest
[05:21:18] [PASSED] drm_test_mm_highest
[05:21:18] ===================== [PASSED] drm_mm ======================
[05:21:18] ============= drm_modes_analog_tv (5 subtests) =============
[05:21:18] [PASSED] drm_test_modes_analog_tv_mono_576i
[05:21:18] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[05:21:18] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[05:21:18] [PASSED] drm_test_modes_analog_tv_pal_576i
[05:21:18] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[05:21:18] =============== [PASSED] drm_modes_analog_tv ===============
[05:21:18] ============== drm_plane_helper (2 subtests) ===============
[05:21:18] =============== drm_test_check_plane_state ================
[05:21:18] [PASSED] clipping_simple
[05:21:18] [PASSED] clipping_rotate_reflect
[05:21:18] [PASSED] positioning_simple
[05:21:18] [PASSED] upscaling
[05:21:18] [PASSED] downscaling
[05:21:18] [PASSED] rounding1
[05:21:18] [PASSED] rounding2
[05:21:18] [PASSED] rounding3
[05:21:18] [PASSED] rounding4
[05:21:18] =========== [PASSED] drm_test_check_plane_state ============
[05:21:18] =========== drm_test_check_invalid_plane_state ============
[05:21:18] [PASSED] positioning_invalid
[05:21:18] [PASSED] upscaling_invalid
[05:21:18] [PASSED] downscaling_invalid
[05:21:18] ======= [PASSED] drm_test_check_invalid_plane_state ========
[05:21:18] ================ [PASSED] drm_plane_helper =================
[05:21:18] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[05:21:18] ====== drm_test_connector_helper_tv_get_modes_check =======
[05:21:18] [PASSED] None
[05:21:18] [PASSED] PAL
[05:21:18] [PASSED] NTSC
[05:21:18] [PASSED] Both, NTSC Default
[05:21:18] [PASSED] Both, PAL Default
[05:21:18] [PASSED] Both, NTSC Default, with PAL on command-line
[05:21:18] [PASSED] Both, PAL Default, with NTSC on command-line
[05:21:18] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[05:21:18] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[05:21:18] ================== drm_rect (9 subtests) ===================
[05:21:18] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[05:21:18] [PASSED] drm_test_rect_clip_scaled_not_clipped
[05:21:18] [PASSED] drm_test_rect_clip_scaled_clipped
[05:21:18] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[05:21:18] ================= drm_test_rect_intersect =================
[05:21:18] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[05:21:18] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[05:21:18] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[05:21:18] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[05:21:18] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[05:21:18] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[05:21:18] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[05:21:18] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[05:21:18] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[05:21:18] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[05:21:18] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[05:21:18] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[05:21:18] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[05:21:18] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[05:21:18] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
stty: 'standard input': Inappropriate ioctl for device
[05:21:18] ============= [PASSED] drm_test_rect_intersect =============
[05:21:18] ================ drm_test_rect_calc_hscale ================
[05:21:18] [PASSED] normal use
[05:21:18] [PASSED] out of max range
[05:21:18] [PASSED] out of min range
[05:21:18] [PASSED] zero dst
[05:21:18] [PASSED] negative src
[05:21:18] [PASSED] negative dst
[05:21:18] ============ [PASSED] drm_test_rect_calc_hscale ============
[05:21:18] ================ drm_test_rect_calc_vscale ================
[05:21:18] [PASSED] normal use
[05:21:18] [PASSED] out of max range
[05:21:18] [PASSED] out of min range
[05:21:18] [PASSED] zero dst
[05:21:18] [PASSED] negative src
[05:21:18] [PASSED] negative dst
[05:21:18] ============ [PASSED] drm_test_rect_calc_vscale ============
[05:21:18] ================== drm_test_rect_rotate ===================
[05:21:18] [PASSED] reflect-x
[05:21:18] [PASSED] reflect-y
[05:21:18] [PASSED] rotate-0
[05:21:18] [PASSED] rotate-90
[05:21:18] [PASSED] rotate-180
[05:21:18] [PASSED] rotate-270
[05:21:18] ============== [PASSED] drm_test_rect_rotate ===============
[05:21:18] ================ drm_test_rect_rotate_inv =================
[05:21:18] [PASSED] reflect-x
[05:21:18] [PASSED] reflect-y
[05:21:18] [PASSED] rotate-0
[05:21:18] [PASSED] rotate-90
[05:21:18] [PASSED] rotate-180
[05:21:18] [PASSED] rotate-270
[05:21:18] ============ [PASSED] drm_test_rect_rotate_inv =============
[05:21:18] ==================== [PASSED] drm_rect =====================
[05:21:18] ============ drm_sysfb_modeset_test (1 subtest) ============
[05:21:18] ============ drm_test_sysfb_build_fourcc_list =============
[05:21:18] [PASSED] no native formats
[05:21:18] [PASSED] XRGB8888 as native format
[05:21:18] [PASSED] remove duplicates
[05:21:18] [PASSED] convert alpha formats
[05:21:18] [PASSED] random formats
[05:21:18] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[05:21:18] ============= [PASSED] drm_sysfb_modeset_test ==============
[05:21:18] ================== drm_fixp (2 subtests) ===================
[05:21:18] [PASSED] drm_test_int2fixp
[05:21:18] [PASSED] drm_test_sm2fixp
[05:21:18] ==================== [PASSED] drm_fixp =====================
[05:21:18] ============================================================
[05:21:18] Testing complete. Ran 630 tests: passed: 630
[05:21:18] Elapsed time: 27.370s total, 1.652s configuring, 25.297s building, 0.389s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[05:21:18] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:21:20] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:21:29] Starting KUnit Kernel (1/1)...
[05:21:29] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:21:30] ================= ttm_device (5 subtests) ==================
[05:21:30] [PASSED] ttm_device_init_basic
[05:21:30] [PASSED] ttm_device_init_multiple
[05:21:30] [PASSED] ttm_device_fini_basic
[05:21:30] [PASSED] ttm_device_init_no_vma_man
[05:21:30] ================== ttm_device_init_pools ==================
[05:21:30] [PASSED] No DMA allocations, no DMA32 required
[05:21:30] [PASSED] DMA allocations, DMA32 required
[05:21:30] [PASSED] No DMA allocations, DMA32 required
[05:21:30] [PASSED] DMA allocations, no DMA32 required
[05:21:30] ============== [PASSED] ttm_device_init_pools ==============
[05:21:30] =================== [PASSED] ttm_device ====================
[05:21:30] ================== ttm_pool (8 subtests) ===================
[05:21:30] ================== ttm_pool_alloc_basic ===================
[05:21:30] [PASSED] One page
[05:21:30] [PASSED] More than one page
[05:21:30] [PASSED] Above the allocation limit
[05:21:30] [PASSED] One page, with coherent DMA mappings enabled
[05:21:30] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[05:21:30] ============== [PASSED] ttm_pool_alloc_basic ===============
[05:21:30] ============== ttm_pool_alloc_basic_dma_addr ==============
[05:21:30] [PASSED] One page
[05:21:30] [PASSED] More than one page
[05:21:30] [PASSED] Above the allocation limit
[05:21:30] [PASSED] One page, with coherent DMA mappings enabled
[05:21:30] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[05:21:30] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[05:21:30] [PASSED] ttm_pool_alloc_order_caching_match
[05:21:30] [PASSED] ttm_pool_alloc_caching_mismatch
[05:21:30] [PASSED] ttm_pool_alloc_order_mismatch
[05:21:30] [PASSED] ttm_pool_free_dma_alloc
[05:21:30] [PASSED] ttm_pool_free_no_dma_alloc
[05:21:30] [PASSED] ttm_pool_fini_basic
[05:21:30] ==================== [PASSED] ttm_pool =====================
[05:21:30] ================ ttm_resource (8 subtests) =================
[05:21:30] ================= ttm_resource_init_basic =================
[05:21:30] [PASSED] Init resource in TTM_PL_SYSTEM
[05:21:30] [PASSED] Init resource in TTM_PL_VRAM
[05:21:30] [PASSED] Init resource in a private placement
[05:21:30] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[05:21:30] ============= [PASSED] ttm_resource_init_basic =============
[05:21:30] [PASSED] ttm_resource_init_pinned
[05:21:30] [PASSED] ttm_resource_fini_basic
[05:21:30] [PASSED] ttm_resource_manager_init_basic
[05:21:30] [PASSED] ttm_resource_manager_usage_basic
[05:21:30] [PASSED] ttm_resource_manager_set_used_basic
[05:21:30] [PASSED] ttm_sys_man_alloc_basic
[05:21:30] [PASSED] ttm_sys_man_free_basic
[05:21:30] ================== [PASSED] ttm_resource ===================
[05:21:30] =================== ttm_tt (15 subtests) ===================
[05:21:30] ==================== ttm_tt_init_basic ====================
[05:21:30] [PASSED] Page-aligned size
[05:21:30] [PASSED] Extra pages requested
[05:21:30] ================ [PASSED] ttm_tt_init_basic ================
[05:21:30] [PASSED] ttm_tt_init_misaligned
[05:21:30] [PASSED] ttm_tt_fini_basic
[05:21:30] [PASSED] ttm_tt_fini_sg
[05:21:30] [PASSED] ttm_tt_fini_shmem
[05:21:30] [PASSED] ttm_tt_create_basic
[05:21:30] [PASSED] ttm_tt_create_invalid_bo_type
[05:21:30] [PASSED] ttm_tt_create_ttm_exists
[05:21:30] [PASSED] ttm_tt_create_failed
[05:21:30] [PASSED] ttm_tt_destroy_basic
[05:21:30] [PASSED] ttm_tt_populate_null_ttm
[05:21:30] [PASSED] ttm_tt_populate_populated_ttm
[05:21:30] [PASSED] ttm_tt_unpopulate_basic
[05:21:30] [PASSED] ttm_tt_unpopulate_empty_ttm
[05:21:30] [PASSED] ttm_tt_swapin_basic
[05:21:30] ===================== [PASSED] ttm_tt ======================
[05:21:30] =================== ttm_bo (14 subtests) ===================
[05:21:30] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[05:21:30] [PASSED] Cannot be interrupted and sleeps
[05:21:30] [PASSED] Cannot be interrupted, locks straight away
[05:21:30] [PASSED] Can be interrupted, sleeps
[05:21:30] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[05:21:30] [PASSED] ttm_bo_reserve_locked_no_sleep
[05:21:30] [PASSED] ttm_bo_reserve_no_wait_ticket
[05:21:30] [PASSED] ttm_bo_reserve_double_resv
[05:21:30] [PASSED] ttm_bo_reserve_interrupted
[05:21:30] [PASSED] ttm_bo_reserve_deadlock
[05:21:30] [PASSED] ttm_bo_unreserve_basic
[05:21:30] [PASSED] ttm_bo_unreserve_pinned
[05:21:30] [PASSED] ttm_bo_unreserve_bulk
[05:21:30] [PASSED] ttm_bo_fini_basic
[05:21:30] [PASSED] ttm_bo_fini_shared_resv
[05:21:30] [PASSED] ttm_bo_pin_basic
[05:21:30] [PASSED] ttm_bo_pin_unpin_resource
[05:21:30] [PASSED] ttm_bo_multiple_pin_one_unpin
[05:21:30] ===================== [PASSED] ttm_bo ======================
[05:21:30] ============== ttm_bo_validate (21 subtests) ===============
[05:21:30] ============== ttm_bo_init_reserved_sys_man ===============
[05:21:30] [PASSED] Buffer object for userspace
[05:21:30] [PASSED] Kernel buffer object
[05:21:30] [PASSED] Shared buffer object
[05:21:30] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[05:21:30] ============== ttm_bo_init_reserved_mock_man ==============
[05:21:30] [PASSED] Buffer object for userspace
[05:21:30] [PASSED] Kernel buffer object
[05:21:30] [PASSED] Shared buffer object
[05:21:30] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[05:21:30] [PASSED] ttm_bo_init_reserved_resv
[05:21:30] ================== ttm_bo_validate_basic ==================
[05:21:30] [PASSED] Buffer object for userspace
[05:21:30] [PASSED] Kernel buffer object
[05:21:30] [PASSED] Shared buffer object
[05:21:30] ============== [PASSED] ttm_bo_validate_basic ==============
[05:21:30] [PASSED] ttm_bo_validate_invalid_placement
[05:21:30] ============= ttm_bo_validate_same_placement ==============
[05:21:30] [PASSED] System manager
[05:21:30] [PASSED] VRAM manager
[05:21:30] ========= [PASSED] ttm_bo_validate_same_placement ==========
[05:21:30] [PASSED] ttm_bo_validate_failed_alloc
[05:21:30] [PASSED] ttm_bo_validate_pinned
[05:21:30] [PASSED] ttm_bo_validate_busy_placement
[05:21:30] ================ ttm_bo_validate_multihop =================
[05:21:30] [PASSED] Buffer object for userspace
[05:21:30] [PASSED] Kernel buffer object
[05:21:30] [PASSED] Shared buffer object
[05:21:30] ============ [PASSED] ttm_bo_validate_multihop =============
[05:21:30] ========== ttm_bo_validate_no_placement_signaled ==========
[05:21:30] [PASSED] Buffer object in system domain, no page vector
[05:21:30] [PASSED] Buffer object in system domain with an existing page vector
[05:21:30] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[05:21:30] ======== ttm_bo_validate_no_placement_not_signaled ========
[05:21:30] [PASSED] Buffer object for userspace
[05:21:30] [PASSED] Kernel buffer object
[05:21:30] [PASSED] Shared buffer object
[05:21:30] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[05:21:30] [PASSED] ttm_bo_validate_move_fence_signaled
[05:21:30] ========= ttm_bo_validate_move_fence_not_signaled =========
[05:21:30] [PASSED] Waits for GPU
[05:21:30] [PASSED] Tries to lock straight away
[05:21:30] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[05:21:30] [PASSED] ttm_bo_validate_happy_evict
[05:21:30] [PASSED] ttm_bo_validate_all_pinned_evict
[05:21:30] [PASSED] ttm_bo_validate_allowed_only_evict
[05:21:30] [PASSED] ttm_bo_validate_deleted_evict
[05:21:30] [PASSED] ttm_bo_validate_busy_domain_evict
[05:21:30] [PASSED] ttm_bo_validate_evict_gutting
[05:21:30] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[05:21:30] ================= [PASSED] ttm_bo_validate =================
[05:21:30] ============================================================
[05:21:30] Testing complete. Ran 101 tests: passed: 101
[05:21:30] Elapsed time: 11.365s total, 1.642s configuring, 9.456s building, 0.229s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 7+ messages in thread* ✓ Xe.CI.BAT: success for drm/xe: Add prefetch fault support for Xe3p
2026-02-02 5:14 [PATCH v3 0/2] drm/xe: Add prefetch fault support for Xe3p Varun Gupta
` (4 preceding siblings ...)
2026-02-02 5:21 ` ✓ CI.KUnit: success " Patchwork
@ 2026-02-02 5:55 ` Patchwork
5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2026-02-02 5:55 UTC (permalink / raw)
To: Varun Gupta; +Cc: intel-xe
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== Series Details ==
Series: drm/xe: Add prefetch fault support for Xe3p
URL : https://patchwork.freedesktop.org/series/160978/
State : success
== Summary ==
CI Bug Log - changes from xe-4481-cd1fd615b2ba56ea3fb033262d4fbd0503055d3c_BAT -> xe-pw-160978v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (12 -> 12)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-4481-cd1fd615b2ba56ea3fb033262d4fbd0503055d3c -> xe-pw-160978v1
IGT_8729: 8729
xe-4481-cd1fd615b2ba56ea3fb033262d4fbd0503055d3c: cd1fd615b2ba56ea3fb033262d4fbd0503055d3c
xe-pw-160978v1: 160978v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160978v1/index.html
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^ permalink raw reply [flat|nested] 7+ messages in thread