Re: [PATCH 3/3] drm/xe/xe3p: Skip TD flush

[Matt Roper <matthew.d.roper@intel.com>]

On Tue, Feb 10, 2026 at 06:21:24PM +0530, Tejas Upadhyay wrote:
> Xe3p has HW ability to do transient display flush so the xe driver can
> enable this HW feature by default and skip the software TD flush.
> 
> Bspec: 60002
> Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_device.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index da2abed94bc0..483813d45474 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -1166,6 +1166,14 @@ void xe_device_td_flush(struct xe_device *xe)
>  {
>  	struct xe_gt *root_gt;
>  
> +	/*
> +	 * From Xe3p onward the HW takes care of flush of TD entries also along
> +	 * with flushing XA entries, which will be at the usual sync points,
> +	 * like at the end of submission, so no manual flush is needed here.
> +	 */
> +	if (GRAPHICS_VER(xe) >= 35)
> +		return;

I guess this is just future-proofing?  The Xe3p platforms we have today
are either igpus (NVL-P) and thus get handled by the next condition, or
dgpus that don't have display or XD pat indices at all (CRI).


Matt

> +
>  	if (!IS_DGFX(xe) || GRAPHICS_VER(xe) < 20)
>  		return;
>  
> -- 
> 2.52.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation