[PATCH v3] drm/xe: Add Wa_14026578760

[Varun Gupta <varun.gupta@intel.com>]

Add GT workaround Wa_14026578760 for graphics versions 35.10, 35.11
and media version 35.03.

Signed-off-by: Varun Gupta <varun.gupta@intel.com>
---
v3:
 - Use separate register defines for graphics and media (Tejas)
v2:
 - Fix register define ordering (Matt Roper)
 - Broaden workaround scope to cover graphics 35.10, 35.11 and media
   35.03 per workaround database (Matt Roper)
---
 drivers/gpu/drm/xe/regs/xe_gt_regs.h |  5 +++++
 drivers/gpu/drm/xe/xe_wa.c           | 11 +++++++++++
 2 files changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index 90b9017770ea..c4da4a5c02a5 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -100,6 +100,11 @@
 #define VE1_AUX_INV				XE_REG(0x42b8)
 #define   AUX_INV				REG_BIT(0)
 
+#define GAMSTLB_CTRL				0x477c
+#define GAMSTLB_CTRL_MEDIA			XE_REG(GAMSTLB_CTRL + MEDIA_GT_GSI_OFFSET)
+#define GAMSTLB_CTRL_3D				XE_REG_MCR(GAMSTLB_CTRL)
+#define   DIS_PEND_GPA_LINK			REG_BIT(13)
+
 #define GAMSTLB_CTRL2				XE_REG_MCR(0x4788)
 #define   STLB_SINGLE_BANK_MODE			REG_BIT(11)
 
diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index 26950b8a7543..fe6e42517799 100644
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -164,6 +164,10 @@ static const struct xe_rtp_entry_sr gt_was[] = {
 		       MEDIA_VERSION_RANGE(1301, 3500)),
 	  XE_RTP_ACTIONS(SET(GUC_INTR_CHICKEN, DISABLE_SIGNALING_ENGINES))
 	},
+	{ XE_RTP_NAME("14026578760"),
+	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3510, 3511)),
+	  XE_RTP_ACTIONS(SET(GAMSTLB_CTRL_3D, DIS_PEND_GPA_LINK))
+	},
 
 	/* DG1 */
 
@@ -303,6 +307,13 @@ static const struct xe_rtp_entry_sr gt_was[] = {
 	  XE_RTP_RULES(GRAPHICS_VERSION(3510), GRAPHICS_STEP(A0, B0)),
 	  XE_RTP_ACTIONS(SET(GUC_INTR_CHICKEN, DISABLE_SIGNALING_ENGINES))
 	},
+
+	/* Xe3P_HPM */
+
+	{ XE_RTP_NAME("14026578760"),
+	  XE_RTP_RULES(MEDIA_VERSION(3503)),
+	  XE_RTP_ACTIONS(SET(GAMSTLB_CTRL_MEDIA, DIS_PEND_GPA_LINK))
+	},
 };
 
 static const struct xe_rtp_entry_sr engine_was[] = {
-- 
2.43.0