* [PATCH v3 00/10] Introduce Xe PCIe FLR
@ 2026-03-08 13:55 Raag Jadav
2026-03-08 13:55 ` [PATCH v3 01/10] drm/xe/uc_fw: Allow re-initializing firmware Raag Jadav
` (13 more replies)
0 siblings, 14 replies; 18+ messages in thread
From: Raag Jadav @ 2026-03-08 13:55 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
maarten, jani.nikula, lukasz.laguna, Raag Jadav
Here's my humble attempt at introducing PCIe Function Level Reset (FLR)
support in xe driver. This is ofcourse a half baked implementation and
only limited to re-initializing GT. This needs to be extended for a lot
of different components which I've skipped here for my lack of competence,
so feel free to join in and support them.
PS: All xe_exec_basic tests and clpeak run smoothly after FLR. Give it
a spin and let me know if any regressions.
Trigger it with:
$ echo 1 > /sys/bus/pci/devices/<BDF>/reset
v2: Re-initialize migrate context (Matthew Brost)
Add kernel doc (Matthew Brost)
Spell out Function Level Reset (Jani)
v3: Cancel in-flight jobs before FLR
Raag Jadav (10):
drm/xe/uc_fw: Allow re-initializing firmware
drm/xe/hw_fence: Synchronize fence irq before destroying the job
drm/xe/guc_submit: Support cancelling submission
drm/xe/gt: Introduce FLR helpers
drm/xe/irq: Introduce xe_irq_disable()
drm/xe: Introduce xe_device_assert_lmem_ready()
drm/xe/bo_evict: Introduce xe_bo_restore_map()
drm/xe/exec_queue: Introduce xe_exec_queue_reinit()
drm/xe/migrate: Introduce xe_migrate_reinit()
drm/xe/pci: Introduce PCIe FLR
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_bo_evict.c | 51 +++++++--
drivers/gpu/drm/xe/xe_bo_evict.h | 2 +
drivers/gpu/drm/xe/xe_device.c | 10 +-
drivers/gpu/drm/xe/xe_device.h | 1 +
drivers/gpu/drm/xe/xe_exec_queue.c | 34 +++++-
drivers/gpu/drm/xe/xe_exec_queue.h | 1 +
drivers/gpu/drm/xe/xe_gpu_scheduler.c | 11 ++
drivers/gpu/drm/xe/xe_gpu_scheduler.h | 1 +
drivers/gpu/drm/xe/xe_gsc.c | 14 +++
drivers/gpu/drm/xe/xe_gsc.h | 1 +
drivers/gpu/drm/xe/xe_gt.c | 32 ++++++
drivers/gpu/drm/xe/xe_gt.h | 2 +
drivers/gpu/drm/xe/xe_guc.c | 23 ++++
drivers/gpu/drm/xe/xe_guc.h | 2 +
drivers/gpu/drm/xe/xe_guc_submit.c | 24 +++++
drivers/gpu/drm/xe/xe_guc_submit.h | 1 +
drivers/gpu/drm/xe/xe_huc.c | 14 +++
drivers/gpu/drm/xe/xe_huc.h | 1 +
drivers/gpu/drm/xe/xe_hw_fence.c | 5 +
drivers/gpu/drm/xe/xe_hw_fence.h | 1 +
drivers/gpu/drm/xe/xe_irq.c | 13 ++-
drivers/gpu/drm/xe/xe_irq.h | 1 +
drivers/gpu/drm/xe/xe_lrc.c | 17 +++
drivers/gpu/drm/xe/xe_lrc.h | 2 +
drivers/gpu/drm/xe/xe_migrate.c | 12 +++
drivers/gpu/drm/xe/xe_migrate.h | 1 +
drivers/gpu/drm/xe/xe_pci.c | 1 +
drivers/gpu/drm/xe/xe_pci.h | 2 +
drivers/gpu/drm/xe/xe_pci_err.c | 150 ++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_sched_job.c | 1 +
drivers/gpu/drm/xe/xe_uc.c | 36 +++++++
drivers/gpu/drm/xe/xe_uc.h | 2 +
drivers/gpu/drm/xe/xe_uc_fw.c | 39 +++++--
drivers/gpu/drm/xe/xe_uc_fw.h | 1 +
35 files changed, 489 insertions(+), 21 deletions(-)
create mode 100644 drivers/gpu/drm/xe/xe_pci_err.c
--
2.43.0
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v3 01/10] drm/xe/uc_fw: Allow re-initializing firmware
2026-03-08 13:55 [PATCH v3 00/10] Introduce Xe PCIe FLR Raag Jadav
@ 2026-03-08 13:55 ` Raag Jadav
2026-03-08 13:55 ` [PATCH v3 02/10] drm/xe/hw_fence: Synchronize fence irq before destroying the job Raag Jadav
` (12 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Raag Jadav @ 2026-03-08 13:55 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
maarten, jani.nikula, lukasz.laguna, Raag Jadav
In preparation of usecases which require re-initializing firmware without
reloading the driver, introduce xe_uc_fw_reinit(). The uC firmware bo
already exists but since it's contents are on VRAM, they are lost on PCIe
FLR. Copy the firmware back to it's bo and mark it as loadable as part of
re-initialization.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v2: Add kernel doc (Matthew Brost)
---
drivers/gpu/drm/xe/xe_uc_fw.c | 39 +++++++++++++++++++++++++++++------
drivers/gpu/drm/xe/xe_uc_fw.h | 1 +
2 files changed, 34 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
index d35bc4989144..205bd05f684d 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.c
+++ b/drivers/gpu/drm/xe/xe_uc_fw.c
@@ -704,13 +704,7 @@ static int uc_fw_request(struct xe_uc_fw *uc_fw, const struct firmware **firmwar
const struct firmware *fw = NULL;
int err;
- /*
- * we use FIRMWARE_UNINITIALIZED to detect checks against uc_fw->status
- * before we're looked at the HW caps to see if we have uc support
- */
BUILD_BUG_ON(XE_UC_FIRMWARE_UNINITIALIZED);
- xe_gt_assert(gt, !uc_fw->status);
- xe_gt_assert(gt, !uc_fw->path);
uc_fw_auto_select(xe, uc_fw);
@@ -823,6 +817,14 @@ static int uc_fw_copy(struct xe_uc_fw *uc_fw, const void *data, size_t size, u32
return err;
}
+static void uc_fw_reinit(struct xe_uc_fw *uc_fw, const void *data)
+{
+ struct xe_device *xe = uc_fw_to_xe(uc_fw);
+
+ xe_map_memcpy_to(xe, &uc_fw->bo->vmap, 0, data, uc_fw->size);
+ xe_uc_fw_change_status(uc_fw, XE_UC_FIRMWARE_LOADABLE);
+}
+
int xe_uc_fw_init(struct xe_uc_fw *uc_fw)
{
const struct firmware *fw = NULL;
@@ -846,6 +848,31 @@ int xe_uc_fw_init(struct xe_uc_fw *uc_fw)
}
ALLOW_ERROR_INJECTION(xe_uc_fw_init, ERRNO); /* See xe_pci_probe() */
+/**
+ * xe_uc_fw_reinit() - Re-initialize uC firmware into its bo
+ * @uc_fw: uC firmware
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_uc_fw_reinit(struct xe_uc_fw *uc_fw)
+{
+ const struct firmware *fw = NULL;
+ int err;
+
+ err = uc_fw_request(uc_fw, &fw);
+ if (err)
+ return err;
+
+ /* no error and no firmware means nothing to copy */
+ if (!fw)
+ return 0;
+
+ uc_fw_reinit(uc_fw, fw->data);
+ uc_fw_release(fw);
+
+ return err;
+}
+
static u32 uc_fw_ggtt_offset(struct xe_uc_fw *uc_fw)
{
return xe_bo_ggtt_addr(uc_fw->bo);
diff --git a/drivers/gpu/drm/xe/xe_uc_fw.h b/drivers/gpu/drm/xe/xe_uc_fw.h
index 6195e353f269..a73935b976d5 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.h
+++ b/drivers/gpu/drm/xe/xe_uc_fw.h
@@ -15,6 +15,7 @@
struct drm_printer;
int xe_uc_fw_init(struct xe_uc_fw *uc_fw);
+int xe_uc_fw_reinit(struct xe_uc_fw *uc_fw);
size_t xe_uc_fw_copy_rsa(struct xe_uc_fw *uc_fw, void *dst, u32 max_len);
int xe_uc_fw_upload(struct xe_uc_fw *uc_fw, u32 offset, u32 dma_flags);
int xe_uc_fw_check_version_requirements(struct xe_uc_fw *uc_fw);
--
2.43.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v3 02/10] drm/xe/hw_fence: Synchronize fence irq before destroying the job
2026-03-08 13:55 [PATCH v3 00/10] Introduce Xe PCIe FLR Raag Jadav
2026-03-08 13:55 ` [PATCH v3 01/10] drm/xe/uc_fw: Allow re-initializing firmware Raag Jadav
@ 2026-03-08 13:55 ` Raag Jadav
2026-03-08 13:55 ` [PATCH v3 03/10] drm/xe/guc_submit: Support cancelling submission Raag Jadav
` (11 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Raag Jadav @ 2026-03-08 13:55 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
maarten, jani.nikula, lukasz.laguna, Raag Jadav
We may need to cancel and destroy jobs while they are in-flight.
Make sure the irq work is synchronized when we do it.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v3: Cancel in-flight jobs before FLR
---
drivers/gpu/drm/xe/xe_hw_fence.c | 5 +++++
drivers/gpu/drm/xe/xe_hw_fence.h | 1 +
drivers/gpu/drm/xe/xe_sched_job.c | 1 +
3 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_hw_fence.c b/drivers/gpu/drm/xe/xe_hw_fence.c
index ae8ed15b64c5..c4e2b8e2648f 100644
--- a/drivers/gpu/drm/xe/xe_hw_fence.c
+++ b/drivers/gpu/drm/xe/xe_hw_fence.c
@@ -106,6 +106,11 @@ void xe_hw_fence_irq_run(struct xe_hw_fence_irq *irq)
irq_work_queue(&irq->work);
}
+void xe_hw_fence_irq_sync(struct xe_hw_fence_irq *irq)
+{
+ irq_work_sync(&irq->work);
+}
+
void xe_hw_fence_ctx_init(struct xe_hw_fence_ctx *ctx, struct xe_gt *gt,
struct xe_hw_fence_irq *irq, const char *name)
{
diff --git a/drivers/gpu/drm/xe/xe_hw_fence.h b/drivers/gpu/drm/xe/xe_hw_fence.h
index 599492c13f80..7ad64a515ae3 100644
--- a/drivers/gpu/drm/xe/xe_hw_fence.h
+++ b/drivers/gpu/drm/xe/xe_hw_fence.h
@@ -17,6 +17,7 @@ void xe_hw_fence_module_exit(void);
void xe_hw_fence_irq_init(struct xe_hw_fence_irq *irq);
void xe_hw_fence_irq_finish(struct xe_hw_fence_irq *irq);
void xe_hw_fence_irq_run(struct xe_hw_fence_irq *irq);
+void xe_hw_fence_irq_sync(struct xe_hw_fence_irq *irq);
void xe_hw_fence_ctx_init(struct xe_hw_fence_ctx *ctx, struct xe_gt *gt,
struct xe_hw_fence_irq *irq, const char *name);
diff --git a/drivers/gpu/drm/xe/xe_sched_job.c b/drivers/gpu/drm/xe/xe_sched_job.c
index 3927666fe556..d5f3f90e9061 100644
--- a/drivers/gpu/drm/xe/xe_sched_job.c
+++ b/drivers/gpu/drm/xe/xe_sched_job.c
@@ -175,6 +175,7 @@ void xe_sched_job_destroy(struct kref *ref)
struct xe_device *xe = job_to_xe(job);
struct xe_exec_queue *q = job->q;
+ xe_hw_fence_irq_sync(job->q->fence_irq);
xe_sched_job_free_fences(job);
dma_fence_put(job->fence);
drm_sched_job_cleanup(&job->drm);
--
2.43.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v3 03/10] drm/xe/guc_submit: Support cancelling submission
2026-03-08 13:55 [PATCH v3 00/10] Introduce Xe PCIe FLR Raag Jadav
2026-03-08 13:55 ` [PATCH v3 01/10] drm/xe/uc_fw: Allow re-initializing firmware Raag Jadav
2026-03-08 13:55 ` [PATCH v3 02/10] drm/xe/hw_fence: Synchronize fence irq before destroying the job Raag Jadav
@ 2026-03-08 13:55 ` Raag Jadav
2026-03-13 15:37 ` Dong, Zhanjun
2026-03-08 13:55 ` [PATCH v3 04/10] drm/xe/gt: Introduce FLR helpers Raag Jadav
` (10 subsequent siblings)
13 siblings, 1 reply; 18+ messages in thread
From: Raag Jadav @ 2026-03-08 13:55 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
maarten, jani.nikula, lukasz.laguna, Raag Jadav
In preparation of usecases which require cancelling submission before
PCIe FLR, introduce xe_guc_submit_cancel() helper. This cancels and
frees any in-flight jobs on the scheduler.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v3: Cancel in-flight jobs before FLR
---
drivers/gpu/drm/xe/xe_gpu_scheduler.c | 11 +++++++++++
drivers/gpu/drm/xe/xe_gpu_scheduler.h | 1 +
drivers/gpu/drm/xe/xe_guc_submit.c | 24 ++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_guc_submit.h | 1 +
4 files changed, 37 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.c b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
index 9c8004d5dd91..c012dbe84540 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
@@ -90,6 +90,17 @@ void xe_sched_fini(struct xe_gpu_scheduler *sched)
drm_sched_fini(&sched->base);
}
+void xe_sched_submission_cancel(struct xe_gpu_scheduler *sched)
+{
+ struct drm_gpu_scheduler *base = &sched->base;
+ struct drm_sched_job *job, *tmp;
+
+ list_for_each_entry_safe_reverse(job, tmp, &base->pending_list, list) {
+ list_del(&job->list);
+ base->ops->free_job(job);
+ }
+}
+
void xe_sched_submission_start(struct xe_gpu_scheduler *sched)
{
drm_sched_wqueue_start(&sched->base);
diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.h b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
index 664c2db56af3..ba7892db8428 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler.h
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
@@ -19,6 +19,7 @@ int xe_sched_init(struct xe_gpu_scheduler *sched,
struct device *dev);
void xe_sched_fini(struct xe_gpu_scheduler *sched);
+void xe_sched_submission_cancel(struct xe_gpu_scheduler *sched);
void xe_sched_submission_start(struct xe_gpu_scheduler *sched);
void xe_sched_submission_stop(struct xe_gpu_scheduler *sched);
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index de716c1fb18e..cba544cc185c 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -2399,6 +2399,30 @@ void xe_guc_submit_stop(struct xe_guc *guc)
}
+/**
+ * xe_guc_submit_cancel - Cancel all runs of submission tasks on given GuC.
+ * @guc: the &xe_guc struct instance whose scheduler is to be cancelled
+ */
+void xe_guc_submit_cancel(struct xe_guc *guc)
+{
+ struct xe_exec_queue *q;
+ unsigned long index;
+
+ mutex_lock(&guc->submission_state.lock);
+
+ xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
+ struct xe_gpu_scheduler *sched = &q->guc->sched;
+
+ /* Prevent redundant attempts to cancel parallel queues */
+ if (q->guc->id != index)
+ continue;
+
+ xe_sched_submission_cancel(sched);
+ }
+
+ mutex_unlock(&guc->submission_state.lock);
+}
+
static void guc_exec_queue_revert_pending_state_change(struct xe_guc *guc,
struct xe_exec_queue *q)
{
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
index b3839a90c142..f361a6d32fd3 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.h
+++ b/drivers/gpu/drm/xe/xe_guc_submit.h
@@ -16,6 +16,7 @@ int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids);
int xe_guc_submit_enable(struct xe_guc *guc);
void xe_guc_submit_disable(struct xe_guc *guc);
+void xe_guc_submit_cancel(struct xe_guc *guc);
int xe_guc_submit_reset_prepare(struct xe_guc *guc);
void xe_guc_submit_reset_wait(struct xe_guc *guc);
void xe_guc_submit_stop(struct xe_guc *guc);
--
2.43.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v3 04/10] drm/xe/gt: Introduce FLR helpers
2026-03-08 13:55 [PATCH v3 00/10] Introduce Xe PCIe FLR Raag Jadav
` (2 preceding siblings ...)
2026-03-08 13:55 ` [PATCH v3 03/10] drm/xe/guc_submit: Support cancelling submission Raag Jadav
@ 2026-03-08 13:55 ` Raag Jadav
2026-03-08 13:55 ` [PATCH v3 05/10] drm/xe/irq: Introduce xe_irq_disable() Raag Jadav
` (9 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Raag Jadav @ 2026-03-08 13:55 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
maarten, jani.nikula, lukasz.laguna, Raag Jadav
In preparation of usecases which require preparing/re-initializing GT and
all its uCs before/after PCIe FLR, introduce flr_prepare/done() helpers.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v2: Add kernel doc (Matthew Brost)
---
drivers/gpu/drm/xe/xe_gsc.c | 14 ++++++++++++++
drivers/gpu/drm/xe/xe_gsc.h | 1 +
drivers/gpu/drm/xe/xe_gt.c | 22 ++++++++++++++++++++++
drivers/gpu/drm/xe/xe_gt.h | 2 ++
drivers/gpu/drm/xe/xe_guc.c | 23 +++++++++++++++++++++++
drivers/gpu/drm/xe/xe_guc.h | 2 ++
drivers/gpu/drm/xe/xe_huc.c | 14 ++++++++++++++
drivers/gpu/drm/xe/xe_huc.h | 1 +
drivers/gpu/drm/xe/xe_uc.c | 36 ++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_uc.h | 2 ++
10 files changed, 117 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_gsc.c b/drivers/gpu/drm/xe/xe_gsc.c
index e5c234f3d795..452976c7a8e5 100644
--- a/drivers/gpu/drm/xe/xe_gsc.c
+++ b/drivers/gpu/drm/xe/xe_gsc.c
@@ -552,6 +552,20 @@ void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc)
flush_work(&gsc->work);
}
+/**
+ * xe_gsc_flr_done() - Re-initialize GSC firmware after FLR
+ * @gsc: The GSC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_gsc_flr_done(struct xe_gsc *gsc)
+{
+ if (!xe_uc_fw_is_loadable(&gsc->fw))
+ return 0;
+
+ return xe_uc_fw_reinit(&gsc->fw);
+}
+
void xe_gsc_stop_prepare(struct xe_gsc *gsc)
{
struct xe_gt *gt = gsc_to_gt(gsc);
diff --git a/drivers/gpu/drm/xe/xe_gsc.h b/drivers/gpu/drm/xe/xe_gsc.h
index b8b8e0810ad9..8b7fd98f0be6 100644
--- a/drivers/gpu/drm/xe/xe_gsc.h
+++ b/drivers/gpu/drm/xe/xe_gsc.h
@@ -13,6 +13,7 @@ struct xe_gsc;
struct xe_gt;
struct xe_hw_engine;
+int xe_gsc_flr_done(struct xe_gsc *gsc);
int xe_gsc_init(struct xe_gsc *gsc);
int xe_gsc_init_post_hwconfig(struct xe_gsc *gsc);
void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc);
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index f3bb856aad2a..f39f70bd40e0 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -949,6 +949,28 @@ void xe_gt_reset_async(struct xe_gt *gt)
xe_pm_runtime_put(gt_to_xe(gt));
}
+/**
+ * xe_gt_flr_prepare() - Prepare GT for FLR
+ * @gt: the GT object
+ *
+ * Prepare all GT uCs for FLR.
+ */
+void xe_gt_flr_prepare(struct xe_gt *gt)
+{
+ xe_uc_flr_prepare(>->uc);
+}
+
+/**
+ * xe_gt_flr_done() - Re-initialize GT after FLR
+ * @gt: the GT object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_gt_flr_done(struct xe_gt *gt)
+{
+ return xe_uc_flr_done(>->uc);
+}
+
void xe_gt_suspend_prepare(struct xe_gt *gt)
{
CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
diff --git a/drivers/gpu/drm/xe/xe_gt.h b/drivers/gpu/drm/xe/xe_gt.h
index de7e47763411..5e6e4eb09efe 100644
--- a/drivers/gpu/drm/xe/xe_gt.h
+++ b/drivers/gpu/drm/xe/xe_gt.h
@@ -63,6 +63,8 @@ int xe_gt_record_default_lrcs(struct xe_gt *gt);
*/
void xe_gt_record_user_engines(struct xe_gt *gt);
+int xe_gt_flr_done(struct xe_gt *gt);
+void xe_gt_flr_prepare(struct xe_gt *gt);
void xe_gt_suspend_prepare(struct xe_gt *gt);
int xe_gt_suspend(struct xe_gt *gt);
void xe_gt_shutdown(struct xe_gt *gt);
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index e75653a5e797..768671dfa127 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -1656,6 +1656,29 @@ void xe_guc_sanitize(struct xe_guc *guc)
xe_guc_submit_disable(guc);
}
+/**
+ * xe_guc_cancel() - Cancel all GuC submissions
+ * @guc: The GuC object
+ */
+void xe_guc_cancel(struct xe_guc *guc)
+{
+ xe_guc_submit_cancel(guc);
+}
+
+/**
+ * xe_guc_flr_done() - Re-initialize GuC firmware after FLR
+ * @guc: The GuC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_guc_flr_done(struct xe_guc *guc)
+{
+ if (!xe_uc_fw_is_loadable(&guc->fw))
+ return 0;
+
+ return xe_uc_fw_reinit(&guc->fw);
+}
+
int xe_guc_reset_prepare(struct xe_guc *guc)
{
return xe_guc_submit_reset_prepare(guc);
diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
index 66e7edc70ed9..908009e608c9 100644
--- a/drivers/gpu/drm/xe/xe_guc.h
+++ b/drivers/gpu/drm/xe/xe_guc.h
@@ -31,7 +31,9 @@
struct drm_printer;
+void xe_guc_cancel(struct xe_guc *guc);
void xe_guc_comm_init_early(struct xe_guc *guc);
+int xe_guc_flr_done(struct xe_guc *guc);
int xe_guc_init_noalloc(struct xe_guc *guc);
int xe_guc_init(struct xe_guc *guc);
int xe_guc_init_post_hwconfig(struct xe_guc *guc);
diff --git a/drivers/gpu/drm/xe/xe_huc.c b/drivers/gpu/drm/xe/xe_huc.c
index 57afe21444b1..0e7d2ef86241 100644
--- a/drivers/gpu/drm/xe/xe_huc.c
+++ b/drivers/gpu/drm/xe/xe_huc.c
@@ -296,6 +296,20 @@ void xe_huc_sanitize(struct xe_huc *huc)
xe_uc_fw_sanitize(&huc->fw);
}
+/**
+ * xe_huc_flr_done() - Re-initialize HuC firmware after FLR
+ * @huc: The HuC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_huc_flr_done(struct xe_huc *huc)
+{
+ if (!xe_uc_fw_is_loadable(&huc->fw))
+ return 0;
+
+ return xe_uc_fw_reinit(&huc->fw);
+}
+
void xe_huc_print_info(struct xe_huc *huc, struct drm_printer *p)
{
struct xe_gt *gt = huc_to_gt(huc);
diff --git a/drivers/gpu/drm/xe/xe_huc.h b/drivers/gpu/drm/xe/xe_huc.h
index fa1c45e70443..7600ea196908 100644
--- a/drivers/gpu/drm/xe/xe_huc.h
+++ b/drivers/gpu/drm/xe/xe_huc.h
@@ -17,6 +17,7 @@ enum xe_huc_auth_types {
XE_HUC_AUTH_TYPES_COUNT
};
+int xe_huc_flr_done(struct xe_huc *huc);
int xe_huc_init(struct xe_huc *huc);
int xe_huc_init_post_hwconfig(struct xe_huc *huc);
int xe_huc_upload(struct xe_huc *huc);
diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
index d9aa845a308d..8d89f2038bb9 100644
--- a/drivers/gpu/drm/xe/xe_uc.c
+++ b/drivers/gpu/drm/xe/xe_uc.c
@@ -283,6 +283,42 @@ static void uc_reset_wait(struct xe_uc *uc)
goto again;
}
+/**
+ * xe_uc_flr_prepare() - Prepare uCs for FLR
+ * @uc: The uC object
+ *
+ * Flush pending work and stop all uCs.
+ */
+void xe_uc_flr_prepare(struct xe_uc *uc)
+{
+ xe_gsc_wait_for_worker_completion(&uc->gsc);
+ xe_uc_reset_prepare(uc);
+ xe_guc_cancel(&uc->guc);
+ xe_uc_stop(uc);
+ xe_uc_sanitize(uc);
+}
+
+/**
+ * xe_uc_flr_done() - Re-initialize uCs after FLR
+ * @uc: The uC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_uc_flr_done(struct xe_uc *uc)
+{
+ int ret;
+
+ ret = xe_guc_flr_done(&uc->guc);
+ if (ret)
+ return ret;
+
+ ret = xe_huc_flr_done(&uc->huc);
+ if (ret)
+ return ret;
+
+ return xe_gsc_flr_done(&uc->gsc);
+}
+
void xe_uc_suspend_prepare(struct xe_uc *uc)
{
xe_gsc_wait_for_worker_completion(&uc->gsc);
diff --git a/drivers/gpu/drm/xe/xe_uc.h b/drivers/gpu/drm/xe/xe_uc.h
index 255a54a8f876..1756821edea1 100644
--- a/drivers/gpu/drm/xe/xe_uc.h
+++ b/drivers/gpu/drm/xe/xe_uc.h
@@ -8,6 +8,8 @@
struct xe_uc;
+int xe_uc_flr_done(struct xe_uc *uc);
+void xe_uc_flr_prepare(struct xe_uc *uc);
int xe_uc_init_noalloc(struct xe_uc *uc);
int xe_uc_init(struct xe_uc *uc);
int xe_uc_init_post_hwconfig(struct xe_uc *uc);
--
2.43.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v3 05/10] drm/xe/irq: Introduce xe_irq_disable()
2026-03-08 13:55 [PATCH v3 00/10] Introduce Xe PCIe FLR Raag Jadav
` (3 preceding siblings ...)
2026-03-08 13:55 ` [PATCH v3 04/10] drm/xe/gt: Introduce FLR helpers Raag Jadav
@ 2026-03-08 13:55 ` Raag Jadav
2026-03-08 13:55 ` [PATCH v3 06/10] drm/xe: Introduce xe_device_assert_lmem_ready() Raag Jadav
` (8 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Raag Jadav @ 2026-03-08 13:55 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
maarten, jani.nikula, lukasz.laguna, Raag Jadav
In preparation of usecases which require disabling interrupts before
PCIe FLR, introduce xe_irq_disable() helper. With this we avoid any
side-effects of unwarranted irqs.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v2: Add kernel doc (Matthew Brost)
---
drivers/gpu/drm/xe/xe_irq.c | 13 ++++++++++++-
drivers/gpu/drm/xe/xe_irq.h | 1 +
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c
index 9e49e2241da4..e9f0b3cad06d 100644
--- a/drivers/gpu/drm/xe/xe_irq.c
+++ b/drivers/gpu/drm/xe/xe_irq.c
@@ -843,7 +843,13 @@ static void xe_irq_msi_synchronize_irq(struct xe_device *xe)
synchronize_irq(to_pci_dev(xe->drm.dev)->irq);
}
-void xe_irq_suspend(struct xe_device *xe)
+/**
+ * xe_irq_disable() - Disable irqs
+ * @xe: xe device instance
+ *
+ * Synchronize pending irqs and disable them.
+ */
+void xe_irq_disable(struct xe_device *xe)
{
atomic_set(&xe->irq.enabled, 0); /* no new irqs */
@@ -852,6 +858,11 @@ void xe_irq_suspend(struct xe_device *xe)
xe_irq_msix_synchronize_irq(xe);
else
xe_irq_msi_synchronize_irq(xe);
+}
+
+void xe_irq_suspend(struct xe_device *xe)
+{
+ xe_irq_disable(xe);
xe_irq_reset(xe); /* turn irqs off */
}
diff --git a/drivers/gpu/drm/xe/xe_irq.h b/drivers/gpu/drm/xe/xe_irq.h
index a28bd577ba52..abda0592a105 100644
--- a/drivers/gpu/drm/xe/xe_irq.h
+++ b/drivers/gpu/drm/xe/xe_irq.h
@@ -14,6 +14,7 @@ struct xe_device;
struct xe_tile;
struct xe_gt;
+void xe_irq_disable(struct xe_device *xe);
int xe_irq_init(struct xe_device *xe);
int xe_irq_install(struct xe_device *xe);
void xe_irq_suspend(struct xe_device *xe);
--
2.43.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v3 06/10] drm/xe: Introduce xe_device_assert_lmem_ready()
2026-03-08 13:55 [PATCH v3 00/10] Introduce Xe PCIe FLR Raag Jadav
` (4 preceding siblings ...)
2026-03-08 13:55 ` [PATCH v3 05/10] drm/xe/irq: Introduce xe_irq_disable() Raag Jadav
@ 2026-03-08 13:55 ` Raag Jadav
2026-03-08 13:55 ` [PATCH v3 07/10] drm/xe/bo_evict: Introduce xe_bo_restore_map() Raag Jadav
` (7 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Raag Jadav @ 2026-03-08 13:55 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
maarten, jani.nikula, lukasz.laguna, Raag Jadav
In preparation of usecases which require verifying LMEM readiness after
PCIe FLR, introduce xe_device_assert_lmem_ready() helper.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v2: Add kernel doc (Matthew Brost)
---
drivers/gpu/drm/xe/xe_device.c | 10 ++++++++--
drivers/gpu/drm/xe/xe_device.h | 1 +
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 31fb1d7afde5..eeb626737760 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -650,7 +650,13 @@ static int xe_set_dma_info(struct xe_device *xe)
return err;
}
-static void assert_lmem_ready(struct xe_device *xe)
+/**
+ * xe_device_assert_lmem_ready() - Verify LMEM readiness
+ * @xe: xe device instance
+ *
+ * Verify LMEM readiness and assert on failure.
+ */
+void xe_device_assert_lmem_ready(struct xe_device *xe)
{
if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
return;
@@ -738,7 +744,7 @@ int xe_device_probe_early(struct xe_device *xe)
* is flagged after full initialization is complete. Assert if lmem is
* not initialized.
*/
- assert_lmem_ready(xe);
+ xe_device_assert_lmem_ready(xe);
xe->wedged.mode = xe_device_validate_wedged_mode(xe, xe_modparam.wedged_mode) ?
XE_DEFAULT_WEDGED_MODE : xe_modparam.wedged_mode;
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 39464650533b..44db00d0ad55 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -140,6 +140,7 @@ static inline struct xe_force_wake *gt_to_fw(struct xe_gt *gt)
return >->pm.fw;
}
+void xe_device_assert_lmem_ready(struct xe_device *xe);
void xe_device_assert_mem_access(struct xe_device *xe);
static inline bool xe_device_has_flat_ccs(struct xe_device *xe)
--
2.43.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v3 07/10] drm/xe/bo_evict: Introduce xe_bo_restore_map()
2026-03-08 13:55 [PATCH v3 00/10] Introduce Xe PCIe FLR Raag Jadav
` (5 preceding siblings ...)
2026-03-08 13:55 ` [PATCH v3 06/10] drm/xe: Introduce xe_device_assert_lmem_ready() Raag Jadav
@ 2026-03-08 13:55 ` Raag Jadav
2026-03-08 13:55 ` [PATCH v3 08/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit() Raag Jadav
` (6 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Raag Jadav @ 2026-03-08 13:55 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
maarten, jani.nikula, lukasz.laguna, Raag Jadav
PCIe FLR clears all hardware state along with GGTT mappings of all
existing bos. Iterate over early and late kernel bo list and restore
their GGTT mappings in hardware, so that kernel can make use of them
during re-initialization after PCIe FLR.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v2: Add kernel doc (Matthew Brost)
---
drivers/gpu/drm/xe/xe_bo_evict.c | 51 +++++++++++++++++++++++++++-----
drivers/gpu/drm/xe/xe_bo_evict.h | 2 ++
2 files changed, 45 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bo_evict.c b/drivers/gpu/drm/xe/xe_bo_evict.c
index 7661fca7f278..6d7d6e67565e 100644
--- a/drivers/gpu/drm/xe/xe_bo_evict.c
+++ b/drivers/gpu/drm/xe/xe_bo_evict.c
@@ -189,14 +189,8 @@ int xe_bo_evict_all(struct xe_device *xe)
xe_bo_evict_pinned);
}
-static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
+static int xe_bo_map_ggtt(struct xe_bo *bo)
{
- int ret;
-
- ret = xe_bo_restore_pinned(bo);
- if (ret)
- return ret;
-
if (bo->flags & XE_BO_FLAG_GGTT) {
struct xe_tile *tile;
u8 id;
@@ -212,6 +206,41 @@ static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
return 0;
}
+/**
+ * xe_bo_restore_map() - Restore GGTT mappings of kernel bos
+ * @xe: xe device
+ *
+ * PCIe FLR clears all hardware state along with GGTT mappings of all
+ * existing bos. Iterate over early and late kernel bo list and restore
+ * their GGTT mappings in hardware, so that kernel can make use of them
+ * during re-initialization after PCIe FLR.
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_bo_restore_map(struct xe_device *xe)
+{
+ int ret;
+
+ ret = xe_bo_apply_to_pinned(xe, &xe->pinned.early.kernel_bo_present,
+ &xe->pinned.early.kernel_bo_present, xe_bo_map_ggtt);
+ if (!ret)
+ ret = xe_bo_apply_to_pinned(xe, &xe->pinned.late.kernel_bo_present,
+ &xe->pinned.late.kernel_bo_present, xe_bo_map_ggtt);
+
+ return ret;
+}
+
+static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
+{
+ int ret;
+
+ ret = xe_bo_restore_pinned(bo);
+ if (ret)
+ return ret;
+
+ return xe_bo_map_ggtt(bo);
+}
+
/**
* xe_bo_restore_early - restore early phase kernel BOs to VRAM
*
@@ -270,7 +299,13 @@ int xe_bo_restore_late(struct xe_device *xe)
return ret;
}
-static void xe_bo_pci_dev_remove_pinned(struct xe_device *xe)
+/**
+ * xe_bo_pci_dev_remove_pinned() - Unmap external bos
+ * @xe: xe device
+ *
+ * Drop dma mappings of all external pinned bos.
+ */
+void xe_bo_pci_dev_remove_pinned(struct xe_device *xe)
{
struct xe_tile *tile;
unsigned int id;
diff --git a/drivers/gpu/drm/xe/xe_bo_evict.h b/drivers/gpu/drm/xe/xe_bo_evict.h
index e8385cb7f5e9..d4f5b87243e7 100644
--- a/drivers/gpu/drm/xe/xe_bo_evict.h
+++ b/drivers/gpu/drm/xe/xe_bo_evict.h
@@ -14,7 +14,9 @@ int xe_bo_notifier_prepare_all_pinned(struct xe_device *xe);
void xe_bo_notifier_unprepare_all_pinned(struct xe_device *xe);
int xe_bo_restore_early(struct xe_device *xe);
int xe_bo_restore_late(struct xe_device *xe);
+int xe_bo_restore_map(struct xe_device *xe);
+void xe_bo_pci_dev_remove_pinned(struct xe_device *xe);
void xe_bo_pci_dev_remove_all(struct xe_device *xe);
int xe_bo_pinned_init(struct xe_device *xe);
--
2.43.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v3 08/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit()
2026-03-08 13:55 [PATCH v3 00/10] Introduce Xe PCIe FLR Raag Jadav
` (6 preceding siblings ...)
2026-03-08 13:55 ` [PATCH v3 07/10] drm/xe/bo_evict: Introduce xe_bo_restore_map() Raag Jadav
@ 2026-03-08 13:55 ` Raag Jadav
2026-03-08 13:55 ` [PATCH v3 09/10] drm/xe/migrate: Introduce xe_migrate_reinit() Raag Jadav
` (5 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Raag Jadav @ 2026-03-08 13:55 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
maarten, jani.nikula, lukasz.laguna, Raag Jadav
In preparation of usecases which require re-initializing an exec queue
after PCIe FLR, introduce xe_exec_queue_reinit() helper. All the exec
queue LCRs already exist but the context is lost on PCIe FLR and needs
re-initialization.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v2: Re-initialize migrate context (Matthew Brost)
---
drivers/gpu/drm/xe/xe_exec_queue.c | 34 ++++++++++++++++++++++++++----
drivers/gpu/drm/xe/xe_exec_queue.h | 1 +
drivers/gpu/drm/xe/xe_lrc.c | 17 +++++++++++++++
drivers/gpu/drm/xe/xe_lrc.h | 2 ++
4 files changed, 50 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 6166b1a81433..50fb94bc343b 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -331,9 +331,8 @@ static void __xe_exec_queue_fini(struct xe_exec_queue *q)
xe_lrc_put(q->lrc[i]);
}
-static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
+static u32 xe_lrc_init_flags(struct xe_exec_queue *q, u32 exec_queue_flags)
{
- int i, err;
u32 flags = 0;
/*
@@ -353,6 +352,13 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
if (!(exec_queue_flags & EXEC_QUEUE_FLAG_KERNEL))
flags |= XE_LRC_CREATE_USER_CTX;
+ return flags;
+}
+
+static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
+{
+ int i, err;
+
err = q->ops->init(q);
if (err)
return err;
@@ -376,8 +382,8 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
marker = xe_gt_sriov_vf_wait_valid_ggtt(q->gt);
- lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,
- xe_lrc_ring_size(), q->msix_vec, flags);
+ lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state, xe_lrc_ring_size(),
+ q->msix_vec, xe_lrc_init_flags(q, exec_queue_flags));
if (IS_ERR(lrc)) {
err = PTR_ERR(lrc);
goto err_lrc;
@@ -399,6 +405,26 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
return err;
}
+/**
+ * xe_exec_queue_reinit() - Re-initialize exec queue
+ * @q: exec queue to re-initialize
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_exec_queue_reinit(struct xe_exec_queue *q)
+{
+ int i, err;
+
+ for (i = 0; i < q->width; i++) {
+ err = xe_lrc_reinit(q->lrc[i], q->hwe, q->vm, q->replay_state,
+ q->msix_vec, xe_lrc_init_flags(q, q->flags));
+ if (err)
+ return err;
+ }
+
+ return 0;
+}
+
/**
* xe_exec_queue_create() - Create an exec queue
* @xe: Xe device
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
index a82d99bd77bc..445867d4da26 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue.h
@@ -34,6 +34,7 @@ struct xe_exec_queue *xe_exec_queue_create_bind(struct xe_device *xe,
void xe_exec_queue_fini(struct xe_exec_queue *q);
void xe_exec_queue_destroy(struct kref *ref);
void xe_exec_queue_assign_name(struct xe_exec_queue *q, u32 instance);
+int xe_exec_queue_reinit(struct xe_exec_queue *q);
static inline struct xe_exec_queue *
xe_exec_queue_get_unless_zero(struct xe_exec_queue *q)
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index ebab5d78f7cc..9c9746cd8906 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -1561,6 +1561,23 @@ static int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct
return err;
}
+/**
+ * xe_lrc_reinit() - Re-initialize LRC
+ * @lrc: Pointer to the LRC
+ * @hwe: Hardware Engine
+ * @vm: The VM (address space)
+ * @replay_state: GPU hang replay state
+ * @msix_vec: MSI-X interrupt vector (for platforms that support it)
+ * @init_flags: LRC initialization flags
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_lrc_reinit(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
+ void *replay_state, u16 msix_vec, u32 init_flags)
+{
+ return xe_lrc_ctx_init(lrc, hwe, vm, replay_state, msix_vec, init_flags);
+}
+
static int xe_lrc_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
void *replay_state, u32 ring_size, u16 msix_vec, u32 init_flags)
{
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index 48f7c26cf129..69ca51aa4807 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -52,6 +52,8 @@ struct xe_lrc_snapshot {
struct xe_lrc *xe_lrc_create(struct xe_hw_engine *hwe, struct xe_vm *vm,
void *replay_state, u32 ring_size, u16 msix_vec, u32 flags);
+int xe_lrc_reinit(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
+ void *replay_state, u16 msix_vec, u32 init_flags);
void xe_lrc_destroy(struct kref *ref);
/**
--
2.43.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v3 09/10] drm/xe/migrate: Introduce xe_migrate_reinit()
2026-03-08 13:55 [PATCH v3 00/10] Introduce Xe PCIe FLR Raag Jadav
` (7 preceding siblings ...)
2026-03-08 13:55 ` [PATCH v3 08/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit() Raag Jadav
@ 2026-03-08 13:55 ` Raag Jadav
2026-03-08 13:55 ` [PATCH v3 10/10] drm/xe/pci: Introduce PCIe FLR Raag Jadav
` (4 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Raag Jadav @ 2026-03-08 13:55 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
maarten, jani.nikula, lukasz.laguna, Raag Jadav
In preparation of usecases which require re-initializing migrate context
after PCIe FLR, introduce xe_migrate_reinit() helper. Migrate exec queue
and pt_bo already exist in migrate structure but since their contents live
on VRAM, they are lost on PCIe FLR and need re-initialization.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
v2: Re-initialize migrate context (Matthew Brost)
---
drivers/gpu/drm/xe/xe_gt.c | 10 ++++++++++
drivers/gpu/drm/xe/xe_migrate.c | 12 ++++++++++++
drivers/gpu/drm/xe/xe_migrate.h | 1 +
3 files changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index f39f70bd40e0..fea4bebb8285 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -968,6 +968,16 @@ void xe_gt_flr_prepare(struct xe_gt *gt)
*/
int xe_gt_flr_done(struct xe_gt *gt)
{
+ int err;
+
+ if (xe_gt_is_main_type(gt)) {
+ struct xe_tile *tile = gt_to_tile(gt);
+
+ err = xe_migrate_reinit(tile->migrate);
+ if (err)
+ return err;
+ }
+
return xe_uc_flr_done(>->uc);
}
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 283d55fef6b8..f4a2ad3ce601 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -452,6 +452,18 @@ static int xe_migrate_lock_prepare_vm(struct xe_tile *tile, struct xe_migrate *m
return err;
}
+/**
+ * xe_migrate_reinit() - Re-initialize a migrate context
+ * @m: The migration context
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_migrate_reinit(struct xe_migrate *m)
+{
+ xe_migrate_prepare_vm(m->tile, m, m->q->vm, NULL);
+ return xe_exec_queue_reinit(m->q);
+}
+
/**
* xe_migrate_init() - Initialize a migrate context
* @m: The migration context
diff --git a/drivers/gpu/drm/xe/xe_migrate.h b/drivers/gpu/drm/xe/xe_migrate.h
index 1522afb37dcf..fffbcab8b2e3 100644
--- a/drivers/gpu/drm/xe/xe_migrate.h
+++ b/drivers/gpu/drm/xe/xe_migrate.h
@@ -112,6 +112,7 @@ struct xe_migrate_pt_update {
struct xe_migrate *xe_migrate_alloc(struct xe_tile *tile);
int xe_migrate_init(struct xe_migrate *m);
+int xe_migrate_reinit(struct xe_migrate *m);
struct dma_fence *xe_migrate_to_vram(struct xe_migrate *m,
unsigned long npages,
--
2.43.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v3 10/10] drm/xe/pci: Introduce PCIe FLR
2026-03-08 13:55 [PATCH v3 00/10] Introduce Xe PCIe FLR Raag Jadav
` (8 preceding siblings ...)
2026-03-08 13:55 ` [PATCH v3 09/10] drm/xe/migrate: Introduce xe_migrate_reinit() Raag Jadav
@ 2026-03-08 13:55 ` Raag Jadav
2026-03-08 14:08 ` ✗ CI.checkpatch: warning for Introduce Xe PCIe FLR (rev3) Patchwork
` (3 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Raag Jadav @ 2026-03-08 13:55 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
maarten, jani.nikula, lukasz.laguna, Raag Jadav
With bare minimum pieces in place, we can finally introduce PCIe Function
Level Reset (FLR) handling which re-initializes hardware state without the
need for reloading the driver from userspace. All VRAM contents are lost
along with hardware state and driver takes care of recreating the required
kernel bos as part of re-initialization, but user still needs to recreate
user bos and reload context after PCIe FLR.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v2: Spell out Function Level Reset (Jani)
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_pci.c | 1 +
drivers/gpu/drm/xe/xe_pci.h | 2 +
drivers/gpu/drm/xe/xe_pci_err.c | 150 ++++++++++++++++++++++++++++++++
4 files changed, 154 insertions(+)
create mode 100644 drivers/gpu/drm/xe/xe_pci_err.c
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index f1b6365c7aac..9811cf732260 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -100,6 +100,7 @@ xe-y += xe_bb.o \
xe_page_reclaim.o \
xe_pat.o \
xe_pci.o \
+ xe_pci_err.o \
xe_pci_rebar.o \
xe_pcode.o \
xe_pm.o \
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 9131ca03efb2..459eec7028af 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -1326,6 +1326,7 @@ static struct pci_driver xe_pci_driver = {
#ifdef CONFIG_PM_SLEEP
.driver.pm = &xe_pm_ops,
#endif
+ .err_handler = &xe_pci_err_handlers,
};
/**
diff --git a/drivers/gpu/drm/xe/xe_pci.h b/drivers/gpu/drm/xe/xe_pci.h
index 11bcc5fe2c5b..85e85e8508c3 100644
--- a/drivers/gpu/drm/xe/xe_pci.h
+++ b/drivers/gpu/drm/xe/xe_pci.h
@@ -8,6 +8,8 @@
struct pci_dev;
+extern const struct pci_error_handlers xe_pci_err_handlers;
+
int xe_register_pci_driver(void);
void xe_unregister_pci_driver(void);
struct xe_device *xe_pci_to_pf_device(struct pci_dev *pdev);
diff --git a/drivers/gpu/drm/xe/xe_pci_err.c b/drivers/gpu/drm/xe/xe_pci_err.c
new file mode 100644
index 000000000000..97b93393cef4
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_pci_err.c
@@ -0,0 +1,150 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include "xe_bo_evict.h"
+#include "xe_device.h"
+#include "xe_gt.h"
+#include "xe_gt_idle.h"
+#include "xe_i2c.h"
+#include "xe_irq.h"
+#include "xe_late_bind_fw.h"
+#include "xe_pci.h"
+#include "xe_pcode.h"
+#include "xe_printk.h"
+#include "xe_pxp.h"
+#include "xe_wa.h"
+
+static int xe_flr_prepare(struct xe_device *xe)
+{
+ struct xe_gt *gt;
+ int err;
+ u8 id;
+
+ err = xe_pxp_pm_suspend(xe->pxp);
+ if (err)
+ return err;
+
+ xe_late_bind_wait_for_worker_completion(&xe->late_bind);
+
+ xe_irq_disable(xe);
+
+ for_each_gt(gt, xe, id)
+ xe_gt_flr_prepare(gt);
+
+ // TODO: Drop all user bos
+ xe_bo_pci_dev_remove_pinned(xe);
+
+ return 0;
+}
+
+static int xe_flr_done(struct xe_device *xe)
+{
+ struct xe_tile *tile;
+ struct xe_gt *gt;
+ int err;
+ u8 id;
+
+ for_each_gt(gt, xe, id)
+ xe_gt_idle_disable_c6(gt);
+
+ for_each_tile(tile, xe, id)
+ xe_wa_apply_tile_workarounds(tile);
+
+ err = xe_pcode_ready(xe, true);
+ if (err)
+ return err;
+
+ xe_device_assert_lmem_ready(xe);
+
+ err = xe_bo_restore_map(xe);
+ if (err)
+ return err;
+
+ for_each_gt(gt, xe, id) {
+ err = xe_gt_flr_done(gt);
+ if (err)
+ return err;
+ }
+
+ xe_i2c_pm_resume(xe, true);
+
+ xe_irq_resume(xe);
+
+ for_each_gt(gt, xe, id) {
+ err = xe_gt_resume(gt);
+ if (err)
+ return err;
+ }
+
+ xe_pxp_pm_resume(xe->pxp);
+
+ xe_late_bind_fw_load(&xe->late_bind);
+
+ return 0;
+}
+
+static void xe_pci_reset_prepare(struct pci_dev *pdev)
+{
+ struct xe_device *xe = pdev_to_xe_device(pdev);
+
+ /* TODO: Extend support as a follow-up */
+ if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || pci_num_vf(pdev) || xe->info.probe_display) {
+ xe_err(xe, "PCIe FLR not supported\n");
+ return;
+ }
+
+ /* Wedge the device to prevent userspace access but don't send the event yet */
+ atomic_set(&xe->wedged.flag, 1);
+
+ /*
+ * The hardware could be in corrupted state and access unreliable, but we try to
+ * update data structures and cleanup any pending work to avoid side effects during
+ * PCIe FLR. This will be similar to xe_pm_suspend() flow but without migration.
+ */
+ if (xe_flr_prepare(xe)) {
+ xe_err(xe, "Failed to prepare for PCIe FLR\n");
+ return;
+ }
+
+ xe_info(xe, "Prepared for PCIe FLR\n");
+}
+
+static void xe_pci_reset_done(struct pci_dev *pdev)
+{
+ struct xe_device *xe = pdev_to_xe_device(pdev);
+
+ /* TODO: Extend support as a follow-up */
+ if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || pci_num_vf(pdev) || xe->info.probe_display)
+ return;
+
+ if (!xe_device_wedged(xe)) {
+ xe_err(xe, "Device in unexpected state, re-initialization aborted\n");
+ return;
+ }
+
+ /*
+ * We already have the data structures intact, so try to re-initialize the device.
+ * This will be similar to xe_pm_resume() flow, except we'll also need to recreate
+ * all VRAM contents.
+ */
+ if (xe_flr_done(xe)) {
+ xe_err(xe, "Re-initialization failed\n");
+ return;
+ }
+
+ /* Unwedge to allow userspace access */
+ atomic_set(&xe->wedged.flag, 0);
+
+ xe_info(xe, "Re-initialization success\n");
+}
+
+/*
+ * PCIe Function Level Reset (FLR) support only.
+ * TODO: Add PCIe error handlers using similar flow.
+ */
+const struct pci_error_handlers xe_pci_err_handlers = {
+ .reset_prepare = xe_pci_reset_prepare,
+ .reset_done = xe_pci_reset_done,
+};
--
2.43.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* ✗ CI.checkpatch: warning for Introduce Xe PCIe FLR (rev3)
2026-03-08 13:55 [PATCH v3 00/10] Introduce Xe PCIe FLR Raag Jadav
` (9 preceding siblings ...)
2026-03-08 13:55 ` [PATCH v3 10/10] drm/xe/pci: Introduce PCIe FLR Raag Jadav
@ 2026-03-08 14:08 ` Patchwork
2026-03-08 14:09 ` ✓ CI.KUnit: success " Patchwork
` (2 subsequent siblings)
13 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-03-08 14:08 UTC (permalink / raw)
To: Raag Jadav; +Cc: intel-xe
== Series Details ==
Series: Introduce Xe PCIe FLR (rev3)
URL : https://patchwork.freedesktop.org/series/162055/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 7e2d365cc7379c0e2ba86270ac3d47470ef8eb0d
Author: Raag Jadav <raag.jadav@intel.com>
Date: Sun Mar 8 19:25:36 2026 +0530
drm/xe/pci: Introduce PCIe FLR
With bare minimum pieces in place, we can finally introduce PCIe Function
Level Reset (FLR) handling which re-initializes hardware state without the
need for reloading the driver from userspace. All VRAM contents are lost
along with hardware state and driver takes care of recreating the required
kernel bos as part of re-initialization, but user still needs to recreate
user bos and reload context after PCIe FLR.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
+ /mt/dim checkpatch f705e865254996e9a099a22a9320e523e6debdcf drm-intel
f613800765cb drm/xe/uc_fw: Allow re-initializing firmware
89596c7721a6 drm/xe/hw_fence: Synchronize fence irq before destroying the job
5a058c0c7c7a drm/xe/guc_submit: Support cancelling submission
1accf38f0aa8 drm/xe/gt: Introduce FLR helpers
866453225717 drm/xe/irq: Introduce xe_irq_disable()
e684a27f14d0 drm/xe: Introduce xe_device_assert_lmem_ready()
41e82992cdeb drm/xe/bo_evict: Introduce xe_bo_restore_map()
7619eaee6986 drm/xe/exec_queue: Introduce xe_exec_queue_reinit()
48909390988d drm/xe/migrate: Introduce xe_migrate_reinit()
7e2d365cc737 drm/xe/pci: Introduce PCIe FLR
-:53: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#53:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 172 lines checked
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✓ CI.KUnit: success for Introduce Xe PCIe FLR (rev3)
2026-03-08 13:55 [PATCH v3 00/10] Introduce Xe PCIe FLR Raag Jadav
` (10 preceding siblings ...)
2026-03-08 14:08 ` ✗ CI.checkpatch: warning for Introduce Xe PCIe FLR (rev3) Patchwork
@ 2026-03-08 14:09 ` Patchwork
2026-03-08 14:50 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-08 15:49 ` ✓ Xe.CI.FULL: " Patchwork
13 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-03-08 14:09 UTC (permalink / raw)
To: Raag Jadav; +Cc: intel-xe
== Series Details ==
Series: Introduce Xe PCIe FLR (rev3)
URL : https://patchwork.freedesktop.org/series/162055/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[14:08:20] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:08:24] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:08:55] Starting KUnit Kernel (1/1)...
[14:08:55] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:08:55] ================== guc_buf (11 subtests) ===================
[14:08:55] [PASSED] test_smallest
[14:08:55] [PASSED] test_largest
[14:08:55] [PASSED] test_granular
[14:08:55] [PASSED] test_unique
[14:08:55] [PASSED] test_overlap
[14:08:55] [PASSED] test_reusable
[14:08:55] [PASSED] test_too_big
[14:08:55] [PASSED] test_flush
[14:08:55] [PASSED] test_lookup
[14:08:55] [PASSED] test_data
[14:08:55] [PASSED] test_class
[14:08:55] ===================== [PASSED] guc_buf =====================
[14:08:55] =================== guc_dbm (7 subtests) ===================
[14:08:55] [PASSED] test_empty
[14:08:55] [PASSED] test_default
[14:08:55] ======================== test_size ========================
[14:08:55] [PASSED] 4
[14:08:55] [PASSED] 8
[14:08:55] [PASSED] 32
[14:08:55] [PASSED] 256
[14:08:55] ==================== [PASSED] test_size ====================
[14:08:55] ======================= test_reuse ========================
[14:08:55] [PASSED] 4
[14:08:55] [PASSED] 8
[14:08:55] [PASSED] 32
[14:08:55] [PASSED] 256
[14:08:55] =================== [PASSED] test_reuse ====================
[14:08:55] =================== test_range_overlap ====================
[14:08:55] [PASSED] 4
[14:08:55] [PASSED] 8
[14:08:55] [PASSED] 32
[14:08:55] [PASSED] 256
[14:08:55] =============== [PASSED] test_range_overlap ================
[14:08:55] =================== test_range_compact ====================
[14:08:55] [PASSED] 4
[14:08:55] [PASSED] 8
[14:08:55] [PASSED] 32
[14:08:55] [PASSED] 256
[14:08:55] =============== [PASSED] test_range_compact ================
[14:08:55] ==================== test_range_spare =====================
[14:08:55] [PASSED] 4
[14:08:55] [PASSED] 8
[14:08:55] [PASSED] 32
[14:08:55] [PASSED] 256
[14:08:55] ================ [PASSED] test_range_spare =================
[14:08:55] ===================== [PASSED] guc_dbm =====================
[14:08:55] =================== guc_idm (6 subtests) ===================
[14:08:55] [PASSED] bad_init
[14:08:55] [PASSED] no_init
[14:08:55] [PASSED] init_fini
[14:08:55] [PASSED] check_used
[14:08:55] [PASSED] check_quota
[14:08:55] [PASSED] check_all
[14:08:55] ===================== [PASSED] guc_idm =====================
[14:08:55] ================== no_relay (3 subtests) ===================
[14:08:55] [PASSED] xe_drops_guc2pf_if_not_ready
[14:08:55] [PASSED] xe_drops_guc2vf_if_not_ready
[14:08:55] [PASSED] xe_rejects_send_if_not_ready
[14:08:55] ==================== [PASSED] no_relay =====================
[14:08:55] ================== pf_relay (14 subtests) ==================
[14:08:55] [PASSED] pf_rejects_guc2pf_too_short
[14:08:55] [PASSED] pf_rejects_guc2pf_too_long
[14:08:55] [PASSED] pf_rejects_guc2pf_no_payload
[14:08:55] [PASSED] pf_fails_no_payload
[14:08:55] [PASSED] pf_fails_bad_origin
[14:08:55] [PASSED] pf_fails_bad_type
[14:08:55] [PASSED] pf_txn_reports_error
[14:08:55] [PASSED] pf_txn_sends_pf2guc
[14:08:55] [PASSED] pf_sends_pf2guc
[14:08:55] [SKIPPED] pf_loopback_nop
[14:08:55] [SKIPPED] pf_loopback_echo
[14:08:55] [SKIPPED] pf_loopback_fail
[14:08:55] [SKIPPED] pf_loopback_busy
[14:08:55] [SKIPPED] pf_loopback_retry
[14:08:55] ==================== [PASSED] pf_relay =====================
[14:08:55] ================== vf_relay (3 subtests) ===================
[14:08:55] [PASSED] vf_rejects_guc2vf_too_short
[14:08:55] [PASSED] vf_rejects_guc2vf_too_long
[14:08:55] [PASSED] vf_rejects_guc2vf_no_payload
[14:08:55] ==================== [PASSED] vf_relay =====================
[14:08:55] ================ pf_gt_config (9 subtests) =================
[14:08:55] [PASSED] fair_contexts_1vf
[14:08:55] [PASSED] fair_doorbells_1vf
[14:08:55] [PASSED] fair_ggtt_1vf
[14:08:55] ====================== fair_vram_1vf ======================
[14:08:55] [PASSED] 3.50 GiB
[14:08:55] [PASSED] 11.5 GiB
[14:08:55] [PASSED] 15.5 GiB
[14:08:55] [PASSED] 31.5 GiB
[14:08:55] [PASSED] 63.5 GiB
[14:08:55] [PASSED] 1.91 GiB
[14:08:55] ================== [PASSED] fair_vram_1vf ==================
[14:08:55] ================ fair_vram_1vf_admin_only =================
[14:08:55] [PASSED] 3.50 GiB
[14:08:55] [PASSED] 11.5 GiB
[14:08:55] [PASSED] 15.5 GiB
[14:08:55] [PASSED] 31.5 GiB
[14:08:55] [PASSED] 63.5 GiB
[14:08:55] [PASSED] 1.91 GiB
[14:08:55] ============ [PASSED] fair_vram_1vf_admin_only =============
[14:08:55] ====================== fair_contexts ======================
[14:08:55] [PASSED] 1 VF
[14:08:55] [PASSED] 2 VFs
[14:08:55] [PASSED] 3 VFs
[14:08:55] [PASSED] 4 VFs
[14:08:55] [PASSED] 5 VFs
[14:08:55] [PASSED] 6 VFs
[14:08:55] [PASSED] 7 VFs
[14:08:55] [PASSED] 8 VFs
[14:08:55] [PASSED] 9 VFs
[14:08:55] [PASSED] 10 VFs
[14:08:55] [PASSED] 11 VFs
[14:08:55] [PASSED] 12 VFs
[14:08:55] [PASSED] 13 VFs
[14:08:55] [PASSED] 14 VFs
[14:08:55] [PASSED] 15 VFs
[14:08:55] [PASSED] 16 VFs
[14:08:55] [PASSED] 17 VFs
[14:08:55] [PASSED] 18 VFs
[14:08:55] [PASSED] 19 VFs
[14:08:55] [PASSED] 20 VFs
[14:08:55] [PASSED] 21 VFs
[14:08:55] [PASSED] 22 VFs
[14:08:55] [PASSED] 23 VFs
[14:08:55] [PASSED] 24 VFs
[14:08:55] [PASSED] 25 VFs
[14:08:55] [PASSED] 26 VFs
[14:08:55] [PASSED] 27 VFs
[14:08:55] [PASSED] 28 VFs
[14:08:55] [PASSED] 29 VFs
[14:08:55] [PASSED] 30 VFs
[14:08:55] [PASSED] 31 VFs
[14:08:55] [PASSED] 32 VFs
[14:08:55] [PASSED] 33 VFs
[14:08:55] [PASSED] 34 VFs
[14:08:55] [PASSED] 35 VFs
[14:08:55] [PASSED] 36 VFs
[14:08:55] [PASSED] 37 VFs
[14:08:55] [PASSED] 38 VFs
[14:08:55] [PASSED] 39 VFs
[14:08:55] [PASSED] 40 VFs
[14:08:55] [PASSED] 41 VFs
[14:08:55] [PASSED] 42 VFs
[14:08:55] [PASSED] 43 VFs
[14:08:55] [PASSED] 44 VFs
[14:08:55] [PASSED] 45 VFs
[14:08:55] [PASSED] 46 VFs
[14:08:55] [PASSED] 47 VFs
[14:08:55] [PASSED] 48 VFs
[14:08:55] [PASSED] 49 VFs
[14:08:55] [PASSED] 50 VFs
[14:08:55] [PASSED] 51 VFs
[14:08:55] [PASSED] 52 VFs
[14:08:55] [PASSED] 53 VFs
[14:08:55] [PASSED] 54 VFs
[14:08:55] [PASSED] 55 VFs
[14:08:55] [PASSED] 56 VFs
[14:08:55] [PASSED] 57 VFs
[14:08:55] [PASSED] 58 VFs
[14:08:55] [PASSED] 59 VFs
[14:08:55] [PASSED] 60 VFs
[14:08:55] [PASSED] 61 VFs
[14:08:55] [PASSED] 62 VFs
[14:08:55] [PASSED] 63 VFs
[14:08:55] ================== [PASSED] fair_contexts ==================
[14:08:55] ===================== fair_doorbells ======================
[14:08:55] [PASSED] 1 VF
[14:08:55] [PASSED] 2 VFs
[14:08:55] [PASSED] 3 VFs
[14:08:55] [PASSED] 4 VFs
[14:08:55] [PASSED] 5 VFs
[14:08:55] [PASSED] 6 VFs
[14:08:55] [PASSED] 7 VFs
[14:08:55] [PASSED] 8 VFs
[14:08:55] [PASSED] 9 VFs
[14:08:55] [PASSED] 10 VFs
[14:08:55] [PASSED] 11 VFs
[14:08:55] [PASSED] 12 VFs
[14:08:55] [PASSED] 13 VFs
[14:08:55] [PASSED] 14 VFs
[14:08:55] [PASSED] 15 VFs
[14:08:55] [PASSED] 16 VFs
[14:08:55] [PASSED] 17 VFs
[14:08:55] [PASSED] 18 VFs
[14:08:55] [PASSED] 19 VFs
[14:08:55] [PASSED] 20 VFs
[14:08:55] [PASSED] 21 VFs
[14:08:55] [PASSED] 22 VFs
[14:08:55] [PASSED] 23 VFs
[14:08:55] [PASSED] 24 VFs
[14:08:55] [PASSED] 25 VFs
[14:08:55] [PASSED] 26 VFs
[14:08:55] [PASSED] 27 VFs
[14:08:55] [PASSED] 28 VFs
[14:08:55] [PASSED] 29 VFs
[14:08:55] [PASSED] 30 VFs
[14:08:55] [PASSED] 31 VFs
[14:08:55] [PASSED] 32 VFs
[14:08:55] [PASSED] 33 VFs
[14:08:55] [PASSED] 34 VFs
[14:08:55] [PASSED] 35 VFs
[14:08:55] [PASSED] 36 VFs
[14:08:55] [PASSED] 37 VFs
[14:08:55] [PASSED] 38 VFs
[14:08:55] [PASSED] 39 VFs
[14:08:55] [PASSED] 40 VFs
[14:08:55] [PASSED] 41 VFs
[14:08:55] [PASSED] 42 VFs
[14:08:55] [PASSED] 43 VFs
[14:08:55] [PASSED] 44 VFs
[14:08:55] [PASSED] 45 VFs
[14:08:55] [PASSED] 46 VFs
[14:08:55] [PASSED] 47 VFs
[14:08:55] [PASSED] 48 VFs
[14:08:55] [PASSED] 49 VFs
[14:08:55] [PASSED] 50 VFs
[14:08:55] [PASSED] 51 VFs
[14:08:55] [PASSED] 52 VFs
[14:08:55] [PASSED] 53 VFs
[14:08:55] [PASSED] 54 VFs
[14:08:55] [PASSED] 55 VFs
[14:08:55] [PASSED] 56 VFs
[14:08:55] [PASSED] 57 VFs
[14:08:55] [PASSED] 58 VFs
[14:08:55] [PASSED] 59 VFs
[14:08:55] [PASSED] 60 VFs
[14:08:55] [PASSED] 61 VFs
[14:08:55] [PASSED] 62 VFs
[14:08:55] [PASSED] 63 VFs
[14:08:55] ================= [PASSED] fair_doorbells ==================
[14:08:55] ======================== fair_ggtt ========================
[14:08:55] [PASSED] 1 VF
[14:08:55] [PASSED] 2 VFs
[14:08:55] [PASSED] 3 VFs
[14:08:55] [PASSED] 4 VFs
[14:08:55] [PASSED] 5 VFs
[14:08:55] [PASSED] 6 VFs
[14:08:55] [PASSED] 7 VFs
[14:08:55] [PASSED] 8 VFs
[14:08:55] [PASSED] 9 VFs
[14:08:55] [PASSED] 10 VFs
[14:08:55] [PASSED] 11 VFs
[14:08:55] [PASSED] 12 VFs
[14:08:55] [PASSED] 13 VFs
[14:08:55] [PASSED] 14 VFs
[14:08:55] [PASSED] 15 VFs
[14:08:55] [PASSED] 16 VFs
[14:08:55] [PASSED] 17 VFs
[14:08:55] [PASSED] 18 VFs
[14:08:55] [PASSED] 19 VFs
[14:08:55] [PASSED] 20 VFs
[14:08:55] [PASSED] 21 VFs
[14:08:55] [PASSED] 22 VFs
[14:08:55] [PASSED] 23 VFs
[14:08:55] [PASSED] 24 VFs
[14:08:55] [PASSED] 25 VFs
[14:08:55] [PASSED] 26 VFs
[14:08:55] [PASSED] 27 VFs
[14:08:55] [PASSED] 28 VFs
[14:08:55] [PASSED] 29 VFs
[14:08:55] [PASSED] 30 VFs
[14:08:55] [PASSED] 31 VFs
[14:08:55] [PASSED] 32 VFs
[14:08:55] [PASSED] 33 VFs
[14:08:55] [PASSED] 34 VFs
[14:08:55] [PASSED] 35 VFs
[14:08:55] [PASSED] 36 VFs
[14:08:55] [PASSED] 37 VFs
[14:08:55] [PASSED] 38 VFs
[14:08:55] [PASSED] 39 VFs
[14:08:55] [PASSED] 40 VFs
[14:08:55] [PASSED] 41 VFs
[14:08:55] [PASSED] 42 VFs
[14:08:55] [PASSED] 43 VFs
[14:08:55] [PASSED] 44 VFs
[14:08:55] [PASSED] 45 VFs
[14:08:55] [PASSED] 46 VFs
[14:08:55] [PASSED] 47 VFs
[14:08:55] [PASSED] 48 VFs
[14:08:55] [PASSED] 49 VFs
[14:08:55] [PASSED] 50 VFs
[14:08:55] [PASSED] 51 VFs
[14:08:55] [PASSED] 52 VFs
[14:08:55] [PASSED] 53 VFs
[14:08:55] [PASSED] 54 VFs
[14:08:55] [PASSED] 55 VFs
[14:08:55] [PASSED] 56 VFs
[14:08:55] [PASSED] 57 VFs
[14:08:55] [PASSED] 58 VFs
[14:08:55] [PASSED] 59 VFs
[14:08:55] [PASSED] 60 VFs
[14:08:55] [PASSED] 61 VFs
[14:08:55] [PASSED] 62 VFs
[14:08:55] [PASSED] 63 VFs
[14:08:55] ==================== [PASSED] fair_ggtt ====================
[14:08:55] ======================== fair_vram ========================
[14:08:55] [PASSED] 1 VF
[14:08:55] [PASSED] 2 VFs
[14:08:55] [PASSED] 3 VFs
[14:08:55] [PASSED] 4 VFs
[14:08:55] [PASSED] 5 VFs
[14:08:55] [PASSED] 6 VFs
[14:08:55] [PASSED] 7 VFs
[14:08:55] [PASSED] 8 VFs
[14:08:55] [PASSED] 9 VFs
[14:08:55] [PASSED] 10 VFs
[14:08:55] [PASSED] 11 VFs
[14:08:55] [PASSED] 12 VFs
[14:08:55] [PASSED] 13 VFs
[14:08:55] [PASSED] 14 VFs
[14:08:55] [PASSED] 15 VFs
[14:08:55] [PASSED] 16 VFs
[14:08:55] [PASSED] 17 VFs
[14:08:55] [PASSED] 18 VFs
[14:08:55] [PASSED] 19 VFs
[14:08:55] [PASSED] 20 VFs
[14:08:55] [PASSED] 21 VFs
[14:08:55] [PASSED] 22 VFs
[14:08:55] [PASSED] 23 VFs
[14:08:55] [PASSED] 24 VFs
[14:08:55] [PASSED] 25 VFs
[14:08:55] [PASSED] 26 VFs
[14:08:55] [PASSED] 27 VFs
[14:08:55] [PASSED] 28 VFs
[14:08:55] [PASSED] 29 VFs
[14:08:55] [PASSED] 30 VFs
[14:08:55] [PASSED] 31 VFs
[14:08:55] [PASSED] 32 VFs
[14:08:55] [PASSED] 33 VFs
[14:08:55] [PASSED] 34 VFs
[14:08:55] [PASSED] 35 VFs
[14:08:55] [PASSED] 36 VFs
[14:08:55] [PASSED] 37 VFs
[14:08:55] [PASSED] 38 VFs
[14:08:55] [PASSED] 39 VFs
[14:08:55] [PASSED] 40 VFs
[14:08:55] [PASSED] 41 VFs
[14:08:55] [PASSED] 42 VFs
[14:08:55] [PASSED] 43 VFs
[14:08:55] [PASSED] 44 VFs
[14:08:55] [PASSED] 45 VFs
[14:08:55] [PASSED] 46 VFs
[14:08:55] [PASSED] 47 VFs
[14:08:55] [PASSED] 48 VFs
[14:08:55] [PASSED] 49 VFs
[14:08:55] [PASSED] 50 VFs
[14:08:55] [PASSED] 51 VFs
[14:08:55] [PASSED] 52 VFs
[14:08:55] [PASSED] 53 VFs
[14:08:55] [PASSED] 54 VFs
[14:08:55] [PASSED] 55 VFs
[14:08:55] [PASSED] 56 VFs
[14:08:55] [PASSED] 57 VFs
[14:08:55] [PASSED] 58 VFs
[14:08:55] [PASSED] 59 VFs
[14:08:55] [PASSED] 60 VFs
[14:08:55] [PASSED] 61 VFs
[14:08:55] [PASSED] 62 VFs
[14:08:55] [PASSED] 63 VFs
[14:08:55] ==================== [PASSED] fair_vram ====================
[14:08:55] ================== [PASSED] pf_gt_config ===================
[14:08:55] ===================== lmtt (1 subtest) =====================
[14:08:55] ======================== test_ops =========================
[14:08:55] [PASSED] 2-level
[14:08:55] [PASSED] multi-level
[14:08:55] ==================== [PASSED] test_ops =====================
[14:08:55] ====================== [PASSED] lmtt =======================
[14:08:55] ================= pf_service (11 subtests) =================
[14:08:55] [PASSED] pf_negotiate_any
[14:08:55] [PASSED] pf_negotiate_base_match
[14:08:55] [PASSED] pf_negotiate_base_newer
[14:08:55] [PASSED] pf_negotiate_base_next
[14:08:55] [SKIPPED] pf_negotiate_base_older
[14:08:55] [PASSED] pf_negotiate_base_prev
[14:08:55] [PASSED] pf_negotiate_latest_match
[14:08:55] [PASSED] pf_negotiate_latest_newer
[14:08:55] [PASSED] pf_negotiate_latest_next
[14:08:55] [SKIPPED] pf_negotiate_latest_older
[14:08:55] [SKIPPED] pf_negotiate_latest_prev
[14:08:55] =================== [PASSED] pf_service ====================
[14:08:55] ================= xe_guc_g2g (2 subtests) ==================
[14:08:55] ============== xe_live_guc_g2g_kunit_default ==============
[14:08:55] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[14:08:55] ============== xe_live_guc_g2g_kunit_allmem ===============
[14:08:55] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[14:08:55] =================== [SKIPPED] xe_guc_g2g ===================
[14:08:55] =================== xe_mocs (2 subtests) ===================
[14:08:55] ================ xe_live_mocs_kernel_kunit ================
[14:08:55] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[14:08:55] ================ xe_live_mocs_reset_kunit =================
[14:08:55] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[14:08:55] ==================== [SKIPPED] xe_mocs =====================
[14:08:55] ================= xe_migrate (2 subtests) ==================
[14:08:55] ================= xe_migrate_sanity_kunit =================
[14:08:55] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[14:08:55] ================== xe_validate_ccs_kunit ==================
[14:08:55] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[14:08:55] =================== [SKIPPED] xe_migrate ===================
[14:08:55] ================== xe_dma_buf (1 subtest) ==================
[14:08:55] ==================== xe_dma_buf_kunit =====================
[14:08:55] ================ [SKIPPED] xe_dma_buf_kunit ================
[14:08:55] =================== [SKIPPED] xe_dma_buf ===================
[14:08:55] ================= xe_bo_shrink (1 subtest) =================
[14:08:55] =================== xe_bo_shrink_kunit ====================
[14:08:55] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[14:08:55] ================== [SKIPPED] xe_bo_shrink ==================
[14:08:55] ==================== xe_bo (2 subtests) ====================
[14:08:55] ================== xe_ccs_migrate_kunit ===================
[14:08:55] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[14:08:55] ==================== xe_bo_evict_kunit ====================
[14:08:55] =============== [SKIPPED] xe_bo_evict_kunit ================
[14:08:55] ===================== [SKIPPED] xe_bo ======================
[14:08:55] ==================== args (13 subtests) ====================
[14:08:55] [PASSED] count_args_test
[14:08:55] [PASSED] call_args_example
[14:08:55] [PASSED] call_args_test
[14:08:55] [PASSED] drop_first_arg_example
[14:08:55] [PASSED] drop_first_arg_test
[14:08:55] [PASSED] first_arg_example
[14:08:55] [PASSED] first_arg_test
[14:08:55] [PASSED] last_arg_example
[14:08:55] [PASSED] last_arg_test
[14:08:55] [PASSED] pick_arg_example
[14:08:55] [PASSED] if_args_example
[14:08:55] [PASSED] if_args_test
[14:08:55] [PASSED] sep_comma_example
[14:08:55] ====================== [PASSED] args =======================
[14:08:55] =================== xe_pci (3 subtests) ====================
[14:08:55] ==================== check_graphics_ip ====================
[14:08:55] [PASSED] 12.00 Xe_LP
[14:08:55] [PASSED] 12.10 Xe_LP+
[14:08:55] [PASSED] 12.55 Xe_HPG
[14:08:55] [PASSED] 12.60 Xe_HPC
[14:08:55] [PASSED] 12.70 Xe_LPG
[14:08:55] [PASSED] 12.71 Xe_LPG
[14:08:55] [PASSED] 12.74 Xe_LPG+
[14:08:55] [PASSED] 20.01 Xe2_HPG
[14:08:55] [PASSED] 20.02 Xe2_HPG
[14:08:55] [PASSED] 20.04 Xe2_LPG
[14:08:55] [PASSED] 30.00 Xe3_LPG
[14:08:55] [PASSED] 30.01 Xe3_LPG
[14:08:55] [PASSED] 30.03 Xe3_LPG
[14:08:55] [PASSED] 30.04 Xe3_LPG
[14:08:55] [PASSED] 30.05 Xe3_LPG
[14:08:55] [PASSED] 35.10 Xe3p_LPG
[14:08:55] [PASSED] 35.11 Xe3p_XPC
[14:08:55] ================ [PASSED] check_graphics_ip ================
[14:08:55] ===================== check_media_ip ======================
[14:08:55] [PASSED] 12.00 Xe_M
[14:08:55] [PASSED] 12.55 Xe_HPM
[14:08:55] [PASSED] 13.00 Xe_LPM+
[14:08:55] [PASSED] 13.01 Xe2_HPM
[14:08:55] [PASSED] 20.00 Xe2_LPM
[14:08:55] [PASSED] 30.00 Xe3_LPM
[14:08:55] [PASSED] 30.02 Xe3_LPM
[14:08:55] [PASSED] 35.00 Xe3p_LPM
[14:08:55] [PASSED] 35.03 Xe3p_HPM
[14:08:55] ================= [PASSED] check_media_ip ==================
[14:08:55] =================== check_platform_desc ===================
[14:08:55] [PASSED] 0x9A60 (TIGERLAKE)
[14:08:55] [PASSED] 0x9A68 (TIGERLAKE)
[14:08:55] [PASSED] 0x9A70 (TIGERLAKE)
[14:08:55] [PASSED] 0x9A40 (TIGERLAKE)
[14:08:55] [PASSED] 0x9A49 (TIGERLAKE)
[14:08:55] [PASSED] 0x9A59 (TIGERLAKE)
[14:08:55] [PASSED] 0x9A78 (TIGERLAKE)
[14:08:55] [PASSED] 0x9AC0 (TIGERLAKE)
[14:08:55] [PASSED] 0x9AC9 (TIGERLAKE)
[14:08:55] [PASSED] 0x9AD9 (TIGERLAKE)
[14:08:55] [PASSED] 0x9AF8 (TIGERLAKE)
[14:08:55] [PASSED] 0x4C80 (ROCKETLAKE)
[14:08:55] [PASSED] 0x4C8A (ROCKETLAKE)
[14:08:55] [PASSED] 0x4C8B (ROCKETLAKE)
[14:08:55] [PASSED] 0x4C8C (ROCKETLAKE)
[14:08:55] [PASSED] 0x4C90 (ROCKETLAKE)
[14:08:55] [PASSED] 0x4C9A (ROCKETLAKE)
[14:08:55] [PASSED] 0x4680 (ALDERLAKE_S)
[14:08:55] [PASSED] 0x4682 (ALDERLAKE_S)
[14:08:55] [PASSED] 0x4688 (ALDERLAKE_S)
[14:08:55] [PASSED] 0x468A (ALDERLAKE_S)
[14:08:55] [PASSED] 0x468B (ALDERLAKE_S)
[14:08:55] [PASSED] 0x4690 (ALDERLAKE_S)
[14:08:55] [PASSED] 0x4692 (ALDERLAKE_S)
[14:08:55] [PASSED] 0x4693 (ALDERLAKE_S)
[14:08:55] [PASSED] 0x46A0 (ALDERLAKE_P)
[14:08:55] [PASSED] 0x46A1 (ALDERLAKE_P)
[14:08:55] [PASSED] 0x46A2 (ALDERLAKE_P)
[14:08:55] [PASSED] 0x46A3 (ALDERLAKE_P)
[14:08:55] [PASSED] 0x46A6 (ALDERLAKE_P)
[14:08:55] [PASSED] 0x46A8 (ALDERLAKE_P)
[14:08:55] [PASSED] 0x46AA (ALDERLAKE_P)
[14:08:55] [PASSED] 0x462A (ALDERLAKE_P)
[14:08:55] [PASSED] 0x4626 (ALDERLAKE_P)
[14:08:55] [PASSED] 0x4628 (ALDERLAKE_P)
[14:08:55] [PASSED] 0x46B0 (ALDERLAKE_P)
[14:08:55] [PASSED] 0x46B1 (ALDERLAKE_P)
[14:08:55] [PASSED] 0x46B2 (ALDERLAKE_P)
[14:08:55] [PASSED] 0x46B3 (ALDERLAKE_P)
[14:08:55] [PASSED] 0x46C0 (ALDERLAKE_P)
[14:08:55] [PASSED] 0x46C1 (ALDERLAKE_P)
[14:08:55] [PASSED] 0x46C2 (ALDERLAKE_P)
[14:08:55] [PASSED] 0x46C3 (ALDERLAKE_P)
[14:08:55] [PASSED] 0x46D0 (ALDERLAKE_N)
[14:08:55] [PASSED] 0x46D1 (ALDERLAKE_N)
[14:08:55] [PASSED] 0x46D2 (ALDERLAKE_N)
[14:08:55] [PASSED] 0x46D3 (ALDERLAKE_N)
[14:08:55] [PASSED] 0x46D4 (ALDERLAKE_N)
[14:08:55] [PASSED] 0xA721 (ALDERLAKE_P)
[14:08:55] [PASSED] 0xA7A1 (ALDERLAKE_P)
[14:08:55] [PASSED] 0xA7A9 (ALDERLAKE_P)
[14:08:55] [PASSED] 0xA7AC (ALDERLAKE_P)
[14:08:55] [PASSED] 0xA7AD (ALDERLAKE_P)
[14:08:55] [PASSED] 0xA720 (ALDERLAKE_P)
[14:08:55] [PASSED] 0xA7A0 (ALDERLAKE_P)
[14:08:55] [PASSED] 0xA7A8 (ALDERLAKE_P)
[14:08:55] [PASSED] 0xA7AA (ALDERLAKE_P)
[14:08:55] [PASSED] 0xA7AB (ALDERLAKE_P)
[14:08:55] [PASSED] 0xA780 (ALDERLAKE_S)
[14:08:55] [PASSED] 0xA781 (ALDERLAKE_S)
[14:08:55] [PASSED] 0xA782 (ALDERLAKE_S)
[14:08:55] [PASSED] 0xA783 (ALDERLAKE_S)
[14:08:55] [PASSED] 0xA788 (ALDERLAKE_S)
[14:08:55] [PASSED] 0xA789 (ALDERLAKE_S)
[14:08:55] [PASSED] 0xA78A (ALDERLAKE_S)
[14:08:55] [PASSED] 0xA78B (ALDERLAKE_S)
[14:08:55] [PASSED] 0x4905 (DG1)
[14:08:55] [PASSED] 0x4906 (DG1)
[14:08:55] [PASSED] 0x4907 (DG1)
[14:08:55] [PASSED] 0x4908 (DG1)
[14:08:55] [PASSED] 0x4909 (DG1)
[14:08:55] [PASSED] 0x56C0 (DG2)
[14:08:55] [PASSED] 0x56C2 (DG2)
[14:08:55] [PASSED] 0x56C1 (DG2)
[14:08:55] [PASSED] 0x7D51 (METEORLAKE)
[14:08:55] [PASSED] 0x7DD1 (METEORLAKE)
[14:08:55] [PASSED] 0x7D41 (METEORLAKE)
[14:08:55] [PASSED] 0x7D67 (METEORLAKE)
[14:08:55] [PASSED] 0xB640 (METEORLAKE)
[14:08:55] [PASSED] 0x56A0 (DG2)
[14:08:55] [PASSED] 0x56A1 (DG2)
[14:08:55] [PASSED] 0x56A2 (DG2)
[14:08:55] [PASSED] 0x56BE (DG2)
[14:08:55] [PASSED] 0x56BF (DG2)
[14:08:55] [PASSED] 0x5690 (DG2)
[14:08:55] [PASSED] 0x5691 (DG2)
[14:08:55] [PASSED] 0x5692 (DG2)
[14:08:55] [PASSED] 0x56A5 (DG2)
[14:08:55] [PASSED] 0x56A6 (DG2)
[14:08:55] [PASSED] 0x56B0 (DG2)
[14:08:55] [PASSED] 0x56B1 (DG2)
[14:08:55] [PASSED] 0x56BA (DG2)
[14:08:55] [PASSED] 0x56BB (DG2)
[14:08:55] [PASSED] 0x56BC (DG2)
[14:08:55] [PASSED] 0x56BD (DG2)
[14:08:55] [PASSED] 0x5693 (DG2)
[14:08:55] [PASSED] 0x5694 (DG2)
[14:08:55] [PASSED] 0x5695 (DG2)
[14:08:55] [PASSED] 0x56A3 (DG2)
[14:08:55] [PASSED] 0x56A4 (DG2)
[14:08:55] [PASSED] 0x56B2 (DG2)
[14:08:55] [PASSED] 0x56B3 (DG2)
[14:08:55] [PASSED] 0x5696 (DG2)
[14:08:55] [PASSED] 0x5697 (DG2)
[14:08:55] [PASSED] 0xB69 (PVC)
[14:08:55] [PASSED] 0xB6E (PVC)
[14:08:55] [PASSED] 0xBD4 (PVC)
[14:08:55] [PASSED] 0xBD5 (PVC)
[14:08:55] [PASSED] 0xBD6 (PVC)
[14:08:55] [PASSED] 0xBD7 (PVC)
[14:08:55] [PASSED] 0xBD8 (PVC)
[14:08:55] [PASSED] 0xBD9 (PVC)
[14:08:55] [PASSED] 0xBDA (PVC)
[14:08:55] [PASSED] 0xBDB (PVC)
[14:08:55] [PASSED] 0xBE0 (PVC)
[14:08:55] [PASSED] 0xBE1 (PVC)
[14:08:55] [PASSED] 0xBE5 (PVC)
[14:08:55] [PASSED] 0x7D40 (METEORLAKE)
[14:08:55] [PASSED] 0x7D45 (METEORLAKE)
[14:08:55] [PASSED] 0x7D55 (METEORLAKE)
[14:08:55] [PASSED] 0x7D60 (METEORLAKE)
[14:08:55] [PASSED] 0x7DD5 (METEORLAKE)
[14:08:55] [PASSED] 0x6420 (LUNARLAKE)
[14:08:55] [PASSED] 0x64A0 (LUNARLAKE)
[14:08:55] [PASSED] 0x64B0 (LUNARLAKE)
[14:08:55] [PASSED] 0xE202 (BATTLEMAGE)
[14:08:55] [PASSED] 0xE209 (BATTLEMAGE)
[14:08:55] [PASSED] 0xE20B (BATTLEMAGE)
[14:08:55] [PASSED] 0xE20C (BATTLEMAGE)
[14:08:55] [PASSED] 0xE20D (BATTLEMAGE)
[14:08:55] [PASSED] 0xE210 (BATTLEMAGE)
[14:08:55] [PASSED] 0xE211 (BATTLEMAGE)
[14:08:55] [PASSED] 0xE212 (BATTLEMAGE)
[14:08:55] [PASSED] 0xE216 (BATTLEMAGE)
[14:08:55] [PASSED] 0xE220 (BATTLEMAGE)
[14:08:55] [PASSED] 0xE221 (BATTLEMAGE)
[14:08:55] [PASSED] 0xE222 (BATTLEMAGE)
[14:08:55] [PASSED] 0xE223 (BATTLEMAGE)
[14:08:55] [PASSED] 0xB080 (PANTHERLAKE)
[14:08:55] [PASSED] 0xB081 (PANTHERLAKE)
[14:08:55] [PASSED] 0xB082 (PANTHERLAKE)
[14:08:55] [PASSED] 0xB083 (PANTHERLAKE)
[14:08:55] [PASSED] 0xB084 (PANTHERLAKE)
[14:08:55] [PASSED] 0xB085 (PANTHERLAKE)
[14:08:55] [PASSED] 0xB086 (PANTHERLAKE)
[14:08:55] [PASSED] 0xB087 (PANTHERLAKE)
[14:08:55] [PASSED] 0xB08F (PANTHERLAKE)
[14:08:55] [PASSED] 0xB090 (PANTHERLAKE)
[14:08:55] [PASSED] 0xB0A0 (PANTHERLAKE)
[14:08:55] [PASSED] 0xB0B0 (PANTHERLAKE)
[14:08:55] [PASSED] 0xFD80 (PANTHERLAKE)
[14:08:55] [PASSED] 0xFD81 (PANTHERLAKE)
[14:08:55] [PASSED] 0xD740 (NOVALAKE_S)
[14:08:55] [PASSED] 0xD741 (NOVALAKE_S)
[14:08:55] [PASSED] 0xD742 (NOVALAKE_S)
[14:08:55] [PASSED] 0xD743 (NOVALAKE_S)
[14:08:55] [PASSED] 0xD744 (NOVALAKE_S)
[14:08:55] [PASSED] 0xD745 (NOVALAKE_S)
[14:08:55] [PASSED] 0x674C (CRESCENTISLAND)
[14:08:55] [PASSED] 0xD750 (NOVALAKE_P)
[14:08:55] [PASSED] 0xD751 (NOVALAKE_P)
[14:08:55] [PASSED] 0xD752 (NOVALAKE_P)
[14:08:55] [PASSED] 0xD753 (NOVALAKE_P)
[14:08:55] [PASSED] 0xD754 (NOVALAKE_P)
[14:08:55] [PASSED] 0xD755 (NOVALAKE_P)
[14:08:55] [PASSED] 0xD756 (NOVALAKE_P)
[14:08:55] [PASSED] 0xD757 (NOVALAKE_P)
[14:08:55] [PASSED] 0xD75F (NOVALAKE_P)
[14:08:55] =============== [PASSED] check_platform_desc ===============
[14:08:55] ===================== [PASSED] xe_pci ======================
[14:08:55] =================== xe_rtp (2 subtests) ====================
[14:08:55] =============== xe_rtp_process_to_sr_tests ================
[14:08:55] [PASSED] coalesce-same-reg
[14:08:55] [PASSED] no-match-no-add
[14:08:55] [PASSED] match-or
[14:08:55] [PASSED] match-or-xfail
[14:08:55] [PASSED] no-match-no-add-multiple-rules
[14:08:55] [PASSED] two-regs-two-entries
[14:08:55] [PASSED] clr-one-set-other
[14:08:55] [PASSED] set-field
[14:08:55] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[14:08:55] [PASSED] conflict-not-disjoint
[14:08:55] [PASSED] conflict-reg-type
[14:08:55] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[14:08:55] ================== xe_rtp_process_tests ===================
[14:08:55] [PASSED] active1
[14:08:55] [PASSED] active2
[14:08:55] [PASSED] active-inactive
[14:08:55] [PASSED] inactive-active
[14:08:55] [PASSED] inactive-1st_or_active-inactive
[14:08:55] [PASSED] inactive-2nd_or_active-inactive
[14:08:55] [PASSED] inactive-last_or_active-inactive
[14:08:55] [PASSED] inactive-no_or_active-inactive
[14:08:55] ============== [PASSED] xe_rtp_process_tests ===============
[14:08:55] ===================== [PASSED] xe_rtp ======================
[14:08:55] ==================== xe_wa (1 subtest) =====================
[14:08:55] ======================== xe_wa_gt =========================
[14:08:55] [PASSED] TIGERLAKE B0
[14:08:55] [PASSED] DG1 A0
[14:08:55] [PASSED] DG1 B0
[14:08:55] [PASSED] ALDERLAKE_S A0
[14:08:55] [PASSED] ALDERLAKE_S B0
[14:08:55] [PASSED] ALDERLAKE_S C0
[14:08:55] [PASSED] ALDERLAKE_S D0
[14:08:55] [PASSED] ALDERLAKE_P A0
[14:08:55] [PASSED] ALDERLAKE_P B0
[14:08:55] [PASSED] ALDERLAKE_P C0
[14:08:55] [PASSED] ALDERLAKE_S RPLS D0
[14:08:55] [PASSED] ALDERLAKE_P RPLU E0
[14:08:55] [PASSED] DG2 G10 C0
[14:08:55] [PASSED] DG2 G11 B1
[14:08:55] [PASSED] DG2 G12 A1
[14:08:55] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[14:08:55] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[14:08:55] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[14:08:55] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[14:08:55] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[14:08:55] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[14:08:55] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[14:08:55] ==================== [PASSED] xe_wa_gt =====================
[14:08:55] ====================== [PASSED] xe_wa ======================
[14:08:55] ============================================================
[14:08:55] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[14:08:56] Elapsed time: 35.466s total, 4.272s configuring, 30.527s building, 0.619s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[14:08:56] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:08:57] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:09:21] Starting KUnit Kernel (1/1)...
[14:09:21] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:09:21] ============ drm_test_pick_cmdline (2 subtests) ============
[14:09:21] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[14:09:21] =============== drm_test_pick_cmdline_named ===============
[14:09:21] [PASSED] NTSC
[14:09:21] [PASSED] NTSC-J
[14:09:21] [PASSED] PAL
[14:09:21] [PASSED] PAL-M
[14:09:21] =========== [PASSED] drm_test_pick_cmdline_named ===========
[14:09:21] ============== [PASSED] drm_test_pick_cmdline ==============
[14:09:21] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[14:09:21] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[14:09:21] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[14:09:21] =========== drm_validate_clone_mode (2 subtests) ===========
[14:09:21] ============== drm_test_check_in_clone_mode ===============
[14:09:21] [PASSED] in_clone_mode
[14:09:21] [PASSED] not_in_clone_mode
[14:09:21] ========== [PASSED] drm_test_check_in_clone_mode ===========
[14:09:21] =============== drm_test_check_valid_clones ===============
[14:09:21] [PASSED] not_in_clone_mode
[14:09:21] [PASSED] valid_clone
[14:09:21] [PASSED] invalid_clone
[14:09:21] =========== [PASSED] drm_test_check_valid_clones ===========
[14:09:21] ============= [PASSED] drm_validate_clone_mode =============
[14:09:21] ============= drm_validate_modeset (1 subtest) =============
[14:09:21] [PASSED] drm_test_check_connector_changed_modeset
[14:09:21] ============== [PASSED] drm_validate_modeset ===============
[14:09:21] ====== drm_test_bridge_get_current_state (2 subtests) ======
[14:09:21] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[14:09:21] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[14:09:21] ======== [PASSED] drm_test_bridge_get_current_state ========
[14:09:21] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[14:09:21] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[14:09:21] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[14:09:21] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[14:09:21] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[14:09:21] ============== drm_bridge_alloc (2 subtests) ===============
[14:09:21] [PASSED] drm_test_drm_bridge_alloc_basic
[14:09:21] [PASSED] drm_test_drm_bridge_alloc_get_put
[14:09:21] ================ [PASSED] drm_bridge_alloc =================
[14:09:21] ============= drm_cmdline_parser (40 subtests) =============
[14:09:21] [PASSED] drm_test_cmdline_force_d_only
[14:09:21] [PASSED] drm_test_cmdline_force_D_only_dvi
[14:09:21] [PASSED] drm_test_cmdline_force_D_only_hdmi
[14:09:21] [PASSED] drm_test_cmdline_force_D_only_not_digital
[14:09:21] [PASSED] drm_test_cmdline_force_e_only
[14:09:21] [PASSED] drm_test_cmdline_res
[14:09:21] [PASSED] drm_test_cmdline_res_vesa
[14:09:21] [PASSED] drm_test_cmdline_res_vesa_rblank
[14:09:21] [PASSED] drm_test_cmdline_res_rblank
[14:09:21] [PASSED] drm_test_cmdline_res_bpp
[14:09:21] [PASSED] drm_test_cmdline_res_refresh
[14:09:21] [PASSED] drm_test_cmdline_res_bpp_refresh
[14:09:21] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[14:09:21] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[14:09:21] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[14:09:21] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[14:09:21] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[14:09:21] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[14:09:21] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[14:09:21] [PASSED] drm_test_cmdline_res_margins_force_on
[14:09:21] [PASSED] drm_test_cmdline_res_vesa_margins
[14:09:21] [PASSED] drm_test_cmdline_name
[14:09:21] [PASSED] drm_test_cmdline_name_bpp
[14:09:21] [PASSED] drm_test_cmdline_name_option
[14:09:21] [PASSED] drm_test_cmdline_name_bpp_option
[14:09:21] [PASSED] drm_test_cmdline_rotate_0
[14:09:21] [PASSED] drm_test_cmdline_rotate_90
[14:09:21] [PASSED] drm_test_cmdline_rotate_180
[14:09:21] [PASSED] drm_test_cmdline_rotate_270
[14:09:21] [PASSED] drm_test_cmdline_hmirror
[14:09:21] [PASSED] drm_test_cmdline_vmirror
[14:09:21] [PASSED] drm_test_cmdline_margin_options
[14:09:21] [PASSED] drm_test_cmdline_multiple_options
[14:09:21] [PASSED] drm_test_cmdline_bpp_extra_and_option
[14:09:21] [PASSED] drm_test_cmdline_extra_and_option
[14:09:21] [PASSED] drm_test_cmdline_freestanding_options
[14:09:21] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[14:09:21] [PASSED] drm_test_cmdline_panel_orientation
[14:09:21] ================ drm_test_cmdline_invalid =================
[14:09:21] [PASSED] margin_only
[14:09:21] [PASSED] interlace_only
[14:09:21] [PASSED] res_missing_x
[14:09:21] [PASSED] res_missing_y
[14:09:21] [PASSED] res_bad_y
[14:09:21] [PASSED] res_missing_y_bpp
[14:09:21] [PASSED] res_bad_bpp
[14:09:21] [PASSED] res_bad_refresh
[14:09:21] [PASSED] res_bpp_refresh_force_on_off
[14:09:21] [PASSED] res_invalid_mode
[14:09:21] [PASSED] res_bpp_wrong_place_mode
[14:09:21] [PASSED] name_bpp_refresh
[14:09:21] [PASSED] name_refresh
[14:09:21] [PASSED] name_refresh_wrong_mode
[14:09:21] [PASSED] name_refresh_invalid_mode
[14:09:21] [PASSED] rotate_multiple
[14:09:21] [PASSED] rotate_invalid_val
[14:09:21] [PASSED] rotate_truncated
[14:09:21] [PASSED] invalid_option
[14:09:21] [PASSED] invalid_tv_option
[14:09:21] [PASSED] truncated_tv_option
[14:09:21] ============ [PASSED] drm_test_cmdline_invalid =============
[14:09:21] =============== drm_test_cmdline_tv_options ===============
[14:09:21] [PASSED] NTSC
[14:09:21] [PASSED] NTSC_443
[14:09:21] [PASSED] NTSC_J
[14:09:21] [PASSED] PAL
[14:09:21] [PASSED] PAL_M
[14:09:21] [PASSED] PAL_N
[14:09:21] [PASSED] SECAM
[14:09:21] [PASSED] MONO_525
[14:09:21] [PASSED] MONO_625
[14:09:21] =========== [PASSED] drm_test_cmdline_tv_options ===========
[14:09:21] =============== [PASSED] drm_cmdline_parser ================
[14:09:21] ========== drmm_connector_hdmi_init (20 subtests) ==========
[14:09:21] [PASSED] drm_test_connector_hdmi_init_valid
[14:09:21] [PASSED] drm_test_connector_hdmi_init_bpc_8
[14:09:21] [PASSED] drm_test_connector_hdmi_init_bpc_10
[14:09:21] [PASSED] drm_test_connector_hdmi_init_bpc_12
[14:09:21] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[14:09:21] [PASSED] drm_test_connector_hdmi_init_bpc_null
[14:09:21] [PASSED] drm_test_connector_hdmi_init_formats_empty
[14:09:21] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[14:09:21] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[14:09:21] [PASSED] supported_formats=0x9 yuv420_allowed=1
[14:09:21] [PASSED] supported_formats=0x9 yuv420_allowed=0
[14:09:21] [PASSED] supported_formats=0x3 yuv420_allowed=1
[14:09:21] [PASSED] supported_formats=0x3 yuv420_allowed=0
[14:09:21] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[14:09:21] [PASSED] drm_test_connector_hdmi_init_null_ddc
[14:09:21] [PASSED] drm_test_connector_hdmi_init_null_product
[14:09:21] [PASSED] drm_test_connector_hdmi_init_null_vendor
[14:09:21] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[14:09:21] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[14:09:21] [PASSED] drm_test_connector_hdmi_init_product_valid
[14:09:21] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[14:09:21] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[14:09:21] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[14:09:21] ========= drm_test_connector_hdmi_init_type_valid =========
[14:09:21] [PASSED] HDMI-A
[14:09:21] [PASSED] HDMI-B
[14:09:21] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[14:09:21] ======== drm_test_connector_hdmi_init_type_invalid ========
[14:09:21] [PASSED] Unknown
[14:09:21] [PASSED] VGA
[14:09:21] [PASSED] DVI-I
[14:09:21] [PASSED] DVI-D
[14:09:21] [PASSED] DVI-A
[14:09:21] [PASSED] Composite
[14:09:21] [PASSED] SVIDEO
[14:09:21] [PASSED] LVDS
[14:09:21] [PASSED] Component
[14:09:21] [PASSED] DIN
[14:09:21] [PASSED] DP
[14:09:21] [PASSED] TV
[14:09:21] [PASSED] eDP
[14:09:21] [PASSED] Virtual
[14:09:21] [PASSED] DSI
[14:09:21] [PASSED] DPI
[14:09:21] [PASSED] Writeback
[14:09:21] [PASSED] SPI
[14:09:21] [PASSED] USB
[14:09:21] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[14:09:21] ============ [PASSED] drmm_connector_hdmi_init =============
[14:09:21] ============= drmm_connector_init (3 subtests) =============
[14:09:21] [PASSED] drm_test_drmm_connector_init
[14:09:21] [PASSED] drm_test_drmm_connector_init_null_ddc
[14:09:21] ========= drm_test_drmm_connector_init_type_valid =========
[14:09:21] [PASSED] Unknown
[14:09:21] [PASSED] VGA
[14:09:21] [PASSED] DVI-I
[14:09:21] [PASSED] DVI-D
[14:09:21] [PASSED] DVI-A
[14:09:21] [PASSED] Composite
[14:09:21] [PASSED] SVIDEO
[14:09:21] [PASSED] LVDS
[14:09:21] [PASSED] Component
[14:09:21] [PASSED] DIN
[14:09:21] [PASSED] DP
[14:09:21] [PASSED] HDMI-A
[14:09:21] [PASSED] HDMI-B
[14:09:21] [PASSED] TV
[14:09:21] [PASSED] eDP
[14:09:21] [PASSED] Virtual
[14:09:21] [PASSED] DSI
[14:09:21] [PASSED] DPI
[14:09:21] [PASSED] Writeback
[14:09:21] [PASSED] SPI
[14:09:21] [PASSED] USB
[14:09:21] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[14:09:21] =============== [PASSED] drmm_connector_init ===============
[14:09:21] ========= drm_connector_dynamic_init (6 subtests) ==========
[14:09:21] [PASSED] drm_test_drm_connector_dynamic_init
[14:09:21] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[14:09:21] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[14:09:21] [PASSED] drm_test_drm_connector_dynamic_init_properties
[14:09:21] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[14:09:21] [PASSED] Unknown
[14:09:21] [PASSED] VGA
[14:09:21] [PASSED] DVI-I
[14:09:21] [PASSED] DVI-D
[14:09:21] [PASSED] DVI-A
[14:09:21] [PASSED] Composite
[14:09:21] [PASSED] SVIDEO
[14:09:21] [PASSED] LVDS
[14:09:21] [PASSED] Component
[14:09:21] [PASSED] DIN
[14:09:21] [PASSED] DP
[14:09:21] [PASSED] HDMI-A
[14:09:21] [PASSED] HDMI-B
[14:09:21] [PASSED] TV
[14:09:21] [PASSED] eDP
[14:09:21] [PASSED] Virtual
[14:09:21] [PASSED] DSI
[14:09:21] [PASSED] DPI
[14:09:21] [PASSED] Writeback
[14:09:21] [PASSED] SPI
[14:09:21] [PASSED] USB
[14:09:21] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[14:09:21] ======== drm_test_drm_connector_dynamic_init_name =========
[14:09:21] [PASSED] Unknown
[14:09:21] [PASSED] VGA
[14:09:21] [PASSED] DVI-I
[14:09:21] [PASSED] DVI-D
[14:09:21] [PASSED] DVI-A
[14:09:21] [PASSED] Composite
[14:09:21] [PASSED] SVIDEO
[14:09:21] [PASSED] LVDS
[14:09:21] [PASSED] Component
[14:09:21] [PASSED] DIN
[14:09:21] [PASSED] DP
[14:09:21] [PASSED] HDMI-A
[14:09:21] [PASSED] HDMI-B
[14:09:21] [PASSED] TV
[14:09:21] [PASSED] eDP
[14:09:21] [PASSED] Virtual
[14:09:21] [PASSED] DSI
[14:09:21] [PASSED] DPI
[14:09:21] [PASSED] Writeback
[14:09:21] [PASSED] SPI
[14:09:21] [PASSED] USB
[14:09:21] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[14:09:21] =========== [PASSED] drm_connector_dynamic_init ============
[14:09:21] ==== drm_connector_dynamic_register_early (4 subtests) =====
[14:09:21] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[14:09:21] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[14:09:21] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[14:09:21] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[14:09:21] ====== [PASSED] drm_connector_dynamic_register_early =======
[14:09:21] ======= drm_connector_dynamic_register (7 subtests) ========
[14:09:21] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[14:09:21] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[14:09:21] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[14:09:21] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[14:09:21] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[14:09:21] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[14:09:21] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[14:09:21] ========= [PASSED] drm_connector_dynamic_register ==========
[14:09:21] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[14:09:21] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[14:09:21] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[14:09:21] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[14:09:21] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[14:09:21] ========== drm_test_get_tv_mode_from_name_valid ===========
[14:09:21] [PASSED] NTSC
[14:09:21] [PASSED] NTSC-443
[14:09:21] [PASSED] NTSC-J
[14:09:21] [PASSED] PAL
[14:09:21] [PASSED] PAL-M
[14:09:21] [PASSED] PAL-N
[14:09:21] [PASSED] SECAM
[14:09:21] [PASSED] Mono
[14:09:21] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[14:09:21] [PASSED] drm_test_get_tv_mode_from_name_truncated
[14:09:21] ============ [PASSED] drm_get_tv_mode_from_name ============
[14:09:21] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[14:09:21] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[14:09:21] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[14:09:21] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[14:09:21] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[14:09:21] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[14:09:21] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[14:09:21] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[14:09:21] [PASSED] VIC 96
[14:09:21] [PASSED] VIC 97
[14:09:21] [PASSED] VIC 101
[14:09:21] [PASSED] VIC 102
[14:09:21] [PASSED] VIC 106
[14:09:21] [PASSED] VIC 107
[14:09:21] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[14:09:21] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[14:09:21] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[14:09:21] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[14:09:21] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[14:09:21] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[14:09:21] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[14:09:21] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[14:09:21] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[14:09:21] [PASSED] Automatic
[14:09:21] [PASSED] Full
[14:09:21] [PASSED] Limited 16:235
[14:09:21] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[14:09:21] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[14:09:21] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[14:09:21] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[14:09:21] === drm_test_drm_hdmi_connector_get_output_format_name ====
[14:09:21] [PASSED] RGB
[14:09:21] [PASSED] YUV 4:2:0
[14:09:21] [PASSED] YUV 4:2:2
[14:09:21] [PASSED] YUV 4:4:4
[14:09:21] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[14:09:21] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[14:09:21] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[14:09:21] ============= drm_damage_helper (21 subtests) ==============
[14:09:21] [PASSED] drm_test_damage_iter_no_damage
[14:09:21] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[14:09:21] [PASSED] drm_test_damage_iter_no_damage_src_moved
[14:09:21] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[14:09:21] [PASSED] drm_test_damage_iter_no_damage_not_visible
[14:09:21] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[14:09:21] [PASSED] drm_test_damage_iter_no_damage_no_fb
[14:09:21] [PASSED] drm_test_damage_iter_simple_damage
[14:09:21] [PASSED] drm_test_damage_iter_single_damage
[14:09:21] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[14:09:21] [PASSED] drm_test_damage_iter_single_damage_outside_src
[14:09:21] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[14:09:21] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[14:09:21] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[14:09:21] [PASSED] drm_test_damage_iter_single_damage_src_moved
[14:09:21] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[14:09:21] [PASSED] drm_test_damage_iter_damage
[14:09:21] [PASSED] drm_test_damage_iter_damage_one_intersect
[14:09:21] [PASSED] drm_test_damage_iter_damage_one_outside
[14:09:21] [PASSED] drm_test_damage_iter_damage_src_moved
[14:09:21] [PASSED] drm_test_damage_iter_damage_not_visible
[14:09:21] ================ [PASSED] drm_damage_helper ================
[14:09:21] ============== drm_dp_mst_helper (3 subtests) ==============
[14:09:21] ============== drm_test_dp_mst_calc_pbn_mode ==============
[14:09:21] [PASSED] Clock 154000 BPP 30 DSC disabled
[14:09:21] [PASSED] Clock 234000 BPP 30 DSC disabled
[14:09:21] [PASSED] Clock 297000 BPP 24 DSC disabled
[14:09:21] [PASSED] Clock 332880 BPP 24 DSC enabled
[14:09:21] [PASSED] Clock 324540 BPP 24 DSC enabled
[14:09:21] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[14:09:21] ============== drm_test_dp_mst_calc_pbn_div ===============
[14:09:21] [PASSED] Link rate 2000000 lane count 4
[14:09:21] [PASSED] Link rate 2000000 lane count 2
[14:09:21] [PASSED] Link rate 2000000 lane count 1
[14:09:21] [PASSED] Link rate 1350000 lane count 4
[14:09:21] [PASSED] Link rate 1350000 lane count 2
[14:09:21] [PASSED] Link rate 1350000 lane count 1
[14:09:21] [PASSED] Link rate 1000000 lane count 4
[14:09:21] [PASSED] Link rate 1000000 lane count 2
[14:09:21] [PASSED] Link rate 1000000 lane count 1
[14:09:21] [PASSED] Link rate 810000 lane count 4
[14:09:21] [PASSED] Link rate 810000 lane count 2
[14:09:21] [PASSED] Link rate 810000 lane count 1
[14:09:21] [PASSED] Link rate 540000 lane count 4
[14:09:21] [PASSED] Link rate 540000 lane count 2
[14:09:21] [PASSED] Link rate 540000 lane count 1
[14:09:21] [PASSED] Link rate 270000 lane count 4
[14:09:21] [PASSED] Link rate 270000 lane count 2
[14:09:21] [PASSED] Link rate 270000 lane count 1
[14:09:21] [PASSED] Link rate 162000 lane count 4
[14:09:21] [PASSED] Link rate 162000 lane count 2
[14:09:21] [PASSED] Link rate 162000 lane count 1
[14:09:21] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[14:09:21] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[14:09:21] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[14:09:21] [PASSED] DP_POWER_UP_PHY with port number
[14:09:21] [PASSED] DP_POWER_DOWN_PHY with port number
[14:09:21] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[14:09:21] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[14:09:21] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[14:09:21] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[14:09:21] [PASSED] DP_QUERY_PAYLOAD with port number
[14:09:21] [PASSED] DP_QUERY_PAYLOAD with VCPI
[14:09:21] [PASSED] DP_REMOTE_DPCD_READ with port number
[14:09:21] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[14:09:21] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[14:09:21] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[14:09:21] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[14:09:21] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[14:09:21] [PASSED] DP_REMOTE_I2C_READ with port number
[14:09:21] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[14:09:21] [PASSED] DP_REMOTE_I2C_READ with transactions array
[14:09:21] [PASSED] DP_REMOTE_I2C_WRITE with port number
[14:09:21] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[14:09:21] [PASSED] DP_REMOTE_I2C_WRITE with data array
[14:09:21] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[14:09:21] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[14:09:21] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[14:09:21] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[14:09:21] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[14:09:21] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[14:09:21] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[14:09:21] ================ [PASSED] drm_dp_mst_helper ================
[14:09:21] ================== drm_exec (7 subtests) ===================
[14:09:21] [PASSED] sanitycheck
[14:09:21] [PASSED] test_lock
[14:09:21] [PASSED] test_lock_unlock
[14:09:21] [PASSED] test_duplicates
[14:09:21] [PASSED] test_prepare
[14:09:21] [PASSED] test_prepare_array
[14:09:21] [PASSED] test_multiple_loops
[14:09:21] ==================== [PASSED] drm_exec =====================
[14:09:21] =========== drm_format_helper_test (17 subtests) ===========
[14:09:21] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[14:09:21] [PASSED] single_pixel_source_buffer
[14:09:21] [PASSED] single_pixel_clip_rectangle
[14:09:21] [PASSED] well_known_colors
[14:09:21] [PASSED] destination_pitch
[14:09:21] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[14:09:21] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[14:09:21] [PASSED] single_pixel_source_buffer
[14:09:21] [PASSED] single_pixel_clip_rectangle
[14:09:21] [PASSED] well_known_colors
[14:09:21] [PASSED] destination_pitch
[14:09:21] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[14:09:21] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[14:09:21] [PASSED] single_pixel_source_buffer
[14:09:21] [PASSED] single_pixel_clip_rectangle
[14:09:21] [PASSED] well_known_colors
[14:09:21] [PASSED] destination_pitch
[14:09:21] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[14:09:21] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[14:09:21] [PASSED] single_pixel_source_buffer
[14:09:21] [PASSED] single_pixel_clip_rectangle
[14:09:21] [PASSED] well_known_colors
[14:09:21] [PASSED] destination_pitch
[14:09:21] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[14:09:21] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[14:09:21] [PASSED] single_pixel_source_buffer
[14:09:21] [PASSED] single_pixel_clip_rectangle
[14:09:21] [PASSED] well_known_colors
[14:09:21] [PASSED] destination_pitch
[14:09:21] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[14:09:21] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[14:09:21] [PASSED] single_pixel_source_buffer
[14:09:21] [PASSED] single_pixel_clip_rectangle
[14:09:21] [PASSED] well_known_colors
[14:09:21] [PASSED] destination_pitch
[14:09:21] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[14:09:21] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[14:09:21] [PASSED] single_pixel_source_buffer
[14:09:21] [PASSED] single_pixel_clip_rectangle
[14:09:21] [PASSED] well_known_colors
[14:09:21] [PASSED] destination_pitch
[14:09:21] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[14:09:21] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[14:09:21] [PASSED] single_pixel_source_buffer
[14:09:21] [PASSED] single_pixel_clip_rectangle
[14:09:21] [PASSED] well_known_colors
[14:09:21] [PASSED] destination_pitch
[14:09:21] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[14:09:21] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[14:09:21] [PASSED] single_pixel_source_buffer
[14:09:21] [PASSED] single_pixel_clip_rectangle
[14:09:21] [PASSED] well_known_colors
[14:09:21] [PASSED] destination_pitch
[14:09:21] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[14:09:21] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[14:09:21] [PASSED] single_pixel_source_buffer
[14:09:21] [PASSED] single_pixel_clip_rectangle
[14:09:21] [PASSED] well_known_colors
[14:09:21] [PASSED] destination_pitch
[14:09:21] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[14:09:21] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[14:09:21] [PASSED] single_pixel_source_buffer
[14:09:21] [PASSED] single_pixel_clip_rectangle
[14:09:21] [PASSED] well_known_colors
[14:09:21] [PASSED] destination_pitch
[14:09:21] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[14:09:21] ============== drm_test_fb_xrgb8888_to_mono ===============
[14:09:21] [PASSED] single_pixel_source_buffer
[14:09:21] [PASSED] single_pixel_clip_rectangle
[14:09:21] [PASSED] well_known_colors
[14:09:21] [PASSED] destination_pitch
[14:09:21] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[14:09:21] ==================== drm_test_fb_swab =====================
[14:09:21] [PASSED] single_pixel_source_buffer
[14:09:21] [PASSED] single_pixel_clip_rectangle
[14:09:21] [PASSED] well_known_colors
[14:09:21] [PASSED] destination_pitch
[14:09:21] ================ [PASSED] drm_test_fb_swab =================
[14:09:21] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[14:09:21] [PASSED] single_pixel_source_buffer
[14:09:21] [PASSED] single_pixel_clip_rectangle
[14:09:21] [PASSED] well_known_colors
[14:09:21] [PASSED] destination_pitch
[14:09:21] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[14:09:21] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[14:09:21] [PASSED] single_pixel_source_buffer
[14:09:21] [PASSED] single_pixel_clip_rectangle
[14:09:21] [PASSED] well_known_colors
[14:09:21] [PASSED] destination_pitch
[14:09:21] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[14:09:21] ================= drm_test_fb_clip_offset =================
[14:09:21] [PASSED] pass through
[14:09:21] [PASSED] horizontal offset
[14:09:21] [PASSED] vertical offset
[14:09:21] [PASSED] horizontal and vertical offset
[14:09:21] [PASSED] horizontal offset (custom pitch)
[14:09:21] [PASSED] vertical offset (custom pitch)
[14:09:21] [PASSED] horizontal and vertical offset (custom pitch)
[14:09:21] ============= [PASSED] drm_test_fb_clip_offset =============
[14:09:21] =================== drm_test_fb_memcpy ====================
[14:09:21] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[14:09:21] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[14:09:21] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[14:09:21] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[14:09:21] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[14:09:21] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[14:09:21] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[14:09:21] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[14:09:21] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[14:09:21] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[14:09:21] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[14:09:21] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[14:09:21] =============== [PASSED] drm_test_fb_memcpy ================
[14:09:21] ============= [PASSED] drm_format_helper_test ==============
[14:09:21] ================= drm_format (18 subtests) =================
[14:09:21] [PASSED] drm_test_format_block_width_invalid
[14:09:21] [PASSED] drm_test_format_block_width_one_plane
[14:09:21] [PASSED] drm_test_format_block_width_two_plane
[14:09:21] [PASSED] drm_test_format_block_width_three_plane
[14:09:21] [PASSED] drm_test_format_block_width_tiled
[14:09:21] [PASSED] drm_test_format_block_height_invalid
[14:09:21] [PASSED] drm_test_format_block_height_one_plane
[14:09:21] [PASSED] drm_test_format_block_height_two_plane
[14:09:21] [PASSED] drm_test_format_block_height_three_plane
[14:09:21] [PASSED] drm_test_format_block_height_tiled
[14:09:21] [PASSED] drm_test_format_min_pitch_invalid
[14:09:21] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[14:09:21] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[14:09:21] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[14:09:21] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[14:09:21] [PASSED] drm_test_format_min_pitch_two_plane
[14:09:21] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[14:09:21] [PASSED] drm_test_format_min_pitch_tiled
[14:09:21] =================== [PASSED] drm_format ====================
[14:09:21] ============== drm_framebuffer (10 subtests) ===============
[14:09:21] ========== drm_test_framebuffer_check_src_coords ==========
[14:09:21] [PASSED] Success: source fits into fb
[14:09:21] [PASSED] Fail: overflowing fb with x-axis coordinate
[14:09:21] [PASSED] Fail: overflowing fb with y-axis coordinate
[14:09:21] [PASSED] Fail: overflowing fb with source width
[14:09:21] [PASSED] Fail: overflowing fb with source height
[14:09:21] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[14:09:21] [PASSED] drm_test_framebuffer_cleanup
[14:09:21] =============== drm_test_framebuffer_create ===============
[14:09:21] [PASSED] ABGR8888 normal sizes
[14:09:21] [PASSED] ABGR8888 max sizes
[14:09:21] [PASSED] ABGR8888 pitch greater than min required
[14:09:21] [PASSED] ABGR8888 pitch less than min required
[14:09:21] [PASSED] ABGR8888 Invalid width
[14:09:21] [PASSED] ABGR8888 Invalid buffer handle
[14:09:21] [PASSED] No pixel format
[14:09:21] [PASSED] ABGR8888 Width 0
[14:09:21] [PASSED] ABGR8888 Height 0
[14:09:21] [PASSED] ABGR8888 Out of bound height * pitch combination
[14:09:21] [PASSED] ABGR8888 Large buffer offset
[14:09:21] [PASSED] ABGR8888 Buffer offset for inexistent plane
[14:09:21] [PASSED] ABGR8888 Invalid flag
[14:09:21] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[14:09:21] [PASSED] ABGR8888 Valid buffer modifier
[14:09:21] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[14:09:21] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[14:09:21] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[14:09:21] [PASSED] NV12 Normal sizes
[14:09:21] [PASSED] NV12 Max sizes
[14:09:21] [PASSED] NV12 Invalid pitch
[14:09:21] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[14:09:21] [PASSED] NV12 different modifier per-plane
[14:09:21] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[14:09:21] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[14:09:21] [PASSED] NV12 Modifier for inexistent plane
[14:09:21] [PASSED] NV12 Handle for inexistent plane
[14:09:21] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[14:09:21] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[14:09:21] [PASSED] YVU420 Normal sizes
[14:09:21] [PASSED] YVU420 Max sizes
[14:09:21] [PASSED] YVU420 Invalid pitch
[14:09:21] [PASSED] YVU420 Different pitches
[14:09:21] [PASSED] YVU420 Different buffer offsets/pitches
[14:09:21] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[14:09:21] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[14:09:21] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[14:09:21] [PASSED] YVU420 Valid modifier
[14:09:21] [PASSED] YVU420 Different modifiers per plane
[14:09:21] [PASSED] YVU420 Modifier for inexistent plane
[14:09:21] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[14:09:21] [PASSED] X0L2 Normal sizes
[14:09:21] [PASSED] X0L2 Max sizes
[14:09:21] [PASSED] X0L2 Invalid pitch
[14:09:21] [PASSED] X0L2 Pitch greater than minimum required
[14:09:21] [PASSED] X0L2 Handle for inexistent plane
[14:09:21] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[14:09:21] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[14:09:21] [PASSED] X0L2 Valid modifier
[14:09:21] [PASSED] X0L2 Modifier for inexistent plane
[14:09:21] =========== [PASSED] drm_test_framebuffer_create ===========
[14:09:21] [PASSED] drm_test_framebuffer_free
[14:09:21] [PASSED] drm_test_framebuffer_init
[14:09:21] [PASSED] drm_test_framebuffer_init_bad_format
[14:09:21] [PASSED] drm_test_framebuffer_init_dev_mismatch
[14:09:21] [PASSED] drm_test_framebuffer_lookup
[14:09:21] [PASSED] drm_test_framebuffer_lookup_inexistent
[14:09:21] [PASSED] drm_test_framebuffer_modifiers_not_supported
[14:09:21] ================= [PASSED] drm_framebuffer =================
[14:09:21] ================ drm_gem_shmem (8 subtests) ================
[14:09:21] [PASSED] drm_gem_shmem_test_obj_create
[14:09:21] [PASSED] drm_gem_shmem_test_obj_create_private
[14:09:21] [PASSED] drm_gem_shmem_test_pin_pages
[14:09:21] [PASSED] drm_gem_shmem_test_vmap
[14:09:21] [PASSED] drm_gem_shmem_test_get_sg_table
[14:09:21] [PASSED] drm_gem_shmem_test_get_pages_sgt
[14:09:21] [PASSED] drm_gem_shmem_test_madvise
[14:09:21] [PASSED] drm_gem_shmem_test_purge
[14:09:21] ================== [PASSED] drm_gem_shmem ==================
[14:09:21] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[14:09:21] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[14:09:21] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[14:09:21] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[14:09:21] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[14:09:21] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[14:09:21] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[14:09:21] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[14:09:21] [PASSED] Automatic
[14:09:21] [PASSED] Full
[14:09:21] [PASSED] Limited 16:235
[14:09:21] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[14:09:21] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[14:09:21] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[14:09:21] [PASSED] drm_test_check_disable_connector
[14:09:21] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[14:09:21] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[14:09:21] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[14:09:21] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[14:09:21] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[14:09:21] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[14:09:21] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[14:09:21] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[14:09:21] [PASSED] drm_test_check_output_bpc_dvi
[14:09:21] [PASSED] drm_test_check_output_bpc_format_vic_1
[14:09:21] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[14:09:21] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[14:09:21] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[14:09:21] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[14:09:21] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[14:09:21] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[14:09:21] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[14:09:21] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[14:09:21] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[14:09:21] [PASSED] drm_test_check_broadcast_rgb_value
[14:09:21] [PASSED] drm_test_check_bpc_8_value
[14:09:21] [PASSED] drm_test_check_bpc_10_value
[14:09:21] [PASSED] drm_test_check_bpc_12_value
[14:09:21] [PASSED] drm_test_check_format_value
[14:09:21] [PASSED] drm_test_check_tmds_char_value
[14:09:21] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[14:09:21] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[14:09:21] [PASSED] drm_test_check_mode_valid
[14:09:21] [PASSED] drm_test_check_mode_valid_reject
[14:09:21] [PASSED] drm_test_check_mode_valid_reject_rate
[14:09:21] [PASSED] drm_test_check_mode_valid_reject_max_clock
[14:09:21] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[14:09:21] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[14:09:21] [PASSED] drm_test_check_infoframes
[14:09:21] [PASSED] drm_test_check_reject_avi_infoframe
[14:09:21] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[14:09:21] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[14:09:21] [PASSED] drm_test_check_reject_audio_infoframe
[14:09:21] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[14:09:21] ================= drm_managed (2 subtests) =================
[14:09:21] [PASSED] drm_test_managed_release_action
[14:09:21] [PASSED] drm_test_managed_run_action
[14:09:21] =================== [PASSED] drm_managed ===================
[14:09:21] =================== drm_mm (6 subtests) ====================
[14:09:21] [PASSED] drm_test_mm_init
[14:09:21] [PASSED] drm_test_mm_debug
[14:09:21] [PASSED] drm_test_mm_align32
[14:09:21] [PASSED] drm_test_mm_align64
[14:09:21] [PASSED] drm_test_mm_lowest
[14:09:21] [PASSED] drm_test_mm_highest
[14:09:21] ===================== [PASSED] drm_mm ======================
[14:09:21] ============= drm_modes_analog_tv (5 subtests) =============
[14:09:21] [PASSED] drm_test_modes_analog_tv_mono_576i
[14:09:21] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[14:09:21] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[14:09:21] [PASSED] drm_test_modes_analog_tv_pal_576i
[14:09:21] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[14:09:21] =============== [PASSED] drm_modes_analog_tv ===============
[14:09:21] ============== drm_plane_helper (2 subtests) ===============
[14:09:21] =============== drm_test_check_plane_state ================
[14:09:21] [PASSED] clipping_simple
[14:09:21] [PASSED] clipping_rotate_reflect
[14:09:21] [PASSED] positioning_simple
[14:09:21] [PASSED] upscaling
[14:09:21] [PASSED] downscaling
[14:09:21] [PASSED] rounding1
[14:09:21] [PASSED] rounding2
[14:09:21] [PASSED] rounding3
[14:09:21] [PASSED] rounding4
[14:09:21] =========== [PASSED] drm_test_check_plane_state ============
[14:09:21] =========== drm_test_check_invalid_plane_state ============
[14:09:21] [PASSED] positioning_invalid
[14:09:21] [PASSED] upscaling_invalid
[14:09:21] [PASSED] downscaling_invalid
[14:09:21] ======= [PASSED] drm_test_check_invalid_plane_state ========
[14:09:21] ================ [PASSED] drm_plane_helper =================
[14:09:21] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[14:09:21] ====== drm_test_connector_helper_tv_get_modes_check =======
[14:09:21] [PASSED] None
[14:09:21] [PASSED] PAL
[14:09:21] [PASSED] NTSC
[14:09:21] [PASSED] Both, NTSC Default
[14:09:21] [PASSED] Both, PAL Default
[14:09:21] [PASSED] Both, NTSC Default, with PAL on command-line
[14:09:21] [PASSED] Both, PAL Default, with NTSC on command-line
[14:09:21] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[14:09:21] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[14:09:21] ================== drm_rect (9 subtests) ===================
[14:09:21] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[14:09:21] [PASSED] drm_test_rect_clip_scaled_not_clipped
[14:09:21] [PASSED] drm_test_rect_clip_scaled_clipped
[14:09:21] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[14:09:21] ================= drm_test_rect_intersect =================
[14:09:21] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[14:09:21] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[14:09:21] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[14:09:21] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[14:09:21] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[14:09:21] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[14:09:21] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[14:09:21] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[14:09:21] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[14:09:21] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[14:09:21] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[14:09:21] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[14:09:21] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[14:09:21] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[14:09:21] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[14:09:21] ============= [PASSED] drm_test_rect_intersect =============
[14:09:21] ================ drm_test_rect_calc_hscale ================
[14:09:21] [PASSED] normal use
[14:09:21] [PASSED] out of max range
[14:09:21] [PASSED] out of min range
[14:09:21] [PASSED] zero dst
[14:09:21] [PASSED] negative src
[14:09:21] [PASSED] negative dst
[14:09:21] ============ [PASSED] drm_test_rect_calc_hscale ============
[14:09:21] ================ drm_test_rect_calc_vscale ================
[14:09:21] [PASSED] normal use
[14:09:21] [PASSED] out of max range
[14:09:21] [PASSED] out of min range
[14:09:21] [PASSED] zero dst
[14:09:21] [PASSED] negative src
[14:09:21] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[14:09:21] ============ [PASSED] drm_test_rect_calc_vscale ============
[14:09:21] ================== drm_test_rect_rotate ===================
[14:09:21] [PASSED] reflect-x
[14:09:21] [PASSED] reflect-y
[14:09:21] [PASSED] rotate-0
[14:09:21] [PASSED] rotate-90
[14:09:21] [PASSED] rotate-180
[14:09:21] [PASSED] rotate-270
[14:09:21] ============== [PASSED] drm_test_rect_rotate ===============
[14:09:21] ================ drm_test_rect_rotate_inv =================
[14:09:21] [PASSED] reflect-x
[14:09:21] [PASSED] reflect-y
[14:09:21] [PASSED] rotate-0
[14:09:21] [PASSED] rotate-90
[14:09:21] [PASSED] rotate-180
[14:09:21] [PASSED] rotate-270
[14:09:21] ============ [PASSED] drm_test_rect_rotate_inv =============
[14:09:21] ==================== [PASSED] drm_rect =====================
[14:09:21] ============ drm_sysfb_modeset_test (1 subtest) ============
[14:09:21] ============ drm_test_sysfb_build_fourcc_list =============
[14:09:21] [PASSED] no native formats
[14:09:21] [PASSED] XRGB8888 as native format
[14:09:21] [PASSED] remove duplicates
[14:09:21] [PASSED] convert alpha formats
[14:09:21] [PASSED] random formats
[14:09:21] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[14:09:21] ============= [PASSED] drm_sysfb_modeset_test ==============
[14:09:21] ================== drm_fixp (2 subtests) ===================
[14:09:21] [PASSED] drm_test_int2fixp
[14:09:21] [PASSED] drm_test_sm2fixp
[14:09:21] ==================== [PASSED] drm_fixp =====================
[14:09:21] ============================================================
[14:09:21] Testing complete. Ran 621 tests: passed: 621
[14:09:21] Elapsed time: 25.737s total, 1.719s configuring, 23.847s building, 0.139s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[14:09:21] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:09:23] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:09:33] Starting KUnit Kernel (1/1)...
[14:09:33] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:09:33] ================= ttm_device (5 subtests) ==================
[14:09:33] [PASSED] ttm_device_init_basic
[14:09:33] [PASSED] ttm_device_init_multiple
[14:09:33] [PASSED] ttm_device_fini_basic
[14:09:33] [PASSED] ttm_device_init_no_vma_man
[14:09:33] ================== ttm_device_init_pools ==================
[14:09:33] [PASSED] No DMA allocations, no DMA32 required
[14:09:33] [PASSED] DMA allocations, DMA32 required
[14:09:33] [PASSED] No DMA allocations, DMA32 required
[14:09:33] [PASSED] DMA allocations, no DMA32 required
[14:09:33] ============== [PASSED] ttm_device_init_pools ==============
[14:09:33] =================== [PASSED] ttm_device ====================
[14:09:33] ================== ttm_pool (8 subtests) ===================
[14:09:33] ================== ttm_pool_alloc_basic ===================
[14:09:33] [PASSED] One page
[14:09:33] [PASSED] More than one page
[14:09:33] [PASSED] Above the allocation limit
[14:09:33] [PASSED] One page, with coherent DMA mappings enabled
[14:09:33] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[14:09:33] ============== [PASSED] ttm_pool_alloc_basic ===============
[14:09:33] ============== ttm_pool_alloc_basic_dma_addr ==============
[14:09:33] [PASSED] One page
[14:09:33] [PASSED] More than one page
[14:09:33] [PASSED] Above the allocation limit
[14:09:33] [PASSED] One page, with coherent DMA mappings enabled
[14:09:33] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[14:09:33] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[14:09:33] [PASSED] ttm_pool_alloc_order_caching_match
[14:09:33] [PASSED] ttm_pool_alloc_caching_mismatch
[14:09:33] [PASSED] ttm_pool_alloc_order_mismatch
[14:09:33] [PASSED] ttm_pool_free_dma_alloc
[14:09:33] [PASSED] ttm_pool_free_no_dma_alloc
[14:09:33] [PASSED] ttm_pool_fini_basic
[14:09:33] ==================== [PASSED] ttm_pool =====================
[14:09:33] ================ ttm_resource (8 subtests) =================
[14:09:33] ================= ttm_resource_init_basic =================
[14:09:33] [PASSED] Init resource in TTM_PL_SYSTEM
[14:09:33] [PASSED] Init resource in TTM_PL_VRAM
[14:09:33] [PASSED] Init resource in a private placement
[14:09:33] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[14:09:33] ============= [PASSED] ttm_resource_init_basic =============
[14:09:33] [PASSED] ttm_resource_init_pinned
[14:09:33] [PASSED] ttm_resource_fini_basic
[14:09:33] [PASSED] ttm_resource_manager_init_basic
[14:09:33] [PASSED] ttm_resource_manager_usage_basic
[14:09:33] [PASSED] ttm_resource_manager_set_used_basic
[14:09:33] [PASSED] ttm_sys_man_alloc_basic
[14:09:33] [PASSED] ttm_sys_man_free_basic
[14:09:33] ================== [PASSED] ttm_resource ===================
[14:09:33] =================== ttm_tt (15 subtests) ===================
[14:09:33] ==================== ttm_tt_init_basic ====================
[14:09:33] [PASSED] Page-aligned size
[14:09:33] [PASSED] Extra pages requested
[14:09:33] ================ [PASSED] ttm_tt_init_basic ================
[14:09:33] [PASSED] ttm_tt_init_misaligned
[14:09:33] [PASSED] ttm_tt_fini_basic
[14:09:33] [PASSED] ttm_tt_fini_sg
[14:09:33] [PASSED] ttm_tt_fini_shmem
[14:09:33] [PASSED] ttm_tt_create_basic
[14:09:33] [PASSED] ttm_tt_create_invalid_bo_type
[14:09:33] [PASSED] ttm_tt_create_ttm_exists
[14:09:33] [PASSED] ttm_tt_create_failed
[14:09:33] [PASSED] ttm_tt_destroy_basic
[14:09:33] [PASSED] ttm_tt_populate_null_ttm
[14:09:33] [PASSED] ttm_tt_populate_populated_ttm
[14:09:33] [PASSED] ttm_tt_unpopulate_basic
[14:09:33] [PASSED] ttm_tt_unpopulate_empty_ttm
[14:09:33] [PASSED] ttm_tt_swapin_basic
[14:09:33] ===================== [PASSED] ttm_tt ======================
[14:09:33] =================== ttm_bo (14 subtests) ===================
[14:09:33] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[14:09:33] [PASSED] Cannot be interrupted and sleeps
[14:09:33] [PASSED] Cannot be interrupted, locks straight away
[14:09:33] [PASSED] Can be interrupted, sleeps
[14:09:33] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[14:09:33] [PASSED] ttm_bo_reserve_locked_no_sleep
[14:09:33] [PASSED] ttm_bo_reserve_no_wait_ticket
[14:09:33] [PASSED] ttm_bo_reserve_double_resv
[14:09:33] [PASSED] ttm_bo_reserve_interrupted
[14:09:33] [PASSED] ttm_bo_reserve_deadlock
[14:09:33] [PASSED] ttm_bo_unreserve_basic
[14:09:33] [PASSED] ttm_bo_unreserve_pinned
[14:09:33] [PASSED] ttm_bo_unreserve_bulk
[14:09:33] [PASSED] ttm_bo_fini_basic
[14:09:33] [PASSED] ttm_bo_fini_shared_resv
[14:09:33] [PASSED] ttm_bo_pin_basic
[14:09:33] [PASSED] ttm_bo_pin_unpin_resource
[14:09:33] [PASSED] ttm_bo_multiple_pin_one_unpin
[14:09:33] ===================== [PASSED] ttm_bo ======================
[14:09:33] ============== ttm_bo_validate (21 subtests) ===============
[14:09:33] ============== ttm_bo_init_reserved_sys_man ===============
[14:09:33] [PASSED] Buffer object for userspace
[14:09:33] [PASSED] Kernel buffer object
[14:09:33] [PASSED] Shared buffer object
[14:09:33] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[14:09:33] ============== ttm_bo_init_reserved_mock_man ==============
[14:09:33] [PASSED] Buffer object for userspace
[14:09:33] [PASSED] Kernel buffer object
[14:09:33] [PASSED] Shared buffer object
[14:09:33] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[14:09:33] [PASSED] ttm_bo_init_reserved_resv
[14:09:33] ================== ttm_bo_validate_basic ==================
[14:09:33] [PASSED] Buffer object for userspace
[14:09:33] [PASSED] Kernel buffer object
[14:09:33] [PASSED] Shared buffer object
[14:09:33] ============== [PASSED] ttm_bo_validate_basic ==============
[14:09:33] [PASSED] ttm_bo_validate_invalid_placement
[14:09:33] ============= ttm_bo_validate_same_placement ==============
[14:09:33] [PASSED] System manager
[14:09:33] [PASSED] VRAM manager
[14:09:33] ========= [PASSED] ttm_bo_validate_same_placement ==========
[14:09:33] [PASSED] ttm_bo_validate_failed_alloc
[14:09:33] [PASSED] ttm_bo_validate_pinned
[14:09:33] [PASSED] ttm_bo_validate_busy_placement
[14:09:33] ================ ttm_bo_validate_multihop =================
[14:09:33] [PASSED] Buffer object for userspace
[14:09:33] [PASSED] Kernel buffer object
[14:09:33] [PASSED] Shared buffer object
[14:09:33] ============ [PASSED] ttm_bo_validate_multihop =============
[14:09:33] ========== ttm_bo_validate_no_placement_signaled ==========
[14:09:33] [PASSED] Buffer object in system domain, no page vector
[14:09:33] [PASSED] Buffer object in system domain with an existing page vector
[14:09:33] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[14:09:33] ======== ttm_bo_validate_no_placement_not_signaled ========
[14:09:33] [PASSED] Buffer object for userspace
[14:09:33] [PASSED] Kernel buffer object
[14:09:33] [PASSED] Shared buffer object
[14:09:33] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[14:09:33] [PASSED] ttm_bo_validate_move_fence_signaled
[14:09:33] ========= ttm_bo_validate_move_fence_not_signaled =========
[14:09:33] [PASSED] Waits for GPU
[14:09:33] [PASSED] Tries to lock straight away
[14:09:33] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[14:09:33] [PASSED] ttm_bo_validate_happy_evict
[14:09:33] [PASSED] ttm_bo_validate_all_pinned_evict
[14:09:33] [PASSED] ttm_bo_validate_allowed_only_evict
[14:09:33] [PASSED] ttm_bo_validate_deleted_evict
[14:09:33] [PASSED] ttm_bo_validate_busy_domain_evict
[14:09:33] [PASSED] ttm_bo_validate_evict_gutting
[14:09:33] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[14:09:33] ================= [PASSED] ttm_bo_validate =================
[14:09:33] ============================================================
[14:09:33] Testing complete. Ran 101 tests: passed: 101
[14:09:33] Elapsed time: 11.381s total, 1.702s configuring, 9.463s building, 0.182s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✓ Xe.CI.BAT: success for Introduce Xe PCIe FLR (rev3)
2026-03-08 13:55 [PATCH v3 00/10] Introduce Xe PCIe FLR Raag Jadav
` (11 preceding siblings ...)
2026-03-08 14:09 ` ✓ CI.KUnit: success " Patchwork
@ 2026-03-08 14:50 ` Patchwork
2026-03-08 15:49 ` ✓ Xe.CI.FULL: " Patchwork
13 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-03-08 14:50 UTC (permalink / raw)
To: Raag Jadav; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1832 bytes --]
== Series Details ==
Series: Introduce Xe PCIe FLR (rev3)
URL : https://patchwork.freedesktop.org/series/162055/
State : success
== Summary ==
CI Bug Log - changes from xe-4677-f705e865254996e9a099a22a9320e523e6debdcf_BAT -> xe-pw-162055v3_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (12 -> 13)
------------------------------
Additional (1): bat-bmg-3
Known issues
------------
Here are the changes found in xe-pw-162055v3_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p:
- bat-bmg-3: NOTRUN -> [SKIP][1] ([Intel XE#6566]) +3 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/bat-bmg-3/igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p.html
* igt@xe_waitfence@reltime:
- bat-dg2-oem2: [PASS][2] -> [FAIL][3] ([Intel XE#6520])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4677-f705e865254996e9a099a22a9320e523e6debdcf/bat-dg2-oem2/igt@xe_waitfence@reltime.html
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/bat-dg2-oem2/igt@xe_waitfence@reltime.html
[Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520
[Intel XE#6566]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6566
Build changes
-------------
* Linux: xe-4677-f705e865254996e9a099a22a9320e523e6debdcf -> xe-pw-162055v3
IGT_8784: c7d12b3499ef1698373f246748e68c05ada0579e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4677-f705e865254996e9a099a22a9320e523e6debdcf: f705e865254996e9a099a22a9320e523e6debdcf
xe-pw-162055v3: 162055v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/index.html
[-- Attachment #2: Type: text/html, Size: 2430 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✓ Xe.CI.FULL: success for Introduce Xe PCIe FLR (rev3)
2026-03-08 13:55 [PATCH v3 00/10] Introduce Xe PCIe FLR Raag Jadav
` (12 preceding siblings ...)
2026-03-08 14:50 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-03-08 15:49 ` Patchwork
13 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-03-08 15:49 UTC (permalink / raw)
To: Raag Jadav; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 23964 bytes --]
== Series Details ==
Series: Introduce Xe PCIe FLR (rev3)
URL : https://patchwork.freedesktop.org/series/162055/
State : success
== Summary ==
CI Bug Log - changes from xe-4677-f705e865254996e9a099a22a9320e523e6debdcf_FULL -> xe-pw-162055v3_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-162055v3_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@linear-64bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][1] ([Intel XE#2327]) +3 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-1/igt@kms_big_fb@linear-64bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-180:
- shard-bmg: NOTRUN -> [SKIP][2] ([Intel XE#1124]) +5 other tests skip
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-4/igt@kms_big_fb@yf-tiled-8bpp-rotate-180.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][3] ([Intel XE#2887]) +3 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-4/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-c-dp-2:
- shard-bmg: NOTRUN -> [SKIP][4] ([Intel XE#2652]) +8 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-c-dp-2.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#3432]) +1 other test skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html
* igt@kms_chamelium_hpd@dp-hpd-storm:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#2252]) +6 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-3/igt@kms_chamelium_hpd@dp-hpd-storm.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#2390] / [Intel XE#6974])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-1/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_cursor_crc@cursor-onscreen-64x21:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#2320]) +2 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-1/igt@kms_cursor_crc@cursor-onscreen-64x21.html
* igt@kms_feature_discovery@psr1:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2374] / [Intel XE#6127])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-4/igt@kms_feature_discovery@psr1.html
* igt@kms_feature_discovery@psr2:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2374] / [Intel XE#6128])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-7/igt@kms_feature_discovery@psr2.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#7178] / [Intel XE#7349])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-3/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#7178] / [Intel XE#7351]) +3 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#2311]) +14 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#4141]) +5 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-tiling-y:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#2352] / [Intel XE#7399])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcpsr-argb161616f-draw-render:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#7061] / [Intel XE#7356]) +5 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-argb161616f-draw-render.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#2313]) +16 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [PASS][18] -> [SKIP][19] ([Intel XE#1503])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4677-f705e865254996e9a099a22a9320e523e6debdcf/shard-bmg-8/igt@kms_hdr@invalid-hdr.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-2/igt@kms_hdr@invalid-hdr.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2486])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-1/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#7283]) +1 other test skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-7/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping.html
* igt@kms_plane_multiple@tiling-y:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#5020] / [Intel XE#7348])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-3/igt@kms_plane_multiple@tiling-y.html
* igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-7/igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a.html
* igt@kms_pm_backlight@bad-brightness:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#7376] / [Intel XE#870]) +1 other test skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-4/igt@kms_pm_backlight@bad-brightness.html
* igt@kms_pm_rpm@modeset-lpsp-stress:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-1/igt@kms_pm_rpm@modeset-lpsp-stress.html
* igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf:
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#1489]) +3 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-6/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#2387] / [Intel XE#7429])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-6/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr@psr-primary-page-flip:
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#2234] / [Intel XE#2850]) +9 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-2/igt@kms_psr@psr-primary-page-flip.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
- shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#2330] / [Intel XE#5813])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
* igt@kms_scaling_modes@scaling-mode-full-aspect:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#2413])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-7/igt@kms_scaling_modes@scaling-mode-full-aspect.html
* igt@kms_setmode@basic@pipe-b-edp-1:
- shard-lnl: [PASS][31] -> [FAIL][32] ([Intel XE#6361]) +2 other tests fail
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4677-f705e865254996e9a099a22a9320e523e6debdcf/shard-lnl-8/igt@kms_setmode@basic@pipe-b-edp-1.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-lnl-7/igt@kms_setmode@basic@pipe-b-edp-1.html
* igt@kms_sharpness_filter@invalid-filter-with-scaler:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#6503])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-7/igt@kms_sharpness_filter@invalid-filter-with-scaler.html
* igt@kms_vrr@flip-suspend:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#1499]) +3 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-6/igt@kms_vrr@flip-suspend.html
* igt@xe_eudebug@vm-bind-clear:
- shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#4837]) +4 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-7/igt@xe_eudebug@vm-bind-clear.html
* igt@xe_eudebug_online@pagefault-read-stress:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#6665] / [Intel XE#6681])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-2/igt@xe_eudebug_online@pagefault-read-stress.html
* igt@xe_eudebug_online@stopped-thread:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#4837] / [Intel XE#6665]) +1 other test skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-3/igt@xe_eudebug_online@stopped-thread.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-rebind:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#2322] / [Intel XE#7372]) +2 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-rebind.html
* igt@xe_exec_fault_mode@many-execqueues-multi-queue-invalid-userptr-fault:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#7136]) +4 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-6/igt@xe_exec_fault_mode@many-execqueues-multi-queue-invalid-userptr-fault.html
* igt@xe_exec_multi_queue@many-execs-basic-smem:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#6874]) +25 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-1/igt@xe_exec_multi_queue@many-execs-basic-smem.html
* igt@xe_exec_system_allocator@many-stride-new-prefetch:
- shard-bmg: NOTRUN -> [INCOMPLETE][41] ([Intel XE#7098])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-4/igt@xe_exec_system_allocator@many-stride-new-prefetch.html
* igt@xe_exec_threads@threads-multi-queue-cm-fd-rebind:
- shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#7138]) +5 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-2/igt@xe_exec_threads@threads-multi-queue-cm-fd-rebind.html
* igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
- shard-bmg: NOTRUN -> [ABORT][43] ([Intel XE#5466] / [Intel XE#6652])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-3/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
* igt@xe_multigpu_svm@mgpu-concurrent-access-prefetch:
- shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#6964]) +1 other test skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-3/igt@xe_multigpu_svm@mgpu-concurrent-access-prefetch.html
* igt@xe_peer2peer@write:
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#2427] / [Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-6/igt@xe_peer2peer@write.html
* igt@xe_pm@d3cold-i2c:
- shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#5694] / [Intel XE#7370])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-7/igt@xe_pm@d3cold-i2c.html
* igt@xe_pm@s3-d3cold-basic-exec:
- shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#2284] / [Intel XE#7370])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-4/igt@xe_pm@s3-d3cold-basic-exec.html
* igt@xe_pxp@pxp-stale-queue-post-suspend:
- shard-bmg: NOTRUN -> [SKIP][48] ([Intel XE#4733] / [Intel XE#7417]) +2 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-7/igt@xe_pxp@pxp-stale-queue-post-suspend.html
* igt@xe_query@multigpu-query-topology:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#944])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-2/igt@xe_query@multigpu-query-topology.html
#### Possible fixes ####
* igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing:
- shard-bmg: [INCOMPLETE][50] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#6819] / [Intel XE#6904]) -> [PASS][51]
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4677-f705e865254996e9a099a22a9320e523e6debdcf/shard-bmg-3/igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-2/igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing.html
* igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing@pipe-a-dp-2:
- shard-bmg: [DMESG-FAIL][52] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#6819]) -> [PASS][53]
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4677-f705e865254996e9a099a22a9320e523e6debdcf/shard-bmg-3/igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing@pipe-a-dp-2.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-2/igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing@pipe-a-dp-2.html
* igt@kms_color@ctm-0-75@pipe-b-hdmi-a-3:
- shard-bmg: [INCOMPLETE][54] ([Intel XE#6652]) -> [PASS][55] +1 other test pass
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4677-f705e865254996e9a099a22a9320e523e6debdcf/shard-bmg-2/igt@kms_color@ctm-0-75@pipe-b-hdmi-a-3.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-7/igt@kms_color@ctm-0-75@pipe-b-hdmi-a-3.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [FAIL][56] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][57] +1 other test pass
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4677-f705e865254996e9a099a22a9320e523e6debdcf/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-bmg: [INCOMPLETE][58] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][59] +1 other test pass
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4677-f705e865254996e9a099a22a9320e523e6debdcf/shard-bmg-1/igt@kms_flip@flip-vs-suspend-interruptible.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-6/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_plane@pixel-format-linear-modifier@pipe-a-plane-0:
- shard-lnl: [FAIL][60] -> [PASS][61] +1 other test pass
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4677-f705e865254996e9a099a22a9320e523e6debdcf/shard-lnl-3/igt@kms_plane@pixel-format-linear-modifier@pipe-a-plane-0.html
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-lnl-6/igt@kms_plane@pixel-format-linear-modifier@pipe-a-plane-0.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-lnl: [SKIP][62] ([Intel XE#4692] / [Intel XE#7508]) -> [PASS][63]
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4677-f705e865254996e9a099a22a9320e523e6debdcf/shard-lnl-8/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-lnl-7/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
#### Warnings ####
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [SKIP][64] ([Intel XE#2426] / [Intel XE#5848]) -> [FAIL][65] ([Intel XE#1729] / [Intel XE#7424])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4677-f705e865254996e9a099a22a9320e523e6debdcf/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern.html
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
[Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
[Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4692]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4692
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
[Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
[Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
[Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#6127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6127
[Intel XE#6128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6128
[Intel XE#6361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6361
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#6652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6652
[Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
[Intel XE#6681]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6681
[Intel XE#6819]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6819
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
[Intel XE#6904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6904
[Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7098
[Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
[Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
[Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
[Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
[Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
[Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
[Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
[Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
[Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
[Intel XE#7508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7508
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-4677-f705e865254996e9a099a22a9320e523e6debdcf -> xe-pw-162055v3
IGT_8784: c7d12b3499ef1698373f246748e68c05ada0579e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4677-f705e865254996e9a099a22a9320e523e6debdcf: f705e865254996e9a099a22a9320e523e6debdcf
xe-pw-162055v3: 162055v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v3/index.html
[-- Attachment #2: Type: text/html, Size: 26170 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v3 03/10] drm/xe/guc_submit: Support cancelling submission
2026-03-08 13:55 ` [PATCH v3 03/10] drm/xe/guc_submit: Support cancelling submission Raag Jadav
@ 2026-03-13 15:37 ` Dong, Zhanjun
2026-03-15 9:58 ` Raag Jadav
0 siblings, 1 reply; 18+ messages in thread
From: Dong, Zhanjun @ 2026-03-13 15:37 UTC (permalink / raw)
To: intel-xe
On 2026-03-08 9:55 a.m., Raag Jadav wrote:
> In preparation of usecases which require cancelling submission before
> PCIe FLR, introduce xe_guc_submit_cancel() helper. This cancels and
> frees any in-flight jobs on the scheduler.
Could you put more info on why add new cancel functions rather than call
existing xe_sched_submission_stop?
From commit message, it looks very similar to stop, which also do stop
+ free action.
Regards,
Zhanjun Dong
>
> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> ---
> v3: Cancel in-flight jobs before FLR
> ---
> drivers/gpu/drm/xe/xe_gpu_scheduler.c | 11 +++++++++++
> drivers/gpu/drm/xe/xe_gpu_scheduler.h | 1 +
> drivers/gpu/drm/xe/xe_guc_submit.c | 24 ++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_guc_submit.h | 1 +
> 4 files changed, 37 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.c b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> index 9c8004d5dd91..c012dbe84540 100644
> --- a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> +++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> @@ -90,6 +90,17 @@ void xe_sched_fini(struct xe_gpu_scheduler *sched)
> drm_sched_fini(&sched->base);
> }
>
> +void xe_sched_submission_cancel(struct xe_gpu_scheduler *sched)
> +{
> + struct drm_gpu_scheduler *base = &sched->base;
> + struct drm_sched_job *job, *tmp;
> +
> + list_for_each_entry_safe_reverse(job, tmp, &base->pending_list, list) {
> + list_del(&job->list);
> + base->ops->free_job(job);
> + }
> +}
> +
> void xe_sched_submission_start(struct xe_gpu_scheduler *sched)
> {
> drm_sched_wqueue_start(&sched->base);
> diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.h b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
> index 664c2db56af3..ba7892db8428 100644
> --- a/drivers/gpu/drm/xe/xe_gpu_scheduler.h
> +++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
> @@ -19,6 +19,7 @@ int xe_sched_init(struct xe_gpu_scheduler *sched,
> struct device *dev);
> void xe_sched_fini(struct xe_gpu_scheduler *sched);
>
> +void xe_sched_submission_cancel(struct xe_gpu_scheduler *sched);
> void xe_sched_submission_start(struct xe_gpu_scheduler *sched);
> void xe_sched_submission_stop(struct xe_gpu_scheduler *sched);
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index de716c1fb18e..cba544cc185c 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -2399,6 +2399,30 @@ void xe_guc_submit_stop(struct xe_guc *guc)
>
> }
>
> +/**
> + * xe_guc_submit_cancel - Cancel all runs of submission tasks on given GuC.
> + * @guc: the &xe_guc struct instance whose scheduler is to be cancelled
> + */
> +void xe_guc_submit_cancel(struct xe_guc *guc)
> +{
> + struct xe_exec_queue *q;
> + unsigned long index;
> +
> + mutex_lock(&guc->submission_state.lock);
> +
> + xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
> + struct xe_gpu_scheduler *sched = &q->guc->sched;
> +
> + /* Prevent redundant attempts to cancel parallel queues */
> + if (q->guc->id != index)
> + continue;
> +
> + xe_sched_submission_cancel(sched);
> + }
> +
> + mutex_unlock(&guc->submission_state.lock);
> +}
> +
> static void guc_exec_queue_revert_pending_state_change(struct xe_guc *guc,
> struct xe_exec_queue *q)
> {
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
> index b3839a90c142..f361a6d32fd3 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.h
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.h
> @@ -16,6 +16,7 @@ int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids);
> int xe_guc_submit_enable(struct xe_guc *guc);
> void xe_guc_submit_disable(struct xe_guc *guc);
>
> +void xe_guc_submit_cancel(struct xe_guc *guc);
> int xe_guc_submit_reset_prepare(struct xe_guc *guc);
> void xe_guc_submit_reset_wait(struct xe_guc *guc);
> void xe_guc_submit_stop(struct xe_guc *guc);
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v3 03/10] drm/xe/guc_submit: Support cancelling submission
2026-03-13 15:37 ` Dong, Zhanjun
@ 2026-03-15 9:58 ` Raag Jadav
2026-03-16 2:31 ` Matthew Brost
0 siblings, 1 reply; 18+ messages in thread
From: Raag Jadav @ 2026-03-15 9:58 UTC (permalink / raw)
To: Dong, Zhanjun; +Cc: intel-xe
On Fri, Mar 13, 2026 at 11:37:03AM -0400, Dong, Zhanjun wrote:
> On 2026-03-08 9:55 a.m., Raag Jadav wrote:
> > In preparation of usecases which require cancelling submission before
> > PCIe FLR, introduce xe_guc_submit_cancel() helper. This cancels and
> > frees any in-flight jobs on the scheduler.
>
> Could you put more info on why add new cancel functions rather than call
> existing xe_sched_submission_stop?
> From commit message, it looks very similar to stop, which also do stop +
> free action.
IIUC submission_stop() doesn't free any jobs, it just stops the scheduler
and cancels wq used to run jobs. But this leaves the jobs on scheduler's
pending list behind if they're not on the wq yet, which results in timeout.
So perhaps I used the terminology wrong, will update this.
Also, I know it's a bit hacky to directly bork the scheduler's pending list
so this can definitely use some standardization. Open to suggestions.
Raag
> > Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> > ---
> > v3: Cancel in-flight jobs before FLR
> > ---
> > drivers/gpu/drm/xe/xe_gpu_scheduler.c | 11 +++++++++++
> > drivers/gpu/drm/xe/xe_gpu_scheduler.h | 1 +
> > drivers/gpu/drm/xe/xe_guc_submit.c | 24 ++++++++++++++++++++++++
> > drivers/gpu/drm/xe/xe_guc_submit.h | 1 +
> > 4 files changed, 37 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.c b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > index 9c8004d5dd91..c012dbe84540 100644
> > --- a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > +++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > @@ -90,6 +90,17 @@ void xe_sched_fini(struct xe_gpu_scheduler *sched)
> > drm_sched_fini(&sched->base);
> > }
> > +void xe_sched_submission_cancel(struct xe_gpu_scheduler *sched)
> > +{
> > + struct drm_gpu_scheduler *base = &sched->base;
> > + struct drm_sched_job *job, *tmp;
> > +
> > + list_for_each_entry_safe_reverse(job, tmp, &base->pending_list, list) {
> > + list_del(&job->list);
> > + base->ops->free_job(job);
> > + }
> > +}
> > +
> > void xe_sched_submission_start(struct xe_gpu_scheduler *sched)
> > {
> > drm_sched_wqueue_start(&sched->base);
> > diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.h b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
> > index 664c2db56af3..ba7892db8428 100644
> > --- a/drivers/gpu/drm/xe/xe_gpu_scheduler.h
> > +++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
> > @@ -19,6 +19,7 @@ int xe_sched_init(struct xe_gpu_scheduler *sched,
> > struct device *dev);
> > void xe_sched_fini(struct xe_gpu_scheduler *sched);
> > +void xe_sched_submission_cancel(struct xe_gpu_scheduler *sched);
> > void xe_sched_submission_start(struct xe_gpu_scheduler *sched);
> > void xe_sched_submission_stop(struct xe_gpu_scheduler *sched);
> > diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> > index de716c1fb18e..cba544cc185c 100644
> > --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> > +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> > @@ -2399,6 +2399,30 @@ void xe_guc_submit_stop(struct xe_guc *guc)
> > }
> > +/**
> > + * xe_guc_submit_cancel - Cancel all runs of submission tasks on given GuC.
> > + * @guc: the &xe_guc struct instance whose scheduler is to be cancelled
> > + */
> > +void xe_guc_submit_cancel(struct xe_guc *guc)
> > +{
> > + struct xe_exec_queue *q;
> > + unsigned long index;
> > +
> > + mutex_lock(&guc->submission_state.lock);
> > +
> > + xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
> > + struct xe_gpu_scheduler *sched = &q->guc->sched;
> > +
> > + /* Prevent redundant attempts to cancel parallel queues */
> > + if (q->guc->id != index)
> > + continue;
> > +
> > + xe_sched_submission_cancel(sched);
> > + }
> > +
> > + mutex_unlock(&guc->submission_state.lock);
> > +}
> > +
> > static void guc_exec_queue_revert_pending_state_change(struct xe_guc *guc,
> > struct xe_exec_queue *q)
> > {
> > diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
> > index b3839a90c142..f361a6d32fd3 100644
> > --- a/drivers/gpu/drm/xe/xe_guc_submit.h
> > +++ b/drivers/gpu/drm/xe/xe_guc_submit.h
> > @@ -16,6 +16,7 @@ int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids);
> > int xe_guc_submit_enable(struct xe_guc *guc);
> > void xe_guc_submit_disable(struct xe_guc *guc);
> > +void xe_guc_submit_cancel(struct xe_guc *guc);
> > int xe_guc_submit_reset_prepare(struct xe_guc *guc);
> > void xe_guc_submit_reset_wait(struct xe_guc *guc);
> > void xe_guc_submit_stop(struct xe_guc *guc);
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v3 03/10] drm/xe/guc_submit: Support cancelling submission
2026-03-15 9:58 ` Raag Jadav
@ 2026-03-16 2:31 ` Matthew Brost
0 siblings, 0 replies; 18+ messages in thread
From: Matthew Brost @ 2026-03-16 2:31 UTC (permalink / raw)
To: Raag Jadav; +Cc: Dong, Zhanjun, intel-xe
On Sun, Mar 15, 2026 at 10:58:57AM +0100, Raag Jadav wrote:
> On Fri, Mar 13, 2026 at 11:37:03AM -0400, Dong, Zhanjun wrote:
> > On 2026-03-08 9:55 a.m., Raag Jadav wrote:
> > > In preparation of usecases which require cancelling submission before
> > > PCIe FLR, introduce xe_guc_submit_cancel() helper. This cancels and
> > > frees any in-flight jobs on the scheduler.
> >
> > Could you put more info on why add new cancel functions rather than call
> > existing xe_sched_submission_stop?
> > From commit message, it looks very similar to stop, which also do stop +
> > free action.
>
Let me start by saying these GuC interfaces for global control are badly
named and undocumented, which is entirely my fault. We should clean
these up.
Let me explain what we currently have in place:
- xe_guc_submit_stop — Stops all scheduling on all queues, cleans up any
lost expected G2H, and triggers queue teardown on any queues with jobs
that have started but not completed.
- xe_guc_submit_start — Starts scheduling on all queues and resubmits
any jobs on queues that were not torn down in xe_guc_submit_stop,
- xe_guc_submit_pause — Stops scheduling on all queues.
- xe_guc_submit_pause_abort — Starts scheduling on all queues and
initiates teardown on all queues.
- xe_guc_submit_unpause — Resumes scheduling on all queues.
The use cases are:
- GT reset: xe_guc_submit_stop / xe_guc_submit_start
- Runtime PM d3cold: xe_guc_submit_stop / xe_guc_submit_start
- Runtime PM non-d3cold: xe_guc_submit_pause / xe_guc_submit_unpause
- Wedging: xe_guc_submit_stop / xe_guc_submit_pause_abort (added in [1])
- Driver unload: xe_guc_submit_stop / xe_guc_submit_pause_abort (added
in [1])
I think for FLR the combination you want is xe_guc_submit_stop /
xe_guc_submit_pause_abort — tear down all queues (and if the device is
already wedged, we’ve already done this [1] , but doing it again is
fine). However, this will tear down the kernel queues that are required
for the driver to become functional again.
So now that I think about it, I probably gave bad advice regarding
xe_exec_queue_reinit after [1]. In xe_migrate_reinit, just drop the ref
to m->q and create a new queue instead - I assume we can allocate memory
in FLR, if not this answer changes (e.g., we'd also need a hook to reach
in GuC backend to reinit the queues flags after all of its jobs have
drained).
> IIUC submission_stop() doesn't free any jobs, it just stops the scheduler
Initiatiating queue teardown will signal all fences, thus free the jobs.
So submission_stop can do this depending queue / job state -
xe_guc_submit_pause_abort will do this all queues. We just merged patch
changing xe_guc_submit_pause_abort behavior last week too [1], which
will affect your series if the device is wedged.
[1] https://patchwork.freedesktop.org/series/162978/
> and cancels wq used to run jobs. But this leaves the jobs on scheduler's
> pending list behind if they're not on the wq yet, which results in timeout.
> So perhaps I used the terminology wrong, will update this.
>
> Also, I know it's a bit hacky to directly bork the scheduler's pending list
> so this can definitely use some standardization. Open to suggestions.
>
> Raag
>
> > > Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> > > ---
> > > v3: Cancel in-flight jobs before FLR
> > > ---
> > > drivers/gpu/drm/xe/xe_gpu_scheduler.c | 11 +++++++++++
> > > drivers/gpu/drm/xe/xe_gpu_scheduler.h | 1 +
> > > drivers/gpu/drm/xe/xe_guc_submit.c | 24 ++++++++++++++++++++++++
> > > drivers/gpu/drm/xe/xe_guc_submit.h | 1 +
> > > 4 files changed, 37 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.c b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > > index 9c8004d5dd91..c012dbe84540 100644
> > > --- a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > > +++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
> > > @@ -90,6 +90,17 @@ void xe_sched_fini(struct xe_gpu_scheduler *sched)
> > > drm_sched_fini(&sched->base);
> > > }
> > > +void xe_sched_submission_cancel(struct xe_gpu_scheduler *sched)
> > > +{
> > > + struct drm_gpu_scheduler *base = &sched->base;
> > > + struct drm_sched_job *job, *tmp;
> > > +
> > > + list_for_each_entry_safe_reverse(job, tmp, &base->pending_list, list) {
> > > + list_del(&job->list);
> > > + base->ops->free_job(job);
> > > + }
Never do this. Use the queue teardown flows, which signal the fences and
therefore free the jobs. I can see how you reasoned this, but I suggest
rebasing on [1], as I believe it includes some pieces that were
previously missing to make FLR work.
Matt
> > > +}
> > > +
> > > void xe_sched_submission_start(struct xe_gpu_scheduler *sched)
> > > {
> > > drm_sched_wqueue_start(&sched->base);
> > > diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.h b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
> > > index 664c2db56af3..ba7892db8428 100644
> > > --- a/drivers/gpu/drm/xe/xe_gpu_scheduler.h
> > > +++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
> > > @@ -19,6 +19,7 @@ int xe_sched_init(struct xe_gpu_scheduler *sched,
> > > struct device *dev);
> > > void xe_sched_fini(struct xe_gpu_scheduler *sched);
> > > +void xe_sched_submission_cancel(struct xe_gpu_scheduler *sched);
> > > void xe_sched_submission_start(struct xe_gpu_scheduler *sched);
> > > void xe_sched_submission_stop(struct xe_gpu_scheduler *sched);
> > > diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> > > index de716c1fb18e..cba544cc185c 100644
> > > --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> > > +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> > > @@ -2399,6 +2399,30 @@ void xe_guc_submit_stop(struct xe_guc *guc)
> > > }
> > > +/**
> > > + * xe_guc_submit_cancel - Cancel all runs of submission tasks on given GuC.
> > > + * @guc: the &xe_guc struct instance whose scheduler is to be cancelled
> > > + */
> > > +void xe_guc_submit_cancel(struct xe_guc *guc)
> > > +{
> > > + struct xe_exec_queue *q;
> > > + unsigned long index;
> > > +
> > > + mutex_lock(&guc->submission_state.lock);
> > > +
> > > + xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
> > > + struct xe_gpu_scheduler *sched = &q->guc->sched;
> > > +
> > > + /* Prevent redundant attempts to cancel parallel queues */
> > > + if (q->guc->id != index)
> > > + continue;
> > > +
> > > + xe_sched_submission_cancel(sched);
> > > + }
> > > +
> > > + mutex_unlock(&guc->submission_state.lock);
> > > +}
> > > +
> > > static void guc_exec_queue_revert_pending_state_change(struct xe_guc *guc,
> > > struct xe_exec_queue *q)
> > > {
> > > diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
> > > index b3839a90c142..f361a6d32fd3 100644
> > > --- a/drivers/gpu/drm/xe/xe_guc_submit.h
> > > +++ b/drivers/gpu/drm/xe/xe_guc_submit.h
> > > @@ -16,6 +16,7 @@ int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids);
> > > int xe_guc_submit_enable(struct xe_guc *guc);
> > > void xe_guc_submit_disable(struct xe_guc *guc);
> > > +void xe_guc_submit_cancel(struct xe_guc *guc);
> > > int xe_guc_submit_reset_prepare(struct xe_guc *guc);
> > > void xe_guc_submit_reset_wait(struct xe_guc *guc);
> > > void xe_guc_submit_stop(struct xe_guc *guc);
> >
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2026-03-16 2:31 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-03-08 13:55 [PATCH v3 00/10] Introduce Xe PCIe FLR Raag Jadav
2026-03-08 13:55 ` [PATCH v3 01/10] drm/xe/uc_fw: Allow re-initializing firmware Raag Jadav
2026-03-08 13:55 ` [PATCH v3 02/10] drm/xe/hw_fence: Synchronize fence irq before destroying the job Raag Jadav
2026-03-08 13:55 ` [PATCH v3 03/10] drm/xe/guc_submit: Support cancelling submission Raag Jadav
2026-03-13 15:37 ` Dong, Zhanjun
2026-03-15 9:58 ` Raag Jadav
2026-03-16 2:31 ` Matthew Brost
2026-03-08 13:55 ` [PATCH v3 04/10] drm/xe/gt: Introduce FLR helpers Raag Jadav
2026-03-08 13:55 ` [PATCH v3 05/10] drm/xe/irq: Introduce xe_irq_disable() Raag Jadav
2026-03-08 13:55 ` [PATCH v3 06/10] drm/xe: Introduce xe_device_assert_lmem_ready() Raag Jadav
2026-03-08 13:55 ` [PATCH v3 07/10] drm/xe/bo_evict: Introduce xe_bo_restore_map() Raag Jadav
2026-03-08 13:55 ` [PATCH v3 08/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit() Raag Jadav
2026-03-08 13:55 ` [PATCH v3 09/10] drm/xe/migrate: Introduce xe_migrate_reinit() Raag Jadav
2026-03-08 13:55 ` [PATCH v3 10/10] drm/xe/pci: Introduce PCIe FLR Raag Jadav
2026-03-08 14:08 ` ✗ CI.checkpatch: warning for Introduce Xe PCIe FLR (rev3) Patchwork
2026-03-08 14:09 ` ✓ CI.KUnit: success " Patchwork
2026-03-08 14:50 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-08 15:49 ` ✓ Xe.CI.FULL: " Patchwork
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