* [PATCH v2 01/12] drm/i915/qgv: Use intel_de_read() for MTL_MEM_SS_INFO* reads
2026-03-31 15:42 [PATCH v2 00/12] drm/i915: More uncore nukage from display code Ville Syrjala
@ 2026-03-31 15:42 ` Ville Syrjala
2026-03-31 15:42 ` [PATCH v2 02/12] drm/i915/mchbar: Provide intel_mchbar_read*() abstraction Ville Syrjala
` (15 subsequent siblings)
16 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-03-31 15:42 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Jani Nikula
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The MTL_MEM_SS_INFO* are just regular display registers. Use
intel_de_read() to access them.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_bw.c | 6 +++---
drivers/gpu/drm/i915/display/intel_dram.c | 4 ++--
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 07b4531a4376..18b80147ddc7 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -9,6 +9,7 @@
#include "intel_bw.h"
#include "intel_crtc.h"
+#include "intel_de.h"
#include "intel_display_core.h"
#include "intel_display_regs.h"
#include "intel_display_types.h"
@@ -211,12 +212,11 @@ static int icl_pcode_restrict_qgv_points(struct intel_display *display,
static int mtl_read_qgv_point_info(struct intel_display *display,
struct intel_qgv_point *sp, int point)
{
- struct intel_uncore *uncore = to_intel_uncore(display->drm);
u32 val, val2;
u16 dclk;
- val = intel_uncore_read(uncore, MTL_MEM_SS_INFO_QGV_POINT_LOW(point));
- val2 = intel_uncore_read(uncore, MTL_MEM_SS_INFO_QGV_POINT_HIGH(point));
+ val = intel_de_read(display, MTL_MEM_SS_INFO_QGV_POINT_LOW(point));
+ val2 = intel_de_read(display, MTL_MEM_SS_INFO_QGV_POINT_HIGH(point));
dclk = REG_FIELD_GET(MTL_DCLK_MASK, val);
sp->dclk = DIV_ROUND_CLOSEST(16667 * dclk, 1000);
sp->t_rp = REG_FIELD_GET(MTL_TRP_MASK, val);
diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
index bd281d4b4c05..f05796417485 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.c
+++ b/drivers/gpu/drm/i915/display/intel_dram.c
@@ -9,6 +9,7 @@
#include <drm/drm_print.h>
#include <drm/intel/intel_pcode_regs.h>
+#include "intel_de.h"
#include "intel_display_core.h"
#include "intel_display_utils.h"
#include "intel_display_regs.h"
@@ -767,8 +768,7 @@ static int gen12_get_dram_info(struct intel_display *display, struct dram_info *
static int xelpdp_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
- struct intel_uncore *uncore = to_intel_uncore(display->drm);
- u32 val = intel_uncore_read(uncore, MTL_MEM_SS_INFO_GLOBAL);
+ u32 val = intel_de_read(display, MTL_MEM_SS_INFO_GLOBAL);
switch (REG_FIELD_GET(MTL_DDR_TYPE_MASK, val)) {
case 0:
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 02/12] drm/i915/mchbar: Provide intel_mchbar_read*() abstraction
2026-03-31 15:42 [PATCH v2 00/12] drm/i915: More uncore nukage from display code Ville Syrjala
2026-03-31 15:42 ` [PATCH v2 01/12] drm/i915/qgv: Use intel_de_read() for MTL_MEM_SS_INFO* reads Ville Syrjala
@ 2026-03-31 15:42 ` Ville Syrjala
2026-03-31 15:42 ` [PATCH v2 03/12] drm/i915/mchbar: Define the end of the MCHBAR mirror Ville Syrjala
` (14 subsequent siblings)
16 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-03-31 15:42 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Jani Nikula
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
MCHBAR registers are a bit special in that:
- we access them through the mirror
- the mirror is read only on HSW+
- the mirror requires the actual MCHBAR to be enabled in device 0:0.0
- the mirror is gone on MTL+
So I'd prefer to treat MCHBAR registers as a bit special in
the code as well, and do all accesses to them via dedicated
functions. Prodive such functions in the form of
intel_mchbar_read*().
v2: Put the function arguments on one line
No intel_uncore_read64() on xe, use intel_uncore_read64_2x32()
Name the new function intel_mchbar_read64_2x32() as well
Reviewed-by: Jani Nikula <jani.nikula@intel.com> #v1
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_mchbar.c | 30 +++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_mchbar.h | 19 +++++++++++++
drivers/gpu/drm/xe/Makefile | 1 +
4 files changed, 51 insertions(+)
create mode 100644 drivers/gpu/drm/i915/display/intel_mchbar.c
create mode 100644 drivers/gpu/drm/i915/display/intel_mchbar.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index b677720a1c2d..0e48305df8b2 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -295,6 +295,7 @@ i915-y += \
display/intel_link_bw.o \
display/intel_load_detect.o \
display/intel_lpe_audio.o \
+ display/intel_mchbar.o \
display/intel_modeset_lock.o \
display/intel_modeset_setup.o \
display/intel_modeset_verify.o \
diff --git a/drivers/gpu/drm/i915/display/intel_mchbar.c b/drivers/gpu/drm/i915/display/intel_mchbar.c
new file mode 100644
index 000000000000..2636fe60ef37
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_mchbar.c
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include "intel_display_core.h"
+#include "intel_mchbar.h"
+#include "intel_uncore.h"
+
+u16 intel_mchbar_read16(struct intel_display *display, i915_reg_t reg)
+{
+ struct intel_uncore *uncore = to_intel_uncore(display->drm);
+
+ return intel_uncore_read16(uncore, reg);
+}
+
+u32 intel_mchbar_read(struct intel_display *display, i915_reg_t reg)
+{
+ struct intel_uncore *uncore = to_intel_uncore(display->drm);
+
+ return intel_uncore_read(uncore, reg);
+}
+
+u64 intel_mchbar_read64_2x32(struct intel_display *display, i915_reg_t reg)
+{
+ struct intel_uncore *uncore = to_intel_uncore(display->drm);
+ i915_reg_t upper_reg = _MMIO(i915_mmio_reg_offset(reg) + 4);
+
+ return intel_uncore_read64_2x32(uncore, reg, upper_reg);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_mchbar.h b/drivers/gpu/drm/i915/display/intel_mchbar.h
new file mode 100644
index 000000000000..002a4454e8ed
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_mchbar.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef __INTEL_MCHBAR_H__
+#define __INTEL_MCHBAR_H__
+
+#include <linux/types.h>
+
+#include "i915_reg_defs.h"
+
+struct intel_display;
+
+u16 intel_mchbar_read16(struct intel_display *display, i915_reg_t reg);
+u32 intel_mchbar_read(struct intel_display *display, i915_reg_t reg);
+u64 intel_mchbar_read64_2x32(struct intel_display *display, i915_reg_t reg);
+
+#endif /* __INTEL_MCHBAR_H__ */
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 9dacb0579a7d..a86c553dc996 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -306,6 +306,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/intel_link_bw.o \
i915-display/intel_lspcon.o \
i915-display/intel_lt_phy.o \
+ i915-display/intel_mchbar.o \
i915-display/intel_modeset_lock.o \
i915-display/intel_modeset_setup.o \
i915-display/intel_modeset_verify.o \
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 03/12] drm/i915/mchbar: Define the end of the MCHBAR mirror
2026-03-31 15:42 [PATCH v2 00/12] drm/i915: More uncore nukage from display code Ville Syrjala
2026-03-31 15:42 ` [PATCH v2 01/12] drm/i915/qgv: Use intel_de_read() for MTL_MEM_SS_INFO* reads Ville Syrjala
2026-03-31 15:42 ` [PATCH v2 02/12] drm/i915/mchbar: Provide intel_mchbar_read*() abstraction Ville Syrjala
@ 2026-03-31 15:42 ` Ville Syrjala
2026-03-31 15:42 ` [PATCH v2 04/12] drm/i915/mchbar: WARN when accessing non-MCHBAR registers via intel_mchbar_read*() Ville Syrjala
` (13 subsequent siblings)
16 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-03-31 15:42 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Jani Nikula
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add defines for the end of the MCHBAR mirror. I'm planning to
use this for some range sanity checks.
BSpec: 51771
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_mchbar_regs.h | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_mchbar_regs.h b/drivers/gpu/drm/i915/intel_mchbar_regs.h
index 614d4017b57b..ca0d421be16c 100644
--- a/drivers/gpu/drm/i915/intel_mchbar_regs.h
+++ b/drivers/gpu/drm/i915/intel_mchbar_regs.h
@@ -16,11 +16,16 @@
* every way. It is not accessible from the CP register read instructions.
*
* Starting from Haswell, you can't write registers using the MCHBAR mirror,
- * just read.
+ * just read. On MTL+ the mirror no longer exists.
*/
#define MCHBAR_MIRROR_BASE 0x10000
+#define MCHBAR_MIRROR_END 0x13fff
+
#define MCHBAR_MIRROR_BASE_SNB 0x140000
+#define MCHBAR_MIRROR_END_SNB 0x147fff
+#define MCHBAR_MIRROR_END_ICL_RKL 0x14ffff
+#define MCHBAR_MIRROR_END_TGL 0x15ffff
#define CTG_STOLEN_RESERVED _MMIO(MCHBAR_MIRROR_BASE + 0x34)
#define ELK_STOLEN_RESERVED _MMIO(MCHBAR_MIRROR_BASE + 0x48)
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 04/12] drm/i915/mchbar: WARN when accessing non-MCHBAR registers via intel_mchbar_read*()
2026-03-31 15:42 [PATCH v2 00/12] drm/i915: More uncore nukage from display code Ville Syrjala
` (2 preceding siblings ...)
2026-03-31 15:42 ` [PATCH v2 03/12] drm/i915/mchbar: Define the end of the MCHBAR mirror Ville Syrjala
@ 2026-03-31 15:42 ` Ville Syrjala
2026-03-31 15:42 ` [PATCH v2 05/12] drm/i915/mchbar: Use intel_mchbar_read() instead of intel_de_read() Ville Syrjala
` (12 subsequent siblings)
16 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-03-31 15:42 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Jani Nikula
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The intel_mchbar_read*() functions should only be used for
accessing MCHBAR registers. Warn if someone tries to use
them for other registers.
I suppose we could even have a dedicated type for MCHBAR
registers. But that is true for many other special register
types as well, and so far we haven't bothered adding any
special types apart from i915_mcr_reg_t.
v2: Print the register offset (Jani)
Mention i915_mcr_reg_t (Jani)
Reviewed-by: Jani Nikula <jani.nikula@intel.com> #v1
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_mchbar.c | 56 +++++++++++++++++++++
1 file changed, 56 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_mchbar.c b/drivers/gpu/drm/i915/display/intel_mchbar.c
index 2636fe60ef37..a404fa38c9bd 100644
--- a/drivers/gpu/drm/i915/display/intel_mchbar.c
+++ b/drivers/gpu/drm/i915/display/intel_mchbar.c
@@ -3,14 +3,66 @@
* Copyright © 2026 Intel Corporation
*/
+#include <linux/minmax.h>
+
+#include <drm/drm_print.h>
+
#include "intel_display_core.h"
#include "intel_mchbar.h"
+#include "intel_mchbar_regs.h"
#include "intel_uncore.h"
+static bool has_mchbar_mirror(struct intel_display *display)
+{
+ return DISPLAY_VER(display) < 14;
+}
+
+static u32 mchbar_mirror_base(struct intel_display *display)
+{
+ if (DISPLAY_VER(display) >= 6)
+ return MCHBAR_MIRROR_BASE_SNB;
+ else
+ return MCHBAR_MIRROR_BASE;
+}
+
+static u32 mchbar_mirror_end(struct intel_display *display)
+{
+ if (DISPLAY_VER(display) >= 12 && !display->platform.rocketlake)
+ return MCHBAR_MIRROR_END_TGL;
+ else if (DISPLAY_VER(display) >= 11)
+ return MCHBAR_MIRROR_END_ICL_RKL;
+ else if (DISPLAY_VER(display) >= 6)
+ return MCHBAR_MIRROR_END_SNB;
+ else
+ return MCHBAR_MIRROR_END;
+}
+
+static u32 mchbar_mirror_len(struct intel_display *display)
+{
+ return mchbar_mirror_end(display) - mchbar_mirror_base(display) + 1;
+}
+
+static bool is_mchbar_reg(struct intel_display *display, i915_reg_t reg)
+{
+ return has_mchbar_mirror(display) &&
+ in_range32(i915_mmio_reg_offset(reg),
+ mchbar_mirror_base(display),
+ mchbar_mirror_len(display));
+}
+
+static void assert_is_mchbar_reg(struct intel_display *display, i915_reg_t reg)
+{
+ drm_WARN(display->drm, !is_mchbar_reg(display, reg),
+ "Reading non-MCHBAR register 0x%x\n",
+ i915_mmio_reg_offset(reg));
+}
+
u16 intel_mchbar_read16(struct intel_display *display, i915_reg_t reg)
{
struct intel_uncore *uncore = to_intel_uncore(display->drm);
+ assert_is_mchbar_reg(display, reg);
+
return intel_uncore_read16(uncore, reg);
}
@@ -18,6 +70,8 @@ u32 intel_mchbar_read(struct intel_display *display, i915_reg_t reg)
{
struct intel_uncore *uncore = to_intel_uncore(display->drm);
+ assert_is_mchbar_reg(display, reg);
+
return intel_uncore_read(uncore, reg);
}
@@ -26,5 +80,7 @@ u64 intel_mchbar_read64_2x32(struct intel_display *display, i915_reg_t reg)
struct intel_uncore *uncore = to_intel_uncore(display->drm);
i915_reg_t upper_reg = _MMIO(i915_mmio_reg_offset(reg) + 4);
+ assert_is_mchbar_reg(display, reg);
+
return intel_uncore_read64_2x32(uncore, reg, upper_reg);
}
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 05/12] drm/i915/mchbar: Use intel_mchbar_read() instead of intel_de_read()
2026-03-31 15:42 [PATCH v2 00/12] drm/i915: More uncore nukage from display code Ville Syrjala
` (3 preceding siblings ...)
2026-03-31 15:42 ` [PATCH v2 04/12] drm/i915/mchbar: WARN when accessing non-MCHBAR registers via intel_mchbar_read*() Ville Syrjala
@ 2026-03-31 15:42 ` Ville Syrjala
2026-03-31 15:42 ` [PATCH v2 06/12] drm/i915/mchbar: Use intel_mchbar_read*() instead of intel_uncore_read*() Ville Syrjala
` (11 subsequent siblings)
16 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-03-31 15:42 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Jani Nikula
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We are doing a few accesses to MCHBAR registers with intel_de_read().
Use the dedicated intel_mchbar_read() instead.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 5 +++--
drivers/gpu/drm/i915/display/intel_display_power.c | 3 ++-
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index a47736613f6e..3a84c95474c6 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -41,6 +41,7 @@
#include "intel_display_utils.h"
#include "intel_display_wa.h"
#include "intel_dram.h"
+#include "intel_mchbar.h"
#include "intel_mchbar_regs.h"
#include "intel_parent.h"
#include "intel_pci_config.h"
@@ -376,8 +377,8 @@ static unsigned int intel_hpll_vco(struct intel_display *display)
else
return 0;
- tmp = intel_de_read(display, display->platform.pineview ||
- display->platform.mobile ? HPLLVCO_MOBILE : HPLLVCO);
+ tmp = intel_mchbar_read(display, display->platform.pineview ||
+ display->platform.mobile ? HPLLVCO_MOBILE : HPLLVCO);
vco = vco_table[tmp & 0x7];
if (vco == 0)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index ec96b141c74c..8da2990395e0 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -24,6 +24,7 @@
#include "intel_display_wa.h"
#include "intel_dmc.h"
#include "intel_dram.h"
+#include "intel_mchbar.h"
#include "intel_mchbar_regs.h"
#include "intel_parent.h"
#include "intel_pch_refclk.h"
@@ -1252,7 +1253,7 @@ static void assert_can_disable_lcpll(struct intel_display *display)
static u32 hsw_read_dcomp(struct intel_display *display)
{
if (display->platform.haswell)
- return intel_de_read(display, D_COMP_HSW);
+ return intel_mchbar_read(display, D_COMP_HSW);
else
return intel_de_read(display, D_COMP_BDW);
}
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 06/12] drm/i915/mchbar: Use intel_mchbar_read*() instead of intel_uncore_read*()
2026-03-31 15:42 [PATCH v2 00/12] drm/i915: More uncore nukage from display code Ville Syrjala
` (4 preceding siblings ...)
2026-03-31 15:42 ` [PATCH v2 05/12] drm/i915/mchbar: Use intel_mchbar_read() instead of intel_de_read() Ville Syrjala
@ 2026-03-31 15:42 ` Ville Syrjala
2026-03-31 15:42 ` [PATCH v2 07/12] drm/i915/de: Add intel_de_read16() Ville Syrjala
` (10 subsequent siblings)
16 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-03-31 15:42 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Jani Nikula
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Replace all the naked intel_uncore_read*() accesses to MCHBAR
registers with the dedicated intel_mchbar_read*().
v2: Rebase due to the intel_mchbar_read64_2x32() rename
Reviewed-by: Jani Nikula <jani.nikula@intel.com> #v1
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/i9xx_wm.c | 10 ++++----
drivers/gpu/drm/i915/display/intel_bw.c | 11 ++++-----
drivers/gpu/drm/i915/display/intel_dram.c | 29 ++++++++---------------
3 files changed, 19 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 9e170e79dcf6..b0415d886ba3 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -19,6 +19,7 @@
#include "intel_display_utils.h"
#include "intel_dram.h"
#include "intel_fb.h"
+#include "intel_mchbar.h"
#include "intel_mchbar_regs.h"
#include "intel_wm.h"
#include "skl_watermark.h"
@@ -2742,12 +2743,11 @@ static void ilk_compute_wm_level(struct intel_display *display,
static void hsw_read_wm_latency(struct intel_display *display, u16 wm[])
{
- struct intel_uncore *uncore = to_intel_uncore(display->drm);
u64 sskpd;
display->wm.num_levels = 5;
- sskpd = intel_uncore_read64(uncore, MCH_SSKPD);
+ sskpd = intel_mchbar_read64_2x32(display, MCH_SSKPD);
wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
if (wm[0] == 0)
@@ -2760,12 +2760,11 @@ static void hsw_read_wm_latency(struct intel_display *display, u16 wm[])
static void snb_read_wm_latency(struct intel_display *display, u16 wm[])
{
- struct intel_uncore *uncore = to_intel_uncore(display->drm);
u32 sskpd;
display->wm.num_levels = 4;
- sskpd = intel_uncore_read(uncore, MCH_SSKPD);
+ sskpd = intel_mchbar_read(display, MCH_SSKPD);
wm[0] = REG_FIELD_GET(SSKPD_WM0_MASK_SNB, sskpd);
wm[1] = REG_FIELD_GET(SSKPD_WM1_MASK_SNB, sskpd);
@@ -2775,12 +2774,11 @@ static void snb_read_wm_latency(struct intel_display *display, u16 wm[])
static void ilk_read_wm_latency(struct intel_display *display, u16 wm[])
{
- struct intel_uncore *uncore = to_intel_uncore(display->drm);
u32 mltr;
display->wm.num_levels = 3;
- mltr = intel_uncore_read(uncore, MLTR_ILK);
+ mltr = intel_mchbar_read(display, MLTR_ILK);
/* ILK primary LP0 latency is 700 ns */
wm[0] = 7;
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 18b80147ddc7..e6c8fd630294 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -15,9 +15,9 @@
#include "intel_display_types.h"
#include "intel_display_utils.h"
#include "intel_dram.h"
+#include "intel_mchbar.h"
#include "intel_mchbar_regs.h"
#include "intel_parent.h"
-#include "intel_uncore.h"
#include "skl_watermark.h"
struct intel_bw_state {
@@ -75,11 +75,10 @@ static int dg1_mchbar_read_qgv_point_info(struct intel_display *display,
struct intel_qgv_point *sp,
int point)
{
- struct intel_uncore *uncore = to_intel_uncore(display->drm);
u32 dclk_ratio, dclk_reference;
u32 val;
- val = intel_uncore_read(uncore, SA_PERF_STATUS_0_0_0_MCHBAR_PC);
+ val = intel_mchbar_read(display, SA_PERF_STATUS_0_0_0_MCHBAR_PC);
dclk_ratio = REG_FIELD_GET(DG1_QCLK_RATIO_MASK, val);
if (val & DG1_QCLK_REFERENCE)
dclk_reference = 6; /* 6 * 16.666 MHz = 100 MHz */
@@ -87,18 +86,18 @@ static int dg1_mchbar_read_qgv_point_info(struct intel_display *display,
dclk_reference = 8; /* 8 * 16.666 MHz = 133 MHz */
sp->dclk = DIV_ROUND_UP((16667 * dclk_ratio * dclk_reference) + 500, 1000);
- val = intel_uncore_read(uncore, SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU);
+ val = intel_mchbar_read(display, SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU);
if (val & DG1_GEAR_TYPE)
sp->dclk *= 2;
if (sp->dclk == 0)
return -EINVAL;
- val = intel_uncore_read(uncore, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR);
+ val = intel_mchbar_read(display, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR);
sp->t_rp = REG_FIELD_GET(DG1_DRAM_T_RP_MASK, val);
sp->t_rdpre = REG_FIELD_GET(DG1_DRAM_T_RDPRE_MASK, val);
- val = intel_uncore_read(uncore, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR_HIGH);
+ val = intel_mchbar_read(display, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR_HIGH);
sp->t_rcd = REG_FIELD_GET(DG1_DRAM_T_RCD_MASK, val);
sp->t_ras = REG_FIELD_GET(DG1_DRAM_T_RAS_MASK, val);
diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
index f05796417485..05da74534a5a 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.c
+++ b/drivers/gpu/drm/i915/display/intel_dram.c
@@ -14,9 +14,9 @@
#include "intel_display_utils.h"
#include "intel_display_regs.h"
#include "intel_dram.h"
+#include "intel_mchbar.h"
#include "intel_mchbar_regs.h"
#include "intel_parent.h"
-#include "intel_uncore.h"
#include "vlv_iosf_sb.h"
struct dram_dimm_info {
@@ -59,18 +59,15 @@ const char *intel_dram_type_str(enum intel_dram_type type)
static enum intel_dram_type pnv_dram_type(struct intel_display *display)
{
- struct intel_uncore *uncore = to_intel_uncore(display->drm);
-
- return intel_uncore_read(uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3 ?
+ return intel_mchbar_read(display, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3 ?
INTEL_DRAM_DDR3 : INTEL_DRAM_DDR2;
}
static unsigned int pnv_mem_freq(struct intel_display *display)
{
- struct intel_uncore *uncore = to_intel_uncore(display->drm);
u32 tmp;
- tmp = intel_uncore_read(uncore, CLKCFG);
+ tmp = intel_mchbar_read(display, CLKCFG);
switch (tmp & CLKCFG_MEM_MASK) {
case CLKCFG_MEM_533:
@@ -86,10 +83,9 @@ static unsigned int pnv_mem_freq(struct intel_display *display)
static unsigned int ilk_mem_freq(struct intel_display *display)
{
- struct intel_uncore *uncore = to_intel_uncore(display->drm);
u16 ddrpll;
- ddrpll = intel_uncore_read16(uncore, DDRMPLL1);
+ ddrpll = intel_mchbar_read16(display, DDRMPLL1);
switch (ddrpll & 0xff) {
case 0xc:
return 800000;
@@ -159,7 +155,6 @@ unsigned int intel_mem_freq(struct intel_display *display)
static unsigned int i9xx_fsb_freq(struct intel_display *display)
{
- struct intel_uncore *uncore = to_intel_uncore(display->drm);
u32 fsb;
/*
@@ -170,7 +165,7 @@ static unsigned int i9xx_fsb_freq(struct intel_display *display)
* don't know which registers have that information,
* and all the relevant docs have gone to bit heaven :(
*/
- fsb = intel_uncore_read(uncore, CLKCFG) & CLKCFG_FSB_MASK;
+ fsb = intel_mchbar_read(display, CLKCFG) & CLKCFG_FSB_MASK;
if (display->platform.pineview || display->platform.mobile) {
switch (fsb) {
@@ -215,10 +210,9 @@ static unsigned int i9xx_fsb_freq(struct intel_display *display)
static unsigned int ilk_fsb_freq(struct intel_display *display)
{
- struct intel_uncore *uncore = to_intel_uncore(display->drm);
u16 fsb;
- fsb = intel_uncore_read16(uncore, CSIPLL0) & 0x3ff;
+ fsb = intel_mchbar_read16(display, CSIPLL0) & 0x3ff;
switch (fsb) {
case 0x00c:
@@ -485,7 +479,6 @@ intel_is_dram_symmetric(const struct dram_channel_info *ch0,
static int
skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram_info)
{
- struct intel_uncore *uncore = to_intel_uncore(display->drm);
struct dram_channel_info ch0 = {}, ch1 = {};
u32 val;
int ret;
@@ -493,12 +486,12 @@ skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram
/* Assume 16Gb+ DIMMs are present until proven otherwise */
dram_info->has_16gb_dimms = true;
- val = intel_uncore_read(uncore, SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
+ val = intel_mchbar_read(display, SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
ret = skl_dram_get_channel_info(display, &ch0, 0, val);
if (ret == 0)
dram_info->num_channels++;
- val = intel_uncore_read(uncore, SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
+ val = intel_mchbar_read(display, SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
ret = skl_dram_get_channel_info(display, &ch1, 1, val);
if (ret == 0)
dram_info->num_channels++;
@@ -529,10 +522,9 @@ skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram
static enum intel_dram_type
skl_get_dram_type(struct intel_display *display)
{
- struct intel_uncore *uncore = to_intel_uncore(display->drm);
u32 val;
- val = intel_uncore_read(uncore, SKL_MAD_INTER_CHANNEL_0_0_0_MCHBAR_MCMAIN);
+ val = intel_mchbar_read(display, SKL_MAD_INTER_CHANNEL_0_0_0_MCHBAR_MCMAIN);
switch (val & SKL_DRAM_DDR_TYPE_MASK) {
case SKL_DRAM_DDR_TYPE_DDR3:
@@ -643,7 +635,6 @@ static void bxt_get_dimm_info(struct dram_dimm_info *dimm, u32 val)
static int bxt_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
- struct intel_uncore *uncore = to_intel_uncore(display->drm);
u32 val;
u8 valid_ranks = 0;
int i;
@@ -655,7 +646,7 @@ static int bxt_get_dram_info(struct intel_display *display, struct dram_info *dr
struct dram_dimm_info dimm;
enum intel_dram_type type;
- val = intel_uncore_read(uncore, BXT_D_CR_DRP0_DUNIT(i));
+ val = intel_mchbar_read(display, BXT_D_CR_DRP0_DUNIT(i));
if (val == 0xFFFFFFFF)
continue;
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 07/12] drm/i915/de: Add intel_de_read16()
2026-03-31 15:42 [PATCH v2 00/12] drm/i915: More uncore nukage from display code Ville Syrjala
` (5 preceding siblings ...)
2026-03-31 15:42 ` [PATCH v2 06/12] drm/i915/mchbar: Use intel_mchbar_read*() instead of intel_uncore_read*() Ville Syrjala
@ 2026-03-31 15:42 ` Ville Syrjala
2026-03-31 15:42 ` [PATCH v2 08/12] drm/i915/de: s/intel_de_read64_2x32()/intel_de_read64_2x32_volatile()/ Ville Syrjala
` (9 subsequent siblings)
16 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-03-31 15:42 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Jani Nikula
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We'll need a replacement for intel_uncore_read16() in order to
untangle intel_mchbar_read16() from uncore. As with the 8 bit
counterpart this doesn't need to work on modern platforms
so we can forgo all the DMC wakelock stuff and whatnot.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_de.c | 8 ++++++++
drivers/gpu/drm/i915/display/intel_de.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_de.c b/drivers/gpu/drm/i915/display/intel_de.c
index d2a418da2d54..a96e83d76eaa 100644
--- a/drivers/gpu/drm/i915/display/intel_de.c
+++ b/drivers/gpu/drm/i915/display/intel_de.c
@@ -176,3 +176,11 @@ void intel_de_write8(struct intel_display *display, i915_reg_t reg, u8 val)
intel_uncore_write8(__to_uncore(display), reg, val);
}
+
+u16 intel_de_read16(struct intel_display *display, i915_reg_t reg)
+{
+ /* this is only used on MCHBAR registers on pre-SNB */
+ drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 6);
+
+ return intel_uncore_read16(__to_uncore(display), reg);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
index f87b84ab9d6d..3f9861b7a589 100644
--- a/drivers/gpu/drm/i915/display/intel_de.h
+++ b/drivers/gpu/drm/i915/display/intel_de.h
@@ -19,6 +19,7 @@ static inline struct intel_uncore *__to_uncore(struct intel_display *display)
u8 intel_de_read8(struct intel_display *display, i915_reg_t reg);
void intel_de_write8(struct intel_display *display, i915_reg_t reg, u8 val);
+u16 intel_de_read16(struct intel_display *display, i915_reg_t reg);
static inline u32
intel_de_read(struct intel_display *display, i915_reg_t reg)
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 08/12] drm/i915/de: s/intel_de_read64_2x32()/intel_de_read64_2x32_volatile()/
2026-03-31 15:42 [PATCH v2 00/12] drm/i915: More uncore nukage from display code Ville Syrjala
` (6 preceding siblings ...)
2026-03-31 15:42 ` [PATCH v2 07/12] drm/i915/de: Add intel_de_read16() Ville Syrjala
@ 2026-03-31 15:42 ` Ville Syrjala
2026-03-31 15:42 ` [PATCH v2 09/12] drm/i915/de: Add a simple intel_de_read64_2x32() Ville Syrjala
` (8 subsequent siblings)
16 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-03-31 15:42 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Jani Nikula
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The raison d'etre of intel_de_read64_2x32() is that it can
handle registers where volatile values are split across two
registers. I don't like that it's being used needlessly.
Rename it to intel_de_read64_2x32_volatile() to make it
more clear when it should be used.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_de.h | 4 ++--
drivers/gpu/drm/i915/display/intel_vblank.c | 4 ++--
drivers/gpu/drm/i915/display/intel_vrr.c | 8 ++++----
3 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
index 3f9861b7a589..295e7176b732 100644
--- a/drivers/gpu/drm/i915/display/intel_de.h
+++ b/drivers/gpu/drm/i915/display/intel_de.h
@@ -36,8 +36,8 @@ intel_de_read(struct intel_display *display, i915_reg_t reg)
}
static inline u64
-intel_de_read64_2x32(struct intel_display *display,
- i915_reg_t lower_reg, i915_reg_t upper_reg)
+intel_de_read64_2x32_volatile(struct intel_display *display,
+ i915_reg_t lower_reg, i915_reg_t upper_reg)
{
u64 val;
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 1b7cfe226ff8..0726a2abed38 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -109,8 +109,8 @@ u32 i915_get_vblank_counter(struct drm_crtc *crtc)
* we get a low value that's stable across two reads of the high
* register.
*/
- frame = intel_de_read64_2x32(display, PIPEFRAMEPIXEL(display, pipe),
- PIPEFRAME(display, pipe));
+ frame = intel_de_read64_2x32_volatile(display, PIPEFRAMEPIXEL(display, pipe),
+ PIPEFRAME(display, pipe));
pixel = frame & PIPE_PIXEL_MASK;
frame = (frame >> PIPE_FRAME_LOW_SHIFT) & 0xffffff;
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 8a957804cb97..ae5385e92889 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -1053,11 +1053,11 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
if (crtc_state->cmrr.enable) {
crtc_state->cmrr.cmrr_n =
- intel_de_read64_2x32(display, TRANS_CMRR_N_LO(display, cpu_transcoder),
- TRANS_CMRR_N_HI(display, cpu_transcoder));
+ intel_de_read64_2x32_volatile(display, TRANS_CMRR_N_LO(display, cpu_transcoder),
+ TRANS_CMRR_N_HI(display, cpu_transcoder));
crtc_state->cmrr.cmrr_m =
- intel_de_read64_2x32(display, TRANS_CMRR_M_LO(display, cpu_transcoder),
- TRANS_CMRR_M_HI(display, cpu_transcoder));
+ intel_de_read64_2x32_volatile(display, TRANS_CMRR_M_LO(display, cpu_transcoder),
+ TRANS_CMRR_M_HI(display, cpu_transcoder));
}
if (DISPLAY_VER(display) >= 13) {
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 09/12] drm/i915/de: Add a simple intel_de_read64_2x32()
2026-03-31 15:42 [PATCH v2 00/12] drm/i915: More uncore nukage from display code Ville Syrjala
` (7 preceding siblings ...)
2026-03-31 15:42 ` [PATCH v2 08/12] drm/i915/de: s/intel_de_read64_2x32()/intel_de_read64_2x32_volatile()/ Ville Syrjala
@ 2026-03-31 15:42 ` Ville Syrjala
2026-03-31 15:42 ` [PATCH v2 10/12] drm/i915/vrr: Use intel_de_read64_2x32() Ville Syrjala
` (7 subsequent siblings)
16 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-03-31 15:42 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Jani Nikula
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
intel_de_read64_2x32_volatile() is a complex beast because
it needs to deal with volatile register values. For simpler
cases we can simply do a pair normal intel_de_read()s.
My main reason for hating overuse of intel_de_read64_2x32_volatile()
is that it makes register tracepoints confusing. It always
does three accesses in the somewhat weird udw,ldw,udw order,
confusing the reader of the trace. Much more clear if we just
observe the two reads in the natural little endian order.
We also have no non-volatile use case where the LDW and UDW
are stored in non-consecutive registers, so we can just pass
along a single register offset.
v2: Put the function arguments on one line (Jani)
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_de.h | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
index 295e7176b732..14f9dc7b6dfd 100644
--- a/drivers/gpu/drm/i915/display/intel_de.h
+++ b/drivers/gpu/drm/i915/display/intel_de.h
@@ -53,6 +53,18 @@ intel_de_read64_2x32_volatile(struct intel_display *display,
return val;
}
+static inline u64
+intel_de_read64_2x32(struct intel_display *display, i915_reg_t reg)
+{
+ i915_reg_t upper_reg = _MMIO(i915_mmio_reg_offset(reg) + 4);
+ u32 lower, upper;
+
+ lower = intel_de_read(display, reg);
+ upper = intel_de_read(display, upper_reg);
+
+ return (u64)upper << 32 | lower;
+}
+
static inline void
intel_de_posting_read(struct intel_display *display, i915_reg_t reg)
{
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 10/12] drm/i915/vrr: Use intel_de_read64_2x32()
2026-03-31 15:42 [PATCH v2 00/12] drm/i915: More uncore nukage from display code Ville Syrjala
` (8 preceding siblings ...)
2026-03-31 15:42 ` [PATCH v2 09/12] drm/i915/de: Add a simple intel_de_read64_2x32() Ville Syrjala
@ 2026-03-31 15:42 ` Ville Syrjala
2026-03-31 15:42 ` [PATCH v2 11/12] drm/i915/mchbar: Use intel_de_read*() for MCHBAR register accesses Ville Syrjala
` (6 subsequent siblings)
16 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-03-31 15:42 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Jani Nikula
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Replace the pointless use of intel_de_read64_2x32_volatile()
with the simpler intel_de_read64_2x32().
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index ae5385e92889..fae1186a90b2 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -1053,11 +1053,9 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
if (crtc_state->cmrr.enable) {
crtc_state->cmrr.cmrr_n =
- intel_de_read64_2x32_volatile(display, TRANS_CMRR_N_LO(display, cpu_transcoder),
- TRANS_CMRR_N_HI(display, cpu_transcoder));
+ intel_de_read64_2x32(display, TRANS_CMRR_N_LO(display, cpu_transcoder));
crtc_state->cmrr.cmrr_m =
- intel_de_read64_2x32_volatile(display, TRANS_CMRR_M_LO(display, cpu_transcoder),
- TRANS_CMRR_M_HI(display, cpu_transcoder));
+ intel_de_read64_2x32(display, TRANS_CMRR_M_LO(display, cpu_transcoder));
}
if (DISPLAY_VER(display) >= 13) {
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 11/12] drm/i915/mchbar: Use intel_de_read*() for MCHBAR register accesses
2026-03-31 15:42 [PATCH v2 00/12] drm/i915: More uncore nukage from display code Ville Syrjala
` (9 preceding siblings ...)
2026-03-31 15:42 ` [PATCH v2 10/12] drm/i915/vrr: Use intel_de_read64_2x32() Ville Syrjala
@ 2026-03-31 15:42 ` Ville Syrjala
2026-03-31 15:42 ` [PATCH v2 12/12] drm/i915/rom: Use intel_de for SPI ROM register access Ville Syrjala
` (5 subsequent siblings)
16 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-03-31 15:42 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Jani Nikula
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Replace the naked intel_uncore_read*() with intel_de_read*()
in the MCHBAR code.
v2: Rebase due to intel_uncore_read64_2x32()
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_mchbar.c | 15 ++++-----------
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_mchbar.c b/drivers/gpu/drm/i915/display/intel_mchbar.c
index a404fa38c9bd..16fcfe1e93ec 100644
--- a/drivers/gpu/drm/i915/display/intel_mchbar.c
+++ b/drivers/gpu/drm/i915/display/intel_mchbar.c
@@ -7,10 +7,10 @@
#include <drm/drm_print.h>
+#include "intel_de.h"
#include "intel_display_core.h"
#include "intel_mchbar.h"
#include "intel_mchbar_regs.h"
-#include "intel_uncore.h"
static bool has_mchbar_mirror(struct intel_display *display)
{
@@ -59,28 +59,21 @@ static void assert_is_mchbar_reg(struct intel_display *display, i915_reg_t reg)
u16 intel_mchbar_read16(struct intel_display *display, i915_reg_t reg)
{
- struct intel_uncore *uncore = to_intel_uncore(display->drm);
-
assert_is_mchbar_reg(display, reg);
- return intel_uncore_read16(uncore, reg);
+ return intel_de_read16(display, reg);
}
u32 intel_mchbar_read(struct intel_display *display, i915_reg_t reg)
{
- struct intel_uncore *uncore = to_intel_uncore(display->drm);
-
assert_is_mchbar_reg(display, reg);
- return intel_uncore_read(uncore, reg);
+ return intel_de_read(display, reg);
}
u64 intel_mchbar_read64_2x32(struct intel_display *display, i915_reg_t reg)
{
- struct intel_uncore *uncore = to_intel_uncore(display->drm);
- i915_reg_t upper_reg = _MMIO(i915_mmio_reg_offset(reg) + 4);
-
assert_is_mchbar_reg(display, reg);
- return intel_uncore_read64_2x32(uncore, reg, upper_reg);
+ return intel_de_read64_2x32(display, reg);
}
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 12/12] drm/i915/rom: Use intel_de for SPI ROM register access
2026-03-31 15:42 [PATCH v2 00/12] drm/i915: More uncore nukage from display code Ville Syrjala
` (10 preceding siblings ...)
2026-03-31 15:42 ` [PATCH v2 11/12] drm/i915/mchbar: Use intel_de_read*() for MCHBAR register accesses Ville Syrjala
@ 2026-03-31 15:42 ` Ville Syrjala
2026-03-31 16:41 ` ✗ CI.checkpatch: warning for drm/i915: More uncore nukage from display code (rev3) Patchwork
` (4 subsequent siblings)
16 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjala @ 2026-03-31 15:42 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Jani Nikula
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Since we moved intel_rom.c back into the display code, just
use intel_de_{read,write}() for the register accesses.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_rom.c | 19 ++++++++++---------
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_rom.c b/drivers/gpu/drm/i915/display/intel_rom.c
index d573059fb0d9..54f842c09fb0 100644
--- a/drivers/gpu/drm/i915/display/intel_rom.c
+++ b/drivers/gpu/drm/i915/display/intel_rom.c
@@ -7,8 +7,9 @@
#include <drm/drm_device.h>
+#include "intel_de.h"
+#include "intel_display_types.h"
#include "intel_rom.h"
-#include "intel_uncore.h"
#include "intel_oprom_regs.h"
struct intel_rom {
@@ -17,7 +18,7 @@ struct intel_rom {
void __iomem *oprom;
/* for SPI */
- struct intel_uncore *uncore;
+ struct intel_display *display;
loff_t offset;
size_t size;
@@ -30,10 +31,10 @@ struct intel_rom {
static u32 spi_read32(struct intel_rom *rom, loff_t offset)
{
- intel_uncore_write(rom->uncore, PRIMARY_SPI_ADDRESS,
- rom->offset + offset);
+ intel_de_write(rom->display, PRIMARY_SPI_ADDRESS,
+ rom->offset + offset);
- return intel_uncore_read(rom->uncore, PRIMARY_SPI_TRIGGER);
+ return intel_de_read(rom->display, PRIMARY_SPI_TRIGGER);
}
static u16 spi_read16(struct intel_rom *rom, loff_t offset)
@@ -50,13 +51,13 @@ struct intel_rom *intel_rom_spi(struct drm_device *drm)
if (!rom)
return NULL;
- rom->uncore = to_intel_uncore(drm);
+ rom->display = to_intel_display(drm);
- static_region = intel_uncore_read(rom->uncore, SPI_STATIC_REGIONS);
+ static_region = intel_de_read(rom->display, SPI_STATIC_REGIONS);
static_region &= OPTIONROM_SPI_REGIONID_MASK;
- intel_uncore_write(rom->uncore, PRIMARY_SPI_REGIONID, static_region);
+ intel_de_write(rom->display, PRIMARY_SPI_REGIONID, static_region);
- rom->offset = intel_uncore_read(rom->uncore, OROM_OFFSET) & OROM_OFFSET_MASK;
+ rom->offset = intel_de_read(rom->display, OROM_OFFSET) & OROM_OFFSET_MASK;
rom->size = 0x200000;
--
2.52.0
^ permalink raw reply related [flat|nested] 18+ messages in thread* ✗ CI.checkpatch: warning for drm/i915: More uncore nukage from display code (rev3)
2026-03-31 15:42 [PATCH v2 00/12] drm/i915: More uncore nukage from display code Ville Syrjala
` (11 preceding siblings ...)
2026-03-31 15:42 ` [PATCH v2 12/12] drm/i915/rom: Use intel_de for SPI ROM register access Ville Syrjala
@ 2026-03-31 16:41 ` Patchwork
2026-03-31 16:42 ` ✓ CI.KUnit: success " Patchwork
` (3 subsequent siblings)
16 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-03-31 16:41 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
== Series Details ==
Series: drm/i915: More uncore nukage from display code (rev3)
URL : https://patchwork.freedesktop.org/series/163872/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit b366536f225dba9bc693f3fe03083c8941caac50
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Tue Mar 31 18:42:59 2026 +0300
drm/i915/rom: Use intel_de for SPI ROM register access
Since we moved intel_rom.c back into the display code, just
use intel_de_{read,write}() for the register accesses.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+ /mt/dim checkpatch 779129c7868f4c7205901d6e57b25de52b411d1c drm-intel
05f15ccccf10 drm/i915/qgv: Use intel_de_read() for MTL_MEM_SS_INFO* reads
84bb8a98efa9 drm/i915/mchbar: Provide intel_mchbar_read*() abstraction
-:40: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#40:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 63 lines checked
0da11f4a94c5 drm/i915/mchbar: Define the end of the MCHBAR mirror
5e79193a522f drm/i915/mchbar: WARN when accessing non-MCHBAR registers via intel_mchbar_read*()
a0790bf612f5 drm/i915/mchbar: Use intel_mchbar_read() instead of intel_de_read()
fab5f6f85a24 drm/i915/mchbar: Use intel_mchbar_read*() instead of intel_uncore_read*()
c4bbed92a180 drm/i915/de: Add intel_de_read16()
7fcee374d173 drm/i915/de: s/intel_de_read64_2x32()/intel_de_read64_2x32_volatile()/
-:60: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#60: FILE: drivers/gpu/drm/i915/display/intel_vrr.c:1056:
+ intel_de_read64_2x32_volatile(display, TRANS_CMRR_N_LO(display, cpu_transcoder),
-:65: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#65: FILE: drivers/gpu/drm/i915/display/intel_vrr.c:1059:
+ intel_de_read64_2x32_volatile(display, TRANS_CMRR_M_LO(display, cpu_transcoder),
total: 0 errors, 2 warnings, 0 checks, 35 lines checked
0a7dac98ed0e drm/i915/de: Add a simple intel_de_read64_2x32()
a0d3ac3aca0e drm/i915/vrr: Use intel_de_read64_2x32()
51b33a5fc6b1 drm/i915/mchbar: Use intel_de_read*() for MCHBAR register accesses
b366536f225d drm/i915/rom: Use intel_de for SPI ROM register access
^ permalink raw reply [flat|nested] 18+ messages in thread* ✓ CI.KUnit: success for drm/i915: More uncore nukage from display code (rev3)
2026-03-31 15:42 [PATCH v2 00/12] drm/i915: More uncore nukage from display code Ville Syrjala
` (12 preceding siblings ...)
2026-03-31 16:41 ` ✗ CI.checkpatch: warning for drm/i915: More uncore nukage from display code (rev3) Patchwork
@ 2026-03-31 16:42 ` Patchwork
2026-03-31 17:16 ` ✓ Xe.CI.BAT: " Patchwork
` (2 subsequent siblings)
16 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-03-31 16:42 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
== Series Details ==
Series: drm/i915: More uncore nukage from display code (rev3)
URL : https://patchwork.freedesktop.org/series/163872/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[16:41:24] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:41:28] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:41:59] Starting KUnit Kernel (1/1)...
[16:41:59] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:42:00] ================== guc_buf (11 subtests) ===================
[16:42:00] [PASSED] test_smallest
[16:42:00] [PASSED] test_largest
[16:42:00] [PASSED] test_granular
[16:42:00] [PASSED] test_unique
[16:42:00] [PASSED] test_overlap
[16:42:00] [PASSED] test_reusable
[16:42:00] [PASSED] test_too_big
[16:42:00] [PASSED] test_flush
[16:42:00] [PASSED] test_lookup
[16:42:00] [PASSED] test_data
[16:42:00] [PASSED] test_class
[16:42:00] ===================== [PASSED] guc_buf =====================
[16:42:00] =================== guc_dbm (7 subtests) ===================
[16:42:00] [PASSED] test_empty
[16:42:00] [PASSED] test_default
[16:42:00] ======================== test_size ========================
[16:42:00] [PASSED] 4
[16:42:00] [PASSED] 8
[16:42:00] [PASSED] 32
[16:42:00] [PASSED] 256
[16:42:00] ==================== [PASSED] test_size ====================
[16:42:00] ======================= test_reuse ========================
[16:42:00] [PASSED] 4
[16:42:00] [PASSED] 8
[16:42:00] [PASSED] 32
[16:42:00] [PASSED] 256
[16:42:00] =================== [PASSED] test_reuse ====================
[16:42:00] =================== test_range_overlap ====================
[16:42:00] [PASSED] 4
[16:42:00] [PASSED] 8
[16:42:00] [PASSED] 32
[16:42:00] [PASSED] 256
[16:42:00] =============== [PASSED] test_range_overlap ================
[16:42:00] =================== test_range_compact ====================
[16:42:00] [PASSED] 4
[16:42:00] [PASSED] 8
[16:42:00] [PASSED] 32
[16:42:00] [PASSED] 256
[16:42:00] =============== [PASSED] test_range_compact ================
[16:42:00] ==================== test_range_spare =====================
[16:42:00] [PASSED] 4
[16:42:00] [PASSED] 8
[16:42:00] [PASSED] 32
[16:42:00] [PASSED] 256
[16:42:00] ================ [PASSED] test_range_spare =================
[16:42:00] ===================== [PASSED] guc_dbm =====================
[16:42:00] =================== guc_idm (6 subtests) ===================
[16:42:00] [PASSED] bad_init
[16:42:00] [PASSED] no_init
[16:42:00] [PASSED] init_fini
[16:42:00] [PASSED] check_used
[16:42:00] [PASSED] check_quota
[16:42:00] [PASSED] check_all
[16:42:00] ===================== [PASSED] guc_idm =====================
[16:42:00] ================== no_relay (3 subtests) ===================
[16:42:00] [PASSED] xe_drops_guc2pf_if_not_ready
[16:42:00] [PASSED] xe_drops_guc2vf_if_not_ready
[16:42:00] [PASSED] xe_rejects_send_if_not_ready
[16:42:00] ==================== [PASSED] no_relay =====================
[16:42:00] ================== pf_relay (14 subtests) ==================
[16:42:00] [PASSED] pf_rejects_guc2pf_too_short
[16:42:00] [PASSED] pf_rejects_guc2pf_too_long
[16:42:00] [PASSED] pf_rejects_guc2pf_no_payload
[16:42:00] [PASSED] pf_fails_no_payload
[16:42:00] [PASSED] pf_fails_bad_origin
[16:42:00] [PASSED] pf_fails_bad_type
[16:42:00] [PASSED] pf_txn_reports_error
[16:42:00] [PASSED] pf_txn_sends_pf2guc
[16:42:00] [PASSED] pf_sends_pf2guc
[16:42:00] [SKIPPED] pf_loopback_nop
[16:42:00] [SKIPPED] pf_loopback_echo
[16:42:00] [SKIPPED] pf_loopback_fail
[16:42:00] [SKIPPED] pf_loopback_busy
[16:42:00] [SKIPPED] pf_loopback_retry
[16:42:00] ==================== [PASSED] pf_relay =====================
[16:42:00] ================== vf_relay (3 subtests) ===================
[16:42:00] [PASSED] vf_rejects_guc2vf_too_short
[16:42:00] [PASSED] vf_rejects_guc2vf_too_long
[16:42:00] [PASSED] vf_rejects_guc2vf_no_payload
[16:42:00] ==================== [PASSED] vf_relay =====================
[16:42:00] ================ pf_gt_config (9 subtests) =================
[16:42:00] [PASSED] fair_contexts_1vf
[16:42:00] [PASSED] fair_doorbells_1vf
[16:42:00] [PASSED] fair_ggtt_1vf
[16:42:00] ====================== fair_vram_1vf ======================
[16:42:00] [PASSED] 3.50 GiB
[16:42:00] [PASSED] 11.5 GiB
[16:42:00] [PASSED] 15.5 GiB
[16:42:00] [PASSED] 31.5 GiB
[16:42:00] [PASSED] 63.5 GiB
[16:42:00] [PASSED] 1.91 GiB
[16:42:00] ================== [PASSED] fair_vram_1vf ==================
[16:42:00] ================ fair_vram_1vf_admin_only =================
[16:42:00] [PASSED] 3.50 GiB
[16:42:00] [PASSED] 11.5 GiB
[16:42:00] [PASSED] 15.5 GiB
[16:42:00] [PASSED] 31.5 GiB
[16:42:00] [PASSED] 63.5 GiB
[16:42:00] [PASSED] 1.91 GiB
[16:42:00] ============ [PASSED] fair_vram_1vf_admin_only =============
[16:42:00] ====================== fair_contexts ======================
[16:42:00] [PASSED] 1 VF
[16:42:00] [PASSED] 2 VFs
[16:42:00] [PASSED] 3 VFs
[16:42:00] [PASSED] 4 VFs
[16:42:00] [PASSED] 5 VFs
[16:42:00] [PASSED] 6 VFs
[16:42:00] [PASSED] 7 VFs
[16:42:00] [PASSED] 8 VFs
[16:42:00] [PASSED] 9 VFs
[16:42:00] [PASSED] 10 VFs
[16:42:00] [PASSED] 11 VFs
[16:42:00] [PASSED] 12 VFs
[16:42:00] [PASSED] 13 VFs
[16:42:00] [PASSED] 14 VFs
[16:42:00] [PASSED] 15 VFs
[16:42:00] [PASSED] 16 VFs
[16:42:00] [PASSED] 17 VFs
[16:42:00] [PASSED] 18 VFs
[16:42:00] [PASSED] 19 VFs
[16:42:00] [PASSED] 20 VFs
[16:42:00] [PASSED] 21 VFs
[16:42:00] [PASSED] 22 VFs
[16:42:00] [PASSED] 23 VFs
[16:42:00] [PASSED] 24 VFs
[16:42:00] [PASSED] 25 VFs
[16:42:00] [PASSED] 26 VFs
[16:42:00] [PASSED] 27 VFs
[16:42:00] [PASSED] 28 VFs
[16:42:00] [PASSED] 29 VFs
[16:42:00] [PASSED] 30 VFs
[16:42:00] [PASSED] 31 VFs
[16:42:00] [PASSED] 32 VFs
[16:42:00] [PASSED] 33 VFs
[16:42:00] [PASSED] 34 VFs
[16:42:00] [PASSED] 35 VFs
[16:42:00] [PASSED] 36 VFs
[16:42:00] [PASSED] 37 VFs
[16:42:00] [PASSED] 38 VFs
[16:42:00] [PASSED] 39 VFs
[16:42:00] [PASSED] 40 VFs
[16:42:00] [PASSED] 41 VFs
[16:42:00] [PASSED] 42 VFs
[16:42:00] [PASSED] 43 VFs
[16:42:00] [PASSED] 44 VFs
[16:42:00] [PASSED] 45 VFs
[16:42:00] [PASSED] 46 VFs
[16:42:00] [PASSED] 47 VFs
[16:42:00] [PASSED] 48 VFs
[16:42:00] [PASSED] 49 VFs
[16:42:00] [PASSED] 50 VFs
[16:42:00] [PASSED] 51 VFs
[16:42:00] [PASSED] 52 VFs
[16:42:00] [PASSED] 53 VFs
[16:42:00] [PASSED] 54 VFs
[16:42:00] [PASSED] 55 VFs
[16:42:00] [PASSED] 56 VFs
[16:42:00] [PASSED] 57 VFs
[16:42:00] [PASSED] 58 VFs
[16:42:00] [PASSED] 59 VFs
[16:42:00] [PASSED] 60 VFs
[16:42:00] [PASSED] 61 VFs
[16:42:00] [PASSED] 62 VFs
[16:42:00] [PASSED] 63 VFs
[16:42:00] ================== [PASSED] fair_contexts ==================
[16:42:00] ===================== fair_doorbells ======================
[16:42:00] [PASSED] 1 VF
[16:42:00] [PASSED] 2 VFs
[16:42:00] [PASSED] 3 VFs
[16:42:00] [PASSED] 4 VFs
[16:42:00] [PASSED] 5 VFs
[16:42:00] [PASSED] 6 VFs
[16:42:00] [PASSED] 7 VFs
[16:42:00] [PASSED] 8 VFs
[16:42:00] [PASSED] 9 VFs
[16:42:00] [PASSED] 10 VFs
[16:42:00] [PASSED] 11 VFs
[16:42:00] [PASSED] 12 VFs
[16:42:00] [PASSED] 13 VFs
[16:42:00] [PASSED] 14 VFs
[16:42:00] [PASSED] 15 VFs
[16:42:00] [PASSED] 16 VFs
[16:42:00] [PASSED] 17 VFs
[16:42:00] [PASSED] 18 VFs
[16:42:00] [PASSED] 19 VFs
[16:42:00] [PASSED] 20 VFs
[16:42:00] [PASSED] 21 VFs
[16:42:00] [PASSED] 22 VFs
[16:42:00] [PASSED] 23 VFs
[16:42:00] [PASSED] 24 VFs
[16:42:00] [PASSED] 25 VFs
[16:42:00] [PASSED] 26 VFs
[16:42:00] [PASSED] 27 VFs
[16:42:00] [PASSED] 28 VFs
[16:42:00] [PASSED] 29 VFs
[16:42:00] [PASSED] 30 VFs
[16:42:00] [PASSED] 31 VFs
[16:42:00] [PASSED] 32 VFs
[16:42:00] [PASSED] 33 VFs
[16:42:00] [PASSED] 34 VFs
[16:42:00] [PASSED] 35 VFs
[16:42:00] [PASSED] 36 VFs
[16:42:00] [PASSED] 37 VFs
[16:42:00] [PASSED] 38 VFs
[16:42:00] [PASSED] 39 VFs
[16:42:00] [PASSED] 40 VFs
[16:42:00] [PASSED] 41 VFs
[16:42:00] [PASSED] 42 VFs
[16:42:00] [PASSED] 43 VFs
[16:42:00] [PASSED] 44 VFs
[16:42:00] [PASSED] 45 VFs
[16:42:00] [PASSED] 46 VFs
[16:42:00] [PASSED] 47 VFs
[16:42:00] [PASSED] 48 VFs
[16:42:00] [PASSED] 49 VFs
[16:42:00] [PASSED] 50 VFs
[16:42:00] [PASSED] 51 VFs
[16:42:00] [PASSED] 52 VFs
[16:42:00] [PASSED] 53 VFs
[16:42:00] [PASSED] 54 VFs
[16:42:00] [PASSED] 55 VFs
[16:42:00] [PASSED] 56 VFs
[16:42:00] [PASSED] 57 VFs
[16:42:00] [PASSED] 58 VFs
[16:42:00] [PASSED] 59 VFs
[16:42:00] [PASSED] 60 VFs
[16:42:00] [PASSED] 61 VFs
[16:42:00] [PASSED] 62 VFs
[16:42:00] [PASSED] 63 VFs
[16:42:00] ================= [PASSED] fair_doorbells ==================
[16:42:00] ======================== fair_ggtt ========================
[16:42:00] [PASSED] 1 VF
[16:42:00] [PASSED] 2 VFs
[16:42:00] [PASSED] 3 VFs
[16:42:00] [PASSED] 4 VFs
[16:42:00] [PASSED] 5 VFs
[16:42:00] [PASSED] 6 VFs
[16:42:00] [PASSED] 7 VFs
[16:42:00] [PASSED] 8 VFs
[16:42:00] [PASSED] 9 VFs
[16:42:00] [PASSED] 10 VFs
[16:42:00] [PASSED] 11 VFs
[16:42:00] [PASSED] 12 VFs
[16:42:00] [PASSED] 13 VFs
[16:42:00] [PASSED] 14 VFs
[16:42:00] [PASSED] 15 VFs
[16:42:00] [PASSED] 16 VFs
[16:42:00] [PASSED] 17 VFs
[16:42:00] [PASSED] 18 VFs
[16:42:00] [PASSED] 19 VFs
[16:42:00] [PASSED] 20 VFs
[16:42:00] [PASSED] 21 VFs
[16:42:00] [PASSED] 22 VFs
[16:42:00] [PASSED] 23 VFs
[16:42:00] [PASSED] 24 VFs
[16:42:00] [PASSED] 25 VFs
[16:42:00] [PASSED] 26 VFs
[16:42:00] [PASSED] 27 VFs
[16:42:00] [PASSED] 28 VFs
[16:42:00] [PASSED] 29 VFs
[16:42:00] [PASSED] 30 VFs
[16:42:00] [PASSED] 31 VFs
[16:42:00] [PASSED] 32 VFs
[16:42:00] [PASSED] 33 VFs
[16:42:00] [PASSED] 34 VFs
[16:42:00] [PASSED] 35 VFs
[16:42:00] [PASSED] 36 VFs
[16:42:00] [PASSED] 37 VFs
[16:42:00] [PASSED] 38 VFs
[16:42:00] [PASSED] 39 VFs
[16:42:00] [PASSED] 40 VFs
[16:42:00] [PASSED] 41 VFs
[16:42:00] [PASSED] 42 VFs
[16:42:00] [PASSED] 43 VFs
[16:42:00] [PASSED] 44 VFs
[16:42:00] [PASSED] 45 VFs
[16:42:00] [PASSED] 46 VFs
[16:42:00] [PASSED] 47 VFs
[16:42:00] [PASSED] 48 VFs
[16:42:00] [PASSED] 49 VFs
[16:42:00] [PASSED] 50 VFs
[16:42:00] [PASSED] 51 VFs
[16:42:00] [PASSED] 52 VFs
[16:42:00] [PASSED] 53 VFs
[16:42:00] [PASSED] 54 VFs
[16:42:00] [PASSED] 55 VFs
[16:42:00] [PASSED] 56 VFs
[16:42:00] [PASSED] 57 VFs
[16:42:00] [PASSED] 58 VFs
[16:42:00] [PASSED] 59 VFs
[16:42:00] [PASSED] 60 VFs
[16:42:00] [PASSED] 61 VFs
[16:42:00] [PASSED] 62 VFs
[16:42:00] [PASSED] 63 VFs
[16:42:00] ==================== [PASSED] fair_ggtt ====================
[16:42:00] ======================== fair_vram ========================
[16:42:00] [PASSED] 1 VF
[16:42:00] [PASSED] 2 VFs
[16:42:00] [PASSED] 3 VFs
[16:42:00] [PASSED] 4 VFs
[16:42:00] [PASSED] 5 VFs
[16:42:00] [PASSED] 6 VFs
[16:42:00] [PASSED] 7 VFs
[16:42:00] [PASSED] 8 VFs
[16:42:00] [PASSED] 9 VFs
[16:42:00] [PASSED] 10 VFs
[16:42:00] [PASSED] 11 VFs
[16:42:00] [PASSED] 12 VFs
[16:42:00] [PASSED] 13 VFs
[16:42:00] [PASSED] 14 VFs
[16:42:00] [PASSED] 15 VFs
[16:42:00] [PASSED] 16 VFs
[16:42:00] [PASSED] 17 VFs
[16:42:00] [PASSED] 18 VFs
[16:42:00] [PASSED] 19 VFs
[16:42:00] [PASSED] 20 VFs
[16:42:00] [PASSED] 21 VFs
[16:42:00] [PASSED] 22 VFs
[16:42:00] [PASSED] 23 VFs
[16:42:00] [PASSED] 24 VFs
[16:42:00] [PASSED] 25 VFs
[16:42:00] [PASSED] 26 VFs
[16:42:00] [PASSED] 27 VFs
[16:42:00] [PASSED] 28 VFs
[16:42:00] [PASSED] 29 VFs
[16:42:00] [PASSED] 30 VFs
[16:42:00] [PASSED] 31 VFs
[16:42:00] [PASSED] 32 VFs
[16:42:00] [PASSED] 33 VFs
[16:42:00] [PASSED] 34 VFs
[16:42:00] [PASSED] 35 VFs
[16:42:00] [PASSED] 36 VFs
[16:42:00] [PASSED] 37 VFs
[16:42:00] [PASSED] 38 VFs
[16:42:00] [PASSED] 39 VFs
[16:42:00] [PASSED] 40 VFs
[16:42:00] [PASSED] 41 VFs
[16:42:00] [PASSED] 42 VFs
[16:42:00] [PASSED] 43 VFs
[16:42:00] [PASSED] 44 VFs
[16:42:00] [PASSED] 45 VFs
[16:42:00] [PASSED] 46 VFs
[16:42:00] [PASSED] 47 VFs
[16:42:00] [PASSED] 48 VFs
[16:42:00] [PASSED] 49 VFs
[16:42:00] [PASSED] 50 VFs
[16:42:00] [PASSED] 51 VFs
[16:42:00] [PASSED] 52 VFs
[16:42:00] [PASSED] 53 VFs
[16:42:00] [PASSED] 54 VFs
[16:42:00] [PASSED] 55 VFs
[16:42:00] [PASSED] 56 VFs
[16:42:00] [PASSED] 57 VFs
[16:42:00] [PASSED] 58 VFs
[16:42:00] [PASSED] 59 VFs
[16:42:00] [PASSED] 60 VFs
[16:42:00] [PASSED] 61 VFs
[16:42:00] [PASSED] 62 VFs
[16:42:00] [PASSED] 63 VFs
[16:42:00] ==================== [PASSED] fair_vram ====================
[16:42:00] ================== [PASSED] pf_gt_config ===================
[16:42:00] ===================== lmtt (1 subtest) =====================
[16:42:00] ======================== test_ops =========================
[16:42:00] [PASSED] 2-level
[16:42:00] [PASSED] multi-level
[16:42:00] ==================== [PASSED] test_ops =====================
[16:42:00] ====================== [PASSED] lmtt =======================
[16:42:00] ================= pf_service (11 subtests) =================
[16:42:00] [PASSED] pf_negotiate_any
[16:42:00] [PASSED] pf_negotiate_base_match
[16:42:00] [PASSED] pf_negotiate_base_newer
[16:42:00] [PASSED] pf_negotiate_base_next
[16:42:00] [SKIPPED] pf_negotiate_base_older
[16:42:00] [PASSED] pf_negotiate_base_prev
[16:42:00] [PASSED] pf_negotiate_latest_match
[16:42:00] [PASSED] pf_negotiate_latest_newer
[16:42:00] [PASSED] pf_negotiate_latest_next
[16:42:00] [SKIPPED] pf_negotiate_latest_older
[16:42:00] [SKIPPED] pf_negotiate_latest_prev
[16:42:00] =================== [PASSED] pf_service ====================
[16:42:00] ================= xe_guc_g2g (2 subtests) ==================
[16:42:00] ============== xe_live_guc_g2g_kunit_default ==============
[16:42:00] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[16:42:00] ============== xe_live_guc_g2g_kunit_allmem ===============
[16:42:00] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[16:42:00] =================== [SKIPPED] xe_guc_g2g ===================
[16:42:00] =================== xe_mocs (2 subtests) ===================
[16:42:00] ================ xe_live_mocs_kernel_kunit ================
[16:42:00] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[16:42:00] ================ xe_live_mocs_reset_kunit =================
[16:42:00] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[16:42:00] ==================== [SKIPPED] xe_mocs =====================
[16:42:00] ================= xe_migrate (2 subtests) ==================
[16:42:00] ================= xe_migrate_sanity_kunit =================
[16:42:00] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[16:42:00] ================== xe_validate_ccs_kunit ==================
[16:42:00] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[16:42:00] =================== [SKIPPED] xe_migrate ===================
[16:42:00] ================== xe_dma_buf (1 subtest) ==================
[16:42:00] ==================== xe_dma_buf_kunit =====================
[16:42:00] ================ [SKIPPED] xe_dma_buf_kunit ================
[16:42:00] =================== [SKIPPED] xe_dma_buf ===================
[16:42:00] ================= xe_bo_shrink (1 subtest) =================
[16:42:00] =================== xe_bo_shrink_kunit ====================
[16:42:00] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[16:42:00] ================== [SKIPPED] xe_bo_shrink ==================
[16:42:00] ==================== xe_bo (2 subtests) ====================
[16:42:00] ================== xe_ccs_migrate_kunit ===================
[16:42:00] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[16:42:00] ==================== xe_bo_evict_kunit ====================
[16:42:00] =============== [SKIPPED] xe_bo_evict_kunit ================
[16:42:00] ===================== [SKIPPED] xe_bo ======================
[16:42:00] ==================== args (13 subtests) ====================
[16:42:00] [PASSED] count_args_test
[16:42:00] [PASSED] call_args_example
[16:42:00] [PASSED] call_args_test
[16:42:00] [PASSED] drop_first_arg_example
[16:42:00] [PASSED] drop_first_arg_test
[16:42:00] [PASSED] first_arg_example
[16:42:00] [PASSED] first_arg_test
[16:42:00] [PASSED] last_arg_example
[16:42:00] [PASSED] last_arg_test
[16:42:00] [PASSED] pick_arg_example
[16:42:00] [PASSED] if_args_example
[16:42:00] [PASSED] if_args_test
[16:42:00] [PASSED] sep_comma_example
[16:42:00] ====================== [PASSED] args =======================
[16:42:00] =================== xe_pci (3 subtests) ====================
[16:42:00] ==================== check_graphics_ip ====================
[16:42:00] [PASSED] 12.00 Xe_LP
[16:42:00] [PASSED] 12.10 Xe_LP+
[16:42:00] [PASSED] 12.55 Xe_HPG
[16:42:00] [PASSED] 12.60 Xe_HPC
[16:42:00] [PASSED] 12.70 Xe_LPG
[16:42:00] [PASSED] 12.71 Xe_LPG
[16:42:00] [PASSED] 12.74 Xe_LPG+
[16:42:00] [PASSED] 20.01 Xe2_HPG
[16:42:00] [PASSED] 20.02 Xe2_HPG
[16:42:00] [PASSED] 20.04 Xe2_LPG
[16:42:00] [PASSED] 30.00 Xe3_LPG
[16:42:00] [PASSED] 30.01 Xe3_LPG
[16:42:00] [PASSED] 30.03 Xe3_LPG
[16:42:00] [PASSED] 30.04 Xe3_LPG
[16:42:00] [PASSED] 30.05 Xe3_LPG
[16:42:00] [PASSED] 35.10 Xe3p_LPG
[16:42:00] [PASSED] 35.11 Xe3p_XPC
[16:42:00] ================ [PASSED] check_graphics_ip ================
[16:42:00] ===================== check_media_ip ======================
[16:42:00] [PASSED] 12.00 Xe_M
[16:42:00] [PASSED] 12.55 Xe_HPM
[16:42:00] [PASSED] 13.00 Xe_LPM+
[16:42:00] [PASSED] 13.01 Xe2_HPM
[16:42:00] [PASSED] 20.00 Xe2_LPM
[16:42:00] [PASSED] 30.00 Xe3_LPM
[16:42:00] [PASSED] 30.02 Xe3_LPM
[16:42:00] [PASSED] 35.00 Xe3p_LPM
[16:42:00] [PASSED] 35.03 Xe3p_HPM
[16:42:00] ================= [PASSED] check_media_ip ==================
[16:42:00] =================== check_platform_desc ===================
[16:42:00] [PASSED] 0x9A60 (TIGERLAKE)
[16:42:00] [PASSED] 0x9A68 (TIGERLAKE)
[16:42:00] [PASSED] 0x9A70 (TIGERLAKE)
[16:42:00] [PASSED] 0x9A40 (TIGERLAKE)
[16:42:00] [PASSED] 0x9A49 (TIGERLAKE)
[16:42:00] [PASSED] 0x9A59 (TIGERLAKE)
[16:42:00] [PASSED] 0x9A78 (TIGERLAKE)
[16:42:00] [PASSED] 0x9AC0 (TIGERLAKE)
[16:42:00] [PASSED] 0x9AC9 (TIGERLAKE)
[16:42:00] [PASSED] 0x9AD9 (TIGERLAKE)
[16:42:00] [PASSED] 0x9AF8 (TIGERLAKE)
[16:42:00] [PASSED] 0x4C80 (ROCKETLAKE)
[16:42:00] [PASSED] 0x4C8A (ROCKETLAKE)
[16:42:00] [PASSED] 0x4C8B (ROCKETLAKE)
[16:42:00] [PASSED] 0x4C8C (ROCKETLAKE)
[16:42:00] [PASSED] 0x4C90 (ROCKETLAKE)
[16:42:00] [PASSED] 0x4C9A (ROCKETLAKE)
[16:42:00] [PASSED] 0x4680 (ALDERLAKE_S)
[16:42:00] [PASSED] 0x4682 (ALDERLAKE_S)
[16:42:00] [PASSED] 0x4688 (ALDERLAKE_S)
[16:42:00] [PASSED] 0x468A (ALDERLAKE_S)
[16:42:00] [PASSED] 0x468B (ALDERLAKE_S)
[16:42:00] [PASSED] 0x4690 (ALDERLAKE_S)
[16:42:00] [PASSED] 0x4692 (ALDERLAKE_S)
[16:42:00] [PASSED] 0x4693 (ALDERLAKE_S)
[16:42:00] [PASSED] 0x46A0 (ALDERLAKE_P)
[16:42:00] [PASSED] 0x46A1 (ALDERLAKE_P)
[16:42:00] [PASSED] 0x46A2 (ALDERLAKE_P)
[16:42:00] [PASSED] 0x46A3 (ALDERLAKE_P)
[16:42:00] [PASSED] 0x46A6 (ALDERLAKE_P)
[16:42:00] [PASSED] 0x46A8 (ALDERLAKE_P)
[16:42:00] [PASSED] 0x46AA (ALDERLAKE_P)
[16:42:00] [PASSED] 0x462A (ALDERLAKE_P)
[16:42:00] [PASSED] 0x4626 (ALDERLAKE_P)
[16:42:00] [PASSED] 0x4628 (ALDERLAKE_P)
[16:42:00] [PASSED] 0x46B0 (ALDERLAKE_P)
[16:42:00] [PASSED] 0x46B1 (ALDERLAKE_P)
[16:42:00] [PASSED] 0x46B2 (ALDERLAKE_P)
[16:42:00] [PASSED] 0x46B3 (ALDERLAKE_P)
[16:42:00] [PASSED] 0x46C0 (ALDERLAKE_P)
[16:42:00] [PASSED] 0x46C1 (ALDERLAKE_P)
[16:42:00] [PASSED] 0x46C2 (ALDERLAKE_P)
[16:42:00] [PASSED] 0x46C3 (ALDERLAKE_P)
[16:42:00] [PASSED] 0x46D0 (ALDERLAKE_N)
[16:42:00] [PASSED] 0x46D1 (ALDERLAKE_N)
[16:42:00] [PASSED] 0x46D2 (ALDERLAKE_N)
[16:42:00] [PASSED] 0x46D3 (ALDERLAKE_N)
[16:42:00] [PASSED] 0x46D4 (ALDERLAKE_N)
[16:42:00] [PASSED] 0xA721 (ALDERLAKE_P)
[16:42:00] [PASSED] 0xA7A1 (ALDERLAKE_P)
[16:42:00] [PASSED] 0xA7A9 (ALDERLAKE_P)
[16:42:00] [PASSED] 0xA7AC (ALDERLAKE_P)
[16:42:00] [PASSED] 0xA7AD (ALDERLAKE_P)
[16:42:00] [PASSED] 0xA720 (ALDERLAKE_P)
[16:42:00] [PASSED] 0xA7A0 (ALDERLAKE_P)
[16:42:00] [PASSED] 0xA7A8 (ALDERLAKE_P)
[16:42:00] [PASSED] 0xA7AA (ALDERLAKE_P)
[16:42:00] [PASSED] 0xA7AB (ALDERLAKE_P)
[16:42:00] [PASSED] 0xA780 (ALDERLAKE_S)
[16:42:00] [PASSED] 0xA781 (ALDERLAKE_S)
[16:42:00] [PASSED] 0xA782 (ALDERLAKE_S)
[16:42:00] [PASSED] 0xA783 (ALDERLAKE_S)
[16:42:00] [PASSED] 0xA788 (ALDERLAKE_S)
[16:42:00] [PASSED] 0xA789 (ALDERLAKE_S)
[16:42:00] [PASSED] 0xA78A (ALDERLAKE_S)
[16:42:00] [PASSED] 0xA78B (ALDERLAKE_S)
[16:42:00] [PASSED] 0x4905 (DG1)
[16:42:00] [PASSED] 0x4906 (DG1)
[16:42:00] [PASSED] 0x4907 (DG1)
[16:42:00] [PASSED] 0x4908 (DG1)
[16:42:00] [PASSED] 0x4909 (DG1)
[16:42:00] [PASSED] 0x56C0 (DG2)
[16:42:00] [PASSED] 0x56C2 (DG2)
[16:42:00] [PASSED] 0x56C1 (DG2)
[16:42:00] [PASSED] 0x7D51 (METEORLAKE)
[16:42:00] [PASSED] 0x7DD1 (METEORLAKE)
[16:42:00] [PASSED] 0x7D41 (METEORLAKE)
[16:42:00] [PASSED] 0x7D67 (METEORLAKE)
[16:42:00] [PASSED] 0xB640 (METEORLAKE)
[16:42:00] [PASSED] 0x56A0 (DG2)
[16:42:00] [PASSED] 0x56A1 (DG2)
[16:42:00] [PASSED] 0x56A2 (DG2)
[16:42:00] [PASSED] 0x56BE (DG2)
[16:42:00] [PASSED] 0x56BF (DG2)
[16:42:00] [PASSED] 0x5690 (DG2)
[16:42:00] [PASSED] 0x5691 (DG2)
[16:42:00] [PASSED] 0x5692 (DG2)
[16:42:00] [PASSED] 0x56A5 (DG2)
[16:42:00] [PASSED] 0x56A6 (DG2)
[16:42:00] [PASSED] 0x56B0 (DG2)
[16:42:00] [PASSED] 0x56B1 (DG2)
[16:42:00] [PASSED] 0x56BA (DG2)
[16:42:00] [PASSED] 0x56BB (DG2)
[16:42:00] [PASSED] 0x56BC (DG2)
[16:42:00] [PASSED] 0x56BD (DG2)
[16:42:00] [PASSED] 0x5693 (DG2)
[16:42:00] [PASSED] 0x5694 (DG2)
[16:42:00] [PASSED] 0x5695 (DG2)
[16:42:00] [PASSED] 0x56A3 (DG2)
[16:42:00] [PASSED] 0x56A4 (DG2)
[16:42:00] [PASSED] 0x56B2 (DG2)
[16:42:00] [PASSED] 0x56B3 (DG2)
[16:42:00] [PASSED] 0x5696 (DG2)
[16:42:00] [PASSED] 0x5697 (DG2)
[16:42:00] [PASSED] 0xB69 (PVC)
[16:42:00] [PASSED] 0xB6E (PVC)
[16:42:00] [PASSED] 0xBD4 (PVC)
[16:42:00] [PASSED] 0xBD5 (PVC)
[16:42:00] [PASSED] 0xBD6 (PVC)
[16:42:00] [PASSED] 0xBD7 (PVC)
[16:42:00] [PASSED] 0xBD8 (PVC)
[16:42:00] [PASSED] 0xBD9 (PVC)
[16:42:00] [PASSED] 0xBDA (PVC)
[16:42:00] [PASSED] 0xBDB (PVC)
[16:42:00] [PASSED] 0xBE0 (PVC)
[16:42:00] [PASSED] 0xBE1 (PVC)
[16:42:00] [PASSED] 0xBE5 (PVC)
[16:42:00] [PASSED] 0x7D40 (METEORLAKE)
[16:42:00] [PASSED] 0x7D45 (METEORLAKE)
[16:42:00] [PASSED] 0x7D55 (METEORLAKE)
[16:42:00] [PASSED] 0x7D60 (METEORLAKE)
[16:42:00] [PASSED] 0x7DD5 (METEORLAKE)
[16:42:00] [PASSED] 0x6420 (LUNARLAKE)
[16:42:00] [PASSED] 0x64A0 (LUNARLAKE)
[16:42:00] [PASSED] 0x64B0 (LUNARLAKE)
[16:42:00] [PASSED] 0xE202 (BATTLEMAGE)
[16:42:00] [PASSED] 0xE209 (BATTLEMAGE)
[16:42:00] [PASSED] 0xE20B (BATTLEMAGE)
[16:42:00] [PASSED] 0xE20C (BATTLEMAGE)
[16:42:00] [PASSED] 0xE20D (BATTLEMAGE)
[16:42:00] [PASSED] 0xE210 (BATTLEMAGE)
[16:42:00] [PASSED] 0xE211 (BATTLEMAGE)
[16:42:00] [PASSED] 0xE212 (BATTLEMAGE)
[16:42:00] [PASSED] 0xE216 (BATTLEMAGE)
[16:42:00] [PASSED] 0xE220 (BATTLEMAGE)
[16:42:00] [PASSED] 0xE221 (BATTLEMAGE)
[16:42:00] [PASSED] 0xE222 (BATTLEMAGE)
[16:42:00] [PASSED] 0xE223 (BATTLEMAGE)
[16:42:00] [PASSED] 0xB080 (PANTHERLAKE)
[16:42:00] [PASSED] 0xB081 (PANTHERLAKE)
[16:42:00] [PASSED] 0xB082 (PANTHERLAKE)
[16:42:00] [PASSED] 0xB083 (PANTHERLAKE)
[16:42:00] [PASSED] 0xB084 (PANTHERLAKE)
[16:42:00] [PASSED] 0xB085 (PANTHERLAKE)
[16:42:00] [PASSED] 0xB086 (PANTHERLAKE)
[16:42:00] [PASSED] 0xB087 (PANTHERLAKE)
[16:42:00] [PASSED] 0xB08F (PANTHERLAKE)
[16:42:00] [PASSED] 0xB090 (PANTHERLAKE)
[16:42:00] [PASSED] 0xB0A0 (PANTHERLAKE)
[16:42:00] [PASSED] 0xB0B0 (PANTHERLAKE)
[16:42:00] [PASSED] 0xFD80 (PANTHERLAKE)
[16:42:00] [PASSED] 0xFD81 (PANTHERLAKE)
[16:42:00] [PASSED] 0xD740 (NOVALAKE_S)
[16:42:00] [PASSED] 0xD741 (NOVALAKE_S)
[16:42:00] [PASSED] 0xD742 (NOVALAKE_S)
[16:42:00] [PASSED] 0xD743 (NOVALAKE_S)
[16:42:00] [PASSED] 0xD744 (NOVALAKE_S)
[16:42:00] [PASSED] 0xD745 (NOVALAKE_S)
[16:42:00] [PASSED] 0x674C (CRESCENTISLAND)
[16:42:00] [PASSED] 0xD750 (NOVALAKE_P)
[16:42:00] [PASSED] 0xD751 (NOVALAKE_P)
[16:42:00] [PASSED] 0xD752 (NOVALAKE_P)
[16:42:00] [PASSED] 0xD753 (NOVALAKE_P)
[16:42:00] [PASSED] 0xD754 (NOVALAKE_P)
[16:42:00] [PASSED] 0xD755 (NOVALAKE_P)
[16:42:00] [PASSED] 0xD756 (NOVALAKE_P)
[16:42:00] [PASSED] 0xD757 (NOVALAKE_P)
[16:42:00] [PASSED] 0xD75F (NOVALAKE_P)
[16:42:00] =============== [PASSED] check_platform_desc ===============
[16:42:00] ===================== [PASSED] xe_pci ======================
[16:42:00] =================== xe_rtp (2 subtests) ====================
[16:42:00] =============== xe_rtp_process_to_sr_tests ================
[16:42:00] [PASSED] coalesce-same-reg
[16:42:00] [PASSED] no-match-no-add
[16:42:00] [PASSED] match-or
[16:42:00] [PASSED] match-or-xfail
[16:42:00] [PASSED] no-match-no-add-multiple-rules
[16:42:00] [PASSED] two-regs-two-entries
[16:42:00] [PASSED] clr-one-set-other
[16:42:00] [PASSED] set-field
[16:42:00] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[16:42:00] [PASSED] conflict-not-disjoint
[16:42:00] [PASSED] conflict-reg-type
[16:42:00] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[16:42:00] ================== xe_rtp_process_tests ===================
[16:42:00] [PASSED] active1
[16:42:00] [PASSED] active2
[16:42:00] [PASSED] active-inactive
[16:42:00] [PASSED] inactive-active
[16:42:00] [PASSED] inactive-1st_or_active-inactive
[16:42:00] [PASSED] inactive-2nd_or_active-inactive
[16:42:00] [PASSED] inactive-last_or_active-inactive
[16:42:00] [PASSED] inactive-no_or_active-inactive
[16:42:00] ============== [PASSED] xe_rtp_process_tests ===============
[16:42:00] ===================== [PASSED] xe_rtp ======================
[16:42:00] ==================== xe_wa (1 subtest) =====================
[16:42:00] ======================== xe_wa_gt =========================
[16:42:00] [PASSED] TIGERLAKE B0
[16:42:00] [PASSED] DG1 A0
[16:42:00] [PASSED] DG1 B0
[16:42:00] [PASSED] ALDERLAKE_S A0
[16:42:00] [PASSED] ALDERLAKE_S B0
[16:42:00] [PASSED] ALDERLAKE_S C0
[16:42:00] [PASSED] ALDERLAKE_S D0
[16:42:00] [PASSED] ALDERLAKE_P A0
[16:42:00] [PASSED] ALDERLAKE_P B0
[16:42:00] [PASSED] ALDERLAKE_P C0
[16:42:00] [PASSED] ALDERLAKE_S RPLS D0
[16:42:00] [PASSED] ALDERLAKE_P RPLU E0
[16:42:00] [PASSED] DG2 G10 C0
[16:42:00] [PASSED] DG2 G11 B1
[16:42:00] [PASSED] DG2 G12 A1
[16:42:00] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[16:42:00] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[16:42:00] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[16:42:00] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[16:42:00] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[16:42:00] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[16:42:00] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[16:42:00] ==================== [PASSED] xe_wa_gt =====================
[16:42:00] ====================== [PASSED] xe_wa ======================
[16:42:00] ============================================================
[16:42:00] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[16:42:00] Elapsed time: 36.082s total, 4.243s configuring, 31.223s building, 0.586s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[16:42:00] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:42:02] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:42:27] Starting KUnit Kernel (1/1)...
[16:42:27] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:42:27] ============ drm_test_pick_cmdline (2 subtests) ============
[16:42:27] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[16:42:27] =============== drm_test_pick_cmdline_named ===============
[16:42:27] [PASSED] NTSC
[16:42:27] [PASSED] NTSC-J
[16:42:27] [PASSED] PAL
[16:42:27] [PASSED] PAL-M
[16:42:27] =========== [PASSED] drm_test_pick_cmdline_named ===========
[16:42:27] ============== [PASSED] drm_test_pick_cmdline ==============
[16:42:27] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[16:42:27] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[16:42:27] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[16:42:27] =========== drm_validate_clone_mode (2 subtests) ===========
[16:42:27] ============== drm_test_check_in_clone_mode ===============
[16:42:27] [PASSED] in_clone_mode
[16:42:27] [PASSED] not_in_clone_mode
[16:42:27] ========== [PASSED] drm_test_check_in_clone_mode ===========
[16:42:27] =============== drm_test_check_valid_clones ===============
[16:42:27] [PASSED] not_in_clone_mode
[16:42:27] [PASSED] valid_clone
[16:42:27] [PASSED] invalid_clone
[16:42:27] =========== [PASSED] drm_test_check_valid_clones ===========
[16:42:27] ============= [PASSED] drm_validate_clone_mode =============
[16:42:27] ============= drm_validate_modeset (1 subtest) =============
[16:42:27] [PASSED] drm_test_check_connector_changed_modeset
[16:42:27] ============== [PASSED] drm_validate_modeset ===============
[16:42:27] ====== drm_test_bridge_get_current_state (2 subtests) ======
[16:42:27] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[16:42:27] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[16:42:27] ======== [PASSED] drm_test_bridge_get_current_state ========
[16:42:27] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[16:42:27] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[16:42:27] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[16:42:27] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[16:42:27] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[16:42:27] ============== drm_bridge_alloc (2 subtests) ===============
[16:42:27] [PASSED] drm_test_drm_bridge_alloc_basic
[16:42:27] [PASSED] drm_test_drm_bridge_alloc_get_put
[16:42:27] ================ [PASSED] drm_bridge_alloc =================
[16:42:27] ============= drm_cmdline_parser (40 subtests) =============
[16:42:27] [PASSED] drm_test_cmdline_force_d_only
[16:42:27] [PASSED] drm_test_cmdline_force_D_only_dvi
[16:42:27] [PASSED] drm_test_cmdline_force_D_only_hdmi
[16:42:27] [PASSED] drm_test_cmdline_force_D_only_not_digital
[16:42:27] [PASSED] drm_test_cmdline_force_e_only
[16:42:27] [PASSED] drm_test_cmdline_res
[16:42:27] [PASSED] drm_test_cmdline_res_vesa
[16:42:27] [PASSED] drm_test_cmdline_res_vesa_rblank
[16:42:27] [PASSED] drm_test_cmdline_res_rblank
[16:42:27] [PASSED] drm_test_cmdline_res_bpp
[16:42:27] [PASSED] drm_test_cmdline_res_refresh
[16:42:27] [PASSED] drm_test_cmdline_res_bpp_refresh
[16:42:27] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[16:42:27] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[16:42:27] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[16:42:27] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[16:42:27] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[16:42:27] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[16:42:27] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[16:42:27] [PASSED] drm_test_cmdline_res_margins_force_on
[16:42:27] [PASSED] drm_test_cmdline_res_vesa_margins
[16:42:27] [PASSED] drm_test_cmdline_name
[16:42:27] [PASSED] drm_test_cmdline_name_bpp
[16:42:27] [PASSED] drm_test_cmdline_name_option
[16:42:27] [PASSED] drm_test_cmdline_name_bpp_option
[16:42:27] [PASSED] drm_test_cmdline_rotate_0
[16:42:27] [PASSED] drm_test_cmdline_rotate_90
[16:42:27] [PASSED] drm_test_cmdline_rotate_180
[16:42:27] [PASSED] drm_test_cmdline_rotate_270
[16:42:27] [PASSED] drm_test_cmdline_hmirror
[16:42:27] [PASSED] drm_test_cmdline_vmirror
[16:42:27] [PASSED] drm_test_cmdline_margin_options
[16:42:27] [PASSED] drm_test_cmdline_multiple_options
[16:42:27] [PASSED] drm_test_cmdline_bpp_extra_and_option
[16:42:27] [PASSED] drm_test_cmdline_extra_and_option
[16:42:27] [PASSED] drm_test_cmdline_freestanding_options
[16:42:27] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[16:42:27] [PASSED] drm_test_cmdline_panel_orientation
[16:42:27] ================ drm_test_cmdline_invalid =================
[16:42:27] [PASSED] margin_only
[16:42:27] [PASSED] interlace_only
[16:42:27] [PASSED] res_missing_x
[16:42:27] [PASSED] res_missing_y
[16:42:27] [PASSED] res_bad_y
[16:42:27] [PASSED] res_missing_y_bpp
[16:42:27] [PASSED] res_bad_bpp
[16:42:27] [PASSED] res_bad_refresh
[16:42:27] [PASSED] res_bpp_refresh_force_on_off
[16:42:27] [PASSED] res_invalid_mode
[16:42:27] [PASSED] res_bpp_wrong_place_mode
[16:42:27] [PASSED] name_bpp_refresh
[16:42:27] [PASSED] name_refresh
[16:42:27] [PASSED] name_refresh_wrong_mode
[16:42:27] [PASSED] name_refresh_invalid_mode
[16:42:27] [PASSED] rotate_multiple
[16:42:27] [PASSED] rotate_invalid_val
[16:42:27] [PASSED] rotate_truncated
[16:42:27] [PASSED] invalid_option
[16:42:27] [PASSED] invalid_tv_option
[16:42:27] [PASSED] truncated_tv_option
[16:42:27] ============ [PASSED] drm_test_cmdline_invalid =============
[16:42:27] =============== drm_test_cmdline_tv_options ===============
[16:42:27] [PASSED] NTSC
[16:42:27] [PASSED] NTSC_443
[16:42:27] [PASSED] NTSC_J
[16:42:27] [PASSED] PAL
[16:42:27] [PASSED] PAL_M
[16:42:27] [PASSED] PAL_N
[16:42:27] [PASSED] SECAM
[16:42:27] [PASSED] MONO_525
[16:42:27] [PASSED] MONO_625
[16:42:27] =========== [PASSED] drm_test_cmdline_tv_options ===========
[16:42:27] =============== [PASSED] drm_cmdline_parser ================
[16:42:27] ========== drmm_connector_hdmi_init (20 subtests) ==========
[16:42:27] [PASSED] drm_test_connector_hdmi_init_valid
[16:42:27] [PASSED] drm_test_connector_hdmi_init_bpc_8
[16:42:27] [PASSED] drm_test_connector_hdmi_init_bpc_10
[16:42:27] [PASSED] drm_test_connector_hdmi_init_bpc_12
[16:42:27] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[16:42:27] [PASSED] drm_test_connector_hdmi_init_bpc_null
[16:42:27] [PASSED] drm_test_connector_hdmi_init_formats_empty
[16:42:27] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[16:42:27] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[16:42:27] [PASSED] supported_formats=0x9 yuv420_allowed=1
[16:42:27] [PASSED] supported_formats=0x9 yuv420_allowed=0
[16:42:27] [PASSED] supported_formats=0x5 yuv420_allowed=1
[16:42:27] [PASSED] supported_formats=0x5 yuv420_allowed=0
[16:42:27] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[16:42:27] [PASSED] drm_test_connector_hdmi_init_null_ddc
[16:42:27] [PASSED] drm_test_connector_hdmi_init_null_product
[16:42:27] [PASSED] drm_test_connector_hdmi_init_null_vendor
[16:42:27] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[16:42:27] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[16:42:27] [PASSED] drm_test_connector_hdmi_init_product_valid
[16:42:27] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[16:42:27] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[16:42:27] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[16:42:27] ========= drm_test_connector_hdmi_init_type_valid =========
[16:42:27] [PASSED] HDMI-A
[16:42:27] [PASSED] HDMI-B
[16:42:27] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[16:42:27] ======== drm_test_connector_hdmi_init_type_invalid ========
[16:42:27] [PASSED] Unknown
[16:42:27] [PASSED] VGA
[16:42:27] [PASSED] DVI-I
[16:42:27] [PASSED] DVI-D
[16:42:27] [PASSED] DVI-A
[16:42:27] [PASSED] Composite
[16:42:27] [PASSED] SVIDEO
[16:42:27] [PASSED] LVDS
[16:42:27] [PASSED] Component
[16:42:27] [PASSED] DIN
[16:42:27] [PASSED] DP
[16:42:27] [PASSED] TV
[16:42:27] [PASSED] eDP
[16:42:27] [PASSED] Virtual
[16:42:27] [PASSED] DSI
[16:42:27] [PASSED] DPI
[16:42:27] [PASSED] Writeback
[16:42:27] [PASSED] SPI
[16:42:27] [PASSED] USB
[16:42:27] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[16:42:27] ============ [PASSED] drmm_connector_hdmi_init =============
[16:42:27] ============= drmm_connector_init (3 subtests) =============
[16:42:27] [PASSED] drm_test_drmm_connector_init
[16:42:27] [PASSED] drm_test_drmm_connector_init_null_ddc
[16:42:27] ========= drm_test_drmm_connector_init_type_valid =========
[16:42:27] [PASSED] Unknown
[16:42:27] [PASSED] VGA
[16:42:27] [PASSED] DVI-I
[16:42:27] [PASSED] DVI-D
[16:42:27] [PASSED] DVI-A
[16:42:27] [PASSED] Composite
[16:42:27] [PASSED] SVIDEO
[16:42:27] [PASSED] LVDS
[16:42:27] [PASSED] Component
[16:42:27] [PASSED] DIN
[16:42:27] [PASSED] DP
[16:42:27] [PASSED] HDMI-A
[16:42:27] [PASSED] HDMI-B
[16:42:27] [PASSED] TV
[16:42:27] [PASSED] eDP
[16:42:27] [PASSED] Virtual
[16:42:27] [PASSED] DSI
[16:42:27] [PASSED] DPI
[16:42:27] [PASSED] Writeback
[16:42:27] [PASSED] SPI
[16:42:27] [PASSED] USB
[16:42:27] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[16:42:27] =============== [PASSED] drmm_connector_init ===============
[16:42:27] ========= drm_connector_dynamic_init (6 subtests) ==========
[16:42:27] [PASSED] drm_test_drm_connector_dynamic_init
[16:42:27] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[16:42:27] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[16:42:27] [PASSED] drm_test_drm_connector_dynamic_init_properties
[16:42:27] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[16:42:27] [PASSED] Unknown
[16:42:27] [PASSED] VGA
[16:42:27] [PASSED] DVI-I
[16:42:27] [PASSED] DVI-D
[16:42:27] [PASSED] DVI-A
[16:42:27] [PASSED] Composite
[16:42:27] [PASSED] SVIDEO
[16:42:27] [PASSED] LVDS
[16:42:27] [PASSED] Component
[16:42:27] [PASSED] DIN
[16:42:27] [PASSED] DP
[16:42:27] [PASSED] HDMI-A
[16:42:27] [PASSED] HDMI-B
[16:42:27] [PASSED] TV
[16:42:27] [PASSED] eDP
[16:42:27] [PASSED] Virtual
[16:42:27] [PASSED] DSI
[16:42:27] [PASSED] DPI
[16:42:27] [PASSED] Writeback
[16:42:27] [PASSED] SPI
[16:42:27] [PASSED] USB
[16:42:27] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[16:42:27] ======== drm_test_drm_connector_dynamic_init_name =========
[16:42:27] [PASSED] Unknown
[16:42:27] [PASSED] VGA
[16:42:27] [PASSED] DVI-I
[16:42:27] [PASSED] DVI-D
[16:42:27] [PASSED] DVI-A
[16:42:27] [PASSED] Composite
[16:42:27] [PASSED] SVIDEO
[16:42:27] [PASSED] LVDS
[16:42:27] [PASSED] Component
[16:42:27] [PASSED] DIN
[16:42:27] [PASSED] DP
[16:42:27] [PASSED] HDMI-A
[16:42:27] [PASSED] HDMI-B
[16:42:27] [PASSED] TV
[16:42:27] [PASSED] eDP
[16:42:27] [PASSED] Virtual
[16:42:27] [PASSED] DSI
[16:42:27] [PASSED] DPI
[16:42:27] [PASSED] Writeback
[16:42:27] [PASSED] SPI
[16:42:27] [PASSED] USB
[16:42:27] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[16:42:27] =========== [PASSED] drm_connector_dynamic_init ============
[16:42:27] ==== drm_connector_dynamic_register_early (4 subtests) =====
[16:42:27] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[16:42:27] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[16:42:27] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[16:42:27] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[16:42:27] ====== [PASSED] drm_connector_dynamic_register_early =======
[16:42:27] ======= drm_connector_dynamic_register (7 subtests) ========
[16:42:27] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[16:42:27] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[16:42:27] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[16:42:27] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[16:42:27] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[16:42:27] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[16:42:27] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[16:42:27] ========= [PASSED] drm_connector_dynamic_register ==========
[16:42:27] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[16:42:27] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[16:42:27] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[16:42:27] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[16:42:27] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[16:42:27] ========== drm_test_get_tv_mode_from_name_valid ===========
[16:42:27] [PASSED] NTSC
[16:42:27] [PASSED] NTSC-443
[16:42:27] [PASSED] NTSC-J
[16:42:27] [PASSED] PAL
[16:42:27] [PASSED] PAL-M
[16:42:27] [PASSED] PAL-N
[16:42:27] [PASSED] SECAM
[16:42:27] [PASSED] Mono
[16:42:27] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[16:42:27] [PASSED] drm_test_get_tv_mode_from_name_truncated
[16:42:27] ============ [PASSED] drm_get_tv_mode_from_name ============
[16:42:27] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[16:42:27] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[16:42:27] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[16:42:27] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[16:42:27] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[16:42:27] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[16:42:27] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[16:42:27] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[16:42:27] [PASSED] VIC 96
[16:42:27] [PASSED] VIC 97
[16:42:27] [PASSED] VIC 101
[16:42:27] [PASSED] VIC 102
[16:42:27] [PASSED] VIC 106
[16:42:27] [PASSED] VIC 107
[16:42:27] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[16:42:27] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[16:42:27] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[16:42:27] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[16:42:27] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[16:42:27] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[16:42:27] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[16:42:27] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[16:42:27] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[16:42:27] [PASSED] Automatic
[16:42:27] [PASSED] Full
[16:42:27] [PASSED] Limited 16:235
[16:42:27] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[16:42:27] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[16:42:27] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[16:42:27] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[16:42:27] === drm_test_drm_hdmi_connector_get_output_format_name ====
[16:42:27] [PASSED] RGB
[16:42:27] [PASSED] YUV 4:2:0
[16:42:27] [PASSED] YUV 4:2:2
[16:42:27] [PASSED] YUV 4:4:4
[16:42:27] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[16:42:27] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[16:42:27] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[16:42:27] ============= drm_damage_helper (21 subtests) ==============
[16:42:27] [PASSED] drm_test_damage_iter_no_damage
[16:42:27] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[16:42:27] [PASSED] drm_test_damage_iter_no_damage_src_moved
[16:42:27] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[16:42:27] [PASSED] drm_test_damage_iter_no_damage_not_visible
[16:42:27] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[16:42:27] [PASSED] drm_test_damage_iter_no_damage_no_fb
[16:42:27] [PASSED] drm_test_damage_iter_simple_damage
[16:42:27] [PASSED] drm_test_damage_iter_single_damage
[16:42:27] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[16:42:27] [PASSED] drm_test_damage_iter_single_damage_outside_src
[16:42:27] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[16:42:27] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[16:42:27] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[16:42:27] [PASSED] drm_test_damage_iter_single_damage_src_moved
[16:42:27] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[16:42:27] [PASSED] drm_test_damage_iter_damage
[16:42:27] [PASSED] drm_test_damage_iter_damage_one_intersect
[16:42:27] [PASSED] drm_test_damage_iter_damage_one_outside
[16:42:27] [PASSED] drm_test_damage_iter_damage_src_moved
[16:42:27] [PASSED] drm_test_damage_iter_damage_not_visible
[16:42:27] ================ [PASSED] drm_damage_helper ================
[16:42:27] ============== drm_dp_mst_helper (3 subtests) ==============
[16:42:27] ============== drm_test_dp_mst_calc_pbn_mode ==============
[16:42:27] [PASSED] Clock 154000 BPP 30 DSC disabled
[16:42:27] [PASSED] Clock 234000 BPP 30 DSC disabled
[16:42:27] [PASSED] Clock 297000 BPP 24 DSC disabled
[16:42:27] [PASSED] Clock 332880 BPP 24 DSC enabled
[16:42:27] [PASSED] Clock 324540 BPP 24 DSC enabled
[16:42:27] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[16:42:27] ============== drm_test_dp_mst_calc_pbn_div ===============
[16:42:27] [PASSED] Link rate 2000000 lane count 4
[16:42:27] [PASSED] Link rate 2000000 lane count 2
[16:42:27] [PASSED] Link rate 2000000 lane count 1
[16:42:27] [PASSED] Link rate 1350000 lane count 4
[16:42:27] [PASSED] Link rate 1350000 lane count 2
[16:42:27] [PASSED] Link rate 1350000 lane count 1
[16:42:27] [PASSED] Link rate 1000000 lane count 4
[16:42:27] [PASSED] Link rate 1000000 lane count 2
[16:42:27] [PASSED] Link rate 1000000 lane count 1
[16:42:27] [PASSED] Link rate 810000 lane count 4
[16:42:27] [PASSED] Link rate 810000 lane count 2
[16:42:27] [PASSED] Link rate 810000 lane count 1
[16:42:27] [PASSED] Link rate 540000 lane count 4
[16:42:27] [PASSED] Link rate 540000 lane count 2
[16:42:27] [PASSED] Link rate 540000 lane count 1
[16:42:27] [PASSED] Link rate 270000 lane count 4
[16:42:27] [PASSED] Link rate 270000 lane count 2
[16:42:27] [PASSED] Link rate 270000 lane count 1
[16:42:27] [PASSED] Link rate 162000 lane count 4
[16:42:27] [PASSED] Link rate 162000 lane count 2
[16:42:27] [PASSED] Link rate 162000 lane count 1
[16:42:27] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[16:42:27] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[16:42:27] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[16:42:27] [PASSED] DP_POWER_UP_PHY with port number
[16:42:27] [PASSED] DP_POWER_DOWN_PHY with port number
[16:42:27] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[16:42:27] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[16:42:27] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[16:42:27] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[16:42:27] [PASSED] DP_QUERY_PAYLOAD with port number
[16:42:27] [PASSED] DP_QUERY_PAYLOAD with VCPI
[16:42:27] [PASSED] DP_REMOTE_DPCD_READ with port number
[16:42:27] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[16:42:27] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[16:42:27] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[16:42:27] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[16:42:27] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[16:42:27] [PASSED] DP_REMOTE_I2C_READ with port number
[16:42:27] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[16:42:27] [PASSED] DP_REMOTE_I2C_READ with transactions array
[16:42:27] [PASSED] DP_REMOTE_I2C_WRITE with port number
[16:42:27] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[16:42:27] [PASSED] DP_REMOTE_I2C_WRITE with data array
[16:42:27] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[16:42:27] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[16:42:27] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[16:42:27] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[16:42:27] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[16:42:27] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[16:42:27] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[16:42:27] ================ [PASSED] drm_dp_mst_helper ================
[16:42:27] ================== drm_exec (7 subtests) ===================
[16:42:27] [PASSED] sanitycheck
[16:42:27] [PASSED] test_lock
[16:42:27] [PASSED] test_lock_unlock
[16:42:27] [PASSED] test_duplicates
[16:42:27] [PASSED] test_prepare
[16:42:27] [PASSED] test_prepare_array
[16:42:27] [PASSED] test_multiple_loops
[16:42:27] ==================== [PASSED] drm_exec =====================
[16:42:27] =========== drm_format_helper_test (17 subtests) ===========
[16:42:27] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[16:42:27] [PASSED] single_pixel_source_buffer
[16:42:27] [PASSED] single_pixel_clip_rectangle
[16:42:27] [PASSED] well_known_colors
[16:42:27] [PASSED] destination_pitch
[16:42:27] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[16:42:27] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[16:42:27] [PASSED] single_pixel_source_buffer
[16:42:27] [PASSED] single_pixel_clip_rectangle
[16:42:27] [PASSED] well_known_colors
[16:42:27] [PASSED] destination_pitch
[16:42:27] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[16:42:27] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[16:42:27] [PASSED] single_pixel_source_buffer
[16:42:27] [PASSED] single_pixel_clip_rectangle
[16:42:27] [PASSED] well_known_colors
[16:42:27] [PASSED] destination_pitch
[16:42:27] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[16:42:27] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[16:42:27] [PASSED] single_pixel_source_buffer
[16:42:27] [PASSED] single_pixel_clip_rectangle
[16:42:27] [PASSED] well_known_colors
[16:42:27] [PASSED] destination_pitch
[16:42:27] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[16:42:27] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[16:42:27] [PASSED] single_pixel_source_buffer
[16:42:27] [PASSED] single_pixel_clip_rectangle
[16:42:27] [PASSED] well_known_colors
[16:42:27] [PASSED] destination_pitch
[16:42:27] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[16:42:27] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[16:42:27] [PASSED] single_pixel_source_buffer
[16:42:27] [PASSED] single_pixel_clip_rectangle
[16:42:27] [PASSED] well_known_colors
[16:42:27] [PASSED] destination_pitch
[16:42:27] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[16:42:27] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[16:42:27] [PASSED] single_pixel_source_buffer
[16:42:27] [PASSED] single_pixel_clip_rectangle
[16:42:27] [PASSED] well_known_colors
[16:42:27] [PASSED] destination_pitch
[16:42:27] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[16:42:27] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[16:42:27] [PASSED] single_pixel_source_buffer
[16:42:27] [PASSED] single_pixel_clip_rectangle
[16:42:27] [PASSED] well_known_colors
[16:42:27] [PASSED] destination_pitch
[16:42:27] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[16:42:27] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[16:42:27] [PASSED] single_pixel_source_buffer
[16:42:27] [PASSED] single_pixel_clip_rectangle
[16:42:27] [PASSED] well_known_colors
[16:42:27] [PASSED] destination_pitch
[16:42:27] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[16:42:27] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[16:42:27] [PASSED] single_pixel_source_buffer
[16:42:27] [PASSED] single_pixel_clip_rectangle
[16:42:27] [PASSED] well_known_colors
[16:42:27] [PASSED] destination_pitch
[16:42:27] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[16:42:27] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[16:42:27] [PASSED] single_pixel_source_buffer
[16:42:27] [PASSED] single_pixel_clip_rectangle
[16:42:27] [PASSED] well_known_colors
[16:42:27] [PASSED] destination_pitch
[16:42:27] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[16:42:27] ============== drm_test_fb_xrgb8888_to_mono ===============
[16:42:27] [PASSED] single_pixel_source_buffer
[16:42:27] [PASSED] single_pixel_clip_rectangle
[16:42:27] [PASSED] well_known_colors
[16:42:27] [PASSED] destination_pitch
[16:42:27] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[16:42:27] ==================== drm_test_fb_swab =====================
[16:42:27] [PASSED] single_pixel_source_buffer
[16:42:27] [PASSED] single_pixel_clip_rectangle
[16:42:27] [PASSED] well_known_colors
[16:42:27] [PASSED] destination_pitch
[16:42:27] ================ [PASSED] drm_test_fb_swab =================
[16:42:27] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[16:42:27] [PASSED] single_pixel_source_buffer
[16:42:27] [PASSED] single_pixel_clip_rectangle
[16:42:27] [PASSED] well_known_colors
[16:42:27] [PASSED] destination_pitch
[16:42:27] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[16:42:27] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[16:42:27] [PASSED] single_pixel_source_buffer
[16:42:27] [PASSED] single_pixel_clip_rectangle
[16:42:27] [PASSED] well_known_colors
[16:42:27] [PASSED] destination_pitch
[16:42:27] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[16:42:27] ================= drm_test_fb_clip_offset =================
[16:42:27] [PASSED] pass through
[16:42:27] [PASSED] horizontal offset
[16:42:27] [PASSED] vertical offset
[16:42:27] [PASSED] horizontal and vertical offset
[16:42:27] [PASSED] horizontal offset (custom pitch)
[16:42:27] [PASSED] vertical offset (custom pitch)
[16:42:27] [PASSED] horizontal and vertical offset (custom pitch)
[16:42:27] ============= [PASSED] drm_test_fb_clip_offset =============
[16:42:27] =================== drm_test_fb_memcpy ====================
[16:42:27] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[16:42:27] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[16:42:27] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[16:42:27] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[16:42:27] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[16:42:27] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[16:42:27] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[16:42:27] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[16:42:27] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[16:42:27] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[16:42:27] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[16:42:27] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[16:42:27] =============== [PASSED] drm_test_fb_memcpy ================
[16:42:27] ============= [PASSED] drm_format_helper_test ==============
[16:42:27] ================= drm_format (18 subtests) =================
[16:42:27] [PASSED] drm_test_format_block_width_invalid
[16:42:27] [PASSED] drm_test_format_block_width_one_plane
[16:42:27] [PASSED] drm_test_format_block_width_two_plane
[16:42:27] [PASSED] drm_test_format_block_width_three_plane
[16:42:27] [PASSED] drm_test_format_block_width_tiled
[16:42:27] [PASSED] drm_test_format_block_height_invalid
[16:42:27] [PASSED] drm_test_format_block_height_one_plane
[16:42:27] [PASSED] drm_test_format_block_height_two_plane
[16:42:27] [PASSED] drm_test_format_block_height_three_plane
[16:42:27] [PASSED] drm_test_format_block_height_tiled
[16:42:27] [PASSED] drm_test_format_min_pitch_invalid
[16:42:27] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[16:42:27] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[16:42:27] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[16:42:27] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[16:42:27] [PASSED] drm_test_format_min_pitch_two_plane
[16:42:27] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[16:42:27] [PASSED] drm_test_format_min_pitch_tiled
[16:42:27] =================== [PASSED] drm_format ====================
[16:42:27] ============== drm_framebuffer (10 subtests) ===============
[16:42:27] ========== drm_test_framebuffer_check_src_coords ==========
[16:42:27] [PASSED] Success: source fits into fb
[16:42:27] [PASSED] Fail: overflowing fb with x-axis coordinate
[16:42:27] [PASSED] Fail: overflowing fb with y-axis coordinate
[16:42:27] [PASSED] Fail: overflowing fb with source width
[16:42:27] [PASSED] Fail: overflowing fb with source height
[16:42:27] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[16:42:27] [PASSED] drm_test_framebuffer_cleanup
[16:42:27] =============== drm_test_framebuffer_create ===============
[16:42:27] [PASSED] ABGR8888 normal sizes
[16:42:27] [PASSED] ABGR8888 max sizes
[16:42:27] [PASSED] ABGR8888 pitch greater than min required
[16:42:27] [PASSED] ABGR8888 pitch less than min required
[16:42:27] [PASSED] ABGR8888 Invalid width
[16:42:27] [PASSED] ABGR8888 Invalid buffer handle
[16:42:27] [PASSED] No pixel format
[16:42:27] [PASSED] ABGR8888 Width 0
[16:42:27] [PASSED] ABGR8888 Height 0
[16:42:27] [PASSED] ABGR8888 Out of bound height * pitch combination
[16:42:27] [PASSED] ABGR8888 Large buffer offset
[16:42:27] [PASSED] ABGR8888 Buffer offset for inexistent plane
[16:42:27] [PASSED] ABGR8888 Invalid flag
[16:42:27] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[16:42:27] [PASSED] ABGR8888 Valid buffer modifier
[16:42:27] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[16:42:27] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[16:42:27] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[16:42:27] [PASSED] NV12 Normal sizes
[16:42:27] [PASSED] NV12 Max sizes
[16:42:27] [PASSED] NV12 Invalid pitch
[16:42:27] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[16:42:27] [PASSED] NV12 different modifier per-plane
[16:42:27] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[16:42:27] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[16:42:27] [PASSED] NV12 Modifier for inexistent plane
[16:42:27] [PASSED] NV12 Handle for inexistent plane
[16:42:27] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[16:42:27] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[16:42:27] [PASSED] YVU420 Normal sizes
[16:42:27] [PASSED] YVU420 Max sizes
[16:42:27] [PASSED] YVU420 Invalid pitch
[16:42:27] [PASSED] YVU420 Different pitches
[16:42:27] [PASSED] YVU420 Different buffer offsets/pitches
[16:42:27] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[16:42:27] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[16:42:27] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[16:42:27] [PASSED] YVU420 Valid modifier
[16:42:27] [PASSED] YVU420 Different modifiers per plane
[16:42:27] [PASSED] YVU420 Modifier for inexistent plane
[16:42:27] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[16:42:27] [PASSED] X0L2 Normal sizes
[16:42:27] [PASSED] X0L2 Max sizes
[16:42:27] [PASSED] X0L2 Invalid pitch
[16:42:27] [PASSED] X0L2 Pitch greater than minimum required
[16:42:27] [PASSED] X0L2 Handle for inexistent plane
[16:42:27] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[16:42:27] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[16:42:27] [PASSED] X0L2 Valid modifier
[16:42:27] [PASSED] X0L2 Modifier for inexistent plane
[16:42:27] =========== [PASSED] drm_test_framebuffer_create ===========
[16:42:27] [PASSED] drm_test_framebuffer_free
[16:42:27] [PASSED] drm_test_framebuffer_init
[16:42:27] [PASSED] drm_test_framebuffer_init_bad_format
[16:42:27] [PASSED] drm_test_framebuffer_init_dev_mismatch
[16:42:27] [PASSED] drm_test_framebuffer_lookup
[16:42:27] [PASSED] drm_test_framebuffer_lookup_inexistent
[16:42:27] [PASSED] drm_test_framebuffer_modifiers_not_supported
[16:42:27] ================= [PASSED] drm_framebuffer =================
[16:42:27] ================ drm_gem_shmem (8 subtests) ================
[16:42:27] [PASSED] drm_gem_shmem_test_obj_create
[16:42:27] [PASSED] drm_gem_shmem_test_obj_create_private
[16:42:27] [PASSED] drm_gem_shmem_test_pin_pages
[16:42:27] [PASSED] drm_gem_shmem_test_vmap
[16:42:27] [PASSED] drm_gem_shmem_test_get_sg_table
[16:42:27] [PASSED] drm_gem_shmem_test_get_pages_sgt
[16:42:27] [PASSED] drm_gem_shmem_test_madvise
[16:42:27] [PASSED] drm_gem_shmem_test_purge
[16:42:27] ================== [PASSED] drm_gem_shmem ==================
[16:42:27] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[16:42:27] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[16:42:27] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[16:42:27] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[16:42:27] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[16:42:27] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[16:42:27] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[16:42:27] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[16:42:27] [PASSED] Automatic
[16:42:27] [PASSED] Full
[16:42:27] [PASSED] Limited 16:235
[16:42:27] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[16:42:27] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[16:42:27] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[16:42:27] [PASSED] drm_test_check_disable_connector
[16:42:27] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[16:42:27] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[16:42:27] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[16:42:27] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[16:42:27] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[16:42:27] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[16:42:27] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[16:42:27] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[16:42:27] [PASSED] drm_test_check_output_bpc_dvi
[16:42:27] [PASSED] drm_test_check_output_bpc_format_vic_1
[16:42:27] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[16:42:27] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[16:42:27] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[16:42:27] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[16:42:27] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[16:42:27] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[16:42:27] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[16:42:27] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[16:42:27] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[16:42:27] [PASSED] drm_test_check_broadcast_rgb_value
[16:42:27] [PASSED] drm_test_check_bpc_8_value
[16:42:27] [PASSED] drm_test_check_bpc_10_value
[16:42:27] [PASSED] drm_test_check_bpc_12_value
[16:42:27] [PASSED] drm_test_check_format_value
[16:42:27] [PASSED] drm_test_check_tmds_char_value
[16:42:27] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[16:42:27] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[16:42:27] [PASSED] drm_test_check_mode_valid
[16:42:27] [PASSED] drm_test_check_mode_valid_reject
[16:42:27] [PASSED] drm_test_check_mode_valid_reject_rate
[16:42:27] [PASSED] drm_test_check_mode_valid_reject_max_clock
[16:42:27] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[16:42:27] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[16:42:27] [PASSED] drm_test_check_infoframes
[16:42:27] [PASSED] drm_test_check_reject_avi_infoframe
[16:42:27] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[16:42:27] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[16:42:27] [PASSED] drm_test_check_reject_audio_infoframe
[16:42:27] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[16:42:27] ================= drm_managed (2 subtests) =================
[16:42:27] [PASSED] drm_test_managed_release_action
[16:42:27] [PASSED] drm_test_managed_run_action
[16:42:27] =================== [PASSED] drm_managed ===================
[16:42:27] =================== drm_mm (6 subtests) ====================
[16:42:27] [PASSED] drm_test_mm_init
[16:42:27] [PASSED] drm_test_mm_debug
[16:42:27] [PASSED] drm_test_mm_align32
[16:42:27] [PASSED] drm_test_mm_align64
[16:42:27] [PASSED] drm_test_mm_lowest
[16:42:27] [PASSED] drm_test_mm_highest
[16:42:27] ===================== [PASSED] drm_mm ======================
[16:42:27] ============= drm_modes_analog_tv (5 subtests) =============
[16:42:27] [PASSED] drm_test_modes_analog_tv_mono_576i
[16:42:27] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[16:42:27] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[16:42:27] [PASSED] drm_test_modes_analog_tv_pal_576i
[16:42:27] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[16:42:27] =============== [PASSED] drm_modes_analog_tv ===============
[16:42:27] ============== drm_plane_helper (2 subtests) ===============
[16:42:27] =============== drm_test_check_plane_state ================
[16:42:27] [PASSED] clipping_simple
[16:42:27] [PASSED] clipping_rotate_reflect
[16:42:27] [PASSED] positioning_simple
[16:42:27] [PASSED] upscaling
[16:42:27] [PASSED] downscaling
[16:42:27] [PASSED] rounding1
[16:42:27] [PASSED] rounding2
[16:42:27] [PASSED] rounding3
[16:42:27] [PASSED] rounding4
[16:42:27] =========== [PASSED] drm_test_check_plane_state ============
[16:42:27] =========== drm_test_check_invalid_plane_state ============
[16:42:27] [PASSED] positioning_invalid
[16:42:27] [PASSED] upscaling_invalid
[16:42:27] [PASSED] downscaling_invalid
[16:42:27] ======= [PASSED] drm_test_check_invalid_plane_state ========
[16:42:27] ================ [PASSED] drm_plane_helper =================
[16:42:27] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[16:42:27] ====== drm_test_connector_helper_tv_get_modes_check =======
[16:42:27] [PASSED] None
[16:42:27] [PASSED] PAL
[16:42:27] [PASSED] NTSC
[16:42:27] [PASSED] Both, NTSC Default
[16:42:27] [PASSED] Both, PAL Default
[16:42:27] [PASSED] Both, NTSC Default, with PAL on command-line
[16:42:27] [PASSED] Both, PAL Default, with NTSC on command-line
[16:42:27] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[16:42:27] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[16:42:27] ================== drm_rect (9 subtests) ===================
[16:42:27] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[16:42:27] [PASSED] drm_test_rect_clip_scaled_not_clipped
[16:42:27] [PASSED] drm_test_rect_clip_scaled_clipped
[16:42:27] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[16:42:27] ================= drm_test_rect_intersect =================
[16:42:27] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[16:42:27] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[16:42:27] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[16:42:27] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[16:42:27] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[16:42:27] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[16:42:27] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[16:42:27] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[16:42:27] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[16:42:27] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[16:42:27] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[16:42:27] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[16:42:27] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[16:42:27] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[16:42:27] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[16:42:27] ============= [PASSED] drm_test_rect_intersect =============
[16:42:27] ================ drm_test_rect_calc_hscale ================
[16:42:27] [PASSED] normal use
[16:42:27] [PASSED] out of max range
[16:42:27] [PASSED] out of min range
[16:42:27] [PASSED] zero dst
[16:42:27] [PASSED] negative src
[16:42:27] [PASSED] negative dst
[16:42:27] ============ [PASSED] drm_test_rect_calc_hscale ============
[16:42:27] ================ drm_test_rect_calc_vscale ================
[16:42:27] [PASSED] normal use
[16:42:27] [PASSED] out of max range
[16:42:27] [PASSED] out of min range
[16:42:27] [PASSED] zero dst
[16:42:27] [PASSED] negative src
[16:42:27] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[16:42:27] ============ [PASSED] drm_test_rect_calc_vscale ============
[16:42:27] ================== drm_test_rect_rotate ===================
[16:42:27] [PASSED] reflect-x
[16:42:27] [PASSED] reflect-y
[16:42:27] [PASSED] rotate-0
[16:42:27] [PASSED] rotate-90
[16:42:27] [PASSED] rotate-180
[16:42:27] [PASSED] rotate-270
[16:42:27] ============== [PASSED] drm_test_rect_rotate ===============
[16:42:27] ================ drm_test_rect_rotate_inv =================
[16:42:27] [PASSED] reflect-x
[16:42:27] [PASSED] reflect-y
[16:42:27] [PASSED] rotate-0
[16:42:27] [PASSED] rotate-90
[16:42:27] [PASSED] rotate-180
[16:42:27] [PASSED] rotate-270
[16:42:27] ============ [PASSED] drm_test_rect_rotate_inv =============
[16:42:27] ==================== [PASSED] drm_rect =====================
[16:42:27] ============ drm_sysfb_modeset_test (1 subtest) ============
[16:42:27] ============ drm_test_sysfb_build_fourcc_list =============
[16:42:27] [PASSED] no native formats
[16:42:27] [PASSED] XRGB8888 as native format
[16:42:27] [PASSED] remove duplicates
[16:42:27] [PASSED] convert alpha formats
[16:42:27] [PASSED] random formats
[16:42:27] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[16:42:27] ============= [PASSED] drm_sysfb_modeset_test ==============
[16:42:27] ================== drm_fixp (2 subtests) ===================
[16:42:27] [PASSED] drm_test_int2fixp
[16:42:27] [PASSED] drm_test_sm2fixp
[16:42:27] ==================== [PASSED] drm_fixp =====================
[16:42:27] ============================================================
[16:42:27] Testing complete. Ran 621 tests: passed: 621
[16:42:27] Elapsed time: 26.754s total, 1.734s configuring, 24.850s building, 0.137s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[16:42:27] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:42:29] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:42:38] Starting KUnit Kernel (1/1)...
[16:42:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:42:38] ================= ttm_device (5 subtests) ==================
[16:42:38] [PASSED] ttm_device_init_basic
[16:42:38] [PASSED] ttm_device_init_multiple
[16:42:38] [PASSED] ttm_device_fini_basic
[16:42:38] [PASSED] ttm_device_init_no_vma_man
[16:42:38] ================== ttm_device_init_pools ==================
[16:42:38] [PASSED] No DMA allocations, no DMA32 required
[16:42:38] [PASSED] DMA allocations, DMA32 required
[16:42:38] [PASSED] No DMA allocations, DMA32 required
[16:42:38] [PASSED] DMA allocations, no DMA32 required
[16:42:38] ============== [PASSED] ttm_device_init_pools ==============
[16:42:38] =================== [PASSED] ttm_device ====================
[16:42:38] ================== ttm_pool (8 subtests) ===================
[16:42:38] ================== ttm_pool_alloc_basic ===================
[16:42:38] [PASSED] One page
[16:42:38] [PASSED] More than one page
[16:42:38] [PASSED] Above the allocation limit
[16:42:38] [PASSED] One page, with coherent DMA mappings enabled
[16:42:38] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:42:38] ============== [PASSED] ttm_pool_alloc_basic ===============
[16:42:38] ============== ttm_pool_alloc_basic_dma_addr ==============
[16:42:38] [PASSED] One page
[16:42:38] [PASSED] More than one page
[16:42:38] [PASSED] Above the allocation limit
[16:42:38] [PASSED] One page, with coherent DMA mappings enabled
[16:42:38] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:42:38] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[16:42:38] [PASSED] ttm_pool_alloc_order_caching_match
[16:42:38] [PASSED] ttm_pool_alloc_caching_mismatch
[16:42:38] [PASSED] ttm_pool_alloc_order_mismatch
[16:42:38] [PASSED] ttm_pool_free_dma_alloc
[16:42:38] [PASSED] ttm_pool_free_no_dma_alloc
[16:42:38] [PASSED] ttm_pool_fini_basic
[16:42:38] ==================== [PASSED] ttm_pool =====================
[16:42:38] ================ ttm_resource (8 subtests) =================
[16:42:38] ================= ttm_resource_init_basic =================
[16:42:38] [PASSED] Init resource in TTM_PL_SYSTEM
[16:42:38] [PASSED] Init resource in TTM_PL_VRAM
[16:42:38] [PASSED] Init resource in a private placement
[16:42:38] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[16:42:38] ============= [PASSED] ttm_resource_init_basic =============
[16:42:38] [PASSED] ttm_resource_init_pinned
[16:42:38] [PASSED] ttm_resource_fini_basic
[16:42:38] [PASSED] ttm_resource_manager_init_basic
[16:42:38] [PASSED] ttm_resource_manager_usage_basic
[16:42:38] [PASSED] ttm_resource_manager_set_used_basic
[16:42:38] [PASSED] ttm_sys_man_alloc_basic
[16:42:38] [PASSED] ttm_sys_man_free_basic
[16:42:38] ================== [PASSED] ttm_resource ===================
[16:42:38] =================== ttm_tt (15 subtests) ===================
[16:42:38] ==================== ttm_tt_init_basic ====================
[16:42:38] [PASSED] Page-aligned size
[16:42:38] [PASSED] Extra pages requested
[16:42:38] ================ [PASSED] ttm_tt_init_basic ================
[16:42:38] [PASSED] ttm_tt_init_misaligned
[16:42:38] [PASSED] ttm_tt_fini_basic
[16:42:38] [PASSED] ttm_tt_fini_sg
[16:42:38] [PASSED] ttm_tt_fini_shmem
[16:42:38] [PASSED] ttm_tt_create_basic
[16:42:38] [PASSED] ttm_tt_create_invalid_bo_type
[16:42:38] [PASSED] ttm_tt_create_ttm_exists
[16:42:38] [PASSED] ttm_tt_create_failed
[16:42:38] [PASSED] ttm_tt_destroy_basic
[16:42:38] [PASSED] ttm_tt_populate_null_ttm
[16:42:38] [PASSED] ttm_tt_populate_populated_ttm
[16:42:38] [PASSED] ttm_tt_unpopulate_basic
[16:42:38] [PASSED] ttm_tt_unpopulate_empty_ttm
[16:42:38] [PASSED] ttm_tt_swapin_basic
[16:42:38] ===================== [PASSED] ttm_tt ======================
[16:42:38] =================== ttm_bo (14 subtests) ===================
[16:42:38] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[16:42:38] [PASSED] Cannot be interrupted and sleeps
[16:42:38] [PASSED] Cannot be interrupted, locks straight away
[16:42:38] [PASSED] Can be interrupted, sleeps
[16:42:38] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[16:42:38] [PASSED] ttm_bo_reserve_locked_no_sleep
[16:42:38] [PASSED] ttm_bo_reserve_no_wait_ticket
[16:42:38] [PASSED] ttm_bo_reserve_double_resv
[16:42:38] [PASSED] ttm_bo_reserve_interrupted
[16:42:38] [PASSED] ttm_bo_reserve_deadlock
[16:42:38] [PASSED] ttm_bo_unreserve_basic
[16:42:38] [PASSED] ttm_bo_unreserve_pinned
[16:42:38] [PASSED] ttm_bo_unreserve_bulk
[16:42:38] [PASSED] ttm_bo_fini_basic
[16:42:38] [PASSED] ttm_bo_fini_shared_resv
[16:42:38] [PASSED] ttm_bo_pin_basic
[16:42:38] [PASSED] ttm_bo_pin_unpin_resource
[16:42:38] [PASSED] ttm_bo_multiple_pin_one_unpin
[16:42:38] ===================== [PASSED] ttm_bo ======================
[16:42:38] ============== ttm_bo_validate (22 subtests) ===============
[16:42:38] ============== ttm_bo_init_reserved_sys_man ===============
[16:42:38] [PASSED] Buffer object for userspace
[16:42:38] [PASSED] Kernel buffer object
[16:42:38] [PASSED] Shared buffer object
[16:42:38] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[16:42:38] ============== ttm_bo_init_reserved_mock_man ==============
[16:42:38] [PASSED] Buffer object for userspace
[16:42:38] [PASSED] Kernel buffer object
[16:42:38] [PASSED] Shared buffer object
[16:42:38] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[16:42:38] [PASSED] ttm_bo_init_reserved_resv
[16:42:38] ================== ttm_bo_validate_basic ==================
[16:42:38] [PASSED] Buffer object for userspace
[16:42:38] [PASSED] Kernel buffer object
[16:42:38] [PASSED] Shared buffer object
[16:42:38] ============== [PASSED] ttm_bo_validate_basic ==============
[16:42:38] [PASSED] ttm_bo_validate_invalid_placement
[16:42:38] ============= ttm_bo_validate_same_placement ==============
[16:42:38] [PASSED] System manager
[16:42:38] [PASSED] VRAM manager
[16:42:38] ========= [PASSED] ttm_bo_validate_same_placement ==========
[16:42:38] [PASSED] ttm_bo_validate_failed_alloc
[16:42:38] [PASSED] ttm_bo_validate_pinned
[16:42:38] [PASSED] ttm_bo_validate_busy_placement
[16:42:38] ================ ttm_bo_validate_multihop =================
[16:42:38] [PASSED] Buffer object for userspace
[16:42:38] [PASSED] Kernel buffer object
[16:42:38] [PASSED] Shared buffer object
[16:42:38] ============ [PASSED] ttm_bo_validate_multihop =============
[16:42:38] ========== ttm_bo_validate_no_placement_signaled ==========
[16:42:38] [PASSED] Buffer object in system domain, no page vector
[16:42:38] [PASSED] Buffer object in system domain with an existing page vector
[16:42:38] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[16:42:38] ======== ttm_bo_validate_no_placement_not_signaled ========
[16:42:38] [PASSED] Buffer object for userspace
[16:42:38] [PASSED] Kernel buffer object
[16:42:38] [PASSED] Shared buffer object
[16:42:38] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[16:42:38] [PASSED] ttm_bo_validate_move_fence_signaled
[16:42:39] ========= ttm_bo_validate_move_fence_not_signaled =========
[16:42:39] [PASSED] Waits for GPU
[16:42:39] [PASSED] Tries to lock straight away
[16:42:39] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[16:42:39] [PASSED] ttm_bo_validate_swapout
[16:42:39] [PASSED] ttm_bo_validate_happy_evict
[16:42:39] [PASSED] ttm_bo_validate_all_pinned_evict
[16:42:39] [PASSED] ttm_bo_validate_allowed_only_evict
[16:42:39] [PASSED] ttm_bo_validate_deleted_evict
[16:42:39] [PASSED] ttm_bo_validate_busy_domain_evict
[16:42:39] [PASSED] ttm_bo_validate_evict_gutting
[16:42:39] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[16:42:39] ================= [PASSED] ttm_bo_validate =================
[16:42:39] ============================================================
[16:42:39] Testing complete. Ran 102 tests: passed: 102
[16:42:39] Elapsed time: 11.607s total, 1.729s configuring, 9.611s building, 0.231s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 18+ messages in thread* ✓ Xe.CI.BAT: success for drm/i915: More uncore nukage from display code (rev3)
2026-03-31 15:42 [PATCH v2 00/12] drm/i915: More uncore nukage from display code Ville Syrjala
` (13 preceding siblings ...)
2026-03-31 16:42 ` ✓ CI.KUnit: success " Patchwork
@ 2026-03-31 17:16 ` Patchwork
2026-03-31 22:36 ` ✓ Xe.CI.FULL: " Patchwork
2026-04-01 13:16 ` [PATCH v2 00/12] drm/i915: More uncore nukage from display code Jani Nikula
16 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-03-31 17:16 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 876 bytes --]
== Series Details ==
Series: drm/i915: More uncore nukage from display code (rev3)
URL : https://patchwork.freedesktop.org/series/163872/
State : success
== Summary ==
CI Bug Log - changes from xe-4827-779129c7868f4c7205901d6e57b25de52b411d1c_BAT -> xe-pw-163872v3_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-4827-779129c7868f4c7205901d6e57b25de52b411d1c -> xe-pw-163872v3
IGT_8839: 8839
xe-4827-779129c7868f4c7205901d6e57b25de52b411d1c: 779129c7868f4c7205901d6e57b25de52b411d1c
xe-pw-163872v3: 163872v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v3/index.html
[-- Attachment #2: Type: text/html, Size: 1424 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread* ✓ Xe.CI.FULL: success for drm/i915: More uncore nukage from display code (rev3)
2026-03-31 15:42 [PATCH v2 00/12] drm/i915: More uncore nukage from display code Ville Syrjala
` (14 preceding siblings ...)
2026-03-31 17:16 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-03-31 22:36 ` Patchwork
2026-04-01 13:16 ` [PATCH v2 00/12] drm/i915: More uncore nukage from display code Jani Nikula
16 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-03-31 22:36 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1507 bytes --]
== Series Details ==
Series: drm/i915: More uncore nukage from display code (rev3)
URL : https://patchwork.freedesktop.org/series/163872/
State : success
== Summary ==
CI Bug Log - changes from xe-4827-779129c7868f4c7205901d6e57b25de52b411d1c_FULL -> xe-pw-163872v3_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-163872v3_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [PASS][1] -> [FAIL][2] ([Intel XE#301]) +1 other test fail
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4827-779129c7868f4c7205901d6e57b25de52b411d1c/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v3/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
Build changes
-------------
* Linux: xe-4827-779129c7868f4c7205901d6e57b25de52b411d1c -> xe-pw-163872v3
IGT_8839: 8839
xe-4827-779129c7868f4c7205901d6e57b25de52b411d1c: 779129c7868f4c7205901d6e57b25de52b411d1c
xe-pw-163872v3: 163872v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v3/index.html
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^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v2 00/12] drm/i915: More uncore nukage from display code
2026-03-31 15:42 [PATCH v2 00/12] drm/i915: More uncore nukage from display code Ville Syrjala
` (15 preceding siblings ...)
2026-03-31 22:36 ` ✓ Xe.CI.FULL: " Patchwork
@ 2026-04-01 13:16 ` Jani Nikula
16 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2026-04-01 13:16 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe
On Tue, 31 Mar 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Ggt rid of more intel_uncore stuff from the display code:
> - new intel_mchbar_read*() abstraction for MCHBAR registers
> - some direct replacement of intel_uncore_{read,write}()
> with intel_de_{read,write}()
>
> v2: Fix bisection on xe (nop intel_uncore_read64())
> Deal with review comments
Yeah, still looking good.
BR,
Jani.
>
> Ville Syrjälä (12):
> drm/i915/qgv: Use intel_de_read() for MTL_MEM_SS_INFO* reads
> drm/i915/mchbar: Provide intel_mchbar_read*() abstraction
> drm/i915/mchbar: Define the end of the MCHBAR mirror
> drm/i915/mchbar: WARN when accessing non-MCHBAR registers via
> intel_mchbar_read*()
> drm/i915/mchbar: Use intel_mchbar_read() instead of intel_de_read()
> drm/i915/mchbar: Use intel_mchbar_read*() instead of
> intel_uncore_read*()
> drm/i915/de: Add intel_de_read16()
> drm/i915/de: s/intel_de_read64_2x32()/intel_de_read64_2x32_volatile()/
> drm/i915/de: Add a simple intel_de_read64_2x32()
> drm/i915/vrr: Use intel_de_read64_2x32()
> drm/i915/mchbar: Use intel_de_read*() for MCHBAR register accesses
> drm/i915/rom: Use intel_de for SPI ROM register access
>
> drivers/gpu/drm/i915/Makefile | 1 +
> drivers/gpu/drm/i915/display/i9xx_wm.c | 10 +--
> drivers/gpu/drm/i915/display/intel_bw.c | 17 ++--
> drivers/gpu/drm/i915/display/intel_cdclk.c | 5 +-
> drivers/gpu/drm/i915/display/intel_de.c | 8 ++
> drivers/gpu/drm/i915/display/intel_de.h | 17 +++-
> .../drm/i915/display/intel_display_power.c | 3 +-
> drivers/gpu/drm/i915/display/intel_dram.c | 33 +++-----
> drivers/gpu/drm/i915/display/intel_mchbar.c | 79 +++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_mchbar.h | 19 +++++
> drivers/gpu/drm/i915/display/intel_rom.c | 19 ++---
> drivers/gpu/drm/i915/display/intel_vblank.c | 4 +-
> drivers/gpu/drm/i915/display/intel_vrr.c | 6 +-
> drivers/gpu/drm/i915/intel_mchbar_regs.h | 7 +-
> drivers/gpu/drm/xe/Makefile | 1 +
> 15 files changed, 172 insertions(+), 57 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/display/intel_mchbar.c
> create mode 100644 drivers/gpu/drm/i915/display/intel_mchbar.h
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 18+ messages in thread