From: Ashutosh Dixit <ashutosh.dixit@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Subject: [PATCH 1/3] drm/xe/rtp: Don't whitelist OA status registers
Date: Mon, 13 Apr 2026 20:52:42 -0700 [thread overview]
Message-ID: <20260414035244.741342-2-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <20260414035244.741342-1-ashutosh.dixit@intel.com>
OA status registers are not used by UMD's and do not need to be
whitelisted.
Fixes: ed455775c5a6 ("drm/xe/rtp: Refactor OAG MMIO trigger register whitelisting")
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/xe/xe_reg_whitelist.c | 10 +++-------
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
index 8cc313182968d..a4124f00c467f 100644
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
@@ -90,27 +90,23 @@ static const struct xe_rtp_entry_sr register_whitelist[] = {
RING_FORCE_TO_NONPRIV_ACCESS_RW))
},
-#define WHITELIST_OA_MMIO_TRG(trg, status, head) \
+#define WHITELIST_OA_MMIO_TRG(trg, head) \
WHITELIST(trg, RING_FORCE_TO_NONPRIV_ACCESS_RW), \
- WHITELIST(status, RING_FORCE_TO_NONPRIV_ACCESS_RD), \
WHITELIST(head, RING_FORCE_TO_NONPRIV_ACCESS_RD | RING_FORCE_TO_NONPRIV_RANGE_4)
#define WHITELIST_OAG_MMIO_TRG \
- WHITELIST_OA_MMIO_TRG(OAG_MMIOTRIGGER, OAG_OASTATUS, OAG_OAHEADPTR)
+ WHITELIST_OA_MMIO_TRG(OAG_MMIOTRIGGER, OAG_OAHEADPTR)
#define WHITELIST_OAM_MMIO_TRG \
WHITELIST_OA_MMIO_TRG(OAM_MMIO_TRG(XE_OAM_SAG_BASE_ADJ), \
- OAM_STATUS(XE_OAM_SAG_BASE_ADJ), \
OAM_HEAD_POINTER(XE_OAM_SAG_BASE_ADJ)), \
WHITELIST_OA_MMIO_TRG(OAM_MMIO_TRG(XE_OAM_SCMI_0_BASE_ADJ), \
- OAM_STATUS(XE_OAM_SCMI_0_BASE_ADJ), \
OAM_HEAD_POINTER(XE_OAM_SCMI_0_BASE_ADJ)), \
WHITELIST_OA_MMIO_TRG(OAM_MMIO_TRG(XE_OAM_SCMI_1_BASE_ADJ), \
- OAM_STATUS(XE_OAM_SCMI_1_BASE_ADJ), \
OAM_HEAD_POINTER(XE_OAM_SCMI_1_BASE_ADJ))
#define WHITELIST_OA_MERT_MMIO_TRG \
- WHITELIST_OA_MMIO_TRG(OAMERT_MMIO_TRG, OAMERT_STATUS, OAMERT_HEAD_POINTER)
+ WHITELIST_OA_MMIO_TRG(OAMERT_MMIO_TRG, OAMERT_HEAD_POINTER)
{ XE_RTP_NAME("oag_mmio_trg_rcs"),
XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1200, XE_RTP_END_VERSION_UNDEFINED),
--
2.48.1
next prev parent reply other threads:[~2026-04-14 3:52 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-14 3:52 [PATCH 0/3] drm/xe/rtp: OA register whitelist fixes Ashutosh Dixit
2026-04-14 3:52 ` Ashutosh Dixit [this message]
2026-04-14 3:52 ` [PATCH 2/3] drm/xe/rtp: Don't whitelist OA head pointer registers Ashutosh Dixit
2026-04-14 3:52 ` [PATCH 3/3] drm/xe/rtp: Fix offset alignment for MERT WHITELIST_OA_MERT_MMIO_TRG Ashutosh Dixit
2026-04-14 4:00 ` ✗ CI.checkpatch: warning for drm/xe/rtp: OA register whitelist fixes Patchwork
2026-04-14 4:01 ` ✓ CI.KUnit: success " Patchwork
2026-04-14 5:14 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-14 8:04 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-04-14 15:28 ` [PATCH 0/3] " Gustavo Sousa
2026-04-15 3:38 ` Dixit, Ashutosh
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