From: Nemesa Garg <nemesa.garg@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
dri-devel@lists.freedesktop.org
Cc: Nemesa Garg <nemesa.garg@intel.com>
Subject: [PATCH 0/2] DSC max delta bpp support
Date: Mon, 20 Apr 2026 16:56:09 +0530 [thread overview]
Message-ID: <20260420112611.1481530-1-nemesa.garg@intel.com> (raw)
Some sinks exposes DSC max bpp through delta based
DPCD fields. To support those sinks, add DP DPCD field
field and logic to decode the delta value in bppx16
format.
Nemesa Garg (2):
drm/dp: Define DSC bpp delta DPCD fields
drm/i915/dp: Decode DSC max delta bpp from sink DPCD
drivers/gpu/drm/i915/display/intel_dp.c | 40 +++++++++++++++++++++++++
include/drm/display/drm_dp.h | 8 ++++-
2 files changed, 47 insertions(+), 1 deletion(-)
--
2.25.1
next reply other threads:[~2026-04-20 11:30 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-20 11:26 Nemesa Garg [this message]
2026-04-20 11:26 ` [PATCH 1/2] drm/dp: Define DSC bpp delta DPCD fields Nemesa Garg
2026-04-21 6:34 ` Nautiyal, Ankit K
2026-04-20 11:26 ` [PATCH 2/2] drm/i915/dp: Decode DSC max delta bpp from sink DPCD Nemesa Garg
2026-04-21 10:50 ` Nautiyal, Ankit K
2026-04-20 22:34 ` ✓ CI.KUnit: success for DSC max delta bpp support Patchwork
2026-04-20 23:21 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-21 2:15 ` ✗ Xe.CI.FULL: failure " Patchwork
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