[PATCH v7 0/3] Introduce Xe Correctable Error Handling

[PATCH v7 0/3] Introduce Xe Correctable Error Handling

[Raag Jadav]

This series builds on top of system controller series[1] and adds initial
support for correctable error handling in xe. This serves as a foundation
for RAS infrastructure and will be further extended to facilitate other
RAS features.

Detailed description in commit message.

[1] https://patchwork.freedesktop.org/series/163196/

v2: Use system_percpu_wq instead of dedicated (Matthew Brost)
    Handle unexpected response length (Mallesh)

v3: Handle event flood (Mallesh)

v4: Handle IRQ before sysctrl initialization (Mallesh)
    Fix Severity/Component logging (Mallesh)
    s/xe_ras_error/xe_ras_error_class (Riana)

v5: Handle unexpected counter threshold crossed (Mallesh)

v6: Drop unused xe_device parameter (Mallesh)
    Fix unexpected counter threshold logic (Mallesh)
    Introduce work_lock in the patch it is used in (Riana)
    Drop xe prefix from static functions (Riana)
    Don't fail on unexpected event (Riana)
    Move sysctrl commands to xe_sysctrl_mailbox_types.h (Riana)
    Add kernel doc (Riana)
    Use xe_device parameter for xe_ras functions (Riana)
    Shorten dmesg logging (Riana)
    s/xe_ras_threshold_crossed_data/xe_ras_threshold_crossed (Riana)

v7: Use consistent error logs (Riana)
    s/reserved2/reserved1 (Riana)
    Update event count kdoc (Riana)

Raag Jadav (3):
  drm/xe/sysctrl: Add system controller interrupt handler
  drm/xe/sysctrl: Add system controller event support
  drm/xe/ras: Introduce correctable error handling

 drivers/gpu/drm/xe/Makefile                   |  2 +
 drivers/gpu/drm/xe/regs/xe_irq_regs.h         |  1 +
 drivers/gpu/drm/xe/xe_irq.c                   |  2 +
 drivers/gpu/drm/xe/xe_ras.c                   | 93 +++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras.h                   | 15 +++
 drivers/gpu/drm/xe/xe_ras_types.h             | 73 +++++++++++++++
 drivers/gpu/drm/xe/xe_sysctrl.c               | 45 +++++++--
 drivers/gpu/drm/xe/xe_sysctrl.h               |  2 +
 drivers/gpu/drm/xe/xe_sysctrl_event.c         | 88 ++++++++++++++++++
 drivers/gpu/drm/xe/xe_sysctrl_event_types.h   | 57 ++++++++++++
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 18 ++++
 drivers/gpu/drm/xe/xe_sysctrl_types.h         |  7 ++
 12 files changed, 396 insertions(+), 7 deletions(-)
 create mode 100644 drivers/gpu/drm/xe/xe_ras.c
 create mode 100644 drivers/gpu/drm/xe/xe_ras.h
 create mode 100644 drivers/gpu/drm/xe/xe_ras_types.h
 create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_event.c
 create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_event_types.h

-- 
2.43.0

[PATCH v7 1/3] drm/xe/sysctrl: Add system controller interrupt handler

[Raag Jadav]

Add system controller interrupt handler which is denoted by 11th bit in
GFX master interrupt register. While at it, add worker for scheduling
system controller work.

Co-developed-by: Soham Purkait <soham.purkait@intel.com>
Signed-off-by: Soham Purkait <soham.purkait@intel.com>
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Reviewed-by: Riana Tauro <riana.tauro@intel.com>
---
v2: Use system_percpu_wq instead of dedicated (Matthew Brost)
v4: Handle IRQ before sysctrl initialization (Mallesh)
v6: Introduce work_lock in the patch it is used in (Riana)
---
 drivers/gpu/drm/xe/regs/xe_irq_regs.h |  1 +
 drivers/gpu/drm/xe/xe_irq.c           |  2 ++
 drivers/gpu/drm/xe/xe_sysctrl.c       | 35 +++++++++++++++++++++------
 drivers/gpu/drm/xe/xe_sysctrl.h       |  1 +
 drivers/gpu/drm/xe/xe_sysctrl_types.h |  4 +++
 5 files changed, 36 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_irq_regs.h b/drivers/gpu/drm/xe/regs/xe_irq_regs.h
index 9d74f454d3ff..1d6b976c4de0 100644
--- a/drivers/gpu/drm/xe/regs/xe_irq_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_irq_regs.h
@@ -22,6 +22,7 @@
 #define   DISPLAY_IRQ				REG_BIT(16)
 #define   SOC_H2DMEMINT_IRQ			REG_BIT(13)
 #define   I2C_IRQ				REG_BIT(12)
+#define   SYSCTRL_IRQ				REG_BIT(11)
 #define   GT_DW_IRQ(x)				REG_BIT(x)
 
 /*
diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c
index 7560a45f7f64..9e49e2241da4 100644
--- a/drivers/gpu/drm/xe/xe_irq.c
+++ b/drivers/gpu/drm/xe/xe_irq.c
@@ -24,6 +24,7 @@
 #include "xe_mmio.h"
 #include "xe_pxp.h"
 #include "xe_sriov.h"
+#include "xe_sysctrl.h"
 #include "xe_tile.h"
 
 /*
@@ -525,6 +526,7 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
 				xe_heci_csc_irq_handler(xe, master_ctl);
 			xe_display_irq_handler(xe, master_ctl);
 			xe_i2c_irq_handler(xe, master_ctl);
+			xe_sysctrl_irq_handler(xe, master_ctl);
 			xe_mert_irq_handler(xe, master_ctl);
 			gu_misc_iir = gu_misc_irq_ack(xe, master_ctl);
 		}
diff --git a/drivers/gpu/drm/xe/xe_sysctrl.c b/drivers/gpu/drm/xe/xe_sysctrl.c
index 2bcef304eb9a..7de3e73bd8e0 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl.c
+++ b/drivers/gpu/drm/xe/xe_sysctrl.c
@@ -8,6 +8,7 @@
 
 #include <drm/drm_managed.h>
 
+#include "regs/xe_irq_regs.h"
 #include "regs/xe_sysctrl_regs.h"
 #include "xe_device.h"
 #include "xe_mmio.h"
@@ -30,10 +31,16 @@
 static void sysctrl_fini(void *arg)
 {
 	struct xe_device *xe = arg;
+	struct xe_sysctrl *sc = &xe->sc;
 
+	disable_work_sync(&sc->work);
 	xe->soc_remapper.set_sysctrl_region(xe, 0);
 }
 
+static void xe_sysctrl_work(struct work_struct *work)
+{
+}
+
 /**
  * xe_sysctrl_init() - Initialize System Controller subsystem
  * @xe: xe device instance
@@ -55,12 +62,6 @@ int xe_sysctrl_init(struct xe_device *xe)
 	if (!xe->info.has_sysctrl)
 		return 0;
 
-	xe->soc_remapper.set_sysctrl_region(xe, SYSCTRL_MAILBOX_INDEX);
-
-	ret = devm_add_action_or_reset(xe->drm.dev, sysctrl_fini, xe);
-	if (ret)
-		return ret;
-
 	sc->mmio = devm_kzalloc(xe->drm.dev, sizeof(*sc->mmio), GFP_KERNEL);
 	if (!sc->mmio)
 		return -ENOMEM;
@@ -73,9 +74,29 @@ int xe_sysctrl_init(struct xe_device *xe)
 	if (ret)
 		return ret;
 
+	xe->soc_remapper.set_sysctrl_region(xe, SYSCTRL_MAILBOX_INDEX);
 	xe_sysctrl_mailbox_init(sc);
+	INIT_WORK(&sc->work, xe_sysctrl_work);
 
-	return 0;
+	return devm_add_action_or_reset(xe->drm.dev, sysctrl_fini, xe);
+}
+
+/**
+ * xe_sysctrl_irq_handler() - Handler for System Controller interrupts
+ * @xe: xe device instance
+ * @master_ctl: interrupt register
+ *
+ * Handle interrupts generated by System Controller.
+ */
+void xe_sysctrl_irq_handler(struct xe_device *xe, u32 master_ctl)
+{
+	struct xe_sysctrl *sc = &xe->sc;
+
+	if (!xe->info.has_sysctrl || !sc->work.func)
+		return;
+
+	if (master_ctl & SYSCTRL_IRQ)
+		schedule_work(&sc->work);
 }
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_sysctrl.h b/drivers/gpu/drm/xe/xe_sysctrl.h
index f3b0f3716b2f..f7469bfc9324 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl.h
@@ -17,6 +17,7 @@ static inline struct xe_device *sc_to_xe(struct xe_sysctrl *sc)
 }
 
 int xe_sysctrl_init(struct xe_device *xe);
+void xe_sysctrl_irq_handler(struct xe_device *xe, u32 master_ctl);
 void xe_sysctrl_pm_resume(struct xe_device *xe);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_types.h b/drivers/gpu/drm/xe/xe_sysctrl_types.h
index 8217f6befe70..5f408d6491ef 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_types.h
@@ -8,6 +8,7 @@
 
 #include <linux/mutex.h>
 #include <linux/types.h>
+#include <linux/workqueue_types.h>
 
 struct xe_mmio;
 
@@ -27,6 +28,9 @@ struct xe_sysctrl {
 
 	/** @phase_bit: Message boundary phase toggle bit (0 or 1) */
 	bool phase_bit;
+
+	/** @work: Pending events worker */
+	struct work_struct work;
 };
 
 #endif
-- 
2.43.0

[PATCH v7 2/3] drm/xe/sysctrl: Add system controller event support

[Raag Jadav]

System controller reports different types of events to GFX endpoint for
different usecases, add initial support for them. This will be further
extended to service those usecases.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
v2: Handle unexpected response length (Mallesh)
v3: Handle event flood (Mallesh)
v6: Drop xe prefix from static functions (Riana)
    Don't fail on unexpected event (Riana)
    Move sysctrl commands to xe_sysctrl_mailbox_types.h (Riana)
    Add kernel doc (Riana)
v7: Use consistent error logs (Riana)
    s/reserved2/reserved1 (Riana)
    Update event count kdoc (Riana)
---
 drivers/gpu/drm/xe/Makefile                   |  1 +
 drivers/gpu/drm/xe/xe_sysctrl.c               | 10 +++
 drivers/gpu/drm/xe/xe_sysctrl.h               |  1 +
 drivers/gpu/drm/xe/xe_sysctrl_event.c         | 87 +++++++++++++++++++
 drivers/gpu/drm/xe/xe_sysctrl_event_types.h   | 57 ++++++++++++
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 18 ++++
 drivers/gpu/drm/xe/xe_sysctrl_types.h         |  3 +
 7 files changed, 177 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_event.c
 create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_event_types.h

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 3fceda259834..1c863b711ae9 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -126,6 +126,7 @@ xe-y += xe_bb.o \
 	xe_survivability_mode.o \
 	xe_sync.o \
 	xe_sysctrl.o \
+	xe_sysctrl_event.o \
 	xe_sysctrl_mailbox.o \
 	xe_tile.o \
 	xe_tile_sysfs.o \
diff --git a/drivers/gpu/drm/xe/xe_sysctrl.c b/drivers/gpu/drm/xe/xe_sysctrl.c
index 7de3e73bd8e0..1db20be8158b 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl.c
+++ b/drivers/gpu/drm/xe/xe_sysctrl.c
@@ -12,6 +12,7 @@
 #include "regs/xe_sysctrl_regs.h"
 #include "xe_device.h"
 #include "xe_mmio.h"
+#include "xe_pm.h"
 #include "xe_soc_remapper.h"
 #include "xe_sysctrl.h"
 #include "xe_sysctrl_mailbox.h"
@@ -39,6 +40,11 @@ static void sysctrl_fini(void *arg)
 
 static void xe_sysctrl_work(struct work_struct *work)
 {
+	struct xe_sysctrl *sc = container_of(work, struct xe_sysctrl, work);
+	struct xe_device *xe = sc_to_xe(sc);
+
+	guard(xe_pm_runtime)(xe);
+	xe_sysctrl_event(sc);
 }
 
 /**
@@ -74,6 +80,10 @@ int xe_sysctrl_init(struct xe_device *xe)
 	if (ret)
 		return ret;
 
+	ret = devm_mutex_init(xe->drm.dev, &sc->event_lock);
+	if (ret)
+		return ret;
+
 	xe->soc_remapper.set_sysctrl_region(xe, SYSCTRL_MAILBOX_INDEX);
 	xe_sysctrl_mailbox_init(sc);
 	INIT_WORK(&sc->work, xe_sysctrl_work);
diff --git a/drivers/gpu/drm/xe/xe_sysctrl.h b/drivers/gpu/drm/xe/xe_sysctrl.h
index f7469bfc9324..090dffb6d55f 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl.h
@@ -16,6 +16,7 @@ static inline struct xe_device *sc_to_xe(struct xe_sysctrl *sc)
 	return container_of(sc, struct xe_device, sc);
 }
 
+void xe_sysctrl_event(struct xe_sysctrl *sc);
 int xe_sysctrl_init(struct xe_device *xe);
 void xe_sysctrl_irq_handler(struct xe_device *xe, u32 master_ctl);
 void xe_sysctrl_pm_resume(struct xe_device *xe);
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_event.c b/drivers/gpu/drm/xe/xe_sysctrl_event.c
new file mode 100644
index 000000000000..5a5721699ce3
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_sysctrl_event.c
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include "xe_device.h"
+#include "xe_irq.h"
+#include "xe_printk.h"
+#include "xe_sysctrl.h"
+#include "xe_sysctrl_event_types.h"
+#include "xe_sysctrl_mailbox.h"
+#include "xe_sysctrl_mailbox_types.h"
+
+static void get_pending_event(struct xe_sysctrl *sc, struct xe_sysctrl_mailbox_command *command)
+{
+	struct xe_sysctrl_event_response *response = command->data_out;
+	struct xe_device *xe = sc_to_xe(sc);
+	u32 count = XE_SYSCTRL_EVENT_FLOOD;
+	size_t len;
+	int ret;
+
+	do {
+		memset(response, 0, sizeof(*response));
+
+		ret = xe_sysctrl_send_command(sc, command, &len);
+		if (ret) {
+			xe_err(xe, "sysctrl: failed to get pending event %d\n", ret);
+			return;
+		}
+
+		if (len != sizeof(*response)) {
+			xe_err(xe, "sysctrl: unexpected event response length %zu (expected %zu)\n",
+			       len, sizeof(*response));
+			return;
+		}
+
+		if (response->event == XE_SYSCTRL_EVENT_THRESHOLD_CROSSED)
+			xe_warn(xe, "[RAS]: counter threshold crossed\n");
+		else
+			xe_warn(xe, "sysctrl: unexpected event %#x\n", response->event);
+
+		if (!--count) {
+			xe_err(xe, "sysctrl: event flooding\n");
+			return;
+		}
+
+		xe_dbg(xe, "sysctrl: %u events pending\n", response->count);
+	} while (response->count);
+}
+
+static void event_request_prepare(struct xe_device *xe, struct xe_sysctrl_app_msg_hdr *header,
+				  struct xe_sysctrl_event_request *request)
+{
+	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+
+	header->data = REG_FIELD_PREP(APP_HDR_GROUP_ID_MASK, XE_SYSCTRL_GROUP_GFSP) |
+		       REG_FIELD_PREP(APP_HDR_COMMAND_MASK, XE_SYSCTRL_CMD_GET_PENDING_EVENT);
+
+	request->vector = xe_device_has_msix(xe) ? XE_IRQ_DEFAULT_MSIX : 0;
+	request->fn = PCI_FUNC(pdev->devfn);
+}
+
+/**
+ * xe_sysctrl_event() - Handler for System Controller events
+ * @sc: System Controller instance
+ *
+ * Handle events generated by System Controller.
+ */
+void xe_sysctrl_event(struct xe_sysctrl *sc)
+{
+	struct xe_sysctrl_mailbox_command command = {};
+	struct xe_sysctrl_event_response response = {};
+	struct xe_sysctrl_event_request request = {};
+	struct xe_sysctrl_app_msg_hdr header = {};
+
+	xe_device_assert_mem_access(sc_to_xe(sc));
+	event_request_prepare(sc_to_xe(sc), &header, &request);
+
+	command.header = header;
+	command.data_in = &request;
+	command.data_in_len = sizeof(request);
+	command.data_out = &response;
+	command.data_out_len = sizeof(response);
+
+	guard(mutex)(&sc->event_lock);
+	get_pending_event(sc, &command);
+}
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_event_types.h b/drivers/gpu/drm/xe/xe_sysctrl_event_types.h
new file mode 100644
index 000000000000..c16c66b9fa7f
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_sysctrl_event_types.h
@@ -0,0 +1,57 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_SYSCTRL_EVENT_TYPES_H_
+#define _XE_SYSCTRL_EVENT_TYPES_H_
+
+#include <linux/types.h>
+
+#define XE_SYSCTRL_EVENT_DATA_LEN		59
+
+/* Modify as needed */
+#define XE_SYSCTRL_EVENT_FLOOD			16
+
+/**
+ * enum xe_sysctrl_event - Events reported by System Controller
+ *
+ * @XE_SYSCTRL_EVENT_THRESHOLD_CROSSED: Error counter threshold crossed
+ */
+enum xe_sysctrl_event {
+	XE_SYSCTRL_EVENT_THRESHOLD_CROSSED	= 0x01,
+};
+
+/**
+ * struct xe_sysctrl_event_request - Request structure for pending event
+ */
+struct xe_sysctrl_event_request {
+	/** @vector: MSI-X vector that was triggered */
+	u32 vector;
+	/** @fn: Function index (0-7) of PCIe device */
+	u32 fn:8;
+	/** @reserved: Reserved for future use */
+	u32 reserved:24;
+	/** @reserved1: Reserved for future use */
+	u32 reserved1[2];
+} __packed;
+
+/**
+ * struct xe_sysctrl_event_response - Response structure for pending event
+ */
+struct xe_sysctrl_event_response {
+	/** @count: Pending event count after this response */
+	u32 count;
+	/** @event: Pending event type */
+	u32 event;
+	/** @timestamp: Timestamp of most recent event */
+	u64 timestamp;
+	/** @extended: Event has extended payload */
+	u32 extended:1;
+	/** @reserved: Reserved for future use */
+	u32 reserved:31;
+	/** @data: Generic event data */
+	u32 data[XE_SYSCTRL_EVENT_DATA_LEN];
+} __packed;
+
+#endif /* _XE_SYSCTRL_EVENT_TYPES_H_ */
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index 89456aec6097..84d7c647e743 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -10,6 +10,24 @@
 
 #include "abi/xe_sysctrl_abi.h"
 
+/**
+ * enum xe_sysctrl_group - System Controller command groups
+ *
+ * @XE_SYSCTRL_GROUP_GFSP: GFSP group
+ */
+enum xe_sysctrl_group {
+	XE_SYSCTRL_GROUP_GFSP			= 0x01,
+};
+
+/**
+ * enum xe_sysctrl_gfsp_cmd - Commands supported by GFSP group
+ *
+ * @XE_SYSCTRL_CMD_GET_PENDING_EVENT: Retrieve pending event
+ */
+enum xe_sysctrl_gfsp_cmd {
+	XE_SYSCTRL_CMD_GET_PENDING_EVENT	= 0x07,
+};
+
 /**
  * struct xe_sysctrl_mailbox_command - System Controller mailbox command
  */
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_types.h b/drivers/gpu/drm/xe/xe_sysctrl_types.h
index 5f408d6491ef..66ba24f43017 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_types.h
@@ -31,6 +31,9 @@ struct xe_sysctrl {
 
 	/** @work: Pending events worker */
 	struct work_struct work;
+
+	/** @event_lock: Mutex protecting pending events */
+	struct mutex event_lock;
 };
 
 #endif
-- 
2.43.0

[PATCH v7 3/3] drm/xe/ras: Introduce correctable error handling

[Raag Jadav]

Add initial support for correctable error handling which is serviced
using system controller event. Currently we only log the errors in
dmesg but this serves as a foundation for RAS infrastructure and will
be further extended to facilitate other RAS features.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Reviewed-by: Riana Tauro <riana.tauro@intel.com>
---
v2: Handle unexpected response length (Mallesh)
v3: Handle event flood (Mallesh)
v6: Drop xe prefix from static functions (Riana)
    Don't fail on unexpected event (Riana)
    Move sysctrl commands to xe_sysctrl_mailbox_types.h (Riana)
    Add kernel doc (Riana)
---
 drivers/gpu/drm/xe/Makefile           |  1 +
 drivers/gpu/drm/xe/xe_ras.c           | 93 +++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras.h           | 15 +++++
 drivers/gpu/drm/xe/xe_ras_types.h     | 73 +++++++++++++++++++++
 drivers/gpu/drm/xe/xe_sysctrl_event.c |  3 +-
 5 files changed, 184 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/xe/xe_ras.c
 create mode 100644 drivers/gpu/drm/xe/xe_ras.h
 create mode 100644 drivers/gpu/drm/xe/xe_ras_types.h

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 1c863b711ae9..22f17bd1082d 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -114,6 +114,7 @@ xe-y += xe_bb.o \
 	xe_pxp_submit.o \
 	xe_query.o \
 	xe_range_fence.o \
+	xe_ras.o \
 	xe_reg_sr.o \
 	xe_reg_whitelist.o \
 	xe_ring_ops.o \
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
new file mode 100644
index 000000000000..4cb16b419b0c
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -0,0 +1,93 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include "xe_device.h"
+#include "xe_printk.h"
+#include "xe_ras.h"
+#include "xe_ras_types.h"
+#include "xe_sysctrl.h"
+#include "xe_sysctrl_event_types.h"
+
+/* Severity of detected errors  */
+enum xe_ras_severity {
+	XE_RAS_SEV_NOT_SUPPORTED = 0,
+	XE_RAS_SEV_CORRECTABLE,
+	XE_RAS_SEV_UNCORRECTABLE,
+	XE_RAS_SEV_INFORMATIONAL,
+	XE_RAS_SEV_MAX
+};
+
+/* Major IP blocks/components where errors can originate */
+enum xe_ras_component {
+	XE_RAS_COMP_NOT_SUPPORTED = 0,
+	XE_RAS_COMP_DEVICE_MEMORY,
+	XE_RAS_COMP_CORE_COMPUTE,
+	XE_RAS_COMP_RESERVED,
+	XE_RAS_COMP_PCIE,
+	XE_RAS_COMP_FABRIC,
+	XE_RAS_COMP_SOC_INTERNAL,
+	XE_RAS_COMP_MAX
+};
+
+static const char *const xe_ras_severities[] = {
+	[XE_RAS_SEV_NOT_SUPPORTED]		= "Not Supported",
+	[XE_RAS_SEV_CORRECTABLE]		= "Correctable Error",
+	[XE_RAS_SEV_UNCORRECTABLE]		= "Uncorrectable Error",
+	[XE_RAS_SEV_INFORMATIONAL]		= "Informational Error",
+};
+static_assert(ARRAY_SIZE(xe_ras_severities) == XE_RAS_SEV_MAX);
+
+static const char *const xe_ras_components[] = {
+	[XE_RAS_COMP_NOT_SUPPORTED]		= "Not Supported",
+	[XE_RAS_COMP_DEVICE_MEMORY]		= "Device Memory",
+	[XE_RAS_COMP_CORE_COMPUTE]		= "Core Compute",
+	[XE_RAS_COMP_RESERVED]			= "Reserved",
+	[XE_RAS_COMP_PCIE]			= "PCIe",
+	[XE_RAS_COMP_FABRIC]			= "Fabric",
+	[XE_RAS_COMP_SOC_INTERNAL]		= "SoC Internal",
+};
+static_assert(ARRAY_SIZE(xe_ras_components) == XE_RAS_COMP_MAX);
+
+static inline const char *sev_to_str(u8 severity)
+{
+	if (severity >= XE_RAS_SEV_MAX)
+		severity = XE_RAS_SEV_NOT_SUPPORTED;
+
+	return xe_ras_severities[severity];
+}
+
+static inline const char *comp_to_str(u8 component)
+{
+	if (component >= XE_RAS_COMP_MAX)
+		component = XE_RAS_COMP_NOT_SUPPORTED;
+
+	return xe_ras_components[component];
+}
+
+void xe_ras_counter_threshold_crossed(struct xe_device *xe,
+				      struct xe_sysctrl_event_response *response)
+{
+	struct xe_ras_threshold_crossed *pending = (void *)&response->data;
+	struct xe_ras_error_class *errors = pending->counters;
+	u32 id, ncounters = pending->ncounters;
+
+	BUILD_BUG_ON(sizeof(response->data) < sizeof(*pending));
+	xe_device_assert_mem_access(xe);
+
+	if (!ncounters || ncounters > XE_RAS_NUM_COUNTERS)
+		xe_err(xe, "sysctrl: unexpected counter threshold crossed %u\n", ncounters);
+	else
+		xe_warn(xe, "[RAS]: counter threshold crossed, %u new errors\n", ncounters);
+
+	for (id = 0; id < ncounters && id < XE_RAS_NUM_COUNTERS; id++) {
+		u8 severity, component;
+
+		severity = errors[id].common.severity;
+		component = errors[id].common.component;
+
+		xe_warn(xe, "[RAS]: %s %s detected\n",
+			comp_to_str(component), sev_to_str(severity));
+	}
+}
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
new file mode 100644
index 000000000000..ea90593b62dc
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_RAS_H_
+#define _XE_RAS_H_
+
+struct xe_device;
+struct xe_sysctrl_event_response;
+
+void xe_ras_counter_threshold_crossed(struct xe_device *xe,
+				      struct xe_sysctrl_event_response *response);
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
new file mode 100644
index 000000000000..4e63c67f806a
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -0,0 +1,73 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_RAS_TYPES_H_
+#define _XE_RAS_TYPES_H_
+
+#include <linux/types.h>
+
+#define XE_RAS_NUM_COUNTERS			16
+
+/**
+ * struct xe_ras_error_common - Error fields that are common across all products
+ */
+struct xe_ras_error_common {
+	/** @severity: Error severity */
+	u8 severity;
+	/** @component: IP block where error originated */
+	u8 component;
+} __packed;
+
+/**
+ * struct xe_ras_error_unit - Error unit information
+ */
+struct xe_ras_error_unit {
+	/** @tile: Tile identifier */
+	u8 tile;
+	/** @instance: Instance identifier specific to IP */
+	u32 instance;
+} __packed;
+
+/**
+ * struct xe_ras_error_cause - Error cause information
+ */
+struct xe_ras_error_cause {
+	/** @cause: Cause/checker */
+	u32 cause;
+	/** @reserved: For future use */
+	u8 reserved;
+} __packed;
+
+/**
+ * struct xe_ras_error_product - Error fields that are specific to the product
+ */
+struct xe_ras_error_product {
+	/** @unit: Unit within IP block */
+	struct xe_ras_error_unit unit;
+	/** @cause: Cause/checker */
+	struct xe_ras_error_cause cause;
+} __packed;
+
+/**
+ * struct xe_ras_error_class - Combines common and product-specific parts
+ */
+struct xe_ras_error_class {
+	/** @common: Common error type and component */
+	struct xe_ras_error_common common;
+	/** @product: Product-specific unit and cause */
+	struct xe_ras_error_product product;
+} __packed;
+
+/**
+ * struct xe_ras_threshold_crossed - Data for threshold crossed event
+ */
+struct xe_ras_threshold_crossed {
+	/** @ncounters: Number of error counters that crossed thresholds */
+	u32 ncounters;
+	/** @counters: Array of error counters that crossed threshold */
+	struct xe_ras_error_class counters[XE_RAS_NUM_COUNTERS];
+} __packed;
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_event.c b/drivers/gpu/drm/xe/xe_sysctrl_event.c
index 5a5721699ce3..b4d17329af6c 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_event.c
+++ b/drivers/gpu/drm/xe/xe_sysctrl_event.c
@@ -6,6 +6,7 @@
 #include "xe_device.h"
 #include "xe_irq.h"
 #include "xe_printk.h"
+#include "xe_ras.h"
 #include "xe_sysctrl.h"
 #include "xe_sysctrl_event_types.h"
 #include "xe_sysctrl_mailbox.h"
@@ -35,7 +36,7 @@ static void get_pending_event(struct xe_sysctrl *sc, struct xe_sysctrl_mailbox_c
 		}
 
 		if (response->event == XE_SYSCTRL_EVENT_THRESHOLD_CROSSED)
-			xe_warn(xe, "[RAS]: counter threshold crossed\n");
+			xe_ras_counter_threshold_crossed(xe, response);
 		else
 			xe_warn(xe, "sysctrl: unexpected event %#x\n", response->event);
 
-- 
2.43.0

✗ CI.checkpatch: warning for Introduce Xe Correctable Error Handling (rev7)

[Patchwork]

== Series Details ==

Series: Introduce Xe Correctable Error Handling (rev7)
URL   : https://patchwork.freedesktop.org/series/160184/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
c8c12e558adaef7a4d125d83b6e1f8824bc13b82
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit c74cff60ea39ea0ec0c17a1f81e2a3fdd3b5f649
Author: Raag Jadav <raag.jadav@intel.com>
Date:   Tue Apr 28 11:18:26 2026 +0530

    drm/xe/ras: Introduce correctable error handling
    
    Add initial support for correctable error handling which is serviced
    using system controller event. Currently we only log the errors in
    dmesg but this serves as a foundation for RAS infrastructure and will
    be further extended to facilitate other RAS features.
    
    Signed-off-by: Raag Jadav <raag.jadav@intel.com>
    Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
    Reviewed-by: Riana Tauro <riana.tauro@intel.com>
+ /mt/dim checkpatch aea2c496abcf55b647c14fe720bfc4ea555aac6a drm-intel
12b99a64e06a drm/xe/sysctrl: Add system controller interrupt handler
2779dd761b55 drm/xe/sysctrl: Add system controller event support
-:73: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#73: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 219 lines checked
c74cff60ea39 drm/xe/ras: Introduce correctable error handling
-:28: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#28: 
new file mode 100644

-:72: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#72: FILE: drivers/gpu/drm/xe/xe_ras.c:40:
+};
+static_assert(ARRAY_SIZE(xe_ras_severities) == XE_RAS_SEV_MAX);

-:83: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#83: FILE: drivers/gpu/drm/xe/xe_ras.c:51:
+};
+static_assert(ARRAY_SIZE(xe_ras_components) == XE_RAS_COMP_MAX);

total: 0 errors, 1 warnings, 2 checks, 203 lines checked

✓ CI.KUnit: success for Introduce Xe Correctable Error Handling (rev7)

[Patchwork]

== Series Details ==

Series: Introduce Xe Correctable Error Handling (rev7)
URL   : https://patchwork.freedesktop.org/series/160184/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[05:57:16] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:57:20] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:57:51] Starting KUnit Kernel (1/1)...
[05:57:51] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:57:52] ================== guc_buf (11 subtests) ===================
[05:57:52] [PASSED] test_smallest
[05:57:52] [PASSED] test_largest
[05:57:52] [PASSED] test_granular
[05:57:52] [PASSED] test_unique
[05:57:52] [PASSED] test_overlap
[05:57:52] [PASSED] test_reusable
[05:57:52] [PASSED] test_too_big
[05:57:52] [PASSED] test_flush
[05:57:52] [PASSED] test_lookup
[05:57:52] [PASSED] test_data
[05:57:52] [PASSED] test_class
[05:57:52] ===================== [PASSED] guc_buf =====================
[05:57:52] =================== guc_dbm (7 subtests) ===================
[05:57:52] [PASSED] test_empty
[05:57:52] [PASSED] test_default
[05:57:52] ======================== test_size  ========================
[05:57:52] [PASSED] 4
[05:57:52] [PASSED] 8
[05:57:52] [PASSED] 32
[05:57:52] [PASSED] 256
[05:57:52] ==================== [PASSED] test_size ====================
[05:57:52] ======================= test_reuse  ========================
[05:57:52] [PASSED] 4
[05:57:52] [PASSED] 8
[05:57:52] [PASSED] 32
[05:57:52] [PASSED] 256
[05:57:52] =================== [PASSED] test_reuse ====================
[05:57:52] =================== test_range_overlap  ====================
[05:57:52] [PASSED] 4
[05:57:52] [PASSED] 8
[05:57:52] [PASSED] 32
[05:57:52] [PASSED] 256
[05:57:52] =============== [PASSED] test_range_overlap ================
[05:57:52] =================== test_range_compact  ====================
[05:57:52] [PASSED] 4
[05:57:52] [PASSED] 8
[05:57:52] [PASSED] 32
[05:57:52] [PASSED] 256
[05:57:52] =============== [PASSED] test_range_compact ================
[05:57:52] ==================== test_range_spare  =====================
[05:57:52] [PASSED] 4
[05:57:52] [PASSED] 8
[05:57:52] [PASSED] 32
[05:57:52] [PASSED] 256
[05:57:52] ================ [PASSED] test_range_spare =================
[05:57:52] ===================== [PASSED] guc_dbm =====================
[05:57:52] =================== guc_idm (6 subtests) ===================
[05:57:52] [PASSED] bad_init
[05:57:52] [PASSED] no_init
[05:57:52] [PASSED] init_fini
[05:57:52] [PASSED] check_used
[05:57:52] [PASSED] check_quota
[05:57:52] [PASSED] check_all
[05:57:52] ===================== [PASSED] guc_idm =====================
[05:57:52] ================== no_relay (3 subtests) ===================
[05:57:52] [PASSED] xe_drops_guc2pf_if_not_ready
[05:57:52] [PASSED] xe_drops_guc2vf_if_not_ready
[05:57:52] [PASSED] xe_rejects_send_if_not_ready
[05:57:52] ==================== [PASSED] no_relay =====================
[05:57:52] ================== pf_relay (14 subtests) ==================
[05:57:52] [PASSED] pf_rejects_guc2pf_too_short
[05:57:52] [PASSED] pf_rejects_guc2pf_too_long
[05:57:52] [PASSED] pf_rejects_guc2pf_no_payload
[05:57:52] [PASSED] pf_fails_no_payload
[05:57:52] [PASSED] pf_fails_bad_origin
[05:57:52] [PASSED] pf_fails_bad_type
[05:57:52] [PASSED] pf_txn_reports_error
[05:57:52] [PASSED] pf_txn_sends_pf2guc
[05:57:52] [PASSED] pf_sends_pf2guc
[05:57:52] [SKIPPED] pf_loopback_nop
[05:57:52] [SKIPPED] pf_loopback_echo
[05:57:52] [SKIPPED] pf_loopback_fail
[05:57:52] [SKIPPED] pf_loopback_busy
[05:57:52] [SKIPPED] pf_loopback_retry
[05:57:52] ==================== [PASSED] pf_relay =====================
[05:57:52] ================== vf_relay (3 subtests) ===================
[05:57:52] [PASSED] vf_rejects_guc2vf_too_short
[05:57:52] [PASSED] vf_rejects_guc2vf_too_long
[05:57:52] [PASSED] vf_rejects_guc2vf_no_payload
[05:57:52] ==================== [PASSED] vf_relay =====================
[05:57:52] ================ pf_gt_config (9 subtests) =================
[05:57:52] [PASSED] fair_contexts_1vf
[05:57:52] [PASSED] fair_doorbells_1vf
[05:57:52] [PASSED] fair_ggtt_1vf
[05:57:52] ====================== fair_vram_1vf  ======================
[05:57:52] [PASSED] 3.50 GiB
[05:57:52] [PASSED] 11.5 GiB
[05:57:52] [PASSED] 15.5 GiB
[05:57:52] [PASSED] 31.5 GiB
[05:57:52] [PASSED] 63.5 GiB
[05:57:52] [PASSED] 1.91 GiB
[05:57:52] ================== [PASSED] fair_vram_1vf ==================
[05:57:52] ================ fair_vram_1vf_admin_only  =================
[05:57:52] [PASSED] 3.50 GiB
[05:57:52] [PASSED] 11.5 GiB
[05:57:52] [PASSED] 15.5 GiB
[05:57:52] [PASSED] 31.5 GiB
[05:57:52] [PASSED] 63.5 GiB
[05:57:52] [PASSED] 1.91 GiB
[05:57:52] ============ [PASSED] fair_vram_1vf_admin_only =============
[05:57:52] ====================== fair_contexts  ======================
[05:57:52] [PASSED] 1 VF
[05:57:52] [PASSED] 2 VFs
[05:57:52] [PASSED] 3 VFs
[05:57:52] [PASSED] 4 VFs
[05:57:52] [PASSED] 5 VFs
[05:57:52] [PASSED] 6 VFs
[05:57:52] [PASSED] 7 VFs
[05:57:52] [PASSED] 8 VFs
[05:57:52] [PASSED] 9 VFs
[05:57:52] [PASSED] 10 VFs
[05:57:52] [PASSED] 11 VFs
[05:57:52] [PASSED] 12 VFs
[05:57:52] [PASSED] 13 VFs
[05:57:52] [PASSED] 14 VFs
[05:57:52] [PASSED] 15 VFs
[05:57:52] [PASSED] 16 VFs
[05:57:52] [PASSED] 17 VFs
[05:57:52] [PASSED] 18 VFs
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[05:57:52] [PASSED] 23 VFs
[05:57:52] [PASSED] 24 VFs
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[05:57:52] [PASSED] 37 VFs
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[05:57:52] [PASSED] 39 VFs
[05:57:52] [PASSED] 40 VFs
[05:57:52] [PASSED] 41 VFs
[05:57:52] [PASSED] 42 VFs
[05:57:52] [PASSED] 43 VFs
[05:57:52] [PASSED] 44 VFs
[05:57:52] [PASSED] 45 VFs
[05:57:52] [PASSED] 46 VFs
[05:57:52] [PASSED] 47 VFs
[05:57:52] [PASSED] 48 VFs
[05:57:52] [PASSED] 49 VFs
[05:57:52] [PASSED] 50 VFs
[05:57:52] [PASSED] 51 VFs
[05:57:52] [PASSED] 52 VFs
[05:57:52] [PASSED] 53 VFs
[05:57:52] [PASSED] 54 VFs
[05:57:52] [PASSED] 55 VFs
[05:57:52] [PASSED] 56 VFs
[05:57:52] [PASSED] 57 VFs
[05:57:52] [PASSED] 58 VFs
[05:57:52] [PASSED] 59 VFs
[05:57:52] [PASSED] 60 VFs
[05:57:52] [PASSED] 61 VFs
[05:57:52] [PASSED] 62 VFs
[05:57:52] [PASSED] 63 VFs
[05:57:52] ================== [PASSED] fair_contexts ==================
[05:57:52] ===================== fair_doorbells  ======================
[05:57:52] [PASSED] 1 VF
[05:57:52] [PASSED] 2 VFs
[05:57:52] [PASSED] 3 VFs
[05:57:52] [PASSED] 4 VFs
[05:57:52] [PASSED] 5 VFs
[05:57:52] [PASSED] 6 VFs
[05:57:52] [PASSED] 7 VFs
[05:57:52] [PASSED] 8 VFs
[05:57:52] [PASSED] 9 VFs
[05:57:52] [PASSED] 10 VFs
[05:57:52] [PASSED] 11 VFs
[05:57:52] [PASSED] 12 VFs
[05:57:52] [PASSED] 13 VFs
[05:57:52] [PASSED] 14 VFs
[05:57:52] [PASSED] 15 VFs
[05:57:52] [PASSED] 16 VFs
[05:57:52] [PASSED] 17 VFs
[05:57:52] [PASSED] 18 VFs
[05:57:52] [PASSED] 19 VFs
[05:57:52] [PASSED] 20 VFs
[05:57:52] [PASSED] 21 VFs
[05:57:52] [PASSED] 22 VFs
[05:57:52] [PASSED] 23 VFs
[05:57:52] [PASSED] 24 VFs
[05:57:52] [PASSED] 25 VFs
[05:57:52] [PASSED] 26 VFs
[05:57:52] [PASSED] 27 VFs
[05:57:52] [PASSED] 28 VFs
[05:57:52] [PASSED] 29 VFs
[05:57:52] [PASSED] 30 VFs
[05:57:52] [PASSED] 31 VFs
[05:57:52] [PASSED] 32 VFs
[05:57:52] [PASSED] 33 VFs
[05:57:52] [PASSED] 34 VFs
[05:57:52] [PASSED] 35 VFs
[05:57:52] [PASSED] 36 VFs
[05:57:52] [PASSED] 37 VFs
[05:57:52] [PASSED] 38 VFs
[05:57:52] [PASSED] 39 VFs
[05:57:52] [PASSED] 40 VFs
[05:57:52] [PASSED] 41 VFs
[05:57:52] [PASSED] 42 VFs
[05:57:52] [PASSED] 43 VFs
[05:57:52] [PASSED] 44 VFs
[05:57:52] [PASSED] 45 VFs
[05:57:52] [PASSED] 46 VFs
[05:57:52] [PASSED] 47 VFs
[05:57:52] [PASSED] 48 VFs
[05:57:52] [PASSED] 49 VFs
[05:57:52] [PASSED] 50 VFs
[05:57:52] [PASSED] 51 VFs
[05:57:52] [PASSED] 52 VFs
[05:57:52] [PASSED] 53 VFs
[05:57:52] [PASSED] 54 VFs
[05:57:52] [PASSED] 55 VFs
[05:57:52] [PASSED] 56 VFs
[05:57:52] [PASSED] 57 VFs
[05:57:52] [PASSED] 58 VFs
[05:57:52] [PASSED] 59 VFs
[05:57:52] [PASSED] 60 VFs
[05:57:52] [PASSED] 61 VFs
[05:57:52] [PASSED] 62 VFs
[05:57:52] [PASSED] 63 VFs
[05:57:52] ================= [PASSED] fair_doorbells ==================
[05:57:52] ======================== fair_ggtt  ========================
[05:57:52] [PASSED] 1 VF
[05:57:52] [PASSED] 2 VFs
[05:57:52] [PASSED] 3 VFs
[05:57:52] [PASSED] 4 VFs
[05:57:52] [PASSED] 5 VFs
[05:57:52] [PASSED] 6 VFs
[05:57:52] [PASSED] 7 VFs
[05:57:52] [PASSED] 8 VFs
[05:57:52] [PASSED] 9 VFs
[05:57:52] [PASSED] 10 VFs
[05:57:52] [PASSED] 11 VFs
[05:57:52] [PASSED] 12 VFs
[05:57:52] [PASSED] 13 VFs
[05:57:52] [PASSED] 14 VFs
[05:57:52] [PASSED] 15 VFs
[05:57:52] [PASSED] 16 VFs
[05:57:52] [PASSED] 17 VFs
[05:57:52] [PASSED] 18 VFs
[05:57:52] [PASSED] 19 VFs
[05:57:52] [PASSED] 20 VFs
[05:57:52] [PASSED] 21 VFs
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[05:57:52] [PASSED] 24 VFs
[05:57:52] [PASSED] 25 VFs
[05:57:52] [PASSED] 26 VFs
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[05:57:52] [PASSED] 32 VFs
[05:57:52] [PASSED] 33 VFs
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[05:57:52] [PASSED] 35 VFs
[05:57:52] [PASSED] 36 VFs
[05:57:52] [PASSED] 37 VFs
[05:57:52] [PASSED] 38 VFs
[05:57:52] [PASSED] 39 VFs
[05:57:52] [PASSED] 40 VFs
[05:57:52] [PASSED] 41 VFs
[05:57:52] [PASSED] 42 VFs
[05:57:52] [PASSED] 43 VFs
[05:57:52] [PASSED] 44 VFs
[05:57:52] [PASSED] 45 VFs
[05:57:52] [PASSED] 46 VFs
[05:57:52] [PASSED] 47 VFs
[05:57:52] [PASSED] 48 VFs
[05:57:52] [PASSED] 49 VFs
[05:57:52] [PASSED] 50 VFs
[05:57:52] [PASSED] 51 VFs
[05:57:52] [PASSED] 52 VFs
[05:57:52] [PASSED] 53 VFs
[05:57:52] [PASSED] 54 VFs
[05:57:52] [PASSED] 55 VFs
[05:57:52] [PASSED] 56 VFs
[05:57:52] [PASSED] 57 VFs
[05:57:52] [PASSED] 58 VFs
[05:57:52] [PASSED] 59 VFs
[05:57:52] [PASSED] 60 VFs
[05:57:52] [PASSED] 61 VFs
[05:57:52] [PASSED] 62 VFs
[05:57:52] [PASSED] 63 VFs
[05:57:52] ==================== [PASSED] fair_ggtt ====================
[05:57:52] ======================== fair_vram  ========================
[05:57:52] [PASSED] 1 VF
[05:57:52] [PASSED] 2 VFs
[05:57:52] [PASSED] 3 VFs
[05:57:52] [PASSED] 4 VFs
[05:57:52] [PASSED] 5 VFs
[05:57:52] [PASSED] 6 VFs
[05:57:52] [PASSED] 7 VFs
[05:57:52] [PASSED] 8 VFs
[05:57:52] [PASSED] 9 VFs
[05:57:52] [PASSED] 10 VFs
[05:57:52] [PASSED] 11 VFs
[05:57:52] [PASSED] 12 VFs
[05:57:52] [PASSED] 13 VFs
[05:57:52] [PASSED] 14 VFs
[05:57:52] [PASSED] 15 VFs
[05:57:52] [PASSED] 16 VFs
[05:57:52] [PASSED] 17 VFs
[05:57:52] [PASSED] 18 VFs
[05:57:52] [PASSED] 19 VFs
[05:57:52] [PASSED] 20 VFs
[05:57:52] [PASSED] 21 VFs
[05:57:52] [PASSED] 22 VFs
[05:57:52] [PASSED] 23 VFs
[05:57:52] [PASSED] 24 VFs
[05:57:52] [PASSED] 25 VFs
[05:57:52] [PASSED] 26 VFs
[05:57:52] [PASSED] 27 VFs
[05:57:52] [PASSED] 28 VFs
[05:57:52] [PASSED] 29 VFs
[05:57:52] [PASSED] 30 VFs
[05:57:52] [PASSED] 31 VFs
[05:57:52] [PASSED] 32 VFs
[05:57:52] [PASSED] 33 VFs
[05:57:52] [PASSED] 34 VFs
[05:57:52] [PASSED] 35 VFs
[05:57:52] [PASSED] 36 VFs
[05:57:52] [PASSED] 37 VFs
[05:57:52] [PASSED] 38 VFs
[05:57:52] [PASSED] 39 VFs
[05:57:52] [PASSED] 40 VFs
[05:57:52] [PASSED] 41 VFs
[05:57:52] [PASSED] 42 VFs
[05:57:52] [PASSED] 43 VFs
[05:57:52] [PASSED] 44 VFs
[05:57:52] [PASSED] 45 VFs
[05:57:52] [PASSED] 46 VFs
[05:57:52] [PASSED] 47 VFs
[05:57:52] [PASSED] 48 VFs
[05:57:52] [PASSED] 49 VFs
[05:57:52] [PASSED] 50 VFs
[05:57:52] [PASSED] 51 VFs
[05:57:52] [PASSED] 52 VFs
[05:57:52] [PASSED] 53 VFs
[05:57:52] [PASSED] 54 VFs
[05:57:52] [PASSED] 55 VFs
[05:57:52] [PASSED] 56 VFs
[05:57:52] [PASSED] 57 VFs
[05:57:52] [PASSED] 58 VFs
[05:57:52] [PASSED] 59 VFs
[05:57:52] [PASSED] 60 VFs
[05:57:52] [PASSED] 61 VFs
[05:57:52] [PASSED] 62 VFs
[05:57:52] [PASSED] 63 VFs
[05:57:52] ==================== [PASSED] fair_vram ====================
[05:57:52] ================== [PASSED] pf_gt_config ===================
[05:57:52] ===================== lmtt (1 subtest) =====================
[05:57:52] ======================== test_ops  =========================
[05:57:52] [PASSED] 2-level
[05:57:52] [PASSED] multi-level
[05:57:52] ==================== [PASSED] test_ops =====================
[05:57:52] ====================== [PASSED] lmtt =======================
[05:57:52] ================= pf_service (11 subtests) =================
[05:57:52] [PASSED] pf_negotiate_any
[05:57:52] [PASSED] pf_negotiate_base_match
[05:57:52] [PASSED] pf_negotiate_base_newer
[05:57:52] [PASSED] pf_negotiate_base_next
[05:57:52] [SKIPPED] pf_negotiate_base_older
[05:57:52] [PASSED] pf_negotiate_base_prev
[05:57:52] [PASSED] pf_negotiate_latest_match
[05:57:52] [PASSED] pf_negotiate_latest_newer
[05:57:52] [PASSED] pf_negotiate_latest_next
[05:57:52] [SKIPPED] pf_negotiate_latest_older
[05:57:52] [SKIPPED] pf_negotiate_latest_prev
[05:57:52] =================== [PASSED] pf_service ====================
[05:57:52] ================= xe_guc_g2g (2 subtests) ==================
[05:57:52] ============== xe_live_guc_g2g_kunit_default  ==============
[05:57:52] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[05:57:52] ============== xe_live_guc_g2g_kunit_allmem  ===============
[05:57:52] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[05:57:52] =================== [SKIPPED] xe_guc_g2g ===================
[05:57:52] =================== xe_mocs (2 subtests) ===================
[05:57:52] ================ xe_live_mocs_kernel_kunit  ================
[05:57:52] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[05:57:52] ================ xe_live_mocs_reset_kunit  =================
[05:57:52] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[05:57:52] ==================== [SKIPPED] xe_mocs =====================
[05:57:52] ================= xe_migrate (2 subtests) ==================
[05:57:52] ================= xe_migrate_sanity_kunit  =================
[05:57:52] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[05:57:52] ================== xe_validate_ccs_kunit  ==================
[05:57:52] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[05:57:52] =================== [SKIPPED] xe_migrate ===================
[05:57:52] ================== xe_dma_buf (1 subtest) ==================
[05:57:52] ==================== xe_dma_buf_kunit  =====================
[05:57:52] ================ [SKIPPED] xe_dma_buf_kunit ================
[05:57:52] =================== [SKIPPED] xe_dma_buf ===================
[05:57:52] ================= xe_bo_shrink (1 subtest) =================
[05:57:52] =================== xe_bo_shrink_kunit  ====================
[05:57:52] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[05:57:52] ================== [SKIPPED] xe_bo_shrink ==================
[05:57:52] ==================== xe_bo (2 subtests) ====================
[05:57:52] ================== xe_ccs_migrate_kunit  ===================
[05:57:52] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[05:57:52] ==================== xe_bo_evict_kunit  ====================
[05:57:52] =============== [SKIPPED] xe_bo_evict_kunit ================
[05:57:52] ===================== [SKIPPED] xe_bo ======================
[05:57:52] ==================== args (13 subtests) ====================
[05:57:52] [PASSED] count_args_test
[05:57:52] [PASSED] call_args_example
[05:57:52] [PASSED] call_args_test
[05:57:52] [PASSED] drop_first_arg_example
[05:57:52] [PASSED] drop_first_arg_test
[05:57:52] [PASSED] first_arg_example
[05:57:52] [PASSED] first_arg_test
[05:57:52] [PASSED] last_arg_example
[05:57:52] [PASSED] last_arg_test
[05:57:52] [PASSED] pick_arg_example
[05:57:52] [PASSED] if_args_example
[05:57:52] [PASSED] if_args_test
[05:57:52] [PASSED] sep_comma_example
[05:57:52] ====================== [PASSED] args =======================
[05:57:52] =================== xe_pci (3 subtests) ====================
[05:57:52] ==================== check_graphics_ip  ====================
[05:57:52] [PASSED] 12.00 Xe_LP
[05:57:52] [PASSED] 12.10 Xe_LP+
[05:57:52] [PASSED] 12.55 Xe_HPG
[05:57:52] [PASSED] 12.60 Xe_HPC
[05:57:52] [PASSED] 12.70 Xe_LPG
[05:57:52] [PASSED] 12.71 Xe_LPG
[05:57:52] [PASSED] 12.74 Xe_LPG+
[05:57:52] [PASSED] 20.01 Xe2_HPG
[05:57:52] [PASSED] 20.02 Xe2_HPG
[05:57:52] [PASSED] 20.04 Xe2_LPG
[05:57:52] [PASSED] 30.00 Xe3_LPG
[05:57:52] [PASSED] 30.01 Xe3_LPG
[05:57:52] [PASSED] 30.03 Xe3_LPG
[05:57:52] [PASSED] 30.04 Xe3_LPG
[05:57:52] [PASSED] 30.05 Xe3_LPG
[05:57:52] [PASSED] 35.10 Xe3p_LPG
[05:57:52] [PASSED] 35.11 Xe3p_XPC
[05:57:52] ================ [PASSED] check_graphics_ip ================
[05:57:52] ===================== check_media_ip  ======================
[05:57:52] [PASSED] 12.00 Xe_M
[05:57:52] [PASSED] 12.55 Xe_HPM
[05:57:52] [PASSED] 13.00 Xe_LPM+
[05:57:52] [PASSED] 13.01 Xe2_HPM
[05:57:52] [PASSED] 20.00 Xe2_LPM
[05:57:52] [PASSED] 30.00 Xe3_LPM
[05:57:52] [PASSED] 30.02 Xe3_LPM
[05:57:52] [PASSED] 35.00 Xe3p_LPM
[05:57:52] [PASSED] 35.03 Xe3p_HPM
[05:57:52] ================= [PASSED] check_media_ip ==================
[05:57:52] =================== check_platform_desc  ===================
[05:57:52] [PASSED] 0x9A60 (TIGERLAKE)
[05:57:52] [PASSED] 0x9A68 (TIGERLAKE)
[05:57:52] [PASSED] 0x9A70 (TIGERLAKE)
[05:57:52] [PASSED] 0x9A40 (TIGERLAKE)
[05:57:52] [PASSED] 0x9A49 (TIGERLAKE)
[05:57:52] [PASSED] 0x9A59 (TIGERLAKE)
[05:57:52] [PASSED] 0x9A78 (TIGERLAKE)
[05:57:52] [PASSED] 0x9AC0 (TIGERLAKE)
[05:57:52] [PASSED] 0x9AC9 (TIGERLAKE)
[05:57:52] [PASSED] 0x9AD9 (TIGERLAKE)
[05:57:52] [PASSED] 0x9AF8 (TIGERLAKE)
[05:57:52] [PASSED] 0x4C80 (ROCKETLAKE)
[05:57:52] [PASSED] 0x4C8A (ROCKETLAKE)
[05:57:52] [PASSED] 0x4C8B (ROCKETLAKE)
[05:57:52] [PASSED] 0x4C8C (ROCKETLAKE)
[05:57:52] [PASSED] 0x4C90 (ROCKETLAKE)
[05:57:52] [PASSED] 0x4C9A (ROCKETLAKE)
[05:57:52] [PASSED] 0x4680 (ALDERLAKE_S)
[05:57:52] [PASSED] 0x4682 (ALDERLAKE_S)
[05:57:52] [PASSED] 0x4688 (ALDERLAKE_S)
[05:57:52] [PASSED] 0x468A (ALDERLAKE_S)
[05:57:52] [PASSED] 0x468B (ALDERLAKE_S)
[05:57:52] [PASSED] 0x4690 (ALDERLAKE_S)
[05:57:52] [PASSED] 0x4692 (ALDERLAKE_S)
[05:57:52] [PASSED] 0x4693 (ALDERLAKE_S)
[05:57:52] [PASSED] 0x46A0 (ALDERLAKE_P)
[05:57:52] [PASSED] 0x46A1 (ALDERLAKE_P)
[05:57:52] [PASSED] 0x46A2 (ALDERLAKE_P)
[05:57:52] [PASSED] 0x46A3 (ALDERLAKE_P)
[05:57:52] [PASSED] 0x46A6 (ALDERLAKE_P)
[05:57:52] [PASSED] 0x46A8 (ALDERLAKE_P)
[05:57:52] [PASSED] 0x46AA (ALDERLAKE_P)
[05:57:52] [PASSED] 0x462A (ALDERLAKE_P)
[05:57:52] [PASSED] 0x4626 (ALDERLAKE_P)
[05:57:52] [PASSED] 0x4628 (ALDERLAKE_P)
[05:57:52] [PASSED] 0x46B0 (ALDERLAKE_P)
[05:57:52] [PASSED] 0x46B1 (ALDERLAKE_P)
[05:57:52] [PASSED] 0x46B2 (ALDERLAKE_P)
[05:57:52] [PASSED] 0x46B3 (ALDERLAKE_P)
[05:57:52] [PASSED] 0x46C0 (ALDERLAKE_P)
[05:57:52] [PASSED] 0x46C1 (ALDERLAKE_P)
[05:57:52] [PASSED] 0x46C2 (ALDERLAKE_P)
[05:57:52] [PASSED] 0x46C3 (ALDERLAKE_P)
[05:57:52] [PASSED] 0x46D0 (ALDERLAKE_N)
[05:57:52] [PASSED] 0x46D1 (ALDERLAKE_N)
[05:57:52] [PASSED] 0x46D2 (ALDERLAKE_N)
[05:57:52] [PASSED] 0x46D3 (ALDERLAKE_N)
[05:57:52] [PASSED] 0x46D4 (ALDERLAKE_N)
[05:57:52] [PASSED] 0xA721 (ALDERLAKE_P)
[05:57:52] [PASSED] 0xA7A1 (ALDERLAKE_P)
[05:57:52] [PASSED] 0xA7A9 (ALDERLAKE_P)
[05:57:52] [PASSED] 0xA7AC (ALDERLAKE_P)
[05:57:52] [PASSED] 0xA7AD (ALDERLAKE_P)
[05:57:52] [PASSED] 0xA720 (ALDERLAKE_P)
[05:57:52] [PASSED] 0xA7A0 (ALDERLAKE_P)
[05:57:52] [PASSED] 0xA7A8 (ALDERLAKE_P)
[05:57:52] [PASSED] 0xA7AA (ALDERLAKE_P)
[05:57:52] [PASSED] 0xA7AB (ALDERLAKE_P)
[05:57:52] [PASSED] 0xA780 (ALDERLAKE_S)
[05:57:52] [PASSED] 0xA781 (ALDERLAKE_S)
[05:57:52] [PASSED] 0xA782 (ALDERLAKE_S)
[05:57:52] [PASSED] 0xA783 (ALDERLAKE_S)
[05:57:52] [PASSED] 0xA788 (ALDERLAKE_S)
[05:57:52] [PASSED] 0xA789 (ALDERLAKE_S)
[05:57:52] [PASSED] 0xA78A (ALDERLAKE_S)
[05:57:52] [PASSED] 0xA78B (ALDERLAKE_S)
[05:57:52] [PASSED] 0x4905 (DG1)
[05:57:52] [PASSED] 0x4906 (DG1)
[05:57:52] [PASSED] 0x4907 (DG1)
[05:57:52] [PASSED] 0x4908 (DG1)
[05:57:52] [PASSED] 0x4909 (DG1)
[05:57:52] [PASSED] 0x56C0 (DG2)
[05:57:52] [PASSED] 0x56C2 (DG2)
[05:57:52] [PASSED] 0x56C1 (DG2)
[05:57:52] [PASSED] 0x7D51 (METEORLAKE)
[05:57:52] [PASSED] 0x7DD1 (METEORLAKE)
[05:57:52] [PASSED] 0x7D41 (METEORLAKE)
[05:57:52] [PASSED] 0x7D67 (METEORLAKE)
[05:57:52] [PASSED] 0xB640 (METEORLAKE)
[05:57:52] [PASSED] 0x56A0 (DG2)
[05:57:52] [PASSED] 0x56A1 (DG2)
[05:57:52] [PASSED] 0x56A2 (DG2)
[05:57:52] [PASSED] 0x56BE (DG2)
[05:57:52] [PASSED] 0x56BF (DG2)
[05:57:52] [PASSED] 0x5690 (DG2)
[05:57:52] [PASSED] 0x5691 (DG2)
[05:57:52] [PASSED] 0x5692 (DG2)
[05:57:52] [PASSED] 0x56A5 (DG2)
[05:57:52] [PASSED] 0x56A6 (DG2)
[05:57:52] [PASSED] 0x56B0 (DG2)
[05:57:52] [PASSED] 0x56B1 (DG2)
[05:57:52] [PASSED] 0x56BA (DG2)
[05:57:52] [PASSED] 0x56BB (DG2)
[05:57:52] [PASSED] 0x56BC (DG2)
[05:57:52] [PASSED] 0x56BD (DG2)
[05:57:52] [PASSED] 0x5693 (DG2)
[05:57:52] [PASSED] 0x5694 (DG2)
[05:57:52] [PASSED] 0x5695 (DG2)
[05:57:52] [PASSED] 0x56A3 (DG2)
[05:57:52] [PASSED] 0x56A4 (DG2)
[05:57:52] [PASSED] 0x56B2 (DG2)
[05:57:52] [PASSED] 0x56B3 (DG2)
[05:57:52] [PASSED] 0x5696 (DG2)
[05:57:52] [PASSED] 0x5697 (DG2)
[05:57:52] [PASSED] 0xB69 (PVC)
[05:57:52] [PASSED] 0xB6E (PVC)
[05:57:52] [PASSED] 0xBD4 (PVC)
[05:57:52] [PASSED] 0xBD5 (PVC)
[05:57:52] [PASSED] 0xBD6 (PVC)
[05:57:52] [PASSED] 0xBD7 (PVC)
[05:57:52] [PASSED] 0xBD8 (PVC)
[05:57:52] [PASSED] 0xBD9 (PVC)
[05:57:52] [PASSED] 0xBDA (PVC)
[05:57:52] [PASSED] 0xBDB (PVC)
[05:57:52] [PASSED] 0xBE0 (PVC)
[05:57:52] [PASSED] 0xBE1 (PVC)
[05:57:52] [PASSED] 0xBE5 (PVC)
[05:57:52] [PASSED] 0x7D40 (METEORLAKE)
[05:57:52] [PASSED] 0x7D45 (METEORLAKE)
[05:57:52] [PASSED] 0x7D55 (METEORLAKE)
[05:57:52] [PASSED] 0x7D60 (METEORLAKE)
[05:57:52] [PASSED] 0x7DD5 (METEORLAKE)
[05:57:52] [PASSED] 0x6420 (LUNARLAKE)
[05:57:52] [PASSED] 0x64A0 (LUNARLAKE)
[05:57:52] [PASSED] 0x64B0 (LUNARLAKE)
[05:57:52] [PASSED] 0xE202 (BATTLEMAGE)
[05:57:52] [PASSED] 0xE209 (BATTLEMAGE)
[05:57:52] [PASSED] 0xE20B (BATTLEMAGE)
[05:57:52] [PASSED] 0xE20C (BATTLEMAGE)
[05:57:52] [PASSED] 0xE20D (BATTLEMAGE)
[05:57:52] [PASSED] 0xE210 (BATTLEMAGE)
[05:57:52] [PASSED] 0xE211 (BATTLEMAGE)
[05:57:52] [PASSED] 0xE212 (BATTLEMAGE)
[05:57:52] [PASSED] 0xE216 (BATTLEMAGE)
[05:57:52] [PASSED] 0xE220 (BATTLEMAGE)
[05:57:52] [PASSED] 0xE221 (BATTLEMAGE)
[05:57:52] [PASSED] 0xE222 (BATTLEMAGE)
[05:57:52] [PASSED] 0xE223 (BATTLEMAGE)
[05:57:52] [PASSED] 0xB080 (PANTHERLAKE)
[05:57:52] [PASSED] 0xB081 (PANTHERLAKE)
[05:57:52] [PASSED] 0xB082 (PANTHERLAKE)
[05:57:52] [PASSED] 0xB083 (PANTHERLAKE)
[05:57:52] [PASSED] 0xB084 (PANTHERLAKE)
[05:57:52] [PASSED] 0xB085 (PANTHERLAKE)
[05:57:52] [PASSED] 0xB086 (PANTHERLAKE)
[05:57:52] [PASSED] 0xB087 (PANTHERLAKE)
[05:57:52] [PASSED] 0xB08F (PANTHERLAKE)
[05:57:52] [PASSED] 0xB090 (PANTHERLAKE)
[05:57:52] [PASSED] 0xB0A0 (PANTHERLAKE)
[05:57:52] [PASSED] 0xB0B0 (PANTHERLAKE)
[05:57:52] [PASSED] 0xFD80 (PANTHERLAKE)
[05:57:52] [PASSED] 0xFD81 (PANTHERLAKE)
[05:57:52] [PASSED] 0xD740 (NOVALAKE_S)
[05:57:52] [PASSED] 0xD741 (NOVALAKE_S)
[05:57:52] [PASSED] 0xD742 (NOVALAKE_S)
[05:57:52] [PASSED] 0xD743 (NOVALAKE_S)
[05:57:52] [PASSED] 0xD744 (NOVALAKE_S)
[05:57:52] [PASSED] 0xD745 (NOVALAKE_S)
[05:57:52] [PASSED] 0x674C (CRESCENTISLAND)
[05:57:52] [PASSED] 0xD750 (NOVALAKE_P)
[05:57:52] [PASSED] 0xD751 (NOVALAKE_P)
[05:57:52] [PASSED] 0xD752 (NOVALAKE_P)
[05:57:52] [PASSED] 0xD753 (NOVALAKE_P)
[05:57:52] [PASSED] 0xD754 (NOVALAKE_P)
[05:57:52] [PASSED] 0xD755 (NOVALAKE_P)
[05:57:52] [PASSED] 0xD756 (NOVALAKE_P)
[05:57:52] [PASSED] 0xD757 (NOVALAKE_P)
[05:57:52] [PASSED] 0xD75F (NOVALAKE_P)
[05:57:52] =============== [PASSED] check_platform_desc ===============
[05:57:52] ===================== [PASSED] xe_pci ======================
[05:57:52] =================== xe_rtp (2 subtests) ====================
[05:57:52] =============== xe_rtp_process_to_sr_tests  ================
[05:57:52] [PASSED] coalesce-same-reg
[05:57:52] [PASSED] no-match-no-add
[05:57:52] [PASSED] match-or
[05:57:52] [PASSED] match-or-xfail
[05:57:52] [PASSED] no-match-no-add-multiple-rules
[05:57:52] [PASSED] two-regs-two-entries
[05:57:52] [PASSED] clr-one-set-other
[05:57:52] [PASSED] set-field
[05:57:52] [PASSED] conflict-duplicate
[05:57:52] [PASSED] conflict-not-disjoint
[05:57:52] [PASSED] conflict-reg-type
[05:57:52] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[05:57:52] ================== xe_rtp_process_tests  ===================
[05:57:52] [PASSED] active1
[05:57:52] [PASSED] active2
[05:57:52] [PASSED] active-inactive
[05:57:52] [PASSED] inactive-active
[05:57:52] [PASSED] inactive-1st_or_active-inactive
[05:57:52] [PASSED] inactive-2nd_or_active-inactive
[05:57:52] [PASSED] inactive-last_or_active-inactive
[05:57:52] [PASSED] inactive-no_or_active-inactive
[05:57:52] ============== [PASSED] xe_rtp_process_tests ===============
[05:57:52] ===================== [PASSED] xe_rtp ======================
[05:57:52] ==================== xe_wa (1 subtest) =====================
[05:57:52] ======================== xe_wa_gt  =========================
[05:57:52] [PASSED] TIGERLAKE B0
[05:57:52] [PASSED] DG1 A0
[05:57:52] [PASSED] DG1 B0
[05:57:52] [PASSED] ALDERLAKE_S A0
[05:57:52] [PASSED] ALDERLAKE_S B0
[05:57:52] [PASSED] ALDERLAKE_S C0
[05:57:52] [PASSED] ALDERLAKE_S D0
[05:57:52] [PASSED] ALDERLAKE_P A0
[05:57:52] [PASSED] ALDERLAKE_P B0
[05:57:52] [PASSED] ALDERLAKE_P C0
[05:57:52] [PASSED] ALDERLAKE_S RPLS D0
[05:57:52] [PASSED] ALDERLAKE_P RPLU E0
[05:57:52] [PASSED] DG2 G10 C0
[05:57:52] [PASSED] DG2 G11 B1
[05:57:52] [PASSED] DG2 G12 A1
[05:57:52] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[05:57:52] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[05:57:52] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[05:57:52] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[05:57:52] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[05:57:52] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[05:57:52] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[05:57:52] ==================== [PASSED] xe_wa_gt =====================
[05:57:52] ====================== [PASSED] xe_wa ======================
[05:57:52] ============================================================
[05:57:52] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[05:57:52] Elapsed time: 36.090s total, 4.267s configuring, 31.206s building, 0.605s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[05:57:52] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:57:54] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:58:18] Starting KUnit Kernel (1/1)...
[05:58:18] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:58:18] ============ drm_test_pick_cmdline (2 subtests) ============
[05:58:18] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[05:58:18] =============== drm_test_pick_cmdline_named  ===============
[05:58:18] [PASSED] NTSC
[05:58:18] [PASSED] NTSC-J
[05:58:18] [PASSED] PAL
[05:58:18] [PASSED] PAL-M
[05:58:18] =========== [PASSED] drm_test_pick_cmdline_named ===========
[05:58:18] ============== [PASSED] drm_test_pick_cmdline ==============
[05:58:18] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[05:58:18] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[05:58:18] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[05:58:18] =========== drm_validate_clone_mode (2 subtests) ===========
[05:58:18] ============== drm_test_check_in_clone_mode  ===============
[05:58:18] [PASSED] in_clone_mode
[05:58:18] [PASSED] not_in_clone_mode
[05:58:18] ========== [PASSED] drm_test_check_in_clone_mode ===========
[05:58:18] =============== drm_test_check_valid_clones  ===============
[05:58:18] [PASSED] not_in_clone_mode
[05:58:18] [PASSED] valid_clone
[05:58:18] [PASSED] invalid_clone
[05:58:18] =========== [PASSED] drm_test_check_valid_clones ===========
[05:58:18] ============= [PASSED] drm_validate_clone_mode =============
[05:58:18] ============= drm_validate_modeset (1 subtest) =============
[05:58:18] [PASSED] drm_test_check_connector_changed_modeset
[05:58:18] ============== [PASSED] drm_validate_modeset ===============
[05:58:18] ====== drm_test_bridge_get_current_state (2 subtests) ======
[05:58:18] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[05:58:18] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[05:58:18] ======== [PASSED] drm_test_bridge_get_current_state ========
[05:58:18] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[05:58:18] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[05:58:18] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[05:58:18] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[05:58:18] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[05:58:18] ============== drm_bridge_alloc (2 subtests) ===============
[05:58:18] [PASSED] drm_test_drm_bridge_alloc_basic
[05:58:18] [PASSED] drm_test_drm_bridge_alloc_get_put
[05:58:18] ================ [PASSED] drm_bridge_alloc =================
[05:58:18] ============= drm_cmdline_parser (40 subtests) =============
[05:58:18] [PASSED] drm_test_cmdline_force_d_only
[05:58:18] [PASSED] drm_test_cmdline_force_D_only_dvi
[05:58:18] [PASSED] drm_test_cmdline_force_D_only_hdmi
[05:58:18] [PASSED] drm_test_cmdline_force_D_only_not_digital
[05:58:18] [PASSED] drm_test_cmdline_force_e_only
[05:58:18] [PASSED] drm_test_cmdline_res
[05:58:18] [PASSED] drm_test_cmdline_res_vesa
[05:58:18] [PASSED] drm_test_cmdline_res_vesa_rblank
[05:58:18] [PASSED] drm_test_cmdline_res_rblank
[05:58:18] [PASSED] drm_test_cmdline_res_bpp
[05:58:18] [PASSED] drm_test_cmdline_res_refresh
[05:58:18] [PASSED] drm_test_cmdline_res_bpp_refresh
[05:58:18] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[05:58:18] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[05:58:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[05:58:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[05:58:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[05:58:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[05:58:18] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[05:58:18] [PASSED] drm_test_cmdline_res_margins_force_on
[05:58:18] [PASSED] drm_test_cmdline_res_vesa_margins
[05:58:18] [PASSED] drm_test_cmdline_name
[05:58:18] [PASSED] drm_test_cmdline_name_bpp
[05:58:18] [PASSED] drm_test_cmdline_name_option
[05:58:18] [PASSED] drm_test_cmdline_name_bpp_option
[05:58:18] [PASSED] drm_test_cmdline_rotate_0
[05:58:18] [PASSED] drm_test_cmdline_rotate_90
[05:58:18] [PASSED] drm_test_cmdline_rotate_180
[05:58:18] [PASSED] drm_test_cmdline_rotate_270
[05:58:18] [PASSED] drm_test_cmdline_hmirror
[05:58:18] [PASSED] drm_test_cmdline_vmirror
[05:58:18] [PASSED] drm_test_cmdline_margin_options
[05:58:18] [PASSED] drm_test_cmdline_multiple_options
[05:58:18] [PASSED] drm_test_cmdline_bpp_extra_and_option
[05:58:18] [PASSED] drm_test_cmdline_extra_and_option
[05:58:18] [PASSED] drm_test_cmdline_freestanding_options
[05:58:18] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[05:58:18] [PASSED] drm_test_cmdline_panel_orientation
[05:58:18] ================ drm_test_cmdline_invalid  =================
[05:58:18] [PASSED] margin_only
[05:58:18] [PASSED] interlace_only
[05:58:18] [PASSED] res_missing_x
[05:58:18] [PASSED] res_missing_y
[05:58:18] [PASSED] res_bad_y
[05:58:18] [PASSED] res_missing_y_bpp
[05:58:18] [PASSED] res_bad_bpp
[05:58:18] [PASSED] res_bad_refresh
[05:58:18] [PASSED] res_bpp_refresh_force_on_off
[05:58:18] [PASSED] res_invalid_mode
[05:58:18] [PASSED] res_bpp_wrong_place_mode
[05:58:18] [PASSED] name_bpp_refresh
[05:58:18] [PASSED] name_refresh
[05:58:18] [PASSED] name_refresh_wrong_mode
[05:58:18] [PASSED] name_refresh_invalid_mode
[05:58:18] [PASSED] rotate_multiple
[05:58:18] [PASSED] rotate_invalid_val
[05:58:18] [PASSED] rotate_truncated
[05:58:18] [PASSED] invalid_option
[05:58:18] [PASSED] invalid_tv_option
[05:58:18] [PASSED] truncated_tv_option
[05:58:18] ============ [PASSED] drm_test_cmdline_invalid =============
[05:58:18] =============== drm_test_cmdline_tv_options  ===============
[05:58:18] [PASSED] NTSC
[05:58:18] [PASSED] NTSC_443
[05:58:18] [PASSED] NTSC_J
[05:58:18] [PASSED] PAL
[05:58:18] [PASSED] PAL_M
[05:58:18] [PASSED] PAL_N
[05:58:18] [PASSED] SECAM
[05:58:18] [PASSED] MONO_525
[05:58:18] [PASSED] MONO_625
[05:58:18] =========== [PASSED] drm_test_cmdline_tv_options ===========
[05:58:18] =============== [PASSED] drm_cmdline_parser ================
[05:58:18] ========== drmm_connector_hdmi_init (20 subtests) ==========
[05:58:18] [PASSED] drm_test_connector_hdmi_init_valid
[05:58:18] [PASSED] drm_test_connector_hdmi_init_bpc_8
[05:58:18] [PASSED] drm_test_connector_hdmi_init_bpc_10
[05:58:18] [PASSED] drm_test_connector_hdmi_init_bpc_12
[05:58:18] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[05:58:18] [PASSED] drm_test_connector_hdmi_init_bpc_null
[05:58:18] [PASSED] drm_test_connector_hdmi_init_formats_empty
[05:58:18] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[05:58:18] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[05:58:18] [PASSED] supported_formats=0x9 yuv420_allowed=1
[05:58:18] [PASSED] supported_formats=0x9 yuv420_allowed=0
[05:58:18] [PASSED] supported_formats=0x5 yuv420_allowed=1
[05:58:18] [PASSED] supported_formats=0x5 yuv420_allowed=0
[05:58:18] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[05:58:18] [PASSED] drm_test_connector_hdmi_init_null_ddc
[05:58:18] [PASSED] drm_test_connector_hdmi_init_null_product
[05:58:18] [PASSED] drm_test_connector_hdmi_init_null_vendor
[05:58:18] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[05:58:18] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[05:58:18] [PASSED] drm_test_connector_hdmi_init_product_valid
[05:58:18] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[05:58:18] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[05:58:18] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[05:58:18] ========= drm_test_connector_hdmi_init_type_valid  =========
[05:58:18] [PASSED] HDMI-A
[05:58:18] [PASSED] HDMI-B
[05:58:18] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[05:58:18] ======== drm_test_connector_hdmi_init_type_invalid  ========
[05:58:18] [PASSED] Unknown
[05:58:18] [PASSED] VGA
[05:58:18] [PASSED] DVI-I
[05:58:18] [PASSED] DVI-D
[05:58:18] [PASSED] DVI-A
[05:58:18] [PASSED] Composite
[05:58:18] [PASSED] SVIDEO
[05:58:18] [PASSED] LVDS
[05:58:18] [PASSED] Component
[05:58:18] [PASSED] DIN
[05:58:18] [PASSED] DP
[05:58:18] [PASSED] TV
[05:58:18] [PASSED] eDP
[05:58:18] [PASSED] Virtual
[05:58:18] [PASSED] DSI
[05:58:18] [PASSED] DPI
[05:58:18] [PASSED] Writeback
[05:58:18] [PASSED] SPI
[05:58:18] [PASSED] USB
[05:58:18] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[05:58:18] ============ [PASSED] drmm_connector_hdmi_init =============
[05:58:18] ============= drmm_connector_init (3 subtests) =============
[05:58:18] [PASSED] drm_test_drmm_connector_init
[05:58:18] [PASSED] drm_test_drmm_connector_init_null_ddc
[05:58:18] ========= drm_test_drmm_connector_init_type_valid  =========
[05:58:18] [PASSED] Unknown
[05:58:18] [PASSED] VGA
[05:58:18] [PASSED] DVI-I
[05:58:18] [PASSED] DVI-D
[05:58:18] [PASSED] DVI-A
[05:58:18] [PASSED] Composite
[05:58:18] [PASSED] SVIDEO
[05:58:18] [PASSED] LVDS
[05:58:18] [PASSED] Component
[05:58:18] [PASSED] DIN
[05:58:18] [PASSED] DP
[05:58:18] [PASSED] HDMI-A
[05:58:18] [PASSED] HDMI-B
[05:58:18] [PASSED] TV
[05:58:18] [PASSED] eDP
[05:58:18] [PASSED] Virtual
[05:58:18] [PASSED] DSI
[05:58:18] [PASSED] DPI
[05:58:18] [PASSED] Writeback
[05:58:18] [PASSED] SPI
[05:58:18] [PASSED] USB
[05:58:18] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[05:58:18] =============== [PASSED] drmm_connector_init ===============
[05:58:18] ========= drm_connector_dynamic_init (6 subtests) ==========
[05:58:18] [PASSED] drm_test_drm_connector_dynamic_init
[05:58:18] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[05:58:18] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[05:58:18] [PASSED] drm_test_drm_connector_dynamic_init_properties
[05:58:18] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[05:58:18] [PASSED] Unknown
[05:58:18] [PASSED] VGA
[05:58:18] [PASSED] DVI-I
[05:58:18] [PASSED] DVI-D
[05:58:18] [PASSED] DVI-A
[05:58:18] [PASSED] Composite
[05:58:18] [PASSED] SVIDEO
[05:58:18] [PASSED] LVDS
[05:58:18] [PASSED] Component
[05:58:18] [PASSED] DIN
[05:58:18] [PASSED] DP
[05:58:18] [PASSED] HDMI-A
[05:58:18] [PASSED] HDMI-B
[05:58:18] [PASSED] TV
[05:58:18] [PASSED] eDP
[05:58:18] [PASSED] Virtual
[05:58:18] [PASSED] DSI
[05:58:18] [PASSED] DPI
[05:58:18] [PASSED] Writeback
[05:58:18] [PASSED] SPI
[05:58:18] [PASSED] USB
[05:58:18] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[05:58:18] ======== drm_test_drm_connector_dynamic_init_name  =========
[05:58:18] [PASSED] Unknown
[05:58:18] [PASSED] VGA
[05:58:18] [PASSED] DVI-I
[05:58:18] [PASSED] DVI-D
[05:58:18] [PASSED] DVI-A
[05:58:18] [PASSED] Composite
[05:58:18] [PASSED] SVIDEO
[05:58:18] [PASSED] LVDS
[05:58:18] [PASSED] Component
[05:58:18] [PASSED] DIN
[05:58:18] [PASSED] DP
[05:58:18] [PASSED] HDMI-A
[05:58:18] [PASSED] HDMI-B
[05:58:18] [PASSED] TV
[05:58:18] [PASSED] eDP
[05:58:18] [PASSED] Virtual
[05:58:18] [PASSED] DSI
[05:58:18] [PASSED] DPI
[05:58:18] [PASSED] Writeback
[05:58:18] [PASSED] SPI
[05:58:18] [PASSED] USB
[05:58:18] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[05:58:18] =========== [PASSED] drm_connector_dynamic_init ============
[05:58:18] ==== drm_connector_dynamic_register_early (4 subtests) =====
[05:58:18] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[05:58:18] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[05:58:18] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[05:58:18] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[05:58:18] ====== [PASSED] drm_connector_dynamic_register_early =======
[05:58:18] ======= drm_connector_dynamic_register (7 subtests) ========
[05:58:18] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[05:58:18] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[05:58:18] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[05:58:18] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[05:58:18] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[05:58:18] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[05:58:18] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[05:58:18] ========= [PASSED] drm_connector_dynamic_register ==========
[05:58:18] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[05:58:18] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[05:58:18] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[05:58:18] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[05:58:18] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[05:58:18] ========== drm_test_get_tv_mode_from_name_valid  ===========
[05:58:18] [PASSED] NTSC
[05:58:18] [PASSED] NTSC-443
[05:58:18] [PASSED] NTSC-J
[05:58:18] [PASSED] PAL
[05:58:18] [PASSED] PAL-M
[05:58:18] [PASSED] PAL-N
[05:58:18] [PASSED] SECAM
[05:58:18] [PASSED] Mono
[05:58:18] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[05:58:18] [PASSED] drm_test_get_tv_mode_from_name_truncated
[05:58:18] ============ [PASSED] drm_get_tv_mode_from_name ============
[05:58:18] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[05:58:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[05:58:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[05:58:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[05:58:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[05:58:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[05:58:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[05:58:18] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[05:58:18] [PASSED] VIC 96
[05:58:18] [PASSED] VIC 97
[05:58:18] [PASSED] VIC 101
[05:58:18] [PASSED] VIC 102
[05:58:18] [PASSED] VIC 106
[05:58:18] [PASSED] VIC 107
[05:58:18] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[05:58:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[05:58:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[05:58:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[05:58:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[05:58:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[05:58:18] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[05:58:18] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[05:58:18] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[05:58:18] [PASSED] Automatic
[05:58:18] [PASSED] Full
[05:58:18] [PASSED] Limited 16:235
[05:58:18] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[05:58:18] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[05:58:18] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[05:58:18] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[05:58:18] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[05:58:18] [PASSED] RGB
[05:58:18] [PASSED] YUV 4:2:0
[05:58:18] [PASSED] YUV 4:2:2
[05:58:18] [PASSED] YUV 4:4:4
[05:58:18] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[05:58:18] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[05:58:18] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[05:58:18] ============= drm_damage_helper (21 subtests) ==============
[05:58:18] [PASSED] drm_test_damage_iter_no_damage
[05:58:18] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[05:58:18] [PASSED] drm_test_damage_iter_no_damage_src_moved
[05:58:18] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[05:58:18] [PASSED] drm_test_damage_iter_no_damage_not_visible
[05:58:18] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[05:58:18] [PASSED] drm_test_damage_iter_no_damage_no_fb
[05:58:18] [PASSED] drm_test_damage_iter_simple_damage
[05:58:18] [PASSED] drm_test_damage_iter_single_damage
[05:58:18] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[05:58:18] [PASSED] drm_test_damage_iter_single_damage_outside_src
[05:58:18] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[05:58:18] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[05:58:18] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[05:58:18] [PASSED] drm_test_damage_iter_single_damage_src_moved
[05:58:18] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[05:58:18] [PASSED] drm_test_damage_iter_damage
[05:58:18] [PASSED] drm_test_damage_iter_damage_one_intersect
[05:58:18] [PASSED] drm_test_damage_iter_damage_one_outside
[05:58:18] [PASSED] drm_test_damage_iter_damage_src_moved
[05:58:18] [PASSED] drm_test_damage_iter_damage_not_visible
[05:58:18] ================ [PASSED] drm_damage_helper ================
[05:58:18] ============== drm_dp_mst_helper (3 subtests) ==============
[05:58:18] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[05:58:18] [PASSED] Clock 154000 BPP 30 DSC disabled
[05:58:18] [PASSED] Clock 234000 BPP 30 DSC disabled
[05:58:18] [PASSED] Clock 297000 BPP 24 DSC disabled
[05:58:18] [PASSED] Clock 332880 BPP 24 DSC enabled
[05:58:18] [PASSED] Clock 324540 BPP 24 DSC enabled
[05:58:18] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[05:58:18] ============== drm_test_dp_mst_calc_pbn_div  ===============
[05:58:18] [PASSED] Link rate 2000000 lane count 4
[05:58:18] [PASSED] Link rate 2000000 lane count 2
[05:58:18] [PASSED] Link rate 2000000 lane count 1
[05:58:18] [PASSED] Link rate 1350000 lane count 4
[05:58:18] [PASSED] Link rate 1350000 lane count 2
[05:58:18] [PASSED] Link rate 1350000 lane count 1
[05:58:18] [PASSED] Link rate 1000000 lane count 4
[05:58:18] [PASSED] Link rate 1000000 lane count 2
[05:58:18] [PASSED] Link rate 1000000 lane count 1
[05:58:18] [PASSED] Link rate 810000 lane count 4
[05:58:18] [PASSED] Link rate 810000 lane count 2
[05:58:18] [PASSED] Link rate 810000 lane count 1
[05:58:18] [PASSED] Link rate 540000 lane count 4
[05:58:18] [PASSED] Link rate 540000 lane count 2
[05:58:18] [PASSED] Link rate 540000 lane count 1
[05:58:18] [PASSED] Link rate 270000 lane count 4
[05:58:18] [PASSED] Link rate 270000 lane count 2
[05:58:18] [PASSED] Link rate 270000 lane count 1
[05:58:18] [PASSED] Link rate 162000 lane count 4
[05:58:18] [PASSED] Link rate 162000 lane count 2
[05:58:18] [PASSED] Link rate 162000 lane count 1
[05:58:18] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[05:58:18] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[05:58:18] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[05:58:18] [PASSED] DP_POWER_UP_PHY with port number
[05:58:18] [PASSED] DP_POWER_DOWN_PHY with port number
[05:58:18] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[05:58:18] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[05:58:18] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[05:58:18] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[05:58:18] [PASSED] DP_QUERY_PAYLOAD with port number
[05:58:18] [PASSED] DP_QUERY_PAYLOAD with VCPI
[05:58:18] [PASSED] DP_REMOTE_DPCD_READ with port number
[05:58:18] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[05:58:18] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[05:58:18] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[05:58:18] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[05:58:18] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[05:58:18] [PASSED] DP_REMOTE_I2C_READ with port number
[05:58:18] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[05:58:18] [PASSED] DP_REMOTE_I2C_READ with transactions array
[05:58:18] [PASSED] DP_REMOTE_I2C_WRITE with port number
[05:58:18] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[05:58:18] [PASSED] DP_REMOTE_I2C_WRITE with data array
[05:58:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[05:58:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[05:58:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[05:58:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[05:58:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[05:58:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[05:58:18] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[05:58:18] ================ [PASSED] drm_dp_mst_helper ================
[05:58:18] ================== drm_exec (7 subtests) ===================
[05:58:18] [PASSED] sanitycheck
[05:58:18] [PASSED] test_lock
[05:58:18] [PASSED] test_lock_unlock
[05:58:18] [PASSED] test_duplicates
[05:58:18] [PASSED] test_prepare
[05:58:18] [PASSED] test_prepare_array
[05:58:18] [PASSED] test_multiple_loops
[05:58:18] ==================== [PASSED] drm_exec =====================
[05:58:18] =========== drm_format_helper_test (17 subtests) ===========
[05:58:18] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[05:58:18] [PASSED] single_pixel_source_buffer
[05:58:18] [PASSED] single_pixel_clip_rectangle
[05:58:18] [PASSED] well_known_colors
[05:58:18] [PASSED] destination_pitch
[05:58:18] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[05:58:18] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[05:58:18] [PASSED] single_pixel_source_buffer
[05:58:18] [PASSED] single_pixel_clip_rectangle
[05:58:18] [PASSED] well_known_colors
[05:58:18] [PASSED] destination_pitch
[05:58:18] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[05:58:18] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[05:58:18] [PASSED] single_pixel_source_buffer
[05:58:18] [PASSED] single_pixel_clip_rectangle
[05:58:18] [PASSED] well_known_colors
[05:58:18] [PASSED] destination_pitch
[05:58:18] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[05:58:18] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[05:58:18] [PASSED] single_pixel_source_buffer
[05:58:18] [PASSED] single_pixel_clip_rectangle
[05:58:18] [PASSED] well_known_colors
[05:58:18] [PASSED] destination_pitch
[05:58:18] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[05:58:18] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[05:58:18] [PASSED] single_pixel_source_buffer
[05:58:18] [PASSED] single_pixel_clip_rectangle
[05:58:18] [PASSED] well_known_colors
[05:58:18] [PASSED] destination_pitch
[05:58:18] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[05:58:18] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[05:58:18] [PASSED] single_pixel_source_buffer
[05:58:18] [PASSED] single_pixel_clip_rectangle
[05:58:18] [PASSED] well_known_colors
[05:58:18] [PASSED] destination_pitch
[05:58:18] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[05:58:18] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[05:58:18] [PASSED] single_pixel_source_buffer
[05:58:18] [PASSED] single_pixel_clip_rectangle
[05:58:18] [PASSED] well_known_colors
[05:58:18] [PASSED] destination_pitch
[05:58:18] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[05:58:18] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[05:58:18] [PASSED] single_pixel_source_buffer
[05:58:18] [PASSED] single_pixel_clip_rectangle
[05:58:18] [PASSED] well_known_colors
[05:58:18] [PASSED] destination_pitch
[05:58:18] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[05:58:18] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[05:58:18] [PASSED] single_pixel_source_buffer
[05:58:18] [PASSED] single_pixel_clip_rectangle
[05:58:18] [PASSED] well_known_colors
[05:58:18] [PASSED] destination_pitch
[05:58:18] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[05:58:18] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[05:58:18] [PASSED] single_pixel_source_buffer
[05:58:18] [PASSED] single_pixel_clip_rectangle
[05:58:18] [PASSED] well_known_colors
[05:58:18] [PASSED] destination_pitch
[05:58:18] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[05:58:18] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[05:58:18] [PASSED] single_pixel_source_buffer
[05:58:18] [PASSED] single_pixel_clip_rectangle
[05:58:18] [PASSED] well_known_colors
[05:58:18] [PASSED] destination_pitch
[05:58:18] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[05:58:18] ============== drm_test_fb_xrgb8888_to_mono  ===============
[05:58:18] [PASSED] single_pixel_source_buffer
[05:58:18] [PASSED] single_pixel_clip_rectangle
[05:58:18] [PASSED] well_known_colors
[05:58:18] [PASSED] destination_pitch
[05:58:18] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[05:58:18] ==================== drm_test_fb_swab  =====================
[05:58:18] [PASSED] single_pixel_source_buffer
[05:58:18] [PASSED] single_pixel_clip_rectangle
[05:58:18] [PASSED] well_known_colors
[05:58:18] [PASSED] destination_pitch
[05:58:18] ================ [PASSED] drm_test_fb_swab =================
[05:58:18] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[05:58:18] [PASSED] single_pixel_source_buffer
[05:58:18] [PASSED] single_pixel_clip_rectangle
[05:58:18] [PASSED] well_known_colors
[05:58:18] [PASSED] destination_pitch
[05:58:18] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[05:58:18] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[05:58:18] [PASSED] single_pixel_source_buffer
[05:58:18] [PASSED] single_pixel_clip_rectangle
[05:58:18] [PASSED] well_known_colors
[05:58:18] [PASSED] destination_pitch
[05:58:18] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[05:58:18] ================= drm_test_fb_clip_offset  =================
[05:58:18] [PASSED] pass through
[05:58:18] [PASSED] horizontal offset
[05:58:18] [PASSED] vertical offset
[05:58:18] [PASSED] horizontal and vertical offset
[05:58:18] [PASSED] horizontal offset (custom pitch)
[05:58:18] [PASSED] vertical offset (custom pitch)
[05:58:18] [PASSED] horizontal and vertical offset (custom pitch)
[05:58:18] ============= [PASSED] drm_test_fb_clip_offset =============
[05:58:18] =================== drm_test_fb_memcpy  ====================
[05:58:18] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[05:58:18] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[05:58:18] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[05:58:18] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[05:58:18] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[05:58:18] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[05:58:18] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[05:58:18] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[05:58:18] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[05:58:18] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[05:58:18] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[05:58:18] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[05:58:18] =============== [PASSED] drm_test_fb_memcpy ================
[05:58:18] ============= [PASSED] drm_format_helper_test ==============
[05:58:18] ================= drm_format (18 subtests) =================
[05:58:18] [PASSED] drm_test_format_block_width_invalid
[05:58:18] [PASSED] drm_test_format_block_width_one_plane
[05:58:18] [PASSED] drm_test_format_block_width_two_plane
[05:58:18] [PASSED] drm_test_format_block_width_three_plane
[05:58:18] [PASSED] drm_test_format_block_width_tiled
[05:58:18] [PASSED] drm_test_format_block_height_invalid
[05:58:18] [PASSED] drm_test_format_block_height_one_plane
[05:58:18] [PASSED] drm_test_format_block_height_two_plane
[05:58:18] [PASSED] drm_test_format_block_height_three_plane
[05:58:18] [PASSED] drm_test_format_block_height_tiled
[05:58:18] [PASSED] drm_test_format_min_pitch_invalid
[05:58:18] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[05:58:18] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[05:58:18] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[05:58:18] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[05:58:18] [PASSED] drm_test_format_min_pitch_two_plane
[05:58:18] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[05:58:18] [PASSED] drm_test_format_min_pitch_tiled
[05:58:18] =================== [PASSED] drm_format ====================
[05:58:18] ============== drm_framebuffer (10 subtests) ===============
[05:58:18] ========== drm_test_framebuffer_check_src_coords  ==========
[05:58:18] [PASSED] Success: source fits into fb
[05:58:18] [PASSED] Fail: overflowing fb with x-axis coordinate
[05:58:18] [PASSED] Fail: overflowing fb with y-axis coordinate
[05:58:18] [PASSED] Fail: overflowing fb with source width
[05:58:18] [PASSED] Fail: overflowing fb with source height
[05:58:18] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[05:58:18] [PASSED] drm_test_framebuffer_cleanup
[05:58:18] =============== drm_test_framebuffer_create  ===============
[05:58:18] [PASSED] ABGR8888 normal sizes
[05:58:18] [PASSED] ABGR8888 max sizes
[05:58:18] [PASSED] ABGR8888 pitch greater than min required
[05:58:18] [PASSED] ABGR8888 pitch less than min required
[05:58:18] [PASSED] ABGR8888 Invalid width
[05:58:18] [PASSED] ABGR8888 Invalid buffer handle
[05:58:18] [PASSED] No pixel format
[05:58:18] [PASSED] ABGR8888 Width 0
[05:58:18] [PASSED] ABGR8888 Height 0
[05:58:18] [PASSED] ABGR8888 Out of bound height * pitch combination
[05:58:18] [PASSED] ABGR8888 Large buffer offset
[05:58:18] [PASSED] ABGR8888 Buffer offset for inexistent plane
[05:58:18] [PASSED] ABGR8888 Invalid flag
[05:58:18] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[05:58:18] [PASSED] ABGR8888 Valid buffer modifier
[05:58:18] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[05:58:18] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[05:58:18] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[05:58:18] [PASSED] NV12 Normal sizes
[05:58:18] [PASSED] NV12 Max sizes
[05:58:18] [PASSED] NV12 Invalid pitch
[05:58:18] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[05:58:18] [PASSED] NV12 different  modifier per-plane
[05:58:18] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[05:58:18] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[05:58:18] [PASSED] NV12 Modifier for inexistent plane
[05:58:18] [PASSED] NV12 Handle for inexistent plane
[05:58:18] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[05:58:18] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[05:58:18] [PASSED] YVU420 Normal sizes
[05:58:18] [PASSED] YVU420 Max sizes
[05:58:18] [PASSED] YVU420 Invalid pitch
[05:58:18] [PASSED] YVU420 Different pitches
[05:58:18] [PASSED] YVU420 Different buffer offsets/pitches
[05:58:18] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[05:58:18] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[05:58:18] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[05:58:18] [PASSED] YVU420 Valid modifier
[05:58:18] [PASSED] YVU420 Different modifiers per plane
[05:58:18] [PASSED] YVU420 Modifier for inexistent plane
[05:58:18] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[05:58:18] [PASSED] X0L2 Normal sizes
[05:58:18] [PASSED] X0L2 Max sizes
[05:58:18] [PASSED] X0L2 Invalid pitch
[05:58:18] [PASSED] X0L2 Pitch greater than minimum required
[05:58:18] [PASSED] X0L2 Handle for inexistent plane
[05:58:18] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[05:58:18] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[05:58:18] [PASSED] X0L2 Valid modifier
[05:58:18] [PASSED] X0L2 Modifier for inexistent plane
[05:58:18] =========== [PASSED] drm_test_framebuffer_create ===========
[05:58:18] [PASSED] drm_test_framebuffer_free
[05:58:18] [PASSED] drm_test_framebuffer_init
[05:58:18] [PASSED] drm_test_framebuffer_init_bad_format
[05:58:18] [PASSED] drm_test_framebuffer_init_dev_mismatch
[05:58:18] [PASSED] drm_test_framebuffer_lookup
[05:58:18] [PASSED] drm_test_framebuffer_lookup_inexistent
[05:58:18] [PASSED] drm_test_framebuffer_modifiers_not_supported
[05:58:18] ================= [PASSED] drm_framebuffer =================
[05:58:18] ================ drm_gem_shmem (8 subtests) ================
[05:58:18] [PASSED] drm_gem_shmem_test_obj_create
[05:58:18] [PASSED] drm_gem_shmem_test_obj_create_private
[05:58:18] [PASSED] drm_gem_shmem_test_pin_pages
[05:58:18] [PASSED] drm_gem_shmem_test_vmap
[05:58:18] [PASSED] drm_gem_shmem_test_get_sg_table
[05:58:18] [PASSED] drm_gem_shmem_test_get_pages_sgt
[05:58:18] [PASSED] drm_gem_shmem_test_madvise
[05:58:18] [PASSED] drm_gem_shmem_test_purge
[05:58:18] ================== [PASSED] drm_gem_shmem ==================
[05:58:18] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[05:58:18] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[05:58:18] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[05:58:18] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[05:58:18] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[05:58:18] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[05:58:18] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[05:58:18] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[05:58:18] [PASSED] Automatic
[05:58:18] [PASSED] Full
[05:58:18] [PASSED] Limited 16:235
[05:58:18] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[05:58:18] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[05:58:18] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[05:58:18] [PASSED] drm_test_check_disable_connector
[05:58:18] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[05:58:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[05:58:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[05:58:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[05:58:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[05:58:18] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[05:58:18] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[05:58:18] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[05:58:18] [PASSED] drm_test_check_output_bpc_dvi
[05:58:18] [PASSED] drm_test_check_output_bpc_format_vic_1
[05:58:18] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[05:58:18] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[05:58:18] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[05:58:18] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[05:58:18] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[05:58:18] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[05:58:18] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[05:58:18] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[05:58:18] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[05:58:18] [PASSED] drm_test_check_broadcast_rgb_value
[05:58:18] [PASSED] drm_test_check_bpc_8_value
[05:58:18] [PASSED] drm_test_check_bpc_10_value
[05:58:18] [PASSED] drm_test_check_bpc_12_value
[05:58:18] [PASSED] drm_test_check_format_value
[05:58:18] [PASSED] drm_test_check_tmds_char_value
[05:58:18] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[05:58:18] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[05:58:18] [PASSED] drm_test_check_mode_valid
[05:58:18] [PASSED] drm_test_check_mode_valid_reject
[05:58:18] [PASSED] drm_test_check_mode_valid_reject_rate
[05:58:18] [PASSED] drm_test_check_mode_valid_reject_max_clock
[05:58:18] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[05:58:18] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[05:58:18] [PASSED] drm_test_check_infoframes
[05:58:18] [PASSED] drm_test_check_reject_avi_infoframe
[05:58:18] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[05:58:18] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[05:58:18] [PASSED] drm_test_check_reject_audio_infoframe
[05:58:18] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[05:58:18] ================= drm_managed (2 subtests) =================
[05:58:18] [PASSED] drm_test_managed_release_action
[05:58:18] [PASSED] drm_test_managed_run_action
[05:58:18] =================== [PASSED] drm_managed ===================
[05:58:18] =================== drm_mm (6 subtests) ====================
[05:58:18] [PASSED] drm_test_mm_init
[05:58:18] [PASSED] drm_test_mm_debug
[05:58:18] [PASSED] drm_test_mm_align32
[05:58:18] [PASSED] drm_test_mm_align64
[05:58:18] [PASSED] drm_test_mm_lowest
[05:58:18] [PASSED] drm_test_mm_highest
[05:58:18] ===================== [PASSED] drm_mm ======================
[05:58:18] ============= drm_modes_analog_tv (5 subtests) =============
[05:58:18] [PASSED] drm_test_modes_analog_tv_mono_576i
[05:58:18] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[05:58:18] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[05:58:18] [PASSED] drm_test_modes_analog_tv_pal_576i
[05:58:18] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[05:58:18] =============== [PASSED] drm_modes_analog_tv ===============
[05:58:18] ============== drm_plane_helper (2 subtests) ===============
[05:58:18] =============== drm_test_check_plane_state  ================
[05:58:18] [PASSED] clipping_simple
[05:58:18] [PASSED] clipping_rotate_reflect
[05:58:18] [PASSED] positioning_simple
[05:58:18] [PASSED] upscaling
[05:58:18] [PASSED] downscaling
[05:58:18] [PASSED] rounding1
[05:58:18] [PASSED] rounding2
[05:58:18] [PASSED] rounding3
[05:58:18] [PASSED] rounding4
[05:58:18] =========== [PASSED] drm_test_check_plane_state ============
[05:58:18] =========== drm_test_check_invalid_plane_state  ============
[05:58:18] [PASSED] positioning_invalid
[05:58:18] [PASSED] upscaling_invalid
[05:58:18] [PASSED] downscaling_invalid
[05:58:18] ======= [PASSED] drm_test_check_invalid_plane_state ========
[05:58:18] ================ [PASSED] drm_plane_helper =================
[05:58:18] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[05:58:18] ====== drm_test_connector_helper_tv_get_modes_check  =======
[05:58:18] [PASSED] None
[05:58:18] [PASSED] PAL
[05:58:18] [PASSED] NTSC
[05:58:18] [PASSED] Both, NTSC Default
[05:58:18] [PASSED] Both, PAL Default
[05:58:18] [PASSED] Both, NTSC Default, with PAL on command-line
[05:58:18] [PASSED] Both, PAL Default, with NTSC on command-line
[05:58:18] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[05:58:18] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[05:58:18] ================== drm_rect (9 subtests) ===================
[05:58:18] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[05:58:18] [PASSED] drm_test_rect_clip_scaled_not_clipped
[05:58:18] [PASSED] drm_test_rect_clip_scaled_clipped
[05:58:18] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[05:58:18] ================= drm_test_rect_intersect  =================
[05:58:18] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[05:58:18] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[05:58:18] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[05:58:18] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[05:58:18] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[05:58:18] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[05:58:18] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[05:58:18] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[05:58:18] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[05:58:18] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[05:58:18] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[05:58:18] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[05:58:18] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[05:58:18] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[05:58:18] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[05:58:18] ============= [PASSED] drm_test_rect_intersect =============
[05:58:18] ================ drm_test_rect_calc_hscale  ================
[05:58:18] [PASSED] normal use
[05:58:18] [PASSED] out of max range
[05:58:18] [PASSED] out of min range
[05:58:18] [PASSED] zero dst
[05:58:18] [PASSED] negative src
[05:58:18] [PASSED] negative dst
[05:58:18] ============ [PASSED] drm_test_rect_calc_hscale ============
[05:58:18] ================ drm_test_rect_calc_vscale  ================
[05:58:18] [PASSED] normal use
[05:58:18] [PASSED] out of max range
[05:58:18] [PASSED] out of min range
[05:58:18] [PASSED] zero dst
[05:58:18] [PASSED] negative src
[05:58:18] [PASSED] negative dst
[05:58:18] ============ [PASSED] drm_test_rect_calc_vscale ============
[05:58:18] ================== drm_test_rect_rotate  ===================
[05:58:18] [PASSED] reflect-x
[05:58:18] [PASSED] reflect-y
[05:58:18] [PASSED] rotate-0
[05:58:18] [PASSED] rotate-90
[05:58:18] [PASSED] rotate-180
[05:58:18] [PASSED] rotate-270
[05:58:18] ============== [PASSED] drm_test_rect_rotate ===============
[05:58:18] ================ drm_test_rect_rotate_inv  =================
[05:58:18] [PASSED] reflect-x
[05:58:18] [PASSED] reflect-y
[05:58:18] [PASSED] rotate-0
[05:58:18] [PASSED] rotate-90
[05:58:18] [PASSED] rotate-180
[05:58:18] [PASSED] rotate-270
[05:58:18] ============ [PASSED] drm_test_rect_rotate_inv =============
[05:58:18] ==================== [PASSED] drm_rect =====================
[05:58:18] ============ drm_sysfb_modeset_test (1 subtest) ============
[05:58:18] ============ drm_test_sysfb_build_fourcc_list  =============
[05:58:18] [PASSED] no native formats
[05:58:18] [PASSED] XRGB8888 as native format
[05:58:18] [PASSED] remove duplicates
[05:58:18] [PASSED] convert alpha formats
[05:58:18] [PASSED] random formats
[05:58:18] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[05:58:18] ============= [PASSED] drm_sysfb_modeset_test ==============
[05:58:18] ================== drm_fixp (2 subtests) ===================
[05:58:18] [PASSED] drm_test_int2fixp
[05:58:18] [PASSED] drm_test_sm2fixp
[05:58:18] ==================== [PASSED] drm_fixp =====================
[05:58:18] ============================================================
[05:58:18] Testing complete. Ran 621 tests: passed: 621
[05:58:18] Elapsed time: 26.175s total, 1.763s configuring, 24.243s building, 0.128s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[05:58:18] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:58:20] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:58:30] Starting KUnit Kernel (1/1)...
[05:58:30] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:58:30] ================= ttm_device (5 subtests) ==================
[05:58:30] [PASSED] ttm_device_init_basic
[05:58:30] [PASSED] ttm_device_init_multiple
[05:58:30] [PASSED] ttm_device_fini_basic
[05:58:30] [PASSED] ttm_device_init_no_vma_man
[05:58:30] ================== ttm_device_init_pools  ==================
[05:58:30] [PASSED] No DMA allocations, no DMA32 required
[05:58:30] [PASSED] DMA allocations, DMA32 required
[05:58:30] [PASSED] No DMA allocations, DMA32 required
[05:58:30] [PASSED] DMA allocations, no DMA32 required
[05:58:30] ============== [PASSED] ttm_device_init_pools ==============
[05:58:30] =================== [PASSED] ttm_device ====================
[05:58:30] ================== ttm_pool (8 subtests) ===================
[05:58:30] ================== ttm_pool_alloc_basic  ===================
[05:58:30] [PASSED] One page
[05:58:30] [PASSED] More than one page
[05:58:30] [PASSED] Above the allocation limit
[05:58:30] [PASSED] One page, with coherent DMA mappings enabled
[05:58:30] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[05:58:30] ============== [PASSED] ttm_pool_alloc_basic ===============
[05:58:30] ============== ttm_pool_alloc_basic_dma_addr  ==============
[05:58:30] [PASSED] One page
[05:58:30] [PASSED] More than one page
[05:58:30] [PASSED] Above the allocation limit
[05:58:30] [PASSED] One page, with coherent DMA mappings enabled
[05:58:30] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[05:58:30] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[05:58:30] [PASSED] ttm_pool_alloc_order_caching_match
[05:58:30] [PASSED] ttm_pool_alloc_caching_mismatch
[05:58:30] [PASSED] ttm_pool_alloc_order_mismatch
[05:58:30] [PASSED] ttm_pool_free_dma_alloc
[05:58:30] [PASSED] ttm_pool_free_no_dma_alloc
[05:58:30] [PASSED] ttm_pool_fini_basic
[05:58:30] ==================== [PASSED] ttm_pool =====================
[05:58:30] ================ ttm_resource (8 subtests) =================
[05:58:30] ================= ttm_resource_init_basic  =================
[05:58:30] [PASSED] Init resource in TTM_PL_SYSTEM
[05:58:30] [PASSED] Init resource in TTM_PL_VRAM
[05:58:30] [PASSED] Init resource in a private placement
[05:58:30] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[05:58:30] ============= [PASSED] ttm_resource_init_basic =============
[05:58:30] [PASSED] ttm_resource_init_pinned
[05:58:30] [PASSED] ttm_resource_fini_basic
[05:58:30] [PASSED] ttm_resource_manager_init_basic
[05:58:30] [PASSED] ttm_resource_manager_usage_basic
[05:58:30] [PASSED] ttm_resource_manager_set_used_basic
[05:58:30] [PASSED] ttm_sys_man_alloc_basic
[05:58:30] [PASSED] ttm_sys_man_free_basic
[05:58:30] ================== [PASSED] ttm_resource ===================
[05:58:30] =================== ttm_tt (15 subtests) ===================
[05:58:30] ==================== ttm_tt_init_basic  ====================
[05:58:30] [PASSED] Page-aligned size
[05:58:30] [PASSED] Extra pages requested
[05:58:30] ================ [PASSED] ttm_tt_init_basic ================
[05:58:30] [PASSED] ttm_tt_init_misaligned
[05:58:30] [PASSED] ttm_tt_fini_basic
[05:58:30] [PASSED] ttm_tt_fini_sg
[05:58:30] [PASSED] ttm_tt_fini_shmem
[05:58:30] [PASSED] ttm_tt_create_basic
[05:58:30] [PASSED] ttm_tt_create_invalid_bo_type
[05:58:30] [PASSED] ttm_tt_create_ttm_exists
[05:58:30] [PASSED] ttm_tt_create_failed
[05:58:30] [PASSED] ttm_tt_destroy_basic
[05:58:30] [PASSED] ttm_tt_populate_null_ttm
[05:58:30] [PASSED] ttm_tt_populate_populated_ttm
[05:58:30] [PASSED] ttm_tt_unpopulate_basic
[05:58:30] [PASSED] ttm_tt_unpopulate_empty_ttm
[05:58:30] [PASSED] ttm_tt_swapin_basic
[05:58:30] ===================== [PASSED] ttm_tt ======================
[05:58:30] =================== ttm_bo (14 subtests) ===================
[05:58:30] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[05:58:30] [PASSED] Cannot be interrupted and sleeps
[05:58:30] [PASSED] Cannot be interrupted, locks straight away
[05:58:30] [PASSED] Can be interrupted, sleeps
[05:58:30] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[05:58:30] [PASSED] ttm_bo_reserve_locked_no_sleep
[05:58:30] [PASSED] ttm_bo_reserve_no_wait_ticket
[05:58:30] [PASSED] ttm_bo_reserve_double_resv
[05:58:30] [PASSED] ttm_bo_reserve_interrupted
[05:58:30] [PASSED] ttm_bo_reserve_deadlock
[05:58:30] [PASSED] ttm_bo_unreserve_basic
[05:58:30] [PASSED] ttm_bo_unreserve_pinned
[05:58:30] [PASSED] ttm_bo_unreserve_bulk
[05:58:30] [PASSED] ttm_bo_fini_basic
[05:58:30] [PASSED] ttm_bo_fini_shared_resv
[05:58:30] [PASSED] ttm_bo_pin_basic
[05:58:30] [PASSED] ttm_bo_pin_unpin_resource
[05:58:30] [PASSED] ttm_bo_multiple_pin_one_unpin
[05:58:30] ===================== [PASSED] ttm_bo ======================
[05:58:30] ============== ttm_bo_validate (22 subtests) ===============
[05:58:30] ============== ttm_bo_init_reserved_sys_man  ===============
[05:58:30] [PASSED] Buffer object for userspace
[05:58:30] [PASSED] Kernel buffer object
[05:58:30] [PASSED] Shared buffer object
[05:58:30] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[05:58:30] ============== ttm_bo_init_reserved_mock_man  ==============
[05:58:30] [PASSED] Buffer object for userspace
[05:58:30] [PASSED] Kernel buffer object
[05:58:30] [PASSED] Shared buffer object
[05:58:30] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[05:58:30] [PASSED] ttm_bo_init_reserved_resv
[05:58:30] ================== ttm_bo_validate_basic  ==================
[05:58:30] [PASSED] Buffer object for userspace
[05:58:30] [PASSED] Kernel buffer object
[05:58:30] [PASSED] Shared buffer object
[05:58:30] ============== [PASSED] ttm_bo_validate_basic ==============
[05:58:30] [PASSED] ttm_bo_validate_invalid_placement
[05:58:30] ============= ttm_bo_validate_same_placement  ==============
[05:58:30] [PASSED] System manager
[05:58:30] [PASSED] VRAM manager
[05:58:30] ========= [PASSED] ttm_bo_validate_same_placement ==========
[05:58:30] [PASSED] ttm_bo_validate_failed_alloc
[05:58:30] [PASSED] ttm_bo_validate_pinned
[05:58:30] [PASSED] ttm_bo_validate_busy_placement
[05:58:30] ================ ttm_bo_validate_multihop  =================
[05:58:30] [PASSED] Buffer object for userspace
[05:58:30] [PASSED] Kernel buffer object
[05:58:30] [PASSED] Shared buffer object
[05:58:30] ============ [PASSED] ttm_bo_validate_multihop =============
[05:58:30] ========== ttm_bo_validate_no_placement_signaled  ==========
[05:58:30] [PASSED] Buffer object in system domain, no page vector
[05:58:30] [PASSED] Buffer object in system domain with an existing page vector
[05:58:30] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[05:58:30] ======== ttm_bo_validate_no_placement_not_signaled  ========
[05:58:30] [PASSED] Buffer object for userspace
[05:58:30] [PASSED] Kernel buffer object
[05:58:30] [PASSED] Shared buffer object
[05:58:30] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[05:58:30] [PASSED] ttm_bo_validate_move_fence_signaled
[05:58:30] ========= ttm_bo_validate_move_fence_not_signaled  =========
[05:58:30] [PASSED] Waits for GPU
[05:58:30] [PASSED] Tries to lock straight away
[05:58:30] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[05:58:30] [PASSED] ttm_bo_validate_swapout
[05:58:30] [PASSED] ttm_bo_validate_happy_evict
[05:58:30] [PASSED] ttm_bo_validate_all_pinned_evict
[05:58:30] [PASSED] ttm_bo_validate_allowed_only_evict
[05:58:30] [PASSED] ttm_bo_validate_deleted_evict
[05:58:30] [PASSED] ttm_bo_validate_busy_domain_evict
[05:58:30] [PASSED] ttm_bo_validate_evict_gutting
[05:58:30] [PASSED] ttm_bo_validate_recrusive_evict
[05:58:30] ================= [PASSED] ttm_bo_validate =================
[05:58:30] ============================================================
[05:58:30] Testing complete. Ran 102 tests: passed: 102
[05:58:30] Elapsed time: 11.809s total, 1.792s configuring, 9.802s building, 0.184s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Introduce Xe Correctable Error Handling (rev7)

[Patchwork]

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== Series Details ==

Series: Introduce Xe Correctable Error Handling (rev7)
URL   : https://patchwork.freedesktop.org/series/160184/
State : success

== Summary ==

CI Bug Log - changes from xe-4944-aea2c496abcf55b647c14fe720bfc4ea555aac6a_BAT -> xe-pw-160184v7_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-4944-aea2c496abcf55b647c14fe720bfc4ea555aac6a -> xe-pw-160184v7

  IGT_8874: 4568b2c141ab630c34f8eb2b9afab8cbf8f3ce9e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4944-aea2c496abcf55b647c14fe720bfc4ea555aac6a: aea2c496abcf55b647c14fe720bfc4ea555aac6a
  xe-pw-160184v7: 160184v7

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160184v7/index.html

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✗ Xe.CI.FULL: failure for Introduce Xe Correctable Error Handling (rev7)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 377 bytes --]

== Series Details ==

Series: Introduce Xe Correctable Error Handling (rev7)
URL   : https://patchwork.freedesktop.org/series/160184/
State : failure

== Summary ==

ERROR: The runconfig 'xe-4944-aea2c496abcf55b647c14fe720bfc4ea555aac6a_FULL' does not exist in the database

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160184v7/index.html

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