[PATCH v3 00/31] Vswing/Preemphasis Override

[PATCH v3 00/31] Vswing/Preemphasis Override

[Michał Grzelak]

Next version of [1]. IGT series for decoding is available at [2].

BR,
Michał

[1] https://lore.kernel.org/intel-gfx/20260415234639.3577774-1-michal.grzelak@intel.com/
[2] https://lore.kernel.org/igt-dev/20260507012821.527453-1-michal.grzelak@intel.com/

---
v2->v3
- remove braces from if blocks (Suraj)
- return -EINVAL instead of -1 (Suraj)
- break logging into two lines
- remove null pointer check before kfree()
- switch from kzalloc() into kzalloc_obj() and kzalloc_objs()
- resolve conflict from rebase

Michał Grzelak (31):
  drm/i915/buf_trans: align xe3plpd with VS/PE-O layout
  drm/i915/bios: search for VBT #57 by default
  drm/i915/bios: log unsupported VS/PE-O parsing
  drm/i915/bios: store VBT #57's metadata in intel_vbt_data
  drm/i915/bios: de/allocate VS/PE-O buffers' matrix
  drm/i915/bios: structurize VS/PE-O metadata
  drm/i915/bios: add buf_trans for each bios_encoder
  drm/i915/bios: de/allocate buf_trans for each port
  drm/i915/bios: check VS/PE-O in helper func
  drm/i915/bios: print VS/PE-O port info
  drm/i915/bios: remove VS/PE-O warning
  drm/i915/ddi: expose VS/PE-O buffers to intel_encoder
  drm/i915/buf_trans: override VS/PE-O when requested
  drm/i915/buf_trans: abstract VS/PE-O index computation
  drm/i915/bios: parse LT's VS/PE-O tables
  drm/i915/bios: shrink all LT's VS/PE tables
  drm/i915/buf_trans: compute LT's VS/PE-O index
  drm/i915/buf_trans: enumerate LT's VS/PE-O indices
  drm/i915/bios: parse Snps's VS/PE-O tables
  drm/i915/bios: shrink all Snps's VS/PE tables
  drm/i915/buf_trans: compute C20's VS/PE-O index
  drm/i915/buf_trans: enumerate C20's VS/PE-O indices
  drm/i915/buf_trans: compute C10's VS/PE-O index
  drm/i915/buf_trans: enumerate C10's VS/PE-O indices
  drm/i915/bios: parse EHL's VS/PE-O tables
  drm/i915/bios: shrink all ICL's VS/PE tables
  drm/i915/buf_trans: compute EHL's VS/PE-O index
  drm/i915/buf_trans: enumerate EHL's VS/PE-O indices
  drm/i915/bios: parse JSL's VS/PE-O tables
  drm/i915/buf_trans: compute JSL's VS/PE-O index
  drm/i915/buf_trans: enumerate JSL's VS/PE-O indices

 drivers/gpu/drm/i915/display/intel_bios.c     | 193 ++++++++++++++-
 drivers/gpu/drm/i915/display/intel_bios.h     |   3 +
 drivers/gpu/drm/i915/display/intel_ddi.c      |   1 +
 .../drm/i915/display/intel_ddi_buf_trans.c    | 228 +++++++++++++++---
 .../drm/i915/display/intel_ddi_buf_trans.h    |  55 ++++-
 .../gpu/drm/i915/display/intel_display_core.h |   6 +
 .../drm/i915/display/intel_display_types.h    |   1 +
 7 files changed, 438 insertions(+), 49 deletions(-)

-- 
2.45.2

[PATCH v3 01/31] drm/i915/buf_trans: align xe3plpd with VS/PE-O layout

[Michał Grzelak]

Align struct xe3plpd_lt_phy_buf_trans to match layout found in
Vswing / Preemphasis Override tables.

Move txswing & txswing_level to the end of the struct. Keep order
between txswing & txswing_level columns in xe3plpd_lt_* tables.

Move post_cursor from third field to second.

v2->v3
- fix rebase's conflict

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 .../drm/i915/display/intel_ddi_buf_trans.c    | 72 +++++++++----------
 .../drm/i915/display/intel_ddi_buf_trans.h    |  6 +-
 2 files changed, 39 insertions(+), 39 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 4cd1e4d76c7af..908577b04a14e 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1118,50 +1118,50 @@ static const struct intel_ddi_buf_trans mtl_c20_trans_uhbr = {
 
 /* DP1.4 */
 static const union intel_ddi_buf_trans_entry _xe3plpd_lt_trans_dp14[] = {
-	{ .lt = { 1, 0, 0, 21, 0  } },
-	{ .lt = { 1, 1, 0, 24, 3  } },
-	{ .lt = { 1, 2, 0, 28, 7  } },
-	{ .lt = { 0, 3, 0, 35, 13 } },
-	{ .lt = { 1, 1, 0, 27, 0  } },
-	{ .lt = { 1, 2, 0, 31, 5  } },
-	{ .lt = { 0, 3, 0, 37, 11 } },
-	{ .lt = { 1, 2, 0, 35, 0  } },
-	{ .lt = { 0, 3, 0, 41, 7  } },
-	{ .lt = { 0, 3, 0, 48, 0  } },
+	{ .lt = { 21, 0,  0, 1, 0 } },
+	{ .lt = { 24, 0,  3, 1, 1 } },
+	{ .lt = { 28, 0,  7, 1, 2 } },
+	{ .lt = { 35, 0, 13, 0, 3 } },
+	{ .lt = { 27, 0,  0, 1, 1 } },
+	{ .lt = { 31, 0,  5, 1, 2 } },
+	{ .lt = { 37, 0, 11, 0, 3 } },
+	{ .lt = { 35, 0,  0, 1, 2 } },
+	{ .lt = { 41, 0,  7, 0, 3 } },
+	{ .lt = { 48, 0,  0, 0, 3 } },
 };
 
 /* DP2.1 */
 static const union intel_ddi_buf_trans_entry _xe3plpd_lt_trans_uhbr[] = {
-	{ .lt = { 0, 0, 0, 48, 0  } },
-	{ .lt = { 0, 0, 0, 43, 5  } },
-	{ .lt = { 0, 0, 0, 40, 8  } },
-	{ .lt = { 0, 0, 0, 37, 11 } },
-	{ .lt = { 0, 0, 0, 33, 15 } },
-	{ .lt = { 0, 0, 2, 46, 0  } },
-	{ .lt = { 0, 0, 2, 42, 4  } },
-	{ .lt = { 0, 0, 2, 38, 8  } },
-	{ .lt = { 0, 0, 2, 35, 11 } },
-	{ .lt = { 0, 0, 2, 33, 13 } },
-	{ .lt = { 0, 0, 4, 44, 0  } },
-	{ .lt = { 0, 0, 4, 40, 4  } },
-	{ .lt = { 0, 0, 4, 37, 7  } },
-	{ .lt = { 0, 0, 4, 33, 11 } },
-	{ .lt = { 0, 0, 8, 40, 0  } },
-	{ .lt = { 1, 0, 2, 26, 2  } },
+	{ .lt = { 48, 0,  0, 0, 0 } },
+	{ .lt = { 43, 0,  5, 0, 0 } },
+	{ .lt = { 40, 0,  8, 0, 0 } },
+	{ .lt = { 37, 0, 11, 0, 0 } },
+	{ .lt = { 33, 0, 15, 0, 0 } },
+	{ .lt = { 46, 2,  0, 0, 0 } },
+	{ .lt = { 42, 2,  4, 0, 0 } },
+	{ .lt = { 38, 2,  8, 0, 0 } },
+	{ .lt = { 35, 2, 11, 0, 0 } },
+	{ .lt = { 33, 2, 13, 0, 0 } },
+	{ .lt = { 44, 4,  0, 0, 0 } },
+	{ .lt = { 40, 4,  4, 0, 0 } },
+	{ .lt = { 37, 4,  7, 0, 0 } },
+	{ .lt = { 33, 4, 11, 0, 0 } },
+	{ .lt = { 40, 8,  0, 0, 0 } },
+	{ .lt = { 26, 2,  2, 1, 0 } },
 };
 
 /* eDp */
 static const union intel_ddi_buf_trans_entry _xe3plpd_lt_trans_edp[] = {
-	{ .lt = { 1, 0, 0, 12, 0 } },
-	{ .lt = { 1, 1, 0, 13, 1 } },
-	{ .lt = { 1, 2, 0, 15, 3 } },
-	{ .lt = { 1, 3, 0, 19, 7 } },
-	{ .lt = { 1, 1, 0, 14, 0 } },
-	{ .lt = { 1, 2, 0, 16, 2 } },
-	{ .lt = { 1, 3, 0, 21, 5 } },
-	{ .lt = { 1, 2, 0, 18, 0 } },
-	{ .lt = { 1, 3, 0, 22, 4 } },
-	{ .lt = { 1, 3, 0, 26, 0 } },
+	{ .lt = { 12, 0, 0, 1, 0 } },
+	{ .lt = { 13, 0, 1, 1, 1 } },
+	{ .lt = { 15, 0, 3, 1, 2 } },
+	{ .lt = { 19, 0, 7, 1, 3 } },
+	{ .lt = { 14, 0, 0, 1, 1 } },
+	{ .lt = { 16, 0, 2, 1, 2 } },
+	{ .lt = { 21, 0, 5, 1, 3 } },
+	{ .lt = { 18, 0, 0, 1, 2 } },
+	{ .lt = { 22, 0, 4, 1, 3 } },
+	{ .lt = { 26, 0, 0, 1, 3 } },
 };
 
 static const struct intel_ddi_buf_trans xe3plpd_lt_trans_dp14 = {
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index 9698697f39177..ac9acdec6d298 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -51,11 +51,11 @@ struct dg2_snps_phy_buf_trans {
 };
 
 struct xe3plpd_lt_phy_buf_trans {
-	u8 txswing;
-	u8 txswing_level;
-	u8 pre_cursor;
 	u8 main_cursor;
+	u8 pre_cursor;
 	u8 post_cursor;
+	u8 txswing;
+	u8 txswing_level;
 };
 
 union intel_ddi_buf_trans_entry {
-- 
2.45.2

[PATCH v3 02/31] drm/i915/bios: search for VBT #57 by default

[Michał Grzelak]

Start searching for Vswing / Preemphasis Override Block during VBT
parsing at init_bdb_blocks().

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index b6fe87c29aa7c..5700de438fdfd 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -200,6 +200,8 @@ static const struct {
 	  .min_size = sizeof(struct bdb_mipi_sequence) },
 	{ .section_id = BDB_COMPRESSION_PARAMETERS,
 	  .min_size = sizeof(struct bdb_compression_parameters), },
+	{ .section_id = BDB_VSWING_PREEMPH,
+	  .min_size = sizeof(struct bdb_vswing_preemph), },
 	{ .section_id = BDB_GENERIC_DTD,
 	  .min_size = sizeof(struct bdb_generic_dtd), },
 };
-- 
2.45.2

[PATCH v3 03/31] drm/i915/bios: log unsupported VS/PE-O parsing

[Michał Grzelak]

Search for VBT #57. Check for failure since pre-ICL GOPs do not contain
the block. Check also if VBT version is appropriately up-to-date.

Issue a debug message when port requests to override VS/PE and parsing
VBT #57 for the platform has not yet been implemented.

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 5700de438fdfd..3f9e4d31c7375 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2185,6 +2185,23 @@ parse_compression_parameters(struct intel_display *display)
 	}
 }
 
+static void
+parse_vswing_preemph_override(struct intel_display *display)
+{
+	const struct bdb_vswing_preemph *block;
+
+	if (display->vbt.version < 218)
+		return;
+
+	block = bdb_find_section(display, BDB_VSWING_PREEMPH);
+
+	/* pre-ICL GOP don't have VBT #57 */
+	if (!block)
+		return;
+
+	drm_dbg_kms(display->drm, "VS/PE-O parsing not yet supported\n");
+}
+
 static u8 translate_iboost(struct intel_display *display, u8 val)
 {
 	static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
@@ -3276,6 +3293,7 @@ void intel_bios_init(struct intel_display *display)
 
 	/* Depends on child device list */
 	parse_compression_parameters(display);
+	parse_vswing_preemph_override(display);
 
 out:
 	if (!vbt) {
-- 
2.45.2

[PATCH v3 04/31] drm/i915/bios: store VBT #57's metadata in intel_vbt_data

[Michał Grzelak]

Store number of rows and number of tables in intel_vbt_data when search
for the VBT #57 succeeded.

Display version determines number of rows present in each table. pre-MTL
platforms should have 10 rows while MTL+ should have 16 rows.

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c         | 7 +++++++
 drivers/gpu/drm/i915/display/intel_display_core.h | 3 +++
 2 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 3f9e4d31c7375..d64668c1022a7 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2200,6 +2200,9 @@ parse_vswing_preemph_override(struct intel_display *display)
 		return;
 
 	drm_dbg_kms(display->drm, "VS/PE-O parsing not yet supported\n");
+
+	display->vbt.num_tables = block->num_tables;
+	display->vbt.num_rows = DISPLAY_VER(display) >= 14 ? 16 : 10;
 }
 
 static u8 translate_iboost(struct intel_display *display, u8 val)
@@ -2997,6 +3000,10 @@ init_vbt_defaults(struct intel_display *display)
 							      !HAS_PCH_SPLIT(display));
 	drm_dbg_kms(display->drm, "Set default to SSC at %d kHz\n",
 		    display->vbt.lvds_ssc_freq);
+
+	/* Vswing / Preemphasis Override */
+	display->vbt.num_tables = 0;
+	display->vbt.num_rows = 0;
 }
 
 /* Common defaults which may be overridden by VBT. */
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 76745ce6a716e..36ea4873deeb0 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -242,6 +242,9 @@ struct intel_vbt_data {
 	struct list_head display_devices;
 	struct list_head bdb_blocks;
 
+	int num_tables;
+	int num_rows;
+
 	struct sdvo_device_mapping {
 		u8 initialized;
 		u8 dvo_port;
-- 
2.45.2

[PATCH v3 05/31] drm/i915/bios: de/allocate VS/PE-O buffers' matrix

[Michał Grzelak]

Since all of the tables' rows are sticked together and hence form a
giant table, we could call it "buffers' table". This is not especially
great lingo though because there is a naming clash between superior
"buffers' table" and tables that form it.

Alternatively we can treat each interior table as a column of couple
struct intel_ddi_buf_trans_entry's. Then after sticking all tables
together column-by-column we obtain a matrix of struct
intel_ddi_buf_trans_entry. We are allowed to do that since every table
has the same number of rows.

This data structure's representation has the advantage that it resolves
aforementioned lingo clash while still being equivalent to "buffers'
table", simply reshaped. Thus it will be mentioned as "buffers' matrix".

For the convenience of use, implementation assume transposition of the
matrix described above: each table from VBT #57 forms one matrix's row
and each matrix's column represents one row of the table from VBT #57.
It allows us to use specific table without specifying table's row.

Add pointer for matrix of intel_ddi_buf_trans_entry into intel_vbt_data.
Include intel_ddi_buf_trans.h in intel_bios.c to enable adding it.

Name the pointer as bufs_mtrx. bufs_mtx would be a better fit, but it
could misleadingly indicate that it represents mutex.

Allocate (num_tables x num_rows) matrix of intel_ddi_buf_trans_entry.
This "buffers' matrix" will be used to store all deparsed VS/PE-O tables
from VBT #57. Store matrix's pointer in intel_vbt_data.

Deallocate whole matrix on driver removal.

v2->v3
- switch from kzalloc() into kzalloc_objs()

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c     | 21 ++++++++++++++++++-
 .../gpu/drm/i915/display/intel_display_core.h |  1 +
 2 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index d64668c1022a7..064eb4fda3f3a 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -34,6 +34,7 @@
 #include <drm/drm_fixed.h>
 #include <drm/drm_print.h>
 
+#include "intel_ddi_buf_trans.h"
 #include "intel_display.h"
 #include "intel_display_core.h"
 #include "intel_display_rpm.h"
@@ -2188,7 +2189,9 @@ parse_compression_parameters(struct intel_display *display)
 static void
 parse_vswing_preemph_override(struct intel_display *display)
 {
+	union intel_ddi_buf_trans_entry **bufs_mtrx;
 	const struct bdb_vswing_preemph *block;
+	u8 num_rows;
 
 	if (display->vbt.version < 218)
 		return;
@@ -2199,10 +2202,18 @@ parse_vswing_preemph_override(struct intel_display *display)
 	if (!block)
 		return;
 
+	num_rows = DISPLAY_VER(display) >= 14 ? 16 : 10;
+
+	bufs_mtrx = kzalloc_objs(*bufs_mtrx, block->num_tables);
+
+	for (int idx = 0; idx < block->num_tables; idx++)
+		bufs_mtrx[idx] = kzalloc_objs(**bufs_mtrx, num_rows);
+
 	drm_dbg_kms(display->drm, "VS/PE-O parsing not yet supported\n");
 
+	display->vbt.bufs_mtrx = bufs_mtrx;
 	display->vbt.num_tables = block->num_tables;
-	display->vbt.num_rows = DISPLAY_VER(display) >= 14 ? 16 : 10;
+	display->vbt.num_rows = num_rows;
 }
 
 static u8 translate_iboost(struct intel_display *display, u8 val)
@@ -3002,6 +3013,7 @@ init_vbt_defaults(struct intel_display *display)
 		    display->vbt.lvds_ssc_freq);
 
 	/* Vswing / Preemphasis Override */
+	display->vbt.bufs_mtrx = NULL;
 	display->vbt.num_tables = 0;
 	display->vbt.num_rows = 0;
 }
@@ -3385,6 +3397,13 @@ void intel_bios_driver_remove(struct intel_display *display)
 		list_del(&entry->node);
 		kfree(entry);
 	}
+
+	if (display->vbt.bufs_mtrx) {
+		for (int idx = 0; idx < display->vbt.num_tables; idx++)
+			kfree(display->vbt.bufs_mtrx[idx]);
+
+		kfree(display->vbt.bufs_mtrx);
+	}
 }
 
 void intel_bios_fini_panel(struct intel_panel *panel)
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 36ea4873deeb0..a91397ecfe017 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -242,6 +242,7 @@ struct intel_vbt_data {
 	struct list_head display_devices;
 	struct list_head bdb_blocks;
 
+	union intel_ddi_buf_trans_entry **bufs_mtrx;
 	int num_tables;
 	int num_rows;
 
-- 
2.45.2

[PATCH v3 06/31] drm/i915/bios: structurize VS/PE-O metadata

[Michał Grzelak]

Store all VS/PE-O relevant metadata inside anonymous struct in
intel_vbt_data. This includes number of rows, number of tables and
allocated memory for buffers' matrix.

Name the field as vspeo: an abomination from VS/PE-O, which in turn
could be expanded to VSwing / Pre-Emphasis Override.

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c     | 20 +++++++++----------
 .../gpu/drm/i915/display/intel_display_core.h |  8 +++++---
 2 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 064eb4fda3f3a..6ac8dd16ea7b8 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2211,9 +2211,9 @@ parse_vswing_preemph_override(struct intel_display *display)
 
 	drm_dbg_kms(display->drm, "VS/PE-O parsing not yet supported\n");
 
-	display->vbt.bufs_mtrx = bufs_mtrx;
-	display->vbt.num_tables = block->num_tables;
-	display->vbt.num_rows = num_rows;
+	display->vbt.vspeo.bufs_mtrx = bufs_mtrx;
+	display->vbt.vspeo.num_tables = block->num_tables;
+	display->vbt.vspeo.num_rows = num_rows;
 }
 
 static u8 translate_iboost(struct intel_display *display, u8 val)
@@ -3013,9 +3013,9 @@ init_vbt_defaults(struct intel_display *display)
 		    display->vbt.lvds_ssc_freq);
 
 	/* Vswing / Preemphasis Override */
-	display->vbt.bufs_mtrx = NULL;
-	display->vbt.num_tables = 0;
-	display->vbt.num_rows = 0;
+	display->vbt.vspeo.bufs_mtrx = NULL;
+	display->vbt.vspeo.num_tables = 0;
+	display->vbt.vspeo.num_rows = 0;
 }
 
 /* Common defaults which may be overridden by VBT. */
@@ -3398,11 +3398,11 @@ void intel_bios_driver_remove(struct intel_display *display)
 		kfree(entry);
 	}
 
-	if (display->vbt.bufs_mtrx) {
-		for (int idx = 0; idx < display->vbt.num_tables; idx++)
-			kfree(display->vbt.bufs_mtrx[idx]);
+	if (display->vbt.vspeo.bufs_mtrx) {
+		for (int idx = 0; idx < display->vbt.vspeo.num_tables; idx++)
+			kfree(display->vbt.vspeo.bufs_mtrx[idx]);
 
-		kfree(display->vbt.bufs_mtrx);
+		kfree(display->vbt.vspeo.bufs_mtrx);
 	}
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index a91397ecfe017..19ffe62d642c6 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -242,9 +242,11 @@ struct intel_vbt_data {
 	struct list_head display_devices;
 	struct list_head bdb_blocks;
 
-	union intel_ddi_buf_trans_entry **bufs_mtrx;
-	int num_tables;
-	int num_rows;
+	struct {
+		union intel_ddi_buf_trans_entry **bufs_mtrx;
+		int num_tables;
+		int num_rows;
+	} vspeo;
 
 	struct sdvo_device_mapping {
 		u8 initialized;
-- 
2.45.2

[PATCH v3 07/31] drm/i915/bios: add buf_trans for each bios_encoder

[Michał Grzelak]

Every devdata needs a separate intel_ddi_buf_trans since each port can
request an override. Add buffer's pointer into intel_bios_encoder_data.

Initialize the pointer to NULL when no VBT was provided.

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 6ac8dd16ea7b8..a3f0334c3a582 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -73,6 +73,7 @@
 struct intel_bios_encoder_data {
 	struct intel_display *display;
 
+	struct intel_ddi_buf_trans *buf_trans;
 	struct child_device_config child;
 	struct dsc_compression_parameters_entry *dsc;
 	struct list_head node;
@@ -2656,6 +2657,11 @@ static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata,
 	}
 }
 
+static void override_vswing_preemph(struct intel_bios_encoder_data *devdata)
+{
+	devdata->buf_trans = NULL;
+}
+
 static bool
 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
 {
@@ -2847,6 +2853,7 @@ static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
 	sanitize_dedicated_external(devdata, port);
 	sanitize_device_type(devdata, port);
 	sanitize_hdmi_level_shift(devdata, port);
+	override_vswing_preemph(devdata);
 }
 
 static bool has_ddi_port_info(struct intel_display *display)
@@ -3057,6 +3064,7 @@ init_vbt_missing_defaults(struct intel_display *display)
 			break;
 
 		devdata->display = display;
+		devdata->buf_trans = NULL;
 		child = &devdata->child;
 
 		if (port == PORT_F)
-- 
2.45.2

[PATCH v3 08/31] drm/i915/bios: de/allocate buf_trans for each port

[Michał Grzelak]

Allocate intel_ddi_buf_trans buffer per port if requested. Request is
considered invalid if .use_vbt_vswing field is unset and VBT version is
less than 218. Do not allocate buffer if not requested or request is
invalid.

Deallocate buffer for each requesting port on driver removal.

v2->v3
- change kzalloc() into kzalloc_obj()
- remove null pointer check before kfree()

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index a3f0334c3a582..fa9f21c5c6134 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2659,7 +2659,15 @@ static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata,
 
 static void override_vswing_preemph(struct intel_bios_encoder_data *devdata)
 {
+	struct intel_ddi_buf_trans *buf_trans;
+
 	devdata->buf_trans = NULL;
+
+	if (devdata->display->vbt.version < 218 || !devdata->child.use_vbt_vswing)
+		return;
+
+	buf_trans = kzalloc_obj(*buf_trans);
+	devdata->buf_trans = buf_trans;
 }
 
 static bool
@@ -3398,6 +3406,8 @@ void intel_bios_driver_remove(struct intel_display *display)
 				 node) {
 		list_del(&devdata->node);
 		kfree(devdata->dsc);
+		kfree(devdata->buf_trans);
+
 		kfree(devdata);
 	}
 
-- 
2.45.2

[PATCH v3 09/31] drm/i915/bios: check VS/PE-O in helper func

[Michał Grzelak]

Add helper intel_bios_encoder_overrides_vswing() to check if port
requests for overriding default VS/PE tables.

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 8 +++++++-
 drivers/gpu/drm/i915/display/intel_bios.h | 1 +
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index fa9f21c5c6134..b01e485283459 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2663,7 +2663,7 @@ static void override_vswing_preemph(struct intel_bios_encoder_data *devdata)
 
 	devdata->buf_trans = NULL;
 
-	if (devdata->display->vbt.version < 218 || !devdata->child.use_vbt_vswing)
+	if (!intel_bios_encoder_overrides_vswing(devdata))
 		return;
 
 	buf_trans = kzalloc_obj(*buf_trans);
@@ -3855,6 +3855,12 @@ bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devda
 	return devdata->display->vbt.version >= 209 && devdata->child.tbt;
 }
 
+bool intel_bios_encoder_overrides_vswing(const struct intel_bios_encoder_data *devdata)
+{
+	return devdata->display->vbt.version >= 218 &&
+		devdata->child.use_vbt_vswing;
+}
+
 bool intel_bios_encoder_is_dedicated_external(const struct intel_bios_encoder_data *devdata)
 {
 	return devdata->display->vbt.version >= 264 &&
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
index 75dff27b42289..50c8fc91fbe85 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -73,6 +73,7 @@ bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
 const struct intel_bios_encoder_data *
 intel_bios_encoder_data_lookup(struct intel_display *display, enum port port);
 
+bool intel_bios_encoder_overrides_vswing(const struct intel_bios_encoder_data *devdata);
 bool intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata);
 bool intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata);
 bool intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata);
-- 
2.45.2

[PATCH v3 10/31] drm/i915/bios: print VS/PE-O port info

[Michał Grzelak]

Issue a debug message when port asks to override default Vswing /
Preemphasis tables.

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index b01e485283459..5ff7f25270cf6 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2801,6 +2801,11 @@ static void print_ddi_port(const struct intel_bios_encoder_data *devdata)
 			    "Port %c supports dynamic DDI allocation in TCSS\n",
 			    port_name(port));
 
+	if (intel_bios_encoder_overrides_vswing(devdata))
+		drm_dbg_kms(display->drm,
+			    "Port %c overrides VS/PE tables\n",
+			    port_name(port));
+
 	hdmi_level_shift = intel_bios_hdmi_level_shift(devdata);
 	if (hdmi_level_shift >= 0) {
 		drm_dbg_kms(display->drm,
-- 
2.45.2

[PATCH v3 11/31] drm/i915/bios: remove VS/PE-O warning

[Michał Grzelak]

There is not much use of warning when port asks to override default
VS/PE since it is already logged. Remove drm_WARN() and child_device
from print_ddi_port() since drm_WARN() was the only user of it.

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 9 ---------
 1 file changed, 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 5ff7f25270cf6..1b813a3dff245 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2764,7 +2764,6 @@ static bool is_port_valid(struct intel_display *display, enum port port)
 static void print_ddi_port(const struct intel_bios_encoder_data *devdata)
 {
 	struct intel_display *display = devdata->display;
-	const struct child_device_config *child = &devdata->child;
 	bool is_dvi, is_hdmi, is_dp, is_edp, is_dsi, is_crt, supports_typec_usb, supports_tbt;
 	int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
 	enum port port;
@@ -2837,14 +2836,6 @@ static void print_ddi_port(const struct intel_bios_encoder_data *devdata)
 		drm_dbg_kms(display->drm,
 			    "Port %c VBT DP max link rate: %d\n",
 			    port_name(port), dp_max_link_rate);
-
-	/*
-	 * FIXME need to implement support for VBT
-	 * vswing/preemph tables should this ever trigger.
-	 */
-	drm_WARN(display->drm, child->use_vbt_vswing,
-		 "Port %c asks to use VBT vswing/preemph tables\n",
-		 port_name(port));
 }
 
 static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
-- 
2.45.2

[PATCH v3 12/31] drm/i915/ddi: expose VS/PE-O buffers to intel_encoder

[Michał Grzelak]

Add into intel_encoder constant pointer to intel_ddi_buf_trans. Track
with it VS/PE-O buffer from corresponding BIOS encoder.

Add helper function into intel_bios.[ch] to extract port's
intel_ddi_buf_trans pointer. Cache the pointer by default into each
intel_encoder during intel_ddi_init().

This is needed as devdata->buf_trans has been allocated per each port
during parsing DDI ports in intel_bios.c. Meanwhile every encoder will
need to know if VS/PE overriding is requested during
intel_ddi_buf_trans_init().

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c          | 6 ++++++
 drivers/gpu/drm/i915/display/intel_bios.h          | 2 ++
 drivers/gpu/drm/i915/display/intel_ddi.c           | 1 +
 drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
 4 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 1b813a3dff245..6893aa9f01aec 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -3851,6 +3851,12 @@ bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devda
 	return devdata->display->vbt.version >= 209 && devdata->child.tbt;
 }
 
+const struct intel_ddi_buf_trans *
+intel_bios_encoder_extract_vswing(const struct intel_bios_encoder_data *devdata)
+{
+	return devdata->buf_trans;
+}
+
 bool intel_bios_encoder_overrides_vswing(const struct intel_bios_encoder_data *devdata)
 {
 	return devdata->display->vbt.version >= 218 &&
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
index 50c8fc91fbe85..cf040b9b7915b 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -73,6 +73,8 @@ bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
 const struct intel_bios_encoder_data *
 intel_bios_encoder_data_lookup(struct intel_display *display, enum port port);
 
+const struct intel_ddi_buf_trans *
+intel_bios_encoder_extract_vswing(const struct intel_bios_encoder_data *devdata);
 bool intel_bios_encoder_overrides_vswing(const struct intel_bios_encoder_data *devdata);
 bool intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata);
 bool intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata);
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 2681940a5cfe3..eb188b27ec96b 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -5249,6 +5249,7 @@ void intel_ddi_init(struct intel_display *display,
 
 	encoder = &dig_port->base;
 	encoder->devdata = devdata;
+	encoder->vspeo = intel_bios_encoder_extract_vswing(devdata);
 
 	drm_encoder_init(display->drm, &encoder->base, &intel_ddi_funcs,
 			 DRM_MODE_ENCODER_TMDS, "%s",
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 26e59110e7435..0f27bcfb69223 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -297,6 +297,7 @@ struct intel_encoder {
 
 	/* VBT information for this encoder (may be NULL for older platforms) */
 	const struct intel_bios_encoder_data *devdata;
+	const struct intel_ddi_buf_trans *vspeo;
 };
 
 struct intel_panel_bl_funcs {
-- 
2.45.2

[PATCH v3 13/31] drm/i915/buf_trans: override VS/PE-O when requested

[Michał Grzelak]

Check if corresponding port asks to override default Vswing /
Preemphasis tables. As of now issue a debug message if it is the case.
Do not override when not requested, hence when port's buffer's pointer
is set to NULL.

With current implementation there is no way for proper rollback from
intel_ddi_buf_trans_get() if request was done on platform without the
support for VS/PE-O parsing. In this situation using any index will
result in using zeroed tables instead of the defaults.

Therefore add a workaround: check VS/PE-O parsing availability for the
platform during DDI parsing. If check fails, do not allocate buffer, and
hence use default encoder->get_buf_trans().

Workaround will be removed after all platforms with VS/PE-O tables are
able to parse them.

v2->v3
- break logging into two lines

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c          | 4 ++++
 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 6 ++++++
 2 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 6893aa9f01aec..b2ee556e9d1f3 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2660,12 +2660,16 @@ static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata,
 static void override_vswing_preemph(struct intel_bios_encoder_data *devdata)
 {
 	struct intel_ddi_buf_trans *buf_trans;
+	bool parseable = false;
 
 	devdata->buf_trans = NULL;
 
 	if (!intel_bios_encoder_overrides_vswing(devdata))
 		return;
 
+	if (!parseable)
+		return;
+
 	buf_trans = kzalloc_obj(*buf_trans);
 	devdata->buf_trans = buf_trans;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 908577b04a14e..38f2a030c018d 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -3,6 +3,8 @@
  * Copyright © 2020 Intel Corporation
  */
 
+#include <drm/drm_print.h>
+
 #include "intel_cx0_phy.h"
 #include "intel_ddi.h"
 #include "intel_ddi_buf_trans.h"
@@ -1857,5 +1859,9 @@ const struct intel_ddi_buf_trans *intel_ddi_buf_trans_get(struct intel_encoder *
 							  const struct intel_crtc_state *crtc_state,
 							  int *n_entries)
 {
+	if (encoder->vspeo)
+		drm_dbg_kms(to_intel_display(encoder)->drm,
+			    "VS/PE-O unsupported, using default VS/PE tables");
+
 	return encoder->get_buf_trans(encoder, crtc_state, n_entries);
 }
-- 
2.45.2

[PATCH v3 14/31] drm/i915/buf_trans: abstract VS/PE-O index computation

[Michał Grzelak]

Move index computation for most appropriate VS/PE-O table into separate
function.

Unlike VS/PE-O tables' parsing, index computation cannot happen during
DDI ports parsing. It is because computation depends on link's port
clock, which can change with every modeset. Thus index computation must
be deferred to occur during intel_ddi_buf_trans_get(), after tables'
parsing has completed.

v2->v3
- break logging into two lines
- return -EINVAL instead of -1 (Suraj)

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 .../gpu/drm/i915/display/intel_ddi_buf_trans.c   | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 38f2a030c018d..9ae7a780a7639 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1786,6 +1786,15 @@ xe3plpd_get_lt_buf_trans(struct intel_encoder *encoder,
 		return intel_get_buf_trans(&xe3plpd_lt_trans_dp14, n_entries);
 }
 
+static int
+vspeo_compute_index(struct intel_encoder *encoder)
+{
+	drm_dbg_kms(to_intel_display(encoder)->drm,
+		    "VS/PE-O unsupported, using default VS/PE tables");
+
+	return -EINVAL;
+}
+
 void intel_ddi_buf_trans_init(struct intel_encoder *encoder)
 {
 	struct intel_display *display = to_intel_display(encoder);
@@ -1859,9 +1868,10 @@ const struct intel_ddi_buf_trans *intel_ddi_buf_trans_get(struct intel_encoder *
 							  const struct intel_crtc_state *crtc_state,
 							  int *n_entries)
 {
-	if (encoder->vspeo)
-		drm_dbg_kms(to_intel_display(encoder)->drm,
-			    "VS/PE-O unsupported, using default VS/PE tables");
+	if (!encoder->vspeo)
+		return encoder->get_buf_trans(encoder, crtc_state, n_entries);
+
+	vspeo_compute_index(encoder);
 
 	return encoder->get_buf_trans(encoder, crtc_state, n_entries);
 }
-- 
2.45.2

[PATCH v3 15/31] drm/i915/bios: parse LT's VS/PE-O tables

[Michał Grzelak]

LT's VS/PE-O tables have less columns than xe3plpd_lt_phy_buf_trans
contains fields. This prevents casting block->tables to point at
xe3plpd_lt_phy_buf_trans and parsing it trivially.

Parse each entry from every table into kzalloc'd buffers' matrix. Read
number of tables and number of columns from the block. Assume that each
table contains 16 rows.

Inflate xe3plpd_lt_phy_buf_trans since each VBT-based value is
stored on u32. Reducing the size will be done in separate commit.

Add LT to workaround for availability of VS/PE-O parsing.

v2->v3
- remove unnecessary braces from if blocks

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c     | 33 ++++++++++++++++++-
 .../drm/i915/display/intel_ddi_buf_trans.h    | 10 +++---
 2 files changed, 37 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index b2ee556e9d1f3..2328429b562df 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2187,6 +2187,30 @@ parse_compression_parameters(struct intel_display *display)
 	}
 }
 
+static void
+parse_vswing_preemph_lt(union intel_ddi_buf_trans_entry **bufs_mtrx,
+			const struct bdb_vswing_preemph *block)
+{
+	union intel_ddi_buf_trans_entry *entry;
+	const u32 *tables = block->tables;
+	u8 num_rows = 16;
+	size_t offset = 0;
+	const u32 *vals;
+
+	for (int idx = 0; idx < block->num_tables; idx++) {
+		for (int row = 0; row < num_rows; row++) {
+			vals = &tables[offset];
+
+			entry = &bufs_mtrx[idx][row];
+			entry->lt.main_cursor = vals[0];
+			entry->lt.pre_cursor = vals[1];
+			entry->lt.post_cursor = vals[2];
+
+			offset += block->num_columns;
+		}
+	}
+}
+
 static void
 parse_vswing_preemph_override(struct intel_display *display)
 {
@@ -2210,7 +2234,10 @@ parse_vswing_preemph_override(struct intel_display *display)
 	for (int idx = 0; idx < block->num_tables; idx++)
 		bufs_mtrx[idx] = kzalloc_objs(**bufs_mtrx, num_rows);
 
-	drm_dbg_kms(display->drm, "VS/PE-O parsing not yet supported\n");
+	if (HAS_LT_PHY(display))
+		parse_vswing_preemph_lt(bufs_mtrx, block);
+	else
+		drm_dbg_kms(display->drm, "VS/PE-O parsing not yet supported\n");
 
 	display->vbt.vspeo.bufs_mtrx = bufs_mtrx;
 	display->vbt.vspeo.num_tables = block->num_tables;
@@ -2659,6 +2686,7 @@ static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata,
 
 static void override_vswing_preemph(struct intel_bios_encoder_data *devdata)
 {
+	struct intel_display *display = devdata->display;
 	struct intel_ddi_buf_trans *buf_trans;
 	bool parseable = false;
 
@@ -2667,6 +2695,9 @@ static void override_vswing_preemph(struct intel_bios_encoder_data *devdata)
 	if (!intel_bios_encoder_overrides_vswing(devdata))
 		return;
 
+	if (HAS_LT_PHY(display))
+		parseable = true;
+
 	if (!parseable)
 		return;
 
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index ac9acdec6d298..bc4bc80ba6588 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -51,11 +51,11 @@ struct dg2_snps_phy_buf_trans {
 };
 
 struct xe3plpd_lt_phy_buf_trans {
-	u8 main_cursor;
-	u8 pre_cursor;
-	u8 post_cursor;
-	u8 txswing;
-	u8 txswing_level;
+	u32 main_cursor;
+	u32 pre_cursor;
+	u32 post_cursor;
+	u32 txswing;
+	u32 txswing_level;
 };
 
 union intel_ddi_buf_trans_entry {
-- 
2.45.2

[PATCH v3 16/31] drm/i915/bios: shrink all LT's VS/PE tables

[Michał Grzelak]

Each value present in LT's VS/PE-O table is stored on u32. In order to
match values' size this causes xe3plpd_lt_phy_buf_trans to increase it's
size.

Nevertheless, the actual value from each LT's VS/PE-O table is fully
encoded in the lowest byte. Extract the lowest byte by casting to u8 and
using it as deparsed value. This way there is no need to inflate default
tables.

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c          |  6 +++---
 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h | 10 +++++-----
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 2328429b562df..1b14cffe641ae 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2202,9 +2202,9 @@ parse_vswing_preemph_lt(union intel_ddi_buf_trans_entry **bufs_mtrx,
 			vals = &tables[offset];
 
 			entry = &bufs_mtrx[idx][row];
-			entry->lt.main_cursor = vals[0];
-			entry->lt.pre_cursor = vals[1];
-			entry->lt.post_cursor = vals[2];
+			entry->lt.main_cursor = (u8) vals[0];
+			entry->lt.pre_cursor = (u8) vals[1];
+			entry->lt.post_cursor = (u8) vals[2];
 
 			offset += block->num_columns;
 		}
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index bc4bc80ba6588..ac9acdec6d298 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -51,11 +51,11 @@ struct dg2_snps_phy_buf_trans {
 };
 
 struct xe3plpd_lt_phy_buf_trans {
-	u32 main_cursor;
-	u32 pre_cursor;
-	u32 post_cursor;
-	u32 txswing;
-	u32 txswing_level;
+	u8 main_cursor;
+	u8 pre_cursor;
+	u8 post_cursor;
+	u8 txswing;
+	u8 txswing_level;
 };
 
 union intel_ddi_buf_trans_entry {
-- 
2.45.2

[PATCH v3 17/31] drm/i915/buf_trans: compute LT's VS/PE-O index

[Michał Grzelak]

Compute the most appropriate VS/PE-O index for LT basing on highest
available DP mode.

Use 6th table if encoder supports DP 2.0 or higher. Otherwise use 5th
table for DP.

Warn if encoder does not support DP. In that case fallback to using
default VS/PE tables.

Fill encoder's VS/PE-O buffer with chosen table when overriding
defaults. Return the buffer likewise other _get_buf_trans() hooks.

There are no changes to intel_ddi_dp_level() since selection of correct
row of intel_ddi_buf_trans_entry is same as when no override request has
been done.

v2->v3
- remove unnecessary braces from if block (Suraj)
- return -EINVAL instead of -1 (Suraj)

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 .../drm/i915/display/intel_ddi_buf_trans.c    | 43 ++++++++++++++++---
 1 file changed, 38 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 9ae7a780a7639..b6129bcc1996e 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1787,9 +1787,32 @@ xe3plpd_get_lt_buf_trans(struct intel_encoder *encoder,
 }
 
 static int
-vspeo_compute_index(struct intel_encoder *encoder)
+lt_compute_index(const struct intel_crtc_state *crtc_state)
 {
-	drm_dbg_kms(to_intel_display(encoder)->drm,
+	if (intel_crtc_has_dp_encoder(crtc_state)) {
+		if (intel_dp_is_uhbr(crtc_state))
+			return 5;
+		else
+			return 4;
+	}
+
+	drm_WARN(to_intel_display(crtc_state)->drm, 1,
+		 "non-DP (%d) encoder asks to compute VS/PE-O index\n",
+		 crtc_state->output_types);
+
+	return -EINVAL;
+}
+
+static int
+vspeo_compute_index(struct intel_encoder *encoder,
+		    const struct intel_crtc_state *crtc_state)
+{
+	struct intel_display *display = to_intel_display(encoder);
+
+	if (HAS_LT_PHY(display))
+		return lt_compute_index(crtc_state);
+
+	drm_dbg_kms(display->drm,
 		    "VS/PE-O unsupported, using default VS/PE tables");
 
 	return -EINVAL;
@@ -1868,10 +1891,20 @@ const struct intel_ddi_buf_trans *intel_ddi_buf_trans_get(struct intel_encoder *
 							  const struct intel_crtc_state *crtc_state,
 							  int *n_entries)
 {
-	if (!encoder->vspeo)
+	struct intel_display *display = to_intel_display(encoder);
+	struct intel_ddi_buf_trans *buf_trans;
+	int idx;
+
+	buf_trans = (void *) encoder->vspeo;
+	if (!buf_trans)
+		return encoder->get_buf_trans(encoder, crtc_state, n_entries);
+
+	idx = vspeo_compute_index(encoder, crtc_state);
+	if (idx < 0)
 		return encoder->get_buf_trans(encoder, crtc_state, n_entries);
 
-	vspeo_compute_index(encoder);
+	buf_trans->entries = display->vbt.vspeo.bufs_mtrx[idx];
+	buf_trans->num_entries = display->vbt.vspeo.num_rows;
 
-	return encoder->get_buf_trans(encoder, crtc_state, n_entries);
+	return intel_get_buf_trans(buf_trans, n_entries);
 }
-- 
2.45.2

[PATCH v3 18/31] drm/i915/buf_trans: enumerate LT's VS/PE-O indices

[Michał Grzelak]

Encapsulate LT's VS/PE-O's indices in enum lt_vspeo_index.

Treat error case as referring to index -1. Refer to it as LT_ERR.

Tables 1-4 are not used at all and are most likely to be zeroed. Refer
to them as _LT_unusedN.

5th table is used for any mode below DP 2.0 (exclusive). Refer to it as
LT_DP14.

6th table is used for any mode above DP 2.0 (inclusive). Refer to it
as LT_DP21.

Indices for other tables have not yet been observed to be used as of
now.

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c |  8 ++++----
 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h | 12 ++++++++++++
 2 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index b6129bcc1996e..54ad46643fb5c 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1786,21 +1786,21 @@ xe3plpd_get_lt_buf_trans(struct intel_encoder *encoder,
 		return intel_get_buf_trans(&xe3plpd_lt_trans_dp14, n_entries);
 }
 
-static int
+static enum lt_vspeo_index
 lt_compute_index(const struct intel_crtc_state *crtc_state)
 {
 	if (intel_crtc_has_dp_encoder(crtc_state)) {
 		if (intel_dp_is_uhbr(crtc_state))
-			return 5;
+			return LT_DP21;
 		else
-			return 4;
+			return LT_DP14;
 	}
 
 	drm_WARN(to_intel_display(crtc_state)->drm, 1,
 		 "non-DP (%d) encoder asks to compute VS/PE-O index\n",
 		 crtc_state->output_types);
 
-	return -EINVAL;
+	return LT_ERR;
 }
 
 static int
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index ac9acdec6d298..30fafeeaf62f2 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -74,6 +74,18 @@ struct intel_ddi_buf_trans {
 	u8 hdmi_default_entry;
 };
 
+enum lt_vspeo_index {
+	LT_ERR = -1,
+
+	_LT_unused0 = 0,
+	_LT_unused1,
+	_LT_unused2,
+	_LT_unused3,
+
+	LT_DP14 = 4,
+	LT_DP21
+};
+
 bool is_hobl_buf_trans(const struct intel_ddi_buf_trans *table);
 
 void intel_ddi_buf_trans_init(struct intel_encoder *encoder);
-- 
2.45.2

[PATCH v3 19/31] drm/i915/bios: parse Snps's VS/PE-O tables

[Michał Grzelak]

Snps's VS/PE-O tables' layout match with dg2_snps_phy_buf_trans layout.
However VBT-based values are u32 while dg2_snps_phy_buf_trans uses u8.
This width mismatch prevents from casting block->tables to point at
dg2_snps_phy_buf_trans and parsing it trivially.

We will temporarily increase dg2_snps_buf_trans size but eventually we
will get rid of it later. Thus stick to the approach used for LT's
VS/PE-O parsing.

Parse each entry from every table into kzalloc'd buffers' matrix. Read
number of tables and number of columns from the block. Assume that each
table contains 16 rows.

Inflate dg2_snps_phy_buf_trans since each VBT-based value is stored on
u32. Reducing the size will be done in separate commit.

Add Snps to workaround for availability of VS/PE-O parsing.

v2->v3
- remove unnecessary braces from if blocks

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c     | 36 +++++++++++++++++--
 .../drm/i915/display/intel_ddi_buf_trans.h    |  6 ++--
 2 files changed, 36 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 1b14cffe641ae..2d556889316f0 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2187,6 +2187,30 @@ parse_compression_parameters(struct intel_display *display)
 	}
 }
 
+static void
+parse_vswing_preemph_snps(union intel_ddi_buf_trans_entry **bufs_mtrx,
+			  const struct bdb_vswing_preemph *block)
+{
+	union intel_ddi_buf_trans_entry *entry;
+	const u32 *tables = block->tables;
+	u8 num_rows = 16;
+	size_t offset = 0;
+	const u32 *vals;
+
+	for (int idx = 0; idx < block->num_tables; idx++) {
+		for (int row = 0; row < num_rows; row++) {
+			vals = &tables[offset];
+
+			entry = &bufs_mtrx[idx][row];
+			entry->snps.vswing = vals[0];
+			entry->snps.pre_cursor = vals[1];
+			entry->snps.post_cursor = vals[2];
+
+			offset += block->num_columns;
+		}
+	}
+}
+
 static void
 parse_vswing_preemph_lt(union intel_ddi_buf_trans_entry **bufs_mtrx,
 			const struct bdb_vswing_preemph *block)
@@ -2234,10 +2258,13 @@ parse_vswing_preemph_override(struct intel_display *display)
 	for (int idx = 0; idx < block->num_tables; idx++)
 		bufs_mtrx[idx] = kzalloc_objs(**bufs_mtrx, num_rows);
 
-	if (HAS_LT_PHY(display))
+	if (HAS_LT_PHY(display)) {
 		parse_vswing_preemph_lt(bufs_mtrx, block);
-	else
+	} else if (DISPLAY_VER(display) >= 14) {
+		parse_vswing_preemph_snps(bufs_mtrx, block);
+	} else {
 		drm_dbg_kms(display->drm, "VS/PE-O parsing not yet supported\n");
+	}
 
 	display->vbt.vspeo.bufs_mtrx = bufs_mtrx;
 	display->vbt.vspeo.num_tables = block->num_tables;
@@ -2695,8 +2722,11 @@ static void override_vswing_preemph(struct intel_bios_encoder_data *devdata)
 	if (!intel_bios_encoder_overrides_vswing(devdata))
 		return;
 
-	if (HAS_LT_PHY(display))
+	if (HAS_LT_PHY(display)) {
+		parseable = true;
+	} else if (DISPLAY_VER(display) >= 14) {
 		parseable = true;
+	}
 
 	if (!parseable)
 		return;
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index 30fafeeaf62f2..1b48d66189ede 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -45,9 +45,9 @@ struct tgl_dkl_phy_ddi_buf_trans {
 };
 
 struct dg2_snps_phy_buf_trans {
-	u8 vswing;
-	u8 pre_cursor;
-	u8 post_cursor;
+	u32 vswing;
+	u32 pre_cursor;
+	u32 post_cursor;
 };
 
 struct xe3plpd_lt_phy_buf_trans {
-- 
2.45.2

[PATCH v3 20/31] drm/i915/bios: shrink all Snps's VS/PE tables

[Michał Grzelak]

Each value present in Snps's VS/PE-O table is stored on u32. In order to
match values' size this causes dg2_snps_phy_buf_trans to increase it's
size.

Nevertheless, the actual value from each Snps's VS/PE-O table is fully
encoded in the lowest byte. Extract the lowest byte by casting to u8 and
using it as deparsed value. This way there is no need to inflate default
tables.

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c          | 6 +++---
 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 2d556889316f0..c6a53319809ee 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2202,9 +2202,9 @@ parse_vswing_preemph_snps(union intel_ddi_buf_trans_entry **bufs_mtrx,
 			vals = &tables[offset];
 
 			entry = &bufs_mtrx[idx][row];
-			entry->snps.vswing = vals[0];
-			entry->snps.pre_cursor = vals[1];
-			entry->snps.post_cursor = vals[2];
+			entry->snps.vswing = (u8) vals[0];
+			entry->snps.pre_cursor = (u8) vals[1];
+			entry->snps.post_cursor = (u8) vals[2];
 
 			offset += block->num_columns;
 		}
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index 1b48d66189ede..30fafeeaf62f2 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -45,9 +45,9 @@ struct tgl_dkl_phy_ddi_buf_trans {
 };
 
 struct dg2_snps_phy_buf_trans {
-	u32 vswing;
-	u32 pre_cursor;
-	u32 post_cursor;
+	u8 vswing;
+	u8 pre_cursor;
+	u8 post_cursor;
 };
 
 struct xe3plpd_lt_phy_buf_trans {
-- 
2.45.2

[PATCH v3 21/31] drm/i915/buf_trans: compute C20's VS/PE-O index

[Michał Grzelak]

Compute the most appropriate VS/PE-O index for C20 basing on highest
available DP mode.

Use 6th table if encoder supports DP 2.0 or higher. Otherwise use 5th
table for DP.

Warn if encoder does not support DP. In that case fallback to using
default VS/PE tables.

v2->v3
- return -EINVAL instead of -1 (Suraj)

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 .../drm/i915/display/intel_ddi_buf_trans.c    | 23 ++++++++++++++++++-
 1 file changed, 22 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 54ad46643fb5c..e7c497d31d1a8 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1786,6 +1786,23 @@ xe3plpd_get_lt_buf_trans(struct intel_encoder *encoder,
 		return intel_get_buf_trans(&xe3plpd_lt_trans_dp14, n_entries);
 }
 
+static int
+snps_c20_compute_index(const struct intel_crtc_state *crtc_state)
+{
+	if (intel_crtc_has_dp_encoder(crtc_state)) {
+		if (intel_dp_is_uhbr(crtc_state))
+			return 5;
+		else
+			return 4;
+	}
+
+	drm_WARN(to_intel_display(crtc_state)->drm, 1,
+		 "non-DP (%d) encoder asks to compute VS/PE-O index\n",
+		 crtc_state->output_types);
+
+	return -EINVAL;
+}
+
 static enum lt_vspeo_index
 lt_compute_index(const struct intel_crtc_state *crtc_state)
 {
@@ -1809,8 +1826,12 @@ vspeo_compute_index(struct intel_encoder *encoder,
 {
 	struct intel_display *display = to_intel_display(encoder);
 
-	if (HAS_LT_PHY(display))
+	if (HAS_LT_PHY(display)) {
 		return lt_compute_index(crtc_state);
+	} else if (DISPLAY_VER(display) >= 14) {
+		if (!intel_encoder_is_c10phy(encoder))
+			return snps_c20_compute_index(crtc_state);
+	}
 
 	drm_dbg_kms(display->drm,
 		    "VS/PE-O unsupported, using default VS/PE tables");
-- 
2.45.2

[PATCH v3 22/31] drm/i915/buf_trans: enumerate C20's VS/PE-O indices

[Michał Grzelak]

Encapsulate C20's VS/PE-O's indices in enum snps_c20_vspeo_index.

Treat error case as referring to index -1. Refer to it as C20_ERR.

Tables 1-4 are not used at all and are most likely to be zeroed. Refer
to them as _C20_unusedN.

5th table is used for any mode below DP 2.0 (exclusive). Refer to it as
C20_DP14.

6th table is used for any mode above DP 2.0 (inclusive). Refer to it as
C20_DP20.

Indices for other tables have not yet been observed to be used as of
now.

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c |  8 ++++----
 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h | 12 ++++++++++++
 2 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index e7c497d31d1a8..2e4177ab55a34 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1786,21 +1786,21 @@ xe3plpd_get_lt_buf_trans(struct intel_encoder *encoder,
 		return intel_get_buf_trans(&xe3plpd_lt_trans_dp14, n_entries);
 }
 
-static int
+static enum snps_c20_vspeo_index
 snps_c20_compute_index(const struct intel_crtc_state *crtc_state)
 {
 	if (intel_crtc_has_dp_encoder(crtc_state)) {
 		if (intel_dp_is_uhbr(crtc_state))
-			return 5;
+			return C20_DP20;
 		else
-			return 4;
+			return C20_DP14;
 	}
 
 	drm_WARN(to_intel_display(crtc_state)->drm, 1,
 		 "non-DP (%d) encoder asks to compute VS/PE-O index\n",
 		 crtc_state->output_types);
 
-	return -EINVAL;
+	return C20_ERR;
 }
 
 static enum lt_vspeo_index
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index 30fafeeaf62f2..e182fbe9590c5 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -86,6 +86,18 @@ enum lt_vspeo_index {
 	LT_DP21
 };
 
+enum snps_c20_vspeo_index {
+	C20_ERR = -1,
+
+	_C20_unused0 = 0,
+	_C20_unused1,
+	_C20_unused2,
+	_C20_unused3,
+
+	C20_DP14 = 4,
+	C20_DP20
+};
+
 bool is_hobl_buf_trans(const struct intel_ddi_buf_trans *table);
 
 void intel_ddi_buf_trans_init(struct intel_encoder *encoder);
-- 
2.45.2

[PATCH v3 23/31] drm/i915/buf_trans: compute C10's VS/PE-O index

[Michał Grzelak]

Compute the most appropriate VS/PE-O index for C10.

For external DP use 2nd table if encoder supports any mode beyond or
including HBR2. Use 1st table if external DP encoder supports anything
lower than HBR2.

For eDP use 4th table if encoder supports HBR3. Otherwise use 3rd table
for eDP.

Warn if encoder does not support DP. In that case fallback to using
default VS/PE tables.

v2->v3
- return -EINVAL instead of -1 (Suraj)

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 .../drm/i915/display/intel_ddi_buf_trans.c    | 28 ++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 2e4177ab55a34..a9f1242e2bcf0 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1786,6 +1786,30 @@ xe3plpd_get_lt_buf_trans(struct intel_encoder *encoder,
 		return intel_get_buf_trans(&xe3plpd_lt_trans_dp14, n_entries);
 }
 
+static int
+snps_c10_compute_index(const struct intel_crtc_state *crtc_state)
+{
+	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
+		if (crtc_state->port_clock > 540000)
+			return 3;
+		else
+			return 2;
+	}
+
+	if (intel_crtc_has_dp_encoder(crtc_state)) {
+		if (crtc_state->port_clock > 270000)
+			return 1;
+		else
+			return 0;
+	}
+
+	drm_WARN(to_intel_display(crtc_state)->drm, 1,
+		 "non-DP (%d) encoder asks to compute VS/PE-O index\n",
+		 crtc_state->output_types);
+
+	return -EINVAL;
+}
+
 static enum snps_c20_vspeo_index
 snps_c20_compute_index(const struct intel_crtc_state *crtc_state)
 {
@@ -1829,7 +1853,9 @@ vspeo_compute_index(struct intel_encoder *encoder,
 	if (HAS_LT_PHY(display)) {
 		return lt_compute_index(crtc_state);
 	} else if (DISPLAY_VER(display) >= 14) {
-		if (!intel_encoder_is_c10phy(encoder))
+		if (intel_encoder_is_c10phy(encoder))
+			return snps_c10_compute_index(crtc_state);
+		else
 			return snps_c20_compute_index(crtc_state);
 	}
 
-- 
2.45.2

[PATCH v3 24/31] drm/i915/buf_trans: enumerate C10's VS/PE-O indices

[Michał Grzelak]

Encapsulate C10's VS/PE-O's indices in enum snps_c10_vspeo_index.

Use index of -1 as an indication of error case. Refer to it as C10_ERR.

1st VS/PE-O's table is used for external DP with modes below HBR2
(exclusive). 1st table is also used as a fallback for non-DPs. Refer to
it as C10_DP14_RBR_HBR.

2nd table is used for external DP with modes higher than HBR2
(inclusive). Refer to it as C10_DP14_HBR2_HBR3.

3rd table is used for eDP with modes lower than HBR3 (exclusive). Refer
to it as C10_EDP_NON_HBR3.

4th table is used for eDP with modes higher than HBR3 (inclusive). Refer
to it as C10_EDP_HBR3.

Indices for other tables have not yet been observed to be used as of
now.

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 12 ++++++------
 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h |  9 +++++++++
 2 files changed, 15 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index a9f1242e2bcf0..80ca9ca6b6471 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1786,28 +1786,28 @@ xe3plpd_get_lt_buf_trans(struct intel_encoder *encoder,
 		return intel_get_buf_trans(&xe3plpd_lt_trans_dp14, n_entries);
 }
 
-static int
+static enum snps_c10_vspeo_index
 snps_c10_compute_index(const struct intel_crtc_state *crtc_state)
 {
 	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
 		if (crtc_state->port_clock > 540000)
-			return 3;
+			return C10_EDP_HBR3;
 		else
-			return 2;
+			return C10_EDP_NON_HBR3;
 	}
 
 	if (intel_crtc_has_dp_encoder(crtc_state)) {
 		if (crtc_state->port_clock > 270000)
-			return 1;
+			return C10_DP14_HBR2_HBR3;
 		else
-			return 0;
+			return C10_DP14_RBR_HBR;
 	}
 
 	drm_WARN(to_intel_display(crtc_state)->drm, 1,
 		 "non-DP (%d) encoder asks to compute VS/PE-O index\n",
 		 crtc_state->output_types);
 
-	return -EINVAL;
+	return C10_ERR;
 }
 
 static enum snps_c20_vspeo_index
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index e182fbe9590c5..a8c998fa339e6 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -98,6 +98,15 @@ enum snps_c20_vspeo_index {
 	C20_DP20
 };
 
+enum snps_c10_vspeo_index {
+	C10_ERR = -1,
+
+	C10_DP14_RBR_HBR = 0,
+	C10_DP14_HBR2_HBR3,
+	C10_EDP_NON_HBR3,
+	C10_EDP_HBR3
+};
+
 bool is_hobl_buf_trans(const struct intel_ddi_buf_trans *table);
 
 void intel_ddi_buf_trans_init(struct intel_encoder *encoder);
-- 
2.45.2

[PATCH v3 25/31] drm/i915/bios: parse EHL's VS/PE-O tables

[Michał Grzelak]

EHL's VS/PE-O tables have more columns than icl_ddi_buf_trans contains
fields. This prevents casting block->tables to point at
icl_ddi_buf_trans and parsing it trivially.

Parse each entry from every table into kzalloc'd buffers' matrix. Read
number of tables and number of columns from the block. Assume that each
table contains 10 rows.

Inflate icl_ddi_buf_trans since each VBT-based value is stored on u32.
Reducing the size will be done in separate commit.

Add EHL to workaround for availability of VS/PE-O parsing.

v2->v3
- remove unnecessary braces from if block

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c     | 34 +++++++++++++++++++
 .../drm/i915/display/intel_ddi_buf_trans.h    | 10 +++---
 2 files changed, 39 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index c6a53319809ee..5e1000a72cf74 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2187,6 +2187,32 @@ parse_compression_parameters(struct intel_display *display)
 	}
 }
 
+static void
+parse_vswing_preemph_icl(union intel_ddi_buf_trans_entry **bufs_mtrx,
+			 const struct bdb_vswing_preemph *block)
+{
+	union intel_ddi_buf_trans_entry *entry;
+	const u32 *tables = block->tables;
+	u8 num_rows = 10;
+	size_t offset = 0;
+	const u32 *vals;
+
+	for (int idx = 0; idx < block->num_tables; idx++) {
+		for (int row = 0; row < num_rows; row++) {
+			vals = &tables[offset];
+
+			entry = &bufs_mtrx[idx][row];
+			entry->icl.dw2_swing_sel = vals[0];
+			entry->icl.dw7_n_scalar = vals[1];
+			entry->icl.dw4_cursor_coeff = vals[2];
+			entry->icl.dw4_post_cursor_2 = vals[3];
+			entry->icl.dw4_post_cursor_1 = vals[4];
+
+			offset += block->num_columns;
+		}
+	}
+}
+
 static void
 parse_vswing_preemph_snps(union intel_ddi_buf_trans_entry **bufs_mtrx,
 			  const struct bdb_vswing_preemph *block)
@@ -2262,6 +2288,11 @@ parse_vswing_preemph_override(struct intel_display *display)
 		parse_vswing_preemph_lt(bufs_mtrx, block);
 	} else if (DISPLAY_VER(display) >= 14) {
 		parse_vswing_preemph_snps(bufs_mtrx, block);
+	} else if (DISPLAY_VER(display) == 11) {
+		if (display->platform.elkhartlake)
+			parse_vswing_preemph_icl(bufs_mtrx, block);
+		else
+			drm_dbg_kms(display->drm, "VS/PE-O parsing not yet supported\n");
 	} else {
 		drm_dbg_kms(display->drm, "VS/PE-O parsing not yet supported\n");
 	}
@@ -2726,6 +2757,9 @@ static void override_vswing_preemph(struct intel_bios_encoder_data *devdata)
 		parseable = true;
 	} else if (DISPLAY_VER(display) >= 14) {
 		parseable = true;
+	} else if (DISPLAY_VER(display) == 11) {
+		if (display->platform.elkhartlake)
+			parseable = true;
 	}
 
 	if (!parseable)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index a8c998fa339e6..bfb6de45a94e2 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -25,11 +25,11 @@ struct bxt_ddi_buf_trans {
 };
 
 struct icl_ddi_buf_trans {
-	u8 dw2_swing_sel;
-	u8 dw7_n_scalar;
-	u8 dw4_cursor_coeff;
-	u8 dw4_post_cursor_2;
-	u8 dw4_post_cursor_1;
+	u32 dw2_swing_sel;
+	u32 dw7_n_scalar;
+	u32 dw4_cursor_coeff;
+	u32 dw4_post_cursor_2;
+	u32 dw4_post_cursor_1;
 };
 
 struct icl_mg_phy_ddi_buf_trans {
-- 
2.45.2

[PATCH v3 26/31] drm/i915/bios: shrink all ICL's VS/PE tables

[Michał Grzelak]

Each value present in ICL's VS/PE-O table is stored on u32. In order to
match values' size this causes icl_ddi_buf_trans to increase it's size.

Nevertheless, the actual value from each ICL's VS/PE-O table is fully
encoded in the lowest byte. Extract the lowest byte by casting to u8 and
using it as deparsed value. This way there is no need to inflate default
tables.

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c          | 10 +++++-----
 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h | 10 +++++-----
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 5e1000a72cf74..9138ec64b6b1c 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2202,11 +2202,11 @@ parse_vswing_preemph_icl(union intel_ddi_buf_trans_entry **bufs_mtrx,
 			vals = &tables[offset];
 
 			entry = &bufs_mtrx[idx][row];
-			entry->icl.dw2_swing_sel = vals[0];
-			entry->icl.dw7_n_scalar = vals[1];
-			entry->icl.dw4_cursor_coeff = vals[2];
-			entry->icl.dw4_post_cursor_2 = vals[3];
-			entry->icl.dw4_post_cursor_1 = vals[4];
+			entry->icl.dw2_swing_sel = (u8) vals[0];
+			entry->icl.dw7_n_scalar = (u8) vals[1];
+			entry->icl.dw4_cursor_coeff = (u8) vals[2];
+			entry->icl.dw4_post_cursor_2 = (u8) vals[3];
+			entry->icl.dw4_post_cursor_1 = (u8) vals[4];
 
 			offset += block->num_columns;
 		}
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index bfb6de45a94e2..a8c998fa339e6 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -25,11 +25,11 @@ struct bxt_ddi_buf_trans {
 };
 
 struct icl_ddi_buf_trans {
-	u32 dw2_swing_sel;
-	u32 dw7_n_scalar;
-	u32 dw4_cursor_coeff;
-	u32 dw4_post_cursor_2;
-	u32 dw4_post_cursor_1;
+	u8 dw2_swing_sel;
+	u8 dw7_n_scalar;
+	u8 dw4_cursor_coeff;
+	u8 dw4_post_cursor_2;
+	u8 dw4_post_cursor_1;
 };
 
 struct icl_mg_phy_ddi_buf_trans {
-- 
2.45.2

[PATCH v3 27/31] drm/i915/buf_trans: compute EHL's VS/PE-O index

[Michał Grzelak]

Compute the most appropriate VS/PE-O index for EHL.

In cases when eDP encoder uses low vswing, choose 3rd table if encoder
supports HBR3. Otherwise use 2nd table for eDP using low vswing.

In cases when eDP encoder does not use low vswing, choose 2nd table if
encoder supports mode higher or including HBR2. Otherwise use 3rd table
for eDP not using low vswing.

For external DP use 2nd table if encoder supports modes higher than or
including HBR2. Use 1st table if external DP encoder supports modes
lower than HBR2.

Warn if encoder does not support DP. In that case fallback to using
default VS/PE tables.

Looking from other OSes, in case when encoder does not support DP we
could theoretically use 1st table. However, as of now, use default
tables until it will be explicitly seen in the wild.

v2->v3
- remove unnecessary braces from if block
- return -EINVAL instead of -1 (Suraj)

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 .../drm/i915/display/intel_ddi_buf_trans.c    | 30 +++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 80ca9ca6b6471..36ba0ed4ddc68 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1786,6 +1786,33 @@ xe3plpd_get_lt_buf_trans(struct intel_encoder *encoder,
 		return intel_get_buf_trans(&xe3plpd_lt_trans_dp14, n_entries);
 }
 
+static int
+ehl_compute_index(struct intel_encoder *encoder,
+		  const struct intel_crtc_state *crtc_state)
+{
+	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
+		if (use_edp_low_vswing(encoder)) {
+			if (crtc_state->port_clock > 540000)
+				return 2;
+			else
+				return 1;
+		}
+	}
+
+	if (intel_crtc_has_dp_encoder(crtc_state)) {
+		if (crtc_state->port_clock > 270000)
+			return 1;
+		else
+			return 0;
+	}
+
+	drm_WARN(to_intel_display(crtc_state)->drm, 1,
+		 "non-DP (%d) encoder asks to compute VS/PE-O index\n",
+		 crtc_state->output_types);
+
+	return -EINVAL;
+}
+
 static enum snps_c10_vspeo_index
 snps_c10_compute_index(const struct intel_crtc_state *crtc_state)
 {
@@ -1857,6 +1884,9 @@ vspeo_compute_index(struct intel_encoder *encoder,
 			return snps_c10_compute_index(crtc_state);
 		else
 			return snps_c20_compute_index(crtc_state);
+	} else if (DISPLAY_VER(display) == 11) {
+		if (display->platform.elkhartlake)
+			return ehl_compute_index(encoder, crtc_state);
 	}
 
 	drm_dbg_kms(display->drm,
-- 
2.45.2

[PATCH v3 28/31] drm/i915/buf_trans: enumerate EHL's VS/PE-O indices

[Michał Grzelak]

Encapsulate EHL's VS/PE-O's indices in enum ehl_vspeo_index.

Use index of -1 as an indication of error case. Refer to it as EHL_ERR.

1st VS/PE-O's table is used for external DP with modes below HBR2
(exclusive). With same supported modes, it is also used for eDP that
does not use low vswing. 1st table is also used as a fallback for
non-DPs. Refer to it as EHL_DP_HBR.

2nd table is used for external DP with modes above HBR2 (inclusive).
With same supported modes, it is also used for eDP that does not use low
vswing. Refer to it as EHL_EDP_HBR2.

3rd table is used for eDP supporting HBR3 and using low vswing. Refer to
it as EHL_EDP_HBR3.

Indices for other tables have not yet been observed to be used as of
now.

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 12 ++++++------
 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h |  8 ++++++++
 2 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 36ba0ed4ddc68..067ab47c00883 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1786,31 +1786,31 @@ xe3plpd_get_lt_buf_trans(struct intel_encoder *encoder,
 		return intel_get_buf_trans(&xe3plpd_lt_trans_dp14, n_entries);
 }
 
-static int
+static enum ehl_vspeo_index
 ehl_compute_index(struct intel_encoder *encoder,
 		  const struct intel_crtc_state *crtc_state)
 {
 	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
 		if (use_edp_low_vswing(encoder)) {
 			if (crtc_state->port_clock > 540000)
-				return 2;
+				return EHL_COMBO_EDP_HBR3;
 			else
-				return 1;
+				return EHL_COMBO_EDP_HBR2;
 		}
 	}
 
 	if (intel_crtc_has_dp_encoder(crtc_state)) {
 		if (crtc_state->port_clock > 270000)
-			return 1;
+			return EHL_COMBO_EDP_HBR2;
 		else
-			return 0;
+			return EHL_COMBO_DP_HBR;
 	}
 
 	drm_WARN(to_intel_display(crtc_state)->drm, 1,
 		 "non-DP (%d) encoder asks to compute VS/PE-O index\n",
 		 crtc_state->output_types);
 
-	return -EINVAL;
+	return EHL_ERR;
 }
 
 static enum snps_c10_vspeo_index
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index a8c998fa339e6..aa2a47445af76 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -107,6 +107,14 @@ enum snps_c10_vspeo_index {
 	C10_EDP_HBR3
 };
 
+enum ehl_vspeo_index {
+	EHL_ERR = -1,
+
+	EHL_COMBO_DP_HBR = 0,
+	EHL_COMBO_EDP_HBR2,
+	EHL_COMBO_EDP_HBR3
+};
+
 bool is_hobl_buf_trans(const struct intel_ddi_buf_trans *table);
 
 void intel_ddi_buf_trans_init(struct intel_encoder *encoder);
-- 
2.45.2

[PATCH v3 29/31] drm/i915/bios: parse JSL's VS/PE-O tables

[Michał Grzelak]

JSL's VS/PE-O tables' layout is identical to EHL's. Parse it same way.

Add JSL to workaround for availability of VS/PE-O parsing.

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 9138ec64b6b1c..22bbc659e24e3 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2289,10 +2289,12 @@ parse_vswing_preemph_override(struct intel_display *display)
 	} else if (DISPLAY_VER(display) >= 14) {
 		parse_vswing_preemph_snps(bufs_mtrx, block);
 	} else if (DISPLAY_VER(display) == 11) {
-		if (display->platform.elkhartlake)
+		if (display->platform.elkhartlake ||
+		    display->platform.jasperlake) {
 			parse_vswing_preemph_icl(bufs_mtrx, block);
-		else
+		} else {
 			drm_dbg_kms(display->drm, "VS/PE-O parsing not yet supported\n");
+		}
 	} else {
 		drm_dbg_kms(display->drm, "VS/PE-O parsing not yet supported\n");
 	}
@@ -2758,8 +2760,10 @@ static void override_vswing_preemph(struct intel_bios_encoder_data *devdata)
 	} else if (DISPLAY_VER(display) >= 14) {
 		parseable = true;
 	} else if (DISPLAY_VER(display) == 11) {
-		if (display->platform.elkhartlake)
+		if (display->platform.elkhartlake ||
+		    display->platform.jasperlake) {
 			parseable = true;
+		}
 	}
 
 	if (!parseable)
-- 
2.45.2

[PATCH v3 30/31] drm/i915/buf_trans: compute JSL's VS/PE-O index

[Michał Grzelak]

Compute the most appropriate VS/PE-O index for JSL.

For external DP always use 1st table.

For eDPs not using low vswing use 1st table as well.

In cases when eDP encoder uses low vswing, choose 1st table if encoder
supports HBR3. When encoder supports HBR2 choose 3rd table. When
encoder supports modes lower than HBR2 choose 2nd table.

Warn if encoder does not support DP. In that case fallback to using
default VS/PE tables.

Looking from other OSes, in case when encoder does not support DP we
could theoretically use 1st table. However, as of now, use default
tables until it will be explicitly seen in the wild.

v2->v3
- return -EINVAL instead of -1 (Suraj)

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 .../drm/i915/display/intel_ddi_buf_trans.c    | 30 ++++++++++++++++++-
 1 file changed, 29 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 067ab47c00883..a38e74aaca1f7 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1786,6 +1786,31 @@ xe3plpd_get_lt_buf_trans(struct intel_encoder *encoder,
 		return intel_get_buf_trans(&xe3plpd_lt_trans_dp14, n_entries);
 }
 
+static int
+jsl_compute_index(struct intel_encoder *encoder,
+		  const struct intel_crtc_state *crtc_state)
+{
+	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
+		if (use_edp_low_vswing(encoder)) {
+			if (crtc_state->port_clock > 540000)
+				return 0;
+			else if (crtc_state->port_clock > 270000)
+				return 2;
+			else
+				return 1;
+		}
+	}
+
+	if (intel_crtc_has_dp_encoder(crtc_state))
+		return 0;
+
+	drm_WARN(to_intel_display(crtc_state)->drm, 1,
+		 "non-DP (%d) encoder asks to compute VS/PE-O index\n",
+		 crtc_state->output_types);
+
+	return -EINVAL;
+}
+
 static enum ehl_vspeo_index
 ehl_compute_index(struct intel_encoder *encoder,
 		  const struct intel_crtc_state *crtc_state)
@@ -1885,8 +1910,11 @@ vspeo_compute_index(struct intel_encoder *encoder,
 		else
 			return snps_c20_compute_index(crtc_state);
 	} else if (DISPLAY_VER(display) == 11) {
-		if (display->platform.elkhartlake)
+		if (display->platform.elkhartlake) {
 			return ehl_compute_index(encoder, crtc_state);
+		} else if (display->platform.jasperlake) {
+			return jsl_compute_index(encoder, crtc_state);
+		}
 	}
 
 	drm_dbg_kms(display->drm,
-- 
2.45.2

[PATCH v3 31/31] drm/i915/buf_trans: enumerate JSL's VS/PE-O indices

[Michał Grzelak]

Encapsulate JSL's VS/PE-O's indices in enum jsl_vspeo_index.

Use index of -1 as an indication of error case. Refer to it as JSL_ERR.

1st VS/PE-O's table is used for external DP. Use it also if eDP does not
use low vswing. Use it as well when eDP uses low vswing but supports
HBR3. Refer to it as JSL_COMBO_DP_DEF.

2nd table is used for eDP using low vswing and supporting HBR2. Refer to
it as JSL_COMBO_EDP_HBR2.

3rd table is used for eDP using low vswing and supporting modes lower
than HBR2. Refer to it as JSL_COMBO_EDP_HBR.

Indices for other tables have not yet been observed to be used as of
now.

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 12 ++++++------
 drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h |  8 ++++++++
 2 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index a38e74aaca1f7..57923044cfe3d 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1786,29 +1786,29 @@ xe3plpd_get_lt_buf_trans(struct intel_encoder *encoder,
 		return intel_get_buf_trans(&xe3plpd_lt_trans_dp14, n_entries);
 }
 
-static int
+static enum jsl_vspeo_index
 jsl_compute_index(struct intel_encoder *encoder,
 		  const struct intel_crtc_state *crtc_state)
 {
 	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
 		if (use_edp_low_vswing(encoder)) {
 			if (crtc_state->port_clock > 540000)
-				return 0;
+				return JSL_COMBO_DP_DEF;
 			else if (crtc_state->port_clock > 270000)
-				return 2;
+				return JSL_COMBO_EDP_HBR2;
 			else
-				return 1;
+				return JSL_COMBO_EDP_HBR;
 		}
 	}
 
 	if (intel_crtc_has_dp_encoder(crtc_state))
-		return 0;
+		return JSL_COMBO_DP_DEF;
 
 	drm_WARN(to_intel_display(crtc_state)->drm, 1,
 		 "non-DP (%d) encoder asks to compute VS/PE-O index\n",
 		 crtc_state->output_types);
 
-	return -EINVAL;
+	return JSL_ERR;
 }
 
 static enum ehl_vspeo_index
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index aa2a47445af76..f2706ab53f6de 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -115,6 +115,14 @@ enum ehl_vspeo_index {
 	EHL_COMBO_EDP_HBR3
 };
 
+enum jsl_vspeo_index {
+	JSL_ERR = -1,
+
+	JSL_COMBO_DP_DEF = 0,
+	JSL_COMBO_EDP_HBR,
+	JSL_COMBO_EDP_HBR2
+};
+
 bool is_hobl_buf_trans(const struct intel_ddi_buf_trans *table);
 
 void intel_ddi_buf_trans_init(struct intel_encoder *encoder);
-- 
2.45.2

✗ CI.checkpatch: warning for Vswing/Preemphasis Override (rev2)

[Patchwork]

== Series Details ==

Series: Vswing/Preemphasis Override (rev2)
URL   : https://patchwork.freedesktop.org/series/164959/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 754b36fba08360f4e560f247296fadd43983f5ba
Author: Michał Grzelak <michal.grzelak@intel.com>
Date:   Thu May 7 03:31:37 2026 +0200

    drm/i915/buf_trans: enumerate JSL's VS/PE-O indices
    
    Encapsulate JSL's VS/PE-O's indices in enum jsl_vspeo_index.
    
    Use index of -1 as an indication of error case. Refer to it as JSL_ERR.
    
    1st VS/PE-O's table is used for external DP. Use it also if eDP does not
    use low vswing. Use it as well when eDP uses low vswing but supports
    HBR3. Refer to it as JSL_COMBO_DP_DEF.
    
    2nd table is used for eDP using low vswing and supporting HBR2. Refer to
    it as JSL_COMBO_EDP_HBR2.
    
    3rd table is used for eDP using low vswing and supporting modes lower
    than HBR2. Refer to it as JSL_COMBO_EDP_HBR.
    
    Indices for other tables have not yet been observed to be used as of
    now.
    
    Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
+ /mt/dim checkpatch ad7a1f718b8cb631948c94f74dd48cd2867d99fb drm-intel
dfdbe27e6eda drm/i915/buf_trans: align xe3plpd with VS/PE-O layout
264e61792a85 drm/i915/bios: search for VBT #57 by default
7b05824bfd44 drm/i915/bios: log unsupported VS/PE-O parsing
0a573a4bcc5e drm/i915/bios: store VBT #57's metadata in intel_vbt_data
a2807548a44d drm/i915/bios: de/allocate VS/PE-O buffers' matrix
86f2ce7e07bd drm/i915/bios: structurize VS/PE-O metadata
02457c971d27 drm/i915/bios: add buf_trans for each bios_encoder
1e2dc720cb1b drm/i915/bios: de/allocate buf_trans for each port
927009044644 drm/i915/bios: check VS/PE-O in helper func
9e8a70e7bd95 drm/i915/bios: print VS/PE-O port info
98dc0741bfa3 drm/i915/bios: remove VS/PE-O warning
a26730cc80a1 drm/i915/ddi: expose VS/PE-O buffers to intel_encoder
ef5b29c07cc6 drm/i915/buf_trans: override VS/PE-O when requested
ba3f981f079a drm/i915/buf_trans: abstract VS/PE-O index computation
0db38eac01ba drm/i915/bios: parse LT's VS/PE-O tables
d52b40ba51e0 drm/i915/bios: shrink all LT's VS/PE tables
-:31: CHECK:SPACING: No space is necessary after a cast
#31: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2205:
+			entry->lt.main_cursor = (u8) vals[0];

-:32: CHECK:SPACING: No space is necessary after a cast
#32: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2206:
+			entry->lt.pre_cursor = (u8) vals[1];

-:33: CHECK:SPACING: No space is necessary after a cast
#33: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2207:
+			entry->lt.post_cursor = (u8) vals[2];

total: 0 errors, 0 warnings, 3 checks, 28 lines checked
255c87b259e1 drm/i915/buf_trans: compute LT's VS/PE-O index
-:79: CHECK:SPACING: No space is necessary after a cast
#79: FILE: drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c:1898:
+	buf_trans = (void *) encoder->vspeo;

total: 0 errors, 0 warnings, 1 checks, 57 lines checked
67c5f3fcaecc drm/i915/buf_trans: enumerate LT's VS/PE-O indices
19f54e5c7cc7 drm/i915/bios: parse Snps's VS/PE-O tables
-:72: WARNING:BRACES: braces {} are not necessary for any arm of this statement
#72: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2261:
+	if (HAS_LT_PHY(display)) {
[...]
-	else
[...]
+		parse_vswing_preemph_snps(bufs_mtrx, block);
[...]

-:88: WARNING:BRACES: braces {} are not necessary for any arm of this statement
#88: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2725:
+	if (HAS_LT_PHY(display)) {
[...]
+	} else if (DISPLAY_VER(display) >= 14) {
[...]

total: 0 errors, 2 warnings, 0 checks, 69 lines checked
1b1ac83753e6 drm/i915/bios: shrink all Snps's VS/PE tables
-:31: CHECK:SPACING: No space is necessary after a cast
#31: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2205:
+			entry->snps.vswing = (u8) vals[0];

-:32: CHECK:SPACING: No space is necessary after a cast
#32: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2206:
+			entry->snps.pre_cursor = (u8) vals[1];

-:33: CHECK:SPACING: No space is necessary after a cast
#33: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2207:
+			entry->snps.post_cursor = (u8) vals[2];

total: 0 errors, 0 warnings, 3 checks, 24 lines checked
ad6231f2a2ce drm/i915/buf_trans: compute C20's VS/PE-O index
32b243cec191 drm/i915/buf_trans: enumerate C20's VS/PE-O indices
8ef96a837d64 drm/i915/buf_trans: compute C10's VS/PE-O index
f806eb23fd46 drm/i915/buf_trans: enumerate C10's VS/PE-O indices
c0a5fdc7cf1c drm/i915/bios: parse EHL's VS/PE-O tables
aad3d2d93897 drm/i915/bios: shrink all ICL's VS/PE tables
-:32: CHECK:SPACING: No space is necessary after a cast
#32: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2205:
+			entry->icl.dw2_swing_sel = (u8) vals[0];

-:33: CHECK:SPACING: No space is necessary after a cast
#33: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2206:
+			entry->icl.dw7_n_scalar = (u8) vals[1];

-:34: CHECK:SPACING: No space is necessary after a cast
#34: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2207:
+			entry->icl.dw4_cursor_coeff = (u8) vals[2];

-:35: CHECK:SPACING: No space is necessary after a cast
#35: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2208:
+			entry->icl.dw4_post_cursor_2 = (u8) vals[3];

-:36: CHECK:SPACING: No space is necessary after a cast
#36: FILE: drivers/gpu/drm/i915/display/intel_bios.c:2209:
+			entry->icl.dw4_post_cursor_1 = (u8) vals[4];

total: 0 errors, 0 warnings, 5 checks, 32 lines checked
340f371e0e6d drm/i915/buf_trans: compute EHL's VS/PE-O index
52e70a3e3dbf drm/i915/buf_trans: enumerate EHL's VS/PE-O indices
b4217a24335a drm/i915/bios: parse JSL's VS/PE-O tables
556ed51417d5 drm/i915/buf_trans: compute JSL's VS/PE-O index
754b36fba083 drm/i915/buf_trans: enumerate JSL's VS/PE-O indices

✓ CI.KUnit: success for Vswing/Preemphasis Override (rev2)

[Patchwork]

== Series Details ==

Series: Vswing/Preemphasis Override (rev2)
URL   : https://patchwork.freedesktop.org/series/164959/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[01:47:44] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[01:47:48] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[01:48:20] Starting KUnit Kernel (1/1)...
[01:48:20] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[01:48:20] ================== guc_buf (11 subtests) ===================
[01:48:20] [PASSED] test_smallest
[01:48:20] [PASSED] test_largest
[01:48:20] [PASSED] test_granular
[01:48:20] [PASSED] test_unique
[01:48:20] [PASSED] test_overlap
[01:48:20] [PASSED] test_reusable
[01:48:20] [PASSED] test_too_big
[01:48:20] [PASSED] test_flush
[01:48:20] [PASSED] test_lookup
[01:48:20] [PASSED] test_data
[01:48:20] [PASSED] test_class
[01:48:20] ===================== [PASSED] guc_buf =====================
[01:48:20] =================== guc_dbm (7 subtests) ===================
[01:48:20] [PASSED] test_empty
[01:48:20] [PASSED] test_default
[01:48:20] ======================== test_size  ========================
[01:48:20] [PASSED] 4
[01:48:20] [PASSED] 8
[01:48:20] [PASSED] 32
[01:48:20] [PASSED] 256
[01:48:20] ==================== [PASSED] test_size ====================
[01:48:20] ======================= test_reuse  ========================
[01:48:20] [PASSED] 4
[01:48:20] [PASSED] 8
[01:48:20] [PASSED] 32
[01:48:20] [PASSED] 256
[01:48:20] =================== [PASSED] test_reuse ====================
[01:48:20] =================== test_range_overlap  ====================
[01:48:20] [PASSED] 4
[01:48:20] [PASSED] 8
[01:48:20] [PASSED] 32
[01:48:20] [PASSED] 256
[01:48:20] =============== [PASSED] test_range_overlap ================
[01:48:20] =================== test_range_compact  ====================
[01:48:20] [PASSED] 4
[01:48:20] [PASSED] 8
[01:48:20] [PASSED] 32
[01:48:20] [PASSED] 256
[01:48:20] =============== [PASSED] test_range_compact ================
[01:48:20] ==================== test_range_spare  =====================
[01:48:20] [PASSED] 4
[01:48:20] [PASSED] 8
[01:48:20] [PASSED] 32
[01:48:20] [PASSED] 256
[01:48:20] ================ [PASSED] test_range_spare =================
[01:48:20] ===================== [PASSED] guc_dbm =====================
[01:48:20] =================== guc_idm (6 subtests) ===================
[01:48:20] [PASSED] bad_init
[01:48:20] [PASSED] no_init
[01:48:20] [PASSED] init_fini
[01:48:20] [PASSED] check_used
[01:48:20] [PASSED] check_quota
[01:48:20] [PASSED] check_all
[01:48:20] ===================== [PASSED] guc_idm =====================
[01:48:20] ================== no_relay (3 subtests) ===================
[01:48:20] [PASSED] xe_drops_guc2pf_if_not_ready
[01:48:20] [PASSED] xe_drops_guc2vf_if_not_ready
[01:48:20] [PASSED] xe_rejects_send_if_not_ready
[01:48:20] ==================== [PASSED] no_relay =====================
[01:48:20] ================== pf_relay (14 subtests) ==================
[01:48:20] [PASSED] pf_rejects_guc2pf_too_short
[01:48:20] [PASSED] pf_rejects_guc2pf_too_long
[01:48:20] [PASSED] pf_rejects_guc2pf_no_payload
[01:48:20] [PASSED] pf_fails_no_payload
[01:48:20] [PASSED] pf_fails_bad_origin
[01:48:20] [PASSED] pf_fails_bad_type
[01:48:20] [PASSED] pf_txn_reports_error
[01:48:20] [PASSED] pf_txn_sends_pf2guc
[01:48:20] [PASSED] pf_sends_pf2guc
[01:48:20] [SKIPPED] pf_loopback_nop
[01:48:20] [SKIPPED] pf_loopback_echo
[01:48:20] [SKIPPED] pf_loopback_fail
[01:48:20] [SKIPPED] pf_loopback_busy
[01:48:20] [SKIPPED] pf_loopback_retry
[01:48:20] ==================== [PASSED] pf_relay =====================
[01:48:20] ================== vf_relay (3 subtests) ===================
[01:48:20] [PASSED] vf_rejects_guc2vf_too_short
[01:48:20] [PASSED] vf_rejects_guc2vf_too_long
[01:48:20] [PASSED] vf_rejects_guc2vf_no_payload
[01:48:20] ==================== [PASSED] vf_relay =====================
[01:48:20] ================ pf_gt_config (9 subtests) =================
[01:48:20] [PASSED] fair_contexts_1vf
[01:48:20] [PASSED] fair_doorbells_1vf
[01:48:20] [PASSED] fair_ggtt_1vf
[01:48:20] ====================== fair_vram_1vf  ======================
[01:48:20] [PASSED] 3.50 GiB
[01:48:20] [PASSED] 11.5 GiB
[01:48:20] [PASSED] 15.5 GiB
[01:48:20] [PASSED] 31.5 GiB
[01:48:20] [PASSED] 63.5 GiB
[01:48:20] [PASSED] 1.91 GiB
[01:48:20] ================== [PASSED] fair_vram_1vf ==================
[01:48:20] ================ fair_vram_1vf_admin_only  =================
[01:48:20] [PASSED] 3.50 GiB
[01:48:20] [PASSED] 11.5 GiB
[01:48:20] [PASSED] 15.5 GiB
[01:48:20] [PASSED] 31.5 GiB
[01:48:20] [PASSED] 63.5 GiB
[01:48:20] [PASSED] 1.91 GiB
[01:48:20] ============ [PASSED] fair_vram_1vf_admin_only =============
[01:48:20] ====================== fair_contexts  ======================
[01:48:20] [PASSED] 1 VF
[01:48:20] [PASSED] 2 VFs
[01:48:20] [PASSED] 3 VFs
[01:48:20] [PASSED] 4 VFs
[01:48:20] [PASSED] 5 VFs
[01:48:20] [PASSED] 6 VFs
[01:48:20] [PASSED] 7 VFs
[01:48:20] [PASSED] 8 VFs
[01:48:20] [PASSED] 9 VFs
[01:48:20] [PASSED] 10 VFs
[01:48:20] [PASSED] 11 VFs
[01:48:20] [PASSED] 12 VFs
[01:48:20] [PASSED] 13 VFs
[01:48:20] [PASSED] 14 VFs
[01:48:20] [PASSED] 15 VFs
[01:48:20] [PASSED] 16 VFs
[01:48:20] [PASSED] 17 VFs
[01:48:20] [PASSED] 18 VFs
[01:48:20] [PASSED] 19 VFs
[01:48:20] [PASSED] 20 VFs
[01:48:20] [PASSED] 21 VFs
[01:48:20] [PASSED] 22 VFs
[01:48:20] [PASSED] 23 VFs
[01:48:20] [PASSED] 24 VFs
[01:48:20] [PASSED] 25 VFs
[01:48:20] [PASSED] 26 VFs
[01:48:20] [PASSED] 27 VFs
[01:48:20] [PASSED] 28 VFs
[01:48:20] [PASSED] 29 VFs
[01:48:20] [PASSED] 30 VFs
[01:48:20] [PASSED] 31 VFs
[01:48:20] [PASSED] 32 VFs
[01:48:20] [PASSED] 33 VFs
[01:48:20] [PASSED] 34 VFs
[01:48:20] [PASSED] 35 VFs
[01:48:20] [PASSED] 36 VFs
[01:48:20] [PASSED] 37 VFs
[01:48:20] [PASSED] 38 VFs
[01:48:20] [PASSED] 39 VFs
[01:48:20] [PASSED] 40 VFs
[01:48:20] [PASSED] 41 VFs
[01:48:20] [PASSED] 42 VFs
[01:48:20] [PASSED] 43 VFs
[01:48:20] [PASSED] 44 VFs
[01:48:20] [PASSED] 45 VFs
[01:48:20] [PASSED] 46 VFs
[01:48:20] [PASSED] 47 VFs
[01:48:20] [PASSED] 48 VFs
[01:48:20] [PASSED] 49 VFs
[01:48:20] [PASSED] 50 VFs
[01:48:20] [PASSED] 51 VFs
[01:48:20] [PASSED] 52 VFs
[01:48:20] [PASSED] 53 VFs
[01:48:20] [PASSED] 54 VFs
[01:48:20] [PASSED] 55 VFs
[01:48:20] [PASSED] 56 VFs
[01:48:20] [PASSED] 57 VFs
[01:48:20] [PASSED] 58 VFs
[01:48:20] [PASSED] 59 VFs
[01:48:20] [PASSED] 60 VFs
[01:48:20] [PASSED] 61 VFs
[01:48:20] [PASSED] 62 VFs
[01:48:20] [PASSED] 63 VFs
[01:48:20] ================== [PASSED] fair_contexts ==================
[01:48:20] ===================== fair_doorbells  ======================
[01:48:20] [PASSED] 1 VF
[01:48:20] [PASSED] 2 VFs
[01:48:20] [PASSED] 3 VFs
[01:48:20] [PASSED] 4 VFs
[01:48:20] [PASSED] 5 VFs
[01:48:20] [PASSED] 6 VFs
[01:48:20] [PASSED] 7 VFs
[01:48:20] [PASSED] 8 VFs
[01:48:20] [PASSED] 9 VFs
[01:48:20] [PASSED] 10 VFs
[01:48:20] [PASSED] 11 VFs
[01:48:20] [PASSED] 12 VFs
[01:48:20] [PASSED] 13 VFs
[01:48:20] [PASSED] 14 VFs
[01:48:20] [PASSED] 15 VFs
[01:48:20] [PASSED] 16 VFs
[01:48:20] [PASSED] 17 VFs
[01:48:20] [PASSED] 18 VFs
[01:48:20] [PASSED] 19 VFs
[01:48:20] [PASSED] 20 VFs
[01:48:20] [PASSED] 21 VFs
[01:48:20] [PASSED] 22 VFs
[01:48:20] [PASSED] 23 VFs
[01:48:20] [PASSED] 24 VFs
[01:48:20] [PASSED] 25 VFs
[01:48:20] [PASSED] 26 VFs
[01:48:20] [PASSED] 27 VFs
[01:48:20] [PASSED] 28 VFs
[01:48:20] [PASSED] 29 VFs
[01:48:20] [PASSED] 30 VFs
[01:48:20] [PASSED] 31 VFs
[01:48:20] [PASSED] 32 VFs
[01:48:20] [PASSED] 33 VFs
[01:48:20] [PASSED] 34 VFs
[01:48:20] [PASSED] 35 VFs
[01:48:20] [PASSED] 36 VFs
[01:48:20] [PASSED] 37 VFs
[01:48:20] [PASSED] 38 VFs
[01:48:20] [PASSED] 39 VFs
[01:48:20] [PASSED] 40 VFs
[01:48:20] [PASSED] 41 VFs
[01:48:20] [PASSED] 42 VFs
[01:48:20] [PASSED] 43 VFs
[01:48:20] [PASSED] 44 VFs
[01:48:20] [PASSED] 45 VFs
[01:48:20] [PASSED] 46 VFs
[01:48:20] [PASSED] 47 VFs
[01:48:20] [PASSED] 48 VFs
[01:48:20] [PASSED] 49 VFs
[01:48:20] [PASSED] 50 VFs
[01:48:20] [PASSED] 51 VFs
[01:48:20] [PASSED] 52 VFs
[01:48:20] [PASSED] 53 VFs
[01:48:20] [PASSED] 54 VFs
[01:48:20] [PASSED] 55 VFs
[01:48:20] [PASSED] 56 VFs
[01:48:20] [PASSED] 57 VFs
[01:48:20] [PASSED] 58 VFs
[01:48:20] [PASSED] 59 VFs
[01:48:20] [PASSED] 60 VFs
[01:48:20] [PASSED] 61 VFs
[01:48:20] [PASSED] 62 VFs
[01:48:20] [PASSED] 63 VFs
[01:48:20] ================= [PASSED] fair_doorbells ==================
[01:48:20] ======================== fair_ggtt  ========================
[01:48:20] [PASSED] 1 VF
[01:48:20] [PASSED] 2 VFs
[01:48:20] [PASSED] 3 VFs
[01:48:20] [PASSED] 4 VFs
[01:48:20] [PASSED] 5 VFs
[01:48:20] [PASSED] 6 VFs
[01:48:20] [PASSED] 7 VFs
[01:48:20] [PASSED] 8 VFs
[01:48:20] [PASSED] 9 VFs
[01:48:20] [PASSED] 10 VFs
[01:48:20] [PASSED] 11 VFs
[01:48:20] [PASSED] 12 VFs
[01:48:20] [PASSED] 13 VFs
[01:48:20] [PASSED] 14 VFs
[01:48:20] [PASSED] 15 VFs
[01:48:20] [PASSED] 16 VFs
[01:48:20] [PASSED] 17 VFs
[01:48:20] [PASSED] 18 VFs
[01:48:20] [PASSED] 19 VFs
[01:48:20] [PASSED] 20 VFs
[01:48:20] [PASSED] 21 VFs
[01:48:20] [PASSED] 22 VFs
[01:48:20] [PASSED] 23 VFs
[01:48:20] [PASSED] 24 VFs
[01:48:20] [PASSED] 25 VFs
[01:48:20] [PASSED] 26 VFs
[01:48:20] [PASSED] 27 VFs
[01:48:20] [PASSED] 28 VFs
[01:48:20] [PASSED] 29 VFs
[01:48:20] [PASSED] 30 VFs
[01:48:20] [PASSED] 31 VFs
[01:48:20] [PASSED] 32 VFs
[01:48:20] [PASSED] 33 VFs
[01:48:20] [PASSED] 34 VFs
[01:48:20] [PASSED] 35 VFs
[01:48:20] [PASSED] 36 VFs
[01:48:20] [PASSED] 37 VFs
[01:48:20] [PASSED] 38 VFs
[01:48:20] [PASSED] 39 VFs
[01:48:20] [PASSED] 40 VFs
[01:48:20] [PASSED] 41 VFs
[01:48:20] [PASSED] 42 VFs
[01:48:20] [PASSED] 43 VFs
[01:48:20] [PASSED] 44 VFs
[01:48:20] [PASSED] 45 VFs
[01:48:20] [PASSED] 46 VFs
[01:48:20] [PASSED] 47 VFs
[01:48:20] [PASSED] 48 VFs
[01:48:20] [PASSED] 49 VFs
[01:48:20] [PASSED] 50 VFs
[01:48:20] [PASSED] 51 VFs
[01:48:20] [PASSED] 52 VFs
[01:48:20] [PASSED] 53 VFs
[01:48:20] [PASSED] 54 VFs
[01:48:20] [PASSED] 55 VFs
[01:48:20] [PASSED] 56 VFs
[01:48:20] [PASSED] 57 VFs
[01:48:20] [PASSED] 58 VFs
[01:48:20] [PASSED] 59 VFs
[01:48:20] [PASSED] 60 VFs
[01:48:20] [PASSED] 61 VFs
[01:48:20] [PASSED] 62 VFs
[01:48:20] [PASSED] 63 VFs
[01:48:20] ==================== [PASSED] fair_ggtt ====================
[01:48:20] ======================== fair_vram  ========================
[01:48:20] [PASSED] 1 VF
[01:48:20] [PASSED] 2 VFs
[01:48:20] [PASSED] 3 VFs
[01:48:20] [PASSED] 4 VFs
[01:48:20] [PASSED] 5 VFs
[01:48:20] [PASSED] 6 VFs
[01:48:20] [PASSED] 7 VFs
[01:48:20] [PASSED] 8 VFs
[01:48:20] [PASSED] 9 VFs
[01:48:20] [PASSED] 10 VFs
[01:48:20] [PASSED] 11 VFs
[01:48:20] [PASSED] 12 VFs
[01:48:20] [PASSED] 13 VFs
[01:48:20] [PASSED] 14 VFs
[01:48:20] [PASSED] 15 VFs
[01:48:20] [PASSED] 16 VFs
[01:48:20] [PASSED] 17 VFs
[01:48:20] [PASSED] 18 VFs
[01:48:20] [PASSED] 19 VFs
[01:48:20] [PASSED] 20 VFs
[01:48:20] [PASSED] 21 VFs
[01:48:20] [PASSED] 22 VFs
[01:48:20] [PASSED] 23 VFs
[01:48:20] [PASSED] 24 VFs
[01:48:20] [PASSED] 25 VFs
[01:48:20] [PASSED] 26 VFs
[01:48:20] [PASSED] 27 VFs
[01:48:20] [PASSED] 28 VFs
[01:48:20] [PASSED] 29 VFs
[01:48:20] [PASSED] 30 VFs
[01:48:20] [PASSED] 31 VFs
[01:48:20] [PASSED] 32 VFs
[01:48:20] [PASSED] 33 VFs
[01:48:20] [PASSED] 34 VFs
[01:48:20] [PASSED] 35 VFs
[01:48:20] [PASSED] 36 VFs
[01:48:20] [PASSED] 37 VFs
[01:48:20] [PASSED] 38 VFs
[01:48:20] [PASSED] 39 VFs
[01:48:20] [PASSED] 40 VFs
[01:48:20] [PASSED] 41 VFs
[01:48:20] [PASSED] 42 VFs
[01:48:20] [PASSED] 43 VFs
[01:48:20] [PASSED] 44 VFs
[01:48:20] [PASSED] 45 VFs
[01:48:20] [PASSED] 46 VFs
[01:48:20] [PASSED] 47 VFs
[01:48:20] [PASSED] 48 VFs
[01:48:20] [PASSED] 49 VFs
[01:48:20] [PASSED] 50 VFs
[01:48:20] [PASSED] 51 VFs
[01:48:20] [PASSED] 52 VFs
[01:48:20] [PASSED] 53 VFs
[01:48:20] [PASSED] 54 VFs
[01:48:20] [PASSED] 55 VFs
[01:48:20] [PASSED] 56 VFs
[01:48:20] [PASSED] 57 VFs
[01:48:20] [PASSED] 58 VFs
[01:48:20] [PASSED] 59 VFs
[01:48:20] [PASSED] 60 VFs
[01:48:20] [PASSED] 61 VFs
[01:48:20] [PASSED] 62 VFs
[01:48:20] [PASSED] 63 VFs
[01:48:20] ==================== [PASSED] fair_vram ====================
[01:48:20] ================== [PASSED] pf_gt_config ===================
[01:48:20] ===================== lmtt (1 subtest) =====================
[01:48:20] ======================== test_ops  =========================
[01:48:20] [PASSED] 2-level
[01:48:20] [PASSED] multi-level
[01:48:20] ==================== [PASSED] test_ops =====================
[01:48:20] ====================== [PASSED] lmtt =======================
[01:48:20] ================= pf_service (11 subtests) =================
[01:48:20] [PASSED] pf_negotiate_any
[01:48:20] [PASSED] pf_negotiate_base_match
[01:48:20] [PASSED] pf_negotiate_base_newer
[01:48:20] [PASSED] pf_negotiate_base_next
[01:48:20] [SKIPPED] pf_negotiate_base_older
[01:48:20] [PASSED] pf_negotiate_base_prev
[01:48:20] [PASSED] pf_negotiate_latest_match
[01:48:20] [PASSED] pf_negotiate_latest_newer
[01:48:20] [PASSED] pf_negotiate_latest_next
[01:48:20] [SKIPPED] pf_negotiate_latest_older
[01:48:20] [SKIPPED] pf_negotiate_latest_prev
[01:48:20] =================== [PASSED] pf_service ====================
[01:48:20] ================= xe_guc_g2g (2 subtests) ==================
[01:48:20] ============== xe_live_guc_g2g_kunit_default  ==============
[01:48:20] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[01:48:20] ============== xe_live_guc_g2g_kunit_allmem  ===============
[01:48:20] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[01:48:20] =================== [SKIPPED] xe_guc_g2g ===================
[01:48:20] =================== xe_mocs (2 subtests) ===================
[01:48:20] ================ xe_live_mocs_kernel_kunit  ================
[01:48:20] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[01:48:20] ================ xe_live_mocs_reset_kunit  =================
[01:48:20] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[01:48:20] ==================== [SKIPPED] xe_mocs =====================
[01:48:20] ================= xe_migrate (2 subtests) ==================
[01:48:20] ================= xe_migrate_sanity_kunit  =================
[01:48:20] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[01:48:20] ================== xe_validate_ccs_kunit  ==================
[01:48:20] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[01:48:20] =================== [SKIPPED] xe_migrate ===================
[01:48:20] ================== xe_dma_buf (1 subtest) ==================
[01:48:20] ==================== xe_dma_buf_kunit  =====================
[01:48:20] ================ [SKIPPED] xe_dma_buf_kunit ================
[01:48:20] =================== [SKIPPED] xe_dma_buf ===================
[01:48:20] ================= xe_bo_shrink (1 subtest) =================
[01:48:20] =================== xe_bo_shrink_kunit  ====================
[01:48:20] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[01:48:20] ================== [SKIPPED] xe_bo_shrink ==================
[01:48:20] ==================== xe_bo (2 subtests) ====================
[01:48:20] ================== xe_ccs_migrate_kunit  ===================
[01:48:20] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[01:48:20] ==================== xe_bo_evict_kunit  ====================
[01:48:20] =============== [SKIPPED] xe_bo_evict_kunit ================
[01:48:20] ===================== [SKIPPED] xe_bo ======================
[01:48:20] ==================== args (13 subtests) ====================
[01:48:20] [PASSED] count_args_test
[01:48:20] [PASSED] call_args_example
[01:48:20] [PASSED] call_args_test
[01:48:20] [PASSED] drop_first_arg_example
[01:48:20] [PASSED] drop_first_arg_test
[01:48:20] [PASSED] first_arg_example
[01:48:20] [PASSED] first_arg_test
[01:48:20] [PASSED] last_arg_example
[01:48:20] [PASSED] last_arg_test
[01:48:20] [PASSED] pick_arg_example
[01:48:20] [PASSED] if_args_example
[01:48:20] [PASSED] if_args_test
[01:48:20] [PASSED] sep_comma_example
[01:48:20] ====================== [PASSED] args =======================
[01:48:20] =================== xe_pci (3 subtests) ====================
[01:48:20] ==================== check_graphics_ip  ====================
[01:48:20] [PASSED] 12.00 Xe_LP
[01:48:20] [PASSED] 12.10 Xe_LP+
[01:48:20] [PASSED] 12.55 Xe_HPG
[01:48:20] [PASSED] 12.60 Xe_HPC
[01:48:20] [PASSED] 12.70 Xe_LPG
[01:48:20] [PASSED] 12.71 Xe_LPG
[01:48:20] [PASSED] 12.74 Xe_LPG+
[01:48:20] [PASSED] 20.01 Xe2_HPG
[01:48:20] [PASSED] 20.02 Xe2_HPG
[01:48:20] [PASSED] 20.04 Xe2_LPG
[01:48:20] [PASSED] 30.00 Xe3_LPG
[01:48:20] [PASSED] 30.01 Xe3_LPG
[01:48:20] [PASSED] 30.03 Xe3_LPG
[01:48:20] [PASSED] 30.04 Xe3_LPG
[01:48:20] [PASSED] 30.05 Xe3_LPG
[01:48:20] [PASSED] 35.10 Xe3p_LPG
[01:48:20] [PASSED] 35.11 Xe3p_XPC
[01:48:20] ================ [PASSED] check_graphics_ip ================
[01:48:20] ===================== check_media_ip  ======================
[01:48:20] [PASSED] 12.00 Xe_M
[01:48:20] [PASSED] 12.55 Xe_HPM
[01:48:20] [PASSED] 13.00 Xe_LPM+
[01:48:20] [PASSED] 13.01 Xe2_HPM
[01:48:20] [PASSED] 20.00 Xe2_LPM
[01:48:20] [PASSED] 30.00 Xe3_LPM
[01:48:20] [PASSED] 30.02 Xe3_LPM
[01:48:20] [PASSED] 35.00 Xe3p_LPM
[01:48:20] [PASSED] 35.03 Xe3p_HPM
[01:48:20] ================= [PASSED] check_media_ip ==================
[01:48:20] =================== check_platform_desc  ===================
[01:48:20] [PASSED] 0x9A60 (TIGERLAKE)
[01:48:20] [PASSED] 0x9A68 (TIGERLAKE)
[01:48:20] [PASSED] 0x9A70 (TIGERLAKE)
[01:48:20] [PASSED] 0x9A40 (TIGERLAKE)
[01:48:20] [PASSED] 0x9A49 (TIGERLAKE)
[01:48:20] [PASSED] 0x9A59 (TIGERLAKE)
[01:48:20] [PASSED] 0x9A78 (TIGERLAKE)
[01:48:20] [PASSED] 0x9AC0 (TIGERLAKE)
[01:48:20] [PASSED] 0x9AC9 (TIGERLAKE)
[01:48:20] [PASSED] 0x9AD9 (TIGERLAKE)
[01:48:20] [PASSED] 0x9AF8 (TIGERLAKE)
[01:48:20] [PASSED] 0x4C80 (ROCKETLAKE)
[01:48:20] [PASSED] 0x4C8A (ROCKETLAKE)
[01:48:20] [PASSED] 0x4C8B (ROCKETLAKE)
[01:48:20] [PASSED] 0x4C8C (ROCKETLAKE)
[01:48:20] [PASSED] 0x4C90 (ROCKETLAKE)
[01:48:20] [PASSED] 0x4C9A (ROCKETLAKE)
[01:48:20] [PASSED] 0x4680 (ALDERLAKE_S)
[01:48:20] [PASSED] 0x4682 (ALDERLAKE_S)
[01:48:20] [PASSED] 0x4688 (ALDERLAKE_S)
[01:48:20] [PASSED] 0x468A (ALDERLAKE_S)
[01:48:20] [PASSED] 0x468B (ALDERLAKE_S)
[01:48:20] [PASSED] 0x4690 (ALDERLAKE_S)
[01:48:20] [PASSED] 0x4692 (ALDERLAKE_S)
[01:48:20] [PASSED] 0x4693 (ALDERLAKE_S)
[01:48:20] [PASSED] 0x46A0 (ALDERLAKE_P)
[01:48:20] [PASSED] 0x46A1 (ALDERLAKE_P)
[01:48:20] [PASSED] 0x46A2 (ALDERLAKE_P)
[01:48:20] [PASSED] 0x46A3 (ALDERLAKE_P)
[01:48:20] [PASSED] 0x46A6 (ALDERLAKE_P)
[01:48:20] [PASSED] 0x46A8 (ALDERLAKE_P)
[01:48:20] [PASSED] 0x46AA (ALDERLAKE_P)
[01:48:20] [PASSED] 0x462A (ALDERLAKE_P)
[01:48:20] [PASSED] 0x4626 (ALDERLAKE_P)
[01:48:20] [PASSED] 0x4628 (ALDERLAKE_P)
[01:48:20] [PASSED] 0x46B0 (ALDERLAKE_P)
[01:48:20] [PASSED] 0x46B1 (ALDERLAKE_P)
[01:48:20] [PASSED] 0x46B2 (ALDERLAKE_P)
[01:48:20] [PASSED] 0x46B3 (ALDERLAKE_P)
[01:48:20] [PASSED] 0x46C0 (ALDERLAKE_P)
[01:48:20] [PASSED] 0x46C1 (ALDERLAKE_P)
[01:48:20] [PASSED] 0x46C2 (ALDERLAKE_P)
[01:48:20] [PASSED] 0x46C3 (ALDERLAKE_P)
[01:48:20] [PASSED] 0x46D0 (ALDERLAKE_N)
[01:48:20] [PASSED] 0x46D1 (ALDERLAKE_N)
[01:48:20] [PASSED] 0x46D2 (ALDERLAKE_N)
[01:48:20] [PASSED] 0x46D3 (ALDERLAKE_N)
[01:48:20] [PASSED] 0x46D4 (ALDERLAKE_N)
[01:48:20] [PASSED] 0xA721 (ALDERLAKE_P)
[01:48:20] [PASSED] 0xA7A1 (ALDERLAKE_P)
[01:48:20] [PASSED] 0xA7A9 (ALDERLAKE_P)
[01:48:20] [PASSED] 0xA7AC (ALDERLAKE_P)
[01:48:20] [PASSED] 0xA7AD (ALDERLAKE_P)
[01:48:20] [PASSED] 0xA720 (ALDERLAKE_P)
[01:48:20] [PASSED] 0xA7A0 (ALDERLAKE_P)
[01:48:20] [PASSED] 0xA7A8 (ALDERLAKE_P)
[01:48:20] [PASSED] 0xA7AA (ALDERLAKE_P)
[01:48:20] [PASSED] 0xA7AB (ALDERLAKE_P)
[01:48:20] [PASSED] 0xA780 (ALDERLAKE_S)
[01:48:20] [PASSED] 0xA781 (ALDERLAKE_S)
[01:48:20] [PASSED] 0xA782 (ALDERLAKE_S)
[01:48:20] [PASSED] 0xA783 (ALDERLAKE_S)
[01:48:20] [PASSED] 0xA788 (ALDERLAKE_S)
[01:48:20] [PASSED] 0xA789 (ALDERLAKE_S)
[01:48:20] [PASSED] 0xA78A (ALDERLAKE_S)
[01:48:20] [PASSED] 0xA78B (ALDERLAKE_S)
[01:48:20] [PASSED] 0x4905 (DG1)
[01:48:20] [PASSED] 0x4906 (DG1)
[01:48:20] [PASSED] 0x4907 (DG1)
[01:48:20] [PASSED] 0x4908 (DG1)
[01:48:20] [PASSED] 0x4909 (DG1)
[01:48:20] [PASSED] 0x56C0 (DG2)
[01:48:20] [PASSED] 0x56C2 (DG2)
[01:48:20] [PASSED] 0x56C1 (DG2)
[01:48:20] [PASSED] 0x7D51 (METEORLAKE)
[01:48:20] [PASSED] 0x7DD1 (METEORLAKE)
[01:48:20] [PASSED] 0x7D41 (METEORLAKE)
[01:48:20] [PASSED] 0x7D67 (METEORLAKE)
[01:48:20] [PASSED] 0xB640 (METEORLAKE)
[01:48:20] [PASSED] 0x56A0 (DG2)
[01:48:20] [PASSED] 0x56A1 (DG2)
[01:48:20] [PASSED] 0x56A2 (DG2)
[01:48:20] [PASSED] 0x56BE (DG2)
[01:48:20] [PASSED] 0x56BF (DG2)
[01:48:20] [PASSED] 0x5690 (DG2)
[01:48:20] [PASSED] 0x5691 (DG2)
[01:48:20] [PASSED] 0x5692 (DG2)
[01:48:20] [PASSED] 0x56A5 (DG2)
[01:48:20] [PASSED] 0x56A6 (DG2)
[01:48:20] [PASSED] 0x56B0 (DG2)
[01:48:20] [PASSED] 0x56B1 (DG2)
[01:48:20] [PASSED] 0x56BA (DG2)
[01:48:20] [PASSED] 0x56BB (DG2)
[01:48:20] [PASSED] 0x56BC (DG2)
[01:48:20] [PASSED] 0x56BD (DG2)
[01:48:20] [PASSED] 0x5693 (DG2)
[01:48:20] [PASSED] 0x5694 (DG2)
[01:48:20] [PASSED] 0x5695 (DG2)
[01:48:20] [PASSED] 0x56A3 (DG2)
[01:48:20] [PASSED] 0x56A4 (DG2)
[01:48:20] [PASSED] 0x56B2 (DG2)
[01:48:20] [PASSED] 0x56B3 (DG2)
[01:48:20] [PASSED] 0x5696 (DG2)
[01:48:20] [PASSED] 0x5697 (DG2)
[01:48:20] [PASSED] 0xB69 (PVC)
[01:48:20] [PASSED] 0xB6E (PVC)
[01:48:20] [PASSED] 0xBD4 (PVC)
[01:48:20] [PASSED] 0xBD5 (PVC)
[01:48:20] [PASSED] 0xBD6 (PVC)
[01:48:20] [PASSED] 0xBD7 (PVC)
[01:48:20] [PASSED] 0xBD8 (PVC)
[01:48:20] [PASSED] 0xBD9 (PVC)
[01:48:20] [PASSED] 0xBDA (PVC)
[01:48:20] [PASSED] 0xBDB (PVC)
[01:48:20] [PASSED] 0xBE0 (PVC)
[01:48:20] [PASSED] 0xBE1 (PVC)
[01:48:20] [PASSED] 0xBE5 (PVC)
[01:48:20] [PASSED] 0x7D40 (METEORLAKE)
[01:48:20] [PASSED] 0x7D45 (METEORLAKE)
[01:48:20] [PASSED] 0x7D55 (METEORLAKE)
[01:48:20] [PASSED] 0x7D60 (METEORLAKE)
[01:48:20] [PASSED] 0x7DD5 (METEORLAKE)
[01:48:20] [PASSED] 0x6420 (LUNARLAKE)
[01:48:20] [PASSED] 0x64A0 (LUNARLAKE)
[01:48:20] [PASSED] 0x64B0 (LUNARLAKE)
[01:48:20] [PASSED] 0xE202 (BATTLEMAGE)
[01:48:20] [PASSED] 0xE209 (BATTLEMAGE)
[01:48:20] [PASSED] 0xE20B (BATTLEMAGE)
[01:48:20] [PASSED] 0xE20C (BATTLEMAGE)
[01:48:20] [PASSED] 0xE20D (BATTLEMAGE)
[01:48:20] [PASSED] 0xE210 (BATTLEMAGE)
[01:48:20] [PASSED] 0xE211 (BATTLEMAGE)
[01:48:20] [PASSED] 0xE212 (BATTLEMAGE)
[01:48:20] [PASSED] 0xE216 (BATTLEMAGE)
[01:48:20] [PASSED] 0xE220 (BATTLEMAGE)
[01:48:20] [PASSED] 0xE221 (BATTLEMAGE)
[01:48:20] [PASSED] 0xE222 (BATTLEMAGE)
[01:48:20] [PASSED] 0xE223 (BATTLEMAGE)
[01:48:20] [PASSED] 0xB080 (PANTHERLAKE)
[01:48:20] [PASSED] 0xB081 (PANTHERLAKE)
[01:48:20] [PASSED] 0xB082 (PANTHERLAKE)
[01:48:20] [PASSED] 0xB083 (PANTHERLAKE)
[01:48:20] [PASSED] 0xB084 (PANTHERLAKE)
[01:48:20] [PASSED] 0xB085 (PANTHERLAKE)
[01:48:20] [PASSED] 0xB086 (PANTHERLAKE)
[01:48:20] [PASSED] 0xB087 (PANTHERLAKE)
[01:48:20] [PASSED] 0xB08F (PANTHERLAKE)
[01:48:20] [PASSED] 0xB090 (PANTHERLAKE)
[01:48:20] [PASSED] 0xB0A0 (PANTHERLAKE)
[01:48:20] [PASSED] 0xB0B0 (PANTHERLAKE)
[01:48:20] [PASSED] 0xFD80 (PANTHERLAKE)
[01:48:20] [PASSED] 0xFD81 (PANTHERLAKE)
[01:48:20] [PASSED] 0xD740 (NOVALAKE_S)
[01:48:20] [PASSED] 0xD741 (NOVALAKE_S)
[01:48:20] [PASSED] 0xD742 (NOVALAKE_S)
[01:48:20] [PASSED] 0xD743 (NOVALAKE_S)
[01:48:20] [PASSED] 0xD744 (NOVALAKE_S)
[01:48:20] [PASSED] 0xD745 (NOVALAKE_S)
[01:48:20] [PASSED] 0x674C (CRESCENTISLAND)
[01:48:20] [PASSED] 0x674D (CRESCENTISLAND)
[01:48:20] [PASSED] 0x674E (CRESCENTISLAND)
[01:48:20] [PASSED] 0x674F (CRESCENTISLAND)
[01:48:20] [PASSED] 0x6750 (CRESCENTISLAND)
[01:48:20] [PASSED] 0xD750 (NOVALAKE_P)
[01:48:20] [PASSED] 0xD751 (NOVALAKE_P)
[01:48:20] [PASSED] 0xD752 (NOVALAKE_P)
[01:48:20] [PASSED] 0xD753 (NOVALAKE_P)
[01:48:20] [PASSED] 0xD754 (NOVALAKE_P)
[01:48:20] [PASSED] 0xD755 (NOVALAKE_P)
[01:48:20] [PASSED] 0xD756 (NOVALAKE_P)
[01:48:20] [PASSED] 0xD757 (NOVALAKE_P)
[01:48:20] [PASSED] 0xD75F (NOVALAKE_P)
[01:48:20] =============== [PASSED] check_platform_desc ===============
[01:48:20] ===================== [PASSED] xe_pci ======================
[01:48:20] =================== xe_rtp (2 subtests) ====================
[01:48:20] =============== xe_rtp_process_to_sr_tests  ================
[01:48:20] [PASSED] coalesce-same-reg
[01:48:20] [PASSED] no-match-no-add
[01:48:20] [PASSED] match-or
[01:48:20] [PASSED] match-or-xfail
[01:48:20] [PASSED] no-match-no-add-multiple-rules
[01:48:20] [PASSED] two-regs-two-entries
[01:48:20] [PASSED] clr-one-set-other
[01:48:20] [PASSED] set-field
[01:48:20] [PASSED] conflict-duplicate
[01:48:20] [PASSED] conflict-not-disjoint
[01:48:20] [PASSED] conflict-reg-type
[01:48:20] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[01:48:20] ================== xe_rtp_process_tests  ===================
[01:48:20] [PASSED] active1
[01:48:20] [PASSED] active2
[01:48:20] [PASSED] active-inactive
[01:48:20] [PASSED] inactive-active
[01:48:20] [PASSED] inactive-1st_or_active-inactive
[01:48:20] [PASSED] inactive-2nd_or_active-inactive
[01:48:20] [PASSED] inactive-last_or_active-inactive
[01:48:20] [PASSED] inactive-no_or_active-inactive
[01:48:20] ============== [PASSED] xe_rtp_process_tests ===============
[01:48:20] ===================== [PASSED] xe_rtp ======================
[01:48:20] ==================== xe_wa (1 subtest) =====================
[01:48:20] ======================== xe_wa_gt  =========================
[01:48:20] [PASSED] TIGERLAKE B0
[01:48:20] [PASSED] DG1 A0
[01:48:20] [PASSED] DG1 B0
[01:48:20] [PASSED] ALDERLAKE_S A0
[01:48:20] [PASSED] ALDERLAKE_S B0
[01:48:20] [PASSED] ALDERLAKE_S C0
[01:48:20] [PASSED] ALDERLAKE_S D0
[01:48:20] [PASSED] ALDERLAKE_P A0
[01:48:20] [PASSED] ALDERLAKE_P B0
[01:48:20] [PASSED] ALDERLAKE_P C0
[01:48:20] [PASSED] ALDERLAKE_S RPLS D0
[01:48:20] [PASSED] ALDERLAKE_P RPLU E0
[01:48:20] [PASSED] DG2 G10 C0
[01:48:20] [PASSED] DG2 G11 B1
[01:48:20] [PASSED] DG2 G12 A1
[01:48:20] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[01:48:20] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[01:48:20] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[01:48:20] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[01:48:20] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[01:48:20] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[01:48:20] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[01:48:20] ==================== [PASSED] xe_wa_gt =====================
[01:48:20] ====================== [PASSED] xe_wa ======================
[01:48:20] ============================================================
[01:48:20] Testing complete. Ran 601 tests: passed: 583, skipped: 18
[01:48:20] Elapsed time: 36.199s total, 4.257s configuring, 31.321s building, 0.615s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[01:48:21] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[01:48:22] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[01:48:47] Starting KUnit Kernel (1/1)...
[01:48:47] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[01:48:47] ============ drm_test_pick_cmdline (2 subtests) ============
[01:48:47] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[01:48:47] =============== drm_test_pick_cmdline_named  ===============
[01:48:47] [PASSED] NTSC
[01:48:47] [PASSED] NTSC-J
[01:48:47] [PASSED] PAL
[01:48:47] [PASSED] PAL-M
[01:48:47] =========== [PASSED] drm_test_pick_cmdline_named ===========
[01:48:47] ============== [PASSED] drm_test_pick_cmdline ==============
[01:48:47] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[01:48:47] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[01:48:47] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[01:48:47] =========== drm_validate_clone_mode (2 subtests) ===========
[01:48:47] ============== drm_test_check_in_clone_mode  ===============
[01:48:47] [PASSED] in_clone_mode
[01:48:47] [PASSED] not_in_clone_mode
[01:48:47] ========== [PASSED] drm_test_check_in_clone_mode ===========
[01:48:47] =============== drm_test_check_valid_clones  ===============
[01:48:47] [PASSED] not_in_clone_mode
[01:48:47] [PASSED] valid_clone
[01:48:47] [PASSED] invalid_clone
[01:48:47] =========== [PASSED] drm_test_check_valid_clones ===========
[01:48:47] ============= [PASSED] drm_validate_clone_mode =============
[01:48:47] ============= drm_validate_modeset (1 subtest) =============
[01:48:47] [PASSED] drm_test_check_connector_changed_modeset
[01:48:47] ============== [PASSED] drm_validate_modeset ===============
[01:48:47] ====== drm_test_bridge_get_current_state (2 subtests) ======
[01:48:47] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[01:48:47] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[01:48:47] ======== [PASSED] drm_test_bridge_get_current_state ========
[01:48:47] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[01:48:47] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[01:48:47] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[01:48:47] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[01:48:47] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[01:48:47] ============== drm_bridge_alloc (2 subtests) ===============
[01:48:47] [PASSED] drm_test_drm_bridge_alloc_basic
[01:48:47] [PASSED] drm_test_drm_bridge_alloc_get_put
[01:48:47] ================ [PASSED] drm_bridge_alloc =================
[01:48:47] ============= drm_cmdline_parser (40 subtests) =============
[01:48:47] [PASSED] drm_test_cmdline_force_d_only
[01:48:47] [PASSED] drm_test_cmdline_force_D_only_dvi
[01:48:47] [PASSED] drm_test_cmdline_force_D_only_hdmi
[01:48:47] [PASSED] drm_test_cmdline_force_D_only_not_digital
[01:48:47] [PASSED] drm_test_cmdline_force_e_only
[01:48:47] [PASSED] drm_test_cmdline_res
[01:48:47] [PASSED] drm_test_cmdline_res_vesa
[01:48:47] [PASSED] drm_test_cmdline_res_vesa_rblank
[01:48:47] [PASSED] drm_test_cmdline_res_rblank
[01:48:47] [PASSED] drm_test_cmdline_res_bpp
[01:48:47] [PASSED] drm_test_cmdline_res_refresh
[01:48:47] [PASSED] drm_test_cmdline_res_bpp_refresh
[01:48:47] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[01:48:47] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[01:48:47] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[01:48:47] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[01:48:47] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[01:48:47] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[01:48:47] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[01:48:47] [PASSED] drm_test_cmdline_res_margins_force_on
[01:48:47] [PASSED] drm_test_cmdline_res_vesa_margins
[01:48:47] [PASSED] drm_test_cmdline_name
[01:48:47] [PASSED] drm_test_cmdline_name_bpp
[01:48:47] [PASSED] drm_test_cmdline_name_option
[01:48:47] [PASSED] drm_test_cmdline_name_bpp_option
[01:48:47] [PASSED] drm_test_cmdline_rotate_0
[01:48:47] [PASSED] drm_test_cmdline_rotate_90
[01:48:47] [PASSED] drm_test_cmdline_rotate_180
[01:48:47] [PASSED] drm_test_cmdline_rotate_270
[01:48:47] [PASSED] drm_test_cmdline_hmirror
[01:48:47] [PASSED] drm_test_cmdline_vmirror
[01:48:47] [PASSED] drm_test_cmdline_margin_options
[01:48:47] [PASSED] drm_test_cmdline_multiple_options
[01:48:47] [PASSED] drm_test_cmdline_bpp_extra_and_option
[01:48:47] [PASSED] drm_test_cmdline_extra_and_option
[01:48:47] [PASSED] drm_test_cmdline_freestanding_options
[01:48:47] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[01:48:47] [PASSED] drm_test_cmdline_panel_orientation
[01:48:47] ================ drm_test_cmdline_invalid  =================
[01:48:47] [PASSED] margin_only
[01:48:47] [PASSED] interlace_only
[01:48:47] [PASSED] res_missing_x
[01:48:47] [PASSED] res_missing_y
[01:48:47] [PASSED] res_bad_y
[01:48:47] [PASSED] res_missing_y_bpp
[01:48:47] [PASSED] res_bad_bpp
[01:48:47] [PASSED] res_bad_refresh
[01:48:47] [PASSED] res_bpp_refresh_force_on_off
[01:48:47] [PASSED] res_invalid_mode
[01:48:47] [PASSED] res_bpp_wrong_place_mode
[01:48:47] [PASSED] name_bpp_refresh
[01:48:47] [PASSED] name_refresh
[01:48:47] [PASSED] name_refresh_wrong_mode
[01:48:47] [PASSED] name_refresh_invalid_mode
[01:48:47] [PASSED] rotate_multiple
[01:48:47] [PASSED] rotate_invalid_val
[01:48:47] [PASSED] rotate_truncated
[01:48:47] [PASSED] invalid_option
[01:48:47] [PASSED] invalid_tv_option
[01:48:47] [PASSED] truncated_tv_option
[01:48:47] ============ [PASSED] drm_test_cmdline_invalid =============
[01:48:47] =============== drm_test_cmdline_tv_options  ===============
[01:48:47] [PASSED] NTSC
[01:48:47] [PASSED] NTSC_443
[01:48:47] [PASSED] NTSC_J
[01:48:47] [PASSED] PAL
[01:48:47] [PASSED] PAL_M
[01:48:47] [PASSED] PAL_N
[01:48:47] [PASSED] SECAM
[01:48:47] [PASSED] MONO_525
[01:48:47] [PASSED] MONO_625
[01:48:47] =========== [PASSED] drm_test_cmdline_tv_options ===========
[01:48:47] =============== [PASSED] drm_cmdline_parser ================
[01:48:47] ========== drmm_connector_hdmi_init (20 subtests) ==========
[01:48:47] [PASSED] drm_test_connector_hdmi_init_valid
[01:48:47] [PASSED] drm_test_connector_hdmi_init_bpc_8
[01:48:47] [PASSED] drm_test_connector_hdmi_init_bpc_10
[01:48:47] [PASSED] drm_test_connector_hdmi_init_bpc_12
[01:48:47] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[01:48:47] [PASSED] drm_test_connector_hdmi_init_bpc_null
[01:48:47] [PASSED] drm_test_connector_hdmi_init_formats_empty
[01:48:47] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[01:48:47] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[01:48:47] [PASSED] supported_formats=0x9 yuv420_allowed=1
[01:48:47] [PASSED] supported_formats=0x9 yuv420_allowed=0
[01:48:47] [PASSED] supported_formats=0x5 yuv420_allowed=1
[01:48:47] [PASSED] supported_formats=0x5 yuv420_allowed=0
[01:48:47] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[01:48:47] [PASSED] drm_test_connector_hdmi_init_null_ddc
[01:48:47] [PASSED] drm_test_connector_hdmi_init_null_product
[01:48:47] [PASSED] drm_test_connector_hdmi_init_null_vendor
[01:48:47] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[01:48:47] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[01:48:47] [PASSED] drm_test_connector_hdmi_init_product_valid
[01:48:47] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[01:48:47] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[01:48:47] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[01:48:47] ========= drm_test_connector_hdmi_init_type_valid  =========
[01:48:47] [PASSED] HDMI-A
[01:48:47] [PASSED] HDMI-B
[01:48:47] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[01:48:47] ======== drm_test_connector_hdmi_init_type_invalid  ========
[01:48:47] [PASSED] Unknown
[01:48:47] [PASSED] VGA
[01:48:47] [PASSED] DVI-I
[01:48:47] [PASSED] DVI-D
[01:48:47] [PASSED] DVI-A
[01:48:47] [PASSED] Composite
[01:48:47] [PASSED] SVIDEO
[01:48:47] [PASSED] LVDS
[01:48:47] [PASSED] Component
[01:48:47] [PASSED] DIN
[01:48:47] [PASSED] DP
[01:48:47] [PASSED] TV
[01:48:47] [PASSED] eDP
[01:48:47] [PASSED] Virtual
[01:48:47] [PASSED] DSI
[01:48:47] [PASSED] DPI
[01:48:47] [PASSED] Writeback
[01:48:47] [PASSED] SPI
[01:48:47] [PASSED] USB
[01:48:47] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[01:48:47] ============ [PASSED] drmm_connector_hdmi_init =============
[01:48:47] ============= drmm_connector_init (3 subtests) =============
[01:48:47] [PASSED] drm_test_drmm_connector_init
[01:48:47] [PASSED] drm_test_drmm_connector_init_null_ddc
[01:48:47] ========= drm_test_drmm_connector_init_type_valid  =========
[01:48:47] [PASSED] Unknown
[01:48:47] [PASSED] VGA
[01:48:47] [PASSED] DVI-I
[01:48:47] [PASSED] DVI-D
[01:48:47] [PASSED] DVI-A
[01:48:47] [PASSED] Composite
[01:48:47] [PASSED] SVIDEO
[01:48:47] [PASSED] LVDS
[01:48:47] [PASSED] Component
[01:48:47] [PASSED] DIN
[01:48:47] [PASSED] DP
[01:48:47] [PASSED] HDMI-A
[01:48:47] [PASSED] HDMI-B
[01:48:47] [PASSED] TV
[01:48:47] [PASSED] eDP
[01:48:47] [PASSED] Virtual
[01:48:47] [PASSED] DSI
[01:48:47] [PASSED] DPI
[01:48:47] [PASSED] Writeback
[01:48:47] [PASSED] SPI
[01:48:47] [PASSED] USB
[01:48:47] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[01:48:47] =============== [PASSED] drmm_connector_init ===============
[01:48:47] ========= drm_connector_dynamic_init (6 subtests) ==========
[01:48:47] [PASSED] drm_test_drm_connector_dynamic_init
[01:48:47] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[01:48:47] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[01:48:47] [PASSED] drm_test_drm_connector_dynamic_init_properties
[01:48:47] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[01:48:47] [PASSED] Unknown
[01:48:47] [PASSED] VGA
[01:48:47] [PASSED] DVI-I
[01:48:47] [PASSED] DVI-D
[01:48:47] [PASSED] DVI-A
[01:48:47] [PASSED] Composite
[01:48:47] [PASSED] SVIDEO
[01:48:47] [PASSED] LVDS
[01:48:47] [PASSED] Component
[01:48:47] [PASSED] DIN
[01:48:47] [PASSED] DP
[01:48:47] [PASSED] HDMI-A
[01:48:47] [PASSED] HDMI-B
[01:48:47] [PASSED] TV
[01:48:47] [PASSED] eDP
[01:48:47] [PASSED] Virtual
[01:48:47] [PASSED] DSI
[01:48:47] [PASSED] DPI
[01:48:47] [PASSED] Writeback
[01:48:47] [PASSED] SPI
[01:48:47] [PASSED] USB
[01:48:47] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[01:48:47] ======== drm_test_drm_connector_dynamic_init_name  =========
[01:48:47] [PASSED] Unknown
[01:48:47] [PASSED] VGA
[01:48:47] [PASSED] DVI-I
[01:48:47] [PASSED] DVI-D
[01:48:47] [PASSED] DVI-A
[01:48:47] [PASSED] Composite
[01:48:47] [PASSED] SVIDEO
[01:48:47] [PASSED] LVDS
[01:48:47] [PASSED] Component
[01:48:47] [PASSED] DIN
[01:48:47] [PASSED] DP
[01:48:47] [PASSED] HDMI-A
[01:48:47] [PASSED] HDMI-B
[01:48:47] [PASSED] TV
[01:48:47] [PASSED] eDP
[01:48:47] [PASSED] Virtual
[01:48:47] [PASSED] DSI
[01:48:47] [PASSED] DPI
[01:48:47] [PASSED] Writeback
[01:48:47] [PASSED] SPI
[01:48:47] [PASSED] USB
[01:48:47] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[01:48:47] =========== [PASSED] drm_connector_dynamic_init ============
[01:48:47] ==== drm_connector_dynamic_register_early (4 subtests) =====
[01:48:47] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[01:48:47] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[01:48:47] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[01:48:47] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[01:48:47] ====== [PASSED] drm_connector_dynamic_register_early =======
[01:48:47] ======= drm_connector_dynamic_register (7 subtests) ========
[01:48:47] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[01:48:47] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[01:48:47] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[01:48:47] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[01:48:47] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[01:48:47] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[01:48:47] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[01:48:47] ========= [PASSED] drm_connector_dynamic_register ==========
[01:48:47] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[01:48:47] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[01:48:47] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[01:48:47] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[01:48:47] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[01:48:47] ========== drm_test_get_tv_mode_from_name_valid  ===========
[01:48:47] [PASSED] NTSC
[01:48:47] [PASSED] NTSC-443
[01:48:47] [PASSED] NTSC-J
[01:48:47] [PASSED] PAL
[01:48:47] [PASSED] PAL-M
[01:48:47] [PASSED] PAL-N
[01:48:47] [PASSED] SECAM
[01:48:47] [PASSED] Mono
[01:48:47] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[01:48:47] [PASSED] drm_test_get_tv_mode_from_name_truncated
[01:48:47] ============ [PASSED] drm_get_tv_mode_from_name ============
[01:48:47] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[01:48:47] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[01:48:47] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[01:48:47] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[01:48:47] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[01:48:47] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[01:48:47] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[01:48:47] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[01:48:47] [PASSED] VIC 96
[01:48:47] [PASSED] VIC 97
[01:48:47] [PASSED] VIC 101
[01:48:47] [PASSED] VIC 102
[01:48:47] [PASSED] VIC 106
[01:48:47] [PASSED] VIC 107
[01:48:47] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[01:48:47] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[01:48:47] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[01:48:47] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[01:48:47] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[01:48:47] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[01:48:47] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[01:48:47] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[01:48:47] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[01:48:47] [PASSED] Automatic
[01:48:47] [PASSED] Full
[01:48:47] [PASSED] Limited 16:235
[01:48:47] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[01:48:47] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[01:48:47] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[01:48:47] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[01:48:47] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[01:48:47] [PASSED] RGB
[01:48:47] [PASSED] YUV 4:2:0
[01:48:47] [PASSED] YUV 4:2:2
[01:48:47] [PASSED] YUV 4:4:4
[01:48:47] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[01:48:47] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[01:48:47] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[01:48:47] ============= drm_damage_helper (21 subtests) ==============
[01:48:47] [PASSED] drm_test_damage_iter_no_damage
[01:48:47] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[01:48:47] [PASSED] drm_test_damage_iter_no_damage_src_moved
[01:48:47] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[01:48:47] [PASSED] drm_test_damage_iter_no_damage_not_visible
[01:48:47] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[01:48:47] [PASSED] drm_test_damage_iter_no_damage_no_fb
[01:48:47] [PASSED] drm_test_damage_iter_simple_damage
[01:48:47] [PASSED] drm_test_damage_iter_single_damage
[01:48:47] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[01:48:47] [PASSED] drm_test_damage_iter_single_damage_outside_src
[01:48:47] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[01:48:47] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[01:48:47] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[01:48:47] [PASSED] drm_test_damage_iter_single_damage_src_moved
[01:48:47] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[01:48:47] [PASSED] drm_test_damage_iter_damage
[01:48:47] [PASSED] drm_test_damage_iter_damage_one_intersect
[01:48:47] [PASSED] drm_test_damage_iter_damage_one_outside
[01:48:47] [PASSED] drm_test_damage_iter_damage_src_moved
[01:48:47] [PASSED] drm_test_damage_iter_damage_not_visible
[01:48:47] ================ [PASSED] drm_damage_helper ================
[01:48:47] ============== drm_dp_mst_helper (3 subtests) ==============
[01:48:47] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[01:48:47] [PASSED] Clock 154000 BPP 30 DSC disabled
[01:48:47] [PASSED] Clock 234000 BPP 30 DSC disabled
[01:48:47] [PASSED] Clock 297000 BPP 24 DSC disabled
[01:48:47] [PASSED] Clock 332880 BPP 24 DSC enabled
[01:48:47] [PASSED] Clock 324540 BPP 24 DSC enabled
[01:48:47] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[01:48:47] ============== drm_test_dp_mst_calc_pbn_div  ===============
[01:48:47] [PASSED] Link rate 2000000 lane count 4
[01:48:47] [PASSED] Link rate 2000000 lane count 2
[01:48:47] [PASSED] Link rate 2000000 lane count 1
[01:48:47] [PASSED] Link rate 1350000 lane count 4
[01:48:47] [PASSED] Link rate 1350000 lane count 2
[01:48:47] [PASSED] Link rate 1350000 lane count 1
[01:48:47] [PASSED] Link rate 1000000 lane count 4
[01:48:47] [PASSED] Link rate 1000000 lane count 2
[01:48:47] [PASSED] Link rate 1000000 lane count 1
[01:48:47] [PASSED] Link rate 810000 lane count 4
[01:48:47] [PASSED] Link rate 810000 lane count 2
[01:48:47] [PASSED] Link rate 810000 lane count 1
[01:48:47] [PASSED] Link rate 540000 lane count 4
[01:48:47] [PASSED] Link rate 540000 lane count 2
[01:48:47] [PASSED] Link rate 540000 lane count 1
[01:48:47] [PASSED] Link rate 270000 lane count 4
[01:48:47] [PASSED] Link rate 270000 lane count 2
[01:48:47] [PASSED] Link rate 270000 lane count 1
[01:48:47] [PASSED] Link rate 162000 lane count 4
[01:48:47] [PASSED] Link rate 162000 lane count 2
[01:48:47] [PASSED] Link rate 162000 lane count 1
[01:48:47] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[01:48:47] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[01:48:47] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[01:48:47] [PASSED] DP_POWER_UP_PHY with port number
[01:48:47] [PASSED] DP_POWER_DOWN_PHY with port number
[01:48:47] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[01:48:47] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[01:48:47] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[01:48:47] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[01:48:47] [PASSED] DP_QUERY_PAYLOAD with port number
[01:48:47] [PASSED] DP_QUERY_PAYLOAD with VCPI
[01:48:47] [PASSED] DP_REMOTE_DPCD_READ with port number
[01:48:47] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[01:48:47] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[01:48:47] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[01:48:47] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[01:48:47] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[01:48:47] [PASSED] DP_REMOTE_I2C_READ with port number
[01:48:47] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[01:48:47] [PASSED] DP_REMOTE_I2C_READ with transactions array
[01:48:47] [PASSED] DP_REMOTE_I2C_WRITE with port number
[01:48:47] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[01:48:47] [PASSED] DP_REMOTE_I2C_WRITE with data array
[01:48:47] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[01:48:47] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[01:48:47] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[01:48:47] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[01:48:47] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[01:48:47] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[01:48:47] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[01:48:47] ================ [PASSED] drm_dp_mst_helper ================
[01:48:47] ================== drm_exec (7 subtests) ===================
[01:48:47] [PASSED] sanitycheck
[01:48:47] [PASSED] test_lock
[01:48:47] [PASSED] test_lock_unlock
[01:48:47] [PASSED] test_duplicates
[01:48:47] [PASSED] test_prepare
[01:48:47] [PASSED] test_prepare_array
[01:48:47] [PASSED] test_multiple_loops
[01:48:47] ==================== [PASSED] drm_exec =====================
[01:48:47] =========== drm_format_helper_test (17 subtests) ===========
[01:48:47] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[01:48:47] [PASSED] single_pixel_source_buffer
[01:48:47] [PASSED] single_pixel_clip_rectangle
[01:48:47] [PASSED] well_known_colors
[01:48:47] [PASSED] destination_pitch
[01:48:47] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[01:48:47] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[01:48:47] [PASSED] single_pixel_source_buffer
[01:48:47] [PASSED] single_pixel_clip_rectangle
[01:48:47] [PASSED] well_known_colors
[01:48:47] [PASSED] destination_pitch
[01:48:47] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[01:48:47] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[01:48:47] [PASSED] single_pixel_source_buffer
[01:48:47] [PASSED] single_pixel_clip_rectangle
[01:48:47] [PASSED] well_known_colors
[01:48:47] [PASSED] destination_pitch
[01:48:47] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[01:48:47] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[01:48:47] [PASSED] single_pixel_source_buffer
[01:48:47] [PASSED] single_pixel_clip_rectangle
[01:48:47] [PASSED] well_known_colors
[01:48:47] [PASSED] destination_pitch
[01:48:47] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[01:48:47] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[01:48:47] [PASSED] single_pixel_source_buffer
[01:48:47] [PASSED] single_pixel_clip_rectangle
[01:48:47] [PASSED] well_known_colors
[01:48:47] [PASSED] destination_pitch
[01:48:47] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[01:48:47] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[01:48:47] [PASSED] single_pixel_source_buffer
[01:48:47] [PASSED] single_pixel_clip_rectangle
[01:48:47] [PASSED] well_known_colors
[01:48:47] [PASSED] destination_pitch
[01:48:47] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[01:48:47] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[01:48:47] [PASSED] single_pixel_source_buffer
[01:48:47] [PASSED] single_pixel_clip_rectangle
[01:48:47] [PASSED] well_known_colors
[01:48:47] [PASSED] destination_pitch
[01:48:47] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[01:48:47] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[01:48:47] [PASSED] single_pixel_source_buffer
[01:48:47] [PASSED] single_pixel_clip_rectangle
[01:48:47] [PASSED] well_known_colors
[01:48:47] [PASSED] destination_pitch
[01:48:47] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[01:48:47] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[01:48:47] [PASSED] single_pixel_source_buffer
[01:48:47] [PASSED] single_pixel_clip_rectangle
[01:48:47] [PASSED] well_known_colors
[01:48:47] [PASSED] destination_pitch
[01:48:47] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[01:48:47] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[01:48:47] [PASSED] single_pixel_source_buffer
[01:48:47] [PASSED] single_pixel_clip_rectangle
[01:48:47] [PASSED] well_known_colors
[01:48:47] [PASSED] destination_pitch
[01:48:47] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[01:48:47] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[01:48:47] [PASSED] single_pixel_source_buffer
[01:48:47] [PASSED] single_pixel_clip_rectangle
[01:48:47] [PASSED] well_known_colors
[01:48:47] [PASSED] destination_pitch
[01:48:47] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[01:48:47] ============== drm_test_fb_xrgb8888_to_mono  ===============
[01:48:47] [PASSED] single_pixel_source_buffer
[01:48:47] [PASSED] single_pixel_clip_rectangle
[01:48:47] [PASSED] well_known_colors
[01:48:47] [PASSED] destination_pitch
[01:48:47] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[01:48:47] ==================== drm_test_fb_swab  =====================
[01:48:47] [PASSED] single_pixel_source_buffer
[01:48:47] [PASSED] single_pixel_clip_rectangle
[01:48:47] [PASSED] well_known_colors
[01:48:47] [PASSED] destination_pitch
[01:48:47] ================ [PASSED] drm_test_fb_swab =================
[01:48:47] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[01:48:47] [PASSED] single_pixel_source_buffer
[01:48:47] [PASSED] single_pixel_clip_rectangle
[01:48:47] [PASSED] well_known_colors
[01:48:47] [PASSED] destination_pitch
[01:48:47] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[01:48:47] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[01:48:47] [PASSED] single_pixel_source_buffer
[01:48:47] [PASSED] single_pixel_clip_rectangle
[01:48:47] [PASSED] well_known_colors
[01:48:47] [PASSED] destination_pitch
[01:48:47] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[01:48:47] ================= drm_test_fb_clip_offset  =================
[01:48:47] [PASSED] pass through
[01:48:47] [PASSED] horizontal offset
[01:48:47] [PASSED] vertical offset
[01:48:47] [PASSED] horizontal and vertical offset
[01:48:47] [PASSED] horizontal offset (custom pitch)
[01:48:47] [PASSED] vertical offset (custom pitch)
[01:48:47] [PASSED] horizontal and vertical offset (custom pitch)
[01:48:47] ============= [PASSED] drm_test_fb_clip_offset =============
[01:48:47] =================== drm_test_fb_memcpy  ====================
[01:48:47] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[01:48:47] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[01:48:47] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[01:48:47] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[01:48:47] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[01:48:47] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[01:48:47] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[01:48:47] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[01:48:47] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[01:48:47] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[01:48:47] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[01:48:47] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[01:48:47] =============== [PASSED] drm_test_fb_memcpy ================
[01:48:47] ============= [PASSED] drm_format_helper_test ==============
[01:48:47] ================= drm_format (18 subtests) =================
[01:48:47] [PASSED] drm_test_format_block_width_invalid
[01:48:47] [PASSED] drm_test_format_block_width_one_plane
[01:48:47] [PASSED] drm_test_format_block_width_two_plane
[01:48:47] [PASSED] drm_test_format_block_width_three_plane
[01:48:47] [PASSED] drm_test_format_block_width_tiled
[01:48:47] [PASSED] drm_test_format_block_height_invalid
[01:48:47] [PASSED] drm_test_format_block_height_one_plane
[01:48:47] [PASSED] drm_test_format_block_height_two_plane
[01:48:47] [PASSED] drm_test_format_block_height_three_plane
[01:48:47] [PASSED] drm_test_format_block_height_tiled
[01:48:47] [PASSED] drm_test_format_min_pitch_invalid
[01:48:47] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[01:48:47] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[01:48:47] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[01:48:47] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[01:48:47] [PASSED] drm_test_format_min_pitch_two_plane
[01:48:47] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[01:48:47] [PASSED] drm_test_format_min_pitch_tiled
[01:48:47] =================== [PASSED] drm_format ====================
[01:48:47] ============== drm_framebuffer (10 subtests) ===============
[01:48:47] ========== drm_test_framebuffer_check_src_coords  ==========
[01:48:47] [PASSED] Success: source fits into fb
[01:48:47] [PASSED] Fail: overflowing fb with x-axis coordinate
[01:48:47] [PASSED] Fail: overflowing fb with y-axis coordinate
[01:48:47] [PASSED] Fail: overflowing fb with source width
[01:48:47] [PASSED] Fail: overflowing fb with source height
[01:48:47] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[01:48:47] [PASSED] drm_test_framebuffer_cleanup
[01:48:47] =============== drm_test_framebuffer_create  ===============
[01:48:47] [PASSED] ABGR8888 normal sizes
[01:48:47] [PASSED] ABGR8888 max sizes
[01:48:47] [PASSED] ABGR8888 pitch greater than min required
[01:48:47] [PASSED] ABGR8888 pitch less than min required
[01:48:47] [PASSED] ABGR8888 Invalid width
[01:48:47] [PASSED] ABGR8888 Invalid buffer handle
[01:48:47] [PASSED] No pixel format
[01:48:47] [PASSED] ABGR8888 Width 0
[01:48:47] [PASSED] ABGR8888 Height 0
[01:48:47] [PASSED] ABGR8888 Out of bound height * pitch combination
[01:48:47] [PASSED] ABGR8888 Large buffer offset
[01:48:47] [PASSED] ABGR8888 Buffer offset for inexistent plane
[01:48:47] [PASSED] ABGR8888 Invalid flag
[01:48:47] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[01:48:47] [PASSED] ABGR8888 Valid buffer modifier
[01:48:47] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[01:48:47] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[01:48:47] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[01:48:47] [PASSED] NV12 Normal sizes
[01:48:47] [PASSED] NV12 Max sizes
[01:48:47] [PASSED] NV12 Invalid pitch
[01:48:47] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[01:48:47] [PASSED] NV12 different  modifier per-plane
[01:48:47] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[01:48:47] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[01:48:47] [PASSED] NV12 Modifier for inexistent plane
[01:48:47] [PASSED] NV12 Handle for inexistent plane
[01:48:47] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[01:48:47] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[01:48:47] [PASSED] YVU420 Normal sizes
[01:48:47] [PASSED] YVU420 Max sizes
[01:48:47] [PASSED] YVU420 Invalid pitch
[01:48:47] [PASSED] YVU420 Different pitches
[01:48:47] [PASSED] YVU420 Different buffer offsets/pitches
[01:48:47] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[01:48:47] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[01:48:47] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[01:48:47] [PASSED] YVU420 Valid modifier
[01:48:47] [PASSED] YVU420 Different modifiers per plane
[01:48:47] [PASSED] YVU420 Modifier for inexistent plane
[01:48:47] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[01:48:47] [PASSED] X0L2 Normal sizes
[01:48:47] [PASSED] X0L2 Max sizes
[01:48:47] [PASSED] X0L2 Invalid pitch
[01:48:47] [PASSED] X0L2 Pitch greater than minimum required
[01:48:47] [PASSED] X0L2 Handle for inexistent plane
[01:48:47] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[01:48:47] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[01:48:47] [PASSED] X0L2 Valid modifier
[01:48:47] [PASSED] X0L2 Modifier for inexistent plane
[01:48:47] =========== [PASSED] drm_test_framebuffer_create ===========
[01:48:47] [PASSED] drm_test_framebuffer_free
[01:48:47] [PASSED] drm_test_framebuffer_init
[01:48:47] [PASSED] drm_test_framebuffer_init_bad_format
[01:48:47] [PASSED] drm_test_framebuffer_init_dev_mismatch
[01:48:47] [PASSED] drm_test_framebuffer_lookup
[01:48:47] [PASSED] drm_test_framebuffer_lookup_inexistent
[01:48:47] [PASSED] drm_test_framebuffer_modifiers_not_supported
[01:48:47] ================= [PASSED] drm_framebuffer =================
[01:48:47] ================ drm_gem_shmem (8 subtests) ================
[01:48:47] [PASSED] drm_gem_shmem_test_obj_create
[01:48:47] [PASSED] drm_gem_shmem_test_obj_create_private
[01:48:47] [PASSED] drm_gem_shmem_test_pin_pages
[01:48:47] [PASSED] drm_gem_shmem_test_vmap
[01:48:47] [PASSED] drm_gem_shmem_test_get_sg_table
[01:48:47] [PASSED] drm_gem_shmem_test_get_pages_sgt
[01:48:47] [PASSED] drm_gem_shmem_test_madvise
[01:48:47] [PASSED] drm_gem_shmem_test_purge
[01:48:47] ================== [PASSED] drm_gem_shmem ==================
[01:48:47] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[01:48:47] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[01:48:47] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[01:48:47] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[01:48:47] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[01:48:47] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[01:48:47] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[01:48:47] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[01:48:47] [PASSED] Automatic
[01:48:47] [PASSED] Full
[01:48:47] [PASSED] Limited 16:235
[01:48:47] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[01:48:47] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[01:48:47] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[01:48:47] [PASSED] drm_test_check_disable_connector
[01:48:47] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[01:48:47] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[01:48:47] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[01:48:47] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[01:48:47] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[01:48:47] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[01:48:47] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[01:48:47] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[01:48:47] [PASSED] drm_test_check_output_bpc_dvi
[01:48:47] [PASSED] drm_test_check_output_bpc_format_vic_1
[01:48:47] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[01:48:47] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[01:48:47] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[01:48:47] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[01:48:47] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[01:48:47] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[01:48:47] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[01:48:47] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[01:48:47] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[01:48:47] [PASSED] drm_test_check_broadcast_rgb_value
[01:48:47] [PASSED] drm_test_check_bpc_8_value
[01:48:47] [PASSED] drm_test_check_bpc_10_value
[01:48:47] [PASSED] drm_test_check_bpc_12_value
[01:48:47] [PASSED] drm_test_check_format_value
[01:48:47] [PASSED] drm_test_check_tmds_char_value
[01:48:47] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[01:48:47] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[01:48:47] [PASSED] drm_test_check_mode_valid
[01:48:47] [PASSED] drm_test_check_mode_valid_reject
[01:48:47] [PASSED] drm_test_check_mode_valid_reject_rate
[01:48:47] [PASSED] drm_test_check_mode_valid_reject_max_clock
[01:48:47] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[01:48:47] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[01:48:47] [PASSED] drm_test_check_infoframes
[01:48:47] [PASSED] drm_test_check_reject_avi_infoframe
[01:48:47] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[01:48:47] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[01:48:47] [PASSED] drm_test_check_reject_audio_infoframe
[01:48:47] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[01:48:47] ================= drm_managed (2 subtests) =================
[01:48:47] [PASSED] drm_test_managed_release_action
[01:48:47] [PASSED] drm_test_managed_run_action
[01:48:47] =================== [PASSED] drm_managed ===================
[01:48:47] =================== drm_mm (6 subtests) ====================
[01:48:47] [PASSED] drm_test_mm_init
[01:48:47] [PASSED] drm_test_mm_debug
[01:48:47] [PASSED] drm_test_mm_align32
[01:48:47] [PASSED] drm_test_mm_align64
[01:48:47] [PASSED] drm_test_mm_lowest
[01:48:47] [PASSED] drm_test_mm_highest
[01:48:47] ===================== [PASSED] drm_mm ======================
[01:48:47] ============= drm_modes_analog_tv (5 subtests) =============
[01:48:47] [PASSED] drm_test_modes_analog_tv_mono_576i
[01:48:47] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[01:48:47] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[01:48:47] [PASSED] drm_test_modes_analog_tv_pal_576i
[01:48:47] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[01:48:47] =============== [PASSED] drm_modes_analog_tv ===============
[01:48:47] ============== drm_plane_helper (2 subtests) ===============
[01:48:47] =============== drm_test_check_plane_state  ================
[01:48:47] [PASSED] clipping_simple
[01:48:47] [PASSED] clipping_rotate_reflect
[01:48:47] [PASSED] positioning_simple
[01:48:47] [PASSED] upscaling
[01:48:47] [PASSED] downscaling
[01:48:47] [PASSED] rounding1
[01:48:47] [PASSED] rounding2
[01:48:47] [PASSED] rounding3
[01:48:47] [PASSED] rounding4
[01:48:47] =========== [PASSED] drm_test_check_plane_state ============
[01:48:47] =========== drm_test_check_invalid_plane_state  ============
[01:48:47] [PASSED] positioning_invalid
[01:48:47] [PASSED] upscaling_invalid
[01:48:47] [PASSED] downscaling_invalid
[01:48:47] ======= [PASSED] drm_test_check_invalid_plane_state ========
[01:48:47] ================ [PASSED] drm_plane_helper =================
[01:48:47] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[01:48:47] ====== drm_test_connector_helper_tv_get_modes_check  =======
[01:48:47] [PASSED] None
[01:48:47] [PASSED] PAL
[01:48:47] [PASSED] NTSC
[01:48:47] [PASSED] Both, NTSC Default
[01:48:47] [PASSED] Both, PAL Default
[01:48:47] [PASSED] Both, NTSC Default, with PAL on command-line
[01:48:47] [PASSED] Both, PAL Default, with NTSC on command-line
[01:48:47] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[01:48:47] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[01:48:47] ================== drm_rect (9 subtests) ===================
[01:48:47] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[01:48:47] [PASSED] drm_test_rect_clip_scaled_not_clipped
[01:48:47] [PASSED] drm_test_rect_clip_scaled_clipped
[01:48:47] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[01:48:47] ================= drm_test_rect_intersect  =================
[01:48:47] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[01:48:47] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[01:48:47] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[01:48:47] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[01:48:47] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[01:48:47] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[01:48:47] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[01:48:47] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[01:48:47] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[01:48:47] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[01:48:47] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[01:48:47] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[01:48:47] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[01:48:47] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[01:48:47] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[01:48:47] ============= [PASSED] drm_test_rect_intersect =============
[01:48:47] ================ drm_test_rect_calc_hscale  ================
[01:48:47] [PASSED] normal use
[01:48:47] [PASSED] out of max range
[01:48:47] [PASSED] out of min range
[01:48:47] [PASSED] zero dst
[01:48:47] [PASSED] negative src
[01:48:47] [PASSED] negative dst
[01:48:47] ============ [PASSED] drm_test_rect_calc_hscale ============
[01:48:47] ================ drm_test_rect_calc_vscale  ================
[01:48:47] [PASSED] normal use
[01:48:47] [PASSED] out of max range
[01:48:47] [PASSED] out of min range
[01:48:47] [PASSED] zero dst
[01:48:47] [PASSED] negative src
[01:48:47] [PASSED] negative dst
[01:48:47] ============ [PASSED] drm_test_rect_calc_vscale ============
[01:48:47] ================== drm_test_rect_rotate  ===================
[01:48:47] [PASSED] reflect-x
[01:48:47] [PASSED] reflect-y
[01:48:47] [PASSED] rotate-0
[01:48:47] [PASSED] rotate-90
[01:48:47] [PASSED] rotate-180
[01:48:47] [PASSED] rotate-270
[01:48:47] ============== [PASSED] drm_test_rect_rotate ===============
[01:48:47] ================ drm_test_rect_rotate_inv  =================
[01:48:47] [PASSED] reflect-x
[01:48:47] [PASSED] reflect-y
[01:48:47] [PASSED] rotate-0
[01:48:47] [PASSED] rotate-90
[01:48:47] [PASSED] rotate-180
[01:48:47] [PASSED] rotate-270
[01:48:47] ============ [PASSED] drm_test_rect_rotate_inv =============
[01:48:47] ==================== [PASSED] drm_rect =====================
[01:48:47] ============ drm_sysfb_modeset_test (1 subtest) ============
[01:48:47] ============ drm_test_sysfb_build_fourcc_list  =============
[01:48:47] [PASSED] no native formats
[01:48:47] [PASSED] XRGB8888 as native format
[01:48:47] [PASSED] remove duplicates
[01:48:47] [PASSED] convert alpha formats
[01:48:47] [PASSED] random formats
[01:48:47] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[01:48:47] ============= [PASSED] drm_sysfb_modeset_test ==============
[01:48:47] ================== drm_fixp (2 subtests) ===================
[01:48:47] [PASSED] drm_test_int2fixp
[01:48:47] [PASSED] drm_test_sm2fixp
[01:48:47] ==================== [PASSED] drm_fixp =====================
[01:48:47] ============================================================
[01:48:47] Testing complete. Ran 621 tests: passed: 621
[01:48:47] Elapsed time: 26.231s total, 1.759s configuring, 24.303s building, 0.137s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[01:48:47] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[01:48:49] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[01:48:58] Starting KUnit Kernel (1/1)...
[01:48:58] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[01:48:58] ================= ttm_device (5 subtests) ==================
[01:48:58] [PASSED] ttm_device_init_basic
[01:48:58] [PASSED] ttm_device_init_multiple
[01:48:58] [PASSED] ttm_device_fini_basic
[01:48:58] [PASSED] ttm_device_init_no_vma_man
[01:48:58] ================== ttm_device_init_pools  ==================
[01:48:58] [PASSED] No DMA allocations, no DMA32 required
[01:48:58] [PASSED] DMA allocations, DMA32 required
[01:48:58] [PASSED] No DMA allocations, DMA32 required
[01:48:58] [PASSED] DMA allocations, no DMA32 required
[01:48:58] ============== [PASSED] ttm_device_init_pools ==============
[01:48:58] =================== [PASSED] ttm_device ====================
[01:48:58] ================== ttm_pool (8 subtests) ===================
[01:48:58] ================== ttm_pool_alloc_basic  ===================
[01:48:58] [PASSED] One page
[01:48:58] [PASSED] More than one page
[01:48:58] [PASSED] Above the allocation limit
[01:48:58] [PASSED] One page, with coherent DMA mappings enabled
[01:48:58] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[01:48:58] ============== [PASSED] ttm_pool_alloc_basic ===============
[01:48:58] ============== ttm_pool_alloc_basic_dma_addr  ==============
[01:48:58] [PASSED] One page
[01:48:58] [PASSED] More than one page
[01:48:58] [PASSED] Above the allocation limit
[01:48:58] [PASSED] One page, with coherent DMA mappings enabled
[01:48:58] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[01:48:58] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[01:48:58] [PASSED] ttm_pool_alloc_order_caching_match
[01:48:58] [PASSED] ttm_pool_alloc_caching_mismatch
[01:48:58] [PASSED] ttm_pool_alloc_order_mismatch
[01:48:58] [PASSED] ttm_pool_free_dma_alloc
[01:48:58] [PASSED] ttm_pool_free_no_dma_alloc
[01:48:58] [PASSED] ttm_pool_fini_basic
[01:48:58] ==================== [PASSED] ttm_pool =====================
[01:48:58] ================ ttm_resource (8 subtests) =================
[01:48:58] ================= ttm_resource_init_basic  =================
[01:48:58] [PASSED] Init resource in TTM_PL_SYSTEM
[01:48:58] [PASSED] Init resource in TTM_PL_VRAM
[01:48:58] [PASSED] Init resource in a private placement
[01:48:58] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[01:48:58] ============= [PASSED] ttm_resource_init_basic =============
[01:48:58] [PASSED] ttm_resource_init_pinned
[01:48:58] [PASSED] ttm_resource_fini_basic
[01:48:58] [PASSED] ttm_resource_manager_init_basic
[01:48:58] [PASSED] ttm_resource_manager_usage_basic
[01:48:58] [PASSED] ttm_resource_manager_set_used_basic
[01:48:58] [PASSED] ttm_sys_man_alloc_basic
[01:48:58] [PASSED] ttm_sys_man_free_basic
[01:48:58] ================== [PASSED] ttm_resource ===================
[01:48:58] =================== ttm_tt (15 subtests) ===================
[01:48:58] ==================== ttm_tt_init_basic  ====================
[01:48:58] [PASSED] Page-aligned size
[01:48:58] [PASSED] Extra pages requested
[01:48:58] ================ [PASSED] ttm_tt_init_basic ================
[01:48:58] [PASSED] ttm_tt_init_misaligned
[01:48:58] [PASSED] ttm_tt_fini_basic
[01:48:58] [PASSED] ttm_tt_fini_sg
[01:48:58] [PASSED] ttm_tt_fini_shmem
[01:48:58] [PASSED] ttm_tt_create_basic
[01:48:58] [PASSED] ttm_tt_create_invalid_bo_type
[01:48:58] [PASSED] ttm_tt_create_ttm_exists
[01:48:58] [PASSED] ttm_tt_create_failed
[01:48:58] [PASSED] ttm_tt_destroy_basic
[01:48:58] [PASSED] ttm_tt_populate_null_ttm
[01:48:58] [PASSED] ttm_tt_populate_populated_ttm
[01:48:58] [PASSED] ttm_tt_unpopulate_basic
[01:48:58] [PASSED] ttm_tt_unpopulate_empty_ttm
[01:48:58] [PASSED] ttm_tt_swapin_basic
[01:48:58] ===================== [PASSED] ttm_tt ======================
[01:48:58] =================== ttm_bo (14 subtests) ===================
[01:48:58] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[01:48:58] [PASSED] Cannot be interrupted and sleeps
[01:48:58] [PASSED] Cannot be interrupted, locks straight away
[01:48:58] [PASSED] Can be interrupted, sleeps
[01:48:58] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[01:48:58] [PASSED] ttm_bo_reserve_locked_no_sleep
[01:48:58] [PASSED] ttm_bo_reserve_no_wait_ticket
[01:48:58] [PASSED] ttm_bo_reserve_double_resv
[01:48:58] [PASSED] ttm_bo_reserve_interrupted
[01:48:58] [PASSED] ttm_bo_reserve_deadlock
[01:48:58] [PASSED] ttm_bo_unreserve_basic
[01:48:58] [PASSED] ttm_bo_unreserve_pinned
[01:48:58] [PASSED] ttm_bo_unreserve_bulk
[01:48:58] [PASSED] ttm_bo_fini_basic
[01:48:58] [PASSED] ttm_bo_fini_shared_resv
[01:48:58] [PASSED] ttm_bo_pin_basic
[01:48:58] [PASSED] ttm_bo_pin_unpin_resource
[01:48:58] [PASSED] ttm_bo_multiple_pin_one_unpin
[01:48:58] ===================== [PASSED] ttm_bo ======================
[01:48:58] ============== ttm_bo_validate (22 subtests) ===============
[01:48:58] ============== ttm_bo_init_reserved_sys_man  ===============
[01:48:58] [PASSED] Buffer object for userspace
[01:48:58] [PASSED] Kernel buffer object
[01:48:58] [PASSED] Shared buffer object
[01:48:58] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[01:48:58] ============== ttm_bo_init_reserved_mock_man  ==============
[01:48:58] [PASSED] Buffer object for userspace
[01:48:58] [PASSED] Kernel buffer object
[01:48:58] [PASSED] Shared buffer object
[01:48:58] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[01:48:58] [PASSED] ttm_bo_init_reserved_resv
[01:48:58] ================== ttm_bo_validate_basic  ==================
[01:48:58] [PASSED] Buffer object for userspace
[01:48:58] [PASSED] Kernel buffer object
[01:48:58] [PASSED] Shared buffer object
[01:48:58] ============== [PASSED] ttm_bo_validate_basic ==============
[01:48:58] [PASSED] ttm_bo_validate_invalid_placement
[01:48:58] ============= ttm_bo_validate_same_placement  ==============
[01:48:58] [PASSED] System manager
[01:48:58] [PASSED] VRAM manager
[01:48:58] ========= [PASSED] ttm_bo_validate_same_placement ==========
[01:48:58] [PASSED] ttm_bo_validate_failed_alloc
[01:48:58] [PASSED] ttm_bo_validate_pinned
[01:48:58] [PASSED] ttm_bo_validate_busy_placement
[01:48:58] ================ ttm_bo_validate_multihop  =================
[01:48:58] [PASSED] Buffer object for userspace
[01:48:58] [PASSED] Kernel buffer object
[01:48:58] [PASSED] Shared buffer object
[01:48:58] ============ [PASSED] ttm_bo_validate_multihop =============
[01:48:58] ========== ttm_bo_validate_no_placement_signaled  ==========
[01:48:58] [PASSED] Buffer object in system domain, no page vector
[01:48:58] [PASSED] Buffer object in system domain with an existing page vector
[01:48:58] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[01:48:58] ======== ttm_bo_validate_no_placement_not_signaled  ========
[01:48:58] [PASSED] Buffer object for userspace
[01:48:58] [PASSED] Kernel buffer object
[01:48:58] [PASSED] Shared buffer object
[01:48:58] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[01:48:58] [PASSED] ttm_bo_validate_move_fence_signaled
[01:48:58] ========= ttm_bo_validate_move_fence_not_signaled  =========
[01:48:58] [PASSED] Waits for GPU
[01:48:58] [PASSED] Tries to lock straight away
[01:48:58] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[01:48:58] [PASSED] ttm_bo_validate_swapout
[01:48:58] [PASSED] ttm_bo_validate_happy_evict
[01:48:58] [PASSED] ttm_bo_validate_all_pinned_evict
[01:48:58] [PASSED] ttm_bo_validate_allowed_only_evict
[01:48:58] [PASSED] ttm_bo_validate_deleted_evict
[01:48:58] [PASSED] ttm_bo_validate_busy_domain_evict
[01:48:58] [PASSED] ttm_bo_validate_evict_gutting
[01:48:58] [PASSED] ttm_bo_validate_recrusive_evict
[01:48:58] ================= [PASSED] ttm_bo_validate =================
[01:48:58] ============================================================
[01:48:58] Testing complete. Ran 102 tests: passed: 102
[01:48:58] Elapsed time: 11.491s total, 1.763s configuring, 9.513s building, 0.180s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Vswing/Preemphasis Override (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 948 bytes --]

== Series Details ==

Series: Vswing/Preemphasis Override (rev2)
URL   : https://patchwork.freedesktop.org/series/164959/
State : success

== Summary ==

CI Bug Log - changes from xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb_BAT -> xe-pw-164959v2_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (12 -> 12)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb -> xe-pw-164959v2

  IGT_8894: 044f2c8744a52317c4651b4ca9d3b12f5be51575 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb: ad7a1f718b8cb631948c94f74dd48cd2867d99fb
  xe-pw-164959v2: 164959v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/index.html

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✗ Xe.CI.FULL: failure for Vswing/Preemphasis Override (rev2)

[Patchwork]

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== Series Details ==

Series: Vswing/Preemphasis Override (rev2)
URL   : https://patchwork.freedesktop.org/series/164959/
State : failure

== Summary ==

CI Bug Log - changes from xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb_FULL -> xe-pw-164959v2_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-164959v2_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-164959v2_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-164959v2_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@fbdev@unaligned-write:
    - shard-bmg:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-8/igt@fbdev@unaligned-write.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-2/igt@fbdev@unaligned-write.html

  * igt@kms_flip@dpms-off-confusion-interruptible@a-hdmi-a3:
    - shard-bmg:          [PASS][3] -> [CRASH][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-8/igt@kms_flip@dpms-off-confusion-interruptible@a-hdmi-a3.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-2/igt@kms_flip@dpms-off-confusion-interruptible@a-hdmi-a3.html

  
Known issues
------------

  Here are the changes found in xe-pw-164959v2_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@linear-16bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#2327])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@kms_big_fb@linear-16bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#1124]) +4 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_bw@linear-tiling-3-displays-target-1920x1080p:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#367])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@kms_bw@linear-tiling-3-displays-target-1920x1080p.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2887]) +6 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs.html

  * igt@kms_chamelium_color@degamma:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#2325] / [Intel XE#7358])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@kms_chamelium_color@degamma.html

  * igt@kms_chamelium_edid@dp-edid-stress-resolution-4k:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2252]) +1 other test skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html

  * igt@kms_content_protection@legacy:
    - shard-bmg:          NOTRUN -> [FAIL][11] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +3 other tests fail
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@kms_content_protection@legacy.html

  * igt@kms_cursor_crc@cursor-sliding-32x10:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2320]) +1 other test skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@kms_cursor_crc@cursor-sliding-32x10.html

  * igt@kms_dirtyfb@fbc-dirtyfb-ioctl:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#4210] / [Intel XE#7467])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@kms_dirtyfb@fbc-dirtyfb-ioctl.html

  * igt@kms_flip@dpms-off-confusion-interruptible:
    - shard-bmg:          [PASS][14] -> [DMESG-WARN][15] ([Intel XE#5545])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-8/igt@kms_flip@dpms-off-confusion-interruptible.html
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-2/igt@kms_flip@dpms-off-confusion-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [PASS][16] -> [FAIL][17] ([Intel XE#301])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#7178] / [Intel XE#7351])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html

  * igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-cur-indfb-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2311]) +24 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#4141]) +9 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbchdr-abgr161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#7061])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@kms_frontbuffer_tracking@fbchdr-abgr161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2313]) +27 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html

  * igt@kms_joiner@basic-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#6911] / [Intel XE#7378])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@kms_joiner@basic-ultra-joiner.html

  * igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#7283]) +2 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#5021] / [Intel XE#7377])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_pm_backlight@fade-with-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#7376] / [Intel XE#870]) +1 other test skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@kms_pm_backlight@fade-with-dpms.html

  * igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#1489]) +2 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr@fbc-psr2-primary-page-flip:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#2234] / [Intel XE#2850]) +4 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@kms_psr@fbc-psr2-primary-page-flip.html

  * igt@kms_rotation_crc@bad-pixel-format:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#3904] / [Intel XE#7342])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@kms_rotation_crc@bad-pixel-format.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#1435]) +1 other test skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@xe_eudebug@basic-read-event:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#7636]) +2 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@xe_eudebug@basic-read-event.html

  * igt@xe_eudebug_sriov@deny-eudebug:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#5793] / [Intel XE#7320] / [Intel XE#7464])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@xe_eudebug_sriov@deny-eudebug.html

  * igt@xe_evict@evict-cm-threads-small-multi-queue:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#7140])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@xe_evict@evict-cm-threads-small-multi-queue.html

  * igt@xe_exec_basic@multigpu-once-null-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#2322] / [Intel XE#7372]) +2 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@xe_exec_basic@multigpu-once-null-rebind.html

  * igt@xe_exec_fault_mode@many-multi-queue-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#7136]) +1 other test skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@xe_exec_fault_mode@many-multi-queue-userptr-invalidate.html

  * igt@xe_exec_multi_queue@max-queues-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#6874]) +11 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@xe_exec_multi_queue@max-queues-userptr-invalidate.html

  * igt@xe_exec_reset@cm-multi-queue-gt-reset:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#7866])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@xe_exec_reset@cm-multi-queue-gt-reset.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#7138]) +3 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind.html

  * igt@xe_media_fill@media-fill:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#2459] / [Intel XE#2596] / [Intel XE#7321] / [Intel XE#7453])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@xe_media_fill@media-fill.html

  * igt@xe_multigpu_svm@mgpu-pagefault-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#6964])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@xe_multigpu_svm@mgpu-pagefault-prefetch.html

  * igt@xe_non_msix@walker-interrupt-notification-non-msix:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#7622])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@xe_non_msix@walker-interrupt-notification-non-msix.html

  * igt@xe_pat@xa-app-transient-media-on:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#7590])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@xe_pat@xa-app-transient-media-on.html

  * igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#4733] / [Intel XE#7417])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-5/igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq.html

  * igt@xe_query@multigpu-query-config:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#944])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@xe_query@multigpu-query-config.html

  * igt@xe_sysfs_scheduler@job_timeout_ms-min-max:
    - shard-bmg:          [PASS][45] -> [SKIP][46] ([Intel XE#6703]) +32 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-8/igt@xe_sysfs_scheduler@job_timeout_ms-min-max.html
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-2/igt@xe_sysfs_scheduler@job_timeout_ms-min-max.html

  
#### Possible fixes ####

  * igt@core_hotunplug@hotunbind-rebind:
    - shard-bmg:          [SKIP][47] ([Intel XE#6779]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-2/igt@core_hotunplug@hotunbind-rebind.html
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@core_hotunplug@hotunbind-rebind.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
    - shard-bmg:          [DMESG-FAIL][49] ([Intel XE#5545]) -> [PASS][50] +1 other test pass
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-2/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-bmg:          [FAIL][51] ([Intel XE#7809]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          [FAIL][53] ([Intel XE#301]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank@c-edp1:
    - shard-lnl:          [FAIL][55] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html

  * igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f:
    - shard-bmg:          [SKIP][57] ([Intel XE#7915]) -> [PASS][58] +7 other tests pass
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-3/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-6/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html

  * igt@kms_pm_dc@dc5-dpms:
    - shard-lnl:          [FAIL][59] ([Intel XE#7340] / [Intel XE#7504]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-lnl-7/igt@kms_pm_dc@dc5-dpms.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-lnl-1/igt@kms_pm_dc@dc5-dpms.html

  * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
    - shard-bmg:          [SKIP][61] ([Intel XE#6703]) -> [PASS][62] +11 other tests pass
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-2/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html

  
#### Warnings ####

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-bmg:          [SKIP][63] ([Intel XE#1124]) -> [SKIP][64] ([Intel XE#6703]) +1 other test skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-8/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-2/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_bw@connected-linear-tiling-4-displays-target-2560x1440p:
    - shard-bmg:          [SKIP][65] ([Intel XE#7679]) -> [SKIP][66] ([Intel XE#6703])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-8/igt@kms_bw@connected-linear-tiling-4-displays-target-2560x1440p.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-2/igt@kms_bw@connected-linear-tiling-4-displays-target-2560x1440p.html

  * igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs:
    - shard-bmg:          [SKIP][67] ([Intel XE#6703]) -> [SKIP][68] ([Intel XE#2887])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-2/igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs.html

  * igt@kms_chamelium_edid@hdmi-edid-change-during-suspend:
    - shard-bmg:          [SKIP][69] ([Intel XE#2252]) -> [SKIP][70] ([Intel XE#6703])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-8/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-2/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-lnl:          [FAIL][71] ([Intel XE#301] / [Intel XE#3149]) -> [FAIL][72] ([Intel XE#301])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_frontbuffer_tracking@drrs-shrfb-scaledprimary:
    - shard-bmg:          [SKIP][73] ([Intel XE#2311]) -> [SKIP][74] ([Intel XE#6703]) +5 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-shrfb-scaledprimary.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-shrfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
    - shard-bmg:          [SKIP][75] ([Intel XE#4141]) -> [SKIP][76] ([Intel XE#6703])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][77] ([Intel XE#6703]) -> [SKIP][78] ([Intel XE#2311])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-mmap-wc.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt:
    - shard-bmg:          [SKIP][79] ([Intel XE#6703]) -> [SKIP][80] ([Intel XE#2313])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-mmap-wc:
    - shard-bmg:          [SKIP][81] ([Intel XE#7061]) -> [SKIP][82] ([Intel XE#6703])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-mmap-wc.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-shrfb-pgflip-blt:
    - shard-bmg:          [SKIP][83] ([Intel XE#2313]) -> [SKIP][84] ([Intel XE#6703]) +3 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-8/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-shrfb-pgflip-blt.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-2/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [SKIP][85] ([Intel XE#2426] / [Intel XE#5848]) -> [FAIL][86] ([Intel XE#1729] / [Intel XE#7424])
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_vrr@seamless-rr-switch-vrr:
    - shard-bmg:          [SKIP][87] ([Intel XE#1499]) -> [SKIP][88] ([Intel XE#6703])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-8/igt@kms_vrr@seamless-rr-switch-vrr.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-2/igt@kms_vrr@seamless-rr-switch-vrr.html

  * igt@xe_exec_fault_mode@once-multi-queue-rebind-imm:
    - shard-bmg:          [SKIP][89] ([Intel XE#7136]) -> [SKIP][90] ([Intel XE#6703])
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-8/igt@xe_exec_fault_mode@once-multi-queue-rebind-imm.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-2/igt@xe_exec_fault_mode@once-multi-queue-rebind-imm.html

  * igt@xe_exec_fault_mode@twice-multi-queue-prefetch:
    - shard-bmg:          [ABORT][91] ([Intel XE#1727]) -> [SKIP][92] ([Intel XE#7136])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-2/igt@xe_exec_fault_mode@twice-multi-queue-prefetch.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@xe_exec_fault_mode@twice-multi-queue-prefetch.html

  * igt@xe_exec_multi_queue@many-execs-preempt-mode-dyn-priority:
    - shard-bmg:          [SKIP][93] ([Intel XE#6703]) -> [SKIP][94] ([Intel XE#6874])
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-2/igt@xe_exec_multi_queue@many-execs-preempt-mode-dyn-priority.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@xe_exec_multi_queue@many-execs-preempt-mode-dyn-priority.html

  * igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-basic-smem:
    - shard-bmg:          [SKIP][95] ([Intel XE#6874]) -> [SKIP][96] ([Intel XE#6703]) +1 other test skip
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-8/igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-basic-smem.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-2/igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-basic-smem.html

  * igt@xe_exec_threads@threads-multi-queue-cm-rebind:
    - shard-bmg:          [SKIP][97] ([Intel XE#7138]) -> [SKIP][98] ([Intel XE#6703])
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-8/igt@xe_exec_threads@threads-multi-queue-cm-rebind.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-2/igt@xe_exec_threads@threads-multi-queue-cm-rebind.html

  * igt@xe_pm@d3cold-basic:
    - shard-bmg:          [SKIP][99] ([Intel XE#2284] / [Intel XE#7370]) -> [SKIP][100] ([Intel XE#6703])
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-8/igt@xe_pm@d3cold-basic.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-2/igt@xe_pm@d3cold-basic.html

  * igt@xe_pxp@pxp-optout:
    - shard-bmg:          [SKIP][101] ([Intel XE#6703]) -> [SKIP][102] ([Intel XE#4733] / [Intel XE#7417])
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb/shard-bmg-2/igt@xe_pxp@pxp-optout.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/shard-bmg-7/igt@xe_pxp@pxp-optout.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2459
  [Intel XE#2596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2596
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4210]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4210
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5793
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
  [Intel XE#6779]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6779
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7320
  [Intel XE#7321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7321
  [Intel XE#7340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7340
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
  [Intel XE#7377]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7377
  [Intel XE#7378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7378
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7453]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7453
  [Intel XE#7464]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7464
  [Intel XE#7467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7467
  [Intel XE#7504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7504
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7622]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7622
  [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7809]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7809
  [Intel XE#7866]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7866
  [Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb -> xe-pw-164959v2

  IGT_8894: 044f2c8744a52317c4651b4ca9d3b12f5be51575 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5007-ad7a1f718b8cb631948c94f74dd48cd2867d99fb: ad7a1f718b8cb631948c94f74dd48cd2867d99fb
  xe-pw-164959v2: 164959v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164959v2/index.html

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