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From: Thadeu Lima de Souza Cascardo <cascardo@igalia.com>
To: igt-dev@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
	intel-xe@lists.freedesktop.org,
	"Christian Koenig" <christian.koenig@amd.com>,
	maarten.lankhorst@linux.intel.com,
	"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
	"Natalie Vock" <natalie.vock@gmx.de>,
	kernel-dev@igalia.com,
	"Tvrtko Ursulin" <tvrtko.ursulin@igalia.com>,
	"Thadeu Lima de Souza Cascardo" <cascardo@igalia.com>
Subject: [PATCH i-g-t 1/8] Introduce dmem driver and implement Xe support
Date: Tue, 12 May 2026 18:51:48 -0300	[thread overview]
Message-ID: <20260512215156.4083082-2-cascardo@igalia.com> (raw)
In-Reply-To: <20260512215156.4083082-1-cascardo@igalia.com>

In order to be reuse the same dmem tests with multiple drivers, we need to
abstract a few operations. That includes getting the region name, and
allocating and releasing VRAM. As there is some initialization also when
multiple allocations are done, also provide init and deinit functions.

The Xe implementation is based on the equivalente operations from
xe_cgroups.c.

Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@igalia.com>
---
 lib/igt_dmem_driver.h |  24 +++++++
 lib/meson.build       |   1 +
 lib/xe/xe_dmem.c      | 145 ++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 170 insertions(+)
 create mode 100644 lib/igt_dmem_driver.h
 create mode 100644 lib/xe/xe_dmem.c

diff --git a/lib/igt_dmem_driver.h b/lib/igt_dmem_driver.h
new file mode 100644
index 000000000000..869356fbf2c2
--- /dev/null
+++ b/lib/igt_dmem_driver.h
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright 2026 Valve Corporation
+ * Authors:
+ *  Thadeu Lima de Souza Cascardo <cascardo@igalia.com>
+ */
+
+#ifndef __IGT_DMEM_DRIVER_H__
+#define __IGT_DMEM_DRIVER_H__
+
+#include <stdlib.h>
+
+struct igt_dmem_driver {
+	const char *name;
+	char * (*get_region_name)(int fd);
+	int (*init)(void **ctx, int fd, int max_bo);
+	void (*deinit)(void *ctx);
+	int (*allocate_vram)(void *ctx, int n_bo, size_t len);
+	void (*free_vram)(void *ctx, int n_bo, size_t len);
+};
+
+extern const struct igt_dmem_driver xe_dmem_driver;
+
+#endif
diff --git a/lib/meson.build b/lib/meson.build
index fb4679ffdfc1..269f3b9f0af8 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -122,6 +122,7 @@ lib_sources = [
 	'igt_msm.c',
 	'igt_dsc.c',
 	'igt_hook.c',
+	'xe/xe_dmem.c',
 	'xe/xe_gt.c',
 	'xe/xe_ioctl.c',
 	'xe/xe_legacy.c',
diff --git a/lib/xe/xe_dmem.c b/lib/xe/xe_dmem.c
new file mode 100644
index 000000000000..977b4c5f168f
--- /dev/null
+++ b/lib/xe/xe_dmem.c
@@ -0,0 +1,145 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright 2026 Valve Corporation
+ * Authors:
+ *  Thadeu Lima de Souza Cascardo <cascardo@igalia.com>
+ */
+
+#include "igt_dmem_driver.h"
+
+#include <errno.h>
+
+#include "igt.h"
+#include "igt_cgroup.h"
+#include "xe_drm.h"
+#include "xe/xe_ioctl.h"
+#include "xe/xe_query.h"
+
+static char * xe_dmem_get_region_name(int fd)
+{
+	uint64_t vram_region = 0;
+	uint64_t region;
+	char *cg_region;
+
+	/* Find first VRAM region */
+	xe_for_each_mem_region(fd, all_memory_regions(fd), region) {
+		if (xe_region_class(fd, region) == DRM_XE_MEM_REGION_CLASS_VRAM) {
+			vram_region = region;
+			break;
+		}
+	}
+	if (!vram_region)
+		return NULL;
+
+	cg_region = xe_cgroup_region_name(fd, vram_region);
+
+	return cg_region;
+}
+
+struct xe_dmem_ctx {
+	int fd;
+	uint32_t vm;
+	uint32_t *handles;
+	uint64_t addr;
+	uint64_t vram_region;
+};
+
+#define BIND_BASE		0x100000000ULL	/* 4 GiB VA base */
+
+static int xe_dmem_init(void **ctx, int fd, int max_bo)
+{
+	struct xe_dmem_ctx *xe_ctx;
+	uint64_t region;
+
+	xe_ctx = malloc(sizeof(*xe_ctx));
+	if (!xe_ctx)
+		return -ENOMEM;
+
+	xe_ctx->handles = calloc(max_bo, sizeof(xe_ctx->handles[0]));
+	if (!xe_ctx->handles)
+		goto out;
+
+	xe_ctx->vram_region = 0;
+	/* Find first VRAM region */
+	xe_for_each_mem_region(fd, all_memory_regions(fd), region) {
+		if (xe_region_class(fd, region) == DRM_XE_MEM_REGION_CLASS_VRAM) {
+			xe_ctx->vram_region = region;
+			break;
+		}
+	}
+	if (!xe_ctx->vram_region)
+		goto out;
+
+	xe_ctx->addr = BIND_BASE;
+	xe_ctx->fd = fd;
+
+	xe_ctx->vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_LR_MODE, 0);
+
+	*ctx = xe_ctx;
+
+	return 0;
+
+out:
+	if (xe_ctx->handles)
+		free(xe_ctx->handles);
+	free(xe_ctx);
+
+	return -ENOMEM;
+}
+
+static void xe_dmem_deinit(void *ctx)
+{
+	struct xe_dmem_ctx *xe_ctx = ctx;
+
+	xe_vm_destroy(xe_ctx->fd, xe_ctx->vm);
+	free(xe_ctx->handles);
+	free(xe_ctx);
+}
+
+static int xe_dmem_allocate_vram(void *ctx, int n_bo, size_t len)
+{
+	struct xe_dmem_ctx *xe_ctx = ctx;
+	uint32_t handle;
+	int err;
+
+	err = __xe_bo_create(xe_ctx->fd, 0, len, xe_ctx->vram_region,
+			     DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING,
+			     NULL, &handle);
+	if (err)
+		goto out;
+
+	xe_ctx->handles[n_bo] = handle;
+
+	err = __xe_vm_bind_lr_sync(xe_ctx->fd, xe_ctx->vm, handle, 0,
+				   xe_ctx->addr, len, 0);
+	if (err)
+		goto out;
+
+	xe_ctx->addr += len;
+
+out:
+	return err;
+}
+
+static void xe_dmem_free_vram(void *ctx, int n_bo, size_t len)
+{
+	struct xe_dmem_ctx *xe_ctx = ctx;
+	uint64_t addr = BIND_BASE;
+	int i;
+	for (i = 0; i < n_bo; i++) {
+		if (xe_ctx->handles[i]) {
+			xe_vm_unbind_lr_sync(xe_ctx->fd, xe_ctx->vm, 0, addr, len);
+			gem_close(xe_ctx->fd, xe_ctx->handles[i]);
+		}
+		addr += len;
+	}
+}
+
+const struct igt_dmem_driver xe_dmem_driver = {
+	.name = "xe",
+	.get_region_name = xe_dmem_get_region_name,
+	.init = xe_dmem_init,
+	.deinit = xe_dmem_deinit,
+	.allocate_vram = xe_dmem_allocate_vram,
+	.free_vram = xe_dmem_free_vram,
+};
-- 
2.47.3


  reply	other threads:[~2026-05-12 21:52 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-12 21:51 [PATCH i-g-t 0/8] dmem: add amdgpu support and one more test Thadeu Lima de Souza Cascardo
2026-05-12 21:51 ` Thadeu Lima de Souza Cascardo [this message]
2026-05-12 21:51 ` [PATCH i-g-t 2/8] Adjust xe_cgroups test to use igt_dmem_driver Thadeu Lima de Souza Cascardo
2026-05-13 15:18   ` Kamil Konieczny
2026-05-12 21:51 ` [PATCH i-g-t 3/8] Make xe_cgroup test a generic test Thadeu Lima de Souza Cascardo
2026-05-13 15:21   ` Kamil Konieczny
2026-05-12 21:51 ` [PATCH i-g-t 4/8] amdgpu: add amdgpu_cgroup_region_name Thadeu Lima de Souza Cascardo
2026-05-12 21:51 ` [PATCH i-g-t 5/8] igt_dmem_driver: add amdgpu support Thadeu Lima de Souza Cascardo
2026-05-13 15:26   ` Kamil Konieczny
2026-05-12 21:51 ` [PATCH i-g-t 6/8] dmem: add test for current/max Thadeu Lima de Souza Cascardo
2026-05-13 15:31   ` Kamil Konieczny
2026-05-12 21:51 ` [PATCH i-g-t 7/8] dmem: only check for dmem availability once Thadeu Lima de Souza Cascardo
2026-05-12 21:51 ` [PATCH i-g-t 8/8] dmem: get region once per driver Thadeu Lima de Souza Cascardo
2026-05-12 22:27 ` [PATCH i-g-t 0/8] dmem: add amdgpu support and one more test Thadeu Lima de Souza Cascardo
2026-05-13  8:06 ` Christian König
2026-05-13  8:54   ` Thomas Hellström

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