[PATCH v4 0/3] drm/gpusvm: fix IOVA/DMA unmap leaks in __drm_gpusvm_unmap_pages()

[PATCH v4 0/3] drm/gpusvm: fix IOVA/DMA unmap leaks in __drm_gpusvm_unmap_pages()

[Honglei Huang]

Three small fixes for the IOVA/DMA unmap path in
__drm_gpusvm_unmap_pages() and the get_pages() error path, all spotted by
AI review:

  - Free the whole IOVA reservation on unmap. In a mixed range only the
    system pages are linked, so freeing just the linked part leaks the
    IOVA reserved for the device pages. Unlink the linked portion and
    free the whole reservation. On the get_pages() error path
    state_offset is 0, so skip the unlink, also avoiding the
    uninitialised dma_addr[0].dir read, allocate dma_addr with the
    zeroing kvzalloc_objs().
  - Do not route system pages to device_unmap() on the IOVA path. Branch
    off addr->proto so only real device pages reach device_unmap().
  - Publish dpagemap early to avoid leaking device mappings on the
    get_pages() error path. It was only stored on success, so a mid-way
    failure left svm_pages->dpagemap NULL and skipped device_unmap().
    Assign it when the first device page is mapped.

All three issues are preexisting and independent of the gpusvm MM/device
state split series; they were surfaced by the AI review of that series,
so this series addresses them separately.

V4:
  - Add reviewed-by for Matt's review.

V3:
  - Add fixes for all patches, add Cc stable.
  - Add reviewed by in patch 1.
  - Move AI review note into commit message instead of reported by.

V2:
  - patch 1: extend the uninitialized dma_addr[0].dir fix into freeing
    the whole IOVA reservation, fixing the IOVA leak for mixed ranges
    (the earlier version only guarded the direction argument).
  - add patch 3: publish dpagemap early to fix the device-mapping leak on
    the get_pages() error path.

Honglei Huang (3):
  drm/gpusvm: free the whole IOVA reservation on unmap
  drm/gpusvm: do not route system pages to device_unmap() on IOVA unmap
  drm/gpusvm: publish dpagemap early to avoid device mapping leak on
    error

 drivers/gpu/drm/drm_gpusvm.c | 53 +++++++++++++++++++++++++-----------
 1 file changed, 37 insertions(+), 16 deletions(-)

-- 
2.34.1

[PATCH v4 1/3] drm/gpusvm: free the whole IOVA reservation on unmap

[Honglei Huang]

dma_iova_try_alloc() reserves IOVA for the entire range, but in a mixed
range only the system pages are linked (their total size is state_offset)
while device pages never touch the IOVA state. dma_iova_destroy() with
state_offset only frees the linked part, permanently leaking the IOVA
reserved for the device pages and eventually exhausting the IOVA space.

Unlink the linked system-page portion and free the whole reserved IOVA
instead. On the get_pages() error path state_offset is 0 (no page linked,
dma_addr[0] unpopulated), so skip the unlink and just free the reservation;
this also avoids reading the uninitialized dma_addr[0].dir there.

Allocate the dma_addr array with the zeroing kvzalloc_objs() so every entry
has a well-defined value.

This issue was found by Sashiko AI review.

Fixes: 37ad039fb367 ("drm/gpusvm: Use dma-map IOVA alloc, link, and sync API in GPU SVM")
Cc: stable@vger.kernel.org
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Honglei Huang <honghuan@amd.com>
---
 drivers/gpu/drm/drm_gpusvm.c | 19 ++++++++++++++-----
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_gpusvm.c b/drivers/gpu/drm/drm_gpusvm.c
index 958cb605aed..3145d55cd86 100644
--- a/drivers/gpu/drm/drm_gpusvm.c
+++ b/drivers/gpu/drm/drm_gpusvm.c
@@ -1146,10 +1146,19 @@ static void __drm_gpusvm_unmap_pages(struct drm_gpusvm *gpusvm,
 		};
 		bool use_iova = dma_use_iova(&svm_pages->state);
 
-		if (use_iova)
-			dma_iova_destroy(dev, &svm_pages->state,
-					 svm_pages->state_offset,
-					 svm_pages->dma_addr[0].dir, 0);
+		/*
+		 * IOVA is reserved for the whole range but only the linked
+		 * system pages (state_offset bytes) need unlinking; free the
+		 * entire reservation to avoid leaking the device-page part.
+		 * On the error path state_offset is 0, so just free it.
+		 */
+		if (use_iova) {
+			if (svm_pages->state_offset)
+				dma_iova_unlink(dev, &svm_pages->state, 0,
+						svm_pages->state_offset,
+						svm_pages->dma_addr[0].dir, 0);
+			dma_iova_free(dev, &svm_pages->state);
+		}
 
 		for (i = 0, j = 0; i < npages; j++) {
 			struct drm_pagemap_addr *addr = &svm_pages->dma_addr[j];
@@ -1486,7 +1495,7 @@ int drm_gpusvm_get_pages(struct drm_gpusvm *gpusvm,
 		/* Unlock and restart mapping to allocate memory. */
 		drm_gpusvm_notifier_unlock(gpusvm);
 		svm_pages->dma_addr =
-			kvmalloc_objs(*svm_pages->dma_addr, npages);
+			kvzalloc_objs(*svm_pages->dma_addr, npages);
 		if (!svm_pages->dma_addr) {
 			err = -ENOMEM;
 			goto err_free;
-- 
2.34.1

[PATCH v4 2/3] drm/gpusvm: do not route system pages to device_unmap() on IOVA unmap

[Honglei Huang]

In a mixed range: ctx->allow_mixed dpagemap is not NULL while some entries
are system pages. The unmap loop used:

        dma_unmap_page(...);
    else if (dpagemap && dpagemap->ops->device_unmap)
        dpagemap->ops->device_unmap(...);

When use_iova is true the first condition is false for system pages,
so they fall through to device_unmap() and a system DMA address is
handed to the device specific unmap callback, risking invalid accesses
or state corruption.

Key the branch off addr->proto instead: system pages only need an explicit
dma_unmap_page() in the non IOVA case, IOVA system pages are already torn
down by the single dma_iova_destroy(), and only genuine device pages
reach device_unmap().

This issue was found by Sashiko AI review.

Fixes: 37ad039fb367 ("drm/gpusvm: Use dma-map IOVA alloc, link, and sync API in GPU SVM")
Cc: stable@vger.kernel.org
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Honglei Huang <honghuan@amd.com>
---
 drivers/gpu/drm/drm_gpusvm.c | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/drm_gpusvm.c b/drivers/gpu/drm/drm_gpusvm.c
index 3145d55cd86..44bb19658dd 100644
--- a/drivers/gpu/drm/drm_gpusvm.c
+++ b/drivers/gpu/drm/drm_gpusvm.c
@@ -1163,12 +1163,18 @@ static void __drm_gpusvm_unmap_pages(struct drm_gpusvm *gpusvm,
 		for (i = 0, j = 0; i < npages; j++) {
 			struct drm_pagemap_addr *addr = &svm_pages->dma_addr[j];
 
-			if (!use_iova && addr->proto == DRM_INTERCONNECT_SYSTEM)
-				dma_unmap_page(dev,
-					       addr->addr,
-					       PAGE_SIZE << addr->order,
-					       addr->dir);
-			else if (dpagemap && dpagemap->ops->device_unmap)
+			if (addr->proto == DRM_INTERCONNECT_SYSTEM) {
+				/*
+				 * Linked IOVA pages were already torn down by
+				 * the dma_iova_unlink()/dma_iova_free() above;
+				 * only the non-IOVA mappings need unmap here.
+				 */
+				if (!use_iova)
+					dma_unmap_page(dev,
+						       addr->addr,
+						       PAGE_SIZE << addr->order,
+						       addr->dir);
+			} else if (dpagemap && dpagemap->ops->device_unmap)
 				dpagemap->ops->device_unmap(dpagemap,
 							    dev, addr);
 			i += 1 << addr->order;
-- 
2.34.1

[PATCH v4 3/3] drm/gpusvm: publish dpagemap early to avoid device mapping leak on error

[Honglei Huang]

drm_gpusvm_get_pages() only stored the local dpagemap into
svm_pages->dpagemap on the success path. If a later page failed (e.g.
-EOPNOTSUPP when ctx->allow_mixed is false) and jumped to err_unmap,
svm_pages->dpagemap was still NULL, so __drm_gpusvm_unmap_pages() skipped
device_unmap() and leaked the device mappings already created.

Assign svm_pages->dpagemap when the first device page is mapped so the
err_unmap path can device_unmap() those mappings.

This issue was found by Sashiko AI review.

Fixes: f70da6f99d4f ("drm/gpusvm: pull out drm_gpusvm_pages substructure")
Cc: stable@vger.kernel.org
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Honglei Huang <honghuan@amd.com>
---
 drivers/gpu/drm/drm_gpusvm.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_gpusvm.c b/drivers/gpu/drm/drm_gpusvm.c
index 44bb19658dd..9a06ff7d260 100644
--- a/drivers/gpu/drm/drm_gpusvm.c
+++ b/drivers/gpu/drm/drm_gpusvm.c
@@ -1544,6 +1544,16 @@ int drm_gpusvm_get_pages(struct drm_gpusvm *gpusvm,
 					err = -EAGAIN;
 					goto err_unmap;
 				}
+
+				/*
+				 * Set the dpagemap as soon as the first
+				 * device page is mapped so the err_unmap path
+				 * can device_unmap() the device mappings that
+				 * have already been created.
+				 */
+				drm_pagemap_get(dpagemap);
+				drm_pagemap_put(svm_pages->dpagemap);
+				svm_pages->dpagemap = dpagemap;
 			}
 			svm_pages->dma_addr[j] =
 				dpagemap->ops->device_map(dpagemap,
@@ -1611,12 +1621,8 @@ int drm_gpusvm_get_pages(struct drm_gpusvm *gpusvm,
 			goto err_unmap;
 	}
 
-	if (pagemap) {
+	if (pagemap)
 		flags.has_devmem_pages = true;
-		drm_pagemap_get(dpagemap);
-		drm_pagemap_put(svm_pages->dpagemap);
-		svm_pages->dpagemap = dpagemap;
-	}
 
 	/* WRITE_ONCE pairs with READ_ONCE for opportunistic checks */
 	WRITE_ONCE(svm_pages->flags.__flags, flags.__flags);
-- 
2.34.1

✓ CI.KUnit: success for drm/gpusvm: fix IOVA/DMA unmap leaks in __drm_gpusvm_unmap_pages() (rev3)

[Patchwork]

== Series Details ==

Series: drm/gpusvm: fix IOVA/DMA unmap leaks in __drm_gpusvm_unmap_pages() (rev3)
URL   : https://patchwork.freedesktop.org/series/169467/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[06:37:22] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:37:27] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
../drivers/gpu/drm/xe/xe_pt.c:1418:13: warning: ‘xe_pt_svm_userptr_notifier_lock’ defined but not used [-Wunused-function]
 1418 | static void xe_pt_svm_userptr_notifier_lock(struct xe_vm *vm)
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

[06:37:58] Starting KUnit Kernel (1/1)...
[06:37:58] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:37:59] ================== guc_buf (11 subtests) ===================
[06:37:59] [PASSED] test_smallest
[06:37:59] [PASSED] test_largest
[06:37:59] [PASSED] test_granular
[06:37:59] [PASSED] test_unique
[06:37:59] [PASSED] test_overlap
[06:37:59] [PASSED] test_reusable
[06:37:59] [PASSED] test_too_big
[06:37:59] [PASSED] test_flush
[06:37:59] [PASSED] test_lookup
[06:37:59] [PASSED] test_data
[06:37:59] [PASSED] test_class
[06:37:59] ===================== [PASSED] guc_buf =====================
[06:37:59] =================== guc_dbm (7 subtests) ===================
[06:37:59] [PASSED] test_empty
[06:37:59] [PASSED] test_default
[06:37:59] ======================== test_size  ========================
[06:37:59] [PASSED] 4
[06:37:59] [PASSED] 8
[06:37:59] [PASSED] 32
[06:37:59] [PASSED] 256
[06:37:59] ==================== [PASSED] test_size ====================
[06:37:59] ======================= test_reuse  ========================
[06:37:59] [PASSED] 4
[06:37:59] [PASSED] 8
[06:37:59] [PASSED] 32
[06:37:59] [PASSED] 256
[06:37:59] =================== [PASSED] test_reuse ====================
[06:37:59] =================== test_range_overlap  ====================
[06:37:59] [PASSED] 4
[06:37:59] [PASSED] 8
[06:37:59] [PASSED] 32
[06:37:59] [PASSED] 256
[06:37:59] =============== [PASSED] test_range_overlap ================
[06:37:59] =================== test_range_compact  ====================
[06:37:59] [PASSED] 4
[06:37:59] [PASSED] 8
[06:37:59] [PASSED] 32
[06:37:59] [PASSED] 256
[06:37:59] =============== [PASSED] test_range_compact ================
[06:37:59] ==================== test_range_spare  =====================
[06:37:59] [PASSED] 4
[06:37:59] [PASSED] 8
[06:37:59] [PASSED] 32
[06:37:59] [PASSED] 256
[06:37:59] ================ [PASSED] test_range_spare =================
[06:37:59] ===================== [PASSED] guc_dbm =====================
[06:37:59] =================== guc_idm (6 subtests) ===================
[06:37:59] [PASSED] bad_init
[06:37:59] [PASSED] no_init
[06:37:59] [PASSED] init_fini
[06:37:59] [PASSED] check_used
[06:37:59] [PASSED] check_quota
[06:37:59] [PASSED] check_all
[06:37:59] ===================== [PASSED] guc_idm =====================
[06:37:59] ================== no_relay (3 subtests) ===================
[06:37:59] [PASSED] xe_drops_guc2pf_if_not_ready
[06:37:59] [PASSED] xe_drops_guc2vf_if_not_ready
[06:37:59] [PASSED] xe_rejects_send_if_not_ready
[06:37:59] ==================== [PASSED] no_relay =====================
[06:37:59] ================== pf_relay (14 subtests) ==================
[06:37:59] [PASSED] pf_rejects_guc2pf_too_short
[06:37:59] [PASSED] pf_rejects_guc2pf_too_long
[06:37:59] [PASSED] pf_rejects_guc2pf_no_payload
[06:37:59] [PASSED] pf_fails_no_payload
[06:37:59] [PASSED] pf_fails_bad_origin
[06:37:59] [PASSED] pf_fails_bad_type
[06:37:59] [PASSED] pf_txn_reports_error
[06:37:59] [PASSED] pf_txn_sends_pf2guc
[06:37:59] [PASSED] pf_sends_pf2guc
[06:37:59] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[06:37:59] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[06:37:59] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[06:37:59] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[06:37:59] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[06:37:59] ==================== [PASSED] pf_relay =====================
[06:37:59] ================== vf_relay (3 subtests) ===================
[06:37:59] [PASSED] vf_rejects_guc2vf_too_short
[06:37:59] [PASSED] vf_rejects_guc2vf_too_long
[06:37:59] [PASSED] vf_rejects_guc2vf_no_payload
[06:37:59] ==================== [PASSED] vf_relay =====================
[06:37:59] ================ pf_gt_config (9 subtests) =================
[06:37:59] [PASSED] fair_contexts_1vf
[06:37:59] [PASSED] fair_doorbells_1vf
[06:37:59] [PASSED] fair_ggtt_1vf
[06:37:59] ====================== fair_vram_1vf  ======================
[06:37:59] [PASSED] 3.50 GiB
[06:37:59] [PASSED] 11.5 GiB
[06:37:59] [PASSED] 15.5 GiB
[06:37:59] [PASSED] 31.5 GiB
[06:37:59] [PASSED] 63.5 GiB
[06:37:59] [PASSED] 1.91 GiB
[06:37:59] ================== [PASSED] fair_vram_1vf ==================
[06:37:59] ================ fair_vram_1vf_admin_only  =================
[06:37:59] [PASSED] 3.50 GiB
[06:37:59] [PASSED] 11.5 GiB
[06:37:59] [PASSED] 15.5 GiB
[06:37:59] [PASSED] 31.5 GiB
[06:37:59] [PASSED] 63.5 GiB
[06:37:59] [PASSED] 1.91 GiB
[06:37:59] ============ [PASSED] fair_vram_1vf_admin_only =============
[06:37:59] ====================== fair_contexts  ======================
[06:37:59] [PASSED] 1 VF
[06:37:59] [PASSED] 2 VFs
[06:37:59] [PASSED] 3 VFs
[06:37:59] [PASSED] 4 VFs
[06:37:59] [PASSED] 5 VFs
[06:37:59] [PASSED] 6 VFs
[06:37:59] [PASSED] 7 VFs
[06:37:59] [PASSED] 8 VFs
[06:37:59] [PASSED] 9 VFs
[06:37:59] [PASSED] 10 VFs
[06:37:59] [PASSED] 11 VFs
[06:37:59] [PASSED] 12 VFs
[06:37:59] [PASSED] 13 VFs
[06:37:59] [PASSED] 14 VFs
[06:37:59] [PASSED] 15 VFs
[06:37:59] [PASSED] 16 VFs
[06:37:59] [PASSED] 17 VFs
[06:37:59] [PASSED] 18 VFs
[06:37:59] [PASSED] 19 VFs
[06:37:59] [PASSED] 20 VFs
[06:37:59] [PASSED] 21 VFs
[06:37:59] [PASSED] 22 VFs
[06:37:59] [PASSED] 23 VFs
[06:37:59] [PASSED] 24 VFs
[06:37:59] [PASSED] 25 VFs
[06:37:59] [PASSED] 26 VFs
[06:37:59] [PASSED] 27 VFs
[06:37:59] [PASSED] 28 VFs
[06:37:59] [PASSED] 29 VFs
[06:37:59] [PASSED] 30 VFs
[06:37:59] [PASSED] 31 VFs
[06:37:59] [PASSED] 32 VFs
[06:37:59] [PASSED] 33 VFs
[06:37:59] [PASSED] 34 VFs
[06:37:59] [PASSED] 35 VFs
[06:37:59] [PASSED] 36 VFs
[06:37:59] [PASSED] 37 VFs
[06:37:59] [PASSED] 38 VFs
[06:37:59] [PASSED] 39 VFs
[06:37:59] [PASSED] 40 VFs
[06:37:59] [PASSED] 41 VFs
[06:37:59] [PASSED] 42 VFs
[06:37:59] [PASSED] 43 VFs
[06:37:59] [PASSED] 44 VFs
[06:37:59] [PASSED] 45 VFs
[06:37:59] [PASSED] 46 VFs
[06:37:59] [PASSED] 47 VFs
[06:37:59] [PASSED] 48 VFs
[06:37:59] [PASSED] 49 VFs
[06:37:59] [PASSED] 50 VFs
[06:37:59] [PASSED] 51 VFs
[06:37:59] [PASSED] 52 VFs
[06:37:59] [PASSED] 53 VFs
[06:37:59] [PASSED] 54 VFs
[06:37:59] [PASSED] 55 VFs
[06:37:59] [PASSED] 56 VFs
[06:37:59] [PASSED] 57 VFs
[06:37:59] [PASSED] 58 VFs
[06:37:59] [PASSED] 59 VFs
[06:37:59] [PASSED] 60 VFs
[06:37:59] [PASSED] 61 VFs
[06:37:59] [PASSED] 62 VFs
[06:37:59] [PASSED] 63 VFs
[06:37:59] ================== [PASSED] fair_contexts ==================
[06:37:59] ===================== fair_doorbells  ======================
[06:37:59] [PASSED] 1 VF
[06:37:59] [PASSED] 2 VFs
[06:37:59] [PASSED] 3 VFs
[06:37:59] [PASSED] 4 VFs
[06:37:59] [PASSED] 5 VFs
[06:37:59] [PASSED] 6 VFs
[06:37:59] [PASSED] 7 VFs
[06:37:59] [PASSED] 8 VFs
[06:37:59] [PASSED] 9 VFs
[06:37:59] [PASSED] 10 VFs
[06:37:59] [PASSED] 11 VFs
[06:37:59] [PASSED] 12 VFs
[06:37:59] [PASSED] 13 VFs
[06:37:59] [PASSED] 14 VFs
[06:37:59] [PASSED] 15 VFs
[06:37:59] [PASSED] 16 VFs
[06:37:59] [PASSED] 17 VFs
[06:37:59] [PASSED] 18 VFs
[06:37:59] [PASSED] 19 VFs
[06:37:59] [PASSED] 20 VFs
[06:37:59] [PASSED] 21 VFs
[06:37:59] [PASSED] 22 VFs
[06:37:59] [PASSED] 23 VFs
[06:37:59] [PASSED] 24 VFs
[06:37:59] [PASSED] 25 VFs
[06:37:59] [PASSED] 26 VFs
[06:37:59] [PASSED] 27 VFs
[06:37:59] [PASSED] 28 VFs
[06:37:59] [PASSED] 29 VFs
[06:37:59] [PASSED] 30 VFs
[06:37:59] [PASSED] 31 VFs
[06:37:59] [PASSED] 32 VFs
[06:37:59] [PASSED] 33 VFs
[06:37:59] [PASSED] 34 VFs
[06:37:59] [PASSED] 35 VFs
[06:37:59] [PASSED] 36 VFs
[06:37:59] [PASSED] 37 VFs
[06:37:59] [PASSED] 38 VFs
[06:37:59] [PASSED] 39 VFs
[06:37:59] [PASSED] 40 VFs
[06:37:59] [PASSED] 41 VFs
[06:37:59] [PASSED] 42 VFs
[06:37:59] [PASSED] 43 VFs
[06:37:59] [PASSED] 44 VFs
[06:37:59] [PASSED] 45 VFs
[06:37:59] [PASSED] 46 VFs
[06:37:59] [PASSED] 47 VFs
[06:37:59] [PASSED] 48 VFs
[06:37:59] [PASSED] 49 VFs
[06:37:59] [PASSED] 50 VFs
[06:37:59] [PASSED] 51 VFs
[06:37:59] [PASSED] 52 VFs
[06:37:59] [PASSED] 53 VFs
[06:37:59] [PASSED] 54 VFs
[06:37:59] [PASSED] 55 VFs
[06:37:59] [PASSED] 56 VFs
[06:37:59] [PASSED] 57 VFs
[06:37:59] [PASSED] 58 VFs
[06:37:59] [PASSED] 59 VFs
[06:37:59] [PASSED] 60 VFs
[06:37:59] [PASSED] 61 VFs
[06:37:59] [PASSED] 62 VFs
[06:37:59] [PASSED] 63 VFs
[06:37:59] ================= [PASSED] fair_doorbells ==================
[06:37:59] ======================== fair_ggtt  ========================
[06:37:59] [PASSED] 1 VF
[06:37:59] [PASSED] 2 VFs
[06:37:59] [PASSED] 3 VFs
[06:37:59] [PASSED] 4 VFs
[06:37:59] [PASSED] 5 VFs
[06:37:59] [PASSED] 6 VFs
[06:37:59] [PASSED] 7 VFs
[06:37:59] [PASSED] 8 VFs
[06:37:59] [PASSED] 9 VFs
[06:37:59] [PASSED] 10 VFs
[06:37:59] [PASSED] 11 VFs
[06:37:59] [PASSED] 12 VFs
[06:37:59] [PASSED] 13 VFs
[06:37:59] [PASSED] 14 VFs
[06:37:59] [PASSED] 15 VFs
[06:37:59] [PASSED] 16 VFs
[06:37:59] [PASSED] 17 VFs
[06:37:59] [PASSED] 18 VFs
[06:37:59] [PASSED] 19 VFs
[06:37:59] [PASSED] 20 VFs
[06:37:59] [PASSED] 21 VFs
[06:37:59] [PASSED] 22 VFs
[06:37:59] [PASSED] 23 VFs
[06:37:59] [PASSED] 24 VFs
[06:37:59] [PASSED] 25 VFs
[06:37:59] [PASSED] 26 VFs
[06:37:59] [PASSED] 27 VFs
[06:37:59] [PASSED] 28 VFs
[06:37:59] [PASSED] 29 VFs
[06:37:59] [PASSED] 30 VFs
[06:37:59] [PASSED] 31 VFs
[06:37:59] [PASSED] 32 VFs
[06:37:59] [PASSED] 33 VFs
[06:37:59] [PASSED] 34 VFs
[06:37:59] [PASSED] 35 VFs
[06:37:59] [PASSED] 36 VFs
[06:37:59] [PASSED] 37 VFs
[06:37:59] [PASSED] 38 VFs
[06:37:59] [PASSED] 39 VFs
[06:37:59] [PASSED] 40 VFs
[06:37:59] [PASSED] 41 VFs
[06:37:59] [PASSED] 42 VFs
[06:37:59] [PASSED] 43 VFs
[06:37:59] [PASSED] 44 VFs
[06:37:59] [PASSED] 45 VFs
[06:37:59] [PASSED] 46 VFs
[06:37:59] [PASSED] 47 VFs
[06:37:59] [PASSED] 48 VFs
[06:37:59] [PASSED] 49 VFs
[06:37:59] [PASSED] 50 VFs
[06:37:59] [PASSED] 51 VFs
[06:37:59] [PASSED] 52 VFs
[06:37:59] [PASSED] 53 VFs
[06:37:59] [PASSED] 54 VFs
[06:37:59] [PASSED] 55 VFs
[06:37:59] [PASSED] 56 VFs
[06:37:59] [PASSED] 57 VFs
[06:37:59] [PASSED] 58 VFs
[06:37:59] [PASSED] 59 VFs
[06:37:59] [PASSED] 60 VFs
[06:37:59] [PASSED] 61 VFs
[06:37:59] [PASSED] 62 VFs
[06:37:59] [PASSED] 63 VFs
[06:37:59] ==================== [PASSED] fair_ggtt ====================
[06:37:59] ======================== fair_vram  ========================
[06:37:59] [PASSED] 1 VF
[06:37:59] [PASSED] 2 VFs
[06:37:59] [PASSED] 3 VFs
[06:37:59] [PASSED] 4 VFs
[06:37:59] [PASSED] 5 VFs
[06:37:59] [PASSED] 6 VFs
[06:37:59] [PASSED] 7 VFs
[06:37:59] [PASSED] 8 VFs
[06:37:59] [PASSED] 9 VFs
[06:37:59] [PASSED] 10 VFs
[06:37:59] [PASSED] 11 VFs
[06:37:59] [PASSED] 12 VFs
[06:37:59] [PASSED] 13 VFs
[06:37:59] [PASSED] 14 VFs
[06:37:59] [PASSED] 15 VFs
[06:37:59] [PASSED] 16 VFs
[06:37:59] [PASSED] 17 VFs
[06:37:59] [PASSED] 18 VFs
[06:37:59] [PASSED] 19 VFs
[06:37:59] [PASSED] 20 VFs
[06:37:59] [PASSED] 21 VFs
[06:37:59] [PASSED] 22 VFs
[06:37:59] [PASSED] 23 VFs
[06:37:59] [PASSED] 24 VFs
[06:37:59] [PASSED] 25 VFs
[06:37:59] [PASSED] 26 VFs
[06:37:59] [PASSED] 27 VFs
[06:37:59] [PASSED] 28 VFs
[06:37:59] [PASSED] 29 VFs
[06:37:59] [PASSED] 30 VFs
[06:37:59] [PASSED] 31 VFs
[06:37:59] [PASSED] 32 VFs
[06:37:59] [PASSED] 33 VFs
[06:37:59] [PASSED] 34 VFs
[06:37:59] [PASSED] 35 VFs
[06:37:59] [PASSED] 36 VFs
[06:37:59] [PASSED] 37 VFs
[06:37:59] [PASSED] 38 VFs
[06:37:59] [PASSED] 39 VFs
[06:37:59] [PASSED] 40 VFs
[06:37:59] [PASSED] 41 VFs
[06:37:59] [PASSED] 42 VFs
[06:37:59] [PASSED] 43 VFs
[06:37:59] [PASSED] 44 VFs
[06:37:59] [PASSED] 45 VFs
[06:37:59] [PASSED] 46 VFs
[06:37:59] [PASSED] 47 VFs
[06:37:59] [PASSED] 48 VFs
[06:37:59] [PASSED] 49 VFs
[06:37:59] [PASSED] 50 VFs
[06:37:59] [PASSED] 51 VFs
[06:37:59] [PASSED] 52 VFs
[06:37:59] [PASSED] 53 VFs
[06:37:59] [PASSED] 54 VFs
[06:37:59] [PASSED] 55 VFs
[06:37:59] [PASSED] 56 VFs
[06:37:59] [PASSED] 57 VFs
[06:37:59] [PASSED] 58 VFs
[06:37:59] [PASSED] 59 VFs
[06:37:59] [PASSED] 60 VFs
[06:37:59] [PASSED] 61 VFs
[06:37:59] [PASSED] 62 VFs
[06:37:59] [PASSED] 63 VFs
[06:37:59] ==================== [PASSED] fair_vram ====================
[06:37:59] ================== [PASSED] pf_gt_config ===================
[06:37:59] ===================== lmtt (1 subtest) =====================
[06:37:59] ======================== test_ops  =========================
[06:37:59] [PASSED] 2-level
[06:37:59] [PASSED] multi-level
[06:37:59] ==================== [PASSED] test_ops =====================
[06:37:59] ====================== [PASSED] lmtt =======================
[06:37:59] ================= pf_service (11 subtests) =================
[06:37:59] [PASSED] pf_negotiate_any
[06:37:59] [PASSED] pf_negotiate_base_match
[06:37:59] [PASSED] pf_negotiate_base_newer
[06:37:59] [PASSED] pf_negotiate_base_next
[06:37:59] [SKIPPED] pf_negotiate_base_older (no older minor)
[06:37:59] [PASSED] pf_negotiate_base_prev
[06:37:59] [PASSED] pf_negotiate_latest_match
[06:37:59] [PASSED] pf_negotiate_latest_newer
[06:37:59] [PASSED] pf_negotiate_latest_next
[06:37:59] [SKIPPED] pf_negotiate_latest_older (no older minor)
[06:37:59] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[06:37:59] =================== [PASSED] pf_service ====================
[06:37:59] ================= xe_guc_g2g (2 subtests) ==================
[06:37:59] ============== xe_live_guc_g2g_kunit_default  ==============
[06:37:59] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[06:37:59] ============== xe_live_guc_g2g_kunit_allmem  ===============
[06:37:59] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[06:37:59] =================== [SKIPPED] xe_guc_g2g ===================
[06:37:59] =================== xe_mocs (2 subtests) ===================
[06:37:59] ================ xe_live_mocs_kernel_kunit  ================
[06:37:59] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[06:37:59] ================ xe_live_mocs_reset_kunit  =================
[06:37:59] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[06:37:59] ==================== [SKIPPED] xe_mocs =====================
[06:37:59] ================= xe_migrate (2 subtests) ==================
[06:37:59] ================= xe_migrate_sanity_kunit  =================
[06:37:59] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[06:37:59] ================== xe_validate_ccs_kunit  ==================
[06:37:59] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[06:37:59] =================== [SKIPPED] xe_migrate ===================
[06:37:59] ================== xe_dma_buf (1 subtest) ==================
[06:37:59] ==================== xe_dma_buf_kunit  =====================
[06:37:59] ================ [SKIPPED] xe_dma_buf_kunit ================
[06:37:59] =================== [SKIPPED] xe_dma_buf ===================
[06:37:59] ================= xe_bo_shrink (1 subtest) =================
[06:37:59] =================== xe_bo_shrink_kunit  ====================
[06:37:59] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[06:37:59] ================== [SKIPPED] xe_bo_shrink ==================
[06:37:59] ==================== xe_bo (2 subtests) ====================
[06:37:59] ================== xe_ccs_migrate_kunit  ===================
[06:37:59] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[06:37:59] ==================== xe_bo_evict_kunit  ====================
[06:37:59] =============== [SKIPPED] xe_bo_evict_kunit ================
[06:37:59] ===================== [SKIPPED] xe_bo ======================
[06:37:59] ==================== args (13 subtests) ====================
[06:37:59] [PASSED] count_args_test
[06:37:59] [PASSED] call_args_example
[06:37:59] [PASSED] call_args_test
[06:37:59] [PASSED] drop_first_arg_example
[06:37:59] [PASSED] drop_first_arg_test
[06:37:59] [PASSED] first_arg_example
[06:37:59] [PASSED] first_arg_test
[06:37:59] [PASSED] last_arg_example
[06:37:59] [PASSED] last_arg_test
[06:37:59] [PASSED] pick_arg_example
[06:37:59] [PASSED] if_args_example
[06:37:59] [PASSED] if_args_test
[06:37:59] [PASSED] sep_comma_example
[06:37:59] ====================== [PASSED] args =======================
[06:37:59] =================== xe_pci (3 subtests) ====================
[06:37:59] ==================== check_graphics_ip  ====================
[06:37:59] [PASSED] 12.00 Xe_LP
[06:37:59] [PASSED] 12.10 Xe_LP+
[06:37:59] [PASSED] 12.55 Xe_HPG
[06:37:59] [PASSED] 12.60 Xe_HPC
[06:37:59] [PASSED] 12.70 Xe_LPG
[06:37:59] [PASSED] 12.71 Xe_LPG
[06:37:59] [PASSED] 12.74 Xe_LPG+
[06:37:59] [PASSED] 20.01 Xe2_HPG
[06:37:59] [PASSED] 20.02 Xe2_HPG
[06:37:59] [PASSED] 20.04 Xe2_LPG
[06:37:59] [PASSED] 30.00 Xe3_LPG
[06:37:59] [PASSED] 30.01 Xe3_LPG
[06:37:59] [PASSED] 30.03 Xe3_LPG
[06:37:59] [PASSED] 30.04 Xe3_LPG
[06:37:59] [PASSED] 30.05 Xe3_LPG
[06:37:59] [PASSED] 35.10 Xe3p_LPG
[06:37:59] [PASSED] 35.11 Xe3p_XPC
[06:37:59] ================ [PASSED] check_graphics_ip ================
[06:37:59] ===================== check_media_ip  ======================
[06:37:59] [PASSED] 12.00 Xe_M
[06:37:59] [PASSED] 12.55 Xe_HPM
[06:37:59] [PASSED] 13.00 Xe_LPM+
[06:37:59] [PASSED] 13.01 Xe2_HPM
[06:37:59] [PASSED] 20.00 Xe2_LPM
[06:37:59] [PASSED] 30.00 Xe3_LPM
[06:37:59] [PASSED] 30.02 Xe3_LPM
[06:37:59] [PASSED] 35.00 Xe3p_LPM
[06:37:59] [PASSED] 35.03 Xe3p_HPM
[06:37:59] ================= [PASSED] check_media_ip ==================
[06:37:59] =================== check_platform_desc  ===================
[06:37:59] [PASSED] 0x9A60 (TIGERLAKE)
[06:37:59] [PASSED] 0x9A68 (TIGERLAKE)
[06:37:59] [PASSED] 0x9A70 (TIGERLAKE)
[06:37:59] [PASSED] 0x9A40 (TIGERLAKE)
[06:37:59] [PASSED] 0x9A49 (TIGERLAKE)
[06:37:59] [PASSED] 0x9A59 (TIGERLAKE)
[06:37:59] [PASSED] 0x9A78 (TIGERLAKE)
[06:37:59] [PASSED] 0x9AC0 (TIGERLAKE)
[06:37:59] [PASSED] 0x9AC9 (TIGERLAKE)
[06:37:59] [PASSED] 0x9AD9 (TIGERLAKE)
[06:37:59] [PASSED] 0x9AF8 (TIGERLAKE)
[06:37:59] [PASSED] 0x4C80 (ROCKETLAKE)
[06:37:59] [PASSED] 0x4C8A (ROCKETLAKE)
[06:37:59] [PASSED] 0x4C8B (ROCKETLAKE)
[06:37:59] [PASSED] 0x4C8C (ROCKETLAKE)
[06:37:59] [PASSED] 0x4C90 (ROCKETLAKE)
[06:37:59] [PASSED] 0x4C9A (ROCKETLAKE)
[06:37:59] [PASSED] 0x4680 (ALDERLAKE_S)
[06:37:59] [PASSED] 0x4682 (ALDERLAKE_S)
[06:37:59] [PASSED] 0x4688 (ALDERLAKE_S)
[06:37:59] [PASSED] 0x468A (ALDERLAKE_S)
[06:37:59] [PASSED] 0x468B (ALDERLAKE_S)
[06:37:59] [PASSED] 0x4690 (ALDERLAKE_S)
[06:37:59] [PASSED] 0x4692 (ALDERLAKE_S)
[06:37:59] [PASSED] 0x4693 (ALDERLAKE_S)
[06:37:59] [PASSED] 0x46A0 (ALDERLAKE_P)
[06:37:59] [PASSED] 0x46A1 (ALDERLAKE_P)
[06:37:59] [PASSED] 0x46A2 (ALDERLAKE_P)
[06:37:59] [PASSED] 0x46A3 (ALDERLAKE_P)
[06:37:59] [PASSED] 0x46A6 (ALDERLAKE_P)
[06:37:59] [PASSED] 0x46A8 (ALDERLAKE_P)
[06:37:59] [PASSED] 0x46AA (ALDERLAKE_P)
[06:37:59] [PASSED] 0x462A (ALDERLAKE_P)
[06:37:59] [PASSED] 0x4626 (ALDERLAKE_P)
[06:37:59] [PASSED] 0x4628 (ALDERLAKE_P)
[06:37:59] [PASSED] 0x46B0 (ALDERLAKE_P)
[06:37:59] [PASSED] 0x46B1 (ALDERLAKE_P)
[06:37:59] [PASSED] 0x46B2 (ALDERLAKE_P)
[06:37:59] [PASSED] 0x46B3 (ALDERLAKE_P)
[06:37:59] [PASSED] 0x46C0 (ALDERLAKE_P)
[06:37:59] [PASSED] 0x46C1 (ALDERLAKE_P)
[06:37:59] [PASSED] 0x46C2 (ALDERLAKE_P)
[06:37:59] [PASSED] 0x46C3 (ALDERLAKE_P)
[06:37:59] [PASSED] 0x46D0 (ALDERLAKE_N)
[06:37:59] [PASSED] 0x46D1 (ALDERLAKE_N)
[06:37:59] [PASSED] 0x46D2 (ALDERLAKE_N)
[06:37:59] [PASSED] 0x46D3 (ALDERLAKE_N)
[06:37:59] [PASSED] 0x46D4 (ALDERLAKE_N)
[06:37:59] [PASSED] 0xA721 (ALDERLAKE_P)
[06:37:59] [PASSED] 0xA7A1 (ALDERLAKE_P)
[06:37:59] [PASSED] 0xA7A9 (ALDERLAKE_P)
[06:37:59] [PASSED] 0xA7AC (ALDERLAKE_P)
[06:37:59] [PASSED] 0xA7AD (ALDERLAKE_P)
[06:37:59] [PASSED] 0xA720 (ALDERLAKE_P)
[06:37:59] [PASSED] 0xA7A0 (ALDERLAKE_P)
[06:37:59] [PASSED] 0xA7A8 (ALDERLAKE_P)
[06:37:59] [PASSED] 0xA7AA (ALDERLAKE_P)
[06:37:59] [PASSED] 0xA7AB (ALDERLAKE_P)
[06:37:59] [PASSED] 0xA780 (ALDERLAKE_S)
[06:37:59] [PASSED] 0xA781 (ALDERLAKE_S)
[06:37:59] [PASSED] 0xA782 (ALDERLAKE_S)
[06:37:59] [PASSED] 0xA783 (ALDERLAKE_S)
[06:37:59] [PASSED] 0xA788 (ALDERLAKE_S)
[06:37:59] [PASSED] 0xA789 (ALDERLAKE_S)
[06:37:59] [PASSED] 0xA78A (ALDERLAKE_S)
[06:37:59] [PASSED] 0xA78B (ALDERLAKE_S)
[06:37:59] [PASSED] 0x4905 (DG1)
[06:37:59] [PASSED] 0x4906 (DG1)
[06:37:59] [PASSED] 0x4907 (DG1)
[06:37:59] [PASSED] 0x4908 (DG1)
[06:37:59] [PASSED] 0x4909 (DG1)
[06:37:59] [PASSED] 0x56C0 (DG2)
[06:37:59] [PASSED] 0x56C2 (DG2)
[06:37:59] [PASSED] 0x56C1 (DG2)
[06:37:59] [PASSED] 0x7D51 (METEORLAKE)
[06:37:59] [PASSED] 0x7DD1 (METEORLAKE)
[06:37:59] [PASSED] 0x7D41 (METEORLAKE)
[06:37:59] [PASSED] 0x7D67 (METEORLAKE)
[06:37:59] [PASSED] 0xB640 (METEORLAKE)
[06:37:59] [PASSED] 0x56A0 (DG2)
[06:37:59] [PASSED] 0x56A1 (DG2)
[06:37:59] [PASSED] 0x56A2 (DG2)
[06:37:59] [PASSED] 0x56BE (DG2)
[06:37:59] [PASSED] 0x56BF (DG2)
[06:37:59] [PASSED] 0x5690 (DG2)
[06:37:59] [PASSED] 0x5691 (DG2)
[06:37:59] [PASSED] 0x5692 (DG2)
[06:37:59] [PASSED] 0x56A5 (DG2)
[06:37:59] [PASSED] 0x56A6 (DG2)
[06:37:59] [PASSED] 0x56B0 (DG2)
[06:37:59] [PASSED] 0x56B1 (DG2)
[06:37:59] [PASSED] 0x56BA (DG2)
[06:37:59] [PASSED] 0x56BB (DG2)
[06:37:59] [PASSED] 0x56BC (DG2)
[06:37:59] [PASSED] 0x56BD (DG2)
[06:37:59] [PASSED] 0x5693 (DG2)
[06:37:59] [PASSED] 0x5694 (DG2)
[06:37:59] [PASSED] 0x5695 (DG2)
[06:37:59] [PASSED] 0x56A3 (DG2)
[06:37:59] [PASSED] 0x56A4 (DG2)
[06:37:59] [PASSED] 0x56B2 (DG2)
[06:37:59] [PASSED] 0x56B3 (DG2)
[06:37:59] [PASSED] 0x5696 (DG2)
[06:37:59] [PASSED] 0x5697 (DG2)
[06:37:59] [PASSED] 0xB69 (PVC)
[06:37:59] [PASSED] 0xB6E (PVC)
[06:37:59] [PASSED] 0xBD4 (PVC)
[06:37:59] [PASSED] 0xBD5 (PVC)
[06:37:59] [PASSED] 0xBD6 (PVC)
[06:37:59] [PASSED] 0xBD7 (PVC)
[06:37:59] [PASSED] 0xBD8 (PVC)
[06:37:59] [PASSED] 0xBD9 (PVC)
[06:37:59] [PASSED] 0xBDA (PVC)
[06:37:59] [PASSED] 0xBDB (PVC)
[06:37:59] [PASSED] 0xBE0 (PVC)
[06:37:59] [PASSED] 0xBE1 (PVC)
[06:37:59] [PASSED] 0xBE5 (PVC)
[06:37:59] [PASSED] 0x7D40 (METEORLAKE)
[06:37:59] [PASSED] 0x7D45 (METEORLAKE)
[06:37:59] [PASSED] 0x7D55 (METEORLAKE)
[06:37:59] [PASSED] 0x7D60 (METEORLAKE)
[06:37:59] [PASSED] 0x7DD5 (METEORLAKE)
[06:37:59] [PASSED] 0x6420 (LUNARLAKE)
[06:37:59] [PASSED] 0x64A0 (LUNARLAKE)
[06:37:59] [PASSED] 0x64B0 (LUNARLAKE)
[06:37:59] [PASSED] 0xE202 (BATTLEMAGE)
[06:37:59] [PASSED] 0xE209 (BATTLEMAGE)
[06:37:59] [PASSED] 0xE20B (BATTLEMAGE)
[06:37:59] [PASSED] 0xE20C (BATTLEMAGE)
[06:37:59] [PASSED] 0xE20D (BATTLEMAGE)
[06:37:59] [PASSED] 0xE210 (BATTLEMAGE)
[06:37:59] [PASSED] 0xE211 (BATTLEMAGE)
[06:37:59] [PASSED] 0xE212 (BATTLEMAGE)
[06:37:59] [PASSED] 0xE216 (BATTLEMAGE)
[06:37:59] [PASSED] 0xE220 (BATTLEMAGE)
[06:37:59] [PASSED] 0xE221 (BATTLEMAGE)
[06:37:59] [PASSED] 0xE222 (BATTLEMAGE)
[06:37:59] [PASSED] 0xE223 (BATTLEMAGE)
[06:37:59] [PASSED] 0xB080 (PANTHERLAKE)
[06:37:59] [PASSED] 0xB081 (PANTHERLAKE)
[06:37:59] [PASSED] 0xB082 (PANTHERLAKE)
[06:37:59] [PASSED] 0xB083 (PANTHERLAKE)
[06:37:59] [PASSED] 0xB084 (PANTHERLAKE)
[06:37:59] [PASSED] 0xB085 (PANTHERLAKE)
[06:37:59] [PASSED] 0xB086 (PANTHERLAKE)
[06:37:59] [PASSED] 0xB087 (PANTHERLAKE)
[06:37:59] [PASSED] 0xB08F (PANTHERLAKE)
[06:37:59] [PASSED] 0xB090 (PANTHERLAKE)
[06:37:59] [PASSED] 0xB0A0 (PANTHERLAKE)
[06:37:59] [PASSED] 0xB0B0 (PANTHERLAKE)
[06:37:59] [PASSED] 0xFD80 (PANTHERLAKE)
[06:37:59] [PASSED] 0xFD81 (PANTHERLAKE)
[06:37:59] [PASSED] 0xD740 (NOVALAKE_S)
[06:37:59] [PASSED] 0xD741 (NOVALAKE_S)
[06:37:59] [PASSED] 0xD742 (NOVALAKE_S)
[06:37:59] [PASSED] 0xD743 (NOVALAKE_S)
[06:37:59] [PASSED] 0xD745 (NOVALAKE_S)
[06:37:59] [PASSED] 0xD74A (NOVALAKE_S)
[06:37:59] [PASSED] 0xD74B (NOVALAKE_S)
[06:37:59] [PASSED] 0x674C (CRESCENTISLAND)
[06:37:59] [PASSED] 0x674D (CRESCENTISLAND)
[06:37:59] [PASSED] 0x674E (CRESCENTISLAND)
[06:37:59] [PASSED] 0x674F (CRESCENTISLAND)
[06:37:59] [PASSED] 0x6750 (CRESCENTISLAND)
[06:37:59] [PASSED] 0xD750 (NOVALAKE_P)
[06:37:59] [PASSED] 0xD751 (NOVALAKE_P)
[06:37:59] [PASSED] 0xD752 (NOVALAKE_P)
[06:37:59] [PASSED] 0xD753 (NOVALAKE_P)
[06:37:59] [PASSED] 0xD754 (NOVALAKE_P)
[06:37:59] [PASSED] 0xD755 (NOVALAKE_P)
[06:37:59] [PASSED] 0xD756 (NOVALAKE_P)
[06:37:59] [PASSED] 0xD757 (NOVALAKE_P)
[06:37:59] [PASSED] 0xD75F (NOVALAKE_P)
[06:37:59] =============== [PASSED] check_platform_desc ===============
[06:37:59] ===================== [PASSED] xe_pci ======================
[06:37:59] ============= xe_rtp_tables_test (5 subtests) ==============
[06:37:59] ================== xe_rtp_table_gt_test  ===================
[06:37:59] [PASSED] gt_was/14011060649
[06:37:59] [PASSED] gt_was/14011059788
[06:37:59] [PASSED] gt_was/14015795083
[06:37:59] [PASSED] gt_was/16021867713
[06:37:59] [PASSED] gt_was/14019449301
[06:37:59] [PASSED] gt_was/16028005424
[06:37:59] [PASSED] gt_was/14026578760
[06:37:59] [PASSED] gt_was/1409420604
[06:37:59] [PASSED] gt_was/1408615072
[06:37:59] [PASSED] gt_was/22010523718
[06:37:59] [PASSED] gt_was/14011006942
[06:37:59] [PASSED] gt_was/14014830051
[06:37:59] [PASSED] gt_was/18018781329
[06:37:59] [PASSED] gt_was/1509235366
[06:37:59] [PASSED] gt_was/18018781329
[06:37:59] [PASSED] gt_was/16016694945
[06:37:59] [PASSED] gt_was/14018575942
[06:37:59] [PASSED] gt_was/22016670082
[06:37:59] [PASSED] gt_was/22016670082
[06:37:59] [PASSED] gt_was/14017421178
[06:37:59] [PASSED] gt_was/16025250150
[06:37:59] [PASSED] gt_was/14021871409
[06:37:59] [PASSED] gt_was/16021865536
[06:37:59] [PASSED] gt_was/14021486841
[06:37:59] [PASSED] gt_was/14025160223
[06:37:59] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[06:37:59] [PASSED] gt_was/14025635424
[06:37:59] [PASSED] gt_was/16028005424
[06:37:59] ============== [PASSED] xe_rtp_table_gt_test ===============
[06:37:59] ================== xe_rtp_table_gt_test  ===================
[06:37:59] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[06:37:59] [PASSED] gt_tunings/Tuning: 32B Access Enable
[06:37:59] [PASSED] gt_tunings/Tuning: L3 cache
[06:37:59] [PASSED] gt_tunings/Tuning: L3 cache - media
[06:37:59] [PASSED] gt_tunings/Tuning: Compression Overfetch
[06:37:59] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[06:37:59] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[06:37:59] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[06:37:59] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[06:37:59] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[06:37:59] [PASSED] gt_tunings/Tuning: Stateless compression control
[06:37:59] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[06:37:59] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[06:37:59] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[06:37:59] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[06:37:59] ============== [PASSED] xe_rtp_table_gt_test ===============
[06:37:59] ================== xe_rtp_table_oob_test  ==================
[06:37:59] [PASSED] oob_was/1607983814
[06:37:59] [PASSED] oob_was/16010904313
[06:37:59] [PASSED] oob_was/18022495364
[06:37:59] [PASSED] oob_was/22012773006
[06:37:59] [PASSED] oob_was/14014475959
[06:37:59] [PASSED] oob_was/22011391025
[06:37:59] [PASSED] oob_was/22012727170
[06:37:59] [PASSED] oob_was/22012727685
[06:37:59] [PASSED] oob_was/22016596838
[06:37:59] [PASSED] oob_was/18020744125
[06:37:59] [PASSED] oob_was/1409600907
[06:37:59] [PASSED] oob_was/22014953428
[06:37:59] [PASSED] oob_was/16017236439
[06:37:59] [PASSED] oob_was/14019821291
[06:37:59] [PASSED] oob_was/14015076503
[06:37:59] [PASSED] oob_was/14018913170
[06:37:59] [PASSED] oob_was/14018094691
[06:37:59] [PASSED] oob_was/18024947630
[06:37:59] [PASSED] oob_was/16022287689
[06:37:59] [PASSED] oob_was/13011645652
[06:37:59] [PASSED] oob_was/14022293748
[06:37:59] [PASSED] oob_was/22019794406
[06:37:59] [PASSED] oob_was/22019338487
[06:37:59] [PASSED] oob_was/16023588340
[06:37:59] [PASSED] oob_was/14019789679
[06:37:59] [PASSED] oob_was/14022866841
[06:37:59] [PASSED] oob_was/16021333562
[06:37:59] [PASSED] oob_was/14016712196
[06:37:59] [PASSED] oob_was/14015568240
[06:37:59] [PASSED] oob_was/18013179988
[06:37:59] [PASSED] oob_was/1508761755
[06:37:59] [PASSED] oob_was/16023105232
[06:37:59] [PASSED] oob_was/16026508708
[06:37:59] [PASSED] oob_was/14020001231
[06:37:59] [PASSED] oob_was/16023683509
[06:37:59] [PASSED] oob_was/14025515070
[06:37:59] [PASSED] oob_was/15015404425_disable
[06:37:59] [PASSED] oob_was/16026007364
[06:37:59] [PASSED] oob_was/14020316580
[06:37:59] [PASSED] oob_was/14025883347
[06:37:59] [PASSED] oob_was/16029380221
[06:37:59] ============== [PASSED] xe_rtp_table_oob_test ==============
[06:37:59] ================ xe_rtp_table_dev_oob_test  ================
[06:37:59] [PASSED] device_oob_was/22010954014
[06:37:59] [PASSED] device_oob_was/15015404425
[06:37:59] [PASSED] device_oob_was/22019338487_display
[06:37:59] [PASSED] device_oob_was/14022085890
[06:37:59] [PASSED] device_oob_was/14026539277
[06:37:59] [PASSED] device_oob_was/14026633728
[06:37:59] [PASSED] device_oob_was/14026746987
[06:37:59] [PASSED] device_oob_was/14026779378
[06:37:59] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[06:37:59] ========== xe_rtp_table_missing_upper_bound_test  ==========
[06:37:59] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[06:37:59] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[06:37:59] [PASSED] register_whitelist/1806527549
[06:37:59] [PASSED] register_whitelist/allow_read_ctx_timestamp
[06:37:59] [PASSED] register_whitelist/allow_read_queue_timestamp
[06:37:59] [PASSED] register_whitelist/16014440446
[06:37:59] [PASSED] register_whitelist/16017236439
[06:37:59] [PASSED] register_whitelist/16020183090
[06:37:59] [PASSED] register_whitelist/14024997852
[06:37:59] [PASSED] register_whitelist/14024997852
[06:37:59] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[06:37:59] =============== [PASSED] xe_rtp_tables_test ================
[06:37:59] =================== xe_rtp (3 subtests) ====================
[06:37:59] =================== xe_rtp_rules_tests  ====================
[06:37:59] [PASSED] no
[06:37:59] [PASSED] yes
[06:37:59] [PASSED] no-and-no
[06:37:59] [PASSED] no-and-yes
[06:37:59] [PASSED] yes-and-no
[06:37:59] [PASSED] yes-and-yes
[06:37:59] [PASSED] no-or-no
[06:37:59] [PASSED] no-or-yes
[06:37:59] [PASSED] yes-or-no
[06:37:59] [PASSED] yes-or-yes
[06:37:59] [PASSED] no-yes-or-yes-no
[06:37:59] [PASSED] no-yes-or-yes-yes
[06:37:59] [PASSED] yes-yes-or-no-yes
[06:37:59] [PASSED] yes-yes-or-yes-yes
[06:37:59] [PASSED] no-no-or-yes-or-no
[06:37:59] [PASSED] or
[06:37:59] [PASSED] or-yes
[06:37:59] [PASSED] or-no
[06:37:59] [PASSED] yes-or
[06:37:59] [PASSED] no-or
[06:37:59] [PASSED] no-or-or-yes
[06:37:59] [PASSED] yes-or-or-no
[06:37:59] [PASSED] no-or-or-no
[06:37:59] [PASSED] missing-context-engine-class
[06:37:59] [PASSED] missing-context-engine-class-or-yes
[06:37:59] [PASSED] missing-context-engine-class-or-or-yes
[06:37:59] =============== [PASSED] xe_rtp_rules_tests ================
[06:37:59] =============== xe_rtp_process_to_sr_tests  ================
[06:37:59] [PASSED] coalesce-same-reg
[06:37:59] [PASSED] coalesce-same-reg-literal-and-func
[06:37:59] [PASSED] no-match-no-add
[06:37:59] [PASSED] two-regs-two-entries
[06:37:59] [PASSED] clr-one-set-other
[06:37:59] [PASSED] set-field
[06:37:59] [PASSED] conflict-duplicate
[06:37:59] [PASSED] conflict-not-disjoint
[06:37:59] [PASSED] conflict-not-disjoint-literal-and-func
[06:37:59] [PASSED] conflict-reg-type
[06:37:59] [PASSED] bad-mcr-reg-forced-to-regular
[06:37:59] [PASSED] bad-regular-reg-forced-to-mcr
[06:37:59] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[06:37:59] ================== xe_rtp_process_tests  ===================
[06:37:59] [PASSED] active1
[06:37:59] [PASSED] active2
[06:37:59] [PASSED] active-inactive
[06:37:59] [PASSED] inactive-active
[06:37:59] [PASSED] inactive-active-inactive
[06:37:59] [PASSED] inactive-inactive-inactive
[06:37:59] ============== [PASSED] xe_rtp_process_tests ===============
[06:37:59] ===================== [PASSED] xe_rtp ======================
[06:37:59] ==================== xe_wa (1 subtest) =====================
[06:37:59] ======================== xe_wa_gt  =========================
[06:37:59] [PASSED] TIGERLAKE B0
[06:37:59] [PASSED] DG1 A0
[06:37:59] [PASSED] DG1 B0
[06:37:59] [PASSED] ALDERLAKE_S A0
[06:37:59] [PASSED] ALDERLAKE_S B0
[06:37:59] [PASSED] ALDERLAKE_S C0
[06:37:59] [PASSED] ALDERLAKE_S D0
[06:37:59] [PASSED] ALDERLAKE_P A0
[06:37:59] [PASSED] ALDERLAKE_P B0
[06:37:59] [PASSED] ALDERLAKE_P C0
[06:37:59] [PASSED] ALDERLAKE_S RPLS D0
[06:37:59] [PASSED] ALDERLAKE_P RPLU E0
[06:37:59] [PASSED] DG2 G10 C0
[06:37:59] [PASSED] DG2 G11 B1
[06:37:59] [PASSED] DG2 G12 A1
[06:37:59] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[06:37:59] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[06:37:59] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[06:37:59] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[06:37:59] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[06:37:59] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[06:37:59] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[06:37:59] ==================== [PASSED] xe_wa_gt =====================
[06:37:59] ====================== [PASSED] xe_wa ======================
[06:37:59] ============================================================
[06:37:59] Testing complete. Ran 729 tests: passed: 711, skipped: 18
[06:37:59] Elapsed time: 36.818s total, 4.369s configuring, 31.784s building, 0.657s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[06:37:59] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:38:01] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:38:25] Starting KUnit Kernel (1/1)...
[06:38:25] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:38:25] ============ drm_test_pick_cmdline (2 subtests) ============
[06:38:25] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[06:38:25] =============== drm_test_pick_cmdline_named  ===============
[06:38:25] [PASSED] NTSC
[06:38:25] [PASSED] NTSC-J
[06:38:25] [PASSED] PAL
[06:38:25] [PASSED] PAL-M
[06:38:25] =========== [PASSED] drm_test_pick_cmdline_named ===========
[06:38:25] ============== [PASSED] drm_test_pick_cmdline ==============
[06:38:25] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[06:38:25] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[06:38:25] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[06:38:25] =========== drm_validate_clone_mode (2 subtests) ===========
[06:38:25] ============== drm_test_check_in_clone_mode  ===============
[06:38:25] [PASSED] in_clone_mode
[06:38:25] [PASSED] not_in_clone_mode
[06:38:25] ========== [PASSED] drm_test_check_in_clone_mode ===========
[06:38:25] =============== drm_test_check_valid_clones  ===============
[06:38:25] [PASSED] not_in_clone_mode
[06:38:25] [PASSED] valid_clone
[06:38:25] [PASSED] invalid_clone
[06:38:25] =========== [PASSED] drm_test_check_valid_clones ===========
[06:38:25] ============= [PASSED] drm_validate_clone_mode =============
[06:38:25] ============= drm_validate_modeset (1 subtest) =============
[06:38:25] [PASSED] drm_test_check_connector_changed_modeset
[06:38:25] ============== [PASSED] drm_validate_modeset ===============
[06:38:25] ====== drm_test_bridge_get_current_state (2 subtests) ======
[06:38:25] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[06:38:25] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[06:38:25] ======== [PASSED] drm_test_bridge_get_current_state ========
[06:38:25] ====== drm_test_bridge_helper_reset_crtc (4 subtests) ======
[06:38:25] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[06:38:25] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[06:38:25] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[06:38:25] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[06:38:25] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[06:38:25] ============== drm_bridge_alloc (2 subtests) ===============
[06:38:25] [PASSED] drm_test_drm_bridge_alloc_basic
[06:38:25] [PASSED] drm_test_drm_bridge_alloc_get_put
[06:38:25] ================ [PASSED] drm_bridge_alloc =================
[06:38:25] ============= drm_bridge_bus_fmt (5 subtests) ==============
[06:38:25] [PASSED] drm_test_bridge_rgb_yuv_rgb
[06:38:25] [PASSED] drm_test_bridge_must_convert_to_yuv444
[06:38:25] [PASSED] drm_test_bridge_hdmi_auto_rgb
[06:38:25] [PASSED] drm_test_bridge_auto_first
[06:38:25] [PASSED] drm_test_bridge_rgb_yuv_no_path
[06:38:25] =============== [PASSED] drm_bridge_bus_fmt ================
[06:38:25] ============= drm_cmdline_parser (40 subtests) =============
[06:38:25] [PASSED] drm_test_cmdline_force_d_only
[06:38:25] [PASSED] drm_test_cmdline_force_D_only_dvi
[06:38:25] [PASSED] drm_test_cmdline_force_D_only_hdmi
[06:38:25] [PASSED] drm_test_cmdline_force_D_only_not_digital
[06:38:25] [PASSED] drm_test_cmdline_force_e_only
[06:38:25] [PASSED] drm_test_cmdline_res
[06:38:25] [PASSED] drm_test_cmdline_res_vesa
[06:38:25] [PASSED] drm_test_cmdline_res_vesa_rblank
[06:38:25] [PASSED] drm_test_cmdline_res_rblank
[06:38:25] [PASSED] drm_test_cmdline_res_bpp
[06:38:25] [PASSED] drm_test_cmdline_res_refresh
[06:38:25] [PASSED] drm_test_cmdline_res_bpp_refresh
[06:38:25] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[06:38:25] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[06:38:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[06:38:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[06:38:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[06:38:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[06:38:25] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[06:38:25] [PASSED] drm_test_cmdline_res_margins_force_on
[06:38:25] [PASSED] drm_test_cmdline_res_vesa_margins
[06:38:25] [PASSED] drm_test_cmdline_name
[06:38:25] [PASSED] drm_test_cmdline_name_bpp
[06:38:25] [PASSED] drm_test_cmdline_name_option
[06:38:25] [PASSED] drm_test_cmdline_name_bpp_option
[06:38:25] [PASSED] drm_test_cmdline_rotate_0
[06:38:25] [PASSED] drm_test_cmdline_rotate_90
[06:38:25] [PASSED] drm_test_cmdline_rotate_180
[06:38:25] [PASSED] drm_test_cmdline_rotate_270
[06:38:25] [PASSED] drm_test_cmdline_hmirror
[06:38:25] [PASSED] drm_test_cmdline_vmirror
[06:38:25] [PASSED] drm_test_cmdline_margin_options
[06:38:25] [PASSED] drm_test_cmdline_multiple_options
[06:38:25] [PASSED] drm_test_cmdline_bpp_extra_and_option
[06:38:25] [PASSED] drm_test_cmdline_extra_and_option
[06:38:25] [PASSED] drm_test_cmdline_freestanding_options
[06:38:25] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[06:38:25] [PASSED] drm_test_cmdline_panel_orientation
[06:38:25] ================ drm_test_cmdline_invalid  =================
[06:38:25] [PASSED] margin_only
[06:38:25] [PASSED] interlace_only
[06:38:25] [PASSED] res_missing_x
[06:38:25] [PASSED] res_missing_y
[06:38:25] [PASSED] res_bad_y
[06:38:25] [PASSED] res_missing_y_bpp
[06:38:25] [PASSED] res_bad_bpp
[06:38:25] [PASSED] res_bad_refresh
[06:38:25] [PASSED] res_bpp_refresh_force_on_off
[06:38:25] [PASSED] res_invalid_mode
[06:38:25] [PASSED] res_bpp_wrong_place_mode
[06:38:25] [PASSED] name_bpp_refresh
[06:38:25] [PASSED] name_refresh
[06:38:25] [PASSED] name_refresh_wrong_mode
[06:38:25] [PASSED] name_refresh_invalid_mode
[06:38:25] [PASSED] rotate_multiple
[06:38:25] [PASSED] rotate_invalid_val
[06:38:25] [PASSED] rotate_truncated
[06:38:25] [PASSED] invalid_option
[06:38:25] [PASSED] invalid_tv_option
[06:38:25] [PASSED] truncated_tv_option
[06:38:25] ============ [PASSED] drm_test_cmdline_invalid =============
[06:38:25] =============== drm_test_cmdline_tv_options  ===============
[06:38:25] [PASSED] NTSC
[06:38:25] [PASSED] NTSC_443
[06:38:25] [PASSED] NTSC_J
[06:38:25] [PASSED] PAL
[06:38:25] [PASSED] PAL_M
[06:38:25] [PASSED] PAL_N
[06:38:25] [PASSED] SECAM
[06:38:25] [PASSED] MONO_525
[06:38:25] [PASSED] MONO_625
[06:38:25] =========== [PASSED] drm_test_cmdline_tv_options ===========
[06:38:25] =============== [PASSED] drm_cmdline_parser ================
[06:38:25] ========== drmm_connector_hdmi_init (20 subtests) ==========
[06:38:25] [PASSED] drm_test_connector_hdmi_init_valid
[06:38:25] [PASSED] drm_test_connector_hdmi_init_bpc_8
[06:38:25] [PASSED] drm_test_connector_hdmi_init_bpc_10
[06:38:25] [PASSED] drm_test_connector_hdmi_init_bpc_12
[06:38:25] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[06:38:25] [PASSED] drm_test_connector_hdmi_init_bpc_null
[06:38:25] [PASSED] drm_test_connector_hdmi_init_formats_empty
[06:38:25] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[06:38:25] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[06:38:25] [PASSED] supported_formats=0x9 yuv420_allowed=1
[06:38:25] [PASSED] supported_formats=0x9 yuv420_allowed=0
[06:38:25] [PASSED] supported_formats=0x5 yuv420_allowed=1
[06:38:25] [PASSED] supported_formats=0x5 yuv420_allowed=0
[06:38:25] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[06:38:25] [PASSED] drm_test_connector_hdmi_init_null_ddc
[06:38:25] [PASSED] drm_test_connector_hdmi_init_null_product
[06:38:25] [PASSED] drm_test_connector_hdmi_init_null_vendor
[06:38:25] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[06:38:25] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[06:38:25] [PASSED] drm_test_connector_hdmi_init_product_valid
[06:38:25] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[06:38:25] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[06:38:25] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[06:38:25] ========= drm_test_connector_hdmi_init_type_valid  =========
[06:38:25] [PASSED] HDMI-A
[06:38:25] [PASSED] HDMI-B
[06:38:25] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[06:38:25] ======== drm_test_connector_hdmi_init_type_invalid  ========
[06:38:25] [PASSED] Unknown
[06:38:25] [PASSED] VGA
[06:38:25] [PASSED] DVI-I
[06:38:25] [PASSED] DVI-D
[06:38:25] [PASSED] DVI-A
[06:38:25] [PASSED] Composite
[06:38:25] [PASSED] SVIDEO
[06:38:25] [PASSED] LVDS
[06:38:25] [PASSED] Component
[06:38:25] [PASSED] DIN
[06:38:25] [PASSED] DP
[06:38:25] [PASSED] TV
[06:38:25] [PASSED] eDP
[06:38:25] [PASSED] Virtual
[06:38:25] [PASSED] DSI
[06:38:25] [PASSED] DPI
[06:38:25] [PASSED] Writeback
[06:38:25] [PASSED] SPI
[06:38:25] [PASSED] USB
[06:38:25] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[06:38:25] ============ [PASSED] drmm_connector_hdmi_init =============
[06:38:25] ============= drmm_connector_init (3 subtests) =============
[06:38:25] [PASSED] drm_test_drmm_connector_init
[06:38:25] [PASSED] drm_test_drmm_connector_init_null_ddc
[06:38:25] ========= drm_test_drmm_connector_init_type_valid  =========
[06:38:25] [PASSED] Unknown
[06:38:25] [PASSED] VGA
[06:38:25] [PASSED] DVI-I
[06:38:25] [PASSED] DVI-D
[06:38:25] [PASSED] DVI-A
[06:38:25] [PASSED] Composite
[06:38:25] [PASSED] SVIDEO
[06:38:25] [PASSED] LVDS
[06:38:25] [PASSED] Component
[06:38:25] [PASSED] DIN
[06:38:25] [PASSED] DP
[06:38:25] [PASSED] HDMI-A
[06:38:25] [PASSED] HDMI-B
[06:38:25] [PASSED] TV
[06:38:25] [PASSED] eDP
[06:38:25] [PASSED] Virtual
[06:38:25] [PASSED] DSI
[06:38:25] [PASSED] DPI
[06:38:25] [PASSED] Writeback
[06:38:25] [PASSED] SPI
[06:38:25] [PASSED] USB
[06:38:25] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[06:38:25] =============== [PASSED] drmm_connector_init ===============
[06:38:25] ========= drm_connector_dynamic_init (6 subtests) ==========
[06:38:25] [PASSED] drm_test_drm_connector_dynamic_init
[06:38:25] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[06:38:25] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[06:38:25] [PASSED] drm_test_drm_connector_dynamic_init_properties
[06:38:25] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[06:38:25] [PASSED] Unknown
[06:38:25] [PASSED] VGA
[06:38:25] [PASSED] DVI-I
[06:38:25] [PASSED] DVI-D
[06:38:25] [PASSED] DVI-A
[06:38:25] [PASSED] Composite
[06:38:25] [PASSED] SVIDEO
[06:38:25] [PASSED] LVDS
[06:38:25] [PASSED] Component
[06:38:25] [PASSED] DIN
[06:38:25] [PASSED] DP
[06:38:25] [PASSED] HDMI-A
[06:38:25] [PASSED] HDMI-B
[06:38:25] [PASSED] TV
[06:38:25] [PASSED] eDP
[06:38:25] [PASSED] Virtual
[06:38:25] [PASSED] DSI
[06:38:25] [PASSED] DPI
[06:38:25] [PASSED] Writeback
[06:38:25] [PASSED] SPI
[06:38:25] [PASSED] USB
[06:38:25] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[06:38:25] ======== drm_test_drm_connector_dynamic_init_name  =========
[06:38:25] [PASSED] Unknown
[06:38:25] [PASSED] VGA
[06:38:25] [PASSED] DVI-I
[06:38:25] [PASSED] DVI-D
[06:38:25] [PASSED] DVI-A
[06:38:25] [PASSED] Composite
[06:38:25] [PASSED] SVIDEO
[06:38:25] [PASSED] LVDS
[06:38:25] [PASSED] Component
[06:38:25] [PASSED] DIN
[06:38:25] [PASSED] DP
[06:38:25] [PASSED] HDMI-A
[06:38:25] [PASSED] HDMI-B
[06:38:25] [PASSED] TV
[06:38:25] [PASSED] eDP
[06:38:25] [PASSED] Virtual
[06:38:25] [PASSED] DSI
[06:38:25] [PASSED] DPI
[06:38:25] [PASSED] Writeback
[06:38:25] [PASSED] SPI
[06:38:25] [PASSED] USB
[06:38:25] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[06:38:25] =========== [PASSED] drm_connector_dynamic_init ============
[06:38:25] ==== drm_connector_dynamic_register_early (4 subtests) =====
[06:38:25] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[06:38:25] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[06:38:25] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[06:38:25] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[06:38:25] ====== [PASSED] drm_connector_dynamic_register_early =======
[06:38:25] ======= drm_connector_dynamic_register (7 subtests) ========
[06:38:25] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[06:38:25] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[06:38:25] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[06:38:25] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[06:38:25] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[06:38:25] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[06:38:25] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[06:38:25] ========= [PASSED] drm_connector_dynamic_register ==========
[06:38:25] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[06:38:25] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[06:38:25] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[06:38:25] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[06:38:25] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[06:38:25] ========== drm_test_get_tv_mode_from_name_valid  ===========
[06:38:25] [PASSED] NTSC
[06:38:25] [PASSED] NTSC-443
[06:38:25] [PASSED] NTSC-J
[06:38:25] [PASSED] PAL
[06:38:25] [PASSED] PAL-M
[06:38:25] [PASSED] PAL-N
[06:38:25] [PASSED] SECAM
[06:38:25] [PASSED] Mono
[06:38:25] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[06:38:25] [PASSED] drm_test_get_tv_mode_from_name_truncated
[06:38:25] ============ [PASSED] drm_get_tv_mode_from_name ============
[06:38:25] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[06:38:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[06:38:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[06:38:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[06:38:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[06:38:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[06:38:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[06:38:25] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[06:38:25] [PASSED] VIC 96
[06:38:25] [PASSED] VIC 97
[06:38:25] [PASSED] VIC 101
[06:38:25] [PASSED] VIC 102
[06:38:25] [PASSED] VIC 106
[06:38:25] [PASSED] VIC 107
[06:38:25] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[06:38:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[06:38:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[06:38:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[06:38:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[06:38:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[06:38:25] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[06:38:25] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[06:38:25] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[06:38:25] [PASSED] Automatic
[06:38:25] [PASSED] Full
[06:38:25] [PASSED] Limited 16:235
[06:38:25] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[06:38:25] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[06:38:25] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[06:38:25] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[06:38:25] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[06:38:25] [PASSED] RGB
[06:38:25] [PASSED] YUV 4:2:0
[06:38:25] [PASSED] YUV 4:2:2
[06:38:25] [PASSED] YUV 4:4:4
[06:38:25] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[06:38:25] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[06:38:25] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[06:38:25] ============= drm_damage_helper (21 subtests) ==============
[06:38:25] [PASSED] drm_test_damage_iter_no_damage
[06:38:25] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[06:38:25] [PASSED] drm_test_damage_iter_no_damage_src_moved
[06:38:25] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[06:38:25] [PASSED] drm_test_damage_iter_no_damage_not_visible
[06:38:25] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[06:38:25] [PASSED] drm_test_damage_iter_no_damage_no_fb
[06:38:25] [PASSED] drm_test_damage_iter_simple_damage
[06:38:25] [PASSED] drm_test_damage_iter_single_damage
[06:38:25] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[06:38:25] [PASSED] drm_test_damage_iter_single_damage_outside_src
[06:38:25] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[06:38:25] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[06:38:25] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[06:38:25] [PASSED] drm_test_damage_iter_single_damage_src_moved
[06:38:25] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[06:38:25] [PASSED] drm_test_damage_iter_damage
[06:38:25] [PASSED] drm_test_damage_iter_damage_one_intersect
[06:38:25] [PASSED] drm_test_damage_iter_damage_one_outside
[06:38:25] [PASSED] drm_test_damage_iter_damage_src_moved
[06:38:25] [PASSED] drm_test_damage_iter_damage_not_visible
[06:38:25] ================ [PASSED] drm_damage_helper ================
[06:38:25] ============== drm_dp_mst_helper (3 subtests) ==============
[06:38:25] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[06:38:25] [PASSED] Clock 154000 BPP 30 DSC disabled
[06:38:25] [PASSED] Clock 234000 BPP 30 DSC disabled
[06:38:25] [PASSED] Clock 297000 BPP 24 DSC disabled
[06:38:25] [PASSED] Clock 332880 BPP 24 DSC enabled
[06:38:25] [PASSED] Clock 324540 BPP 24 DSC enabled
[06:38:25] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[06:38:25] ============== drm_test_dp_mst_calc_pbn_div  ===============
[06:38:25] [PASSED] Link rate 2000000 lane count 4
[06:38:25] [PASSED] Link rate 2000000 lane count 2
[06:38:25] [PASSED] Link rate 2000000 lane count 1
[06:38:25] [PASSED] Link rate 1350000 lane count 4
[06:38:25] [PASSED] Link rate 1350000 lane count 2
[06:38:25] [PASSED] Link rate 1350000 lane count 1
[06:38:25] [PASSED] Link rate 1000000 lane count 4
[06:38:25] [PASSED] Link rate 1000000 lane count 2
[06:38:25] [PASSED] Link rate 1000000 lane count 1
[06:38:25] [PASSED] Link rate 810000 lane count 4
[06:38:25] [PASSED] Link rate 810000 lane count 2
[06:38:25] [PASSED] Link rate 810000 lane count 1
[06:38:25] [PASSED] Link rate 540000 lane count 4
[06:38:25] [PASSED] Link rate 540000 lane count 2
[06:38:25] [PASSED] Link rate 540000 lane count 1
[06:38:25] [PASSED] Link rate 270000 lane count 4
[06:38:25] [PASSED] Link rate 270000 lane count 2
[06:38:25] [PASSED] Link rate 270000 lane count 1
[06:38:25] [PASSED] Link rate 162000 lane count 4
[06:38:25] [PASSED] Link rate 162000 lane count 2
[06:38:25] [PASSED] Link rate 162000 lane count 1
[06:38:25] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[06:38:25] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[06:38:25] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[06:38:25] [PASSED] DP_POWER_UP_PHY with port number
[06:38:25] [PASSED] DP_POWER_DOWN_PHY with port number
[06:38:25] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[06:38:25] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[06:38:25] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[06:38:25] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[06:38:25] [PASSED] DP_QUERY_PAYLOAD with port number
[06:38:25] [PASSED] DP_QUERY_PAYLOAD with VCPI
[06:38:25] [PASSED] DP_REMOTE_DPCD_READ with port number
[06:38:25] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[06:38:25] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[06:38:25] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[06:38:25] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[06:38:25] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[06:38:25] [PASSED] DP_REMOTE_I2C_READ with port number
[06:38:25] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[06:38:25] [PASSED] DP_REMOTE_I2C_READ with transactions array
[06:38:25] [PASSED] DP_REMOTE_I2C_WRITE with port number
[06:38:25] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[06:38:25] [PASSED] DP_REMOTE_I2C_WRITE with data array
[06:38:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[06:38:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[06:38:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[06:38:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[06:38:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[06:38:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[06:38:25] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[06:38:25] ================ [PASSED] drm_dp_mst_helper ================
[06:38:25] ================== drm_exec (7 subtests) ===================
[06:38:25] [PASSED] sanitycheck
[06:38:25] [PASSED] test_lock
[06:38:25] [PASSED] test_lock_unlock
[06:38:25] [PASSED] test_duplicates
[06:38:25] [PASSED] test_prepare
[06:38:25] [PASSED] test_prepare_array
[06:38:25] [PASSED] test_multiple_loops
[06:38:25] ==================== [PASSED] drm_exec =====================
[06:38:25] =========== drm_format_helper_test (17 subtests) ===========
[06:38:25] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[06:38:25] [PASSED] single_pixel_source_buffer
[06:38:25] [PASSED] single_pixel_clip_rectangle
[06:38:25] [PASSED] well_known_colors
[06:38:25] [PASSED] destination_pitch
[06:38:25] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[06:38:25] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[06:38:25] [PASSED] single_pixel_source_buffer
[06:38:25] [PASSED] single_pixel_clip_rectangle
[06:38:25] [PASSED] well_known_colors
[06:38:25] [PASSED] destination_pitch
[06:38:25] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[06:38:25] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[06:38:25] [PASSED] single_pixel_source_buffer
[06:38:25] [PASSED] single_pixel_clip_rectangle
[06:38:25] [PASSED] well_known_colors
[06:38:25] [PASSED] destination_pitch
[06:38:25] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[06:38:25] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[06:38:25] [PASSED] single_pixel_source_buffer
[06:38:25] [PASSED] single_pixel_clip_rectangle
[06:38:25] [PASSED] well_known_colors
[06:38:25] [PASSED] destination_pitch
[06:38:25] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[06:38:25] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[06:38:25] [PASSED] single_pixel_source_buffer
[06:38:25] [PASSED] single_pixel_clip_rectangle
[06:38:25] [PASSED] well_known_colors
[06:38:25] [PASSED] destination_pitch
[06:38:25] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[06:38:25] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[06:38:25] [PASSED] single_pixel_source_buffer
[06:38:25] [PASSED] single_pixel_clip_rectangle
[06:38:25] [PASSED] well_known_colors
[06:38:25] [PASSED] destination_pitch
[06:38:25] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[06:38:25] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[06:38:25] [PASSED] single_pixel_source_buffer
[06:38:25] [PASSED] single_pixel_clip_rectangle
[06:38:25] [PASSED] well_known_colors
[06:38:25] [PASSED] destination_pitch
[06:38:25] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[06:38:25] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[06:38:25] [PASSED] single_pixel_source_buffer
[06:38:25] [PASSED] single_pixel_clip_rectangle
[06:38:25] [PASSED] well_known_colors
[06:38:25] [PASSED] destination_pitch
[06:38:25] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[06:38:25] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[06:38:25] [PASSED] single_pixel_source_buffer
[06:38:25] [PASSED] single_pixel_clip_rectangle
[06:38:25] [PASSED] well_known_colors
[06:38:25] [PASSED] destination_pitch
[06:38:25] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[06:38:25] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[06:38:25] [PASSED] single_pixel_source_buffer
[06:38:25] [PASSED] single_pixel_clip_rectangle
[06:38:25] [PASSED] well_known_colors
[06:38:25] [PASSED] destination_pitch
[06:38:25] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[06:38:25] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[06:38:25] [PASSED] single_pixel_source_buffer
[06:38:25] [PASSED] single_pixel_clip_rectangle
[06:38:25] [PASSED] well_known_colors
[06:38:25] [PASSED] destination_pitch
[06:38:25] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[06:38:25] ============== drm_test_fb_xrgb8888_to_mono  ===============
[06:38:25] [PASSED] single_pixel_source_buffer
[06:38:25] [PASSED] single_pixel_clip_rectangle
[06:38:25] [PASSED] well_known_colors
[06:38:25] [PASSED] destination_pitch
[06:38:25] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[06:38:25] ==================== drm_test_fb_swab  =====================
[06:38:25] [PASSED] single_pixel_source_buffer
[06:38:25] [PASSED] single_pixel_clip_rectangle
[06:38:25] [PASSED] well_known_colors
[06:38:25] [PASSED] destination_pitch
[06:38:25] ================ [PASSED] drm_test_fb_swab =================
[06:38:25] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[06:38:25] [PASSED] single_pixel_source_buffer
[06:38:25] [PASSED] single_pixel_clip_rectangle
[06:38:25] [PASSED] well_known_colors
[06:38:25] [PASSED] destination_pitch
[06:38:25] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[06:38:25] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[06:38:25] [PASSED] single_pixel_source_buffer
[06:38:25] [PASSED] single_pixel_clip_rectangle
[06:38:25] [PASSED] well_known_colors
[06:38:25] [PASSED] destination_pitch
[06:38:25] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[06:38:25] ================= drm_test_fb_clip_offset  =================
[06:38:25] [PASSED] pass through
[06:38:25] [PASSED] horizontal offset
[06:38:25] [PASSED] vertical offset
[06:38:25] [PASSED] horizontal and vertical offset
[06:38:25] [PASSED] horizontal offset (custom pitch)
[06:38:25] [PASSED] vertical offset (custom pitch)
[06:38:25] [PASSED] horizontal and vertical offset (custom pitch)
[06:38:25] ============= [PASSED] drm_test_fb_clip_offset =============
[06:38:25] =================== drm_test_fb_memcpy  ====================
[06:38:25] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[06:38:25] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[06:38:25] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[06:38:25] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[06:38:25] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[06:38:25] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[06:38:25] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[06:38:25] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[06:38:25] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[06:38:25] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[06:38:25] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[06:38:25] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[06:38:25] =============== [PASSED] drm_test_fb_memcpy ================
[06:38:25] ============= [PASSED] drm_format_helper_test ==============
[06:38:25] ================= drm_format (18 subtests) =================
[06:38:25] [PASSED] drm_test_format_block_width_invalid
[06:38:25] [PASSED] drm_test_format_block_width_one_plane
[06:38:25] [PASSED] drm_test_format_block_width_two_plane
[06:38:25] [PASSED] drm_test_format_block_width_three_plane
[06:38:25] [PASSED] drm_test_format_block_width_tiled
[06:38:25] [PASSED] drm_test_format_block_height_invalid
[06:38:25] [PASSED] drm_test_format_block_height_one_plane
[06:38:25] [PASSED] drm_test_format_block_height_two_plane
[06:38:25] [PASSED] drm_test_format_block_height_three_plane
[06:38:25] [PASSED] drm_test_format_block_height_tiled
[06:38:25] [PASSED] drm_test_format_min_pitch_invalid
[06:38:25] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[06:38:25] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[06:38:25] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[06:38:25] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[06:38:25] [PASSED] drm_test_format_min_pitch_two_plane
[06:38:25] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[06:38:25] [PASSED] drm_test_format_min_pitch_tiled
[06:38:25] =================== [PASSED] drm_format ====================
[06:38:25] ============== drm_framebuffer (10 subtests) ===============
[06:38:25] ========== drm_test_framebuffer_check_src_coords  ==========
[06:38:25] [PASSED] Success: source fits into fb
[06:38:25] [PASSED] Fail: overflowing fb with x-axis coordinate
[06:38:25] [PASSED] Fail: overflowing fb with y-axis coordinate
[06:38:25] [PASSED] Fail: overflowing fb with source width
[06:38:25] [PASSED] Fail: overflowing fb with source height
[06:38:25] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[06:38:25] [PASSED] drm_test_framebuffer_cleanup
[06:38:25] =============== drm_test_framebuffer_create  ===============
[06:38:25] [PASSED] ABGR8888 normal sizes
[06:38:25] [PASSED] ABGR8888 max sizes
[06:38:25] [PASSED] ABGR8888 pitch greater than min required
[06:38:25] [PASSED] ABGR8888 pitch less than min required
[06:38:25] [PASSED] ABGR8888 Invalid width
[06:38:25] [PASSED] ABGR8888 Invalid buffer handle
[06:38:25] [PASSED] No pixel format
[06:38:25] [PASSED] ABGR8888 Width 0
[06:38:25] [PASSED] ABGR8888 Height 0
[06:38:25] [PASSED] ABGR8888 Out of bound height * pitch combination
[06:38:25] [PASSED] ABGR8888 Large buffer offset
[06:38:25] [PASSED] ABGR8888 Buffer offset for inexistent plane
[06:38:25] [PASSED] ABGR8888 Invalid flag
[06:38:25] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[06:38:25] [PASSED] ABGR8888 Valid buffer modifier
[06:38:25] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[06:38:25] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[06:38:25] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[06:38:25] [PASSED] NV12 Normal sizes
[06:38:25] [PASSED] NV12 Max sizes
[06:38:25] [PASSED] NV12 Invalid pitch
[06:38:25] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[06:38:25] [PASSED] NV12 different  modifier per-plane
[06:38:25] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[06:38:25] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[06:38:25] [PASSED] NV12 Modifier for inexistent plane
[06:38:25] [PASSED] NV12 Handle for inexistent plane
[06:38:25] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[06:38:25] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[06:38:25] [PASSED] YVU420 Normal sizes
[06:38:25] [PASSED] YVU420 Max sizes
[06:38:25] [PASSED] YVU420 Invalid pitch
[06:38:25] [PASSED] YVU420 Different pitches
[06:38:25] [PASSED] YVU420 Different buffer offsets/pitches
[06:38:25] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[06:38:25] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[06:38:25] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[06:38:25] [PASSED] YVU420 Valid modifier
[06:38:25] [PASSED] YVU420 Different modifiers per plane
[06:38:25] [PASSED] YVU420 Modifier for inexistent plane
[06:38:25] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[06:38:25] [PASSED] X0L2 Normal sizes
[06:38:25] [PASSED] X0L2 Max sizes
[06:38:25] [PASSED] X0L2 Invalid pitch
[06:38:25] [PASSED] X0L2 Pitch greater than minimum required
[06:38:25] [PASSED] X0L2 Handle for inexistent plane
[06:38:25] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[06:38:25] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[06:38:25] [PASSED] X0L2 Valid modifier
[06:38:25] [PASSED] X0L2 Modifier for inexistent plane
[06:38:25] =========== [PASSED] drm_test_framebuffer_create ===========
[06:38:25] [PASSED] drm_test_framebuffer_free
[06:38:25] [PASSED] drm_test_framebuffer_init
[06:38:25] [PASSED] drm_test_framebuffer_init_bad_format
[06:38:25] [PASSED] drm_test_framebuffer_init_dev_mismatch
[06:38:25] [PASSED] drm_test_framebuffer_lookup
[06:38:25] [PASSED] drm_test_framebuffer_lookup_inexistent
[06:38:25] [PASSED] drm_test_framebuffer_modifiers_not_supported
[06:38:25] ================= [PASSED] drm_framebuffer =================
[06:38:25] ================ drm_gem_shmem (8 subtests) ================
[06:38:25] [PASSED] drm_gem_shmem_test_obj_create
[06:38:25] [PASSED] drm_gem_shmem_test_obj_create_private
[06:38:25] [PASSED] drm_gem_shmem_test_pin_pages
[06:38:25] [PASSED] drm_gem_shmem_test_vmap
[06:38:25] [PASSED] drm_gem_shmem_test_get_sg_table
[06:38:25] [PASSED] drm_gem_shmem_test_get_pages_sgt
[06:38:25] [PASSED] drm_gem_shmem_test_madvise
[06:38:25] [PASSED] drm_gem_shmem_test_purge
[06:38:25] ================== [PASSED] drm_gem_shmem ==================
[06:38:25] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[06:38:25] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[06:38:25] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[06:38:25] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[06:38:25] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[06:38:25] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[06:38:25] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[06:38:25] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[06:38:25] [PASSED] Automatic
[06:38:25] [PASSED] Full
[06:38:25] [PASSED] Limited 16:235
[06:38:25] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[06:38:25] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[06:38:25] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[06:38:25] [PASSED] drm_test_check_disable_connector
[06:38:25] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[06:38:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[06:38:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[06:38:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[06:38:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[06:38:25] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[06:38:25] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[06:38:25] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[06:38:25] [PASSED] drm_test_check_output_bpc_dvi
[06:38:25] [PASSED] drm_test_check_output_bpc_format_vic_1
[06:38:25] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[06:38:25] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[06:38:25] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[06:38:25] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[06:38:25] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[06:38:25] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[06:38:25] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[06:38:25] ============ drm_test_check_hdmi_color_format  =============
[06:38:25] [PASSED] AUTO -> RGB
[06:38:25] [PASSED] YCBCR422 -> YUV422
[06:38:25] [PASSED] YCBCR420 -> YUV420
[06:38:25] [PASSED] YCBCR444 -> YUV444
[06:38:25] [PASSED] RGB -> RGB
[06:38:25] ======== [PASSED] drm_test_check_hdmi_color_format =========
[06:38:25] ======== drm_test_check_hdmi_color_format_420_only  ========
[06:38:25] [PASSED] RGB should fail
[06:38:25] [PASSED] YUV444 should fail
[06:38:25] [PASSED] YUV422 should fail
[06:38:25] [PASSED] YUV420 should work
[06:38:25] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[06:38:25] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[06:38:25] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[06:38:25] [PASSED] drm_test_check_broadcast_rgb_value
[06:38:25] [PASSED] drm_test_check_bpc_8_value
[06:38:25] [PASSED] drm_test_check_bpc_10_value
[06:38:25] [PASSED] drm_test_check_bpc_12_value
[06:38:25] [PASSED] drm_test_check_format_value
[06:38:25] [PASSED] drm_test_check_tmds_char_value
[06:38:25] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[06:38:25] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[06:38:25] [PASSED] drm_test_check_mode_valid
[06:38:25] [PASSED] drm_test_check_mode_valid_reject
[06:38:25] [PASSED] drm_test_check_mode_valid_reject_rate
[06:38:25] [PASSED] drm_test_check_mode_valid_reject_max_clock
[06:38:25] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[06:38:25] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[06:38:25] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[06:38:25] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[06:38:25] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[06:38:25] [PASSED] drm_test_check_infoframes
[06:38:25] [PASSED] drm_test_check_reject_avi_infoframe
[06:38:25] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[06:38:25] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[06:38:25] [PASSED] drm_test_check_reject_audio_infoframe
[06:38:25] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[06:38:25] ================= drm_managed (2 subtests) =================
[06:38:25] [PASSED] drm_test_managed_release_action
[06:38:25] [PASSED] drm_test_managed_run_action
[06:38:25] =================== [PASSED] drm_managed ===================
[06:38:25] =================== drm_mm (6 subtests) ====================
[06:38:25] [PASSED] drm_test_mm_init
[06:38:25] [PASSED] drm_test_mm_debug
[06:38:25] [PASSED] drm_test_mm_align32
[06:38:25] [PASSED] drm_test_mm_align64
[06:38:25] [PASSED] drm_test_mm_lowest
[06:38:25] [PASSED] drm_test_mm_highest
[06:38:25] ===================== [PASSED] drm_mm ======================
[06:38:25] ============= drm_modes_analog_tv (5 subtests) =============
[06:38:25] [PASSED] drm_test_modes_analog_tv_mono_576i
[06:38:25] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[06:38:25] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[06:38:25] [PASSED] drm_test_modes_analog_tv_pal_576i
[06:38:25] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[06:38:25] =============== [PASSED] drm_modes_analog_tv ===============
[06:38:25] ============== drm_plane_helper (2 subtests) ===============
[06:38:25] =============== drm_test_check_plane_state  ================
[06:38:25] [PASSED] clipping_simple
[06:38:25] [PASSED] clipping_rotate_reflect
[06:38:25] [PASSED] positioning_simple
[06:38:25] [PASSED] upscaling
[06:38:25] [PASSED] downscaling
[06:38:25] [PASSED] rounding1
[06:38:25] [PASSED] rounding2
[06:38:25] [PASSED] rounding3
[06:38:25] [PASSED] rounding4
[06:38:25] =========== [PASSED] drm_test_check_plane_state ============
[06:38:25] =========== drm_test_check_invalid_plane_state  ============
[06:38:25] [PASSED] positioning_invalid
[06:38:25] [PASSED] upscaling_invalid
[06:38:25] [PASSED] downscaling_invalid
[06:38:25] ======= [PASSED] drm_test_check_invalid_plane_state ========
[06:38:25] ================ [PASSED] drm_plane_helper =================
[06:38:25] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[06:38:25] ====== drm_test_connector_helper_tv_get_modes_check  =======
[06:38:25] [PASSED] None
[06:38:25] [PASSED] PAL
[06:38:25] [PASSED] NTSC
[06:38:25] [PASSED] Both, NTSC Default
[06:38:25] [PASSED] Both, PAL Default
[06:38:25] [PASSED] Both, NTSC Default, with PAL on command-line
[06:38:25] [PASSED] Both, PAL Default, with NTSC on command-line
[06:38:25] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[06:38:25] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[06:38:25] ================== drm_rect (9 subtests) ===================
[06:38:25] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[06:38:25] [PASSED] drm_test_rect_clip_scaled_not_clipped
[06:38:25] [PASSED] drm_test_rect_clip_scaled_clipped
[06:38:25] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[06:38:25] ================= drm_test_rect_intersect  =================
[06:38:25] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[06:38:25] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[06:38:25] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[06:38:25] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[06:38:25] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[06:38:25] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[06:38:25] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[06:38:25] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[06:38:25] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[06:38:25] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[06:38:25] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[06:38:25] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[06:38:25] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[06:38:25] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[06:38:25] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[06:38:25] ============= [PASSED] drm_test_rect_intersect =============
[06:38:25] ================ drm_test_rect_calc_hscale  ================
[06:38:25] [PASSED] normal use
[06:38:25] [PASSED] out of max range
[06:38:25] [PASSED] out of min range
[06:38:25] [PASSED] zero dst
[06:38:25] [PASSED] negative src
[06:38:25] [PASSED] negative dst
[06:38:25] ============ [PASSED] drm_test_rect_calc_hscale ============
[06:38:25] ================ drm_test_rect_calc_vscale  ================
[06:38:25] [PASSED] normal use
[06:38:25] [PASSED] out of max range
[06:38:25] [PASSED] out of min range
[06:38:25] [PASSED] zero dst
[06:38:25] [PASSED] negative src
[06:38:25] [PASSED] negative dst
[06:38:25] ============ [PASSED] drm_test_rect_calc_vscale ============
[06:38:25] ================== drm_test_rect_rotate  ===================
[06:38:25] [PASSED] reflect-x
[06:38:25] [PASSED] reflect-y
[06:38:25] [PASSED] rotate-0
[06:38:25] [PASSED] rotate-90
[06:38:25] [PASSED] rotate-180
[06:38:25] [PASSED] rotate-270
[06:38:25] ============== [PASSED] drm_test_rect_rotate ===============
[06:38:25] ================ drm_test_rect_rotate_inv  =================
[06:38:25] [PASSED] reflect-x
[06:38:25] [PASSED] reflect-y
[06:38:25] [PASSED] rotate-0
[06:38:25] [PASSED] rotate-90
[06:38:25] [PASSED] rotate-180
[06:38:25] [PASSED] rotate-270
[06:38:25] ============ [PASSED] drm_test_rect_rotate_inv =============
[06:38:25] ==================== [PASSED] drm_rect =====================
[06:38:25] ============ drm_sysfb_modeset_test (1 subtest) ============
[06:38:25] ============ drm_test_sysfb_build_fourcc_list  =============
[06:38:25] [PASSED] no native formats
[06:38:25] [PASSED] XRGB8888 as native format
[06:38:25] [PASSED] remove duplicates
[06:38:25] [PASSED] convert alpha formats
[06:38:25] [PASSED] random formats
[06:38:25] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[06:38:25] ============= [PASSED] drm_sysfb_modeset_test ==============
[06:38:25] ================== drm_fixp (2 subtests) ===================
[06:38:25] [PASSED] drm_test_int2fixp
[06:38:25] [PASSED] drm_test_sm2fixp
[06:38:25] ==================== [PASSED] drm_fixp =====================
[06:38:25] ============================================================
[06:38:25] Testing complete. Ran 639 tests: passed: 639
[06:38:25] Elapsed time: 26.273s total, 1.680s configuring, 24.428s building, 0.141s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[06:38:26] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:38:27] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:38:37] Starting KUnit Kernel (1/1)...
[06:38:37] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:38:37] ================= ttm_device (5 subtests) ==================
[06:38:37] [PASSED] ttm_device_init_basic
[06:38:37] [PASSED] ttm_device_init_multiple
[06:38:37] [PASSED] ttm_device_fini_basic
[06:38:37] [PASSED] ttm_device_init_no_vma_man
[06:38:37] ================== ttm_device_init_pools  ==================
[06:38:37] [PASSED] No DMA allocations, no DMA32 required
[06:38:37] [PASSED] DMA allocations, DMA32 required
[06:38:37] [PASSED] No DMA allocations, DMA32 required
[06:38:37] [PASSED] DMA allocations, no DMA32 required
[06:38:37] ============== [PASSED] ttm_device_init_pools ==============
[06:38:37] =================== [PASSED] ttm_device ====================
[06:38:37] ================== ttm_pool (8 subtests) ===================
[06:38:37] ================== ttm_pool_alloc_basic  ===================
[06:38:37] [PASSED] One page
[06:38:37] [PASSED] More than one page
[06:38:37] [PASSED] Above the allocation limit
[06:38:37] [PASSED] One page, with coherent DMA mappings enabled
[06:38:37] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[06:38:37] ============== [PASSED] ttm_pool_alloc_basic ===============
[06:38:37] ============== ttm_pool_alloc_basic_dma_addr  ==============
[06:38:37] [PASSED] One page
[06:38:37] [PASSED] More than one page
[06:38:37] [PASSED] Above the allocation limit
[06:38:37] [PASSED] One page, with coherent DMA mappings enabled
[06:38:37] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[06:38:37] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[06:38:37] [PASSED] ttm_pool_alloc_order_caching_match
[06:38:37] [PASSED] ttm_pool_alloc_caching_mismatch
[06:38:37] [PASSED] ttm_pool_alloc_order_mismatch
[06:38:37] [PASSED] ttm_pool_free_dma_alloc
[06:38:37] [PASSED] ttm_pool_free_no_dma_alloc
[06:38:37] [PASSED] ttm_pool_fini_basic
[06:38:37] ==================== [PASSED] ttm_pool =====================
[06:38:37] ================ ttm_resource (8 subtests) =================
[06:38:37] ================= ttm_resource_init_basic  =================
[06:38:37] [PASSED] Init resource in TTM_PL_SYSTEM
[06:38:37] [PASSED] Init resource in TTM_PL_VRAM
[06:38:37] [PASSED] Init resource in a private placement
[06:38:37] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[06:38:37] ============= [PASSED] ttm_resource_init_basic =============
[06:38:37] [PASSED] ttm_resource_init_pinned
[06:38:37] [PASSED] ttm_resource_fini_basic
[06:38:37] [PASSED] ttm_resource_manager_init_basic
[06:38:37] [PASSED] ttm_resource_manager_usage_basic
[06:38:37] [PASSED] ttm_resource_manager_set_used_basic
[06:38:37] [PASSED] ttm_sys_man_alloc_basic
[06:38:37] [PASSED] ttm_sys_man_free_basic
[06:38:37] ================== [PASSED] ttm_resource ===================
[06:38:37] =================== ttm_tt (15 subtests) ===================
[06:38:37] ==================== ttm_tt_init_basic  ====================
[06:38:37] [PASSED] Page-aligned size
[06:38:37] [PASSED] Extra pages requested
[06:38:37] ================ [PASSED] ttm_tt_init_basic ================
[06:38:37] [PASSED] ttm_tt_init_misaligned
[06:38:37] [PASSED] ttm_tt_fini_basic
[06:38:37] [PASSED] ttm_tt_fini_sg
[06:38:37] [PASSED] ttm_tt_fini_shmem
[06:38:37] [PASSED] ttm_tt_create_basic
[06:38:37] [PASSED] ttm_tt_create_invalid_bo_type
[06:38:37] [PASSED] ttm_tt_create_ttm_exists
[06:38:37] [PASSED] ttm_tt_create_failed
[06:38:37] [PASSED] ttm_tt_destroy_basic
[06:38:37] [PASSED] ttm_tt_populate_null_ttm
[06:38:37] [PASSED] ttm_tt_populate_populated_ttm
[06:38:37] [PASSED] ttm_tt_unpopulate_basic
[06:38:37] [PASSED] ttm_tt_unpopulate_empty_ttm
[06:38:37] [PASSED] ttm_tt_swapin_basic
[06:38:37] ===================== [PASSED] ttm_tt ======================
[06:38:37] =================== ttm_bo (14 subtests) ===================
[06:38:37] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[06:38:37] [PASSED] Cannot be interrupted and sleeps
[06:38:37] [PASSED] Cannot be interrupted, locks straight away
[06:38:37] [PASSED] Can be interrupted, sleeps
[06:38:37] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[06:38:37] [PASSED] ttm_bo_reserve_locked_no_sleep
[06:38:37] [PASSED] ttm_bo_reserve_no_wait_ticket
[06:38:37] [PASSED] ttm_bo_reserve_double_resv
[06:38:37] [PASSED] ttm_bo_reserve_interrupted
[06:38:37] [PASSED] ttm_bo_reserve_deadlock
[06:38:37] [PASSED] ttm_bo_unreserve_basic
[06:38:37] [PASSED] ttm_bo_unreserve_pinned
[06:38:37] [PASSED] ttm_bo_unreserve_bulk
[06:38:37] [PASSED] ttm_bo_fini_basic
[06:38:37] [PASSED] ttm_bo_fini_shared_resv
[06:38:37] [PASSED] ttm_bo_pin_basic
[06:38:37] [PASSED] ttm_bo_pin_unpin_resource
[06:38:37] [PASSED] ttm_bo_multiple_pin_one_unpin
[06:38:37] ===================== [PASSED] ttm_bo ======================
[06:38:37] ============== ttm_bo_validate (22 subtests) ===============
[06:38:37] ============== ttm_bo_init_reserved_sys_man  ===============
[06:38:37] [PASSED] Buffer object for userspace
[06:38:37] [PASSED] Kernel buffer object
[06:38:37] [PASSED] Shared buffer object
[06:38:37] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[06:38:37] ============== ttm_bo_init_reserved_mock_man  ==============
[06:38:37] [PASSED] Buffer object for userspace
[06:38:37] [PASSED] Kernel buffer object
[06:38:37] [PASSED] Shared buffer object
[06:38:37] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[06:38:37] [PASSED] ttm_bo_init_reserved_resv
[06:38:37] ================== ttm_bo_validate_basic  ==================
[06:38:37] [PASSED] Buffer object for userspace
[06:38:37] [PASSED] Kernel buffer object
[06:38:37] [PASSED] Shared buffer object
[06:38:37] ============== [PASSED] ttm_bo_validate_basic ==============
[06:38:37] [PASSED] ttm_bo_validate_invalid_placement
[06:38:37] ============= ttm_bo_validate_same_placement  ==============
[06:38:37] [PASSED] System manager
[06:38:37] [PASSED] VRAM manager
[06:38:37] ========= [PASSED] ttm_bo_validate_same_placement ==========
[06:38:37] [PASSED] ttm_bo_validate_failed_alloc
[06:38:37] [PASSED] ttm_bo_validate_pinned
[06:38:37] [PASSED] ttm_bo_validate_busy_placement
[06:38:37] ================ ttm_bo_validate_multihop  =================
[06:38:37] [PASSED] Buffer object for userspace
[06:38:37] [PASSED] Kernel buffer object
[06:38:37] [PASSED] Shared buffer object
[06:38:37] ============ [PASSED] ttm_bo_validate_multihop =============
[06:38:37] ========== ttm_bo_validate_no_placement_signaled  ==========
[06:38:37] [PASSED] Buffer object in system domain, no page vector
[06:38:37] [PASSED] Buffer object in system domain with an existing page vector
[06:38:37] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[06:38:37] ======== ttm_bo_validate_no_placement_not_signaled  ========
[06:38:37] [PASSED] Buffer object for userspace
[06:38:37] [PASSED] Kernel buffer object
[06:38:37] [PASSED] Shared buffer object
[06:38:37] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[06:38:37] [PASSED] ttm_bo_validate_move_fence_signaled
[06:38:37] ========= ttm_bo_validate_move_fence_not_signaled  =========
[06:38:37] [PASSED] Waits for GPU
[06:38:37] [PASSED] Tries to lock straight away
[06:38:37] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[06:38:37] [PASSED] ttm_bo_validate_swapout
[06:38:37] [PASSED] ttm_bo_validate_happy_evict
[06:38:37] [PASSED] ttm_bo_validate_all_pinned_evict
[06:38:37] [PASSED] ttm_bo_validate_allowed_only_evict
[06:38:37] [PASSED] ttm_bo_validate_deleted_evict
[06:38:37] [PASSED] ttm_bo_validate_busy_domain_evict
[06:38:37] [PASSED] ttm_bo_validate_evict_gutting
[06:38:37] [PASSED] ttm_bo_validate_recrusive_evict
[06:38:37] ================= [PASSED] ttm_bo_validate =================
[06:38:37] ============================================================
[06:38:37] Testing complete. Ran 102 tests: passed: 102
[06:38:38] Elapsed time: 11.944s total, 1.815s configuring, 9.914s building, 0.180s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/gpusvm: fix IOVA/DMA unmap leaks in __drm_gpusvm_unmap_pages() (rev3)

[Patchwork]

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== Series Details ==

Series: drm/gpusvm: fix IOVA/DMA unmap leaks in __drm_gpusvm_unmap_pages() (rev3)
URL   : https://patchwork.freedesktop.org/series/169467/
State : success

== Summary ==

CI Bug Log - changes from xe-5316-7100870965845da8c31005c07fd1b390bbe96b20_BAT -> xe-pw-169467v3_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-5316-7100870965845da8c31005c07fd1b390bbe96b20 -> xe-pw-169467v3

  IGT_8989: a8e2cbd2854d7980a9eccecc6e0c801d0824b88f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5316-7100870965845da8c31005c07fd1b390bbe96b20: 7100870965845da8c31005c07fd1b390bbe96b20
  xe-pw-169467v3: 169467v3

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-169467v3/index.html

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