[PATCH v2 8/8] drm/xe/pt: allow selecting the bind leaf PTE level

[Nareshkumar Gollakoti <naresh.kumar.g@intel.com>]

Add a target_leaf_level field to the page-table bind walk and use it
to control the level where leaf entries are emitted.

The default bind walk emits leaf PTEs at level 0, while huge mappings
are otherwise chosen through xe_pt_hugepte_possible(). Add an explicit
target leaf level so the walk can stop earlier when the VMA requests a
larger mapping size.

Use level 1 for 2M PDE mappings and level 2 for 1G PDP mappings, while
keeping level 0 for normal 4K/64K mappings. Keep the existing huge-page
selection logic for the default level-0 case.

This allows the bind path to emit 2M and 1G leaf entries when
requested by the VMA.

v2:
-Avoid using max_level field to control walk depth
-use target_leaf_level field to preserve normal walk
 environment
-keep default huge-page heuristic only for the level0
 default path
-refine commit meessage

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/xe_pt.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index 0959e0e88a14..245dadc7ab9d 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -302,6 +302,13 @@ struct xe_pt_stage_bind_walk {
 	bool needs_64K;
 	/** @clear_pt: clear page table entries during the bind walk */
 	bool clear_pt;
+	/** @target_leaf_level: The page-table level at which to emit leaf PTEs.
+	 * 0 for normal 4K/64K mappings, whereas 1 for 2M huge pages and 2 for
+	 * 1G huge pages. The walk still traverses from the root down; this field
+	 * instructs xe_pt_stage_bind_entry() to treat the given level as leaf
+	 * instead going further down.
+	 */
+	u32 target_leaf_level;
 	/**
 	 * @vma: VMA being mapped
 	 */
@@ -530,7 +537,9 @@ xe_pt_stage_bind_entry(struct xe_ptw *parent, pgoff_t offset,
 	u64 pte;
 
 	/* Is this a leaf entry ?*/
-	if (level == 0 || xe_pt_hugepte_possible(addr, next, level, xe_walk)) {
+	if (level == xe_walk->target_leaf_level || level == 0 ||
+	    (xe_walk->target_leaf_level == 0 &&
+	     xe_pt_hugepte_possible(addr, next, level, xe_walk))) {
 		struct xe_res_cursor *curs = xe_walk->curs;
 		struct xe_bo *bo = xe_vma_bo(xe_walk->vma);
 		bool is_null_or_purged = xe_vma_is_null(xe_walk->vma) ||
@@ -773,6 +782,11 @@ xe_pt_stage_bind(struct xe_tile *tile, struct xe_vma *vma,
 	}
 
 	xe_walk.needs_64K = (vm->flags & XE_VM_FLAG_64K);
+	if (vma->gpuva.flags & XE_VMA_PTE_2M)
+		xe_walk.target_leaf_level = 1;
+	else if (vma->gpuva.flags & XE_VMA_PTE_1G)
+		xe_walk.target_leaf_level = 2;
+
 	if (clear_pt)
 		goto walk_pt;
 
-- 
2.43.0