From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
Subject: [PATCH 2/4] drm/i915/cdclk: Introduce HAS_2PPC()
Date: Wed, 15 Jul 2026 15:09:24 +0300 [thread overview]
Message-ID: <20260715120926.10786-3-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20260715120926.10786-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We'll need to check for the "does the platform do 2 pixels per clock?"
thing in a few places. Add a feature macro for it.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
drivers/gpu/drm/i915/display/intel_display_device.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 1d7ff2cbaebb..12bb6c414683 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -2910,7 +2910,7 @@ intel_set_cdclk_post_plane_update(struct intel_atomic_state *state)
/* pixels per CDCLK */
int intel_cdclk_ppc(struct intel_display *display, bool double_wide)
{
- return DISPLAY_VER(display) >= 10 || double_wide ? 2 : 1;
+ return HAS_2PPC(display) || double_wide ? 2 : 1;
}
/* max pixel rate as % of CDCLK (not accounting for PPC) */
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 9aeba329b9bd..7121e7cd9512 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -146,6 +146,7 @@ struct intel_display_platforms {
func(supports_tv);
#define HAS_128B_Y_TILING(__display) (!(__display)->platform.i915g && !(__display)->platform.i915gm)
+#define HAS_2PPC(__display) (DISPLAY_VER(__display) >= 10)
#define HAS_4TILE(__display) ((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)
#define HAS_ASYNC_FLIPS(__display) (DISPLAY_VER(__display) >= 5)
#define HAS_AS_SDP(__display) (DISPLAY_VER(__display) >= 13)
--
2.54.0
next prev parent reply other threads:[~2026-07-15 12:09 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-15 12:09 [PATCH 0/4] drm/i915/cdclk: Workaround some kind of scaler 2PPC issue Ville Syrjala
2026-07-15 12:09 ` [PATCH 1/4] drm/i915/cdclk: Use intel_cdclk_ppc() in intel_modeset_readout_hw_state() Ville Syrjala
2026-07-16 3:59 ` Garg, Nemesa
2026-07-15 12:09 ` Ville Syrjala [this message]
2026-07-16 4:03 ` [PATCH 2/4] drm/i915/cdclk: Introduce HAS_2PPC() Garg, Nemesa
2026-07-15 12:09 ` [PATCH 3/4] drm/i915/cdclk: Introduce crtc_state->pixel_rate_cdclk Ville Syrjala
2026-07-16 4:00 ` Garg, Nemesa
2026-07-15 12:09 ` [PATCH 4/4] drm/i915/cdclk: Deal with 2 PPC hscale issues when calculating min CDCLK Ville Syrjala
2026-07-16 4:01 ` Garg, Nemesa
2026-07-16 10:58 ` Srinivas, Vidya
2026-07-15 13:28 ` ✗ CI.checkpatch: warning for drm/i915/cdclk: Workaround some kind of scaler 2PPC issue Patchwork
2026-07-15 13:29 ` ✓ CI.KUnit: success " Patchwork
2026-07-15 14:06 ` ✓ Xe.CI.BAT: " Patchwork
2026-07-15 15:53 ` ✗ Xe.CI.FULL: failure " Patchwork
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