[PATCH v8 0/6] drm/xe: add page size allocation mode control and coverage

[PATCH v8 0/6] drm/xe: add page size allocation mode control and coverage

[Nareshkumar Gollakoti]

Some platforms support multiple page sizes for user BO allocations,
including 4K, 64K, 2M, and 1G

For validation and debug, it is useful to control the page size
selection policy for user BOs so that specific allocation paths can be
exercised deterministically. In particular, this makes it possible to
force allocations into 2M-only, 1G-only, or mixed modes.

In mixed mode, allocations are distributed across the supported page
sizes in a round-robin manner. For example, for four user BOs, the
selected page sizes would be:
  - BO1: 4K
  - BO2: 64K
  - BO3: 2M
  - BO4: 1G

This series adds debug page-size allocation control for user BO in xe

This series includes:
 - debug control state in xe_device
 - a debugfs knob to select allocation mode
 - 1G BO alignment flag handling
 - debug policy application at user BO create time
 - PT bind support for selecting leaf level (4K/64K, 2M, 1G paths)
 - add live Kunit coverage for BO page size allocation

The default path is unchanged when the debug control is not enabled.

v2
-- addressed v1 comments at 
   https://patchwork.freedesktop.org/series/169640/

v3
- refactor the design
- update patches based on review feedback
- due to space missing after drm/xe: it created a new series
  https://patchwork.freedesktop.org/series/170246/

v4
- initialize page-size control state before userspace-visible registration
- add Kconfig support before CONFIG_DRM_XE_DEBUG_PAGE_SIZE users
- limit debugfs and BO policy handling to supported dGFX VRAM paths
- add fast-path mode checks and ALIGN() overflow handling
- preserve existing BO NEEDS_* flags
- defer mixed-mode index advancement until successful
  BO create ioctl completion
- replace 2M/1G vma_flags propagation with stable target_leaf_level state
- propagate target_leaf_level from bind op to VMA and into PT bind
- allow smaller huge-page fallback and fix clear_pt handling in PT walk
- skip VRAM-only live KUnit tests on non-dGFX
  and restore state on all exits

v5:
- Guard debug page-size control support with CONFIG_DRM_XE_DEBUG_PAGE_SIZE
- Fix kernel-doc warnings in xe_device_types.h for page_size_alloc_ctrl
- Keep the normal BO creation path unchanged when no debug mode is selected
- Reword commit messages for clarity and to match the implementation

v6:
- Add Gaurd to kunit tests

v7:
- CI build failure

v8:
- use drmm_mutext_init instead mutex_init
- Ensure calling xe_debug_page_size_alloc_ctrl_init
  unconditionally
- refactor helper routine names xe_debug_page_size_mode_not_none()
  xe_debug_page_size_mode_is_mixed()
- use READ_ONCE for lockless wherever needed for readers and also
  match WRITE_ONCE to align READ_ONCE for protected writers
- Make debugfs mode options more readable for that use string fromat like,
  "none", "only_2m", "only_1g" and "mixed" mode
- simplify repeatative loop of mixed mode flag and align check on
  get_flag_from_cur_index_in_mixed_mode()
- drop https://patchwork.freedesktop.org/patch/740059/?series=168905&rev=5
  as this can be managed to get from bo flags on PT layer
- populate xe_walk.target_leaf_level from bo flags through
  xe_pt_target_leaf_level_from_bo()

Nareshkumar Gollakoti (6):
  drm/xe: add page size allocation control state to xe_device
  drm/xe/debugfs: add page-size allocation mode knob
  drm/xe: add XE_BO_FLAG_NEEDS_1G for minimum page-size sizing
  drm/xe: apply debug page-size allocation policy to user BOs
  drm/xe/pt: allow selecting the bind leaf PTE level
  drm/xe/tests: add live KUnit coverage for BO page-size allocation
    modes

 drivers/gpu/drm/xe/Kconfig.debug            |  16 ++
 drivers/gpu/drm/xe/tests/xe_bo.c            | 240 ++++++++++++++++++++
 drivers/gpu/drm/xe/tests/xe_live_test_mod.c |   6 +
 drivers/gpu/drm/xe/xe_bo.c                  | 160 ++++++++++++-
 drivers/gpu/drm/xe/xe_bo.h                  |   1 +
 drivers/gpu/drm/xe/xe_debugfs.c             |  88 +++++++
 drivers/gpu/drm/xe/xe_device.c              |  19 ++
 drivers/gpu/drm/xe/xe_device.h              |  48 ++++
 drivers/gpu/drm/xe/xe_device_types.h        |  31 +++
 drivers/gpu/drm/xe/xe_pt.c                  |  77 ++++++-
 10 files changed, 682 insertions(+), 4 deletions(-)

-- 
2.43.0

[PATCH v8 1/6] drm/xe: add page size allocation control state to xe_device

[Nareshkumar Gollakoti]

Introduce xe_page_size_alloc_ctrl_mode and add page_size_alloc_ctrl
state to struct xe_device along with mutex lock.

The new control supports forcing user BO allocations to 2M pages,
forcing them to 1G pages, or using a mixed round-robin mode across
4K, 64K, 2M, and 1G page sizes. Track the current mixed-mode index
in xe_device so allocation policy can be applied consistently.

v2
- make cur_index to atomic as update need in later patch to
  avoid race/concurency (sashiko)
v3
- reworded comments
- protect mode/index updates with a mutex for proper concurrency handling

v4(sashiko)
- move xe_debug_page_size_alloc_ctrl_init() before drm_dev_register(),
  so mutex and control states are initialized
  before any userspace visibility

v5(Himal)
- Guard all the debug page size policy code under CONFIG
- Squash Kconfig patch to have Kconfig entry for DEBUG_PAGE_SIZE
- Add inline to check debug page size support and exact mode
  configured if it is supported.

v6 (fix CI build)

v8 (Himal)
- use drmm_mutex_init to avoid leak with mutex_init
- call xe_debug_page_size_alloc_ctrl_init unconditionally
- Add missed mixed mode check on xe_debug_page_size_mode_not_none check
- Add xe_debug_page_size_mode_is_mixed() function

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
---
 drivers/gpu/drm/xe/Kconfig.debug     | 16 ++++++++++
 drivers/gpu/drm/xe/xe_device.c       | 19 +++++++++++
 drivers/gpu/drm/xe/xe_device.h       | 48 ++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_device_types.h | 31 ++++++++++++++++++
 4 files changed, 114 insertions(+)

diff --git a/drivers/gpu/drm/xe/Kconfig.debug b/drivers/gpu/drm/xe/Kconfig.debug
index 01227c77f6d7..79118d9efd93 100644
--- a/drivers/gpu/drm/xe/Kconfig.debug
+++ b/drivers/gpu/drm/xe/Kconfig.debug
@@ -86,6 +86,22 @@ config DRM_XE_KUNIT_TEST
 
 	  If in doubt, say "N".
 
+config DRM_XE_DEBUG_PAGE_SIZE
+	bool "Enable debug control for user BO page-size allocation"
+	depends on DRM_XE_DEBUG && DEBUG_FS
+	help
+	  Expose a debugfs knob to override user BO page-size allocation
+	  handling for validation and debug. Supported modes include forced
+	  2M, forced 1G, and a mixed mode that exercises 4K, 64K, 2M, and
+	  1G page-size paths on platforms that support them.
+
+	  This is an unstable debugfs interface intended for development and
+	  validation only. Its layout, contents, and existence may change or
+	  be removed at any time with no regression warranty.
+
+	  Recommended for driver developers only.
+	  If in doubt, say "N".
+
 config DRM_XE_DEBUG_GUC
         bool "Enable extra GuC related debug options"
         depends on DRM_XE_DEBUG
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 4eed9a251e65..c715bb1cafcf 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -921,6 +921,23 @@ static void xe_device_wedged_fini(struct drm_device *drm, void *arg)
 		xe_pm_runtime_put(xe);
 }
 
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+static void xe_debug_page_size_alloc_ctrl_init(struct xe_device *xe)
+{
+	int err;
+
+	err = drmm_mutex_init(&xe->drm, &xe->page_size_alloc_ctrl.lock);
+	if (err)
+		return;
+	xe->page_size_alloc_ctrl.mode = XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE;
+	xe->page_size_alloc_ctrl.cur_index = 0;
+}
+#else
+static void xe_debug_page_size_alloc_ctrl_init(struct xe_device *xe)
+{
+}
+#endif
+
 int xe_device_probe(struct xe_device *xe)
 {
 	struct xe_tile *tile;
@@ -1073,6 +1090,8 @@ int xe_device_probe(struct xe_device *xe)
 	if (err)
 		return err;
 
+	xe_debug_page_size_alloc_ctrl_init(xe);
+
 	err = drm_dev_register(&xe->drm, 0);
 	if (err)
 		return err;
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index a03760d0ce38..6c4cfaebc44a 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -212,6 +212,54 @@ static inline bool xe_device_wedged(struct xe_device *xe)
 	return atomic_read(&xe->wedged.flag);
 }
 
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+static inline bool xe_debug_page_size_supported(struct xe_device *xe)
+{
+	return IS_DGFX(xe);
+}
+
+static inline bool xe_debug_page_size_mode_not_none(struct xe_device *xe)
+{
+	enum xe_page_size_alloc_ctrl_mode mode;
+
+	if (!xe_debug_page_size_supported(xe))
+		return false;
+
+	mode = READ_ONCE(xe->page_size_alloc_ctrl.mode);
+
+	return mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M ||
+	       mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G ||
+	       mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED;
+}
+
+static inline bool xe_debug_page_size_mode_is_mixed(struct xe_device *xe)
+{
+	enum xe_page_size_alloc_ctrl_mode mode;
+
+	if (!xe_debug_page_size_supported(xe))
+		return false;
+
+	mode = READ_ONCE(xe->page_size_alloc_ctrl.mode);
+
+	return mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED;
+}
+#else
+static inline bool xe_debug_page_size_supported(struct xe_device *xe)
+{
+	return false;
+}
+
+static inline bool xe_debug_page_size_mode_not_none(struct xe_device *xe)
+{
+	return false;
+}
+
+static inline bool xe_debug_page_size_mode_is_mixed(struct xe_device *xe)
+{
+	return false;
+}
+#endif
+
 void xe_device_set_wedged_method(struct xe_device *xe, unsigned long method);
 void xe_device_declare_wedged(struct xe_device *xe);
 int xe_device_validate_wedged_mode(struct xe_device *xe, unsigned int mode);
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 860ad322237f..03a7bb08adf7 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -61,6 +61,23 @@ enum xe_wedged_mode {
 	XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET = 2,
 };
 
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+/**
+ * enum xe_page_size_alloc_ctrl_mode - User BO page-size allocation control modes
+ * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE: Use the normal allocation policy
+ * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M: Force user BO allocations to 2M pages
+ * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G: Force user BO allocations to 1G pages
+ * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED: Select page sizes in round-robin order
+ *     (4K, 64K, 2M, 1G)
+ */
+enum xe_page_size_alloc_ctrl_mode {
+	XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE = 0,
+	XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M,
+	XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G,
+	XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED
+};
+#endif
+
 #define XE_BO_INVALID_OFFSET	LONG_MAX
 
 #define GRAPHICS_VER(xe) ((xe)->info.graphics_verx100 / 100)
@@ -478,6 +495,20 @@ struct xe_device {
 	/** @late_bind: xe mei late bind interface */
 	struct xe_late_bind late_bind;
 
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+	/**
+	 * @page_size_alloc_ctrl: User BO page-size allocation
+	 * debug control state
+	 */
+	struct {
+		/** @page_size_alloc_ctrl.mode: xe page size allocation control mode */
+		enum xe_page_size_alloc_ctrl_mode mode;
+		/** @page_size_alloc_ctrl.cur_index: Round-robin index used by mixed mode */
+		u32 cur_index;
+		/** @page_size_alloc_ctrl.lock: Protects @mode and @cur_index */
+		struct mutex lock;
+	} page_size_alloc_ctrl;
+#endif
 	/** @oa: oa observation subsystem */
 	struct xe_oa oa;
 
-- 
2.43.0

Re: [PATCH v8 1/6] drm/xe: add page size allocation control state to xe_device

[Ghimiray, Himal Prasad]

On 22-07-2026 20:07, Nareshkumar Gollakoti wrote:
> Introduce xe_page_size_alloc_ctrl_mode and add page_size_alloc_ctrl
> state to struct xe_device along with mutex lock.
> 
> The new control supports forcing user BO allocations to 2M pages,
> forcing them to 1G pages, or using a mixed round-robin mode across
> 4K, 64K, 2M, and 1G page sizes. Track the current mixed-mode index
> in xe_device so allocation policy can be applied consistently.
> 
> v2
> - make cur_index to atomic as update need in later patch to
>    avoid race/concurency (sashiko)
> v3
> - reworded comments
> - protect mode/index updates with a mutex for proper concurrency handling
> 
> v4(sashiko)
> - move xe_debug_page_size_alloc_ctrl_init() before drm_dev_register(),
>    so mutex and control states are initialized
>    before any userspace visibility
> 
> v5(Himal)
> - Guard all the debug page size policy code under CONFIG
> - Squash Kconfig patch to have Kconfig entry for DEBUG_PAGE_SIZE
> - Add inline to check debug page size support and exact mode
>    configured if it is supported.
> 
> v6 (fix CI build)
> 
> v8 (Himal)
> - use drmm_mutex_init to avoid leak with mutex_init
> - call xe_debug_page_size_alloc_ctrl_init unconditionally
> - Add missed mixed mode check on xe_debug_page_size_mode_not_none check
> - Add xe_debug_page_size_mode_is_mixed() function
> 
> Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> ---
>   drivers/gpu/drm/xe/Kconfig.debug     | 16 ++++++++++
>   drivers/gpu/drm/xe/xe_device.c       | 19 +++++++++++
>   drivers/gpu/drm/xe/xe_device.h       | 48 ++++++++++++++++++++++++++++
>   drivers/gpu/drm/xe/xe_device_types.h | 31 ++++++++++++++++++
>   4 files changed, 114 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/Kconfig.debug b/drivers/gpu/drm/xe/Kconfig.debug
> index 01227c77f6d7..79118d9efd93 100644
> --- a/drivers/gpu/drm/xe/Kconfig.debug
> +++ b/drivers/gpu/drm/xe/Kconfig.debug
> @@ -86,6 +86,22 @@ config DRM_XE_KUNIT_TEST
>   
>   	  If in doubt, say "N".
>   
> +config DRM_XE_DEBUG_PAGE_SIZE
> +	bool "Enable debug control for user BO page-size allocation"
> +	depends on DRM_XE_DEBUG && DEBUG_FS
> +	help
> +	  Expose a debugfs knob to override user BO page-size allocation
> +	  handling for validation and debug. Supported modes include forced
> +	  2M, forced 1G, and a mixed mode that exercises 4K, 64K, 2M, and
> +	  1G page-size paths on platforms that support them.
> +
> +	  This is an unstable debugfs interface intended for development and
> +	  validation only. Its layout, contents, and existence may change or
> +	  be removed at any time with no regression warranty.
> +
> +	  Recommended for driver developers only.
> +	  If in doubt, say "N".
> +
>   config DRM_XE_DEBUG_GUC
>           bool "Enable extra GuC related debug options"
>           depends on DRM_XE_DEBUG
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 4eed9a251e65..c715bb1cafcf 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -921,6 +921,23 @@ static void xe_device_wedged_fini(struct drm_device *drm, void *arg)
>   		xe_pm_runtime_put(xe);
>   }
>   
> +#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> +static void xe_debug_page_size_alloc_ctrl_init(struct xe_device *xe)
> +{
> +	int err;
> +
> +	err = drmm_mutex_init(&xe->drm, &xe->page_size_alloc_ctrl.lock);
> +	if (err)
> +		return;

Do we really need to continue with driver probe if mutex initialization 
fails ? IMO fail probe.

> +	xe->page_size_alloc_ctrl.mode = XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE;
> +	xe->page_size_alloc_ctrl.cur_index = 0;
> +}
> +#else
> +static void xe_debug_page_size_alloc_ctrl_init(struct xe_device *xe)
> +{
> +}
> +#endif
> +
>   int xe_device_probe(struct xe_device *xe)
>   {
>   	struct xe_tile *tile;
> @@ -1073,6 +1090,8 @@ int xe_device_probe(struct xe_device *xe)
>   	if (err)
>   		return err;
>   
> +	xe_debug_page_size_alloc_ctrl_init(xe);
> +
>   	err = drm_dev_register(&xe->drm, 0);
>   	if (err)
>   		return err;
> diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
> index a03760d0ce38..6c4cfaebc44a 100644
> --- a/drivers/gpu/drm/xe/xe_device.h
> +++ b/drivers/gpu/drm/xe/xe_device.h
> @@ -212,6 +212,54 @@ static inline bool xe_device_wedged(struct xe_device *xe)
>   	return atomic_read(&xe->wedged.flag);
>   }
>   
> +#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> +static inline bool xe_debug_page_size_supported(struct xe_device *xe)
> +{
> +	return IS_DGFX(xe);
> +}
> +
> +static inline bool xe_debug_page_size_mode_not_none(struct xe_device *xe)
> +{
> +	enum xe_page_size_alloc_ctrl_mode mode;
> +
> +	if (!xe_debug_page_size_supported(xe))
> +		return false;
> +
> +	mode = READ_ONCE(xe->page_size_alloc_ctrl.mode);
> +
> +	return mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M ||
> +	       mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G ||
> +	       mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED;
> +}
> +
> +static inline bool xe_debug_page_size_mode_is_mixed(struct xe_device *xe)
> +{
> +	enum xe_page_size_alloc_ctrl_mode mode;
> +
> +	if (!xe_debug_page_size_supported(xe))
> +		return false;
> +
> +	mode = READ_ONCE(xe->page_size_alloc_ctrl.mode);
> +
> +	return mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED;
> +}
> +#else
> +static inline bool xe_debug_page_size_supported(struct xe_device *xe)
> +{
> +	return false;
> +}
> +
> +static inline bool xe_debug_page_size_mode_not_none(struct xe_device *xe)
> +{
> +	return false;
> +}
> +
> +static inline bool xe_debug_page_size_mode_is_mixed(struct xe_device *xe)
> +{
> +	return false;
> +}
> +#endif
> +
>   void xe_device_set_wedged_method(struct xe_device *xe, unsigned long method);
>   void xe_device_declare_wedged(struct xe_device *xe);
>   int xe_device_validate_wedged_mode(struct xe_device *xe, unsigned int mode);
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 860ad322237f..03a7bb08adf7 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -61,6 +61,23 @@ enum xe_wedged_mode {
>   	XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET = 2,
>   };
>   
> +#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> +/**
> + * enum xe_page_size_alloc_ctrl_mode - User BO page-size allocation control modes
> + * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE: Use the normal allocation policy
> + * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M: Force user BO allocations to 2M pages
> + * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G: Force user BO allocations to 1G pages
> + * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED: Select page sizes in round-robin order
> + *     (4K, 64K, 2M, 1G)
> + */
> +enum xe_page_size_alloc_ctrl_mode {
> +	XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE = 0,
> +	XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M,
> +	XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G,
> +	XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED
> +};
> +#endif
> +
>   #define XE_BO_INVALID_OFFSET	LONG_MAX
>   
>   #define GRAPHICS_VER(xe) ((xe)->info.graphics_verx100 / 100)
> @@ -478,6 +495,20 @@ struct xe_device {
>   	/** @late_bind: xe mei late bind interface */
>   	struct xe_late_bind late_bind;
>   
> +#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> +	/**
> +	 * @page_size_alloc_ctrl: User BO page-size allocation
> +	 * debug control state
> +	 */
> +	struct {
> +		/** @page_size_alloc_ctrl.mode: xe page size allocation control mode */
> +		enum xe_page_size_alloc_ctrl_mode mode;
> +		/** @page_size_alloc_ctrl.cur_index: Round-robin index used by mixed mode */
> +		u32 cur_index;
> +		/** @page_size_alloc_ctrl.lock: Protects @mode and @cur_index */
> +		struct mutex lock;
> +	} page_size_alloc_ctrl;
> +#endif
>   	/** @oa: oa observation subsystem */
>   	struct xe_oa oa;
>   

[PATCH v8 2/6] drm/xe/debugfs: add page-size allocation mode knob

[Nareshkumar Gollakoti]

Expose a debugfs control to override the page-size allocation mode used
for user BOs.

The interface allows switching between the default allocation policy,
forced 2M, forced 1G, and mixed allocation modes at runtime. This
provides a simple way to validate behavior and debug page-size-dependent
allocation flows.

The debugfs entry is built only when CONFIG_DRM_XE_DEBUG_PAGE_SIZE is
enabled.

v2
- update changelog to match mutex-based cur_index handling
- reset cur_index when switching to mixed mode (sashiko)

v3
- add CONFIG guard for page-size allocation debugfs support (Himal)
- create debugfs entry under CONFIG_DRM_XE_DEBUG_PAGE_SIZE

v4
- reorderd this patch with kconfig patch to ensure patch builds
- Gurding this debug knob for only discrete graphics

v5(Himal)
- Guard all page size calls with CONFIG_DRM_XE_DEBUG_PAGE_SIZE

v8(Himal)
- For read/show used READ_ONCE instead lock
- to match Reader used WRITE_ONCE under lock protection
- change modes to string format to read/writer for debugfs

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/xe_debugfs.c | 88 +++++++++++++++++++++++++++++++++
 1 file changed, 88 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
index 5a3877fcb0f0..a1da0e0e6190 100644
--- a/drivers/gpu/drm/xe/xe_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_debugfs.c
@@ -614,6 +614,82 @@ static const struct file_operations disable_late_binding_fops = {
 	.write = disable_late_binding_set,
 };
 
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+
+static const struct {
+	const char *mode_name;
+	enum xe_page_size_alloc_ctrl_mode mode;
+} page_size_alloc_modes[] = {
+	{ "none", XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE },
+	{ "only_2m", XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M },
+	{ "only_1g", XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G },
+	{ "mixed", XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED },
+};
+
+static ssize_t page_size_alloc_mode_show(struct file *f, char __user *ubuf,
+					 size_t size, loff_t *pos)
+{
+	struct xe_device *xe = file_inode(f)->i_private;
+	char buf[32];
+	int len;
+	enum xe_page_size_alloc_ctrl_mode mode;
+	size_t i;
+
+	mode = READ_ONCE(xe->page_size_alloc_ctrl.mode);
+
+	for (i = 0; i < ARRAY_SIZE(page_size_alloc_modes); i++) {
+		if (page_size_alloc_modes[i].mode == mode)
+			break;
+	}
+
+	len = scnprintf(buf, sizeof(buf), "%s\n",
+			page_size_alloc_modes[i].mode_name);
+	return simple_read_from_buffer(ubuf, size, pos, buf, len);
+}
+
+static ssize_t page_size_alloc_mode_set(struct file *f, const char __user *ubuf,
+					size_t size, loff_t *pos)
+{
+	struct xe_device *xe = file_inode(f)->i_private;
+	int ret;
+	char buf[32];
+	size_t i;
+
+	if (*pos)
+		return -ESPIPE;
+
+	if (size > sizeof(buf) - 1)
+		return -EINVAL;
+
+	ret = simple_write_to_buffer(buf, sizeof(buf) - 1, pos, ubuf, size);
+	if (ret < 0)
+		return ret;
+	buf[ret] = '\0';
+
+	for (i = 0; i < ARRAY_SIZE(page_size_alloc_modes); i++) {
+		if (sysfs_streq(buf, page_size_alloc_modes[i].mode_name)) {
+			mutex_lock(&xe->page_size_alloc_ctrl.lock);
+			if (page_size_alloc_modes[i].mode ==
+			    XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
+				xe->page_size_alloc_ctrl.cur_index = 0;
+
+			WRITE_ONCE(xe->page_size_alloc_ctrl.mode,
+				   page_size_alloc_modes[i].mode);
+			mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+			return size;
+		}
+	}
+
+	return -EINVAL;
+}
+
+static const struct file_operations page_size_alloc_mode_fops = {
+	.owner = THIS_MODULE,
+	.read = page_size_alloc_mode_show,
+	.write = page_size_alloc_mode_set,
+};
+#endif
+
 void xe_debugfs_register(struct xe_device *xe)
 {
 	struct ttm_device *bdev = &xe->ttm;
@@ -665,6 +741,18 @@ void xe_debugfs_register(struct xe_device *xe)
 	debugfs_create_file("disable_late_binding", 0600, root, xe,
 			    &disable_late_binding_fops);
 
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+	/*
+	 * Expose a debugfs knob to control user BO page-size allocation:
+	 * "none"    - default behavior
+	 * "only_2m" - force 2M page allocations
+	 * "only_1g" - force 1G page allocations
+	 * "mixed"   - select 4K, 64K, 2M, and 1G in round-robin order
+	 */
+	if (xe_debug_page_size_supported(xe))
+		debugfs_create_file("page_size_alloc_mode", 0600, root, xe,
+				    &page_size_alloc_mode_fops);
+#endif
 	/*
 	 * Don't expose page reclaim configuration file if not supported by the
 	 * hardware initially.
-- 
2.43.0

Re: [PATCH v8 2/6] drm/xe/debugfs: add page-size allocation mode knob

[Ghimiray, Himal Prasad]

On 22-07-2026 20:07, Nareshkumar Gollakoti wrote:
> Expose a debugfs control to override the page-size allocation mode used
> for user BOs.
> 
> The interface allows switching between the default allocation policy,
> forced 2M, forced 1G, and mixed allocation modes at runtime. This
> provides a simple way to validate behavior and debug page-size-dependent
> allocation flows.
> 
> The debugfs entry is built only when CONFIG_DRM_XE_DEBUG_PAGE_SIZE is
> enabled.
> 
> v2
> - update changelog to match mutex-based cur_index handling
> - reset cur_index when switching to mixed mode (sashiko)
> 
> v3
> - add CONFIG guard for page-size allocation debugfs support (Himal)
> - create debugfs entry under CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> 
> v4
> - reorderd this patch with kconfig patch to ensure patch builds
> - Gurding this debug knob for only discrete graphics
> 
> v5(Himal)
> - Guard all page size calls with CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> 
> v8(Himal)
> - For read/show used READ_ONCE instead lock
> - to match Reader used WRITE_ONCE under lock protection
> - change modes to string format to read/writer for debugfs
> 
> Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
> ---
>   drivers/gpu/drm/xe/xe_debugfs.c | 88 +++++++++++++++++++++++++++++++++
>   1 file changed, 88 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
> index 5a3877fcb0f0..a1da0e0e6190 100644
> --- a/drivers/gpu/drm/xe/xe_debugfs.c
> +++ b/drivers/gpu/drm/xe/xe_debugfs.c
> @@ -614,6 +614,82 @@ static const struct file_operations disable_late_binding_fops = {
>   	.write = disable_late_binding_set,
>   };
>   
> +#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> +
> +static const struct {
> +	const char *mode_name;
> +	enum xe_page_size_alloc_ctrl_mode mode;
> +} page_size_alloc_modes[] = {
> +	{ "none", XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE },
> +	{ "only_2m", XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M },
> +	{ "only_1g", XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G },
> +	{ "mixed", XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED },
> +};
> +
> +static ssize_t page_size_alloc_mode_show(struct file *f, char __user *ubuf,
> +					 size_t size, loff_t *pos)
> +{
> +	struct xe_device *xe = file_inode(f)->i_private;
> +	char buf[32];
> +	int len;
> +	enum xe_page_size_alloc_ctrl_mode mode;
> +	size_t i;
> +
> +	mode = READ_ONCE(xe->page_size_alloc_ctrl.mode);
> +

OOB check for mode

> +	for (i = 0; i < ARRAY_SIZE(page_size_alloc_modes); i++) {
> +		if (page_size_alloc_modes[i].mode == mode)
> +			break;
> +	}

these for loops really looks overhead, possible to use 
page_size_alloc_modes[mode].mode_name

static const char * const page_size_alloc_mode_names[] = {
     [XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE]    = "none",
     [XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M] = "only_2m",
     [XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G] = "only_1g",
     [XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED]   = "mixed",
};


> +
> +	len = scnprintf(buf, sizeof(buf), "%s\n",
> +			page_size_alloc_modes[i].mode_name);
> +	return simple_read_from_buffer(ubuf, size, pos, buf, len);
> +}
> +
> +static ssize_t page_size_alloc_mode_set(struct file *f, const char __user *ubuf,
> +					size_t size, loff_t *pos)
> +{
> +	struct xe_device *xe = file_inode(f)->i_private;
> +	int ret;
> +	char buf[32];
> +	size_t i;
> +
> +	if (*pos)
> +		return -ESPIPE;
> +
> +	if (size > sizeof(buf) - 1)
> +		return -EINVAL;
> +
> +	ret = simple_write_to_buffer(buf, sizeof(buf) - 1, pos, ubuf, size);
> +	if (ret < 0)
> +		return ret;
> +	buf[ret] = '\0';

  mode = sysfs_match_string(page_size_alloc_mode_names, buf);
     if (mode < 0)
         return mode;

     mutex_lock(&xe->page_size_alloc_ctrl.lock);
     if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
         xe->page_size_alloc_ctrl.cur_index = 0;
     WRITE_ONCE(xe->page_size_alloc_ctrl.mode, mode);
     mutex_unlock(&xe->page_size_alloc_ctrl.lock);
     return size;


> +
> +	for (i = 0; i < ARRAY_SIZE(page_size_alloc_modes); i++) {
> +		if (sysfs_streq(buf, page_size_alloc_modes[i].mode_name)) {
> +			mutex_lock(&xe->page_size_alloc_ctrl.lock);
> +			if (page_size_alloc_modes[i].mode ==
> +			    XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
> +				xe->page_size_alloc_ctrl.cur_index = 0;
> +
> +			WRITE_ONCE(xe->page_size_alloc_ctrl.mode,
> +				   page_size_alloc_modes[i].mode);
> +			mutex_unlock(&xe->page_size_alloc_ctrl.lock);
> +			return size;
> +		}
> +	}
> +
> +	return -EINVAL;
> +}
> +
> +static const struct file_operations page_size_alloc_mode_fops = {
> +	.owner = THIS_MODULE,
> +	.read = page_size_alloc_mode_show,
> +	.write = page_size_alloc_mode_set,
> +};
> +#endif
> +
>   void xe_debugfs_register(struct xe_device *xe)
>   {
>   	struct ttm_device *bdev = &xe->ttm;
> @@ -665,6 +741,18 @@ void xe_debugfs_register(struct xe_device *xe)
>   	debugfs_create_file("disable_late_binding", 0600, root, xe,
>   			    &disable_late_binding_fops);
>   
> +#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> +	/*
> +	 * Expose a debugfs knob to control user BO page-size allocation:
> +	 * "none"    - default behavior
> +	 * "only_2m" - force 2M page allocations
> +	 * "only_1g" - force 1G page allocations
> +	 * "mixed"   - select 4K, 64K, 2M, and 1G in round-robin order
> +	 */
> +	if (xe_debug_page_size_supported(xe))
> +		debugfs_create_file("page_size_alloc_mode", 0600, root, xe,
> +				    &page_size_alloc_mode_fops);
> +#endif
>   	/*
>   	 * Don't expose page reclaim configuration file if not supported by the
>   	 * hardware initially.

[PATCH v8 3/6] drm/xe: add XE_BO_FLAG_NEEDS_1G for minimum page-size sizing

[Nareshkumar Gollakoti]

Add XE_BO_FLAG_NEEDS_1G to mark BOs that require 1G minimum page-size
sizing.

Update xe_bo_init_locked() to honor the new flag in the existing
VRAM/stolen-memory minimum page-size sizing path. When
XE_BO_FLAG_NEEDS_1G is set, the BO size is rounded up to 1G. Otherwise,
the existing 2M and 64K sizing behavior is preserved.

If multiple minimum page-size flags are set, the largest requirement
takes precedence: 1G over 2M over 64K.

v3
- commit message reworded

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
---
 drivers/gpu/drm/xe/xe_bo.c | 12 ++++++++++--
 drivers/gpu/drm/xe/xe_bo.h |  1 +
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index c266fa6bade1..cf0b7b35c331 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -2340,8 +2340,16 @@ struct xe_bo *xe_bo_init_locked(struct xe_device *xe, struct xe_bo *bo,
 	if (flags & (XE_BO_FLAG_VRAM_MASK | XE_BO_FLAG_STOLEN) &&
 	    !(flags & XE_BO_FLAG_IGNORE_MIN_PAGE_SIZE) &&
 	    ((xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K) ||
-	     (flags & (XE_BO_FLAG_NEEDS_64K | XE_BO_FLAG_NEEDS_2M)))) {
-		size_t align = flags & XE_BO_FLAG_NEEDS_2M ? SZ_2M : SZ_64K;
+	     (flags & (XE_BO_FLAG_NEEDS_64K | XE_BO_FLAG_NEEDS_2M |
+		       XE_BO_FLAG_NEEDS_1G)))) {
+		size_t align;
+
+		if (flags & XE_BO_FLAG_NEEDS_1G)
+			align = SZ_1G;
+		else if (flags & XE_BO_FLAG_NEEDS_2M)
+			align = SZ_2M;
+		else
+			align = SZ_64K;
 
 		aligned_size = ALIGN(size, align);
 		if (type != ttm_bo_type_device)
diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
index 7ae1d9ac0574..c6d80e1bd6e7 100644
--- a/drivers/gpu/drm/xe/xe_bo.h
+++ b/drivers/gpu/drm/xe/xe_bo.h
@@ -52,6 +52,7 @@
 #define XE_BO_FLAG_CPU_ADDR_MIRROR	BIT(24)
 #define XE_BO_FLAG_FORCE_USER_VRAM	BIT(25)
 #define XE_BO_FLAG_NO_COMPRESSION	BIT(26)
+#define XE_BO_FLAG_NEEDS_1G		BIT(27)
 
 /* this one is trigger internally only */
 #define XE_BO_FLAG_INTERNAL_TEST	BIT(30)
-- 
2.43.0

[PATCH v8 4/6] drm/xe: apply debug page-size allocation policy to user BOs

[Nareshkumar Gollakoti]

Apply the debug page-size allocation policy during user BO creation.

When page-size allocation control is enabled, override the user BO
page-size selection flags based on the selected debug mode and round the
requested size up to the corresponding granularity:
  - 2M mode selects 2M handling
  - 1G mode selects 1G handling
  - mixed mode selects the page size from the current mixed-mode index

This is intended for internal debug and validation flows. When the
control mode is left at the default setting, the normal user BO creation
path is unchanged.

v2
- ensure debug page-size allocation does not
  affect the default path (sashiko)
- rework synchronization for concurrent access (sashiko)
- refactor commit message for readability

v3
- update user BO size alignment based on debug policy mode
- reword commit message
- ensure normal user flow is unchanged when debug policy is disabled

v4(sashiko)
- limit debug page-size policy application to VRAM BOs
- do not override preexisting page-size requirement flags
- advance mixed-mode index only after successful
  BO create ioctl completion
- add overflow checks before ALIGN() in debug page-size handling
- ensure CONFIG_DRM_XE_DEBUG_PAGE_SIZE enabled and it is dgfx

v5(Himal)
v5:
- Guard debug page-size policy paths with CONFIG_DRM_XE_DEBUG_PAGE_SIZE
- Leave the normal BO creation path unchanged
  when no debug mode is selected

v8(Himal)
- Avoid current index increment for system BO's
- Simplify mixed mode align logic by changing array to struct array
- Have a inline check if it is on debug mode or not
- Avoid condition compiled debug in function code blocks

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/xe_bo.c | 148 +++++++++++++++++++++++++++++++++++++
 1 file changed, 148 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index cf0b7b35c331..929669f18788 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -2640,6 +2640,145 @@ static struct xe_bo *xe_bo_create_novm(struct xe_device *xe, struct xe_tile *til
 	return ret ? ERR_PTR(ret) : bo;
 }
 
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+static void xe_bo_debug_mixed_mode_cur_index_advance(struct xe_device *xe, struct xe_bo *bo)
+{
+	if (!xe_debug_page_size_mode_is_mixed(xe))
+		return;
+
+	if (!(bo->flags & XE_BO_FLAG_VRAM_MASK) ||
+	    !(bo->flags & XE_BO_FLAG_USER))
+		return;
+
+	mutex_lock(&xe->page_size_alloc_ctrl.lock);
+	if (xe->page_size_alloc_ctrl.mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
+		xe->page_size_alloc_ctrl.cur_index++;
+	mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+}
+
+static bool xe_size_align_overflows(size_t size, size_t align)
+{
+	return size > SIZE_MAX - (align - 1);
+}
+
+static u32 get_flag_from_cur_index_in_mixed_mode(struct xe_device *xe, size_t *align_size,
+						 int *err)
+{
+	static const struct {
+		u32    flag;
+		size_t align;
+	} map[] = {
+		{ 0,                     SZ_4K  }, /* default: 4K, no flag */
+		{ XE_BO_FLAG_NEEDS_64K,  SZ_64K },
+		{ XE_BO_FLAG_NEEDS_2M,   SZ_2M  },
+		{ XE_BO_FLAG_NEEDS_1G,   SZ_1G  },
+	};
+	u32 idx;
+	const typeof(*map) *entry;
+
+	lockdep_assert_held(&xe->page_size_alloc_ctrl.lock);
+
+	*err = 0;
+	idx = xe->page_size_alloc_ctrl.cur_index % ARRAY_SIZE(map);
+
+	entry = &map[idx];
+
+	if (!entry->flag)
+		return 0;
+
+	if (xe_size_align_overflows(*align_size, entry->align)) {
+		*err = -EINVAL;
+		return 0;
+	}
+	*align_size = ALIGN(*align_size, entry->align);
+
+	return entry->flag;
+}
+
+static int xe_bo_apply_debug_page_size_policy(struct xe_device *xe,
+					      u32 *bo_flags,
+					      size_t *size)
+{
+	enum xe_page_size_alloc_ctrl_mode mode;
+	u32 want = 0;
+	size_t align_size = *size;
+	int err = 0;
+
+	/*
+	 * The debug page-size policy is only meaningful for BOs placed in
+	 * VRAM, where the downstream BO init path can
+	 * actually honor the corresponding minimum page-size requirement.
+	 */
+	if (!(*bo_flags & XE_BO_FLAG_VRAM_MASK))
+		return 0;
+
+	/*
+	 * Do not override existing page-size requirement flags, since they
+	 * may reflect functional requirements for specific BO types.
+	 */
+	if (*bo_flags & (XE_BO_FLAG_NEEDS_64K |
+			 XE_BO_FLAG_NEEDS_2M |
+			 XE_BO_FLAG_NEEDS_1G))
+		return 0;
+
+	if (!READ_ONCE(xe->page_size_alloc_ctrl.mode))
+		return 0;
+
+	mutex_lock(&xe->page_size_alloc_ctrl.lock);
+
+	mode = xe->page_size_alloc_ctrl.mode;
+	if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE) {
+		goto out_unlock;
+	} else if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M) {
+		if (xe_size_align_overflows(align_size, SZ_2M)) {
+			err = -EINVAL;
+			goto out_unlock;
+		}
+		want = XE_BO_FLAG_NEEDS_2M;
+		align_size = ALIGN(align_size, SZ_2M);
+	} else if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G) {
+		if (xe_size_align_overflows(align_size, SZ_1G)) {
+			err = -EINVAL;
+			goto out_unlock;
+		}
+		want = XE_BO_FLAG_NEEDS_1G;
+		align_size = ALIGN(align_size, SZ_1G);
+	} else if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED) {
+		want = get_flag_from_cur_index_in_mixed_mode(xe, &align_size, &err);
+		if (err)
+			goto out_unlock;
+	} else {
+		goto out_unlock;
+	}
+
+	mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+
+	*bo_flags |= want;
+	/*
+	 * Apply the debug page-size policy by rounding the user BO size up to
+	 * the selected granularity.
+	 */
+	*size = align_size;
+	return err;
+
+out_unlock:
+	mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+	return err;
+}
+#else
+static int xe_bo_apply_debug_page_size_policy(struct xe_device *xe,
+					      u32 *bo_flags,
+					      size_t *size)
+{
+	return 0;
+}
+
+static void xe_bo_debug_mixed_mode_cur_index_advance(struct xe_device *xe,
+						     struct xe_bo *bo)
+{
+}
+#endif
+
 /**
  * xe_bo_create_user() - Create a user BO
  * @xe: The xe device.
@@ -2660,9 +2799,16 @@ struct xe_bo *xe_bo_create_user(struct xe_device *xe,
 				u32 flags, struct drm_exec *exec)
 {
 	struct xe_bo *bo;
+	int err = 0;
 
 	flags |= XE_BO_FLAG_USER;
 
+	if (xe_debug_page_size_mode_not_none(xe)) {
+		err = xe_bo_apply_debug_page_size_policy(xe, &flags, &size);
+		if (err)
+			return ERR_PTR(err);
+	}
+
 	if (vm || exec) {
 		xe_assert(xe, exec);
 		bo = __xe_bo_create_locked(xe, NULL, vm, size, 0, ~0ULL,
@@ -3477,6 +3623,8 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
 	if (err)
 		goto out_bulk;
 
+	xe_bo_debug_mixed_mode_cur_index_advance(xe, bo);
+
 	args->handle = handle;
 	goto out_put;
 
-- 
2.43.0

Re: [PATCH v8 4/6] drm/xe: apply debug page-size allocation policy to user BOs

[Ghimiray, Himal Prasad]

On 22-07-2026 20:07, Nareshkumar Gollakoti wrote:
> Apply the debug page-size allocation policy during user BO creation.
> 
> When page-size allocation control is enabled, override the user BO
> page-size selection flags based on the selected debug mode and round the
> requested size up to the corresponding granularity:
>    - 2M mode selects 2M handling
>    - 1G mode selects 1G handling
>    - mixed mode selects the page size from the current mixed-mode index
> 
> This is intended for internal debug and validation flows. When the
> control mode is left at the default setting, the normal user BO creation
> path is unchanged.
> 
> v2
> - ensure debug page-size allocation does not
>    affect the default path (sashiko)
> - rework synchronization for concurrent access (sashiko)
> - refactor commit message for readability
> 
> v3
> - update user BO size alignment based on debug policy mode
> - reword commit message
> - ensure normal user flow is unchanged when debug policy is disabled
> 
> v4(sashiko)
> - limit debug page-size policy application to VRAM BOs
> - do not override preexisting page-size requirement flags
> - advance mixed-mode index only after successful
>    BO create ioctl completion
> - add overflow checks before ALIGN() in debug page-size handling
> - ensure CONFIG_DRM_XE_DEBUG_PAGE_SIZE enabled and it is dgfx
> 
> v5(Himal)
> v5:
> - Guard debug page-size policy paths with CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> - Leave the normal BO creation path unchanged
>    when no debug mode is selected
> 
> v8(Himal)
> - Avoid current index increment for system BO's
> - Simplify mixed mode align logic by changing array to struct array
> - Have a inline check if it is on debug mode or not
> - Avoid condition compiled debug in function code blocks
> 

Looks got to me.

Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>

> Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
> ---
>   drivers/gpu/drm/xe/xe_bo.c | 148 +++++++++++++++++++++++++++++++++++++
>   1 file changed, 148 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> index cf0b7b35c331..929669f18788 100644
> --- a/drivers/gpu/drm/xe/xe_bo.c
> +++ b/drivers/gpu/drm/xe/xe_bo.c
> @@ -2640,6 +2640,145 @@ static struct xe_bo *xe_bo_create_novm(struct xe_device *xe, struct xe_tile *til
>   	return ret ? ERR_PTR(ret) : bo;
>   }
>   
> +#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
> +static void xe_bo_debug_mixed_mode_cur_index_advance(struct xe_device *xe, struct xe_bo *bo)
> +{
> +	if (!xe_debug_page_size_mode_is_mixed(xe))
> +		return;
> +
> +	if (!(bo->flags & XE_BO_FLAG_VRAM_MASK) ||
> +	    !(bo->flags & XE_BO_FLAG_USER))
> +		return;
> +
> +	mutex_lock(&xe->page_size_alloc_ctrl.lock);
> +	if (xe->page_size_alloc_ctrl.mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
> +		xe->page_size_alloc_ctrl.cur_index++;
> +	mutex_unlock(&xe->page_size_alloc_ctrl.lock);
> +}
> +
> +static bool xe_size_align_overflows(size_t size, size_t align)
> +{
> +	return size > SIZE_MAX - (align - 1);
> +}
> +
> +static u32 get_flag_from_cur_index_in_mixed_mode(struct xe_device *xe, size_t *align_size,
> +						 int *err)
> +{
> +	static const struct {
> +		u32    flag;
> +		size_t align;
> +	} map[] = {
> +		{ 0,                     SZ_4K  }, /* default: 4K, no flag */
> +		{ XE_BO_FLAG_NEEDS_64K,  SZ_64K },
> +		{ XE_BO_FLAG_NEEDS_2M,   SZ_2M  },
> +		{ XE_BO_FLAG_NEEDS_1G,   SZ_1G  },
> +	};
> +	u32 idx;
> +	const typeof(*map) *entry;
> +
> +	lockdep_assert_held(&xe->page_size_alloc_ctrl.lock);
> +
> +	*err = 0;
> +	idx = xe->page_size_alloc_ctrl.cur_index % ARRAY_SIZE(map);
> +
> +	entry = &map[idx];
> +
> +	if (!entry->flag)
> +		return 0;
> +
> +	if (xe_size_align_overflows(*align_size, entry->align)) {
> +		*err = -EINVAL;
> +		return 0;
> +	}
> +	*align_size = ALIGN(*align_size, entry->align);
> +
> +	return entry->flag;
> +}
> +
> +static int xe_bo_apply_debug_page_size_policy(struct xe_device *xe,
> +					      u32 *bo_flags,
> +					      size_t *size)
> +{
> +	enum xe_page_size_alloc_ctrl_mode mode;
> +	u32 want = 0;
> +	size_t align_size = *size;
> +	int err = 0;
> +
> +	/*
> +	 * The debug page-size policy is only meaningful for BOs placed in
> +	 * VRAM, where the downstream BO init path can
> +	 * actually honor the corresponding minimum page-size requirement.
> +	 */
> +	if (!(*bo_flags & XE_BO_FLAG_VRAM_MASK))
> +		return 0;
> +
> +	/*
> +	 * Do not override existing page-size requirement flags, since they
> +	 * may reflect functional requirements for specific BO types.
> +	 */
> +	if (*bo_flags & (XE_BO_FLAG_NEEDS_64K |
> +			 XE_BO_FLAG_NEEDS_2M |
> +			 XE_BO_FLAG_NEEDS_1G))
> +		return 0;
> +
> +	if (!READ_ONCE(xe->page_size_alloc_ctrl.mode))
> +		return 0;
> +
> +	mutex_lock(&xe->page_size_alloc_ctrl.lock);
> +
> +	mode = xe->page_size_alloc_ctrl.mode;
> +	if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_NONE) {
> +		goto out_unlock;
> +	} else if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M) {
> +		if (xe_size_align_overflows(align_size, SZ_2M)) {
> +			err = -EINVAL;
> +			goto out_unlock;
> +		}
> +		want = XE_BO_FLAG_NEEDS_2M;
> +		align_size = ALIGN(align_size, SZ_2M);
> +	} else if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G) {
> +		if (xe_size_align_overflows(align_size, SZ_1G)) {
> +			err = -EINVAL;
> +			goto out_unlock;
> +		}
> +		want = XE_BO_FLAG_NEEDS_1G;
> +		align_size = ALIGN(align_size, SZ_1G);
> +	} else if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED) {
> +		want = get_flag_from_cur_index_in_mixed_mode(xe, &align_size, &err);
> +		if (err)
> +			goto out_unlock;
> +	} else {
> +		goto out_unlock;
> +	}
> +
> +	mutex_unlock(&xe->page_size_alloc_ctrl.lock);
> +
> +	*bo_flags |= want;
> +	/*
> +	 * Apply the debug page-size policy by rounding the user BO size up to
> +	 * the selected granularity.
> +	 */
> +	*size = align_size;
> +	return err;
> +
> +out_unlock:
> +	mutex_unlock(&xe->page_size_alloc_ctrl.lock);
> +	return err;
> +}
> +#else
> +static int xe_bo_apply_debug_page_size_policy(struct xe_device *xe,
> +					      u32 *bo_flags,
> +					      size_t *size)
> +{
> +	return 0;
> +}
> +
> +static void xe_bo_debug_mixed_mode_cur_index_advance(struct xe_device *xe,
> +						     struct xe_bo *bo)
> +{
> +}
> +#endif
> +
>   /**
>    * xe_bo_create_user() - Create a user BO
>    * @xe: The xe device.
> @@ -2660,9 +2799,16 @@ struct xe_bo *xe_bo_create_user(struct xe_device *xe,
>   				u32 flags, struct drm_exec *exec)
>   {
>   	struct xe_bo *bo;
> +	int err = 0;
>   
>   	flags |= XE_BO_FLAG_USER;
>   
> +	if (xe_debug_page_size_mode_not_none(xe)) {
> +		err = xe_bo_apply_debug_page_size_policy(xe, &flags, &size);
> +		if (err)
> +			return ERR_PTR(err);
> +	}
> +
>   	if (vm || exec) {
>   		xe_assert(xe, exec);
>   		bo = __xe_bo_create_locked(xe, NULL, vm, size, 0, ~0ULL,
> @@ -3477,6 +3623,8 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
>   	if (err)
>   		goto out_bulk;
>   
> +	xe_bo_debug_mixed_mode_cur_index_advance(xe, bo);
> +
>   	args->handle = handle;
>   	goto out_put;
>   

[PATCH v8 5/6] drm/xe/pt: allow selecting the bind leaf PTE level

[Nareshkumar Gollakoti]

Add a target_leaf_level field to the page-table bind walk and use it to
    control the level at which leaf entries are emitted.

    By default, the bind walk emits level-0 leaf PTEs and relies on
    xe_pt_hugepte_possible() to select huge mappings when possible. Add an
    explicit target leaf level so the walk can stop earlier when the VMA
    requests a larger mapping size.

    Use level 1 for 2M PDE mappings and level 2 for 1G PDP mappings, while
    keeping level 0 for normal mappings. The existing huge-page heuristic
    is preserved for the default level-0 path.

    This allows the bind path to emit 2M and 1G leaf entries when requested
    by the VMA, while still validating alignment and size requirements.

    v2
    - avoid using max_level to control walk depth
    - use target_leaf_level to preserve the normal walk behavior
    - keep the default huge-page heuristic only for the level-0 path
    - refine commit message

    v3
    - reword commit message

    v4
    - allow fallback to smaller huge-page levels for non-zero
      target_leaf_level
    - avoid constraining clear_pt walks by target_leaf_level

    v5(Himal)
    - Restrict only intended level in debug page size policy mode
    - Allow the normal path to proceed smoothly when
      no debug page-size mode is selected.
    v8 (Himal)
    - Drop
      https://patchwork.freedesktop.org/patch/740059/?series=168905&rev=5
      patch and populate target_leaf_level from bo flags
    - populate target_leaf_level if it is in debug page size mode
      otherwise fill with 0 which is having no effect on the normal
      flow

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/xe_pt.c | 77 +++++++++++++++++++++++++++++++++++++-
 1 file changed, 75 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index 598c6b2571e7..b360ef4e2a7e 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -302,6 +302,14 @@ struct xe_pt_stage_bind_walk {
 	bool needs_64K;
 	/** @clear_pt: clear page table entries during the bind walk */
 	bool clear_pt;
+	/**
+	 * @target_leaf_level: Page-table level at which to emit leaf PTEs
+	 * 0 for normal 4K/64K mappings, 1 for 2M huge pages, and 2 for 1G huge
+	 * pages. The walk still traverses from the root down; this field tells
+	 * xe_pt_stage_bind_entry() to treat the selected level as a leaf instead
+	 * of descending further.
+	 */
+	u32 target_leaf_level;
 	/**
 	 * @vma: VMA being mapped
 	 */
@@ -514,6 +522,39 @@ xe_pt_is_pte_ps64K(u64 addr, u64 next, struct xe_pt_stage_bind_walk *xe_walk)
 	return xe_walk->found_64K;
 }
 
+static bool xe_pt_huge_leaf_allowed(u64 addr, u64 next, unsigned int level,
+				    struct xe_pt_stage_bind_walk *xe_walk)
+{
+	if (xe_walk->clear_pt)
+		return xe_pt_hugepte_possible(addr, next, level, xe_walk);
+
+	if (!xe_debug_page_size_supported(xe_walk->vm->xe))
+		return xe_pt_hugepte_possible(addr, next, level, xe_walk);
+
+	if (!xe_walk->target_leaf_level)
+		return xe_pt_hugepte_possible(addr, next, level, xe_walk);
+
+	if (level == xe_walk->target_leaf_level)
+		return xe_pt_hugepte_possible(addr, next, level, xe_walk);
+
+	return false;
+}
+
+static bool xe_pt_exact_leaf_required_but_invalid(u64 addr, u64 next,
+						  unsigned int level,
+						  struct xe_pt_stage_bind_walk *xe_walk)
+{
+	struct xe_device *xe = xe_walk->vm->xe;
+
+	if (!xe_debug_page_size_mode_not_none(xe))
+		return false;
+
+	return !xe_walk->clear_pt &&
+		xe_walk->target_leaf_level &&
+		level == xe_walk->target_leaf_level &&
+		!xe_pt_hugepte_possible(addr, next, level, xe_walk);
+}
+
 static int
 xe_pt_stage_bind_entry(struct xe_ptw *parent, pgoff_t offset,
 		       unsigned int level, u64 addr, u64 next,
@@ -531,8 +572,18 @@ xe_pt_stage_bind_entry(struct xe_ptw *parent, pgoff_t offset,
 	int ret = 0;
 	u64 pte;
 
-	/* Is this a leaf entry ?*/
-	if (level == 0 || xe_pt_hugepte_possible(addr, next, level, xe_walk)) {
+	if (xe_pt_exact_leaf_required_but_invalid(addr, next, level, xe_walk))
+		return -EINVAL;
+
+	/*
+	 * Is this a leaf entry?
+	 * Always create a 4K leaf at level 0. For huge pages (level > 0),
+	 * validate alignment and size with xe_pt_hugepte_possible().
+	 * When target_leaf_level is non-zero, only that huge-page level is
+	 * accepted for normal bind walks. Clear walks remain unconstrained so
+	 * existing huge leaves can be cleared without descending further.
+	 */
+	if (level == 0 || xe_pt_huge_leaf_allowed(addr, next, level, xe_walk)) {
 		struct xe_res_cursor *curs = xe_walk->curs;
 		struct xe_bo *bo = xe_vma_bo(xe_walk->vma);
 		bool is_null_or_purged = xe_vma_is_null(xe_walk->vma) ||
@@ -682,6 +733,27 @@ static bool xe_atomic_for_system(struct xe_vm *vm, struct xe_vma *vma)
 				 (bo && xe_bo_has_single_placement(bo))));
 }
 
+static u32 xe_pt_target_leaf_level_from_bo(struct xe_device *xe,
+					   struct xe_vma *vma)
+{
+	struct xe_bo *bo = xe_vma_bo(vma);
+
+	if (!xe_debug_page_size_mode_not_none(xe))
+		return 0;
+
+	if (!bo || !(bo->flags & XE_BO_FLAG_VRAM_MASK) ||
+	    !(bo->flags & XE_BO_FLAG_USER))
+		return 0;
+
+	if (bo->flags & XE_BO_FLAG_NEEDS_1G)
+		return 2;
+
+	if (bo->flags & XE_BO_FLAG_NEEDS_2M)
+		return 1;
+
+	return 0;
+}
+
 /**
  * xe_pt_stage_bind() - Build a disconnected page-table tree for a given address
  * range.
@@ -774,6 +846,7 @@ xe_pt_stage_bind(struct xe_tile *tile, struct xe_vma *vma,
 		xe_svm_notifier_unlock(vm);
 	}
 
+	xe_walk.target_leaf_level = xe_pt_target_leaf_level_from_bo(xe, vma);
 	xe_walk.needs_64K = (vm->flags & XE_VM_FLAG_64K);
 	if (clear_pt)
 		goto walk_pt;
-- 
2.43.0

Re: [PATCH v8 5/6] drm/xe/pt: allow selecting the bind leaf PTE level

[Ghimiray, Himal Prasad]

On 22-07-2026 20:07, Nareshkumar Gollakoti wrote:
> Add a target_leaf_level field to the page-table bind walk and use it to
>      control the level at which leaf entries are emitted.
> 
>      By default, the bind walk emits level-0 leaf PTEs and relies on
>      xe_pt_hugepte_possible() to select huge mappings when possible. Add an
>      explicit target leaf level so the walk can stop earlier when the VMA
>      requests a larger mapping size.
> 
>      Use level 1 for 2M PDE mappings and level 2 for 1G PDP mappings, while
>      keeping level 0 for normal mappings. The existing huge-page heuristic
>      is preserved for the default level-0 path.
> 
>      This allows the bind path to emit 2M and 1G leaf entries when requested
>      by the VMA, while still validating alignment and size requirements.
> 
>      v2
>      - avoid using max_level to control walk depth
>      - use target_leaf_level to preserve the normal walk behavior
>      - keep the default huge-page heuristic only for the level-0 path
>      - refine commit message
> 
>      v3
>      - reword commit message
> 
>      v4
>      - allow fallback to smaller huge-page levels for non-zero
>        target_leaf_level
>      - avoid constraining clear_pt walks by target_leaf_level
> 
>      v5(Himal)
>      - Restrict only intended level in debug page size policy mode
>      - Allow the normal path to proceed smoothly when
>        no debug page-size mode is selected.
>      v8 (Himal)
>      - Drop
>        https://patchwork.freedesktop.org/patch/740059/?series=168905&rev=5
>        patch and populate target_leaf_level from bo flags
>      - populate target_leaf_level if it is in debug page size mode
>        otherwise fill with 0 which is having no effect on the normal
>        flow
> 
> Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>

Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>

> ---
>   drivers/gpu/drm/xe/xe_pt.c | 77 +++++++++++++++++++++++++++++++++++++-
>   1 file changed, 75 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
> index 598c6b2571e7..b360ef4e2a7e 100644
> --- a/drivers/gpu/drm/xe/xe_pt.c
> +++ b/drivers/gpu/drm/xe/xe_pt.c
> @@ -302,6 +302,14 @@ struct xe_pt_stage_bind_walk {
>   	bool needs_64K;
>   	/** @clear_pt: clear page table entries during the bind walk */
>   	bool clear_pt;
> +	/**
> +	 * @target_leaf_level: Page-table level at which to emit leaf PTEs
> +	 * 0 for normal 4K/64K mappings, 1 for 2M huge pages, and 2 for 1G huge
> +	 * pages. The walk still traverses from the root down; this field tells
> +	 * xe_pt_stage_bind_entry() to treat the selected level as a leaf instead
> +	 * of descending further.
> +	 */
> +	u32 target_leaf_level;
>   	/**
>   	 * @vma: VMA being mapped
>   	 */
> @@ -514,6 +522,39 @@ xe_pt_is_pte_ps64K(u64 addr, u64 next, struct xe_pt_stage_bind_walk *xe_walk)
>   	return xe_walk->found_64K;
>   }
>   
> +static bool xe_pt_huge_leaf_allowed(u64 addr, u64 next, unsigned int level,
> +				    struct xe_pt_stage_bind_walk *xe_walk)
> +{
> +	if (xe_walk->clear_pt)
> +		return xe_pt_hugepte_possible(addr, next, level, xe_walk);
> +
> +	if (!xe_debug_page_size_supported(xe_walk->vm->xe))
> +		return xe_pt_hugepte_possible(addr, next, level, xe_walk);
> +
> +	if (!xe_walk->target_leaf_level)
> +		return xe_pt_hugepte_possible(addr, next, level, xe_walk);
> +
> +	if (level == xe_walk->target_leaf_level)
> +		return xe_pt_hugepte_possible(addr, next, level, xe_walk);
> +
> +	return false;
> +}
> +
> +static bool xe_pt_exact_leaf_required_but_invalid(u64 addr, u64 next,
> +						  unsigned int level,
> +						  struct xe_pt_stage_bind_walk *xe_walk)
> +{
> +	struct xe_device *xe = xe_walk->vm->xe;
> +
> +	if (!xe_debug_page_size_mode_not_none(xe))
> +		return false;
> +
> +	return !xe_walk->clear_pt &&
> +		xe_walk->target_leaf_level &&
> +		level == xe_walk->target_leaf_level &&
> +		!xe_pt_hugepte_possible(addr, next, level, xe_walk);
> +}
> +
>   static int
>   xe_pt_stage_bind_entry(struct xe_ptw *parent, pgoff_t offset,
>   		       unsigned int level, u64 addr, u64 next,
> @@ -531,8 +572,18 @@ xe_pt_stage_bind_entry(struct xe_ptw *parent, pgoff_t offset,
>   	int ret = 0;
>   	u64 pte;
>   
> -	/* Is this a leaf entry ?*/
> -	if (level == 0 || xe_pt_hugepte_possible(addr, next, level, xe_walk)) {
> +	if (xe_pt_exact_leaf_required_but_invalid(addr, next, level, xe_walk))
> +		return -EINVAL;
> +
> +	/*
> +	 * Is this a leaf entry?
> +	 * Always create a 4K leaf at level 0. For huge pages (level > 0),
> +	 * validate alignment and size with xe_pt_hugepte_possible().
> +	 * When target_leaf_level is non-zero, only that huge-page level is
> +	 * accepted for normal bind walks. Clear walks remain unconstrained so
> +	 * existing huge leaves can be cleared without descending further.
> +	 */
> +	if (level == 0 || xe_pt_huge_leaf_allowed(addr, next, level, xe_walk)) {
>   		struct xe_res_cursor *curs = xe_walk->curs;
>   		struct xe_bo *bo = xe_vma_bo(xe_walk->vma);
>   		bool is_null_or_purged = xe_vma_is_null(xe_walk->vma) ||
> @@ -682,6 +733,27 @@ static bool xe_atomic_for_system(struct xe_vm *vm, struct xe_vma *vma)
>   				 (bo && xe_bo_has_single_placement(bo))));
>   }
>   
> +static u32 xe_pt_target_leaf_level_from_bo(struct xe_device *xe,
> +					   struct xe_vma *vma)
> +{
> +	struct xe_bo *bo = xe_vma_bo(vma);
> +
> +	if (!xe_debug_page_size_mode_not_none(xe))
> +		return 0;
> +
> +	if (!bo || !(bo->flags & XE_BO_FLAG_VRAM_MASK) ||
> +	    !(bo->flags & XE_BO_FLAG_USER))
> +		return 0;
> +
> +	if (bo->flags & XE_BO_FLAG_NEEDS_1G)
> +		return 2;
> +
> +	if (bo->flags & XE_BO_FLAG_NEEDS_2M)
> +		return 1;
> +
> +	return 0;
> +}
> +
>   /**
>    * xe_pt_stage_bind() - Build a disconnected page-table tree for a given address
>    * range.
> @@ -774,6 +846,7 @@ xe_pt_stage_bind(struct xe_tile *tile, struct xe_vma *vma,
>   		xe_svm_notifier_unlock(vm);
>   	}
>   
> +	xe_walk.target_leaf_level = xe_pt_target_leaf_level_from_bo(xe, vma);
>   	xe_walk.needs_64K = (vm->flags & XE_VM_FLAG_64K);
>   	if (clear_pt)
>   		goto walk_pt;

[PATCH v8 6/6] drm/xe/tests: add live KUnit coverage for BO page-size allocation modes

[Nareshkumar Gollakoti]

Add live KUnit coverage for the debug-controlled BO
    page-size allocation modes.

    The new tests cover forced 2M mode, forced 1G mode,
    and mixed mode. They verify that user BO creation applies
    the expected NEEDS_* flags, that no unexpected page-size flags are
    added in the forced modes, that BO size is rounded as expected, and
    that page_alignment matches the selected leaf size.

    The mixed-mode test does not assume a strict per-allocation rotation
    sequence, since the device-global mixed-mode index may be perturbed by
    concurrent BO creation on a live system. Instead,
    it validates that each allocation results in
    one valid mixed-mode page-size outcome.

    Treat transient VRAM allocation failures as skipped test cases so the
    tests can run in varying live environments without producing false
    failures.

    v3
    - address review comments
    - rework mixed-mode test to avoid assuming strict rotation order
    - reword commit message
    v4
    - skip VRAM-targeted live tests on non-dGFX devices
    v5
    - advance the mixed-mode index in the test
    v6
    - Gaurd kunit tests under CONFIG_DRM_XE_DEBUG_PAGE_SIZE

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/tests/xe_bo.c            | 240 ++++++++++++++++++++
 drivers/gpu/drm/xe/tests/xe_live_test_mod.c |   6 +
 2 files changed, 246 insertions(+)

diff --git a/drivers/gpu/drm/xe/tests/xe_bo.c b/drivers/gpu/drm/xe/tests/xe_bo.c
index 49c95ed67d7e..d28a12e981e3 100644
--- a/drivers/gpu/drm/xe/tests/xe_bo.c
+++ b/drivers/gpu/drm/xe/tests/xe_bo.c
@@ -22,6 +22,229 @@
 #include "xe_pci.h"
 #include "xe_pm.h"
 
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+struct page_size_alloc_saved {
+	enum xe_page_size_alloc_ctrl_mode mode;
+	u32 cur_index;
+};
+
+/* Caller must hold xe->page_size_alloc_ctrl.lock. */
+static void page_size_alloc_save(struct xe_device *xe,
+				 struct page_size_alloc_saved *s)
+{
+	s->mode = xe->page_size_alloc_ctrl.mode;
+	s->cur_index = xe->page_size_alloc_ctrl.cur_index;
+}
+
+static void page_size_alloc_restore(struct xe_device *xe,
+				    const struct page_size_alloc_saved *s)
+{
+	mutex_lock(&xe->page_size_alloc_ctrl.lock);
+	xe->page_size_alloc_ctrl.mode = s->mode;
+	xe->page_size_alloc_ctrl.cur_index = s->cur_index;
+	mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+}
+
+/* Expected properties for a forced page-size allocation mode. */
+struct leaf_info {
+	u64 leaf;
+	u64 alloc_size;
+	u32 flag;
+	const char *name;
+};
+
+static const struct leaf_info leaf_2m = {
+	.leaf = SZ_2M,
+	.alloc_size = SZ_2M - PAGE_SIZE,
+	.flag = XE_BO_FLAG_NEEDS_2M,
+	.name = "2M",
+};
+
+static const struct leaf_info leaf_1g = {
+	.leaf = SZ_1G,
+	.alloc_size = SZ_1G - PAGE_SIZE,
+	.flag = XE_BO_FLAG_NEEDS_1G,
+	.name = "1G",
+};
+
+static void run_only_leaf(struct kunit *test,
+			  enum xe_page_size_alloc_ctrl_mode mode,
+			  const struct leaf_info *li)
+{
+	struct xe_device *xe = test->priv;
+	struct page_size_alloc_saved saved;
+	struct xe_bo *bo;
+	struct ttm_buffer_object *ttm_bo;
+	u32 other_flags;
+
+	if (!IS_DGFX(xe)) {
+		kunit_skip(test, "requires dGFX VRAM");
+		return;
+	}
+
+	mutex_lock(&xe->page_size_alloc_ctrl.lock);
+	page_size_alloc_save(xe, &saved);
+	xe->page_size_alloc_ctrl.mode = mode;
+	mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+
+	bo = xe_bo_create_user(xe, NULL, li->alloc_size,
+			       DRM_XE_GEM_CPU_CACHING_WC,
+			       XE_BO_FLAG_VRAM0, NULL);
+	if (IS_ERR(bo)) {
+		page_size_alloc_restore(xe, &saved);
+		if (PTR_ERR(bo) == -ENOSPC) {
+			kunit_skip(test,
+				   "no contiguous %s VRAM available right now",
+				   li->name);
+			return;
+		}
+
+		KUNIT_FAIL(test, "%s BO alloc failed: %pe", li->name, bo);
+		return;
+	}
+
+	ttm_bo = &bo->ttm;
+
+	/* 1) The mode added the right NEEDS_* flag. */
+	KUNIT_EXPECT_TRUE_MSG(test, bo->flags & li->flag,
+			      "%s: flag missing, flags=0x%x",
+			      li->name, bo->flags);
+
+	/* 2) No other NEEDS_* flags accidentally tagged on. */
+	other_flags = (XE_BO_FLAG_NEEDS_64K |
+		       XE_BO_FLAG_NEEDS_2M |
+		       XE_BO_FLAG_NEEDS_1G) & ~li->flag;
+	KUNIT_EXPECT_FALSE_MSG(test, bo->flags & other_flags,
+			       "%s: stray flags=0x%x",
+			       li->name, bo->flags);
+	/* 3) BO size was rounded up to the expected leaf size. */
+	KUNIT_EXPECT_EQ_MSG(test, xe_bo_size(bo), li->leaf,
+			    "%s: bo size=%llu expected=%llu",
+			    li->name,
+			    (u64)xe_bo_size(bo),
+			    (u64)li->leaf);
+	/*
+	 * 4) Allocator honored the requested alignment.
+	 * ttm_bo->page_alignment is stored in PAGE_SIZE units, so compare against
+	 * the expected leaf size converted with >> PAGE_SHIFT.
+	 */
+	KUNIT_EXPECT_EQ_MSG(test, ttm_bo->page_alignment,
+			    li->leaf >> PAGE_SHIFT,
+			    "%s: page_alignment=%u pages expected=%llu pages",
+			    li->name, ttm_bo->page_alignment,
+			    (u64)(li->leaf >> PAGE_SHIFT));
+
+	xe_bo_put(bo);
+	page_size_alloc_restore(xe, &saved);
+}
+
+static void xe_bo_page_size_alloc_only_2m(struct kunit *test)
+{
+	run_only_leaf(test, XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M, &leaf_2m);
+}
+
+static void xe_bo_page_size_alloc_only_1g(struct kunit *test)
+{
+	run_only_leaf(test, XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G, &leaf_1g);
+}
+
+static void xe_bo_page_size_alloc_mixed_bos(struct kunit *test)
+{
+	struct xe_device *xe = test->priv;
+	struct page_size_alloc_saved saved;
+	struct xe_bo *bo;
+	struct ttm_buffer_object *ttm_bo;
+	u32 all_flags = XE_BO_FLAG_NEEDS_64K | XE_BO_FLAG_NEEDS_2M |
+			XE_BO_FLAG_NEEDS_1G;
+	u32 flags;
+	u64 expected_align;
+	int i;
+	const int n = 4;
+
+	if (!IS_DGFX(xe)) {
+		kunit_skip(test, "requires dGFX VRAM");
+		return;
+	}
+
+	mutex_lock(&xe->page_size_alloc_ctrl.lock);
+	page_size_alloc_save(xe, &saved);
+	mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+
+	for (i = 0; i < n; i++) {
+		mutex_lock(&xe->page_size_alloc_ctrl.lock);
+		xe->page_size_alloc_ctrl.mode = XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED;
+		xe->page_size_alloc_ctrl.cur_index = i;
+		mutex_unlock(&xe->page_size_alloc_ctrl.lock);
+		/*
+		 * Request a size valid for any mixed-mode slot. Since cur_index is
+		 * device-global and may be perturbed by concurrent allocations on
+		 * a live system, do not assume this iteration will see a specific
+		 * slot.
+		 */
+		bo = xe_bo_create_user(xe, NULL, SZ_1G,
+				       DRM_XE_GEM_CPU_CACHING_WC,
+				       XE_BO_FLAG_VRAM0, NULL);
+		if (IS_ERR(bo)) {
+			int err = PTR_ERR(bo);
+
+			page_size_alloc_restore(xe, &saved);
+			if (err == -ENOSPC) {
+				kunit_skip(test,
+					   "mixed mode BO allocation unavailable: %d",
+					   err);
+				return;
+			}
+			KUNIT_FAIL(test, "iter=%d alloc failed: %pe", i, bo);
+			return;
+		}
+
+		ttm_bo = &bo->ttm;
+		flags = bo->flags & all_flags;
+		/*
+		 * Mixed mode may result in:
+		 * 0-> default/4K
+		 * XE_BO_FLAG_NEEDS_64K
+		 * XE_BO_FLAG_NEEDS_2M
+		 * XE_BO_FLAG_NEEDS_1G
+		 * Any other combination is invalid.
+		 */
+		if (flags == 0) {
+			expected_align = SZ_4K;
+		} else if (flags == XE_BO_FLAG_NEEDS_64K) {
+			expected_align = SZ_64K;
+		} else if (flags == XE_BO_FLAG_NEEDS_2M) {
+			expected_align = SZ_2M;
+		} else if (flags == XE_BO_FLAG_NEEDS_1G) {
+			expected_align = SZ_1G;
+		} else {
+			KUNIT_FAIL(test,
+				   "iter=%d invalid mixed-mode flags: 0x%x",
+				   i, flags);
+			xe_bo_put(bo);
+			page_size_alloc_restore(xe, &saved);
+			return;
+		}
+		/*
+		 * BO size should remain valid for the selected mode. Since the
+		 * request is SZ_1G, it should remain unchanged regardless of the
+		 * selected page-size policy.
+		 */
+		KUNIT_EXPECT_EQ_MSG(test, xe_bo_size(bo), (u64)SZ_1G,
+				    "iter=%d size=%llu expected=%llu",
+				    i,
+				    (u64)xe_bo_size(bo),
+				    (u64)SZ_1G);
+		KUNIT_EXPECT_EQ_MSG(test, ttm_bo->page_alignment,
+				    expected_align >> PAGE_SHIFT,
+				    "iter=%d flags=0x%x page_alignment=%u pages expected=%llu pages",
+				    i, flags, ttm_bo->page_alignment,
+				    (u64)(expected_align >> PAGE_SHIFT));
+		xe_bo_put(bo);
+	}
+	page_size_alloc_restore(xe, &saved);
+}
+#endif
+
 static int ccs_test_migrate(struct xe_tile *tile, struct xe_bo *bo,
 			    bool clear, u64 get_val, u64 assign_val,
 			    struct kunit *test, struct drm_exec *exec)
@@ -609,6 +832,23 @@ static struct kunit_case xe_bo_tests[] = {
 	{}
 };
 
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+static struct kunit_case xe_bo_page_size_alloc_cases[] = {
+	KUNIT_CASE_PARAM(xe_bo_page_size_alloc_only_2m,   xe_pci_live_device_gen_param),
+	KUNIT_CASE_PARAM(xe_bo_page_size_alloc_only_1g,   xe_pci_live_device_gen_param),
+	KUNIT_CASE_PARAM(xe_bo_page_size_alloc_mixed_bos,   xe_pci_live_device_gen_param),
+	{}
+};
+
+VISIBLE_IF_KUNIT
+struct kunit_suite xe_bo_page_size_alloc_suite = {
+	.name = "xe_bo_page_size_alloc",
+	.test_cases = xe_bo_page_size_alloc_cases,
+	.init = xe_kunit_helper_xe_device_live_test_init,
+};
+EXPORT_SYMBOL_IF_KUNIT(xe_bo_page_size_alloc_suite);
+#endif
+
 VISIBLE_IF_KUNIT
 struct kunit_suite xe_bo_test_suite = {
 	.name = "xe_bo",
diff --git a/drivers/gpu/drm/xe/tests/xe_live_test_mod.c b/drivers/gpu/drm/xe/tests/xe_live_test_mod.c
index c55e46f1ae92..87cd7db20e5f 100644
--- a/drivers/gpu/drm/xe/tests/xe_live_test_mod.c
+++ b/drivers/gpu/drm/xe/tests/xe_live_test_mod.c
@@ -11,6 +11,9 @@ extern struct kunit_suite xe_dma_buf_test_suite;
 extern struct kunit_suite xe_migrate_test_suite;
 extern struct kunit_suite xe_mocs_test_suite;
 extern struct kunit_suite xe_guc_g2g_test_suite;
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+extern struct kunit_suite xe_bo_page_size_alloc_suite;
+#endif
 
 kunit_test_suite(xe_bo_test_suite);
 kunit_test_suite(xe_bo_shrink_test_suite);
@@ -18,6 +21,9 @@ kunit_test_suite(xe_dma_buf_test_suite);
 kunit_test_suite(xe_migrate_test_suite);
 kunit_test_suite(xe_mocs_test_suite);
 kunit_test_suite(xe_guc_g2g_test_suite);
+#ifdef CONFIG_DRM_XE_DEBUG_PAGE_SIZE
+kunit_test_suite(xe_bo_page_size_alloc_suite);
+#endif
 
 MODULE_AUTHOR("Intel Corporation");
 MODULE_LICENSE("GPL");
-- 
2.43.0

✓ CI.KUnit: success for drm/xe: add page size allocation mode control and coverage (rev6)

[Patchwork]

== Series Details ==

Series: drm/xe: add page size allocation mode control and coverage (rev6)
URL   : https://patchwork.freedesktop.org/series/168905/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[19:40:55] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:41:00] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[19:41:41] Starting KUnit Kernel (1/1)...
[19:41:41] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:41:41] ================== guc_buf (11 subtests) ===================
[19:41:41] [PASSED] test_smallest
[19:41:41] [PASSED] test_largest
[19:41:41] [PASSED] test_granular
[19:41:41] [PASSED] test_unique
[19:41:41] [PASSED] test_overlap
[19:41:41] [PASSED] test_reusable
[19:41:41] [PASSED] test_too_big
[19:41:41] [PASSED] test_flush
[19:41:41] [PASSED] test_lookup
[19:41:41] [PASSED] test_data
[19:41:41] [PASSED] test_class
[19:41:41] ===================== [PASSED] guc_buf =====================
[19:41:41] =================== guc_dbm (7 subtests) ===================
[19:41:41] [PASSED] test_empty
[19:41:41] [PASSED] test_default
[19:41:41] ======================== test_size  ========================
[19:41:41] [PASSED] 4
[19:41:41] [PASSED] 8
[19:41:41] [PASSED] 32
[19:41:41] [PASSED] 256
[19:41:41] ==================== [PASSED] test_size ====================
[19:41:41] ======================= test_reuse  ========================
[19:41:41] [PASSED] 4
[19:41:41] [PASSED] 8
[19:41:41] [PASSED] 32
[19:41:41] [PASSED] 256
[19:41:41] =================== [PASSED] test_reuse ====================
[19:41:41] =================== test_range_overlap  ====================
[19:41:41] [PASSED] 4
[19:41:41] [PASSED] 8
[19:41:41] [PASSED] 32
[19:41:41] [PASSED] 256
[19:41:41] =============== [PASSED] test_range_overlap ================
[19:41:41] =================== test_range_compact  ====================
[19:41:41] [PASSED] 4
[19:41:41] [PASSED] 8
[19:41:41] [PASSED] 32
[19:41:41] [PASSED] 256
[19:41:41] =============== [PASSED] test_range_compact ================
[19:41:41] ==================== test_range_spare  =====================
[19:41:41] [PASSED] 4
[19:41:42] [PASSED] 8
[19:41:42] [PASSED] 32
[19:41:42] [PASSED] 256
[19:41:42] ================ [PASSED] test_range_spare =================
[19:41:42] ===================== [PASSED] guc_dbm =====================
[19:41:42] =================== guc_idm (6 subtests) ===================
[19:41:42] [PASSED] bad_init
[19:41:42] [PASSED] no_init
[19:41:42] [PASSED] init_fini
[19:41:42] [PASSED] check_used
[19:41:42] [PASSED] check_quota
[19:41:42] [PASSED] check_all
[19:41:42] ===================== [PASSED] guc_idm =====================
[19:41:42] =============== guc_klv_helpers (9 subtests) ===============
[19:41:42] [PASSED] test_count
[19:41:42] [PASSED] test_encode_u32
[19:41:42] [PASSED] test_encode_u64
[19:41:42] [PASSED] test_encode_string
[19:41:42] [PASSED] test_encode_object_raw
[19:41:42] [PASSED] test_encode_object_klv
[19:41:42] [PASSED] test_encode_object_nested
[19:41:42] [PASSED] test_encode_object_basic
[19:41:42] [PASSED] test_print
[19:41:42] ================= [PASSED] guc_klv_helpers =================
[19:41:42] ================== no_relay (3 subtests) ===================
[19:41:42] [PASSED] xe_drops_guc2pf_if_not_ready
[19:41:42] [PASSED] xe_drops_guc2vf_if_not_ready
[19:41:42] [PASSED] xe_rejects_send_if_not_ready
[19:41:42] ==================== [PASSED] no_relay =====================
[19:41:42] ================== pf_relay (14 subtests) ==================
[19:41:42] [PASSED] pf_rejects_guc2pf_too_short
[19:41:42] [PASSED] pf_rejects_guc2pf_too_long
[19:41:42] [PASSED] pf_rejects_guc2pf_no_payload
[19:41:42] [PASSED] pf_fails_no_payload
[19:41:42] [PASSED] pf_fails_bad_origin
[19:41:42] [PASSED] pf_fails_bad_type
[19:41:42] [PASSED] pf_txn_reports_error
[19:41:42] [PASSED] pf_txn_sends_pf2guc
[19:41:42] [PASSED] pf_sends_pf2guc
[19:41:42] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[19:41:42] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[19:41:42] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[19:41:42] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[19:41:42] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[19:41:42] ==================== [PASSED] pf_relay =====================
[19:41:42] ================== vf_relay (3 subtests) ===================
[19:41:42] [PASSED] vf_rejects_guc2vf_too_short
[19:41:42] [PASSED] vf_rejects_guc2vf_too_long
[19:41:42] [PASSED] vf_rejects_guc2vf_no_payload
[19:41:42] ==================== [PASSED] vf_relay =====================
[19:41:42] ================ pf_gt_config (9 subtests) =================
[19:41:42] [PASSED] fair_contexts_1vf
[19:41:42] [PASSED] fair_doorbells_1vf
[19:41:42] [PASSED] fair_ggtt_1vf
[19:41:42] ====================== fair_vram_1vf  ======================
[19:41:42] [PASSED] 3.50 GiB
[19:41:42] [PASSED] 11.5 GiB
[19:41:42] [PASSED] 15.5 GiB
[19:41:42] [PASSED] 31.5 GiB
[19:41:42] [PASSED] 63.5 GiB
[19:41:42] [PASSED] 1.91 GiB
[19:41:42] ================== [PASSED] fair_vram_1vf ==================
[19:41:42] ================ fair_vram_1vf_admin_only  =================
[19:41:42] [PASSED] 3.50 GiB
[19:41:42] [PASSED] 11.5 GiB
[19:41:42] [PASSED] 15.5 GiB
[19:41:42] [PASSED] 31.5 GiB
[19:41:42] [PASSED] 63.5 GiB
[19:41:42] [PASSED] 1.91 GiB
[19:41:42] ============ [PASSED] fair_vram_1vf_admin_only =============
[19:41:42] ====================== fair_contexts  ======================
[19:41:42] [PASSED] 1 VF
[19:41:42] [PASSED] 2 VFs
[19:41:42] [PASSED] 3 VFs
[19:41:42] [PASSED] 4 VFs
[19:41:42] [PASSED] 5 VFs
[19:41:42] [PASSED] 6 VFs
[19:41:42] [PASSED] 7 VFs
[19:41:42] [PASSED] 8 VFs
[19:41:42] [PASSED] 9 VFs
[19:41:42] [PASSED] 10 VFs
[19:41:42] [PASSED] 11 VFs
[19:41:42] [PASSED] 12 VFs
[19:41:42] [PASSED] 13 VFs
[19:41:42] [PASSED] 14 VFs
[19:41:42] [PASSED] 15 VFs
[19:41:42] [PASSED] 16 VFs
[19:41:42] [PASSED] 17 VFs
[19:41:42] [PASSED] 18 VFs
[19:41:42] [PASSED] 19 VFs
[19:41:42] [PASSED] 20 VFs
[19:41:42] [PASSED] 21 VFs
[19:41:42] [PASSED] 22 VFs
[19:41:42] [PASSED] 23 VFs
[19:41:42] [PASSED] 24 VFs
[19:41:42] [PASSED] 25 VFs
[19:41:42] [PASSED] 26 VFs
[19:41:42] [PASSED] 27 VFs
[19:41:42] [PASSED] 28 VFs
[19:41:42] [PASSED] 29 VFs
[19:41:42] [PASSED] 30 VFs
[19:41:42] [PASSED] 31 VFs
[19:41:42] [PASSED] 32 VFs
[19:41:42] [PASSED] 33 VFs
[19:41:42] [PASSED] 34 VFs
[19:41:42] [PASSED] 35 VFs
[19:41:42] [PASSED] 36 VFs
[19:41:42] [PASSED] 37 VFs
[19:41:42] [PASSED] 38 VFs
[19:41:42] [PASSED] 39 VFs
[19:41:42] [PASSED] 40 VFs
[19:41:42] [PASSED] 41 VFs
[19:41:42] [PASSED] 42 VFs
[19:41:42] [PASSED] 43 VFs
[19:41:42] [PASSED] 44 VFs
[19:41:42] [PASSED] 45 VFs
[19:41:42] [PASSED] 46 VFs
[19:41:42] [PASSED] 47 VFs
[19:41:42] [PASSED] 48 VFs
[19:41:42] [PASSED] 49 VFs
[19:41:42] [PASSED] 50 VFs
[19:41:42] [PASSED] 51 VFs
[19:41:42] [PASSED] 52 VFs
[19:41:42] [PASSED] 53 VFs
[19:41:42] [PASSED] 54 VFs
[19:41:42] [PASSED] 55 VFs
[19:41:42] [PASSED] 56 VFs
[19:41:42] [PASSED] 57 VFs
[19:41:42] [PASSED] 58 VFs
[19:41:42] [PASSED] 59 VFs
[19:41:42] [PASSED] 60 VFs
[19:41:42] [PASSED] 61 VFs
[19:41:42] [PASSED] 62 VFs
[19:41:42] [PASSED] 63 VFs
[19:41:42] ================== [PASSED] fair_contexts ==================
[19:41:42] ===================== fair_doorbells  ======================
[19:41:42] [PASSED] 1 VF
[19:41:42] [PASSED] 2 VFs
[19:41:42] [PASSED] 3 VFs
[19:41:42] [PASSED] 4 VFs
[19:41:42] [PASSED] 5 VFs
[19:41:42] [PASSED] 6 VFs
[19:41:42] [PASSED] 7 VFs
[19:41:42] [PASSED] 8 VFs
[19:41:42] [PASSED] 9 VFs
[19:41:42] [PASSED] 10 VFs
[19:41:42] [PASSED] 11 VFs
[19:41:42] [PASSED] 12 VFs
[19:41:42] [PASSED] 13 VFs
[19:41:42] [PASSED] 14 VFs
[19:41:42] [PASSED] 15 VFs
[19:41:42] [PASSED] 16 VFs
[19:41:42] [PASSED] 17 VFs
[19:41:42] [PASSED] 18 VFs
[19:41:42] [PASSED] 19 VFs
[19:41:42] [PASSED] 20 VFs
[19:41:42] [PASSED] 21 VFs
[19:41:42] [PASSED] 22 VFs
[19:41:42] [PASSED] 23 VFs
[19:41:42] [PASSED] 24 VFs
[19:41:42] [PASSED] 25 VFs
[19:41:42] [PASSED] 26 VFs
[19:41:42] [PASSED] 27 VFs
[19:41:42] [PASSED] 28 VFs
[19:41:42] [PASSED] 29 VFs
[19:41:42] [PASSED] 30 VFs
[19:41:42] [PASSED] 31 VFs
[19:41:42] [PASSED] 32 VFs
[19:41:42] [PASSED] 33 VFs
[19:41:42] [PASSED] 34 VFs
[19:41:42] [PASSED] 35 VFs
[19:41:42] [PASSED] 36 VFs
[19:41:42] [PASSED] 37 VFs
[19:41:42] [PASSED] 38 VFs
[19:41:42] [PASSED] 39 VFs
[19:41:42] [PASSED] 40 VFs
[19:41:42] [PASSED] 41 VFs
[19:41:42] [PASSED] 42 VFs
[19:41:42] [PASSED] 43 VFs
[19:41:42] [PASSED] 44 VFs
[19:41:42] [PASSED] 45 VFs
[19:41:42] [PASSED] 46 VFs
[19:41:42] [PASSED] 47 VFs
[19:41:42] [PASSED] 48 VFs
[19:41:42] [PASSED] 49 VFs
[19:41:42] [PASSED] 50 VFs
[19:41:42] [PASSED] 51 VFs
[19:41:42] [PASSED] 52 VFs
[19:41:42] [PASSED] 53 VFs
[19:41:42] [PASSED] 54 VFs
[19:41:42] [PASSED] 55 VFs
[19:41:42] [PASSED] 56 VFs
[19:41:42] [PASSED] 57 VFs
[19:41:42] [PASSED] 58 VFs
[19:41:42] [PASSED] 59 VFs
[19:41:42] [PASSED] 60 VFs
[19:41:42] [PASSED] 61 VFs
[19:41:42] [PASSED] 62 VFs
[19:41:42] [PASSED] 63 VFs
[19:41:42] ================= [PASSED] fair_doorbells ==================
[19:41:42] ======================== fair_ggtt  ========================
[19:41:42] [PASSED] 1 VF
[19:41:42] [PASSED] 2 VFs
[19:41:42] [PASSED] 3 VFs
[19:41:42] [PASSED] 4 VFs
[19:41:42] [PASSED] 5 VFs
[19:41:42] [PASSED] 6 VFs
[19:41:42] [PASSED] 7 VFs
[19:41:42] [PASSED] 8 VFs
[19:41:42] [PASSED] 9 VFs
[19:41:42] [PASSED] 10 VFs
[19:41:42] [PASSED] 11 VFs
[19:41:42] [PASSED] 12 VFs
[19:41:42] [PASSED] 13 VFs
[19:41:42] [PASSED] 14 VFs
[19:41:42] [PASSED] 15 VFs
[19:41:42] [PASSED] 16 VFs
[19:41:42] [PASSED] 17 VFs
[19:41:42] [PASSED] 18 VFs
[19:41:42] [PASSED] 19 VFs
[19:41:42] [PASSED] 20 VFs
[19:41:42] [PASSED] 21 VFs
[19:41:42] [PASSED] 22 VFs
[19:41:42] [PASSED] 23 VFs
[19:41:42] [PASSED] 24 VFs
[19:41:42] [PASSED] 25 VFs
[19:41:42] [PASSED] 26 VFs
[19:41:42] [PASSED] 27 VFs
[19:41:42] [PASSED] 28 VFs
[19:41:42] [PASSED] 29 VFs
[19:41:42] [PASSED] 30 VFs
[19:41:42] [PASSED] 31 VFs
[19:41:42] [PASSED] 32 VFs
[19:41:42] [PASSED] 33 VFs
[19:41:42] [PASSED] 34 VFs
[19:41:42] [PASSED] 35 VFs
[19:41:42] [PASSED] 36 VFs
[19:41:42] [PASSED] 37 VFs
[19:41:42] [PASSED] 38 VFs
[19:41:42] [PASSED] 39 VFs
[19:41:42] [PASSED] 40 VFs
[19:41:42] [PASSED] 41 VFs
[19:41:42] [PASSED] 42 VFs
[19:41:42] [PASSED] 43 VFs
[19:41:42] [PASSED] 44 VFs
[19:41:42] [PASSED] 45 VFs
[19:41:42] [PASSED] 46 VFs
[19:41:42] [PASSED] 47 VFs
[19:41:42] [PASSED] 48 VFs
[19:41:42] [PASSED] 49 VFs
[19:41:42] [PASSED] 50 VFs
[19:41:42] [PASSED] 51 VFs
[19:41:42] [PASSED] 52 VFs
[19:41:42] [PASSED] 53 VFs
[19:41:42] [PASSED] 54 VFs
[19:41:42] [PASSED] 55 VFs
[19:41:42] [PASSED] 56 VFs
[19:41:42] [PASSED] 57 VFs
[19:41:42] [PASSED] 58 VFs
[19:41:42] [PASSED] 59 VFs
[19:41:42] [PASSED] 60 VFs
[19:41:42] [PASSED] 61 VFs
[19:41:42] [PASSED] 62 VFs
[19:41:42] [PASSED] 63 VFs
[19:41:42] ==================== [PASSED] fair_ggtt ====================
[19:41:42] ======================== fair_vram  ========================
[19:41:42] [PASSED] 1 VF
[19:41:42] [PASSED] 2 VFs
[19:41:42] [PASSED] 3 VFs
[19:41:42] [PASSED] 4 VFs
[19:41:42] [PASSED] 5 VFs
[19:41:42] [PASSED] 6 VFs
[19:41:42] [PASSED] 7 VFs
[19:41:42] [PASSED] 8 VFs
[19:41:42] [PASSED] 9 VFs
[19:41:42] [PASSED] 10 VFs
[19:41:42] [PASSED] 11 VFs
[19:41:42] [PASSED] 12 VFs
[19:41:42] [PASSED] 13 VFs
[19:41:42] [PASSED] 14 VFs
[19:41:42] [PASSED] 15 VFs
[19:41:42] [PASSED] 16 VFs
[19:41:42] [PASSED] 17 VFs
[19:41:42] [PASSED] 18 VFs
[19:41:42] [PASSED] 19 VFs
[19:41:42] [PASSED] 20 VFs
[19:41:42] [PASSED] 21 VFs
[19:41:42] [PASSED] 22 VFs
[19:41:42] [PASSED] 23 VFs
[19:41:42] [PASSED] 24 VFs
[19:41:42] [PASSED] 25 VFs
[19:41:42] [PASSED] 26 VFs
[19:41:42] [PASSED] 27 VFs
[19:41:42] [PASSED] 28 VFs
[19:41:42] [PASSED] 29 VFs
[19:41:42] [PASSED] 30 VFs
[19:41:42] [PASSED] 31 VFs
[19:41:42] [PASSED] 32 VFs
[19:41:42] [PASSED] 33 VFs
[19:41:42] [PASSED] 34 VFs
[19:41:42] [PASSED] 35 VFs
[19:41:42] [PASSED] 36 VFs
[19:41:42] [PASSED] 37 VFs
[19:41:42] [PASSED] 38 VFs
[19:41:42] [PASSED] 39 VFs
[19:41:42] [PASSED] 40 VFs
[19:41:42] [PASSED] 41 VFs
[19:41:42] [PASSED] 42 VFs
[19:41:42] [PASSED] 43 VFs
[19:41:42] [PASSED] 44 VFs
[19:41:42] [PASSED] 45 VFs
[19:41:42] [PASSED] 46 VFs
[19:41:42] [PASSED] 47 VFs
[19:41:42] [PASSED] 48 VFs
[19:41:42] [PASSED] 49 VFs
[19:41:42] [PASSED] 50 VFs
[19:41:42] [PASSED] 51 VFs
[19:41:42] [PASSED] 52 VFs
[19:41:42] [PASSED] 53 VFs
[19:41:42] [PASSED] 54 VFs
[19:41:42] [PASSED] 55 VFs
[19:41:42] [PASSED] 56 VFs
[19:41:42] [PASSED] 57 VFs
[19:41:42] [PASSED] 58 VFs
[19:41:42] [PASSED] 59 VFs
[19:41:42] [PASSED] 60 VFs
[19:41:42] [PASSED] 61 VFs
[19:41:42] [PASSED] 62 VFs
[19:41:42] [PASSED] 63 VFs
[19:41:42] ==================== [PASSED] fair_vram ====================
[19:41:42] ================== [PASSED] pf_gt_config ===================
[19:41:42] ===================== lmtt (1 subtest) =====================
[19:41:42] ======================== test_ops  =========================
[19:41:42] [PASSED] 2-level
[19:41:42] [PASSED] multi-level
[19:41:42] ==================== [PASSED] test_ops =====================
[19:41:42] ====================== [PASSED] lmtt =======================
[19:41:42] ================= sriov_packet (1 subtest) =================
[19:41:42] [PASSED] test_descriptor_init
[19:41:42] ================== [PASSED] sriov_packet ===================
[19:41:42] ================= pf_service (11 subtests) =================
[19:41:42] [PASSED] pf_negotiate_any
[19:41:42] [PASSED] pf_negotiate_base_match
[19:41:42] [PASSED] pf_negotiate_base_newer
[19:41:42] [PASSED] pf_negotiate_base_next
[19:41:42] [SKIPPED] pf_negotiate_base_older (no older minor)
[19:41:42] [PASSED] pf_negotiate_base_prev
[19:41:42] [PASSED] pf_negotiate_latest_match
[19:41:42] [PASSED] pf_negotiate_latest_newer
[19:41:42] [PASSED] pf_negotiate_latest_next
[19:41:42] [SKIPPED] pf_negotiate_latest_older (no older minor)
[19:41:42] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[19:41:42] =================== [PASSED] pf_service ====================
[19:41:42] ================= xe_guc_g2g (2 subtests) ==================
[19:41:42] ============== xe_live_guc_g2g_kunit_default  ==============
[19:41:42] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[19:41:42] ============== xe_live_guc_g2g_kunit_allmem  ===============
[19:41:42] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[19:41:42] =================== [SKIPPED] xe_guc_g2g ===================
[19:41:42] =================== xe_mocs (2 subtests) ===================
[19:41:42] ================ xe_live_mocs_kernel_kunit  ================
[19:41:42] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[19:41:42] ================ xe_live_mocs_reset_kunit  =================
[19:41:42] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[19:41:42] ==================== [SKIPPED] xe_mocs =====================
[19:41:42] ================= xe_migrate (2 subtests) ==================
[19:41:42] ================= xe_migrate_sanity_kunit  =================
[19:41:42] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[19:41:42] ================== xe_validate_ccs_kunit  ==================
[19:41:42] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[19:41:42] =================== [SKIPPED] xe_migrate ===================
[19:41:42] ================== xe_dma_buf (1 subtest) ==================
[19:41:42] ==================== xe_dma_buf_kunit  =====================
[19:41:42] ================ [SKIPPED] xe_dma_buf_kunit ================
[19:41:42] =================== [SKIPPED] xe_dma_buf ===================
[19:41:42] ================= xe_bo_shrink (1 subtest) =================
[19:41:42] =================== xe_bo_shrink_kunit  ====================
[19:41:42] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[19:41:42] ================== [SKIPPED] xe_bo_shrink ==================
[19:41:42] ==================== xe_bo (2 subtests) ====================
[19:41:42] ================== xe_ccs_migrate_kunit  ===================
[19:41:42] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[19:41:42] ==================== xe_bo_evict_kunit  ====================
[19:41:42] =============== [SKIPPED] xe_bo_evict_kunit ================
[19:41:42] ===================== [SKIPPED] xe_bo ======================
[19:41:42] ==================== args (13 subtests) ====================
[19:41:42] [PASSED] count_args_test
[19:41:42] [PASSED] call_args_example
[19:41:42] [PASSED] call_args_test
[19:41:42] [PASSED] drop_first_arg_example
[19:41:42] [PASSED] drop_first_arg_test
[19:41:42] [PASSED] first_arg_example
[19:41:42] [PASSED] first_arg_test
[19:41:42] [PASSED] last_arg_example
[19:41:42] [PASSED] last_arg_test
[19:41:42] [PASSED] pick_arg_example
[19:41:42] [PASSED] if_args_example
[19:41:42] [PASSED] if_args_test
[19:41:42] [PASSED] sep_comma_example
[19:41:42] ====================== [PASSED] args =======================
[19:41:42] =================== xe_pci (3 subtests) ====================
[19:41:42] ==================== check_graphics_ip  ====================
[19:41:42] [PASSED] 12.00 Xe_LP
[19:41:42] [PASSED] 12.10 Xe_LP+
[19:41:42] [PASSED] 12.55 Xe_HPG
[19:41:42] [PASSED] 12.60 Xe_HPC
[19:41:42] [PASSED] 12.70 Xe_LPG
[19:41:42] [PASSED] 12.71 Xe_LPG
[19:41:42] [PASSED] 12.74 Xe_LPG+
[19:41:42] [PASSED] 20.01 Xe2_HPG
[19:41:42] [PASSED] 20.02 Xe2_HPG
[19:41:42] [PASSED] 20.04 Xe2_LPG
[19:41:42] [PASSED] 30.00 Xe3_LPG
[19:41:42] [PASSED] 30.01 Xe3_LPG
[19:41:42] [PASSED] 30.03 Xe3_LPG
[19:41:42] [PASSED] 30.04 Xe3_LPG
[19:41:42] [PASSED] 30.05 Xe3_LPG
[19:41:42] [PASSED] 35.10 Xe3p_LPG
[19:41:42] [PASSED] 35.11 Xe3p_XPC
[19:41:42] ================ [PASSED] check_graphics_ip ================
[19:41:42] ===================== check_media_ip  ======================
[19:41:42] [PASSED] 12.00 Xe_M
[19:41:42] [PASSED] 12.55 Xe_HPM
[19:41:42] [PASSED] 13.00 Xe_LPM+
[19:41:42] [PASSED] 13.01 Xe2_HPM
[19:41:42] [PASSED] 20.00 Xe2_LPM
[19:41:42] [PASSED] 30.00 Xe3_LPM
[19:41:42] [PASSED] 30.02 Xe3_LPM
[19:41:42] [PASSED] 35.00 Xe3p_LPM
[19:41:42] [PASSED] 35.03 Xe3p_HPM
[19:41:42] ================= [PASSED] check_media_ip ==================
[19:41:42] =================== check_platform_desc  ===================
[19:41:42] [PASSED] 0x9A60 (TIGERLAKE)
[19:41:42] [PASSED] 0x9A68 (TIGERLAKE)
[19:41:42] [PASSED] 0x9A70 (TIGERLAKE)
[19:41:42] [PASSED] 0x9A40 (TIGERLAKE)
[19:41:42] [PASSED] 0x9A49 (TIGERLAKE)
[19:41:42] [PASSED] 0x9A59 (TIGERLAKE)
[19:41:42] [PASSED] 0x9A78 (TIGERLAKE)
[19:41:42] [PASSED] 0x9AC0 (TIGERLAKE)
[19:41:42] [PASSED] 0x9AC9 (TIGERLAKE)
[19:41:42] [PASSED] 0x9AD9 (TIGERLAKE)
[19:41:42] [PASSED] 0x9AF8 (TIGERLAKE)
[19:41:42] [PASSED] 0x4C80 (ROCKETLAKE)
[19:41:42] [PASSED] 0x4C8A (ROCKETLAKE)
[19:41:42] [PASSED] 0x4C8B (ROCKETLAKE)
[19:41:42] [PASSED] 0x4C8C (ROCKETLAKE)
[19:41:42] [PASSED] 0x4C90 (ROCKETLAKE)
[19:41:42] [PASSED] 0x4C9A (ROCKETLAKE)
[19:41:42] [PASSED] 0x4680 (ALDERLAKE_S)
[19:41:42] [PASSED] 0x4682 (ALDERLAKE_S)
[19:41:42] [PASSED] 0x4688 (ALDERLAKE_S)
[19:41:42] [PASSED] 0x468A (ALDERLAKE_S)
[19:41:42] [PASSED] 0x468B (ALDERLAKE_S)
[19:41:42] [PASSED] 0x4690 (ALDERLAKE_S)
[19:41:42] [PASSED] 0x4692 (ALDERLAKE_S)
[19:41:42] [PASSED] 0x4693 (ALDERLAKE_S)
[19:41:42] [PASSED] 0x46A0 (ALDERLAKE_P)
[19:41:42] [PASSED] 0x46A1 (ALDERLAKE_P)
[19:41:42] [PASSED] 0x46A2 (ALDERLAKE_P)
[19:41:42] [PASSED] 0x46A3 (ALDERLAKE_P)
[19:41:42] [PASSED] 0x46A6 (ALDERLAKE_P)
[19:41:42] [PASSED] 0x46A8 (ALDERLAKE_P)
[19:41:42] [PASSED] 0x46AA (ALDERLAKE_P)
[19:41:42] [PASSED] 0x462A (ALDERLAKE_P)
[19:41:42] [PASSED] 0x4626 (ALDERLAKE_P)
[19:41:42] [PASSED] 0x4628 (ALDERLAKE_P)
[19:41:42] [PASSED] 0x46B0 (ALDERLAKE_P)
[19:41:42] [PASSED] 0x46B1 (ALDERLAKE_P)
[19:41:42] [PASSED] 0x46B2 (ALDERLAKE_P)
[19:41:42] [PASSED] 0x46B3 (ALDERLAKE_P)
[19:41:42] [PASSED] 0x46C0 (ALDERLAKE_P)
[19:41:42] [PASSED] 0x46C1 (ALDERLAKE_P)
[19:41:42] [PASSED] 0x46C2 (ALDERLAKE_P)
[19:41:42] [PASSED] 0x46C3 (ALDERLAKE_P)
[19:41:42] [PASSED] 0x46D0 (ALDERLAKE_N)
[19:41:42] [PASSED] 0x46D1 (ALDERLAKE_N)
[19:41:42] [PASSED] 0x46D2 (ALDERLAKE_N)
[19:41:42] [PASSED] 0x46D3 (ALDERLAKE_N)
[19:41:42] [PASSED] 0x46D4 (ALDERLAKE_N)
[19:41:42] [PASSED] 0xA721 (ALDERLAKE_P)
[19:41:42] [PASSED] 0xA7A1 (ALDERLAKE_P)
[19:41:42] [PASSED] 0xA7A9 (ALDERLAKE_P)
[19:41:42] [PASSED] 0xA7AC (ALDERLAKE_P)
[19:41:42] [PASSED] 0xA7AD (ALDERLAKE_P)
[19:41:42] [PASSED] 0xA720 (ALDERLAKE_P)
[19:41:42] [PASSED] 0xA7A0 (ALDERLAKE_P)
[19:41:42] [PASSED] 0xA7A8 (ALDERLAKE_P)
[19:41:42] [PASSED] 0xA7AA (ALDERLAKE_P)
[19:41:42] [PASSED] 0xA7AB (ALDERLAKE_P)
[19:41:42] [PASSED] 0xA780 (ALDERLAKE_S)
[19:41:42] [PASSED] 0xA781 (ALDERLAKE_S)
[19:41:42] [PASSED] 0xA782 (ALDERLAKE_S)
[19:41:42] [PASSED] 0xA783 (ALDERLAKE_S)
[19:41:42] [PASSED] 0xA788 (ALDERLAKE_S)
[19:41:42] [PASSED] 0xA789 (ALDERLAKE_S)
[19:41:42] [PASSED] 0xA78A (ALDERLAKE_S)
[19:41:42] [PASSED] 0xA78B (ALDERLAKE_S)
[19:41:42] [PASSED] 0x4905 (DG1)
[19:41:42] [PASSED] 0x4906 (DG1)
[19:41:42] [PASSED] 0x4907 (DG1)
[19:41:42] [PASSED] 0x4908 (DG1)
[19:41:42] [PASSED] 0x4909 (DG1)
[19:41:42] [PASSED] 0x56C0 (DG2)
[19:41:42] [PASSED] 0x56C2 (DG2)
[19:41:42] [PASSED] 0x56C1 (DG2)
[19:41:42] [PASSED] 0x7D51 (METEORLAKE)
[19:41:42] [PASSED] 0x7DD1 (METEORLAKE)
[19:41:42] [PASSED] 0x7D41 (METEORLAKE)
[19:41:42] [PASSED] 0x7D67 (METEORLAKE)
[19:41:42] [PASSED] 0xB640 (METEORLAKE)
[19:41:42] [PASSED] 0x56A0 (DG2)
[19:41:42] [PASSED] 0x56A1 (DG2)
[19:41:42] [PASSED] 0x56A2 (DG2)
[19:41:42] [PASSED] 0x56BE (DG2)
[19:41:42] [PASSED] 0x56BF (DG2)
[19:41:42] [PASSED] 0x5690 (DG2)
[19:41:42] [PASSED] 0x5691 (DG2)
[19:41:42] [PASSED] 0x5692 (DG2)
[19:41:42] [PASSED] 0x56A5 (DG2)
[19:41:42] [PASSED] 0x56A6 (DG2)
[19:41:42] [PASSED] 0x56B0 (DG2)
[19:41:42] [PASSED] 0x56B1 (DG2)
[19:41:42] [PASSED] 0x56BA (DG2)
[19:41:42] [PASSED] 0x56BB (DG2)
[19:41:42] [PASSED] 0x56BC (DG2)
[19:41:42] [PASSED] 0x56BD (DG2)
[19:41:42] [PASSED] 0x5693 (DG2)
[19:41:42] [PASSED] 0x5694 (DG2)
[19:41:42] [PASSED] 0x5695 (DG2)
[19:41:42] [PASSED] 0x56A3 (DG2)
[19:41:42] [PASSED] 0x56A4 (DG2)
[19:41:42] [PASSED] 0x56B2 (DG2)
[19:41:42] [PASSED] 0x56B3 (DG2)
[19:41:42] [PASSED] 0x5696 (DG2)
[19:41:42] [PASSED] 0x5697 (DG2)
[19:41:42] [PASSED] 0xB69 (PVC)
[19:41:42] [PASSED] 0xB6E (PVC)
[19:41:42] [PASSED] 0xBD4 (PVC)
[19:41:42] [PASSED] 0xBD5 (PVC)
[19:41:42] [PASSED] 0xBD6 (PVC)
[19:41:42] [PASSED] 0xBD7 (PVC)
[19:41:42] [PASSED] 0xBD8 (PVC)
[19:41:42] [PASSED] 0xBD9 (PVC)
[19:41:42] [PASSED] 0xBDA (PVC)
[19:41:42] [PASSED] 0xBDB (PVC)
[19:41:42] [PASSED] 0xBE0 (PVC)
[19:41:42] [PASSED] 0xBE1 (PVC)
[19:41:42] [PASSED] 0xBE5 (PVC)
[19:41:42] [PASSED] 0x7D40 (METEORLAKE)
[19:41:42] [PASSED] 0x7D45 (METEORLAKE)
[19:41:42] [PASSED] 0x7D55 (METEORLAKE)
[19:41:42] [PASSED] 0x7D60 (METEORLAKE)
[19:41:42] [PASSED] 0x7DD5 (METEORLAKE)
[19:41:42] [PASSED] 0x6420 (LUNARLAKE)
[19:41:42] [PASSED] 0x64A0 (LUNARLAKE)
[19:41:42] [PASSED] 0x64B0 (LUNARLAKE)
[19:41:42] [PASSED] 0xE202 (BATTLEMAGE)
[19:41:42] [PASSED] 0xE209 (BATTLEMAGE)
[19:41:42] [PASSED] 0xE20B (BATTLEMAGE)
[19:41:42] [PASSED] 0xE20C (BATTLEMAGE)
[19:41:42] [PASSED] 0xE20D (BATTLEMAGE)
[19:41:42] [PASSED] 0xE210 (BATTLEMAGE)
[19:41:42] [PASSED] 0xE211 (BATTLEMAGE)
[19:41:42] [PASSED] 0xE212 (BATTLEMAGE)
[19:41:42] [PASSED] 0xE216 (BATTLEMAGE)
[19:41:42] [PASSED] 0xE220 (BATTLEMAGE)
[19:41:42] [PASSED] 0xE221 (BATTLEMAGE)
[19:41:42] [PASSED] 0xE222 (BATTLEMAGE)
[19:41:42] [PASSED] 0xE223 (BATTLEMAGE)
[19:41:42] [PASSED] 0xB080 (PANTHERLAKE)
[19:41:42] [PASSED] 0xB081 (PANTHERLAKE)
[19:41:42] [PASSED] 0xB082 (PANTHERLAKE)
[19:41:42] [PASSED] 0xB083 (PANTHERLAKE)
[19:41:42] [PASSED] 0xB084 (PANTHERLAKE)
[19:41:42] [PASSED] 0xB085 (PANTHERLAKE)
[19:41:42] [PASSED] 0xB086 (PANTHERLAKE)
[19:41:42] [PASSED] 0xB087 (PANTHERLAKE)
[19:41:42] [PASSED] 0xB08F (PANTHERLAKE)
[19:41:42] [PASSED] 0xB090 (PANTHERLAKE)
[19:41:42] [PASSED] 0xB0A0 (PANTHERLAKE)
[19:41:42] [PASSED] 0xB0B0 (PANTHERLAKE)
[19:41:42] [PASSED] 0xFD80 (PANTHERLAKE)
[19:41:42] [PASSED] 0xFD81 (PANTHERLAKE)
[19:41:42] [PASSED] 0xD740 (NOVALAKE_S)
[19:41:42] [PASSED] 0xD741 (NOVALAKE_S)
[19:41:42] [PASSED] 0xD742 (NOVALAKE_S)
[19:41:42] [PASSED] 0xD743 (NOVALAKE_S)
[19:41:42] [PASSED] 0xD745 (NOVALAKE_S)
[19:41:42] [PASSED] 0xD74A (NOVALAKE_S)
[19:41:42] [PASSED] 0xD74B (NOVALAKE_S)
[19:41:42] [PASSED] 0x674C (CRESCENTISLAND)
[19:41:42] [PASSED] 0x674D (CRESCENTISLAND)
[19:41:42] [PASSED] 0x674E (CRESCENTISLAND)
[19:41:42] [PASSED] 0x674F (CRESCENTISLAND)
[19:41:42] [PASSED] 0x6750 (CRESCENTISLAND)
[19:41:42] [PASSED] 0xD750 (NOVALAKE_P)
[19:41:42] [PASSED] 0xD751 (NOVALAKE_P)
[19:41:42] [PASSED] 0xD752 (NOVALAKE_P)
[19:41:42] [PASSED] 0xD753 (NOVALAKE_P)
[19:41:42] [PASSED] 0xD754 (NOVALAKE_P)
[19:41:42] [PASSED] 0xD755 (NOVALAKE_P)
[19:41:42] [PASSED] 0xD756 (NOVALAKE_P)
[19:41:42] [PASSED] 0xD757 (NOVALAKE_P)
[19:41:42] [PASSED] 0xD75F (NOVALAKE_P)
[19:41:42] =============== [PASSED] check_platform_desc ===============
[19:41:42] ===================== [PASSED] xe_pci ======================
[19:41:42] ============= xe_rtp_tables_test (5 subtests) ==============
[19:41:42] ================== xe_rtp_table_gt_test  ===================
[19:41:42] [PASSED] gt_was/14011060649
[19:41:42] [PASSED] gt_was/14011059788
[19:41:42] [PASSED] gt_was/14015795083
[19:41:42] [PASSED] gt_was/16021867713
[19:41:42] [PASSED] gt_was/14019449301
[19:41:42] [PASSED] gt_was/16028005424
[19:41:42] [PASSED] gt_was/14026578760
[19:41:42] [PASSED] gt_was/1409420604
[19:41:42] [PASSED] gt_was/1408615072
[19:41:42] [PASSED] gt_was/22010523718
[19:41:42] [PASSED] gt_was/14011006942
[19:41:42] [PASSED] gt_was/14014830051
[19:41:42] [PASSED] gt_was/18018781329
[19:41:42] [PASSED] gt_was/1509235366
[19:41:42] [PASSED] gt_was/18018781329
[19:41:42] [PASSED] gt_was/16016694945
[19:41:42] [PASSED] gt_was/14018575942
[19:41:42] [PASSED] gt_was/22016670082
[19:41:42] [PASSED] gt_was/22016670082
[19:41:42] [PASSED] gt_was/14017421178
[19:41:42] [PASSED] gt_was/16025250150
[19:41:42] [PASSED] gt_was/14021871409
[19:41:42] [PASSED] gt_was/16021865536
[19:41:42] [PASSED] gt_was/14021486841
[19:41:42] [PASSED] gt_was/14025160223
[19:41:42] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[19:41:42] [PASSED] gt_was/14025635424
[19:41:42] [PASSED] gt_was/16028005424
[19:41:42] ============== [PASSED] xe_rtp_table_gt_test ===============
[19:41:42] ================== xe_rtp_table_gt_test  ===================
[19:41:42] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[19:41:42] [PASSED] gt_tunings/Tuning: 32B Access Enable
[19:41:42] [PASSED] gt_tunings/Tuning: L3 cache
[19:41:42] [PASSED] gt_tunings/Tuning: L3 cache - media
[19:41:42] [PASSED] gt_tunings/Tuning: Compression Overfetch
[19:41:42] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[19:41:42] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[19:41:42] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[19:41:42] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[19:41:42] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[19:41:42] [PASSED] gt_tunings/Tuning: Stateless compression control
[19:41:42] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[19:41:42] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[19:41:42] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[19:41:42] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[19:41:42] ============== [PASSED] xe_rtp_table_gt_test ===============
[19:41:42] ================== xe_rtp_table_oob_test  ==================
[19:41:42] [PASSED] oob_was/1607983814
[19:41:42] [PASSED] oob_was/16010904313
[19:41:42] [PASSED] oob_was/18022495364
[19:41:42] [PASSED] oob_was/22012773006
[19:41:42] [PASSED] oob_was/14014475959
[19:41:42] [PASSED] oob_was/22011391025
[19:41:42] [PASSED] oob_was/22012727170
[19:41:42] [PASSED] oob_was/22012727685
[19:41:42] [PASSED] oob_was/22016596838
[19:41:42] [PASSED] oob_was/18020744125
[19:41:42] [PASSED] oob_was/1409600907
[19:41:42] [PASSED] oob_was/22014953428
[19:41:42] [PASSED] oob_was/16017236439
[19:41:42] [PASSED] oob_was/14019821291
[19:41:42] [PASSED] oob_was/14015076503
[19:41:42] [PASSED] oob_was/14018913170
[19:41:42] [PASSED] oob_was/14018094691
[19:41:42] [PASSED] oob_was/18024947630
[19:41:42] [PASSED] oob_was/16022287689
[19:41:42] [PASSED] oob_was/13011645652
[19:41:42] [PASSED] oob_was/14022293748
[19:41:42] [PASSED] oob_was/22019794406
[19:41:42] [PASSED] oob_was/22019338487
[19:41:42] [PASSED] oob_was/16023588340
[19:41:42] [PASSED] oob_was/14019789679
[19:41:42] [PASSED] oob_was/14022866841
[19:41:42] [PASSED] oob_was/16021333562
[19:41:42] [PASSED] oob_was/14016712196
[19:41:42] [PASSED] oob_was/14015568240
[19:41:42] [PASSED] oob_was/18013179988
[19:41:42] [PASSED] oob_was/1508761755
[19:41:42] [PASSED] oob_was/16023105232
[19:41:42] [PASSED] oob_was/16026508708
[19:41:42] [PASSED] oob_was/14020001231
[19:41:42] [PASSED] oob_was/16023683509
[19:41:42] [PASSED] oob_was/14025515070
[19:41:42] [PASSED] oob_was/15015404425_disable
[19:41:42] [PASSED] oob_was/16026007364
[19:41:42] [PASSED] oob_was/14020316580
[19:41:42] [PASSED] oob_was/14025883347
[19:41:42] [PASSED] oob_was/16029380221
[19:41:42] [PASSED] oob_was/22022079272
[19:41:42] [PASSED] oob_was/16029897822
[19:41:42] ============== [PASSED] xe_rtp_table_oob_test ==============
[19:41:42] ================ xe_rtp_table_dev_oob_test  ================
[19:41:42] [PASSED] device_oob_was/22010954014
[19:41:42] [PASSED] device_oob_was/15015404425
[19:41:42] [PASSED] device_oob_was/22019338487_display
[19:41:42] [PASSED] device_oob_was/14022085890
[19:41:42] [PASSED] device_oob_was/14026539277
[19:41:42] [PASSED] device_oob_was/14026633728
[19:41:42] [PASSED] device_oob_was/14026746987
[19:41:42] [PASSED] device_oob_was/14026779378
[19:41:42] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[19:41:42] ========== xe_rtp_table_missing_upper_bound_test  ==========
[19:41:42] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[19:41:42] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[19:41:42] [PASSED] register_whitelist/1806527549
[19:41:42] [PASSED] register_whitelist/allow_read_ctx_timestamp
[19:41:42] [PASSED] register_whitelist/allow_read_queue_timestamp
[19:41:42] [PASSED] register_whitelist/16014440446
[19:41:42] [PASSED] register_whitelist/16017236439
[19:41:42] [PASSED] register_whitelist/16020183090
[19:41:42] [PASSED] register_whitelist/14024997852
[19:41:42] [PASSED] register_whitelist/14024997852
[19:41:42] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[19:41:42] =============== [PASSED] xe_rtp_tables_test ================
[19:41:42] =================== xe_rtp (3 subtests) ====================
[19:41:42] =================== xe_rtp_rules_tests  ====================
[19:41:42] [PASSED] no
[19:41:42] [PASSED] yes
[19:41:42] [PASSED] no-and-no
[19:41:42] [PASSED] no-and-yes
[19:41:42] [PASSED] yes-and-no
[19:41:42] [PASSED] yes-and-yes
[19:41:42] [PASSED] no-or-no
[19:41:42] [PASSED] no-or-yes
[19:41:42] [PASSED] yes-or-no
[19:41:42] [PASSED] yes-or-yes
[19:41:42] [PASSED] no-yes-or-yes-no
[19:41:42] [PASSED] no-yes-or-yes-yes
[19:41:42] [PASSED] yes-yes-or-no-yes
[19:41:42] [PASSED] yes-yes-or-yes-yes
[19:41:42] [PASSED] no-no-or-yes-or-no
[19:41:42] [PASSED] or
[19:41:42] [PASSED] or-yes
[19:41:42] [PASSED] or-no
[19:41:42] [PASSED] yes-or
[19:41:42] [PASSED] no-or
[19:41:42] [PASSED] no-or-or-yes
[19:41:42] [PASSED] yes-or-or-no
[19:41:42] [PASSED] no-or-or-no
[19:41:42] [PASSED] missing-context-engine-class
[19:41:42] [PASSED] missing-context-engine-class-or-yes
[19:41:42] [PASSED] missing-context-engine-class-or-or-yes
[19:41:42] =============== [PASSED] xe_rtp_rules_tests ================
[19:41:42] =============== xe_rtp_process_to_sr_tests  ================
[19:41:42] [PASSED] coalesce-same-reg
[19:41:42] [PASSED] coalesce-same-reg-literal-and-func
[19:41:42] [PASSED] no-match-no-add
[19:41:42] [PASSED] two-regs-two-entries
[19:41:42] [PASSED] clr-one-set-other
[19:41:42] [PASSED] set-field
[19:41:42] [PASSED] conflict-duplicate
[19:41:42] [PASSED] conflict-not-disjoint
[19:41:42] [PASSED] conflict-not-disjoint-literal-and-func
[19:41:42] [PASSED] conflict-reg-type
[19:41:42] [PASSED] bad-mcr-reg-forced-to-regular
[19:41:42] [PASSED] bad-regular-reg-forced-to-mcr
[19:41:42] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[19:41:42] ================== xe_rtp_process_tests  ===================
[19:41:42] [PASSED] active1
[19:41:42] [PASSED] active2
[19:41:42] [PASSED] active-inactive
[19:41:42] [PASSED] inactive-active
[19:41:42] [PASSED] inactive-active-inactive
[19:41:42] [PASSED] inactive-inactive-inactive
[19:41:42] ============== [PASSED] xe_rtp_process_tests ===============
[19:41:42] ===================== [PASSED] xe_rtp ======================
[19:41:42] ==================== xe_wa (1 subtest) =====================
[19:41:42] ======================== xe_wa_gt  =========================
[19:41:42] [PASSED] TIGERLAKE B0
[19:41:42] [PASSED] DG1 A0
[19:41:42] [PASSED] DG1 B0
[19:41:42] [PASSED] ALDERLAKE_S A0
[19:41:42] [PASSED] ALDERLAKE_S B0
[19:41:42] [PASSED] ALDERLAKE_S C0
[19:41:42] [PASSED] ALDERLAKE_S D0
[19:41:42] [PASSED] ALDERLAKE_P A0
[19:41:42] [PASSED] ALDERLAKE_P B0
[19:41:42] [PASSED] ALDERLAKE_P C0
[19:41:42] [PASSED] ALDERLAKE_S RPLS D0
[19:41:42] [PASSED] ALDERLAKE_P RPLU E0
[19:41:42] [PASSED] DG2 G10 C0
[19:41:42] [PASSED] DG2 G11 B1
[19:41:42] [PASSED] DG2 G12 A1
[19:41:42] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[19:41:42] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[19:41:42] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[19:41:42] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[19:41:42] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[19:41:42] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[19:41:42] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[19:41:42] ==================== [PASSED] xe_wa_gt =====================
[19:41:42] ====================== [PASSED] xe_wa ======================
[19:41:42] ============================================================
[19:41:42] Testing complete. Ran 741 tests: passed: 723, skipped: 18
[19:41:42] Elapsed time: 46.531s total, 4.635s configuring, 41.130s building, 0.733s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[19:41:42] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:41:44] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[19:42:27] Starting KUnit Kernel (1/1)...
[19:42:27] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:42:28] ============ drm_test_pick_cmdline (2 subtests) ============
[19:42:28] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[19:42:28] =============== drm_test_pick_cmdline_named  ===============
[19:42:28] [PASSED] NTSC
[19:42:28] [PASSED] NTSC-J
[19:42:28] [PASSED] PAL
[19:42:28] [PASSED] PAL-M
[19:42:28] =========== [PASSED] drm_test_pick_cmdline_named ===========
[19:42:28] ============== [PASSED] drm_test_pick_cmdline ==============
[19:42:28] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[19:42:28] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[19:42:28] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[19:42:28] =========== drm_validate_clone_mode (2 subtests) ===========
[19:42:28] ============== drm_test_check_in_clone_mode  ===============
[19:42:28] [PASSED] in_clone_mode
[19:42:28] [PASSED] not_in_clone_mode
[19:42:28] ========== [PASSED] drm_test_check_in_clone_mode ===========
[19:42:28] =============== drm_test_check_valid_clones  ===============
[19:42:28] [PASSED] not_in_clone_mode
[19:42:28] [PASSED] valid_clone
[19:42:28] [PASSED] invalid_clone
[19:42:28] =========== [PASSED] drm_test_check_valid_clones ===========
[19:42:28] ============= [PASSED] drm_validate_clone_mode =============
[19:42:28] ============= drm_validate_modeset (1 subtest) =============
[19:42:28] [PASSED] drm_test_check_connector_changed_modeset
[19:42:28] ============== [PASSED] drm_validate_modeset ===============
[19:42:28] ====== drm_test_bridge_get_current_state (1 subtest) =======
[19:42:28] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[19:42:28] ======== [PASSED] drm_test_bridge_get_current_state ========
[19:42:28] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[19:42:28] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[19:42:28] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[19:42:28] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[19:42:28] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[19:42:28] ============== drm_bridge_alloc (2 subtests) ===============
[19:42:28] [PASSED] drm_test_drm_bridge_alloc_basic
[19:42:28] [PASSED] drm_test_drm_bridge_alloc_get_put
[19:42:28] ================ [PASSED] drm_bridge_alloc =================
[19:42:28] ============= drm_bridge_bus_fmt (5 subtests) ==============
[19:42:28] [PASSED] drm_test_bridge_rgb_yuv_rgb
[19:42:28] [PASSED] drm_test_bridge_must_convert_to_yuv444
[19:42:28] [PASSED] drm_test_bridge_hdmi_auto_rgb
[19:42:28] [PASSED] drm_test_bridge_auto_first
[19:42:28] [PASSED] drm_test_bridge_rgb_yuv_no_path
[19:42:28] =============== [PASSED] drm_bridge_bus_fmt ================
[19:42:28] ============= drm_cmdline_parser (40 subtests) =============
[19:42:28] [PASSED] drm_test_cmdline_force_d_only
[19:42:28] [PASSED] drm_test_cmdline_force_D_only_dvi
[19:42:28] [PASSED] drm_test_cmdline_force_D_only_hdmi
[19:42:28] [PASSED] drm_test_cmdline_force_D_only_not_digital
[19:42:28] [PASSED] drm_test_cmdline_force_e_only
[19:42:28] [PASSED] drm_test_cmdline_res
[19:42:28] [PASSED] drm_test_cmdline_res_vesa
[19:42:28] [PASSED] drm_test_cmdline_res_vesa_rblank
[19:42:28] [PASSED] drm_test_cmdline_res_rblank
[19:42:28] [PASSED] drm_test_cmdline_res_bpp
[19:42:28] [PASSED] drm_test_cmdline_res_refresh
[19:42:28] [PASSED] drm_test_cmdline_res_bpp_refresh
[19:42:28] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[19:42:28] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[19:42:28] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[19:42:28] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[19:42:28] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[19:42:28] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[19:42:28] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[19:42:28] [PASSED] drm_test_cmdline_res_margins_force_on
[19:42:28] [PASSED] drm_test_cmdline_res_vesa_margins
[19:42:28] [PASSED] drm_test_cmdline_name
[19:42:28] [PASSED] drm_test_cmdline_name_bpp
[19:42:28] [PASSED] drm_test_cmdline_name_option
[19:42:28] [PASSED] drm_test_cmdline_name_bpp_option
[19:42:28] [PASSED] drm_test_cmdline_rotate_0
[19:42:28] [PASSED] drm_test_cmdline_rotate_90
[19:42:28] [PASSED] drm_test_cmdline_rotate_180
[19:42:28] [PASSED] drm_test_cmdline_rotate_270
[19:42:28] [PASSED] drm_test_cmdline_hmirror
[19:42:28] [PASSED] drm_test_cmdline_vmirror
[19:42:28] [PASSED] drm_test_cmdline_margin_options
[19:42:28] [PASSED] drm_test_cmdline_multiple_options
[19:42:28] [PASSED] drm_test_cmdline_bpp_extra_and_option
[19:42:28] [PASSED] drm_test_cmdline_extra_and_option
[19:42:28] [PASSED] drm_test_cmdline_freestanding_options
[19:42:28] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[19:42:28] [PASSED] drm_test_cmdline_panel_orientation
[19:42:28] ================ drm_test_cmdline_invalid  =================
[19:42:28] [PASSED] margin_only
[19:42:28] [PASSED] interlace_only
[19:42:28] [PASSED] res_missing_x
[19:42:28] [PASSED] res_missing_y
[19:42:28] [PASSED] res_bad_y
[19:42:28] [PASSED] res_missing_y_bpp
[19:42:28] [PASSED] res_bad_bpp
[19:42:28] [PASSED] res_bad_refresh
[19:42:28] [PASSED] res_bpp_refresh_force_on_off
[19:42:28] [PASSED] res_invalid_mode
[19:42:28] [PASSED] res_bpp_wrong_place_mode
[19:42:28] [PASSED] name_bpp_refresh
[19:42:28] [PASSED] name_refresh
[19:42:28] [PASSED] name_refresh_wrong_mode
[19:42:28] [PASSED] name_refresh_invalid_mode
[19:42:28] [PASSED] rotate_multiple
[19:42:28] [PASSED] rotate_invalid_val
[19:42:28] [PASSED] rotate_truncated
[19:42:28] [PASSED] invalid_option
[19:42:28] [PASSED] invalid_tv_option
[19:42:28] [PASSED] truncated_tv_option
[19:42:28] ============ [PASSED] drm_test_cmdline_invalid =============
[19:42:28] =============== drm_test_cmdline_tv_options  ===============
[19:42:28] [PASSED] NTSC
[19:42:28] [PASSED] NTSC_443
[19:42:28] [PASSED] NTSC_J
[19:42:28] [PASSED] PAL
[19:42:28] [PASSED] PAL_M
[19:42:28] [PASSED] PAL_N
[19:42:28] [PASSED] SECAM
[19:42:28] [PASSED] MONO_525
[19:42:28] [PASSED] MONO_625
[19:42:28] =========== [PASSED] drm_test_cmdline_tv_options ===========
[19:42:28] =============== [PASSED] drm_cmdline_parser ================
[19:42:28] ========== drmm_connector_hdmi_init (20 subtests) ==========
[19:42:28] [PASSED] drm_test_connector_hdmi_init_valid
[19:42:28] [PASSED] drm_test_connector_hdmi_init_bpc_8
[19:42:28] [PASSED] drm_test_connector_hdmi_init_bpc_10
[19:42:28] [PASSED] drm_test_connector_hdmi_init_bpc_12
[19:42:28] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[19:42:28] [PASSED] drm_test_connector_hdmi_init_bpc_null
[19:42:28] [PASSED] drm_test_connector_hdmi_init_formats_empty
[19:42:28] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[19:42:28] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[19:42:28] [PASSED] supported_formats=0x9 yuv420_allowed=1
[19:42:28] [PASSED] supported_formats=0x9 yuv420_allowed=0
[19:42:28] [PASSED] supported_formats=0x5 yuv420_allowed=1
[19:42:28] [PASSED] supported_formats=0x5 yuv420_allowed=0
[19:42:28] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[19:42:28] [PASSED] drm_test_connector_hdmi_init_null_ddc
[19:42:28] [PASSED] drm_test_connector_hdmi_init_null_product
[19:42:28] [PASSED] drm_test_connector_hdmi_init_null_vendor
[19:42:28] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[19:42:28] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[19:42:28] [PASSED] drm_test_connector_hdmi_init_product_valid
[19:42:28] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[19:42:28] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[19:42:28] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[19:42:28] ========= drm_test_connector_hdmi_init_type_valid  =========
[19:42:28] [PASSED] HDMI-A
[19:42:28] [PASSED] HDMI-B
[19:42:28] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[19:42:28] ======== drm_test_connector_hdmi_init_type_invalid  ========
[19:42:28] [PASSED] Unknown
[19:42:28] [PASSED] VGA
[19:42:28] [PASSED] DVI-I
[19:42:28] [PASSED] DVI-D
[19:42:28] [PASSED] DVI-A
[19:42:28] [PASSED] Composite
[19:42:28] [PASSED] SVIDEO
[19:42:28] [PASSED] LVDS
[19:42:28] [PASSED] Component
[19:42:28] [PASSED] DIN
[19:42:28] [PASSED] DP
[19:42:28] [PASSED] TV
[19:42:28] [PASSED] eDP
[19:42:28] [PASSED] Virtual
[19:42:28] [PASSED] DSI
[19:42:28] [PASSED] DPI
[19:42:28] [PASSED] Writeback
[19:42:28] [PASSED] SPI
[19:42:28] [PASSED] USB
[19:42:28] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[19:42:28] ============ [PASSED] drmm_connector_hdmi_init =============
[19:42:28] ============= drmm_connector_init (3 subtests) =============
[19:42:28] [PASSED] drm_test_drmm_connector_init
[19:42:28] [PASSED] drm_test_drmm_connector_init_null_ddc
[19:42:28] ========= drm_test_drmm_connector_init_type_valid  =========
[19:42:28] [PASSED] Unknown
[19:42:28] [PASSED] VGA
[19:42:28] [PASSED] DVI-I
[19:42:28] [PASSED] DVI-D
[19:42:28] [PASSED] DVI-A
[19:42:28] [PASSED] Composite
[19:42:28] [PASSED] SVIDEO
[19:42:28] [PASSED] LVDS
[19:42:28] [PASSED] Component
[19:42:28] [PASSED] DIN
[19:42:28] [PASSED] DP
[19:42:28] [PASSED] HDMI-A
[19:42:28] [PASSED] HDMI-B
[19:42:28] [PASSED] TV
[19:42:28] [PASSED] eDP
[19:42:28] [PASSED] Virtual
[19:42:28] [PASSED] DSI
[19:42:28] [PASSED] DPI
[19:42:28] [PASSED] Writeback
[19:42:28] [PASSED] SPI
[19:42:28] [PASSED] USB
[19:42:28] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[19:42:28] =============== [PASSED] drmm_connector_init ===============
[19:42:28] ========= drm_connector_dynamic_init (6 subtests) ==========
[19:42:28] [PASSED] drm_test_drm_connector_dynamic_init
[19:42:28] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[19:42:28] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[19:42:28] [PASSED] drm_test_drm_connector_dynamic_init_properties
[19:42:28] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[19:42:28] [PASSED] Unknown
[19:42:28] [PASSED] VGA
[19:42:28] [PASSED] DVI-I
[19:42:28] [PASSED] DVI-D
[19:42:28] [PASSED] DVI-A
[19:42:28] [PASSED] Composite
[19:42:28] [PASSED] SVIDEO
[19:42:28] [PASSED] LVDS
[19:42:28] [PASSED] Component
[19:42:28] [PASSED] DIN
[19:42:28] [PASSED] DP
[19:42:28] [PASSED] HDMI-A
[19:42:28] [PASSED] HDMI-B
[19:42:28] [PASSED] TV
[19:42:28] [PASSED] eDP
[19:42:28] [PASSED] Virtual
[19:42:28] [PASSED] DSI
[19:42:28] [PASSED] DPI
[19:42:28] [PASSED] Writeback
[19:42:28] [PASSED] SPI
[19:42:28] [PASSED] USB
[19:42:28] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[19:42:28] ======== drm_test_drm_connector_dynamic_init_name  =========
[19:42:28] [PASSED] Unknown
[19:42:28] [PASSED] VGA
[19:42:28] [PASSED] DVI-I
[19:42:28] [PASSED] DVI-D
[19:42:28] [PASSED] DVI-A
[19:42:28] [PASSED] Composite
[19:42:28] [PASSED] SVIDEO
[19:42:28] [PASSED] LVDS
[19:42:28] [PASSED] Component
[19:42:28] [PASSED] DIN
[19:42:28] [PASSED] DP
[19:42:28] [PASSED] HDMI-A
[19:42:28] [PASSED] HDMI-B
[19:42:28] [PASSED] TV
[19:42:28] [PASSED] eDP
[19:42:28] [PASSED] Virtual
[19:42:28] [PASSED] DSI
[19:42:28] [PASSED] DPI
[19:42:28] [PASSED] Writeback
[19:42:28] [PASSED] SPI
[19:42:28] [PASSED] USB
[19:42:28] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[19:42:28] =========== [PASSED] drm_connector_dynamic_init ============
[19:42:28] ==== drm_connector_dynamic_register_early (4 subtests) =====
[19:42:28] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[19:42:28] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[19:42:28] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[19:42:28] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[19:42:28] ====== [PASSED] drm_connector_dynamic_register_early =======
[19:42:28] ======= drm_connector_dynamic_register (7 subtests) ========
[19:42:28] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[19:42:28] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[19:42:28] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[19:42:28] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[19:42:28] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[19:42:28] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[19:42:28] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[19:42:28] ========= [PASSED] drm_connector_dynamic_register ==========
[19:42:28] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[19:42:28] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[19:42:28] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[19:42:28] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[19:42:28] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[19:42:28] ========== drm_test_get_tv_mode_from_name_valid  ===========
[19:42:28] [PASSED] NTSC
[19:42:28] [PASSED] NTSC-443
[19:42:28] [PASSED] NTSC-J
[19:42:28] [PASSED] PAL
[19:42:28] [PASSED] PAL-M
[19:42:28] [PASSED] PAL-N
[19:42:28] [PASSED] SECAM
[19:42:28] [PASSED] Mono
[19:42:28] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[19:42:28] [PASSED] drm_test_get_tv_mode_from_name_truncated
[19:42:28] ============ [PASSED] drm_get_tv_mode_from_name ============
[19:42:28] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[19:42:28] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[19:42:28] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[19:42:28] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[19:42:28] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[19:42:28] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[19:42:28] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[19:42:28] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[19:42:28] [PASSED] VIC 96
[19:42:28] [PASSED] VIC 97
[19:42:28] [PASSED] VIC 101
[19:42:28] [PASSED] VIC 102
[19:42:28] [PASSED] VIC 106
[19:42:28] [PASSED] VIC 107
[19:42:28] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[19:42:28] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[19:42:28] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[19:42:28] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[19:42:28] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[19:42:28] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[19:42:28] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[19:42:28] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[19:42:28] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[19:42:28] [PASSED] Automatic
[19:42:28] [PASSED] Full
[19:42:28] [PASSED] Limited 16:235
[19:42:28] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[19:42:28] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[19:42:28] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[19:42:28] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[19:42:28] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[19:42:28] [PASSED] RGB
[19:42:28] [PASSED] YUV 4:2:0
[19:42:28] [PASSED] YUV 4:2:2
[19:42:28] [PASSED] YUV 4:4:4
[19:42:28] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[19:42:28] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[19:42:28] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[19:42:28] ============= drm_damage_helper (21 subtests) ==============
[19:42:28] [PASSED] drm_test_damage_iter_no_damage
[19:42:28] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[19:42:28] [PASSED] drm_test_damage_iter_no_damage_src_moved
[19:42:28] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[19:42:28] [PASSED] drm_test_damage_iter_no_damage_not_visible
[19:42:28] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[19:42:28] [PASSED] drm_test_damage_iter_no_damage_no_fb
[19:42:28] [PASSED] drm_test_damage_iter_simple_damage
[19:42:28] [PASSED] drm_test_damage_iter_single_damage
[19:42:28] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[19:42:28] [PASSED] drm_test_damage_iter_single_damage_outside_src
[19:42:28] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[19:42:28] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[19:42:28] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[19:42:28] [PASSED] drm_test_damage_iter_single_damage_src_moved
[19:42:28] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[19:42:28] [PASSED] drm_test_damage_iter_damage
[19:42:28] [PASSED] drm_test_damage_iter_damage_one_intersect
[19:42:28] [PASSED] drm_test_damage_iter_damage_one_outside
[19:42:28] [PASSED] drm_test_damage_iter_damage_src_moved
[19:42:28] [PASSED] drm_test_damage_iter_damage_not_visible
[19:42:28] ================ [PASSED] drm_damage_helper ================
[19:42:28] ============== drm_dp_mst_helper (3 subtests) ==============
[19:42:28] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[19:42:28] [PASSED] Clock 154000 BPP 30 DSC disabled
[19:42:28] [PASSED] Clock 234000 BPP 30 DSC disabled
[19:42:28] [PASSED] Clock 297000 BPP 24 DSC disabled
[19:42:28] [PASSED] Clock 332880 BPP 24 DSC enabled
[19:42:28] [PASSED] Clock 324540 BPP 24 DSC enabled
[19:42:28] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[19:42:28] ============== drm_test_dp_mst_calc_pbn_div  ===============
[19:42:28] [PASSED] Link rate 2000000 lane count 4
[19:42:28] [PASSED] Link rate 2000000 lane count 2
[19:42:28] [PASSED] Link rate 2000000 lane count 1
[19:42:28] [PASSED] Link rate 1350000 lane count 4
[19:42:28] [PASSED] Link rate 1350000 lane count 2
[19:42:28] [PASSED] Link rate 1350000 lane count 1
[19:42:28] [PASSED] Link rate 1000000 lane count 4
[19:42:28] [PASSED] Link rate 1000000 lane count 2
[19:42:28] [PASSED] Link rate 1000000 lane count 1
[19:42:28] [PASSED] Link rate 810000 lane count 4
[19:42:28] [PASSED] Link rate 810000 lane count 2
[19:42:28] [PASSED] Link rate 810000 lane count 1
[19:42:28] [PASSED] Link rate 540000 lane count 4
[19:42:28] [PASSED] Link rate 540000 lane count 2
[19:42:28] [PASSED] Link rate 540000 lane count 1
[19:42:28] [PASSED] Link rate 270000 lane count 4
[19:42:28] [PASSED] Link rate 270000 lane count 2
[19:42:28] [PASSED] Link rate 270000 lane count 1
[19:42:28] [PASSED] Link rate 162000 lane count 4
[19:42:28] [PASSED] Link rate 162000 lane count 2
[19:42:28] [PASSED] Link rate 162000 lane count 1
[19:42:28] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[19:42:28] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[19:42:28] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[19:42:28] [PASSED] DP_POWER_UP_PHY with port number
[19:42:28] [PASSED] DP_POWER_DOWN_PHY with port number
[19:42:28] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[19:42:28] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[19:42:28] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[19:42:28] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[19:42:28] [PASSED] DP_QUERY_PAYLOAD with port number
[19:42:28] [PASSED] DP_QUERY_PAYLOAD with VCPI
[19:42:28] [PASSED] DP_REMOTE_DPCD_READ with port number
[19:42:28] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[19:42:28] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[19:42:28] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[19:42:28] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[19:42:28] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[19:42:28] [PASSED] DP_REMOTE_I2C_READ with port number
[19:42:28] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[19:42:28] [PASSED] DP_REMOTE_I2C_READ with transactions array
[19:42:28] [PASSED] DP_REMOTE_I2C_WRITE with port number
[19:42:28] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[19:42:28] [PASSED] DP_REMOTE_I2C_WRITE with data array
[19:42:28] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[19:42:28] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[19:42:28] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[19:42:28] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[19:42:28] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[19:42:28] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[19:42:28] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[19:42:28] ================ [PASSED] drm_dp_mst_helper ================
[19:42:28] ================== drm_exec (7 subtests) ===================
[19:42:28] [PASSED] sanitycheck
[19:42:28] [PASSED] test_lock
[19:42:28] [PASSED] test_lock_unlock
[19:42:28] [PASSED] test_duplicates
[19:42:28] [PASSED] test_prepare
[19:42:28] [PASSED] test_prepare_array
[19:42:28] [PASSED] test_multiple_loops
[19:42:28] ==================== [PASSED] drm_exec =====================
[19:42:28] =========== drm_format_helper_test (17 subtests) ===========
[19:42:28] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[19:42:28] [PASSED] single_pixel_source_buffer
[19:42:28] [PASSED] single_pixel_clip_rectangle
[19:42:28] [PASSED] well_known_colors
[19:42:28] [PASSED] destination_pitch
[19:42:28] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[19:42:28] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[19:42:28] [PASSED] single_pixel_source_buffer
[19:42:28] [PASSED] single_pixel_clip_rectangle
[19:42:28] [PASSED] well_known_colors
[19:42:28] [PASSED] destination_pitch
[19:42:28] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[19:42:28] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[19:42:28] [PASSED] single_pixel_source_buffer
[19:42:28] [PASSED] single_pixel_clip_rectangle
[19:42:28] [PASSED] well_known_colors
[19:42:28] [PASSED] destination_pitch
[19:42:28] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[19:42:28] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[19:42:28] [PASSED] single_pixel_source_buffer
[19:42:28] [PASSED] single_pixel_clip_rectangle
[19:42:28] [PASSED] well_known_colors
[19:42:28] [PASSED] destination_pitch
[19:42:28] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[19:42:28] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[19:42:28] [PASSED] single_pixel_source_buffer
[19:42:28] [PASSED] single_pixel_clip_rectangle
[19:42:28] [PASSED] well_known_colors
[19:42:28] [PASSED] destination_pitch
[19:42:28] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[19:42:28] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[19:42:28] [PASSED] single_pixel_source_buffer
[19:42:28] [PASSED] single_pixel_clip_rectangle
[19:42:28] [PASSED] well_known_colors
[19:42:28] [PASSED] destination_pitch
[19:42:28] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[19:42:28] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[19:42:28] [PASSED] single_pixel_source_buffer
[19:42:28] [PASSED] single_pixel_clip_rectangle
[19:42:28] [PASSED] well_known_colors
[19:42:28] [PASSED] destination_pitch
[19:42:28] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[19:42:28] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[19:42:28] [PASSED] single_pixel_source_buffer
[19:42:28] [PASSED] single_pixel_clip_rectangle
[19:42:28] [PASSED] well_known_colors
[19:42:28] [PASSED] destination_pitch
[19:42:28] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[19:42:28] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[19:42:28] [PASSED] single_pixel_source_buffer
[19:42:28] [PASSED] single_pixel_clip_rectangle
[19:42:28] [PASSED] well_known_colors
[19:42:28] [PASSED] destination_pitch
[19:42:28] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[19:42:28] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[19:42:28] [PASSED] single_pixel_source_buffer
[19:42:28] [PASSED] single_pixel_clip_rectangle
[19:42:28] [PASSED] well_known_colors
[19:42:28] [PASSED] destination_pitch
[19:42:28] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[19:42:28] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[19:42:28] [PASSED] single_pixel_source_buffer
[19:42:28] [PASSED] single_pixel_clip_rectangle
[19:42:28] [PASSED] well_known_colors
[19:42:28] [PASSED] destination_pitch
[19:42:28] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[19:42:28] ============== drm_test_fb_xrgb8888_to_mono  ===============
[19:42:28] [PASSED] single_pixel_source_buffer
[19:42:28] [PASSED] single_pixel_clip_rectangle
[19:42:28] [PASSED] well_known_colors
[19:42:28] [PASSED] destination_pitch
[19:42:28] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[19:42:28] ==================== drm_test_fb_swab  =====================
[19:42:28] [PASSED] single_pixel_source_buffer
[19:42:28] [PASSED] single_pixel_clip_rectangle
[19:42:28] [PASSED] well_known_colors
[19:42:28] [PASSED] destination_pitch
[19:42:28] ================ [PASSED] drm_test_fb_swab =================
[19:42:28] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[19:42:28] [PASSED] single_pixel_source_buffer
[19:42:28] [PASSED] single_pixel_clip_rectangle
[19:42:28] [PASSED] well_known_colors
[19:42:28] [PASSED] destination_pitch
[19:42:28] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[19:42:28] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[19:42:28] [PASSED] single_pixel_source_buffer
[19:42:28] [PASSED] single_pixel_clip_rectangle
[19:42:28] [PASSED] well_known_colors
[19:42:28] [PASSED] destination_pitch
[19:42:28] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[19:42:28] ================= drm_test_fb_clip_offset  =================
[19:42:28] [PASSED] pass through
[19:42:28] [PASSED] horizontal offset
[19:42:28] [PASSED] vertical offset
[19:42:28] [PASSED] horizontal and vertical offset
[19:42:28] [PASSED] horizontal offset (custom pitch)
[19:42:28] [PASSED] vertical offset (custom pitch)
[19:42:28] [PASSED] horizontal and vertical offset (custom pitch)
[19:42:28] ============= [PASSED] drm_test_fb_clip_offset =============
[19:42:28] =================== drm_test_fb_memcpy  ====================
[19:42:28] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[19:42:28] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[19:42:28] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[19:42:28] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[19:42:28] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[19:42:28] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[19:42:28] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[19:42:28] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[19:42:28] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[19:42:28] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[19:42:28] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[19:42:28] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[19:42:28] =============== [PASSED] drm_test_fb_memcpy ================
[19:42:28] ============= [PASSED] drm_format_helper_test ==============
[19:42:28] ================= drm_format (18 subtests) =================
[19:42:28] [PASSED] drm_test_format_block_width_invalid
[19:42:28] [PASSED] drm_test_format_block_width_one_plane
[19:42:28] [PASSED] drm_test_format_block_width_two_plane
[19:42:28] [PASSED] drm_test_format_block_width_three_plane
[19:42:28] [PASSED] drm_test_format_block_width_tiled
[19:42:28] [PASSED] drm_test_format_block_height_invalid
[19:42:28] [PASSED] drm_test_format_block_height_one_plane
[19:42:28] [PASSED] drm_test_format_block_height_two_plane
[19:42:28] [PASSED] drm_test_format_block_height_three_plane
[19:42:28] [PASSED] drm_test_format_block_height_tiled
[19:42:28] [PASSED] drm_test_format_min_pitch_invalid
[19:42:28] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[19:42:28] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[19:42:28] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[19:42:28] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[19:42:28] [PASSED] drm_test_format_min_pitch_two_plane
[19:42:28] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[19:42:28] [PASSED] drm_test_format_min_pitch_tiled
[19:42:28] =================== [PASSED] drm_format ====================
[19:42:28] ============== drm_framebuffer (10 subtests) ===============
[19:42:28] ========== drm_test_framebuffer_check_src_coords  ==========
[19:42:28] [PASSED] Success: source fits into fb
[19:42:28] [PASSED] Fail: overflowing fb with x-axis coordinate
[19:42:28] [PASSED] Fail: overflowing fb with y-axis coordinate
[19:42:28] [PASSED] Fail: overflowing fb with source width
[19:42:28] [PASSED] Fail: overflowing fb with source height
[19:42:28] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[19:42:28] [PASSED] drm_test_framebuffer_cleanup
[19:42:28] =============== drm_test_framebuffer_create  ===============
[19:42:28] [PASSED] ABGR8888 normal sizes
[19:42:28] [PASSED] ABGR8888 max sizes
[19:42:28] [PASSED] ABGR8888 pitch greater than min required
[19:42:28] [PASSED] ABGR8888 pitch less than min required
[19:42:28] [PASSED] ABGR8888 Invalid width
[19:42:28] [PASSED] ABGR8888 Invalid buffer handle
[19:42:28] [PASSED] No pixel format
[19:42:28] [PASSED] ABGR8888 Width 0
[19:42:28] [PASSED] ABGR8888 Height 0
[19:42:28] [PASSED] ABGR8888 Out of bound height * pitch combination
[19:42:28] [PASSED] ABGR8888 Large buffer offset
[19:42:28] [PASSED] ABGR8888 Buffer offset for inexistent plane
[19:42:28] [PASSED] ABGR8888 Invalid flag
[19:42:28] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[19:42:28] [PASSED] ABGR8888 Valid buffer modifier
[19:42:28] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[19:42:28] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[19:42:28] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[19:42:28] [PASSED] NV12 Normal sizes
[19:42:28] [PASSED] NV12 Max sizes
[19:42:28] [PASSED] NV12 Invalid pitch
[19:42:28] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[19:42:28] [PASSED] NV12 different  modifier per-plane
[19:42:28] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[19:42:28] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[19:42:28] [PASSED] NV12 Modifier for inexistent plane
[19:42:28] [PASSED] NV12 Handle for inexistent plane
[19:42:28] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[19:42:28] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[19:42:28] [PASSED] YVU420 Normal sizes
[19:42:28] [PASSED] YVU420 Max sizes
[19:42:28] [PASSED] YVU420 Invalid pitch
[19:42:28] [PASSED] YVU420 Different pitches
[19:42:28] [PASSED] YVU420 Different buffer offsets/pitches
[19:42:28] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[19:42:28] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[19:42:28] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[19:42:28] [PASSED] YVU420 Valid modifier
[19:42:28] [PASSED] YVU420 Different modifiers per plane
[19:42:28] [PASSED] YVU420 Modifier for inexistent plane
[19:42:28] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[19:42:28] [PASSED] X0L2 Normal sizes
[19:42:28] [PASSED] X0L2 Max sizes
[19:42:28] [PASSED] X0L2 Invalid pitch
[19:42:28] [PASSED] X0L2 Pitch greater than minimum required
[19:42:28] [PASSED] X0L2 Handle for inexistent plane
[19:42:28] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[19:42:28] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[19:42:28] [PASSED] X0L2 Valid modifier
[19:42:28] [PASSED] X0L2 Modifier for inexistent plane
[19:42:28] =========== [PASSED] drm_test_framebuffer_create ===========
[19:42:28] [PASSED] drm_test_framebuffer_free
[19:42:28] [PASSED] drm_test_framebuffer_init
[19:42:28] [PASSED] drm_test_framebuffer_init_bad_format
[19:42:28] [PASSED] drm_test_framebuffer_init_dev_mismatch
[19:42:28] [PASSED] drm_test_framebuffer_lookup
[19:42:28] [PASSED] drm_test_framebuffer_lookup_inexistent
[19:42:28] [PASSED] drm_test_framebuffer_modifiers_not_supported
[19:42:28] ================= [PASSED] drm_framebuffer =================
[19:42:28] ================ drm_gem_shmem (8 subtests) ================
[19:42:28] [PASSED] drm_gem_shmem_test_obj_create
[19:42:28] [PASSED] drm_gem_shmem_test_obj_create_private
[19:42:28] [PASSED] drm_gem_shmem_test_pin_pages
[19:42:28] [PASSED] drm_gem_shmem_test_vmap
[19:42:28] [PASSED] drm_gem_shmem_test_get_sg_table
[19:42:28] [PASSED] drm_gem_shmem_test_get_pages_sgt
[19:42:28] [PASSED] drm_gem_shmem_test_madvise
[19:42:28] [PASSED] drm_gem_shmem_test_purge
[19:42:28] ================== [PASSED] drm_gem_shmem ==================
[19:42:28] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[19:42:28] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[19:42:28] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[19:42:28] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[19:42:28] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[19:42:28] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[19:42:28] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[19:42:28] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[19:42:28] [PASSED] Automatic
[19:42:28] [PASSED] Full
[19:42:28] [PASSED] Limited 16:235
[19:42:28] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[19:42:28] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[19:42:28] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[19:42:28] [PASSED] drm_test_check_disable_connector
[19:42:28] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[19:42:28] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[19:42:28] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[19:42:28] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[19:42:28] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[19:42:28] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[19:42:28] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[19:42:28] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[19:42:28] [PASSED] drm_test_check_output_bpc_dvi
[19:42:28] [PASSED] drm_test_check_output_bpc_format_vic_1
[19:42:28] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[19:42:28] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[19:42:28] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[19:42:28] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[19:42:28] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[19:42:28] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[19:42:28] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[19:42:28] ============ drm_test_check_hdmi_color_format  =============
[19:42:28] [PASSED] AUTO -> RGB
[19:42:28] [PASSED] YCBCR422 -> YUV422
[19:42:28] [PASSED] YCBCR420 -> YUV420
[19:42:28] [PASSED] YCBCR444 -> YUV444
[19:42:28] [PASSED] RGB -> RGB
[19:42:28] ======== [PASSED] drm_test_check_hdmi_color_format =========
[19:42:28] ======== drm_test_check_hdmi_color_format_420_only  ========
[19:42:28] [PASSED] RGB should fail
[19:42:28] [PASSED] YUV444 should fail
[19:42:28] [PASSED] YUV422 should fail
[19:42:28] [PASSED] YUV420 should work
[19:42:28] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[19:42:28] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[19:42:28] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[19:42:28] [PASSED] drm_test_check_broadcast_rgb_value
[19:42:28] [PASSED] drm_test_check_bpc_8_value
[19:42:28] [PASSED] drm_test_check_bpc_10_value
[19:42:28] [PASSED] drm_test_check_bpc_12_value
[19:42:28] [PASSED] drm_test_check_format_value
[19:42:28] [PASSED] drm_test_check_tmds_char_value
[19:42:28] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[19:42:28] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[19:42:28] [PASSED] drm_test_check_mode_valid
[19:42:28] [PASSED] drm_test_check_mode_valid_reject
[19:42:28] [PASSED] drm_test_check_mode_valid_reject_rate
[19:42:28] [PASSED] drm_test_check_mode_valid_reject_max_clock
[19:42:28] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[19:42:28] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[19:42:28] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[19:42:28] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[19:42:28] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[19:42:28] [PASSED] drm_test_check_infoframes
[19:42:28] [PASSED] drm_test_check_reject_avi_infoframe
[19:42:28] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[19:42:28] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[19:42:28] [PASSED] drm_test_check_reject_audio_infoframe
[19:42:28] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[19:42:28] ================= drm_managed (2 subtests) =================
[19:42:28] [PASSED] drm_test_managed_release_action
[19:42:28] [PASSED] drm_test_managed_run_action
[19:42:28] =================== [PASSED] drm_managed ===================
[19:42:28] =================== drm_mm (6 subtests) ====================
[19:42:28] [PASSED] drm_test_mm_init
[19:42:28] [PASSED] drm_test_mm_debug
[19:42:28] [PASSED] drm_test_mm_align32
[19:42:28] [PASSED] drm_test_mm_align64
[19:42:28] [PASSED] drm_test_mm_lowest
[19:42:28] [PASSED] drm_test_mm_highest
[19:42:28] ===================== [PASSED] drm_mm ======================
[19:42:28] ============= drm_modes_analog_tv (5 subtests) =============
[19:42:28] [PASSED] drm_test_modes_analog_tv_mono_576i
[19:42:28] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[19:42:28] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[19:42:28] [PASSED] drm_test_modes_analog_tv_pal_576i
[19:42:28] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[19:42:28] =============== [PASSED] drm_modes_analog_tv ===============
[19:42:28] ============== drm_plane_helper (2 subtests) ===============
[19:42:28] =============== drm_test_check_plane_state  ================
[19:42:28] [PASSED] clipping_simple
[19:42:28] [PASSED] clipping_rotate_reflect
[19:42:28] [PASSED] positioning_simple
[19:42:28] [PASSED] upscaling
[19:42:28] [PASSED] downscaling
[19:42:28] [PASSED] rounding1
[19:42:28] [PASSED] rounding2
[19:42:28] [PASSED] rounding3
[19:42:28] [PASSED] rounding4
[19:42:28] =========== [PASSED] drm_test_check_plane_state ============
[19:42:28] =========== drm_test_check_invalid_plane_state  ============
[19:42:28] [PASSED] positioning_invalid
[19:42:28] [PASSED] upscaling_invalid
[19:42:28] [PASSED] downscaling_invalid
[19:42:28] ======= [PASSED] drm_test_check_invalid_plane_state ========
[19:42:28] ================ [PASSED] drm_plane_helper =================
[19:42:28] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[19:42:28] ====== drm_test_connector_helper_tv_get_modes_check  =======
[19:42:28] [PASSED] None
[19:42:28] [PASSED] PAL
[19:42:28] [PASSED] NTSC
[19:42:28] [PASSED] Both, NTSC Default
[19:42:28] [PASSED] Both, PAL Default
[19:42:28] [PASSED] Both, NTSC Default, with PAL on command-line
[19:42:28] [PASSED] Both, PAL Default, with NTSC on command-line
[19:42:28] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[19:42:28] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[19:42:28] ================== drm_rect (9 subtests) ===================
[19:42:28] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[19:42:28] [PASSED] drm_test_rect_clip_scaled_not_clipped
[19:42:28] [PASSED] drm_test_rect_clip_scaled_clipped
[19:42:28] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[19:42:28] ================= drm_test_rect_intersect  =================
[19:42:28] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[19:42:28] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[19:42:28] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[19:42:28] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[19:42:28] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[19:42:28] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[19:42:28] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[19:42:28] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[19:42:28] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[19:42:28] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[19:42:28] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[19:42:28] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[19:42:28] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[19:42:28] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[19:42:28] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[19:42:28] ============= [PASSED] drm_test_rect_intersect =============
[19:42:28] ================ drm_test_rect_calc_hscale  ================
[19:42:28] [PASSED] normal use
[19:42:28] [PASSED] out of max range
[19:42:28] [PASSED] out of min range
[19:42:28] [PASSED] zero dst
[19:42:28] [PASSED] negative src
[19:42:28] [PASSED] negative dst
[19:42:28] ============ [PASSED] drm_test_rect_calc_hscale ============
[19:42:28] ================ drm_test_rect_calc_vscale  ================
[19:42:28] [PASSED] normal use
[19:42:28] [PASSED] out of max range
[19:42:28] [PASSED] out of min range
[19:42:28] [PASSED] zero dst
[19:42:28] [PASSED] negative src
[19:42:28] [PASSED] negative dst
[19:42:28] ============ [PASSED] drm_test_rect_calc_vscale ============
[19:42:28] ================== drm_test_rect_rotate  ===================
[19:42:28] [PASSED] reflect-x
[19:42:28] [PASSED] reflect-y
[19:42:28] [PASSED] rotate-0
[19:42:28] [PASSED] rotate-90
[19:42:28] [PASSED] rotate-180
[19:42:28] [PASSED] rotate-270
[19:42:28] ============== [PASSED] drm_test_rect_rotate ===============
[19:42:28] ================ drm_test_rect_rotate_inv  =================
[19:42:28] [PASSED] reflect-x
[19:42:28] [PASSED] reflect-y
[19:42:28] [PASSED] rotate-0
[19:42:28] [PASSED] rotate-90
[19:42:28] [PASSED] rotate-180
[19:42:28] [PASSED] rotate-270
[19:42:28] ============ [PASSED] drm_test_rect_rotate_inv =============
[19:42:28] ==================== [PASSED] drm_rect =====================
[19:42:28] ============ drm_sysfb_modeset_test (1 subtest) ============
[19:42:28] ============ drm_test_sysfb_build_fourcc_list  =============
[19:42:28] [PASSED] no native formats
[19:42:28] [PASSED] XRGB8888 as native format
[19:42:28] [PASSED] remove duplicates
[19:42:28] [PASSED] convert alpha formats
[19:42:28] [PASSED] random formats
[19:42:28] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[19:42:28] ============= [PASSED] drm_sysfb_modeset_test ==============
[19:42:28] ================== drm_fixp (2 subtests) ===================
[19:42:28] [PASSED] drm_test_int2fixp
[19:42:28] [PASSED] drm_test_sm2fixp
[19:42:28] ==================== [PASSED] drm_fixp =====================
[19:42:28] ============================================================
[19:42:28] Testing complete. Ran 637 tests: passed: 637
[19:42:28] Elapsed time: 45.490s total, 1.839s configuring, 43.385s building, 0.217s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[19:42:28] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:42:30] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[19:42:40] Starting KUnit Kernel (1/1)...
[19:42:40] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:42:40] ================= ttm_device (5 subtests) ==================
[19:42:40] [PASSED] ttm_device_init_basic
[19:42:40] [PASSED] ttm_device_init_multiple
[19:42:40] [PASSED] ttm_device_fini_basic
[19:42:40] [PASSED] ttm_device_init_no_vma_man
[19:42:40] ================== ttm_device_init_pools  ==================
[19:42:40] [PASSED] No DMA allocations, no DMA32 required
[19:42:40] [PASSED] DMA allocations, DMA32 required
[19:42:40] [PASSED] No DMA allocations, DMA32 required
[19:42:40] [PASSED] DMA allocations, no DMA32 required
[19:42:40] ============== [PASSED] ttm_device_init_pools ==============
[19:42:40] =================== [PASSED] ttm_device ====================
[19:42:40] ================== ttm_pool (8 subtests) ===================
[19:42:40] ================== ttm_pool_alloc_basic  ===================
[19:42:40] [PASSED] One page
[19:42:40] [PASSED] More than one page
[19:42:40] [PASSED] Above the allocation limit
[19:42:40] [PASSED] One page, with coherent DMA mappings enabled
[19:42:40] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[19:42:40] ============== [PASSED] ttm_pool_alloc_basic ===============
[19:42:40] ============== ttm_pool_alloc_basic_dma_addr  ==============
[19:42:40] [PASSED] One page
[19:42:40] [PASSED] More than one page
[19:42:40] [PASSED] Above the allocation limit
[19:42:40] [PASSED] One page, with coherent DMA mappings enabled
[19:42:40] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[19:42:40] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[19:42:40] [PASSED] ttm_pool_alloc_order_caching_match
[19:42:40] [PASSED] ttm_pool_alloc_caching_mismatch
[19:42:40] [PASSED] ttm_pool_alloc_order_mismatch
[19:42:40] [PASSED] ttm_pool_free_dma_alloc
[19:42:40] [PASSED] ttm_pool_free_no_dma_alloc
[19:42:40] [PASSED] ttm_pool_fini_basic
[19:42:40] ==================== [PASSED] ttm_pool =====================
[19:42:40] ================ ttm_resource (8 subtests) =================
[19:42:40] ================= ttm_resource_init_basic  =================
[19:42:40] [PASSED] Init resource in TTM_PL_SYSTEM
[19:42:40] [PASSED] Init resource in TTM_PL_VRAM
[19:42:40] [PASSED] Init resource in a private placement
[19:42:40] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[19:42:40] ============= [PASSED] ttm_resource_init_basic =============
[19:42:40] [PASSED] ttm_resource_init_pinned
[19:42:40] [PASSED] ttm_resource_fini_basic
[19:42:40] [PASSED] ttm_resource_manager_init_basic
[19:42:40] [PASSED] ttm_resource_manager_usage_basic
[19:42:40] [PASSED] ttm_resource_manager_set_used_basic
[19:42:40] [PASSED] ttm_sys_man_alloc_basic
[19:42:40] [PASSED] ttm_sys_man_free_basic
[19:42:40] ================== [PASSED] ttm_resource ===================
[19:42:40] =================== ttm_tt (15 subtests) ===================
[19:42:40] ==================== ttm_tt_init_basic  ====================
[19:42:40] [PASSED] Page-aligned size
[19:42:40] [PASSED] Extra pages requested
[19:42:40] ================ [PASSED] ttm_tt_init_basic ================
[19:42:40] [PASSED] ttm_tt_init_misaligned
[19:42:40] [PASSED] ttm_tt_fini_basic
[19:42:40] [PASSED] ttm_tt_fini_sg
[19:42:40] [PASSED] ttm_tt_fini_shmem
[19:42:40] [PASSED] ttm_tt_create_basic
[19:42:40] [PASSED] ttm_tt_create_invalid_bo_type
[19:42:40] [PASSED] ttm_tt_create_ttm_exists
[19:42:40] [PASSED] ttm_tt_create_failed
[19:42:40] [PASSED] ttm_tt_destroy_basic
[19:42:40] [PASSED] ttm_tt_populate_null_ttm
[19:42:40] [PASSED] ttm_tt_populate_populated_ttm
[19:42:40] [PASSED] ttm_tt_unpopulate_basic
[19:42:40] [PASSED] ttm_tt_unpopulate_empty_ttm
[19:42:40] [PASSED] ttm_tt_swapin_basic
[19:42:40] ===================== [PASSED] ttm_tt ======================
[19:42:40] =================== ttm_bo (14 subtests) ===================
[19:42:40] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[19:42:40] [PASSED] Cannot be interrupted and sleeps
[19:42:40] [PASSED] Cannot be interrupted, locks straight away
[19:42:40] [PASSED] Can be interrupted, sleeps
[19:42:40] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[19:42:40] [PASSED] ttm_bo_reserve_locked_no_sleep
[19:42:40] [PASSED] ttm_bo_reserve_no_wait_ticket
[19:42:40] [PASSED] ttm_bo_reserve_double_resv
[19:42:40] [PASSED] ttm_bo_reserve_interrupted
[19:42:40] [PASSED] ttm_bo_reserve_deadlock
[19:42:40] [PASSED] ttm_bo_unreserve_basic
[19:42:40] [PASSED] ttm_bo_unreserve_pinned
[19:42:40] [PASSED] ttm_bo_unreserve_bulk
[19:42:40] [PASSED] ttm_bo_fini_basic
[19:42:40] [PASSED] ttm_bo_fini_shared_resv
[19:42:40] [PASSED] ttm_bo_pin_basic
[19:42:40] [PASSED] ttm_bo_pin_unpin_resource
[19:42:40] [PASSED] ttm_bo_multiple_pin_one_unpin
[19:42:40] ===================== [PASSED] ttm_bo ======================
[19:42:40] ============== ttm_bo_validate (22 subtests) ===============
[19:42:40] ============== ttm_bo_init_reserved_sys_man  ===============
[19:42:40] [PASSED] Buffer object for userspace
[19:42:40] [PASSED] Kernel buffer object
[19:42:40] [PASSED] Shared buffer object
[19:42:40] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[19:42:40] ============== ttm_bo_init_reserved_mock_man  ==============
[19:42:40] [PASSED] Buffer object for userspace
[19:42:40] [PASSED] Kernel buffer object
[19:42:40] [PASSED] Shared buffer object
[19:42:40] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[19:42:40] [PASSED] ttm_bo_init_reserved_resv
[19:42:40] ================== ttm_bo_validate_basic  ==================
[19:42:40] [PASSED] Buffer object for userspace
[19:42:40] [PASSED] Kernel buffer object
[19:42:40] [PASSED] Shared buffer object
[19:42:40] ============== [PASSED] ttm_bo_validate_basic ==============
[19:42:40] [PASSED] ttm_bo_validate_invalid_placement
[19:42:40] ============= ttm_bo_validate_same_placement  ==============
[19:42:40] [PASSED] System manager
[19:42:40] [PASSED] VRAM manager
[19:42:40] ========= [PASSED] ttm_bo_validate_same_placement ==========
[19:42:40] [PASSED] ttm_bo_validate_failed_alloc
[19:42:40] [PASSED] ttm_bo_validate_pinned
[19:42:40] [PASSED] ttm_bo_validate_busy_placement
[19:42:40] ================ ttm_bo_validate_multihop  =================
[19:42:40] [PASSED] Buffer object for userspace
[19:42:40] [PASSED] Kernel buffer object
[19:42:40] [PASSED] Shared buffer object
[19:42:40] ============ [PASSED] ttm_bo_validate_multihop =============
[19:42:40] ========== ttm_bo_validate_no_placement_signaled  ==========
[19:42:40] [PASSED] Buffer object in system domain, no page vector
[19:42:40] [PASSED] Buffer object in system domain with an existing page vector
[19:42:40] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[19:42:40] ======== ttm_bo_validate_no_placement_not_signaled  ========
[19:42:40] [PASSED] Buffer object for userspace
[19:42:40] [PASSED] Kernel buffer object
[19:42:40] [PASSED] Shared buffer object
[19:42:40] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[19:42:40] [PASSED] ttm_bo_validate_move_fence_signaled
[19:42:40] ========= ttm_bo_validate_move_fence_not_signaled  =========
[19:42:40] [PASSED] Waits for GPU
[19:42:40] [PASSED] Tries to lock straight away
[19:42:40] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[19:42:40] [PASSED] ttm_bo_validate_swapout
[19:42:40] [PASSED] ttm_bo_validate_happy_evict
[19:42:40] [PASSED] ttm_bo_validate_all_pinned_evict
[19:42:40] [PASSED] ttm_bo_validate_allowed_only_evict
[19:42:40] [PASSED] ttm_bo_validate_deleted_evict
[19:42:40] [PASSED] ttm_bo_validate_busy_domain_evict
[19:42:40] [PASSED] ttm_bo_validate_evict_gutting
[19:42:40] [PASSED] ttm_bo_validate_recrusive_evict
[19:42:40] ================= [PASSED] ttm_bo_validate =================
[19:42:40] ============================================================
[19:42:40] Testing complete. Ran 102 tests: passed: 102
[19:42:40] Elapsed time: 12.630s total, 1.831s configuring, 10.533s building, 0.229s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ CI.checksparse: warning for drm/xe: add page size allocation mode control and coverage (rev6)

[Patchwork]

== Series Details ==

Series: drm/xe: add page size allocation mode control and coverage (rev6)
URL   : https://patchwork.freedesktop.org/series/168905/
State : warning

== Summary ==

+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 447a47cf86f97a1f5362d0675d65d129be27b004
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
+/kernel/Makefile:1280: C=1 specified, but sparse is not available or not up to date

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/xe: add page size allocation mode control and coverage (rev6)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 935 bytes --]

== Series Details ==

Series: drm/xe: add page size allocation mode control and coverage (rev6)
URL   : https://patchwork.freedesktop.org/series/168905/
State : success

== Summary ==

CI Bug Log - changes from xe-5461-64683393c9d48d6a596d4b13c2583c54b554b7d0_BAT -> xe-pw-168905v6_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * IGT: IGT_9019 -> IGT_9020
  * Linux: xe-5461-64683393c9d48d6a596d4b13c2583c54b554b7d0 -> xe-pw-168905v6

  IGT_9019: 9019
  IGT_9020: 9020
  xe-5461-64683393c9d48d6a596d4b13c2583c54b554b7d0: 64683393c9d48d6a596d4b13c2583c54b554b7d0
  xe-pw-168905v6: 168905v6

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/index.html

[-- Attachment #2: Type: text/html, Size: 1497 bytes --]

✓ Xe.CI.FULL: success for drm/xe: add page size allocation mode control and coverage (rev6)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 32030 bytes --]

== Series Details ==

Series: drm/xe: add page size allocation mode control and coverage (rev6)
URL   : https://patchwork.freedesktop.org/series/168905/
State : success

== Summary ==

CI Bug Log - changes from xe-5461-64683393c9d48d6a596d4b13c2583c54b554b7d0_FULL -> xe-pw-168905v6_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-168905v6_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-bmg:          NOTRUN -> [SKIP][1] ([Intel XE#2370])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_big_fb@linear-32bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][2] ([Intel XE#2327]) +5 other tests skip
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-2/igt@kms_big_fb@linear-32bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-180:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#1124]) +5 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-2/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html

  * igt@kms_bw@connected-linear-tiling-3-displays-target-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#7679])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-4/igt@kms_bw@connected-linear-tiling-3-displays-target-2160x1440p.html

  * igt@kms_bw@linear-tiling-1-displays-target-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#367])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-7/igt@kms_bw@linear-tiling-1-displays-target-2560x1440p.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#2887]) +10 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-1/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#2652]) +8 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#3432])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html
    - shard-lnl:          NOTRUN -> [SKIP][9] ([Intel XE#3432])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-lnl-7/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html

  * igt@kms_cdclk@mode-transition:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2724] / [Intel XE#7449])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-1/igt@kms_cdclk@mode-transition.html

  * igt@kms_chamelium_color@degamma:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#2325] / [Intel XE#7358])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-6/igt@kms_chamelium_color@degamma.html

  * igt@kms_chamelium_color_pipeline@plane-ctm3x4-lut1d:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#7358])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-3/igt@kms_chamelium_color_pipeline@plane-ctm3x4-lut1d.html

  * igt@kms_chamelium_frames@hdmi-aspect-ratio:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#2252]) +7 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-4/igt@kms_chamelium_frames@hdmi-aspect-ratio.html

  * igt@kms_chamelium_sharpness_filter@filter-basic:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#6507])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-7/igt@kms_chamelium_sharpness_filter@filter-basic.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#2390] / [Intel XE#6974])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-4/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@dp-mst-type-0-hdcp14:
    - shard-lnl:          NOTRUN -> [SKIP][16] ([Intel XE#6974])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-lnl-6/igt@kms_content_protection@dp-mst-type-0-hdcp14.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x10:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#2320]) +1 other test skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-2/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
    - shard-lnl:          NOTRUN -> [SKIP][18] ([Intel XE#309] / [Intel XE#7343])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2286] / [Intel XE#6035])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#4331] / [Intel XE#7227])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-6/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#8265])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-3/igt@kms_dsc@dsc-with-output-formats-with-bpc.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#4422] / [Intel XE#7442])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-2/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#4156] / [Intel XE#7425])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-4/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_feature_discovery@display-3x:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#2373] / [Intel XE#7448])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-1/igt@kms_feature_discovery@display-3x.html

  * igt@kms_flip@2x-flip-vs-expired-vblank@bd-dp2-hdmi-a3:
    - shard-bmg:          NOTRUN -> [FAIL][25] ([Intel XE#3321]) +1 other test fail
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-2/igt@kms_flip@2x-flip-vs-expired-vblank@bd-dp2-hdmi-a3.html

  * igt@kms_flip@flip-vs-expired-vblank@c-edp1:
    - shard-lnl:          [PASS][26] -> [FAIL][27] ([Intel XE#301] / [Intel XE#3149])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5461-64683393c9d48d6a596d4b13c2583c54b554b7d0/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-8/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-nv12-linear-to-nv12-linear-reflect-x:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#7179])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-2/igt@kms_flip_scaled_crc@flip-nv12-linear-to-nv12-linear-reflect-x.html

  * igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#2311]) +41 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#4141]) +10 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][32] ([Intel XE#656] / [Intel XE#7905])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbchdr-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#7399])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-2/igt@kms_frontbuffer_tracking@fbchdr-tiling-y.html

  * igt@kms_frontbuffer_tracking@hdr-abgr161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#7061])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-7/igt@kms_frontbuffer_tracking@hdr-abgr161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#7061] / [Intel XE#7356]) +6 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-shrfb-plflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#2313]) +46 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-5/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-spr-indfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][37] ([Intel XE#7905])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-lnl-1/igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#1503])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-5/igt@kms_hdr@invalid-hdr.html

  * igt@kms_mst@mst-suspend-read-crc:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#8348])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-7/igt@kms_mst@mst-suspend-read-crc.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#7283]) +1 other test skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-7/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#8303]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-1/igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5.html

  * igt@kms_pm_backlight@brightness-with-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#2938] / [Intel XE#7376] / [Intel XE#7760])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-6/igt@kms_pm_backlight@brightness-with-dpms.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-8/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf:
    - shard-lnl:          NOTRUN -> [SKIP][44] ([Intel XE#2893] / [Intel XE#7304])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-lnl-7/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#1489]) +4 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-7/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#2387] / [Intel XE#7429])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-2/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr@fbc-psr2-cursor-plane-move:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#2234] / [Intel XE#2850]) +5 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-3/igt@kms_psr@fbc-psr2-cursor-plane-move.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#2330] / [Intel XE#5813])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-8/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@sprite-rotation-90:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#3904] / [Intel XE#7342]) +2 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-8/igt@kms_rotation_crc@sprite-rotation-90.html

  * igt@kms_sharpness_filter@filter-tap:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#6503])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-1/igt@kms_sharpness_filter@filter-tap.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#2426] / [Intel XE#5848])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_vrr@max-min:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#1499])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-6/igt@kms_vrr@max-min.html

  * igt@xe_compute@ccs-mode-basic:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#6599])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-2/igt@xe_compute@ccs-mode-basic.html
    - shard-lnl:          NOTRUN -> [SKIP][54] ([Intel XE#1447] / [Intel XE#7471])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-lnl-4/igt@xe_compute@ccs-mode-basic.html

  * igt@xe_evict@evict-cm-threads-small-multi-queue:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#8370]) +1 other test skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-5/igt@xe_evict@evict-cm-threads-small-multi-queue.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][56] ([Intel XE#1392])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-lnl-6/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html

  * igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#2322] / [Intel XE#7372]) +9 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-7/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate.html

  * igt@xe_exec_fault_mode@many-multi-queue-rebind-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#8374]) +7 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-5/igt@xe_exec_fault_mode@many-multi-queue-rebind-prefetch.html

  * igt@xe_exec_multi_queue@few-execs-preempt-mode-priority:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#8364]) +24 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-3/igt@xe_exec_multi_queue@few-execs-preempt-mode-priority.html

  * igt@xe_exec_multi_queue@many-queues-preempt-mode-basic-smem:
    - shard-lnl:          NOTRUN -> [SKIP][60] ([Intel XE#8364]) +3 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-lnl-7/igt@xe_exec_multi_queue@many-queues-preempt-mode-basic-smem.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#8378]) +4 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-3/igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind.html
    - shard-lnl:          NOTRUN -> [SKIP][62] ([Intel XE#8378]) +1 other test skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-lnl-8/igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind.html

  * igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early:
    - shard-bmg:          [PASS][63] -> [ABORT][64] ([Intel XE#8007]) +1 other test abort
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5461-64683393c9d48d6a596d4b13c2583c54b554b7d0/shard-bmg-4/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-9/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html

  * igt@xe_gpgpu_fill@offset-4x4:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#7954])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-6/igt@xe_gpgpu_fill@offset-4x4.html

  * igt@xe_multigpu_svm@mgpu-atomic-op-basic:
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#6964]) +3 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-5/igt@xe_multigpu_svm@mgpu-atomic-op-basic.html

  * igt@xe_oa@oa-tlb-invalidate:
    - shard-lnl:          NOTRUN -> [SKIP][67] ([Intel XE#2248] / [Intel XE#7325] / [Intel XE#7393])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-lnl-1/igt@xe_oa@oa-tlb-invalidate.html
    - shard-bmg:          NOTRUN -> [SKIP][68] ([Intel XE#2248] / [Intel XE#7325] / [Intel XE#7393])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-4/igt@xe_oa@oa-tlb-invalidate.html

  * igt@xe_page_reclaim@many-vma-same-bo:
    - shard-bmg:          NOTRUN -> [SKIP][69] ([Intel XE#7793])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-8/igt@xe_page_reclaim@many-vma-same-bo.html

  * igt@xe_pat@pat-sw-hw-compare:
    - shard-bmg:          NOTRUN -> [FAIL][70] ([Intel XE#7695])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-6/igt@xe_pat@pat-sw-hw-compare.html

  * igt@xe_pmu@all-fn-engine-activity-load@engine-drm_xe_engine_class_video_enhance1:
    - shard-bmg:          [PASS][71] -> [ABORT][72] ([Intel XE#8637]) +1 other test abort
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5461-64683393c9d48d6a596d4b13c2583c54b554b7d0/shard-bmg-4/igt@xe_pmu@all-fn-engine-activity-load@engine-drm_xe_engine_class_video_enhance1.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-5/igt@xe_pmu@all-fn-engine-activity-load@engine-drm_xe_engine_class_video_enhance1.html

  * igt@xe_prefetch_fault@prefetch-fault-svm:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#7599])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-2/igt@xe_prefetch_fault@prefetch-fault-svm.html

  * igt@xe_pxp@regular-src-to-pxp-dest-rendercopy:
    - shard-bmg:          NOTRUN -> [SKIP][74] ([Intel XE#4733] / [Intel XE#7417]) +1 other test skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-7/igt@xe_pxp@regular-src-to-pxp-dest-rendercopy.html

  * igt@xe_query@multigpu-query-invalid-cs-cycles:
    - shard-bmg:          NOTRUN -> [SKIP][75] ([Intel XE#944]) +2 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-2/igt@xe_query@multigpu-query-invalid-cs-cycles.html

  * igt@xe_sriov_admin@sched-priority-vf-write-denied:
    - shard-lnl:          NOTRUN -> [SKIP][76] ([Intel XE#7174])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-lnl-6/igt@xe_sriov_admin@sched-priority-vf-write-denied.html

  * igt@xe_sriov_auto_provisioning@exclusive-ranges@numvfs-random:
    - shard-bmg:          [PASS][77] -> [FAIL][78] ([Intel XE#7992]) +1 other test fail
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5461-64683393c9d48d6a596d4b13c2583c54b554b7d0/shard-bmg-4/igt@xe_sriov_auto_provisioning@exclusive-ranges@numvfs-random.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-1/igt@xe_sriov_auto_provisioning@exclusive-ranges@numvfs-random.html

  
#### Possible fixes ####

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-bmg:          [FAIL][79] ([Intel XE#3718] / [Intel XE#6078]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5461-64683393c9d48d6a596d4b13c2583c54b554b7d0/shard-bmg-10/igt@kms_async_flips@alternate-sync-async-flip.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-2/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-3:
    - shard-bmg:          [FAIL][81] ([Intel XE#6078]) -> [PASS][82]
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5461-64683393c9d48d6a596d4b13c2583c54b554b7d0/shard-bmg-10/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-3.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-2/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-3.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-lnl:          [FAIL][83] ([Intel XE#8399]) -> [PASS][84] +1 other test pass
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5461-64683393c9d48d6a596d4b13c2583c54b554b7d0/shard-lnl-4/igt@kms_pm_dc@dc6-dpms.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-lnl-3/igt@kms_pm_dc@dc6-dpms.html

  * igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ads_init:
    - shard-bmg:          [ABORT][85] ([Intel XE#8007]) -> [PASS][86] +1 other test pass
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5461-64683393c9d48d6a596d4b13c2583c54b554b7d0/shard-bmg-2/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ads_init.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-2/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ads_init.html

  * igt@xe_pat@pt-caching:
    - shard-bmg:          [ABORT][87] ([Intel XE#7893]) -> [PASS][88]
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5461-64683393c9d48d6a596d4b13c2583c54b554b7d0/shard-bmg-1/igt@xe_pat@pt-caching.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-2/igt@xe_pat@pt-caching.html

  
#### Warnings ####

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-lnl:          [FAIL][89] ([Intel XE#301]) -> [FAIL][90] ([Intel XE#301] / [Intel XE#3149])
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5461-64683393c9d48d6a596d4b13c2583c54b554b7d0/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][91] ([Intel XE#3544]) -> [SKIP][92] ([Intel XE#3374] / [Intel XE#3544])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5461-64683393c9d48d6a596d4b13c2583c54b554b7d0/shard-bmg-5/igt@kms_hdr@brightness-with-hdr.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1447
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
  [Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
  [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
  [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6507]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6507
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7174]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7174
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
  [Intel XE#7227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7227
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7325
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
  [Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
  [Intel XE#7393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7393
  [Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7425
  [Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
  [Intel XE#7442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7442
  [Intel XE#7448]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7448
  [Intel XE#7449]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7449
  [Intel XE#7471]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7471
  [Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7695]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7695
  [Intel XE#7760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7760
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7893
  [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
  [Intel XE#7954]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7954
  [Intel XE#7992]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7992
  [Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8303]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8303
  [Intel XE#8348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8348
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8399
  [Intel XE#8637]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8637
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * IGT: IGT_9019 -> IGT_9020
  * Linux: xe-5461-64683393c9d48d6a596d4b13c2583c54b554b7d0 -> xe-pw-168905v6

  IGT_9019: 9019
  IGT_9020: 9020
  xe-5461-64683393c9d48d6a596d4b13c2583c54b554b7d0: 64683393c9d48d6a596d4b13c2583c54b554b7d0
  xe-pw-168905v6: 168905v6

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168905v6/index.html

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