From: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org, uma.shankar@intel.com,
ankit.k.nautiyal@intel.com, chaitanya.kumar.borah@intel.com
Subject: [PATCH v8 01/10] drm/i915/psr: Do not enable PSR2 when CMRR is enabled
Date: Thu, 30 Jul 2026 16:29:08 +0530 [thread overview]
Message-ID: <20260730105919.3913412-2-mitulkumar.ajitkumar.golani@intel.com> (raw)
In-Reply-To: <20260730105919.3913412-1-mitulkumar.ajitkumar.golani@intel.com>
CMRR is mutually exclusive to PSR2, do not enable PSR2 when CMRR is
enabled.
--v2:
- Restrict selective update config check (Ankit)
- Commit message change
--v3:
- Commit changes
--v4:
- Add check to psr2_config_valid (Jouni)
--v5:
- Correct debug message
--v6:
- Commit message update
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 40e3d7095996..410778e73a2d 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1491,6 +1491,12 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
int crtc_vdisplay = crtc_state->hw.adjusted_mode.crtc_vdisplay;
int psr_max_h = 0, psr_max_v = 0, max_bpp = 0;
+ if (crtc_state->cmrr.enable) {
+ drm_dbg_kms(display->drm,
+ "PSR2 cannot be enabled when CMRR is enabled\n");
+ return false;
+ }
+
if (!connector->dp.psr_caps.su_support || display->params.enable_psr == 1)
return false;
--
2.48.1
next prev parent reply other threads:[~2026-07-30 11:09 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-30 10:59 [PATCH v8 00/10] Enable CMRR in fixed-RR VRR path Mitul Golani
2026-07-30 10:59 ` Mitul Golani [this message]
2026-07-30 10:59 ` [PATCH v8 02/10] drm/i915/vrr: Restrict CMRR enable condition to VRR-TG-default platforms Mitul Golani
2026-07-30 10:59 ` [PATCH v8 03/10] drm/i915/vrr: Add per-CRTC vrr/cmrr debugfs control Mitul Golani
2026-07-30 10:59 ` [PATCH v8 04/10] drm/i915/vrr: Update AS_SDP target_rr_divider based on CMRR config request Mitul Golani
2026-07-30 10:59 ` [PATCH v8 05/10] drm/i915/display: Move CMRR crtc_state members under VRR Mitul Golani
2026-07-30 10:59 ` [PATCH v8 06/10] drm/i915/vrr: Compute CMRR fractional timings generically Mitul Golani
2026-07-30 10:59 ` [PATCH v8 07/10] drm/i915/vrr: Latch CMRR ratio via atomic commit on debugfs write Mitul Golani
2026-07-31 9:43 ` Borah, Chaitanya Kumar
2026-07-30 10:59 ` [PATCH v8 08/10] drm/i915/vrr: Program CMRR enable/disable from transcoder timings Mitul Golani
2026-07-30 10:59 ` [PATCH v8 09/10] drm/i915/vrr: Dump CMRR state in the crtc state dump Mitul Golani
2026-07-30 10:59 ` [PATCH v8 10/10] drm/i915/vrr: Enable cmrr Mitul Golani
2026-07-31 9:45 ` Borah, Chaitanya Kumar
2026-07-30 11:58 ` ✓ CI.KUnit: success for Enable CMRR in fixed-RR VRR path (rev8) Patchwork
2026-07-30 12:45 ` ✓ Xe.CI.BAT: " Patchwork
2026-07-30 15:22 ` ✓ Xe.CI.FULL: " Patchwork
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