* [PATCH 0/2] Support YUV buffers in HDR planes
@ 2026-08-12 8:59 Chaitanya Kumar Borah
2026-08-12 8:59 ` [PATCH 1/2] [DO_NOT_REVIEW] drm/i915/color: Add color pipeline support for SDR planes Chaitanya Kumar Borah
` (4 more replies)
0 siblings, 5 replies; 8+ messages in thread
From: Chaitanya Kumar Borah @ 2026-08-12 8:59 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: Chaitanya Kumar Borah
The legacy COLOR ENCODING and COLOR RANGE properties are mutually exclusive
for HDR planes. Add support for FIXED MATRIX colorops in HDR plane color
pipeline that can be used for YCbCr to RGB conversion.
The first patch contains the base work done for SDR planes and is being
reviewed separately.
Chaitanya Kumar Borah (2):
[DO_NOT_REVIEW] drm/i915/color: Add color pipeline support for SDR
planes
drm/i915/color: Add YUV buffer support on HDR planes
drivers/gpu/drm/drm_atomic.c | 4 +
drivers/gpu/drm/drm_atomic_uapi.c | 7 +
drivers/gpu/drm/drm_colorop.c | 107 +++++++++++++++
drivers/gpu/drm/i915/display/intel_color.c | 76 ++++++++---
.../drm/i915/display/intel_color_pipeline.c | 32 ++++-
.../drm/i915/display/intel_display_limits.h | 1 +
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_plane.c | 53 +++++++-
.../drm/i915/display/skl_universal_plane.c | 45 ++++---
include/drm/drm_colorop.h | 127 ++++++++++++++++++
include/uapi/drm/drm_mode.h | 12 ++
11 files changed, 424 insertions(+), 41 deletions(-)
--
2.50.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/2] [DO_NOT_REVIEW] drm/i915/color: Add color pipeline support for SDR planes
2026-08-12 8:59 [PATCH 0/2] Support YUV buffers in HDR planes Chaitanya Kumar Borah
@ 2026-08-12 8:59 ` Chaitanya Kumar Borah
2026-08-12 9:56 ` sashiko-bot
2026-08-12 8:59 ` [PATCH 2/2] drm/i915/color: Add YUV buffer support on HDR planes Chaitanya Kumar Borah
` (3 subsequent siblings)
4 siblings, 1 reply; 8+ messages in thread
From: Chaitanya Kumar Borah @ 2026-08-12 8:59 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: Chaitanya Kumar Borah
This patch is a squashed version of series [1]
https://lore.kernel.org/intel-gfx/20260804123107.2256124-1-chaitanya.kumar.borah@intel.com/
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
drivers/gpu/drm/drm_atomic.c | 4 +
drivers/gpu/drm/drm_atomic_uapi.c | 7 +
drivers/gpu/drm/drm_colorop.c | 107 +++++++++++++++
drivers/gpu/drm/i915/display/intel_color.c | 76 ++++++++---
.../drm/i915/display/intel_color_pipeline.c | 30 ++++-
.../drm/i915/display/intel_display_limits.h | 1 +
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_plane.c | 53 +++++++-
.../drm/i915/display/skl_universal_plane.c | 42 +++---
include/drm/drm_colorop.h | 127 ++++++++++++++++++
include/uapi/drm/drm_mode.h | 12 ++
11 files changed, 420 insertions(+), 40 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index e5c8ef06caed..45df6376f408 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -925,6 +925,10 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p,
drm_get_colorop_lut3d_interpolation_name(state->lut3d_interpolation));
drm_printf_indent(p, 1, "data blob id=%d\n", state->data ? state->data->base.id : 0);
break;
+ case DRM_COLOROP_FIXED_MATRIX:
+ drm_printf_indent(p, 1, "fixed_matrix_type=%s\n",
+ drm_get_colorop_fixed_matrix_type_name(state->fixed_matrix_type));
+ break;
default:
break;
}
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index 1050dddadb17..d52504d823bc 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -786,6 +786,11 @@ static int drm_atomic_colorop_set_property(struct drm_colorop *colorop,
return drm_atomic_color_set_data_property(colorop, state,
property, val,
replaced);
+ } else if (property == colorop->fixed_matrix_type_property) {
+ if (state->fixed_matrix_type != val) {
+ state->fixed_matrix_type = val;
+ *replaced = true;
+ }
} else {
drm_dbg_atomic(colorop->dev,
"[COLOROP:%d:%d] unknown property [PROP:%d:%s]\n",
@@ -818,6 +823,8 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop,
*val = state->lut3d_interpolation;
else if (property == colorop->data_property)
*val = (state->data) ? state->data->base.id : 0;
+ else if (property == colorop->fixed_matrix_type_property)
+ *val = state->fixed_matrix_type;
else
return -EINVAL;
diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
index 682fcc651525..95da03d6c65c 100644
--- a/drivers/gpu/drm/drm_colorop.c
+++ b/drivers/gpu/drm/drm_colorop.c
@@ -68,6 +68,7 @@ static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = {
{ DRM_COLOROP_CTM_3X4, "3x4 Matrix"},
{ DRM_COLOROP_MULTIPLIER, "Multiplier"},
{ DRM_COLOROP_3D_LUT, "3D LUT"},
+ { DRM_COLOROP_FIXED_MATRIX, "Fixed Matrix"},
};
static const char * const colorop_curve_1d_type_names[] = {
@@ -90,6 +91,15 @@ static const struct drm_prop_enum_list drm_colorop_lut3d_interpolation_list[] =
{ DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL, "Tetrahedral" },
};
+static const char * const colorop_fixed_matrix_type_names[] = {
+ [DRM_COLOROP_FM_YCBCR601_FULL_RGB] = "YCbCr 601 Full to RGB",
+ [DRM_COLOROP_FM_YCBCR601_LIMITED_RGB] = "YCbCr 601 Limited to RGB",
+ [DRM_COLOROP_FM_YCBCR709_FULL_RGB] = "YCbCr 709 Full to RGB",
+ [DRM_COLOROP_FM_YCBCR709_LIMITED_RGB] = "YCbCr 709 Limited to RGB",
+ [DRM_COLOROP_FM_YCBCR2020_NC_FULL_RGB] = "YCbCr 2020 NC Full to RGB",
+ [DRM_COLOROP_FM_YCBCR2020_NC_LIMITED_RGB] = "YCbCr 2020 NC Limited to RGB",
+};
+
/* Init Helpers */
static int drm_plane_colorop_init(struct drm_device *dev, struct drm_colorop *colorop,
@@ -453,6 +463,80 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
}
EXPORT_SYMBOL(drm_plane_colorop_3dlut_init);
+/**
+ * drm_plane_colorop_fixed_matrix_init - Initialize a DRM_COLOROP_FIXED_MATRIX
+ *
+ * @dev: DRM device
+ * @colorop: The drm_colorop object to initialize
+ * @plane: The associated drm_plane
+ * @funcs: control functions for the new colorop
+ * @supported_fm: A bitfield of supported drm_colorop_fixed_matrix_type enum values,
+ * created using BIT(fixed_matrix_type) and combined with the OR '|'
+ * operator.
+ * @flags: bitmask of misc, see DRM_COLOROP_FLAG_* defines.
+ * @return zero on success, -E value on failure
+ */
+int drm_plane_colorop_fixed_matrix_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane,
+ const struct drm_colorop_funcs *funcs,
+ u64 supported_fm, uint32_t flags)
+{
+ struct drm_prop_enum_list enum_list[DRM_COLOROP_FM_COUNT];
+ int i, len;
+ struct drm_property *prop;
+ int ret;
+
+ if (!supported_fm) {
+ drm_err(dev,
+ "No supported FM type op for new Fixed Matrix colorop on [PLANE:%d:%s]\n",
+ plane->base.id, plane->name);
+ return -EINVAL;
+ }
+
+ if ((supported_fm & -BIT(DRM_COLOROP_FM_COUNT)) != 0) {
+ drm_err(dev, "Unknown Fixed Matrix provided on [PLANE:%d:%s]\n",
+ plane->base.id, plane->name);
+ return -EINVAL;
+ }
+
+ ret = drm_plane_colorop_init(dev, colorop, plane, funcs, DRM_COLOROP_FIXED_MATRIX, flags);
+ if (ret)
+ return ret;
+
+ len = 0;
+ for (i = 0; i < DRM_COLOROP_FM_COUNT; i++) {
+ if ((supported_fm & BIT(i)) == 0)
+ continue;
+
+ enum_list[len].type = i;
+ enum_list[len].name = colorop_fixed_matrix_type_names[i];
+ len++;
+ }
+
+ if (WARN_ON(len <= 0))
+ return -EINVAL;
+
+ prop = drm_property_create_enum(dev, DRM_MODE_PROP_ATOMIC, "FIXED_MATRIX_TYPE",
+ enum_list, len);
+
+ if (!prop)
+ return -ENOMEM;
+
+ colorop->fixed_matrix_type_property = prop;
+ /*
+ * Default to the first supported CSC mode as provided by the driver.
+ * Intuitively this should be something that keeps the colorop in pixel bypass
+ * mode but that is already handled via the standard colorop bypass
+ * property.
+ */
+ drm_object_attach_property(&colorop->base, colorop->fixed_matrix_type_property,
+ enum_list[0].type);
+ drm_colorop_reset(colorop);
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_plane_colorop_fixed_matrix_init);
+
static void __drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop,
struct drm_colorop_state *state)
{
@@ -533,6 +617,13 @@ static void __drm_colorop_state_init(struct drm_colorop_state *colorop_state,
&val))
colorop_state->lut3d_interpolation = val;
}
+
+ if (colorop->fixed_matrix_type_property) {
+ if (!drm_object_property_get_default_value(&colorop->base,
+ colorop->fixed_matrix_type_property,
+ &val))
+ colorop_state->fixed_matrix_type = val;
+ }
}
/**
@@ -596,6 +687,7 @@ static const char * const colorop_type_name[] = {
[DRM_COLOROP_CTM_3X4] = "3x4 Matrix",
[DRM_COLOROP_MULTIPLIER] = "Multiplier",
[DRM_COLOROP_3D_LUT] = "3D LUT",
+ [DRM_COLOROP_FIXED_MATRIX] = "Fixed Matrix",
};
static const char * const colorop_lu3d_interpolation_name[] = {
@@ -652,6 +744,21 @@ const char *drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_inte
return colorop_lu3d_interpolation_name[type];
}
+/**
+ * drm_get_colorop_fixed_matrix_type_name: return a string for fixed matrix type
+ * @type: fixed matrix type to compute name of
+ *
+ * In contrast to the other drm_get_*_name functions this one here returns a
+ * const pointer and hence is threadsafe.
+ */
+const char *drm_get_colorop_fixed_matrix_type_name(enum drm_colorop_fixed_matrix_type type)
+{
+ if (WARN_ON(type >= ARRAY_SIZE(colorop_fixed_matrix_type_names)))
+ return "unknown";
+
+ return colorop_fixed_matrix_type_names[type];
+}
+
/**
* drm_colorop_set_next_property - sets the next pointer
* @colorop: drm colorop
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 87ced9f6ff40..f1df0f9ba762 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -3998,25 +3998,17 @@ xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
}
static void
-xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
- const struct intel_plane_state *plane_state)
+xelpd_load_hdr_post_csc_lut(struct intel_display *display,
+ struct intel_dsb *dsb,
+ enum pipe pipe,
+ enum plane_id plane,
+ const struct drm_color_lut32 *post_csc_lut)
{
- struct intel_display *display = to_intel_display(plane_state);
- const struct drm_plane_state *state = &plane_state->uapi;
- enum pipe pipe = to_intel_plane(state->plane)->pipe;
- enum plane_id plane = to_intel_plane(state->plane)->id;
- const struct drm_color_lut32 *post_csc_lut = plane_state->hw.gamma_lut->data;
int i, lut_size = 32;
u32 lut_val;
- if (!icl_is_hdr_plane(display, plane))
- return;
-
intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0),
PLANE_PAL_PREC_AUTO_INCREMENT);
- /* TODO: Add macro */
- intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, 0),
- PLANE_PAL_PREC_AUTO_INCREMENT);
for (i = 0; i < lut_size + 3; i++) {
if (post_csc_lut) {
@@ -4036,8 +4028,62 @@ xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
}
intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);
- intel_de_write_dsb(display, dsb,
- PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, 0), 0);
+}
+
+static void
+xelpd_load_sdr_post_csc_lut(struct intel_display *display,
+ struct intel_dsb *dsb,
+ enum pipe pipe,
+ enum plane_id plane,
+ const struct drm_color_lut32 *post_csc_lut)
+{
+ int i, lut_size = 32;
+ u32 lut_val;
+
+ /*
+ * First 3 planes are HDR, so reduce by 3 to get to the right
+ * SDR plane offset
+ */
+ plane = plane - 3;
+
+ intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX(pipe, plane, 0),
+ PLANE_PAL_PREC_AUTO_INCREMENT);
+
+ for (i = 0; i < lut_size + 3; i++) {
+ if (post_csc_lut) {
+ if (i < lut_size)
+ lut_val = drm_color_lut32_extract(post_csc_lut[i].green, 16);
+ /* else duplicate last lut_val */
+ } else {
+ if (i < lut_size)
+ lut_val = (i * ((1 << 16) - 1)) / (lut_size - 1);
+ else
+ lut_val = 1 << 16;
+ }
+
+ intel_de_write_dsb(display, dsb,
+ PLANE_POST_CSC_GAMC_DATA(pipe, plane, 0),
+ lut_val);
+ }
+
+ intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX(pipe, plane, 0), 0);
+}
+
+static void
+xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
+ const struct intel_plane_state *plane_state)
+{
+ struct intel_display *display = to_intel_display(plane_state);
+ const struct drm_plane_state *state = &plane_state->uapi;
+ enum pipe pipe = to_intel_plane(state->plane)->pipe;
+ enum plane_id plane = to_intel_plane(state->plane)->id;
+ const struct drm_color_lut32 *post_csc_lut = plane_state->hw.gamma_lut ?
+ plane_state->hw.gamma_lut->data : NULL;
+
+ if (icl_is_hdr_plane(display, plane))
+ xelpd_load_hdr_post_csc_lut(display, dsb, pipe, plane, post_csc_lut);
+ else
+ xelpd_load_sdr_post_csc_lut(display, dsb, pipe, plane, post_csc_lut);
}
static void
diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
index 6cf8080ee800..38cfd6ed585d 100644
--- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
+++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
@@ -43,6 +43,19 @@ static const enum intel_color_block hdr_plane_pipeline[] = {
INTEL_PLANE_CB_POST_CSC_LUT,
};
+static const enum intel_color_block sdr_plane_yuv_pipeline[] = {
+ INTEL_PLANE_CB_CSC_FF,
+ INTEL_PLANE_CB_POST_CSC_LUT,
+};
+
+static const u64 intel_plane_supported_csc_ff =
+ BIT(DRM_COLOROP_FM_YCBCR601_FULL_RGB) |
+ BIT(DRM_COLOROP_FM_YCBCR601_LIMITED_RGB) |
+ BIT(DRM_COLOROP_FM_YCBCR709_FULL_RGB) |
+ BIT(DRM_COLOROP_FM_YCBCR709_LIMITED_RGB) |
+ BIT(DRM_COLOROP_FM_YCBCR2020_NC_FULL_RGB) |
+ BIT(DRM_COLOROP_FM_YCBCR2020_NC_LIMITED_RGB);
+
static bool plane_has_3dlut(struct intel_display *display, enum pipe pipe,
struct drm_plane *plane)
{
@@ -92,6 +105,12 @@ struct intel_colorop *intel_color_pipeline_plane_add_colorop(struct drm_plane *p
DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
DRM_COLOROP_FLAG_ALLOW_BYPASS);
break;
+ case INTEL_PLANE_CB_CSC_FF:
+ ret = drm_plane_colorop_fixed_matrix_init(dev, &colorop->base, plane,
+ &intel_colorop_funcs,
+ intel_plane_supported_csc_ff,
+ DRM_COLOROP_FLAG_ALLOW_BYPASS);
+ break;
default:
drm_err(plane->dev, "Invalid colorop id [%d]", id);
ret = -EINVAL;
@@ -126,9 +145,12 @@ int _intel_color_pipeline_plane_init(struct drm_plane *plane, struct drm_prop_en
if (plane_has_3dlut(display, pipe, plane)) {
pipeline = xe3plpd_primary_plane_pipeline;
pipeline_len = ARRAY_SIZE(xe3plpd_primary_plane_pipeline);
- } else {
+ } else if (icl_is_hdr_plane(display, to_intel_plane(plane)->id)) {
pipeline = hdr_plane_pipeline;
pipeline_len = ARRAY_SIZE(hdr_plane_pipeline);
+ } else {
+ pipeline = sdr_plane_yuv_pipeline;
+ pipeline_len = ARRAY_SIZE(sdr_plane_yuv_pipeline);
}
for (i = 0; i < pipeline_len; i++) {
@@ -155,17 +177,11 @@ int _intel_color_pipeline_plane_init(struct drm_plane *plane, struct drm_prop_en
int intel_color_pipeline_plane_init(struct drm_plane *plane, enum pipe pipe)
{
- struct drm_device *dev = plane->dev;
- struct intel_display *display = to_intel_display(dev);
struct drm_prop_enum_list pipelines[MAX_COLOR_PIPELINES] = {};
int len = 0;
int ret = 0;
int i;
- /* Currently expose pipeline only for HDR planes */
- if (!icl_is_hdr_plane(display, to_intel_plane(plane)->id))
- return 0;
-
/* Add pipeline consisting of transfer functions */
ret = _intel_color_pipeline_plane_init(plane, &pipelines[len], pipe);
if (ret)
diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.h b/drivers/gpu/drm/i915/display/intel_display_limits.h
index ea89473c177f..7ba7360c574e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_limits.h
+++ b/drivers/gpu/drm/i915/display/intel_display_limits.h
@@ -169,6 +169,7 @@ enum aux_ch {
enum intel_color_block {
INTEL_PLANE_CB_PRE_CSC_LUT,
INTEL_PLANE_CB_CSC,
+ INTEL_PLANE_CB_CSC_FF,
INTEL_PLANE_CB_POST_CSC_LUT,
INTEL_PLANE_CB_3DLUT,
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 20a07ea06b5e..beb0169cabef 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -683,6 +683,7 @@ struct intel_plane_state {
enum drm_color_range color_range;
enum drm_scaling_filter scaling_filter;
struct drm_property_blob *ctm, *degamma_lut, *gamma_lut, *lut_3d;
+ bool csc_ff_enable;
} hw;
struct i915_vma *ggtt_vma;
diff --git a/drivers/gpu/drm/i915/display/intel_plane.c b/drivers/gpu/drm/i915/display/intel_plane.c
index d0f99a87c42e..25ca049009ef 100644
--- a/drivers/gpu/drm/i915/display/intel_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_plane.c
@@ -462,6 +462,42 @@ intel_plane_colorop_replace_blob(struct intel_plane_state *plane_state,
return false;
}
+static u32
+fixedmatrix_colorop_to_encoding(enum drm_colorop_fixed_matrix_type fm_type)
+{
+ switch (fm_type) {
+ case DRM_COLOROP_FM_YCBCR709_FULL_RGB:
+ case DRM_COLOROP_FM_YCBCR709_LIMITED_RGB:
+ return DRM_COLOR_YCBCR_BT709;
+
+ case DRM_COLOROP_FM_YCBCR2020_NC_FULL_RGB:
+ case DRM_COLOROP_FM_YCBCR2020_NC_LIMITED_RGB:
+ return DRM_COLOR_YCBCR_BT2020;
+
+ case DRM_COLOROP_FM_YCBCR601_FULL_RGB:
+ case DRM_COLOROP_FM_YCBCR601_LIMITED_RGB:
+ default:
+ return DRM_COLOR_YCBCR_BT601;
+ }
+}
+
+static u32
+fixedmatrix_colorop_to_range(enum drm_colorop_fixed_matrix_type fm_type)
+{
+ switch (fm_type) {
+ case DRM_COLOROP_FM_YCBCR601_FULL_RGB:
+ case DRM_COLOROP_FM_YCBCR709_FULL_RGB:
+ case DRM_COLOROP_FM_YCBCR2020_NC_FULL_RGB:
+ return DRM_COLOR_YCBCR_FULL_RANGE;
+
+ case DRM_COLOROP_FM_YCBCR601_LIMITED_RGB:
+ case DRM_COLOROP_FM_YCBCR709_LIMITED_RGB:
+ case DRM_COLOROP_FM_YCBCR2020_NC_LIMITED_RGB:
+ default:
+ return DRM_COLOR_YCBCR_LIMITED_RANGE;
+ }
+}
+
static void
intel_plane_color_copy_uapi_to_hw_state(struct intel_atomic_state *state,
struct intel_plane_state *plane_state,
@@ -474,6 +510,7 @@ intel_plane_color_copy_uapi_to_hw_state(struct intel_atomic_state *state,
struct drm_property_blob *blob;
struct intel_crtc_state *new_crtc_state = state ?
intel_atomic_get_new_crtc_state(state, crtc) : NULL;
+ enum drm_colorop_fixed_matrix_type fm_type;
bool changed = false;
int i = 0;
@@ -485,11 +522,23 @@ intel_plane_color_copy_uapi_to_hw_state(struct intel_atomic_state *state,
while (iter_colorop) {
for_each_new_colorop_in_state(&state->base, colorop, new_colorop_state, i) {
if (new_colorop_state->colorop == iter_colorop) {
- blob = new_colorop_state->bypass ? NULL : new_colorop_state->data;
intel_colorop = to_intel_colorop(colorop);
- changed |= intel_plane_colorop_replace_blob(plane_state,
+ if (intel_colorop->id == INTEL_PLANE_CB_CSC_FF) {
+ fm_type = new_colorop_state->fixed_matrix_type;
+
+ plane_state->hw.csc_ff_enable =
+ !new_colorop_state->bypass;
+ plane_state->hw.color_encoding =
+ fixedmatrix_colorop_to_encoding(fm_type);
+ plane_state->hw.color_range =
+ fixedmatrix_colorop_to_range(fm_type);
+ } else {
+ blob = new_colorop_state->bypass ?
+ NULL : new_colorop_state->data;
+ changed |= intel_plane_colorop_replace_blob(plane_state,
intel_colorop,
blob);
+ }
}
}
iter_colorop = iter_colorop->next;
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 07a683293352..222c3b6bbe46 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1240,37 +1240,47 @@ static u32 glk_plane_color_ctl_crtc(const struct intel_crtc_state *crtc_state)
return plane_color_ctl;
}
-static u32 glk_plane_color_ctl(const struct intel_plane_state *plane_state)
+static u32 glk_plane_color_ctl_input_csc(const struct intel_plane_state *plane_state)
{
struct intel_display *display = to_intel_display(plane_state);
const struct drm_framebuffer *fb = plane_state->hw.fb;
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- u32 plane_color_ctl = 0;
+ bool color_pipeline = !!plane_state->uapi.color_pipeline;
+ bool needs_csc = color_pipeline ? plane_state->hw.csc_ff_enable : fb->format->is_yuv;
+ u32 ctl = 0;
- plane_color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE;
- plane_color_ctl |= glk_plane_color_ctl_alpha(plane_state);
+ if (!needs_csc)
+ return 0;
- if (fb->format->is_yuv && !icl_is_hdr_plane(display, plane->id)) {
+ if (!icl_is_hdr_plane(display, plane->id)) {
switch (plane_state->hw.color_encoding) {
case DRM_COLOR_YCBCR_BT709:
- plane_color_ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
+ ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
break;
case DRM_COLOR_YCBCR_BT2020:
- plane_color_ctl |=
- PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
+ ctl |= PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
break;
default:
- plane_color_ctl |=
- PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
+ ctl |= PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
}
- if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
- plane_color_ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
- } else if (fb->format->is_yuv) {
- plane_color_ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
- if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
- plane_color_ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
+ } else {
+ ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
}
+ if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
+ ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
+
+ return ctl;
+}
+
+static u32 glk_plane_color_ctl(const struct intel_plane_state *plane_state)
+{
+ u32 plane_color_ctl = 0;
+
+ plane_color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE;
+ plane_color_ctl |= glk_plane_color_ctl_alpha(plane_state);
+ plane_color_ctl |= glk_plane_color_ctl_input_csc(plane_state);
+
if (plane_state->force_black)
plane_color_ctl |= PLANE_COLOR_PLANE_CSC_ENABLE;
diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
index 224fae40ed2b..26ef67c835e2 100644
--- a/include/drm/drm_colorop.h
+++ b/include/drm/drm_colorop.h
@@ -134,6 +134,114 @@ enum drm_colorop_curve_1d_type {
DRM_COLOROP_1D_CURVE_COUNT
};
+/**
+ * enum drm_colorop_fixed_matrix_type - type of Fixed Matrix
+ *
+ * Describes a Fixed Matrix operation to be applied by the DRM_COLOROP_FIXED_MATRIX
+ */
+enum drm_colorop_fixed_matrix_type {
+ /**
+ * @DRM_COLOROP_FM_YCBCR601_FULL_RGB:
+ *
+ * enum string "YCbCr 601 Full to RGB"
+ *
+ * Converts full-range YCbCr into full-range RGB using the BT.601
+ * coefficients. Y is normalized to [0, 1] and Cb, Cr are centered
+ * at 0 (the nominal 0.5 offset removed) before the matrix::
+ *
+ * | R | | 1.0 0.000000 1.402000 | | Y |
+ * | G | = | 1.0 -0.344136 -0.714136 | x | Cb |
+ * | B | | 1.0 1.772000 0.000000 | | Cr |
+ */
+ DRM_COLOROP_FM_YCBCR601_FULL_RGB,
+
+ /**
+ * @DRM_COLOROP_FM_YCBCR601_LIMITED_RGB:
+ *
+ * enum string "YCbCr 601 Limited to RGB"
+ *
+ * Converts limited- (narrow-) range YCbCr into full-range RGB using
+ * the BT.601 coefficients. Before the matrix Y is offset by 16/255
+ * and Cb, Cr are centered at 0, following the studio-range
+ * convention of ITU-R BT.601::
+ *
+ * | R | | 1.164384 0.000000 1.596027 | | Y - 16/255 |
+ * | G | = | 1.164384 -0.391762 -0.812968 | x | Cb |
+ * | B | | 1.164384 2.017232 0.000000 | | Cr |
+ */
+ DRM_COLOROP_FM_YCBCR601_LIMITED_RGB,
+
+ /**
+ * @DRM_COLOROP_FM_YCBCR709_FULL_RGB:
+ *
+ * enum string "YCbCr 709 Full to RGB"
+ *
+ * Converts full-range YCbCr into full-range RGB using the BT.709
+ * coefficients. Y is normalized to [0, 1] and Cb, Cr are centered
+ * at 0 (the nominal 0.5 offset removed) before the matrix::
+ *
+ * | R | | 1.0 0.000000 1.574800 | | Y |
+ * | G | = | 1.0 -0.187324 -0.468124 | x | Cb |
+ * | B | | 1.0 1.855600 0.000000 | | Cr |
+ */
+ DRM_COLOROP_FM_YCBCR709_FULL_RGB,
+
+ /**
+ * @DRM_COLOROP_FM_YCBCR709_LIMITED_RGB:
+ *
+ * enum string "YCbCr 709 Limited to RGB"
+ *
+ * Converts limited- (narrow-) range YCbCr into full-range RGB using
+ * the BT.709 coefficients. Before the matrix Y is offset by 16/255
+ * and Cb, Cr are centered at 0, following the studio-range
+ * convention of ITU-R BT.709::
+ *
+ * | R | | 1.164384 0.000000 1.792741 | | Y - 16/255 |
+ * | G | = | 1.164384 -0.213249 -0.532909 | x | Cb |
+ * | B | | 1.164384 2.112402 0.000000 | | Cr |
+ */
+ DRM_COLOROP_FM_YCBCR709_LIMITED_RGB,
+
+ /**
+ * @DRM_COLOROP_FM_YCBCR2020_NC_FULL_RGB:
+ *
+ * enum string "YCbCr 2020 NC Full to RGB"
+ *
+ * Converts full-range YCbCr into full-range RGB using the BT.2020
+ * non-constant luminance coefficients. Y is normalized to [0, 1]
+ * and Cb, Cr are centered at 0 (the nominal 0.5 offset removed)
+ * before the matrix::
+ *
+ * | R | | 1.0 0.000000 1.474600 | | Y |
+ * | G | = | 1.0 -0.164553 -0.571353 | x | Cb |
+ * | B | | 1.0 1.881400 0.000000 | | Cr |
+ */
+ DRM_COLOROP_FM_YCBCR2020_NC_FULL_RGB,
+
+ /**
+ * @DRM_COLOROP_FM_YCBCR2020_NC_LIMITED_RGB:
+ *
+ * enum string "YCbCr 2020 NC Limited to RGB"
+ *
+ * Converts limited- (narrow-) range YCbCr into full-range RGB using
+ * the BT.2020 non-constant luminance coefficients. Before the matrix
+ * Y is offset by 16/255 and Cb, Cr are centered at 0, following the
+ * studio-range convention of ITU-R BT.2020::
+ *
+ * | R | | 1.164384 0.000000 1.678674 | | Y - 16/255 |
+ * | G | = | 1.164384 -0.187326 -0.650424 | x | Cb |
+ * | B | | 1.164384 2.141772 0.000000 | | Cr |
+ */
+ DRM_COLOROP_FM_YCBCR2020_NC_LIMITED_RGB,
+
+ /**
+ * @DRM_COLOROP_FM_COUNT:
+ *
+ * enum value denoting the size of the enum
+ */
+ DRM_COLOROP_FM_COUNT
+};
+
/**
* struct drm_colorop_state - mutable colorop state
*/
@@ -197,6 +305,13 @@ struct drm_colorop_state {
*/
enum drm_colorop_lut3d_interpolation_type lut3d_interpolation;
+ /**
+ * @fixed_matrix_type:
+ *
+ * Type of Fixed Matrix operation.
+ */
+ enum drm_colorop_fixed_matrix_type fixed_matrix_type;
+
/** @state: backpointer to global drm_atomic_commit */
struct drm_atomic_commit *state;
};
@@ -366,6 +481,13 @@ struct drm_colorop {
*/
struct drm_property *data_property;
+ /**
+ * @fixed_matrix_type_property:
+ *
+ * Sub-type for DRM_COLOROP_FIXED_MATRIX type.
+ */
+ struct drm_property *fixed_matrix_type_property;
+
/**
* @next_property:
*
@@ -422,6 +544,10 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
uint32_t lut_size,
enum drm_colorop_lut3d_interpolation_type interpolation,
uint32_t flags);
+int drm_plane_colorop_fixed_matrix_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane,
+ const struct drm_colorop_funcs *funcs,
+ u64 supported_fm, uint32_t flags);
struct drm_colorop_state *
drm_atomic_helper_colorop_create_state(struct drm_colorop *colorop);
@@ -480,6 +606,7 @@ drm_get_colorop_lut1d_interpolation_name(enum drm_colorop_lut1d_interpolation_ty
const char *
drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_interpolation_type type);
+const char *drm_get_colorop_fixed_matrix_type_name(enum drm_colorop_fixed_matrix_type type);
void drm_colorop_set_next_property(struct drm_colorop *colorop, struct drm_colorop *next);
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index bd435effdcee..ed1a660a3dfd 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -955,6 +955,18 @@ enum drm_colorop_type {
* color = lut3d[index]
*/
DRM_COLOROP_3D_LUT,
+
+ /**
+ * @DRM_COLOROP_FIXED_MATRIX:
+ *
+ * enum string "Fixed Matrix"
+ *
+ * A Colorop block that performs a pre-defined matrix operation selected
+ * via the FIXED_MATRIX_TYPE enum property. The driver advertises the supported
+ * operations through this property.
+ */
+ DRM_COLOROP_FIXED_MATRIX,
+
};
/**
--
2.50.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] drm/i915/color: Add YUV buffer support on HDR planes
2026-08-12 8:59 [PATCH 0/2] Support YUV buffers in HDR planes Chaitanya Kumar Borah
2026-08-12 8:59 ` [PATCH 1/2] [DO_NOT_REVIEW] drm/i915/color: Add color pipeline support for SDR planes Chaitanya Kumar Borah
@ 2026-08-12 8:59 ` Chaitanya Kumar Borah
2026-08-12 9:48 ` sashiko-bot
2026-08-12 9:30 ` ✓ CI.KUnit: success for Support YUV buffers in " Patchwork
` (2 subsequent siblings)
4 siblings, 1 reply; 8+ messages in thread
From: Chaitanya Kumar Borah @ 2026-08-12 8:59 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: Chaitanya Kumar Borah
Add the INTEL_PLANE_CB_CSC_FF (fixed function CSC) color block as the
first stage for the HDR planes. This enables YUV-to-RGB color space
conversion on HDR planes via the color pipeline.
Also in icl_program_input_csc(), account for the color pipeline
programming, in addition to FB format.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
drivers/gpu/drm/i915/display/intel_color_pipeline.c | 2 ++
drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 ++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
index 38cfd6ed585d..3f76b8d80430 100644
--- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
+++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
@@ -31,6 +31,7 @@ static const struct drm_colorop_funcs intel_colorop_funcs = {
* the pipeline totally unusable.
*/
static const enum intel_color_block xe3plpd_primary_plane_pipeline[] = {
+ INTEL_PLANE_CB_CSC_FF,
INTEL_PLANE_CB_PRE_CSC_LUT,
INTEL_PLANE_CB_CSC,
INTEL_PLANE_CB_3DLUT,
@@ -38,6 +39,7 @@ static const enum intel_color_block xe3plpd_primary_plane_pipeline[] = {
};
static const enum intel_color_block hdr_plane_pipeline[] = {
+ INTEL_PLANE_CB_CSC_FF,
INTEL_PLANE_CB_PRE_CSC_LUT,
INTEL_PLANE_CB_CSC,
INTEL_PLANE_CB_POST_CSC_LUT,
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 222c3b6bbe46..9da91d0a00f0 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1621,7 +1621,8 @@ icl_plane_update_noarm(struct intel_dsb *dsb,
intel_de_write_dsb(display, dsb, PLANE_COLOR_CTL(pipe, plane_id),
plane_color_ctl);
- if (fb->format->is_yuv && icl_is_hdr_plane(display, plane_id))
+ if (icl_is_hdr_plane(display, plane_id) &&
+ (fb->format->is_yuv || plane_state->hw.csc_ff_enable))
icl_program_input_csc(dsb, plane, plane_state);
skl_write_plane_wm(dsb, plane, crtc_state);
--
2.50.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* ✓ CI.KUnit: success for Support YUV buffers in HDR planes
2026-08-12 8:59 [PATCH 0/2] Support YUV buffers in HDR planes Chaitanya Kumar Borah
2026-08-12 8:59 ` [PATCH 1/2] [DO_NOT_REVIEW] drm/i915/color: Add color pipeline support for SDR planes Chaitanya Kumar Borah
2026-08-12 8:59 ` [PATCH 2/2] drm/i915/color: Add YUV buffer support on HDR planes Chaitanya Kumar Borah
@ 2026-08-12 9:30 ` Patchwork
2026-08-12 10:24 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-08-12 11:13 ` ✓ Xe.CI.FULL: success " Patchwork
4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2026-08-12 9:30 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-xe
== Series Details ==
Series: Support YUV buffers in HDR planes
URL : https://patchwork.freedesktop.org/series/172057/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[09:28:46] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:28:50] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:29:22] Starting KUnit Kernel (1/1)...
[09:29:22] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:29:22] ================== guc_buf (11 subtests) ===================
[09:29:22] [PASSED] test_smallest
[09:29:22] [PASSED] test_largest
[09:29:22] [PASSED] test_granular
[09:29:22] [PASSED] test_unique
[09:29:22] [PASSED] test_overlap
[09:29:22] [PASSED] test_reusable
[09:29:22] [PASSED] test_too_big
[09:29:22] [PASSED] test_flush
[09:29:22] [PASSED] test_lookup
[09:29:22] [PASSED] test_data
[09:29:22] [PASSED] test_class
[09:29:22] ===================== [PASSED] guc_buf =====================
[09:29:22] =================== guc_dbm (7 subtests) ===================
[09:29:22] [PASSED] test_empty
[09:29:22] [PASSED] test_default
[09:29:22] ======================== test_size ========================
[09:29:22] [PASSED] 4
[09:29:22] [PASSED] 8
[09:29:22] [PASSED] 32
[09:29:22] [PASSED] 256
[09:29:22] ==================== [PASSED] test_size ====================
[09:29:22] ======================= test_reuse ========================
[09:29:22] [PASSED] 4
[09:29:22] [PASSED] 8
[09:29:22] [PASSED] 32
[09:29:22] [PASSED] 256
[09:29:22] =================== [PASSED] test_reuse ====================
[09:29:22] =================== test_range_overlap ====================
[09:29:22] [PASSED] 4
[09:29:22] [PASSED] 8
[09:29:22] [PASSED] 32
[09:29:22] [PASSED] 256
[09:29:22] =============== [PASSED] test_range_overlap ================
[09:29:22] =================== test_range_compact ====================
[09:29:22] [PASSED] 4
[09:29:22] [PASSED] 8
[09:29:22] [PASSED] 32
[09:29:22] [PASSED] 256
[09:29:22] =============== [PASSED] test_range_compact ================
[09:29:22] ==================== test_range_spare =====================
[09:29:22] [PASSED] 4
[09:29:22] [PASSED] 8
[09:29:22] [PASSED] 32
[09:29:22] [PASSED] 256
[09:29:22] ================ [PASSED] test_range_spare =================
[09:29:22] ===================== [PASSED] guc_dbm =====================
[09:29:22] =================== guc_idm (6 subtests) ===================
[09:29:22] [PASSED] bad_init
[09:29:22] [PASSED] no_init
[09:29:22] [PASSED] init_fini
[09:29:22] [PASSED] check_used
[09:29:22] [PASSED] check_quota
[09:29:22] [PASSED] check_all
[09:29:22] ===================== [PASSED] guc_idm =====================
[09:29:22] =============== guc_klv_helpers (9 subtests) ===============
[09:29:22] [PASSED] test_count
[09:29:22] [PASSED] test_encode_u32
[09:29:22] [PASSED] test_encode_u64
[09:29:22] [PASSED] test_encode_string
[09:29:22] [PASSED] test_encode_object_raw
[09:29:22] [PASSED] test_encode_object_klv
[09:29:22] [PASSED] test_encode_object_nested
[09:29:22] [PASSED] test_encode_object_basic
[09:29:22] [PASSED] test_print
[09:29:22] ================= [PASSED] guc_klv_helpers =================
[09:29:22] ================== no_relay (3 subtests) ===================
[09:29:22] [PASSED] xe_drops_guc2pf_if_not_ready
[09:29:22] [PASSED] xe_drops_guc2vf_if_not_ready
[09:29:22] [PASSED] xe_rejects_send_if_not_ready
[09:29:22] ==================== [PASSED] no_relay =====================
[09:29:22] ================== pf_relay (14 subtests) ==================
[09:29:22] [PASSED] pf_rejects_guc2pf_too_short
[09:29:22] [PASSED] pf_rejects_guc2pf_too_long
[09:29:22] [PASSED] pf_rejects_guc2pf_no_payload
[09:29:22] [PASSED] pf_fails_no_payload
[09:29:22] [PASSED] pf_fails_bad_origin
[09:29:22] [PASSED] pf_fails_bad_type
[09:29:22] [PASSED] pf_txn_reports_error
[09:29:22] [PASSED] pf_txn_sends_pf2guc
[09:29:22] [PASSED] pf_sends_pf2guc
[09:29:22] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:29:22] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:29:22] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:29:22] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:29:22] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:29:22] ==================== [PASSED] pf_relay =====================
[09:29:22] ================== vf_relay (3 subtests) ===================
[09:29:22] [PASSED] vf_rejects_guc2vf_too_short
[09:29:22] [PASSED] vf_rejects_guc2vf_too_long
[09:29:22] [PASSED] vf_rejects_guc2vf_no_payload
[09:29:22] ==================== [PASSED] vf_relay =====================
[09:29:22] ================ pf_gt_config (9 subtests) =================
[09:29:22] [PASSED] fair_contexts_1vf
[09:29:22] [PASSED] fair_doorbells_1vf
[09:29:22] [PASSED] fair_ggtt_1vf
[09:29:22] ====================== fair_vram_1vf ======================
[09:29:22] [PASSED] 3.50 GiB
[09:29:22] [PASSED] 11.5 GiB
[09:29:22] [PASSED] 15.5 GiB
[09:29:22] [PASSED] 31.5 GiB
[09:29:22] [PASSED] 63.5 GiB
[09:29:22] [PASSED] 1.91 GiB
[09:29:22] ================== [PASSED] fair_vram_1vf ==================
[09:29:22] ================ fair_vram_1vf_admin_only =================
[09:29:22] [PASSED] 3.50 GiB
[09:29:22] [PASSED] 11.5 GiB
[09:29:22] [PASSED] 15.5 GiB
[09:29:22] [PASSED] 31.5 GiB
[09:29:22] [PASSED] 63.5 GiB
[09:29:22] [PASSED] 1.91 GiB
[09:29:22] ============ [PASSED] fair_vram_1vf_admin_only =============
[09:29:22] ====================== fair_contexts ======================
[09:29:22] [PASSED] 1 VF
[09:29:22] [PASSED] 2 VFs
[09:29:22] [PASSED] 3 VFs
[09:29:22] [PASSED] 4 VFs
[09:29:22] [PASSED] 5 VFs
[09:29:22] [PASSED] 6 VFs
[09:29:22] [PASSED] 7 VFs
[09:29:22] [PASSED] 8 VFs
[09:29:22] [PASSED] 9 VFs
[09:29:22] [PASSED] 10 VFs
[09:29:22] [PASSED] 11 VFs
[09:29:22] [PASSED] 12 VFs
[09:29:22] [PASSED] 13 VFs
[09:29:22] [PASSED] 14 VFs
[09:29:22] [PASSED] 15 VFs
[09:29:22] [PASSED] 16 VFs
[09:29:22] [PASSED] 17 VFs
[09:29:22] [PASSED] 18 VFs
[09:29:22] [PASSED] 19 VFs
[09:29:22] [PASSED] 20 VFs
[09:29:22] [PASSED] 21 VFs
[09:29:22] [PASSED] 22 VFs
[09:29:22] [PASSED] 23 VFs
[09:29:22] [PASSED] 24 VFs
[09:29:22] [PASSED] 25 VFs
[09:29:22] [PASSED] 26 VFs
[09:29:22] [PASSED] 27 VFs
[09:29:22] [PASSED] 28 VFs
[09:29:22] [PASSED] 29 VFs
[09:29:22] [PASSED] 30 VFs
[09:29:22] [PASSED] 31 VFs
[09:29:22] [PASSED] 32 VFs
[09:29:22] [PASSED] 33 VFs
[09:29:22] [PASSED] 34 VFs
[09:29:22] [PASSED] 35 VFs
[09:29:22] [PASSED] 36 VFs
[09:29:22] [PASSED] 37 VFs
[09:29:22] [PASSED] 38 VFs
[09:29:22] [PASSED] 39 VFs
[09:29:22] [PASSED] 40 VFs
[09:29:22] [PASSED] 41 VFs
[09:29:22] [PASSED] 42 VFs
[09:29:22] [PASSED] 43 VFs
[09:29:22] [PASSED] 44 VFs
[09:29:22] [PASSED] 45 VFs
[09:29:22] [PASSED] 46 VFs
[09:29:22] [PASSED] 47 VFs
[09:29:22] [PASSED] 48 VFs
[09:29:22] [PASSED] 49 VFs
[09:29:22] [PASSED] 50 VFs
[09:29:22] [PASSED] 51 VFs
[09:29:22] [PASSED] 52 VFs
[09:29:22] [PASSED] 53 VFs
[09:29:22] [PASSED] 54 VFs
[09:29:22] [PASSED] 55 VFs
[09:29:22] [PASSED] 56 VFs
[09:29:22] [PASSED] 57 VFs
[09:29:22] [PASSED] 58 VFs
[09:29:22] [PASSED] 59 VFs
[09:29:22] [PASSED] 60 VFs
[09:29:22] [PASSED] 61 VFs
[09:29:22] [PASSED] 62 VFs
[09:29:22] [PASSED] 63 VFs
[09:29:22] ================== [PASSED] fair_contexts ==================
[09:29:22] ===================== fair_doorbells ======================
[09:29:22] [PASSED] 1 VF
[09:29:22] [PASSED] 2 VFs
[09:29:22] [PASSED] 3 VFs
[09:29:22] [PASSED] 4 VFs
[09:29:22] [PASSED] 5 VFs
[09:29:22] [PASSED] 6 VFs
[09:29:22] [PASSED] 7 VFs
[09:29:22] [PASSED] 8 VFs
[09:29:22] [PASSED] 9 VFs
[09:29:22] [PASSED] 10 VFs
[09:29:22] [PASSED] 11 VFs
[09:29:22] [PASSED] 12 VFs
[09:29:22] [PASSED] 13 VFs
[09:29:22] [PASSED] 14 VFs
[09:29:22] [PASSED] 15 VFs
[09:29:22] [PASSED] 16 VFs
[09:29:22] [PASSED] 17 VFs
[09:29:22] [PASSED] 18 VFs
[09:29:22] [PASSED] 19 VFs
[09:29:22] [PASSED] 20 VFs
[09:29:22] [PASSED] 21 VFs
[09:29:22] [PASSED] 22 VFs
[09:29:22] [PASSED] 23 VFs
[09:29:22] [PASSED] 24 VFs
[09:29:22] [PASSED] 25 VFs
[09:29:22] [PASSED] 26 VFs
[09:29:22] [PASSED] 27 VFs
[09:29:22] [PASSED] 28 VFs
[09:29:22] [PASSED] 29 VFs
[09:29:22] [PASSED] 30 VFs
[09:29:22] [PASSED] 31 VFs
[09:29:22] [PASSED] 32 VFs
[09:29:22] [PASSED] 33 VFs
[09:29:22] [PASSED] 34 VFs
[09:29:22] [PASSED] 35 VFs
[09:29:22] [PASSED] 36 VFs
[09:29:22] [PASSED] 37 VFs
[09:29:22] [PASSED] 38 VFs
[09:29:22] [PASSED] 39 VFs
[09:29:22] [PASSED] 40 VFs
[09:29:22] [PASSED] 41 VFs
[09:29:22] [PASSED] 42 VFs
[09:29:22] [PASSED] 43 VFs
[09:29:22] [PASSED] 44 VFs
[09:29:22] [PASSED] 45 VFs
[09:29:22] [PASSED] 46 VFs
[09:29:22] [PASSED] 47 VFs
[09:29:22] [PASSED] 48 VFs
[09:29:22] [PASSED] 49 VFs
[09:29:22] [PASSED] 50 VFs
[09:29:22] [PASSED] 51 VFs
[09:29:22] [PASSED] 52 VFs
[09:29:22] [PASSED] 53 VFs
[09:29:22] [PASSED] 54 VFs
[09:29:22] [PASSED] 55 VFs
[09:29:22] [PASSED] 56 VFs
[09:29:22] [PASSED] 57 VFs
[09:29:22] [PASSED] 58 VFs
[09:29:22] [PASSED] 59 VFs
[09:29:22] [PASSED] 60 VFs
[09:29:22] [PASSED] 61 VFs
[09:29:22] [PASSED] 62 VFs
[09:29:22] [PASSED] 63 VFs
[09:29:22] ================= [PASSED] fair_doorbells ==================
[09:29:22] ======================== fair_ggtt ========================
[09:29:22] [PASSED] 1 VF
[09:29:22] [PASSED] 2 VFs
[09:29:22] [PASSED] 3 VFs
[09:29:22] [PASSED] 4 VFs
[09:29:22] [PASSED] 5 VFs
[09:29:22] [PASSED] 6 VFs
[09:29:22] [PASSED] 7 VFs
[09:29:22] [PASSED] 8 VFs
[09:29:22] [PASSED] 9 VFs
[09:29:22] [PASSED] 10 VFs
[09:29:22] [PASSED] 11 VFs
[09:29:22] [PASSED] 12 VFs
[09:29:22] [PASSED] 13 VFs
[09:29:22] [PASSED] 14 VFs
[09:29:22] [PASSED] 15 VFs
[09:29:22] [PASSED] 16 VFs
[09:29:22] [PASSED] 17 VFs
[09:29:22] [PASSED] 18 VFs
[09:29:22] [PASSED] 19 VFs
[09:29:22] [PASSED] 20 VFs
[09:29:22] [PASSED] 21 VFs
[09:29:22] [PASSED] 22 VFs
[09:29:22] [PASSED] 23 VFs
[09:29:22] [PASSED] 24 VFs
[09:29:22] [PASSED] 25 VFs
[09:29:22] [PASSED] 26 VFs
[09:29:22] [PASSED] 27 VFs
[09:29:22] [PASSED] 28 VFs
[09:29:22] [PASSED] 29 VFs
[09:29:22] [PASSED] 30 VFs
[09:29:22] [PASSED] 31 VFs
[09:29:22] [PASSED] 32 VFs
[09:29:22] [PASSED] 33 VFs
[09:29:22] [PASSED] 34 VFs
[09:29:22] [PASSED] 35 VFs
[09:29:22] [PASSED] 36 VFs
[09:29:22] [PASSED] 37 VFs
[09:29:22] [PASSED] 38 VFs
[09:29:22] [PASSED] 39 VFs
[09:29:22] [PASSED] 40 VFs
[09:29:22] [PASSED] 41 VFs
[09:29:22] [PASSED] 42 VFs
[09:29:22] [PASSED] 43 VFs
[09:29:22] [PASSED] 44 VFs
[09:29:22] [PASSED] 45 VFs
[09:29:22] [PASSED] 46 VFs
[09:29:22] [PASSED] 47 VFs
[09:29:22] [PASSED] 48 VFs
[09:29:22] [PASSED] 49 VFs
[09:29:22] [PASSED] 50 VFs
[09:29:22] [PASSED] 51 VFs
[09:29:22] [PASSED] 52 VFs
[09:29:22] [PASSED] 53 VFs
[09:29:22] [PASSED] 54 VFs
[09:29:22] [PASSED] 55 VFs
[09:29:22] [PASSED] 56 VFs
[09:29:22] [PASSED] 57 VFs
[09:29:22] [PASSED] 58 VFs
[09:29:22] [PASSED] 59 VFs
[09:29:22] [PASSED] 60 VFs
[09:29:22] [PASSED] 61 VFs
[09:29:22] [PASSED] 62 VFs
[09:29:22] [PASSED] 63 VFs
[09:29:22] ==================== [PASSED] fair_ggtt ====================
[09:29:22] ======================== fair_vram ========================
[09:29:22] [PASSED] 1 VF
[09:29:22] [PASSED] 2 VFs
[09:29:22] [PASSED] 3 VFs
[09:29:22] [PASSED] 4 VFs
[09:29:22] [PASSED] 5 VFs
[09:29:22] [PASSED] 6 VFs
[09:29:22] [PASSED] 7 VFs
[09:29:22] [PASSED] 8 VFs
[09:29:22] [PASSED] 9 VFs
[09:29:22] [PASSED] 10 VFs
[09:29:22] [PASSED] 11 VFs
[09:29:22] [PASSED] 12 VFs
[09:29:22] [PASSED] 13 VFs
[09:29:22] [PASSED] 14 VFs
[09:29:22] [PASSED] 15 VFs
[09:29:22] [PASSED] 16 VFs
[09:29:22] [PASSED] 17 VFs
[09:29:22] [PASSED] 18 VFs
[09:29:22] [PASSED] 19 VFs
[09:29:22] [PASSED] 20 VFs
[09:29:22] [PASSED] 21 VFs
[09:29:22] [PASSED] 22 VFs
[09:29:22] [PASSED] 23 VFs
[09:29:22] [PASSED] 24 VFs
[09:29:22] [PASSED] 25 VFs
[09:29:22] [PASSED] 26 VFs
[09:29:22] [PASSED] 27 VFs
[09:29:22] [PASSED] 28 VFs
[09:29:22] [PASSED] 29 VFs
[09:29:22] [PASSED] 30 VFs
[09:29:22] [PASSED] 31 VFs
[09:29:22] [PASSED] 32 VFs
[09:29:22] [PASSED] 33 VFs
[09:29:22] [PASSED] 34 VFs
[09:29:22] [PASSED] 35 VFs
[09:29:22] [PASSED] 36 VFs
[09:29:22] [PASSED] 37 VFs
[09:29:22] [PASSED] 38 VFs
[09:29:22] [PASSED] 39 VFs
[09:29:22] [PASSED] 40 VFs
[09:29:22] [PASSED] 41 VFs
[09:29:22] [PASSED] 42 VFs
[09:29:22] [PASSED] 43 VFs
[09:29:22] [PASSED] 44 VFs
[09:29:22] [PASSED] 45 VFs
[09:29:22] [PASSED] 46 VFs
[09:29:22] [PASSED] 47 VFs
[09:29:22] [PASSED] 48 VFs
[09:29:22] [PASSED] 49 VFs
[09:29:22] [PASSED] 50 VFs
[09:29:22] [PASSED] 51 VFs
[09:29:22] [PASSED] 52 VFs
[09:29:22] [PASSED] 53 VFs
[09:29:22] [PASSED] 54 VFs
[09:29:22] [PASSED] 55 VFs
[09:29:22] [PASSED] 56 VFs
[09:29:22] [PASSED] 57 VFs
[09:29:22] [PASSED] 58 VFs
[09:29:22] [PASSED] 59 VFs
[09:29:22] [PASSED] 60 VFs
[09:29:22] [PASSED] 61 VFs
[09:29:22] [PASSED] 62 VFs
[09:29:22] [PASSED] 63 VFs
[09:29:22] ==================== [PASSED] fair_vram ====================
[09:29:22] ================== [PASSED] pf_gt_config ===================
[09:29:22] ===================== lmtt (1 subtest) =====================
[09:29:22] ======================== test_ops =========================
[09:29:22] [PASSED] 2-level
[09:29:22] [PASSED] multi-level
[09:29:22] ==================== [PASSED] test_ops =====================
[09:29:22] ====================== [PASSED] lmtt =======================
[09:29:22] ================= sriov_packet (1 subtest) =================
[09:29:22] [PASSED] test_descriptor_init
[09:29:22] ================== [PASSED] sriov_packet ===================
[09:29:22] ================= pf_service (11 subtests) =================
[09:29:22] [PASSED] pf_negotiate_any
[09:29:22] [PASSED] pf_negotiate_base_match
[09:29:22] [PASSED] pf_negotiate_base_newer
[09:29:22] [PASSED] pf_negotiate_base_next
[09:29:22] [SKIPPED] pf_negotiate_base_older (no older minor)
[09:29:22] [PASSED] pf_negotiate_base_prev
[09:29:22] [PASSED] pf_negotiate_latest_match
[09:29:22] [PASSED] pf_negotiate_latest_newer
[09:29:22] [PASSED] pf_negotiate_latest_next
[09:29:22] [SKIPPED] pf_negotiate_latest_older (no older minor)
[09:29:22] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[09:29:22] =================== [PASSED] pf_service ====================
[09:29:22] ================= xe_guc_g2g (2 subtests) ==================
[09:29:22] ============== xe_live_guc_g2g_kunit_default ==============
[09:29:22] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[09:29:22] ============== xe_live_guc_g2g_kunit_allmem ===============
[09:29:22] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[09:29:22] =================== [SKIPPED] xe_guc_g2g ===================
[09:29:22] =================== xe_mocs (2 subtests) ===================
[09:29:22] ================ xe_live_mocs_kernel_kunit ================
[09:29:22] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[09:29:22] ================ xe_live_mocs_reset_kunit =================
[09:29:22] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[09:29:22] ==================== [SKIPPED] xe_mocs =====================
[09:29:22] ================= xe_migrate (2 subtests) ==================
[09:29:22] ================= xe_migrate_sanity_kunit =================
[09:29:22] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[09:29:22] ================== xe_validate_ccs_kunit ==================
[09:29:22] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[09:29:22] =================== [SKIPPED] xe_migrate ===================
[09:29:22] ================== xe_dma_buf (1 subtest) ==================
[09:29:22] ==================== xe_dma_buf_kunit =====================
[09:29:22] ================ [SKIPPED] xe_dma_buf_kunit ================
[09:29:22] =================== [SKIPPED] xe_dma_buf ===================
[09:29:22] ================= xe_bo_shrink (1 subtest) =================
[09:29:22] =================== xe_bo_shrink_kunit ====================
[09:29:22] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[09:29:22] ================== [SKIPPED] xe_bo_shrink ==================
[09:29:22] ==================== xe_bo (2 subtests) ====================
[09:29:22] ================== xe_ccs_migrate_kunit ===================
[09:29:22] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[09:29:22] ==================== xe_bo_evict_kunit ====================
[09:29:22] =============== [SKIPPED] xe_bo_evict_kunit ================
[09:29:22] ===================== [SKIPPED] xe_bo ======================
[09:29:22] ==================== args (13 subtests) ====================
[09:29:22] [PASSED] count_args_test
[09:29:22] [PASSED] call_args_example
[09:29:22] [PASSED] call_args_test
[09:29:22] [PASSED] drop_first_arg_example
[09:29:22] [PASSED] drop_first_arg_test
[09:29:22] [PASSED] first_arg_example
[09:29:22] [PASSED] first_arg_test
[09:29:22] [PASSED] last_arg_example
[09:29:22] [PASSED] last_arg_test
[09:29:22] [PASSED] pick_arg_example
[09:29:22] [PASSED] if_args_example
[09:29:22] [PASSED] if_args_test
[09:29:22] [PASSED] sep_comma_example
[09:29:22] ====================== [PASSED] args =======================
[09:29:22] =================== xe_pci (3 subtests) ====================
[09:29:22] ==================== check_graphics_ip ====================
[09:29:22] [PASSED] 12.00 Xe_LP
[09:29:22] [PASSED] 12.10 Xe_LP+
[09:29:22] [PASSED] 12.55 Xe_HPG
[09:29:22] [PASSED] 12.60 Xe_HPC
[09:29:22] [PASSED] 12.70 Xe_LPG
[09:29:22] [PASSED] 12.71 Xe_LPG
[09:29:22] [PASSED] 12.74 Xe_LPG+
[09:29:22] [PASSED] 20.01 Xe2_HPG
[09:29:22] [PASSED] 20.02 Xe2_HPG
[09:29:22] [PASSED] 20.04 Xe2_LPG
[09:29:22] [PASSED] 30.00 Xe3_LPG
[09:29:22] [PASSED] 30.01 Xe3_LPG
[09:29:22] [PASSED] 30.03 Xe3_LPG
[09:29:22] [PASSED] 30.04 Xe3_LPG
[09:29:22] [PASSED] 30.05 Xe3_LPG
[09:29:22] [PASSED] 35.10 Xe3p_LPG
[09:29:22] [PASSED] 35.11 Xe3p_XPC
[09:29:22] ================ [PASSED] check_graphics_ip ================
[09:29:22] ===================== check_media_ip ======================
[09:29:22] [PASSED] 12.00 Xe_M
[09:29:22] [PASSED] 12.55 Xe_HPM
[09:29:22] [PASSED] 13.00 Xe_LPM+
[09:29:22] [PASSED] 13.01 Xe2_HPM
[09:29:22] [PASSED] 20.00 Xe2_LPM
[09:29:22] [PASSED] 30.00 Xe3_LPM
[09:29:22] [PASSED] 30.02 Xe3_LPM
[09:29:22] [PASSED] 35.00 Xe3p_LPM
[09:29:22] [PASSED] 35.03 Xe3p_HPM
[09:29:22] ================= [PASSED] check_media_ip ==================
[09:29:22] =================== check_platform_desc ===================
[09:29:22] [PASSED] 0x9A60 (TIGERLAKE)
[09:29:22] [PASSED] 0x9A68 (TIGERLAKE)
[09:29:22] [PASSED] 0x9A70 (TIGERLAKE)
[09:29:22] [PASSED] 0x9A40 (TIGERLAKE)
[09:29:22] [PASSED] 0x9A49 (TIGERLAKE)
[09:29:22] [PASSED] 0x9A59 (TIGERLAKE)
[09:29:22] [PASSED] 0x9A78 (TIGERLAKE)
[09:29:22] [PASSED] 0x9AC0 (TIGERLAKE)
[09:29:22] [PASSED] 0x9AC9 (TIGERLAKE)
[09:29:22] [PASSED] 0x9AD9 (TIGERLAKE)
[09:29:22] [PASSED] 0x9AF8 (TIGERLAKE)
[09:29:22] [PASSED] 0x4C80 (ROCKETLAKE)
[09:29:22] [PASSED] 0x4C8A (ROCKETLAKE)
[09:29:22] [PASSED] 0x4C8B (ROCKETLAKE)
[09:29:22] [PASSED] 0x4C8C (ROCKETLAKE)
[09:29:22] [PASSED] 0x4C90 (ROCKETLAKE)
[09:29:22] [PASSED] 0x4C9A (ROCKETLAKE)
[09:29:22] [PASSED] 0x4680 (ALDERLAKE_S)
[09:29:22] [PASSED] 0x4682 (ALDERLAKE_S)
[09:29:22] [PASSED] 0x4688 (ALDERLAKE_S)
[09:29:22] [PASSED] 0x468A (ALDERLAKE_S)
[09:29:22] [PASSED] 0x468B (ALDERLAKE_S)
[09:29:22] [PASSED] 0x4690 (ALDERLAKE_S)
[09:29:22] [PASSED] 0x4692 (ALDERLAKE_S)
[09:29:22] [PASSED] 0x4693 (ALDERLAKE_S)
[09:29:22] [PASSED] 0x46A0 (ALDERLAKE_P)
[09:29:22] [PASSED] 0x46A1 (ALDERLAKE_P)
[09:29:22] [PASSED] 0x46A2 (ALDERLAKE_P)
[09:29:22] [PASSED] 0x46A3 (ALDERLAKE_P)
[09:29:22] [PASSED] 0x46A6 (ALDERLAKE_P)
[09:29:22] [PASSED] 0x46A8 (ALDERLAKE_P)
[09:29:22] [PASSED] 0x46AA (ALDERLAKE_P)
[09:29:22] [PASSED] 0x462A (ALDERLAKE_P)
[09:29:22] [PASSED] 0x4626 (ALDERLAKE_P)
[09:29:22] [PASSED] 0x4628 (ALDERLAKE_P)
[09:29:22] [PASSED] 0x46B0 (ALDERLAKE_P)
[09:29:22] [PASSED] 0x46B1 (ALDERLAKE_P)
[09:29:22] [PASSED] 0x46B2 (ALDERLAKE_P)
[09:29:22] [PASSED] 0x46B3 (ALDERLAKE_P)
[09:29:22] [PASSED] 0x46C0 (ALDERLAKE_P)
[09:29:22] [PASSED] 0x46C1 (ALDERLAKE_P)
[09:29:22] [PASSED] 0x46C2 (ALDERLAKE_P)
[09:29:22] [PASSED] 0x46C3 (ALDERLAKE_P)
[09:29:22] [PASSED] 0x46D0 (ALDERLAKE_N)
[09:29:22] [PASSED] 0x46D1 (ALDERLAKE_N)
[09:29:22] [PASSED] 0x46D2 (ALDERLAKE_N)
[09:29:22] [PASSED] 0x46D3 (ALDERLAKE_N)
[09:29:22] [PASSED] 0x46D4 (ALDERLAKE_N)
[09:29:22] [PASSED] 0xA721 (ALDERLAKE_P)
[09:29:22] [PASSED] 0xA7A1 (ALDERLAKE_P)
[09:29:22] [PASSED] 0xA7A9 (ALDERLAKE_P)
[09:29:22] [PASSED] 0xA7AC (ALDERLAKE_P)
[09:29:22] [PASSED] 0xA7AD (ALDERLAKE_P)
[09:29:22] [PASSED] 0xA720 (ALDERLAKE_P)
[09:29:22] [PASSED] 0xA7A0 (ALDERLAKE_P)
[09:29:22] [PASSED] 0xA7A8 (ALDERLAKE_P)
[09:29:22] [PASSED] 0xA7AA (ALDERLAKE_P)
[09:29:22] [PASSED] 0xA7AB (ALDERLAKE_P)
[09:29:22] [PASSED] 0xA780 (ALDERLAKE_S)
[09:29:22] [PASSED] 0xA781 (ALDERLAKE_S)
[09:29:22] [PASSED] 0xA782 (ALDERLAKE_S)
[09:29:22] [PASSED] 0xA783 (ALDERLAKE_S)
[09:29:22] [PASSED] 0xA788 (ALDERLAKE_S)
[09:29:22] [PASSED] 0xA789 (ALDERLAKE_S)
[09:29:22] [PASSED] 0xA78A (ALDERLAKE_S)
[09:29:22] [PASSED] 0xA78B (ALDERLAKE_S)
[09:29:22] [PASSED] 0x4905 (DG1)
[09:29:22] [PASSED] 0x4906 (DG1)
[09:29:22] [PASSED] 0x4907 (DG1)
[09:29:22] [PASSED] 0x4908 (DG1)
[09:29:22] [PASSED] 0x4909 (DG1)
[09:29:22] [PASSED] 0x56C0 (DG2)
[09:29:22] [PASSED] 0x56C2 (DG2)
[09:29:22] [PASSED] 0x56C1 (DG2)
[09:29:22] [PASSED] 0x7D51 (METEORLAKE)
[09:29:22] [PASSED] 0x7DD1 (METEORLAKE)
[09:29:22] [PASSED] 0x7D41 (METEORLAKE)
[09:29:22] [PASSED] 0x7D67 (METEORLAKE)
[09:29:22] [PASSED] 0xB640 (METEORLAKE)
[09:29:22] [PASSED] 0x56A0 (DG2)
[09:29:22] [PASSED] 0x56A1 (DG2)
[09:29:22] [PASSED] 0x56A2 (DG2)
[09:29:22] [PASSED] 0x56BE (DG2)
[09:29:22] [PASSED] 0x56BF (DG2)
[09:29:22] [PASSED] 0x5690 (DG2)
[09:29:22] [PASSED] 0x5691 (DG2)
[09:29:22] [PASSED] 0x5692 (DG2)
[09:29:22] [PASSED] 0x56A5 (DG2)
[09:29:22] [PASSED] 0x56A6 (DG2)
[09:29:22] [PASSED] 0x56B0 (DG2)
[09:29:22] [PASSED] 0x56B1 (DG2)
[09:29:22] [PASSED] 0x56BA (DG2)
[09:29:22] [PASSED] 0x56BB (DG2)
[09:29:22] [PASSED] 0x56BC (DG2)
[09:29:22] [PASSED] 0x56BD (DG2)
[09:29:22] [PASSED] 0x5693 (DG2)
[09:29:22] [PASSED] 0x5694 (DG2)
[09:29:22] [PASSED] 0x5695 (DG2)
[09:29:22] [PASSED] 0x56A3 (DG2)
[09:29:22] [PASSED] 0x56A4 (DG2)
[09:29:22] [PASSED] 0x56B2 (DG2)
[09:29:22] [PASSED] 0x56B3 (DG2)
[09:29:22] [PASSED] 0x5696 (DG2)
[09:29:22] [PASSED] 0x5697 (DG2)
[09:29:22] [PASSED] 0xB69 (PVC)
[09:29:22] [PASSED] 0xB6E (PVC)
[09:29:22] [PASSED] 0xBD4 (PVC)
[09:29:22] [PASSED] 0xBD5 (PVC)
[09:29:22] [PASSED] 0xBD6 (PVC)
[09:29:22] [PASSED] 0xBD7 (PVC)
[09:29:22] [PASSED] 0xBD8 (PVC)
[09:29:22] [PASSED] 0xBD9 (PVC)
[09:29:22] [PASSED] 0xBDA (PVC)
[09:29:22] [PASSED] 0xBDB (PVC)
[09:29:22] [PASSED] 0xBE0 (PVC)
[09:29:22] [PASSED] 0xBE1 (PVC)
[09:29:22] [PASSED] 0xBE5 (PVC)
[09:29:22] [PASSED] 0x7D40 (METEORLAKE)
[09:29:22] [PASSED] 0x7D45 (METEORLAKE)
[09:29:22] [PASSED] 0x7D55 (METEORLAKE)
[09:29:22] [PASSED] 0x7D60 (METEORLAKE)
[09:29:22] [PASSED] 0x7DD5 (METEORLAKE)
[09:29:22] [PASSED] 0x6420 (LUNARLAKE)
[09:29:22] [PASSED] 0x64A0 (LUNARLAKE)
[09:29:22] [PASSED] 0x64B0 (LUNARLAKE)
[09:29:22] [PASSED] 0xE202 (BATTLEMAGE)
[09:29:22] [PASSED] 0xE209 (BATTLEMAGE)
[09:29:22] [PASSED] 0xE20B (BATTLEMAGE)
[09:29:22] [PASSED] 0xE20C (BATTLEMAGE)
[09:29:22] [PASSED] 0xE20D (BATTLEMAGE)
[09:29:22] [PASSED] 0xE210 (BATTLEMAGE)
[09:29:22] [PASSED] 0xE211 (BATTLEMAGE)
[09:29:22] [PASSED] 0xE212 (BATTLEMAGE)
[09:29:22] [PASSED] 0xE216 (BATTLEMAGE)
[09:29:22] [PASSED] 0xE220 (BATTLEMAGE)
[09:29:22] [PASSED] 0xE221 (BATTLEMAGE)
[09:29:22] [PASSED] 0xE222 (BATTLEMAGE)
[09:29:22] [PASSED] 0xE223 (BATTLEMAGE)
[09:29:22] [PASSED] 0xB080 (PANTHERLAKE)
[09:29:22] [PASSED] 0xB081 (PANTHERLAKE)
[09:29:22] [PASSED] 0xB082 (PANTHERLAKE)
[09:29:22] [PASSED] 0xB083 (PANTHERLAKE)
[09:29:22] [PASSED] 0xB084 (PANTHERLAKE)
[09:29:22] [PASSED] 0xB085 (PANTHERLAKE)
[09:29:22] [PASSED] 0xB086 (PANTHERLAKE)
[09:29:22] [PASSED] 0xB087 (PANTHERLAKE)
[09:29:22] [PASSED] 0xB08F (PANTHERLAKE)
[09:29:22] [PASSED] 0xB090 (PANTHERLAKE)
[09:29:22] [PASSED] 0xB0A0 (PANTHERLAKE)
[09:29:22] [PASSED] 0xB0B0 (PANTHERLAKE)
[09:29:22] [PASSED] 0xFD80 (PANTHERLAKE)
[09:29:22] [PASSED] 0xFD81 (PANTHERLAKE)
[09:29:22] [PASSED] 0xD740 (NOVALAKE_S)
[09:29:22] [PASSED] 0xD741 (NOVALAKE_S)
[09:29:22] [PASSED] 0xD742 (NOVALAKE_S)
[09:29:22] [PASSED] 0xD743 (NOVALAKE_S)
[09:29:22] [PASSED] 0xD745 (NOVALAKE_S)
[09:29:22] [PASSED] 0xD74A (NOVALAKE_S)
[09:29:22] [PASSED] 0xD74B (NOVALAKE_S)
[09:29:22] [PASSED] 0x674C (CRESCENTISLAND)
[09:29:22] [PASSED] 0x674D (CRESCENTISLAND)
[09:29:22] [PASSED] 0x674E (CRESCENTISLAND)
[09:29:22] [PASSED] 0x674F (CRESCENTISLAND)
[09:29:22] [PASSED] 0x6750 (CRESCENTISLAND)
[09:29:22] [PASSED] 0xD750 (NOVALAKE_P)
[09:29:22] [PASSED] 0xD751 (NOVALAKE_P)
[09:29:22] [PASSED] 0xD752 (NOVALAKE_P)
[09:29:22] [PASSED] 0xD753 (NOVALAKE_P)
[09:29:22] [PASSED] 0xD754 (NOVALAKE_P)
[09:29:22] [PASSED] 0xD755 (NOVALAKE_P)
[09:29:22] [PASSED] 0xD756 (NOVALAKE_P)
[09:29:22] [PASSED] 0xD757 (NOVALAKE_P)
[09:29:22] [PASSED] 0xD75F (NOVALAKE_P)
[09:29:22] =============== [PASSED] check_platform_desc ===============
[09:29:22] ===================== [PASSED] xe_pci ======================
[09:29:22] ============= xe_rtp_tables_test (5 subtests) ==============
[09:29:22] ================== xe_rtp_table_gt_test ===================
[09:29:22] [PASSED] gt_was/14011060649
[09:29:22] [PASSED] gt_was/14011059788
[09:29:22] [PASSED] gt_was/14015795083
[09:29:22] [PASSED] gt_was/16021867713
[09:29:22] [PASSED] gt_was/14019449301
[09:29:22] [PASSED] gt_was/16028005424
[09:29:22] [PASSED] gt_was/14026578760
[09:29:22] [PASSED] gt_was/1409420604
[09:29:22] [PASSED] gt_was/1408615072
[09:29:22] [PASSED] gt_was/22010523718
[09:29:22] [PASSED] gt_was/14011006942
[09:29:22] [PASSED] gt_was/14014830051
[09:29:22] [PASSED] gt_was/18018781329
[09:29:22] [PASSED] gt_was/1509235366
[09:29:22] [PASSED] gt_was/18018781329
[09:29:22] [PASSED] gt_was/16016694945
[09:29:22] [PASSED] gt_was/14018575942
[09:29:22] [PASSED] gt_was/22016670082
[09:29:22] [PASSED] gt_was/22016670082
[09:29:22] [PASSED] gt_was/14017421178
[09:29:22] [PASSED] gt_was/16025250150
[09:29:22] [PASSED] gt_was/14021871409
[09:29:22] [PASSED] gt_was/16021865536
[09:29:22] [PASSED] gt_was/14021486841
[09:29:22] [PASSED] gt_was/14025160223
[09:29:22] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[09:29:22] [PASSED] gt_was/14025635424
[09:29:22] [PASSED] gt_was/16028005424
[09:29:22] ============== [PASSED] xe_rtp_table_gt_test ===============
[09:29:22] ================== xe_rtp_table_gt_test ===================
[09:29:22] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[09:29:22] [PASSED] gt_tunings/Tuning: 32B Access Enable
[09:29:22] [PASSED] gt_tunings/Tuning: L3 cache
[09:29:22] [PASSED] gt_tunings/Tuning: L3 cache - media
[09:29:22] [PASSED] gt_tunings/Tuning: Compression Overfetch
[09:29:22] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[09:29:22] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[09:29:22] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[09:29:22] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[09:29:22] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[09:29:22] [PASSED] gt_tunings/Tuning: Stateless compression control
[09:29:22] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[09:29:22] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[09:29:22] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[09:29:22] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[09:29:22] ============== [PASSED] xe_rtp_table_gt_test ===============
[09:29:22] ================== xe_rtp_table_oob_test ==================
[09:29:22] [PASSED] oob_was/1607983814
[09:29:22] [PASSED] oob_was/16010904313
[09:29:22] [PASSED] oob_was/18022495364
[09:29:22] [PASSED] oob_was/22012773006
[09:29:22] [PASSED] oob_was/14014475959
[09:29:22] [PASSED] oob_was/22011391025
[09:29:22] [PASSED] oob_was/22012727170
[09:29:22] [PASSED] oob_was/22012727685
[09:29:22] [PASSED] oob_was/22016596838
[09:29:22] [PASSED] oob_was/18020744125
[09:29:22] [PASSED] oob_was/1409600907
[09:29:22] [PASSED] oob_was/22014953428
[09:29:22] [PASSED] oob_was/16017236439
[09:29:22] [PASSED] oob_was/14019821291
[09:29:22] [PASSED] oob_was/14015076503
[09:29:22] [PASSED] oob_was/14018913170
[09:29:22] [PASSED] oob_was/14018094691
[09:29:22] [PASSED] oob_was/18024947630
[09:29:22] [PASSED] oob_was/16022287689
[09:29:22] [PASSED] oob_was/13011645652
[09:29:22] [PASSED] oob_was/14022293748
[09:29:22] [PASSED] oob_was/22019794406
[09:29:22] [PASSED] oob_was/22019338487
[09:29:22] [PASSED] oob_was/16023588340
[09:29:22] [PASSED] oob_was/14019789679
[09:29:22] [PASSED] oob_was/14022866841
[09:29:22] [PASSED] oob_was/16021333562
[09:29:22] [PASSED] oob_was/14016712196
[09:29:22] [PASSED] oob_was/14015568240
[09:29:22] [PASSED] oob_was/18013179988
[09:29:22] [PASSED] oob_was/1508761755
[09:29:22] [PASSED] oob_was/16023105232
[09:29:22] [PASSED] oob_was/16026508708
[09:29:22] [PASSED] oob_was/14020001231
[09:29:22] [PASSED] oob_was/16023683509
[09:29:22] [PASSED] oob_was/14025515070
[09:29:22] [PASSED] oob_was/15015404425_disable
[09:29:22] [PASSED] oob_was/16026007364
[09:29:22] [PASSED] oob_was/14020316580
[09:29:22] [PASSED] oob_was/14025883347
[09:29:22] [PASSED] oob_was/16029380221
[09:29:22] [PASSED] oob_was/22022079272
[09:29:22] [PASSED] oob_was/16029897822
[09:29:22] [PASSED] oob_was/14027054324
[09:29:22] ============== [PASSED] xe_rtp_table_oob_test ==============
[09:29:22] ================ xe_rtp_table_dev_oob_test ================
[09:29:22] [PASSED] device_oob_was/22010954014
[09:29:22] [PASSED] device_oob_was/15015404425
[09:29:22] [PASSED] device_oob_was/22019338487_display
[09:29:22] [PASSED] device_oob_was/14022085890
[09:29:22] [PASSED] device_oob_was/14026539277
[09:29:22] [PASSED] device_oob_was/14026633728
[09:29:22] [PASSED] device_oob_was/14026746987
[09:29:22] [PASSED] device_oob_was/14026779378
[09:29:22] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[09:29:22] ========== xe_rtp_table_missing_upper_bound_test ==========
[09:29:22] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[09:29:22] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[09:29:22] [PASSED] register_whitelist/1806527549
[09:29:22] [PASSED] register_whitelist/allow_read_ctx_timestamp
[09:29:22] [PASSED] register_whitelist/allow_read_queue_timestamp
[09:29:22] [PASSED] register_whitelist/16014440446
[09:29:22] [PASSED] register_whitelist/16017236439
[09:29:22] [PASSED] register_whitelist/16020183090
[09:29:22] [PASSED] register_whitelist/14024997852
[09:29:22] [PASSED] register_whitelist/14024997852
[09:29:22] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[09:29:22] =============== [PASSED] xe_rtp_tables_test ================
[09:29:22] =================== xe_rtp (3 subtests) ====================
[09:29:22] =================== xe_rtp_rules_tests ====================
[09:29:22] [PASSED] no
[09:29:22] [PASSED] yes
[09:29:22] [PASSED] no-and-no
[09:29:22] [PASSED] no-and-yes
[09:29:22] [PASSED] yes-and-no
[09:29:22] [PASSED] yes-and-yes
[09:29:22] [PASSED] no-or-no
[09:29:22] [PASSED] no-or-yes
[09:29:22] [PASSED] yes-or-no
[09:29:22] [PASSED] yes-or-yes
[09:29:22] [PASSED] no-yes-or-yes-no
[09:29:22] [PASSED] no-yes-or-yes-yes
[09:29:22] [PASSED] yes-yes-or-no-yes
[09:29:22] [PASSED] yes-yes-or-yes-yes
[09:29:22] [PASSED] no-no-or-yes-or-no
[09:29:22] [PASSED] or
[09:29:22] [PASSED] or-yes
[09:29:22] [PASSED] or-no
[09:29:22] [PASSED] yes-or
[09:29:22] [PASSED] no-or
[09:29:22] [PASSED] no-or-or-yes
[09:29:22] [PASSED] yes-or-or-no
[09:29:22] [PASSED] no-or-or-no
[09:29:22] [PASSED] missing-context-engine-class
[09:29:22] [PASSED] missing-context-engine-class-or-yes
[09:29:22] [PASSED] missing-context-engine-class-or-or-yes
[09:29:22] =============== [PASSED] xe_rtp_rules_tests ================
[09:29:22] =============== xe_rtp_process_to_sr_tests ================
[09:29:22] [PASSED] coalesce-same-reg
[09:29:22] [PASSED] coalesce-same-reg-literal-and-func
[09:29:22] [PASSED] no-match-no-add
[09:29:22] [PASSED] two-regs-two-entries
[09:29:22] [PASSED] clr-one-set-other
[09:29:22] [PASSED] set-field
[09:29:22] [PASSED] conflict-duplicate
[09:29:22] [PASSED] conflict-not-disjoint
[09:29:22] [PASSED] conflict-not-disjoint-literal-and-func
[09:29:22] [PASSED] conflict-reg-type
[09:29:22] [PASSED] bad-mcr-reg-forced-to-regular
[09:29:22] [PASSED] bad-regular-reg-forced-to-mcr
[09:29:22] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[09:29:22] ================== xe_rtp_process_tests ===================
[09:29:22] [PASSED] active1
[09:29:22] [PASSED] active2
[09:29:22] [PASSED] active-inactive
[09:29:22] [PASSED] inactive-active
[09:29:22] [PASSED] inactive-active-inactive
[09:29:22] [PASSED] inactive-inactive-inactive
[09:29:22] ============== [PASSED] xe_rtp_process_tests ===============
[09:29:22] ===================== [PASSED] xe_rtp ======================
[09:29:22] ==================== xe_wa (1 subtest) =====================
[09:29:22] ======================== xe_wa_gt =========================
[09:29:22] [PASSED] TIGERLAKE B0
[09:29:22] [PASSED] DG1 A0
[09:29:22] [PASSED] DG1 B0
[09:29:22] [PASSED] ALDERLAKE_S A0
[09:29:22] [PASSED] ALDERLAKE_S B0
[09:29:22] [PASSED] ALDERLAKE_S C0
[09:29:22] [PASSED] ALDERLAKE_S D0
[09:29:22] [PASSED] ALDERLAKE_P A0
[09:29:22] [PASSED] ALDERLAKE_P B0
[09:29:22] [PASSED] ALDERLAKE_P C0
[09:29:22] [PASSED] ALDERLAKE_S RPLS D0
[09:29:22] [PASSED] ALDERLAKE_P RPLU E0
[09:29:22] [PASSED] DG2 G10 C0
[09:29:22] [PASSED] DG2 G11 B1
[09:29:22] [PASSED] DG2 G12 A1
[09:29:22] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:29:22] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:29:22] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[09:29:22] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[09:29:22] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[09:29:22] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[09:29:22] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[09:29:22] ==================== [PASSED] xe_wa_gt =====================
[09:29:22] ====================== [PASSED] xe_wa ======================
[09:29:22] ============================================================
[09:29:22] Testing complete. Ran 742 tests: passed: 724, skipped: 18
[09:29:22] Elapsed time: 36.822s total, 4.340s configuring, 31.817s building, 0.634s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[09:29:23] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:29:24] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:29:49] Starting KUnit Kernel (1/1)...
[09:29:49] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:29:49] ============ drm_test_pick_cmdline (2 subtests) ============
[09:29:49] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[09:29:49] =============== drm_test_pick_cmdline_named ===============
[09:29:49] [PASSED] NTSC
[09:29:49] [PASSED] NTSC-J
[09:29:49] [PASSED] PAL
[09:29:49] [PASSED] PAL-M
[09:29:49] =========== [PASSED] drm_test_pick_cmdline_named ===========
[09:29:49] ============== [PASSED] drm_test_pick_cmdline ==============
[09:29:49] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[09:29:49] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[09:29:49] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[09:29:49] =========== drm_validate_clone_mode (2 subtests) ===========
[09:29:49] ============== drm_test_check_in_clone_mode ===============
[09:29:49] [PASSED] in_clone_mode
[09:29:49] [PASSED] not_in_clone_mode
[09:29:49] ========== [PASSED] drm_test_check_in_clone_mode ===========
[09:29:49] =============== drm_test_check_valid_clones ===============
[09:29:49] [PASSED] not_in_clone_mode
[09:29:49] [PASSED] valid_clone
[09:29:49] [PASSED] invalid_clone
[09:29:49] =========== [PASSED] drm_test_check_valid_clones ===========
[09:29:49] ============= [PASSED] drm_validate_clone_mode =============
[09:29:49] ============= drm_validate_modeset (1 subtest) =============
[09:29:49] [PASSED] drm_test_check_connector_changed_modeset
[09:29:49] ============== [PASSED] drm_validate_modeset ===============
[09:29:49] ====== drm_test_bridge_get_current_state (1 subtest) =======
[09:29:49] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[09:29:49] ======== [PASSED] drm_test_bridge_get_current_state ========
[09:29:49] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[09:29:49] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[09:29:49] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[09:29:49] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[09:29:49] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[09:29:49] ============== drm_bridge_alloc (2 subtests) ===============
[09:29:49] [PASSED] drm_test_drm_bridge_alloc_basic
[09:29:49] [PASSED] drm_test_drm_bridge_alloc_get_put
[09:29:49] ================ [PASSED] drm_bridge_alloc =================
[09:29:49] ============= drm_bridge_bus_fmt (5 subtests) ==============
[09:29:49] [PASSED] drm_test_bridge_rgb_yuv_rgb
[09:29:49] [PASSED] drm_test_bridge_must_convert_to_yuv444
[09:29:49] [PASSED] drm_test_bridge_hdmi_auto_rgb
[09:29:49] [PASSED] drm_test_bridge_auto_first
[09:29:49] [PASSED] drm_test_bridge_rgb_yuv_no_path
[09:29:49] =============== [PASSED] drm_bridge_bus_fmt ================
[09:29:49] ============= drm_cmdline_parser (40 subtests) =============
[09:29:49] [PASSED] drm_test_cmdline_force_d_only
[09:29:49] [PASSED] drm_test_cmdline_force_D_only_dvi
[09:29:49] [PASSED] drm_test_cmdline_force_D_only_hdmi
[09:29:49] [PASSED] drm_test_cmdline_force_D_only_not_digital
[09:29:49] [PASSED] drm_test_cmdline_force_e_only
[09:29:49] [PASSED] drm_test_cmdline_res
[09:29:49] [PASSED] drm_test_cmdline_res_vesa
[09:29:49] [PASSED] drm_test_cmdline_res_vesa_rblank
[09:29:49] [PASSED] drm_test_cmdline_res_rblank
[09:29:49] [PASSED] drm_test_cmdline_res_bpp
[09:29:49] [PASSED] drm_test_cmdline_res_refresh
[09:29:49] [PASSED] drm_test_cmdline_res_bpp_refresh
[09:29:49] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[09:29:49] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[09:29:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[09:29:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[09:29:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[09:29:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[09:29:49] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[09:29:49] [PASSED] drm_test_cmdline_res_margins_force_on
[09:29:49] [PASSED] drm_test_cmdline_res_vesa_margins
[09:29:49] [PASSED] drm_test_cmdline_name
[09:29:49] [PASSED] drm_test_cmdline_name_bpp
[09:29:49] [PASSED] drm_test_cmdline_name_option
[09:29:49] [PASSED] drm_test_cmdline_name_bpp_option
[09:29:49] [PASSED] drm_test_cmdline_rotate_0
[09:29:49] [PASSED] drm_test_cmdline_rotate_90
[09:29:49] [PASSED] drm_test_cmdline_rotate_180
[09:29:49] [PASSED] drm_test_cmdline_rotate_270
[09:29:49] [PASSED] drm_test_cmdline_hmirror
[09:29:49] [PASSED] drm_test_cmdline_vmirror
[09:29:49] [PASSED] drm_test_cmdline_margin_options
[09:29:49] [PASSED] drm_test_cmdline_multiple_options
[09:29:49] [PASSED] drm_test_cmdline_bpp_extra_and_option
[09:29:49] [PASSED] drm_test_cmdline_extra_and_option
[09:29:49] [PASSED] drm_test_cmdline_freestanding_options
[09:29:49] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[09:29:49] [PASSED] drm_test_cmdline_panel_orientation
[09:29:49] ================ drm_test_cmdline_invalid =================
[09:29:49] [PASSED] margin_only
[09:29:49] [PASSED] interlace_only
[09:29:49] [PASSED] res_missing_x
[09:29:49] [PASSED] res_missing_y
[09:29:49] [PASSED] res_bad_y
[09:29:49] [PASSED] res_missing_y_bpp
[09:29:49] [PASSED] res_bad_bpp
[09:29:49] [PASSED] res_bad_refresh
[09:29:49] [PASSED] res_bpp_refresh_force_on_off
[09:29:49] [PASSED] res_invalid_mode
[09:29:49] [PASSED] res_bpp_wrong_place_mode
[09:29:49] [PASSED] name_bpp_refresh
[09:29:49] [PASSED] name_refresh
[09:29:49] [PASSED] name_refresh_wrong_mode
[09:29:49] [PASSED] name_refresh_invalid_mode
[09:29:49] [PASSED] rotate_multiple
[09:29:49] [PASSED] rotate_invalid_val
[09:29:49] [PASSED] rotate_truncated
[09:29:49] [PASSED] invalid_option
[09:29:49] [PASSED] invalid_tv_option
[09:29:49] [PASSED] truncated_tv_option
[09:29:49] ============ [PASSED] drm_test_cmdline_invalid =============
[09:29:49] =============== drm_test_cmdline_tv_options ===============
[09:29:49] [PASSED] NTSC
[09:29:49] [PASSED] NTSC_443
[09:29:49] [PASSED] NTSC_J
[09:29:49] [PASSED] PAL
[09:29:49] [PASSED] PAL_M
[09:29:49] [PASSED] PAL_N
[09:29:49] [PASSED] SECAM
[09:29:49] [PASSED] MONO_525
[09:29:49] [PASSED] MONO_625
[09:29:49] =========== [PASSED] drm_test_cmdline_tv_options ===========
[09:29:49] =============== [PASSED] drm_cmdline_parser ================
[09:29:49] ========== drmm_connector_hdmi_init (20 subtests) ==========
[09:29:49] [PASSED] drm_test_connector_hdmi_init_valid
[09:29:49] [PASSED] drm_test_connector_hdmi_init_bpc_8
[09:29:49] [PASSED] drm_test_connector_hdmi_init_bpc_10
[09:29:49] [PASSED] drm_test_connector_hdmi_init_bpc_12
[09:29:49] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[09:29:49] [PASSED] drm_test_connector_hdmi_init_bpc_null
[09:29:49] [PASSED] drm_test_connector_hdmi_init_formats_empty
[09:29:49] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[09:29:49] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[09:29:49] [PASSED] supported_formats=0x9 yuv420_allowed=1
[09:29:49] [PASSED] supported_formats=0x9 yuv420_allowed=0
[09:29:49] [PASSED] supported_formats=0x5 yuv420_allowed=1
[09:29:49] [PASSED] supported_formats=0x5 yuv420_allowed=0
[09:29:49] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[09:29:49] [PASSED] drm_test_connector_hdmi_init_null_ddc
[09:29:49] [PASSED] drm_test_connector_hdmi_init_null_product
[09:29:49] [PASSED] drm_test_connector_hdmi_init_null_vendor
[09:29:49] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[09:29:49] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[09:29:49] [PASSED] drm_test_connector_hdmi_init_product_valid
[09:29:49] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[09:29:49] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[09:29:49] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[09:29:49] ========= drm_test_connector_hdmi_init_type_valid =========
[09:29:49] [PASSED] HDMI-A
[09:29:49] [PASSED] HDMI-B
[09:29:49] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[09:29:49] ======== drm_test_connector_hdmi_init_type_invalid ========
[09:29:49] [PASSED] Unknown
[09:29:49] [PASSED] VGA
[09:29:49] [PASSED] DVI-I
[09:29:49] [PASSED] DVI-D
[09:29:49] [PASSED] DVI-A
[09:29:49] [PASSED] Composite
[09:29:49] [PASSED] SVIDEO
[09:29:49] [PASSED] LVDS
[09:29:49] [PASSED] Component
[09:29:49] [PASSED] DIN
[09:29:49] [PASSED] DP
[09:29:49] [PASSED] TV
[09:29:49] [PASSED] eDP
[09:29:49] [PASSED] Virtual
[09:29:49] [PASSED] DSI
[09:29:49] [PASSED] DPI
[09:29:49] [PASSED] Writeback
[09:29:49] [PASSED] SPI
[09:29:49] [PASSED] USB
[09:29:49] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[09:29:49] ============ [PASSED] drmm_connector_hdmi_init =============
[09:29:49] ============= drmm_connector_init (3 subtests) =============
[09:29:49] [PASSED] drm_test_drmm_connector_init
[09:29:49] [PASSED] drm_test_drmm_connector_init_null_ddc
[09:29:49] ========= drm_test_drmm_connector_init_type_valid =========
[09:29:49] [PASSED] Unknown
[09:29:49] [PASSED] VGA
[09:29:49] [PASSED] DVI-I
[09:29:49] [PASSED] DVI-D
[09:29:49] [PASSED] DVI-A
[09:29:49] [PASSED] Composite
[09:29:49] [PASSED] SVIDEO
[09:29:49] [PASSED] LVDS
[09:29:49] [PASSED] Component
[09:29:49] [PASSED] DIN
[09:29:49] [PASSED] DP
[09:29:49] [PASSED] HDMI-A
[09:29:49] [PASSED] HDMI-B
[09:29:49] [PASSED] TV
[09:29:49] [PASSED] eDP
[09:29:49] [PASSED] Virtual
[09:29:49] [PASSED] DSI
[09:29:49] [PASSED] DPI
[09:29:49] [PASSED] Writeback
[09:29:49] [PASSED] SPI
[09:29:49] [PASSED] USB
[09:29:49] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[09:29:49] =============== [PASSED] drmm_connector_init ===============
[09:29:49] ========= drm_connector_dynamic_init (6 subtests) ==========
[09:29:49] [PASSED] drm_test_drm_connector_dynamic_init
[09:29:49] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[09:29:49] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[09:29:49] [PASSED] drm_test_drm_connector_dynamic_init_properties
[09:29:49] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[09:29:49] [PASSED] Unknown
[09:29:49] [PASSED] VGA
[09:29:49] [PASSED] DVI-I
[09:29:49] [PASSED] DVI-D
[09:29:49] [PASSED] DVI-A
[09:29:49] [PASSED] Composite
[09:29:49] [PASSED] SVIDEO
[09:29:49] [PASSED] LVDS
[09:29:49] [PASSED] Component
[09:29:49] [PASSED] DIN
[09:29:49] [PASSED] DP
[09:29:49] [PASSED] HDMI-A
[09:29:49] [PASSED] HDMI-B
[09:29:49] [PASSED] TV
[09:29:49] [PASSED] eDP
[09:29:49] [PASSED] Virtual
[09:29:49] [PASSED] DSI
[09:29:49] [PASSED] DPI
[09:29:49] [PASSED] Writeback
[09:29:49] [PASSED] SPI
[09:29:49] [PASSED] USB
[09:29:49] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[09:29:49] ======== drm_test_drm_connector_dynamic_init_name =========
[09:29:49] [PASSED] Unknown
[09:29:49] [PASSED] VGA
[09:29:49] [PASSED] DVI-I
[09:29:49] [PASSED] DVI-D
[09:29:49] [PASSED] DVI-A
[09:29:49] [PASSED] Composite
[09:29:49] [PASSED] SVIDEO
[09:29:49] [PASSED] LVDS
[09:29:49] [PASSED] Component
[09:29:49] [PASSED] DIN
[09:29:49] [PASSED] DP
[09:29:49] [PASSED] HDMI-A
[09:29:49] [PASSED] HDMI-B
[09:29:49] [PASSED] TV
[09:29:49] [PASSED] eDP
[09:29:49] [PASSED] Virtual
[09:29:49] [PASSED] DSI
[09:29:49] [PASSED] DPI
[09:29:49] [PASSED] Writeback
[09:29:49] [PASSED] SPI
[09:29:49] [PASSED] USB
[09:29:49] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[09:29:49] =========== [PASSED] drm_connector_dynamic_init ============
[09:29:49] ==== drm_connector_dynamic_register_early (4 subtests) =====
[09:29:49] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[09:29:49] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[09:29:49] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[09:29:49] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[09:29:49] ====== [PASSED] drm_connector_dynamic_register_early =======
[09:29:49] ======= drm_connector_dynamic_register (7 subtests) ========
[09:29:49] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[09:29:49] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[09:29:49] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[09:29:49] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[09:29:49] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[09:29:49] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[09:29:49] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[09:29:49] ========= [PASSED] drm_connector_dynamic_register ==========
[09:29:49] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[09:29:49] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[09:29:49] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[09:29:49] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[09:29:49] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[09:29:49] ========== drm_test_get_tv_mode_from_name_valid ===========
[09:29:49] [PASSED] NTSC
[09:29:49] [PASSED] NTSC-443
[09:29:49] [PASSED] NTSC-J
[09:29:49] [PASSED] PAL
[09:29:49] [PASSED] PAL-M
[09:29:49] [PASSED] PAL-N
[09:29:49] [PASSED] SECAM
[09:29:49] [PASSED] Mono
[09:29:49] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[09:29:49] [PASSED] drm_test_get_tv_mode_from_name_truncated
[09:29:49] ============ [PASSED] drm_get_tv_mode_from_name ============
[09:29:49] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[09:29:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[09:29:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[09:29:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[09:29:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[09:29:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[09:29:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[09:29:49] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[09:29:49] [PASSED] VIC 96
[09:29:49] [PASSED] VIC 97
[09:29:49] [PASSED] VIC 101
[09:29:49] [PASSED] VIC 102
[09:29:49] [PASSED] VIC 106
[09:29:49] [PASSED] VIC 107
[09:29:49] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[09:29:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[09:29:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[09:29:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[09:29:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[09:29:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[09:29:49] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[09:29:49] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[09:29:49] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[09:29:49] [PASSED] Automatic
[09:29:49] [PASSED] Full
[09:29:49] [PASSED] Limited 16:235
[09:29:49] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[09:29:49] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[09:29:49] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[09:29:49] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[09:29:49] === drm_test_drm_hdmi_connector_get_output_format_name ====
[09:29:49] [PASSED] RGB
[09:29:49] [PASSED] YUV 4:2:0
[09:29:49] [PASSED] YUV 4:2:2
[09:29:49] [PASSED] YUV 4:4:4
[09:29:49] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[09:29:49] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[09:29:49] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[09:29:49] ============= drm_damage_helper (21 subtests) ==============
[09:29:49] [PASSED] drm_test_damage_iter_no_damage
[09:29:49] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[09:29:49] [PASSED] drm_test_damage_iter_no_damage_src_moved
[09:29:49] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[09:29:49] [PASSED] drm_test_damage_iter_no_damage_not_visible
[09:29:49] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[09:29:49] [PASSED] drm_test_damage_iter_no_damage_no_fb
[09:29:49] [PASSED] drm_test_damage_iter_simple_damage
[09:29:49] [PASSED] drm_test_damage_iter_single_damage
[09:29:49] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[09:29:49] [PASSED] drm_test_damage_iter_single_damage_outside_src
[09:29:49] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[09:29:49] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[09:29:49] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[09:29:49] [PASSED] drm_test_damage_iter_single_damage_src_moved
[09:29:49] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[09:29:49] [PASSED] drm_test_damage_iter_damage
[09:29:49] [PASSED] drm_test_damage_iter_damage_one_intersect
[09:29:49] [PASSED] drm_test_damage_iter_damage_one_outside
[09:29:49] [PASSED] drm_test_damage_iter_damage_src_moved
[09:29:49] [PASSED] drm_test_damage_iter_damage_not_visible
[09:29:49] ================ [PASSED] drm_damage_helper ================
[09:29:49] ============== drm_dp_mst_helper (3 subtests) ==============
[09:29:49] ============== drm_test_dp_mst_calc_pbn_mode ==============
[09:29:49] [PASSED] Clock 154000 BPP 30 DSC disabled
[09:29:49] [PASSED] Clock 234000 BPP 30 DSC disabled
[09:29:49] [PASSED] Clock 297000 BPP 24 DSC disabled
[09:29:49] [PASSED] Clock 332880 BPP 24 DSC enabled
[09:29:49] [PASSED] Clock 324540 BPP 24 DSC enabled
[09:29:49] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[09:29:49] ============== drm_test_dp_mst_calc_pbn_div ===============
[09:29:49] [PASSED] Link rate 2000000 lane count 4
[09:29:49] [PASSED] Link rate 2000000 lane count 2
[09:29:49] [PASSED] Link rate 2000000 lane count 1
[09:29:49] [PASSED] Link rate 1350000 lane count 4
[09:29:49] [PASSED] Link rate 1350000 lane count 2
[09:29:49] [PASSED] Link rate 1350000 lane count 1
[09:29:49] [PASSED] Link rate 1000000 lane count 4
[09:29:49] [PASSED] Link rate 1000000 lane count 2
[09:29:49] [PASSED] Link rate 1000000 lane count 1
[09:29:49] [PASSED] Link rate 810000 lane count 4
[09:29:49] [PASSED] Link rate 810000 lane count 2
[09:29:49] [PASSED] Link rate 810000 lane count 1
[09:29:49] [PASSED] Link rate 540000 lane count 4
[09:29:49] [PASSED] Link rate 540000 lane count 2
[09:29:49] [PASSED] Link rate 540000 lane count 1
[09:29:49] [PASSED] Link rate 270000 lane count 4
[09:29:49] [PASSED] Link rate 270000 lane count 2
[09:29:49] [PASSED] Link rate 270000 lane count 1
[09:29:49] [PASSED] Link rate 162000 lane count 4
[09:29:49] [PASSED] Link rate 162000 lane count 2
[09:29:49] [PASSED] Link rate 162000 lane count 1
[09:29:49] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[09:29:49] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[09:29:49] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[09:29:49] [PASSED] DP_POWER_UP_PHY with port number
[09:29:49] [PASSED] DP_POWER_DOWN_PHY with port number
[09:29:49] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[09:29:49] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[09:29:49] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[09:29:49] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[09:29:49] [PASSED] DP_QUERY_PAYLOAD with port number
[09:29:49] [PASSED] DP_QUERY_PAYLOAD with VCPI
[09:29:49] [PASSED] DP_REMOTE_DPCD_READ with port number
[09:29:49] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[09:29:49] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[09:29:49] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[09:29:49] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[09:29:49] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[09:29:49] [PASSED] DP_REMOTE_I2C_READ with port number
[09:29:49] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[09:29:49] [PASSED] DP_REMOTE_I2C_READ with transactions array
[09:29:49] [PASSED] DP_REMOTE_I2C_WRITE with port number
[09:29:49] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[09:29:49] [PASSED] DP_REMOTE_I2C_WRITE with data array
[09:29:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[09:29:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[09:29:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[09:29:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[09:29:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[09:29:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[09:29:49] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[09:29:49] ================ [PASSED] drm_dp_mst_helper ================
[09:29:49] ================== drm_exec (7 subtests) ===================
[09:29:49] [PASSED] sanitycheck
[09:29:49] [PASSED] test_lock
[09:29:49] [PASSED] test_lock_unlock
[09:29:49] [PASSED] test_duplicates
[09:29:49] [PASSED] test_prepare
[09:29:49] [PASSED] test_prepare_array
[09:29:49] [PASSED] test_multiple_loops
[09:29:49] ==================== [PASSED] drm_exec =====================
[09:29:49] =========== drm_format_helper_test (17 subtests) ===========
[09:29:49] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[09:29:49] [PASSED] single_pixel_source_buffer
[09:29:49] [PASSED] single_pixel_clip_rectangle
[09:29:49] [PASSED] well_known_colors
[09:29:49] [PASSED] destination_pitch
[09:29:49] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[09:29:49] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[09:29:49] [PASSED] single_pixel_source_buffer
[09:29:49] [PASSED] single_pixel_clip_rectangle
[09:29:49] [PASSED] well_known_colors
[09:29:49] [PASSED] destination_pitch
[09:29:49] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[09:29:49] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[09:29:49] [PASSED] single_pixel_source_buffer
[09:29:49] [PASSED] single_pixel_clip_rectangle
[09:29:49] [PASSED] well_known_colors
[09:29:49] [PASSED] destination_pitch
[09:29:49] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[09:29:49] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[09:29:49] [PASSED] single_pixel_source_buffer
[09:29:49] [PASSED] single_pixel_clip_rectangle
[09:29:49] [PASSED] well_known_colors
[09:29:49] [PASSED] destination_pitch
[09:29:49] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[09:29:49] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[09:29:49] [PASSED] single_pixel_source_buffer
[09:29:49] [PASSED] single_pixel_clip_rectangle
[09:29:49] [PASSED] well_known_colors
[09:29:49] [PASSED] destination_pitch
[09:29:49] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[09:29:49] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[09:29:49] [PASSED] single_pixel_source_buffer
[09:29:49] [PASSED] single_pixel_clip_rectangle
[09:29:49] [PASSED] well_known_colors
[09:29:49] [PASSED] destination_pitch
[09:29:49] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[09:29:49] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[09:29:49] [PASSED] single_pixel_source_buffer
[09:29:49] [PASSED] single_pixel_clip_rectangle
[09:29:49] [PASSED] well_known_colors
[09:29:49] [PASSED] destination_pitch
[09:29:49] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[09:29:49] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[09:29:49] [PASSED] single_pixel_source_buffer
[09:29:49] [PASSED] single_pixel_clip_rectangle
[09:29:49] [PASSED] well_known_colors
[09:29:49] [PASSED] destination_pitch
[09:29:49] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[09:29:49] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[09:29:49] [PASSED] single_pixel_source_buffer
[09:29:49] [PASSED] single_pixel_clip_rectangle
[09:29:49] [PASSED] well_known_colors
[09:29:49] [PASSED] destination_pitch
[09:29:49] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[09:29:49] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[09:29:49] [PASSED] single_pixel_source_buffer
[09:29:49] [PASSED] single_pixel_clip_rectangle
[09:29:49] [PASSED] well_known_colors
[09:29:49] [PASSED] destination_pitch
[09:29:49] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[09:29:49] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[09:29:49] [PASSED] single_pixel_source_buffer
[09:29:49] [PASSED] single_pixel_clip_rectangle
[09:29:49] [PASSED] well_known_colors
[09:29:49] [PASSED] destination_pitch
[09:29:49] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[09:29:49] ============== drm_test_fb_xrgb8888_to_mono ===============
[09:29:49] [PASSED] single_pixel_source_buffer
[09:29:49] [PASSED] single_pixel_clip_rectangle
[09:29:49] [PASSED] well_known_colors
[09:29:49] [PASSED] destination_pitch
[09:29:49] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[09:29:49] ==================== drm_test_fb_swab =====================
[09:29:49] [PASSED] single_pixel_source_buffer
[09:29:49] [PASSED] single_pixel_clip_rectangle
[09:29:49] [PASSED] well_known_colors
[09:29:49] [PASSED] destination_pitch
[09:29:49] ================ [PASSED] drm_test_fb_swab =================
[09:29:49] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[09:29:49] [PASSED] single_pixel_source_buffer
[09:29:49] [PASSED] single_pixel_clip_rectangle
[09:29:49] [PASSED] well_known_colors
[09:29:49] [PASSED] destination_pitch
[09:29:49] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[09:29:49] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[09:29:49] [PASSED] single_pixel_source_buffer
[09:29:49] [PASSED] single_pixel_clip_rectangle
[09:29:49] [PASSED] well_known_colors
[09:29:49] [PASSED] destination_pitch
[09:29:49] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[09:29:49] ================= drm_test_fb_clip_offset =================
[09:29:49] [PASSED] pass through
[09:29:49] [PASSED] horizontal offset
[09:29:49] [PASSED] vertical offset
[09:29:49] [PASSED] horizontal and vertical offset
[09:29:49] [PASSED] horizontal offset (custom pitch)
[09:29:49] [PASSED] vertical offset (custom pitch)
[09:29:49] [PASSED] horizontal and vertical offset (custom pitch)
[09:29:49] ============= [PASSED] drm_test_fb_clip_offset =============
[09:29:49] =================== drm_test_fb_memcpy ====================
[09:29:49] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[09:29:49] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[09:29:49] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[09:29:49] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[09:29:49] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[09:29:49] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[09:29:49] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[09:29:49] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[09:29:49] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[09:29:49] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[09:29:49] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[09:29:49] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[09:29:49] =============== [PASSED] drm_test_fb_memcpy ================
[09:29:49] ============= [PASSED] drm_format_helper_test ==============
[09:29:49] ================= drm_format (18 subtests) =================
[09:29:49] [PASSED] drm_test_format_block_width_invalid
[09:29:49] [PASSED] drm_test_format_block_width_one_plane
[09:29:49] [PASSED] drm_test_format_block_width_two_plane
[09:29:49] [PASSED] drm_test_format_block_width_three_plane
[09:29:49] [PASSED] drm_test_format_block_width_tiled
[09:29:49] [PASSED] drm_test_format_block_height_invalid
[09:29:49] [PASSED] drm_test_format_block_height_one_plane
[09:29:49] [PASSED] drm_test_format_block_height_two_plane
[09:29:49] [PASSED] drm_test_format_block_height_three_plane
[09:29:49] [PASSED] drm_test_format_block_height_tiled
[09:29:49] [PASSED] drm_test_format_min_pitch_invalid
[09:29:49] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[09:29:49] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[09:29:49] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[09:29:49] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[09:29:49] [PASSED] drm_test_format_min_pitch_two_plane
[09:29:49] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[09:29:49] [PASSED] drm_test_format_min_pitch_tiled
[09:29:49] =================== [PASSED] drm_format ====================
[09:29:49] ============== drm_framebuffer (10 subtests) ===============
[09:29:49] ========== drm_test_framebuffer_check_src_coords ==========
[09:29:49] [PASSED] Success: source fits into fb
[09:29:49] [PASSED] Fail: overflowing fb with x-axis coordinate
[09:29:49] [PASSED] Fail: overflowing fb with y-axis coordinate
[09:29:49] [PASSED] Fail: overflowing fb with source width
[09:29:49] [PASSED] Fail: overflowing fb with source height
[09:29:49] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[09:29:49] [PASSED] drm_test_framebuffer_cleanup
[09:29:49] =============== drm_test_framebuffer_create ===============
[09:29:49] [PASSED] ABGR8888 normal sizes
[09:29:49] [PASSED] ABGR8888 max sizes
[09:29:49] [PASSED] ABGR8888 pitch greater than min required
[09:29:49] [PASSED] ABGR8888 pitch less than min required
[09:29:49] [PASSED] ABGR8888 Invalid width
[09:29:49] [PASSED] ABGR8888 Invalid buffer handle
[09:29:49] [PASSED] No pixel format
[09:29:49] [PASSED] ABGR8888 Width 0
[09:29:49] [PASSED] ABGR8888 Height 0
[09:29:49] [PASSED] ABGR8888 Out of bound height * pitch combination
[09:29:49] [PASSED] ABGR8888 Large buffer offset
[09:29:49] [PASSED] ABGR8888 Buffer offset for inexistent plane
[09:29:49] [PASSED] ABGR8888 Invalid flag
[09:29:49] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[09:29:49] [PASSED] ABGR8888 Valid buffer modifier
[09:29:49] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[09:29:49] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[09:29:49] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[09:29:49] [PASSED] NV12 Normal sizes
[09:29:49] [PASSED] NV12 Max sizes
[09:29:49] [PASSED] NV12 Invalid pitch
[09:29:49] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[09:29:49] [PASSED] NV12 different modifier per-plane
[09:29:49] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[09:29:49] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[09:29:49] [PASSED] NV12 Modifier for inexistent plane
[09:29:49] [PASSED] NV12 Handle for inexistent plane
[09:29:49] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[09:29:49] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[09:29:49] [PASSED] YVU420 Normal sizes
[09:29:49] [PASSED] YVU420 Max sizes
[09:29:49] [PASSED] YVU420 Invalid pitch
[09:29:49] [PASSED] YVU420 Different pitches
[09:29:49] [PASSED] YVU420 Different buffer offsets/pitches
[09:29:49] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[09:29:49] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[09:29:49] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[09:29:49] [PASSED] YVU420 Valid modifier
[09:29:49] [PASSED] YVU420 Different modifiers per plane
[09:29:49] [PASSED] YVU420 Modifier for inexistent plane
[09:29:49] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[09:29:49] [PASSED] X0L2 Normal sizes
[09:29:49] [PASSED] X0L2 Max sizes
[09:29:49] [PASSED] X0L2 Invalid pitch
[09:29:49] [PASSED] X0L2 Pitch greater than minimum required
[09:29:49] [PASSED] X0L2 Handle for inexistent plane
[09:29:49] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[09:29:49] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[09:29:49] [PASSED] X0L2 Valid modifier
[09:29:49] [PASSED] X0L2 Modifier for inexistent plane
[09:29:49] =========== [PASSED] drm_test_framebuffer_create ===========
[09:29:49] [PASSED] drm_test_framebuffer_free
[09:29:49] [PASSED] drm_test_framebuffer_init
[09:29:49] [PASSED] drm_test_framebuffer_init_bad_format
[09:29:49] [PASSED] drm_test_framebuffer_init_dev_mismatch
[09:29:49] [PASSED] drm_test_framebuffer_lookup
[09:29:49] [PASSED] drm_test_framebuffer_lookup_inexistent
[09:29:49] [PASSED] drm_test_framebuffer_modifiers_not_supported
[09:29:49] ================= [PASSED] drm_framebuffer =================
[09:29:49] ================ drm_gem_shmem (8 subtests) ================
[09:29:49] [PASSED] drm_gem_shmem_test_obj_create
[09:29:49] [PASSED] drm_gem_shmem_test_obj_create_private
[09:29:49] [PASSED] drm_gem_shmem_test_pin_pages
[09:29:49] [PASSED] drm_gem_shmem_test_vmap
[09:29:49] [PASSED] drm_gem_shmem_test_get_sg_table
[09:29:49] [PASSED] drm_gem_shmem_test_get_pages_sgt
[09:29:49] [PASSED] drm_gem_shmem_test_madvise
[09:29:49] [PASSED] drm_gem_shmem_test_purge
[09:29:49] ================== [PASSED] drm_gem_shmem ==================
[09:29:49] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[09:29:49] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[09:29:49] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[09:29:49] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[09:29:49] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[09:29:49] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[09:29:49] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[09:29:49] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[09:29:49] [PASSED] Automatic
[09:29:49] [PASSED] Full
[09:29:49] [PASSED] Limited 16:235
[09:29:49] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[09:29:49] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[09:29:49] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[09:29:49] [PASSED] drm_test_check_disable_connector
[09:29:49] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[09:29:49] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[09:29:49] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[09:29:49] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[09:29:49] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[09:29:49] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[09:29:49] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[09:29:49] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[09:29:49] [PASSED] drm_test_check_output_bpc_dvi
[09:29:49] [PASSED] drm_test_check_output_bpc_format_vic_1
[09:29:49] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[09:29:49] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[09:29:49] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[09:29:49] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[09:29:49] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[09:29:49] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[09:29:49] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[09:29:49] ============ drm_test_check_hdmi_color_format =============
[09:29:49] [PASSED] AUTO -> RGB
[09:29:49] [PASSED] YCBCR422 -> YUV422
[09:29:49] [PASSED] YCBCR420 -> YUV420
[09:29:49] [PASSED] YCBCR444 -> YUV444
[09:29:49] [PASSED] RGB -> RGB
[09:29:49] ======== [PASSED] drm_test_check_hdmi_color_format =========
[09:29:49] ======== drm_test_check_hdmi_color_format_420_only ========
[09:29:49] [PASSED] RGB should fail
[09:29:49] [PASSED] YUV444 should fail
[09:29:49] [PASSED] YUV422 should fail
[09:29:49] [PASSED] YUV420 should work
[09:29:49] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[09:29:49] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[09:29:49] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[09:29:49] [PASSED] drm_test_check_broadcast_rgb_value
[09:29:49] [PASSED] drm_test_check_bpc_8_value
[09:29:49] [PASSED] drm_test_check_bpc_10_value
[09:29:49] [PASSED] drm_test_check_bpc_12_value
[09:29:49] [PASSED] drm_test_check_format_value
[09:29:49] [PASSED] drm_test_check_tmds_char_value
[09:29:49] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[09:29:49] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[09:29:49] [PASSED] drm_test_check_mode_valid
[09:29:49] [PASSED] drm_test_check_mode_valid_reject
[09:29:49] [PASSED] drm_test_check_mode_valid_reject_rate
[09:29:49] [PASSED] drm_test_check_mode_valid_reject_max_clock
[09:29:49] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[09:29:49] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[09:29:49] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[09:29:49] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[09:29:49] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[09:29:49] [PASSED] drm_test_check_infoframes
[09:29:49] [PASSED] drm_test_check_reject_avi_infoframe
[09:29:49] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[09:29:49] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[09:29:49] [PASSED] drm_test_check_reject_audio_infoframe
[09:29:49] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[09:29:49] ================= drm_managed (2 subtests) =================
[09:29:49] [PASSED] drm_test_managed_release_action
[09:29:49] [PASSED] drm_test_managed_run_action
[09:29:49] =================== [PASSED] drm_managed ===================
[09:29:49] =================== drm_mm (6 subtests) ====================
[09:29:49] [PASSED] drm_test_mm_init
[09:29:49] [PASSED] drm_test_mm_debug
[09:29:49] [PASSED] drm_test_mm_align32
[09:29:49] [PASSED] drm_test_mm_align64
[09:29:49] [PASSED] drm_test_mm_lowest
[09:29:49] [PASSED] drm_test_mm_highest
[09:29:49] ===================== [PASSED] drm_mm ======================
[09:29:49] ============= drm_modes_analog_tv (5 subtests) =============
[09:29:49] [PASSED] drm_test_modes_analog_tv_mono_576i
[09:29:49] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[09:29:49] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[09:29:49] [PASSED] drm_test_modes_analog_tv_pal_576i
[09:29:49] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[09:29:49] =============== [PASSED] drm_modes_analog_tv ===============
[09:29:49] ============== drm_plane_helper (2 subtests) ===============
[09:29:49] =============== drm_test_check_plane_state ================
[09:29:49] [PASSED] clipping_simple
[09:29:49] [PASSED] clipping_rotate_reflect
[09:29:49] [PASSED] positioning_simple
[09:29:49] [PASSED] upscaling
[09:29:49] [PASSED] downscaling
[09:29:49] [PASSED] rounding1
[09:29:49] [PASSED] rounding2
[09:29:49] [PASSED] rounding3
[09:29:49] [PASSED] rounding4
[09:29:49] =========== [PASSED] drm_test_check_plane_state ============
[09:29:49] =========== drm_test_check_invalid_plane_state ============
[09:29:49] [PASSED] positioning_invalid
[09:29:49] [PASSED] upscaling_invalid
[09:29:49] [PASSED] downscaling_invalid
[09:29:49] ======= [PASSED] drm_test_check_invalid_plane_state ========
[09:29:49] ================ [PASSED] drm_plane_helper =================
[09:29:49] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[09:29:49] ====== drm_test_connector_helper_tv_get_modes_check =======
[09:29:49] [PASSED] None
[09:29:49] [PASSED] PAL
[09:29:49] [PASSED] NTSC
[09:29:49] [PASSED] Both, NTSC Default
[09:29:49] [PASSED] Both, PAL Default
[09:29:49] [PASSED] Both, NTSC Default, with PAL on command-line
[09:29:49] [PASSED] Both, PAL Default, with NTSC on command-line
[09:29:49] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[09:29:49] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[09:29:49] ================== drm_rect (9 subtests) ===================
[09:29:49] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[09:29:49] [PASSED] drm_test_rect_clip_scaled_not_clipped
[09:29:49] [PASSED] drm_test_rect_clip_scaled_clipped
[09:29:49] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[09:29:49] ================= drm_test_rect_intersect =================
[09:29:49] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[09:29:49] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[09:29:49] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[09:29:49] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[09:29:49] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[09:29:49] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[09:29:49] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[09:29:49] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[09:29:49] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[09:29:49] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[09:29:49] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[09:29:49] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[09:29:49] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[09:29:49] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[09:29:49] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[09:29:49] ============= [PASSED] drm_test_rect_intersect =============
[09:29:49] ================ drm_test_rect_calc_hscale ================
[09:29:49] [PASSED] normal use
[09:29:49] [PASSED] out of max range
[09:29:49] [PASSED] out of min range
[09:29:49] [PASSED] zero dst
[09:29:49] [PASSED] negative src
[09:29:49] [PASSED] negative dst
[09:29:49] ============ [PASSED] drm_test_rect_calc_hscale ============
[09:29:49] ================ drm_test_rect_calc_vscale ================
[09:29:49] [PASSED] normal use
[09:29:49] [PASSED] out of max range
[09:29:49] [PASSED] out of min range
[09:29:49] [PASSED] zero dst
[09:29:49] [PASSED] negative src
[09:29:49] [PASSED] negative dst
[09:29:49] ============ [PASSED] drm_test_rect_calc_vscale ============
[09:29:49] ================== drm_test_rect_rotate ===================
[09:29:49] [PASSED] reflect-x
[09:29:49] [PASSED] reflect-y
[09:29:49] [PASSED] rotate-0
[09:29:49] [PASSED] rotate-90
[09:29:49] [PASSED] rotate-180
[09:29:49] [PASSED] rotate-270
[09:29:49] ============== [PASSED] drm_test_rect_rotate ===============
[09:29:49] ================ drm_test_rect_rotate_inv =================
[09:29:49] [PASSED] reflect-x
[09:29:49] [PASSED] reflect-y
[09:29:49] [PASSED] rotate-0
[09:29:49] [PASSED] rotate-90
[09:29:49] [PASSED] rotate-180
[09:29:49] [PASSED] rotate-270
[09:29:49] ============ [PASSED] drm_test_rect_rotate_inv =============
[09:29:49] ==================== [PASSED] drm_rect =====================
[09:29:49] ============ drm_sysfb_modeset_test (1 subtest) ============
[09:29:49] ============ drm_test_sysfb_build_fourcc_list =============
[09:29:49] [PASSED] no native formats
[09:29:49] [PASSED] XRGB8888 as native format
[09:29:49] [PASSED] remove duplicates
[09:29:49] [PASSED] convert alpha formats
[09:29:49] [PASSED] random formats
[09:29:49] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[09:29:49] ============= [PASSED] drm_sysfb_modeset_test ==============
[09:29:49] ================== drm_fixp (2 subtests) ===================
[09:29:49] [PASSED] drm_test_int2fixp
[09:29:49] [PASSED] drm_test_sm2fixp
[09:29:49] ==================== [PASSED] drm_fixp =====================
[09:29:49] ============================================================
[09:29:49] Testing complete. Ran 637 tests: passed: 637
[09:29:49] Elapsed time: 26.666s total, 1.832s configuring, 24.669s building, 0.142s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[09:29:49] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:29:51] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:30:01] Starting KUnit Kernel (1/1)...
[09:30:01] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:30:01] ================= ttm_device (5 subtests) ==================
[09:30:01] [PASSED] ttm_device_init_basic
[09:30:01] [PASSED] ttm_device_init_multiple
[09:30:01] [PASSED] ttm_device_fini_basic
[09:30:01] [PASSED] ttm_device_init_no_vma_man
[09:30:01] ================== ttm_device_init_pools ==================
[09:30:01] [PASSED] No DMA allocations, no DMA32 required
[09:30:01] [PASSED] DMA allocations, DMA32 required
[09:30:01] [PASSED] No DMA allocations, DMA32 required
[09:30:01] [PASSED] DMA allocations, no DMA32 required
[09:30:01] ============== [PASSED] ttm_device_init_pools ==============
[09:30:01] =================== [PASSED] ttm_device ====================
[09:30:01] ================== ttm_pool (8 subtests) ===================
[09:30:01] ================== ttm_pool_alloc_basic ===================
[09:30:01] [PASSED] One page
[09:30:01] [PASSED] More than one page
[09:30:01] [PASSED] Above the allocation limit
[09:30:01] [PASSED] One page, with coherent DMA mappings enabled
[09:30:01] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:30:01] ============== [PASSED] ttm_pool_alloc_basic ===============
[09:30:01] ============== ttm_pool_alloc_basic_dma_addr ==============
[09:30:01] [PASSED] One page
[09:30:01] [PASSED] More than one page
[09:30:01] [PASSED] Above the allocation limit
[09:30:01] [PASSED] One page, with coherent DMA mappings enabled
[09:30:01] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:30:01] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[09:30:01] [PASSED] ttm_pool_alloc_order_caching_match
[09:30:01] [PASSED] ttm_pool_alloc_caching_mismatch
[09:30:01] [PASSED] ttm_pool_alloc_order_mismatch
[09:30:01] [PASSED] ttm_pool_free_dma_alloc
[09:30:01] [PASSED] ttm_pool_free_no_dma_alloc
[09:30:01] [PASSED] ttm_pool_fini_basic
[09:30:01] ==================== [PASSED] ttm_pool =====================
[09:30:01] ================ ttm_resource (8 subtests) =================
[09:30:01] ================= ttm_resource_init_basic =================
[09:30:01] [PASSED] Init resource in TTM_PL_SYSTEM
[09:30:01] [PASSED] Init resource in TTM_PL_VRAM
[09:30:01] [PASSED] Init resource in a private placement
[09:30:01] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[09:30:01] ============= [PASSED] ttm_resource_init_basic =============
[09:30:01] [PASSED] ttm_resource_init_pinned
[09:30:01] [PASSED] ttm_resource_fini_basic
[09:30:01] [PASSED] ttm_resource_manager_init_basic
[09:30:01] [PASSED] ttm_resource_manager_usage_basic
[09:30:01] [PASSED] ttm_resource_manager_set_used_basic
[09:30:01] [PASSED] ttm_sys_man_alloc_basic
[09:30:01] [PASSED] ttm_sys_man_free_basic
[09:30:01] ================== [PASSED] ttm_resource ===================
[09:30:01] =================== ttm_tt (15 subtests) ===================
[09:30:01] ==================== ttm_tt_init_basic ====================
[09:30:01] [PASSED] Page-aligned size
[09:30:01] [PASSED] Extra pages requested
[09:30:01] ================ [PASSED] ttm_tt_init_basic ================
[09:30:01] [PASSED] ttm_tt_init_misaligned
[09:30:01] [PASSED] ttm_tt_fini_basic
[09:30:01] [PASSED] ttm_tt_fini_sg
[09:30:01] [PASSED] ttm_tt_fini_shmem
[09:30:01] [PASSED] ttm_tt_create_basic
[09:30:01] [PASSED] ttm_tt_create_invalid_bo_type
[09:30:01] [PASSED] ttm_tt_create_ttm_exists
[09:30:01] [PASSED] ttm_tt_create_failed
[09:30:01] [PASSED] ttm_tt_destroy_basic
[09:30:01] [PASSED] ttm_tt_populate_null_ttm
[09:30:01] [PASSED] ttm_tt_populate_populated_ttm
[09:30:01] [PASSED] ttm_tt_unpopulate_basic
[09:30:01] [PASSED] ttm_tt_unpopulate_empty_ttm
[09:30:01] [PASSED] ttm_tt_swapin_basic
[09:30:01] ===================== [PASSED] ttm_tt ======================
[09:30:01] =================== ttm_bo (14 subtests) ===================
[09:30:01] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[09:30:01] [PASSED] Cannot be interrupted and sleeps
[09:30:01] [PASSED] Cannot be interrupted, locks straight away
[09:30:01] [PASSED] Can be interrupted, sleeps
[09:30:01] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[09:30:01] [PASSED] ttm_bo_reserve_locked_no_sleep
[09:30:01] [PASSED] ttm_bo_reserve_no_wait_ticket
[09:30:01] [PASSED] ttm_bo_reserve_double_resv
[09:30:01] [PASSED] ttm_bo_reserve_interrupted
[09:30:01] [PASSED] ttm_bo_reserve_deadlock
[09:30:01] [PASSED] ttm_bo_unreserve_basic
[09:30:01] [PASSED] ttm_bo_unreserve_pinned
[09:30:01] [PASSED] ttm_bo_unreserve_bulk
[09:30:01] [PASSED] ttm_bo_fini_basic
[09:30:01] [PASSED] ttm_bo_fini_shared_resv
[09:30:01] [PASSED] ttm_bo_pin_basic
[09:30:01] [PASSED] ttm_bo_pin_unpin_resource
[09:30:01] [PASSED] ttm_bo_multiple_pin_one_unpin
[09:30:01] ===================== [PASSED] ttm_bo ======================
[09:30:01] ============== ttm_bo_validate (22 subtests) ===============
[09:30:01] ============== ttm_bo_init_reserved_sys_man ===============
[09:30:01] [PASSED] Buffer object for userspace
[09:30:01] [PASSED] Kernel buffer object
[09:30:01] [PASSED] Shared buffer object
[09:30:01] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[09:30:01] ============== ttm_bo_init_reserved_mock_man ==============
[09:30:01] [PASSED] Buffer object for userspace
[09:30:01] [PASSED] Kernel buffer object
[09:30:01] [PASSED] Shared buffer object
[09:30:01] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[09:30:01] [PASSED] ttm_bo_init_reserved_resv
[09:30:01] ================== ttm_bo_validate_basic ==================
[09:30:01] [PASSED] Buffer object for userspace
[09:30:01] [PASSED] Kernel buffer object
[09:30:01] [PASSED] Shared buffer object
[09:30:01] ============== [PASSED] ttm_bo_validate_basic ==============
[09:30:01] [PASSED] ttm_bo_validate_invalid_placement
[09:30:01] ============= ttm_bo_validate_same_placement ==============
[09:30:01] [PASSED] System manager
[09:30:01] [PASSED] VRAM manager
[09:30:01] ========= [PASSED] ttm_bo_validate_same_placement ==========
[09:30:01] [PASSED] ttm_bo_validate_failed_alloc
[09:30:01] [PASSED] ttm_bo_validate_pinned
[09:30:01] [PASSED] ttm_bo_validate_busy_placement
[09:30:01] ================ ttm_bo_validate_multihop =================
[09:30:01] [PASSED] Buffer object for userspace
[09:30:01] [PASSED] Kernel buffer object
[09:30:01] [PASSED] Shared buffer object
[09:30:01] ============ [PASSED] ttm_bo_validate_multihop =============
[09:30:01] ========== ttm_bo_validate_no_placement_signaled ==========
[09:30:01] [PASSED] Buffer object in system domain, no page vector
[09:30:01] [PASSED] Buffer object in system domain with an existing page vector
[09:30:01] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[09:30:01] ======== ttm_bo_validate_no_placement_not_signaled ========
[09:30:01] [PASSED] Buffer object for userspace
[09:30:01] [PASSED] Kernel buffer object
[09:30:01] [PASSED] Shared buffer object
[09:30:01] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[09:30:01] [PASSED] ttm_bo_validate_move_fence_signaled
[09:30:01] ========= ttm_bo_validate_move_fence_not_signaled =========
[09:30:01] [PASSED] Waits for GPU
[09:30:01] [PASSED] Tries to lock straight away
[09:30:01] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[09:30:01] [PASSED] ttm_bo_validate_swapout
[09:30:01] [PASSED] ttm_bo_validate_happy_evict
[09:30:01] [PASSED] ttm_bo_validate_all_pinned_evict
[09:30:01] [PASSED] ttm_bo_validate_allowed_only_evict
[09:30:01] [PASSED] ttm_bo_validate_deleted_evict
[09:30:01] [PASSED] ttm_bo_validate_busy_domain_evict
[09:30:01] [PASSED] ttm_bo_validate_evict_gutting
[09:30:01] [PASSED] ttm_bo_validate_recrusive_evict
[09:30:01] ================= [PASSED] ttm_bo_validate =================
[09:30:01] ============================================================
[09:30:01] Testing complete. Ran 102 tests: passed: 102
[09:30:01] Elapsed time: 11.917s total, 1.800s configuring, 9.902s building, 0.185s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] drm/i915/color: Add YUV buffer support on HDR planes
2026-08-12 8:59 ` [PATCH 2/2] drm/i915/color: Add YUV buffer support on HDR planes Chaitanya Kumar Borah
@ 2026-08-12 9:48 ` sashiko-bot
0 siblings, 0 replies; 8+ messages in thread
From: sashiko-bot @ 2026-08-12 9:48 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-xe, intel-gfx
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Critical] Adding INTEL_PLANE_CB_CSC_FF to the color pipeline arrays increases their size beyond the MAX_COLOROP limit, causing a stack buffer overflow.
--
--- Patch [2]: [PATCH 2/2] drm/i915/color: Add YUV buffer support on HDR planes ---
commit 659bb21b3ebb587a758df27788a2ccbde4332e70
Author: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
drm/i915/color: Add YUV buffer support on HDR planes
This commit adds the INTEL_PLANE_CB_CSC_FF (fixed function CSC) color
block as the first stage for HDR planes to enable YUV-to-RGB color space
conversion. It also updates the CSC programming logic to account for the
color pipeline programming.
> diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> index 38cfd6ed585d0..3f76b8d80430b 100644
> --- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> +++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> @@ -31,6 +31,7 @@ static const struct drm_colorop_funcs intel_colorop_funcs = {
> * the pipeline totally unusable.
> */
> static const enum intel_color_block xe3plpd_primary_plane_pipeline[] = {
> + INTEL_PLANE_CB_CSC_FF,
> INTEL_PLANE_CB_PRE_CSC_LUT,
> INTEL_PLANE_CB_CSC,
> INTEL_PLANE_CB_3DLUT,
> @@ -38,6 +39,7 @@ static const enum intel_color_block xe3plpd_primary_plane_pipeline[] = {
> };
[Severity: Critical]
By adding this element, xe3plpd_primary_plane_pipeline now has 5 elements.
However, MAX_COLOROP is still defined as 4 in this file.
When initializing the pipeline in _intel_color_pipeline_plane_init(), the local
colorop array is sized using MAX_COLOROP:
struct intel_colorop *colorop[MAX_COLOROP];
...
if (plane_has_3dlut(display, pipe, plane)) {
pipeline = xe3plpd_primary_plane_pipeline;
pipeline_len = ARRAY_SIZE(xe3plpd_primary_plane_pipeline);
}
...
for (i = 0; i < pipeline_len; i++) {
colorop[i] = intel_color_pipeline_plane_add_colorop(plane, prev,
pipeline[i]);
Since pipeline_len evaluates to 5 for xe3plpd_primary_plane_pipeline, does this
loop overflow the colorop[] stack array on the final iteration?
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260812085908.3159828-1-chaitanya.kumar.borah@intel.com?part=2
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] [DO_NOT_REVIEW] drm/i915/color: Add color pipeline support for SDR planes
2026-08-12 8:59 ` [PATCH 1/2] [DO_NOT_REVIEW] drm/i915/color: Add color pipeline support for SDR planes Chaitanya Kumar Borah
@ 2026-08-12 9:56 ` sashiko-bot
0 siblings, 0 replies; 8+ messages in thread
From: sashiko-bot @ 2026-08-12 9:56 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-xe, intel-gfx
Thank you for your contribution! Sashiko AI review found 5 potential issue(s) to consider:
New issues:
- [High] Silent removal of `PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH` programming breaks HDR plane post-CSC LUT configuration.
- [High] Missing call to `icl_program_input_csc` for HDR planes leaves hardware coefficients uninitialized when CSC is enabled via the color pipeline on non-YUV framebuffers.
- [Medium] Bitwise truncation of `supported_fm` on 32-bit platforms bypasses API validation.
Pre-existing issues:
- [High] Dangling pointer in DRM object IDR due to missing `drm_mode_object_unregister()` in `drm_colorop_cleanup()`.
- [High] Unchecked `kasprintf()` failure leads to a NULL pointer dereference during color pipeline property creation.
--
--- Patch [1]: [PATCH 1/2] [DO_NOT_REVIEW] drm/i915/color: Add color pipeline support for SDR planes ---
commit 4109ddb0966a40508785d60da4c2c5b6e3b098a0
Author: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Subject: drm/i915/color: Add color pipeline support for SDR planes
This patch adds color pipeline support for SDR planes and introduces
fixed matrix color operations. It introduces new capabilities to program
pre-CSC and post-CSC LUTs conditionally based on whether a plane is HDR
or SDR.
Link: https://lore.kernel.org/intel-gfx/20260804123107.2256124-1-chaitanya.kumar.borah@intel.com/
> diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
> index 682fcc6515259..95da03d6c65c8 100644
> --- a/drivers/gpu/drm/drm_colorop.c
> +++ b/drivers/gpu/drm/drm_colorop.c
> @@ -453,6 +463,80 @@ int drm_plane_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *col
> }
> EXPORT_SYMBOL(drm_plane_colorop_3dlut_init);
>
> +/**
> + * drm_plane_colorop_fixed_matrix_init - Initialize a DRM_COLOROP_FIXED_MATRIX
> + *
> + * @dev: DRM device
> + * @colorop: The drm_colorop object to initialize
> + * @plane: The associated drm_plane
> + * @funcs: control functions for the new colorop
> + * @supported_fm: A bitfield of supported drm_colorop_fixed_matrix_type enum values,
> + * created using BIT(fixed_matrix_type) and combined with the OR '|'
> + * operator.
> + * @flags: bitmask of misc, see DRM_COLOROP_FLAG_* defines.
> + * @return zero on success, -E value on failure
> + */
> +int drm_plane_colorop_fixed_matrix_init(struct drm_device *dev, struct drm_colorop *colorop,
> + struct drm_plane *plane,
> + const struct drm_colorop_funcs *funcs,
> + u64 supported_fm, uint32_t flags)
> +{
> + struct drm_prop_enum_list enum_list[DRM_COLOROP_FM_COUNT];
> + int i, len;
> + struct drm_property *prop;
> + int ret;
> +
> + if (!supported_fm) {
> + drm_err(dev,
> + "No supported FM type op for new Fixed Matrix colorop on [PLANE:%d:%s]\n",
> + plane->base.id, plane->name);
> + return -EINVAL;
> + }
> +
> + if ((supported_fm & -BIT(DRM_COLOROP_FM_COUNT)) != 0) {
[Severity: Medium]
Does this bitwise truncation bypass API validation on 32-bit platforms?
Since the BIT() macro evaluates to an unsigned long,
-BIT(DRM_COLOROP_FM_COUNT) will be a 32-bit value on 32-bit architectures.
When bitwise-ANDed with the u64 supported_fm parameter, it will be
zero-extended rather than sign-extended.
Can this cause any unsupported bits in the upper 32 bits to evaluate to 0
and silently bypass the error check during driver initialization?
> + drm_err(dev, "Unknown Fixed Matrix provided on [PLANE:%d:%s]\n",
> + plane->base.id, plane->name);
> + return -EINVAL;
> + }
[ ... ]
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> index 87ced9f6ff408..f1df0f9ba7624 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -3998,25 +3998,17 @@ xelpd_program_plane_pre_csc_lut(struct intel_dsb *dsb,
> }
>
> static void
> -xelpd_program_plane_post_csc_lut(struct intel_dsb *dsb,
> - const struct intel_plane_state *plane_state)
> +xelpd_load_hdr_post_csc_lut(struct intel_display *display,
> + struct intel_dsb *dsb,
> + enum pipe pipe,
> + enum plane_id plane,
> + const struct drm_color_lut32 *post_csc_lut)
> {
> - struct intel_display *display = to_intel_display(plane_state);
> - const struct drm_plane_state *state = &plane_state->uapi;
> - enum pipe pipe = to_intel_plane(state->plane)->pipe;
> - enum plane_id plane = to_intel_plane(state->plane)->id;
> - const struct drm_color_lut32 *post_csc_lut = plane_state->hw.gamma_lut->data;
> int i, lut_size = 32;
> u32 lut_val;
>
> - if (!icl_is_hdr_plane(display, plane))
> - return;
> -
> intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0),
> PLANE_PAL_PREC_AUTO_INCREMENT);
> - /* TODO: Add macro */
> - intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, 0),
> - PLANE_PAL_PREC_AUTO_INCREMENT);
[Severity: High]
Does the removal of PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH programming here
break HDR plane post-CSC LUT configuration?
When programming post-CSC LUTs on HDR planes, the hardware requires the
SEG0_INDEX_ENH register to be configured to auto-increment before writing
the LUT data. With the refactoring of xelpd_program_plane_post_csc_lut()
into xelpd_load_hdr_post_csc_lut(), it looks like these register writes
were completely removed.
Could this lead to hardware state machine misconfigurations and display
corruption on HDR planes during atomic modesets?
>
> for (i = 0; i < lut_size + 3; i++) {
> if (post_csc_lut) {
[ ... ]
> diff --git a/drivers/gpu/drm/i915/display/intel_color_pipeline.c b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> index 6cf8080ee8000..38cfd6ed585d0 100644
> --- a/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> +++ b/drivers/gpu/drm/i915/display/intel_color_pipeline.c
> @@ -126,9 +145,12 @@ int _intel_color_pipeline_plane_init(struct drm_plane *plane, struct drm_prop_en
> if (plane_has_3dlut(display, pipe, plane)) {
> pipeline = xe3plpd_primary_plane_pipeline;
> pipeline_len = ARRAY_SIZE(xe3plpd_primary_plane_pipeline);
> - } else {
> + } else if (icl_is_hdr_plane(display, to_intel_plane(plane)->id)) {
> pipeline = hdr_plane_pipeline;
> pipeline_len = ARRAY_SIZE(hdr_plane_pipeline);
> + } else {
> + pipeline = sdr_plane_yuv_pipeline;
> + pipeline_len = ARRAY_SIZE(sdr_plane_yuv_pipeline);
> }
>
> for (i = 0; i < pipeline_len; i++) {
[Severity: High]
This is a pre-existing issue, but can an unchecked kasprintf() failure
lead to a NULL pointer dereference during color pipeline property creation?
Looking further down in _intel_color_pipeline_plane_init() in
drivers/gpu/drm/i915/display/intel_color_pipeline.c:
_intel_color_pipeline_plane_init()
list->name = kasprintf(GFP_KERNEL, "Color Pipeline %d", ...);
return 0;
If memory allocation fails, kasprintf() returns NULL. This is blindly
assigned to list->name, which is then passed into
drm_plane_create_color_pipeline_property() and subsequently to
drm_property_add_enum() which calls strlen(name).
Could this structural guarantee of a kernel panic be prevented with a
NULL check?
[ ... ]
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 07a6832933521..222c3b6bbe467 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -1240,37 +1240,47 @@ static u32 glk_plane_color_ctl_crtc(const struct intel_crtc_state *crtc_state)
> return plane_color_ctl;
> }
>
> -static u32 glk_plane_color_ctl(const struct intel_plane_state *plane_state)
> +static u32 glk_plane_color_ctl_input_csc(const struct intel_plane_state *plane_state)
> {
> struct intel_display *display = to_intel_display(plane_state);
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> - u32 plane_color_ctl = 0;
> + bool color_pipeline = !!plane_state->uapi.color_pipeline;
> + bool needs_csc = color_pipeline ? plane_state->hw.csc_ff_enable : fb->format->is_yuv;
> + u32 ctl = 0;
>
> - plane_color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE;
> - plane_color_ctl |= glk_plane_color_ctl_alpha(plane_state);
> + if (!needs_csc)
> + return 0;
>
> - if (fb->format->is_yuv && !icl_is_hdr_plane(display, plane->id)) {
> + if (!icl_is_hdr_plane(display, plane->id)) {
> switch (plane_state->hw.color_encoding) {
> case DRM_COLOR_YCBCR_BT709:
> - plane_color_ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
> + ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
> break;
> case DRM_COLOR_YCBCR_BT2020:
> - plane_color_ctl |=
> - PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
> + ctl |= PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
> break;
> default:
> - plane_color_ctl |=
> - PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
> + ctl |= PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
> }
> - if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
> - plane_color_ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
> - } else if (fb->format->is_yuv) {
> - plane_color_ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
> - if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
> - plane_color_ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
> + } else {
> + ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
> }
[Severity: High]
Does the introduction of plane_state->hw.csc_ff_enable leave hardware
coefficients uninitialized in skl_plane_update_noarm()?
When userspace enables the INTEL_PLANE_CB_CSC_FF fixed matrix colorop on
an RGB framebuffer on an HDR plane, glk_plane_color_ctl_input_csc() sets
the PLANE_COLOR_INPUT_CSC_ENABLE bit here.
However, skl_plane_update_noarm() evaluates whether to actually program
the hardware using the framebuffer format:
skl_plane_update_noarm()
if (fb->format->is_yuv && icl_is_hdr_plane(display, plane_id))
icl_program_input_csc(dsb, plane, plane_state);
Because it is an RGB buffer, the programming is skipped, leaving the hardware
to use uninitialized or stale input CSC coefficient registers.
Should skl_plane_update_noarm() be updated to also check if CSC is enabled
via the new color pipeline?
[ ... ]
[Severity: High]
This is a pre-existing issue, but does drm_colorop_cleanup() leave a
dangling pointer in the DRM object IDR?
Looking at drm_colorop_cleanup() in drivers/gpu/drm/drm_colorop.c:
drm_colorop_cleanup()
list_del(&colorop->head);
config->num_colorop--;
If drm_plane_colorop_fixed_matrix_init() fails after drm_mode_object_add()
is called, the error path invokes this function. It removes the colorop
from the list and frees it, but neglects to call
drm_mode_object_unregister() to remove the object ID from
dev->mode_config.object_idr.
Could this lead to a Use-After-Free (UAF) if a lookup is performed on the
leaked object ID later?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260812085908.3159828-1-chaitanya.kumar.borah@intel.com?part=1
^ permalink raw reply [flat|nested] 8+ messages in thread
* ✗ Xe.CI.BAT: failure for Support YUV buffers in HDR planes
2026-08-12 8:59 [PATCH 0/2] Support YUV buffers in HDR planes Chaitanya Kumar Borah
` (2 preceding siblings ...)
2026-08-12 9:30 ` ✓ CI.KUnit: success for Support YUV buffers in " Patchwork
@ 2026-08-12 10:24 ` Patchwork
2026-08-12 11:13 ` ✓ Xe.CI.FULL: success " Patchwork
4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2026-08-12 10:24 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 5989 bytes --]
== Series Details ==
Series: Support YUV buffers in HDR planes
URL : https://patchwork.freedesktop.org/series/172057/
State : failure
== Summary ==
CI Bug Log - changes from xe-5579-022f0029796a06c77f3856313a38ea226a652264_BAT -> xe-pw-172057v1_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-172057v1_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-172057v1_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (12 -> 13)
------------------------------
Additional (1): bat-bmg-2
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-172057v1_BAT:
### IGT changes ###
#### Possible regressions ####
* igt@xe_module_load@load:
- bat-nvls-2: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5579-022f0029796a06c77f3856313a38ea226a652264/bat-nvls-2/igt@xe_module_load@load.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/bat-nvls-2/igt@xe_module_load@load.html
- bat-nvls-1: [PASS][3] -> [INCOMPLETE][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5579-022f0029796a06c77f3856313a38ea226a652264/bat-nvls-1/igt@xe_module_load@load.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/bat-nvls-1/igt@xe_module_load@load.html
Known issues
------------
Here are the changes found in xe-pw-172057v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@fbdev@write:
- bat-bmg-2: NOTRUN -> [SKIP][5] ([Intel XE#2134]) +4 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/bat-bmg-2/igt@fbdev@write.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-bmg-2: NOTRUN -> [SKIP][6] ([Intel XE#2233])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/bat-bmg-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- bat-bmg-2: NOTRUN -> [SKIP][7] ([Intel XE#2489] / [Intel XE#3419]) +13 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/bat-bmg-2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
* igt@kms_flip@basic-flip-vs-modeset:
- bat-bmg-2: NOTRUN -> [SKIP][8] ([Intel XE#2482]) +3 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/bat-bmg-2/igt@kms_flip@basic-flip-vs-modeset.html
* igt@kms_frontbuffer_tracking@basic:
- bat-bmg-2: NOTRUN -> [SKIP][9] ([Intel XE#2434] / [Intel XE#2548] / [Intel XE#6314])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/bat-bmg-2/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_psr@psr-sprite-plane-onoff:
- bat-bmg-2: NOTRUN -> [SKIP][10] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/bat-bmg-2/igt@kms_psr@psr-sprite-plane-onoff.html
* igt@xe_exec_multi_queue@priority:
- bat-bmg-2: NOTRUN -> [SKIP][11] ([Intel XE#8364]) +13 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/bat-bmg-2/igt@xe_exec_multi_queue@priority.html
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- bat-bmg-2: NOTRUN -> [SKIP][12] ([Intel XE#2229])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/bat-bmg-2/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
* igt@xe_pat@pat-index-xehpc:
- bat-bmg-2: NOTRUN -> [SKIP][13] ([Intel XE#1420] / [Intel XE#7590])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/bat-bmg-2/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pat@pat-index-xelp:
- bat-bmg-2: NOTRUN -> [SKIP][14] ([Intel XE#2245] / [Intel XE#7590])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/bat-bmg-2/igt@xe_pat@pat-index-xelp.html
* igt@xe_pat@pat-index-xelpg:
- bat-bmg-2: NOTRUN -> [SKIP][15] ([Intel XE#2236] / [Intel XE#7590])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/bat-bmg-2/igt@xe_pat@pat-index-xelpg.html
[Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
[Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
[Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
[Intel XE#2434]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2434
[Intel XE#2482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2482
[Intel XE#2489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2489
[Intel XE#2548]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2548
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#3419]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3419
[Intel XE#6314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6314
[Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
Build changes
-------------
* Linux: xe-5579-022f0029796a06c77f3856313a38ea226a652264 -> xe-pw-172057v1
IGT_9052: 9052
xe-5579-022f0029796a06c77f3856313a38ea226a652264: 022f0029796a06c77f3856313a38ea226a652264
xe-pw-172057v1: 172057v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/index.html
[-- Attachment #2: Type: text/html, Size: 6942 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* ✓ Xe.CI.FULL: success for Support YUV buffers in HDR planes
2026-08-12 8:59 [PATCH 0/2] Support YUV buffers in HDR planes Chaitanya Kumar Borah
` (3 preceding siblings ...)
2026-08-12 10:24 ` ✗ Xe.CI.BAT: failure " Patchwork
@ 2026-08-12 11:13 ` Patchwork
4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2026-08-12 11:13 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 38893 bytes --]
== Series Details ==
Series: Support YUV buffers in HDR planes
URL : https://patchwork.freedesktop.org/series/172057/
State : success
== Summary ==
CI Bug Log - changes from xe-5579-022f0029796a06c77f3856313a38ea226a652264_FULL -> xe-pw-172057v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
New tests
---------
New tests have been introduced between xe-5579-022f0029796a06c77f3856313a38ea226a652264_FULL and xe-pw-172057v1_FULL:
### New IGT tests (84) ###
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-a-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-a-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-b-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-b-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.01] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-c-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-c-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.01] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-a-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-a-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-b-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-b-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-c-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-c-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-d-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-ctm3x4@pipe-d-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-a-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.03, 0.04] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-a-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-b-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-b-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-c-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.04] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-c-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-d-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.04] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-d-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.04] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.03, 0.04] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.04] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-b-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-b-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-c-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-c-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-d-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-d-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-a-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-a-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-b-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-b-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-c-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.04] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-c-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-d-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-lut1d@pipe-d-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.01] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-a-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-a-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.04] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.04] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-c-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.02, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-c-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-d-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-d-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.04] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-a-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-a-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-b-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-b-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-c-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.02] s
* igt@kms_color_pipeline@plane-lut1d-pre-ctm3x4@pipe-c-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.01] s
* igt@kms_color_pipeline@plane-lut1d@pipe-a-plane-3:
- Statuses : 2 pass(s)
- Exec time: [0.21, 0.25] s
* igt@kms_color_pipeline@plane-lut1d@pipe-a-plane-4:
- Statuses : 2 pass(s)
- Exec time: [0.23] s
* igt@kms_color_pipeline@plane-lut1d@pipe-b-plane-3:
- Statuses : 2 pass(s)
- Exec time: [0.21, 0.23] s
* igt@kms_color_pipeline@plane-lut1d@pipe-b-plane-4:
- Statuses : 2 pass(s)
- Exec time: [0.23] s
* igt@kms_color_pipeline@plane-lut1d@pipe-c-plane-3:
- Statuses : 2 pass(s)
- Exec time: [0.21, 0.22] s
* igt@kms_color_pipeline@plane-lut1d@pipe-c-plane-4:
- Statuses : 2 pass(s)
- Exec time: [0.23] s
* igt@kms_color_pipeline@plane-lut1d@pipe-d-plane-3:
- Statuses : 1 pass(s)
- Exec time: [0.22] s
* igt@kms_color_pipeline@plane-lut1d@pipe-d-plane-4:
- Statuses : 1 pass(s)
- Exec time: [0.20] s
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-a-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-a-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-b-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.04] s
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-b-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-3:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.03] s
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-4:
- Statuses : 2 skip(s)
- Exec time: [0.01, 0.02] s
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-3:
- Statuses : 1 skip(s)
- Exec time: [0.04] s
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-4:
- Statuses : 1 skip(s)
- Exec time: [0.02] s
* igt@kms_pm_rpm@legacy-planes-dpms@plane-105:
- Statuses : 2 pass(s)
- Exec time: [2.92, 9.15] s
* igt@kms_pm_rpm@legacy-planes-dpms@plane-140:
- Statuses : 2 pass(s)
- Exec time: [3.07, 7.98] s
* igt@kms_pm_rpm@legacy-planes-dpms@plane-163:
- Statuses : 2 pass(s)
- Exec time: [3.09, 7.99] s
* igt@kms_pm_rpm@legacy-planes-dpms@plane-70:
- Statuses : 2 pass(s)
- Exec time: [2.96, 8.07] s
* igt@kms_pm_rpm@legacy-planes@plane-105:
- Statuses : 2 pass(s)
- Exec time: [3.03, 8.01] s
* igt@kms_pm_rpm@legacy-planes@plane-140:
- Statuses : 2 pass(s)
- Exec time: [2.84, 8.06] s
* igt@kms_pm_rpm@legacy-planes@plane-163:
- Statuses : 2 pass(s)
- Exec time: [2.99, 8.03] s
* igt@kms_pm_rpm@legacy-planes@plane-70:
- Statuses : 2 pass(s)
- Exec time: [2.98, 8.10] s
* igt@kms_pm_rpm@universal-planes-dpms@plane-105:
- Statuses : 2 pass(s)
- Exec time: [2.84, 8.04] s
* igt@kms_pm_rpm@universal-planes-dpms@plane-140:
- Statuses : 2 pass(s)
- Exec time: [2.91, 8.04] s
* igt@kms_pm_rpm@universal-planes-dpms@plane-186:
- Statuses : 2 pass(s)
- Exec time: [2.82, 8.09] s
* igt@kms_pm_rpm@universal-planes-dpms@plane-70:
- Statuses : 2 pass(s)
- Exec time: [2.74, 8.02] s
* igt@kms_pm_rpm@universal-planes@plane-105:
- Statuses : 2 pass(s)
- Exec time: [2.90, 8.04] s
* igt@kms_pm_rpm@universal-planes@plane-140:
- Statuses : 2 pass(s)
- Exec time: [2.57, 8.05] s
* igt@kms_pm_rpm@universal-planes@plane-186:
- Statuses : 2 pass(s)
- Exec time: [2.82, 8.10] s
* igt@kms_pm_rpm@universal-planes@plane-70:
- Statuses : 2 pass(s)
- Exec time: [2.89, 8.22] s
Known issues
------------
Here are the changes found in xe-pw-172057v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@linear-32bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][1] ([Intel XE#2327])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-8/igt@kms_big_fb@linear-32bpp-rotate-270.html
* igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip:
- shard-bmg: NOTRUN -> [SKIP][2] ([Intel XE#7059] / [Intel XE#7085]) +1 other test skip
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-2/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@y-tiled-16bpp-rotate-0:
- shard-bmg: NOTRUN -> [SKIP][3] ([Intel XE#1124]) +13 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-9/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html
* igt@kms_bw@linear-tiling-4-displays-target-2560x1440p:
- shard-bmg: NOTRUN -> [SKIP][4] ([Intel XE#367]) +2 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-8/igt@kms_bw@linear-tiling-4-displays-target-2560x1440p.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#2887]) +13 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-9/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-b-dp-2:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#2652]) +8 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-9/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-b-dp-2.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-ccs:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#3432]) +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs.html
* igt@kms_chamelium_color@ctm-0-25:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#2325] / [Intel XE#7358]) +1 other test skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-7/igt@kms_chamelium_color@ctm-0-25.html
* igt@kms_chamelium_color_pipeline@plane-lut1d-ctm3x4:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#7358])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-6/igt@kms_chamelium_color_pipeline@plane-lut1d-ctm3x4.html
* igt@kms_chamelium_hpd@hdmi-hpd-storm-disable:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2252]) +9 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-2/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html
* igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-4 (NEW):
- shard-lnl: NOTRUN -> [SKIP][11] ([Intel XE#6969]) +46 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-lnl-4/igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-4.html
* igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-4 (NEW):
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#6969]) +46 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-5/igt@kms_color_pipeline@plane-lut1d-post-ctm3x4@pipe-b-plane-4.html
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-4 (NEW):
- shard-lnl: NOTRUN -> [SKIP][13] ([Intel XE#6969] / [Intel XE#7006])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-lnl-5/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-4.html
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-4 (NEW):
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#6969] / [Intel XE#7006])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-3/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-4.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#2390] / [Intel XE#6974])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-7/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@dp-mst-type-0-hdcp14:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#6974]) +1 other test skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-7/igt@kms_content_protection@dp-mst-type-0-hdcp14.html
* igt@kms_content_protection@srm:
- shard-bmg: NOTRUN -> [FAIL][17] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-8/igt@kms_content_protection@srm.html
* igt@kms_content_protection@uevent:
- shard-bmg: NOTRUN -> [FAIL][18] ([Intel XE#6707] / [Intel XE#7439]) +1 other test fail
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-6/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-onscreen-128x42:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#2320]) +2 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-9/igt@kms_cursor_crc@cursor-onscreen-128x42.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x512:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2321] / [Intel XE#7355])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-9/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#2286] / [Intel XE#6035])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
* igt@kms_dirtyfb@fbc-dirtyfb-ioctl:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#4210] / [Intel XE#7467])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-9/igt@kms_dirtyfb@fbc-dirtyfb-ioctl.html
* igt@kms_dirtyfb@psr-dirtyfb-ioctl:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#1508])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-7/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc-ultrajoiner:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#8265]) +3 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-2/igt@kms_dsc@dsc-with-output-formats-with-bpc-ultrajoiner.html
* igt@kms_fbcon_fbt@fbc:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#4156] / [Intel XE#7425])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-8/igt@kms_fbcon_fbt@fbc.html
* igt@kms_feature_discovery@vrr:
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#8586])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-9/igt@kms_feature_discovery@vrr.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#7178] / [Intel XE#7351]) +3 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-6/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html
* igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#4141]) +13 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#2311]) +61 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#2313]) +55 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-abgr161616f-draw-render:
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#7061] / [Intel XE#7356]) +4 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-abgr161616f-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#7061]) +4 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-blt.html
* igt@kms_hdmi_inject@inject-audio:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#7308])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-2/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_joiner@basic-big-joiner:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#6901])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-9/igt@kms_joiner@basic-big-joiner.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#4090] / [Intel XE#7443])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-7/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#7283]) +7 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-8/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping.html
* igt@kms_plane_multiple@tiling-y:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#5020] / [Intel XE#7348])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-7/igt@kms_plane_multiple@tiling-y.html
* igt@kms_pm_backlight@basic-brightness:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#7376] / [Intel XE#7760] / [Intel XE#870])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-7/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#1489]) +9 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-6/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#2387] / [Intel XE#7429])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-7/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr@pr-sprite-plane-onoff:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#2234] / [Intel XE#2850]) +13 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-8/igt@kms_psr@pr-sprite-plane-onoff.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
- shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#3904] / [Intel XE#7342]) +1 other test skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-2/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html
* igt@kms_sharpness_filter@invalid-filter-with-scaler:
- shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#6503]) +1 other test skip
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-6/igt@kms_sharpness_filter@invalid-filter-with-scaler.html
* igt@kms_tv_load_detect@load-detect:
- shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#2450] / [Intel XE#5857])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-8/igt@kms_tv_load_detect@load-detect.html
* igt@kms_vrr@flipline:
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#1499])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-8/igt@kms_vrr@flipline.html
* igt@kms_vrr@lobf:
- shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#2168] / [Intel XE#7444])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-7/igt@kms_vrr@lobf.html
* igt@xe_compute@eu-busy-10s:
- shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#6599])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-2/igt@xe_compute@eu-busy-10s.html
* igt@xe_evict@evict-beng-mixed-many-threads-small:
- shard-bmg: [PASS][48] -> [INCOMPLETE][49] ([Intel XE#6321] / [Intel XE#8355])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5579-022f0029796a06c77f3856313a38ea226a652264/shard-bmg-2/igt@xe_evict@evict-beng-mixed-many-threads-small.html
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-4/igt@xe_evict@evict-beng-mixed-many-threads-small.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-bind:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#2322] / [Intel XE#7372]) +8 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-8/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-bind.html
* igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-invalidate-imm:
- shard-bmg: NOTRUN -> [SKIP][51] ([Intel XE#8374]) +13 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-9/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-invalidate-imm.html
* igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-dyn-priority-smem:
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#8364]) +26 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-6/igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-dyn-priority-smem.html
* igt@xe_exec_reset@cm-multi-queue-cat-error-on-secondary:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#8369]) +2 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-9/igt@xe_exec_reset@cm-multi-queue-cat-error-on-secondary.html
* igt@xe_exec_threads@threads-multi-queue-mixed-userptr-invalidate-race:
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#8378]) +7 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-7/igt@xe_exec_threads@threads-multi-queue-mixed-userptr-invalidate-race.html
* igt@xe_module_load@many-reload:
- shard-bmg: [PASS][55] -> [ABORT][56] ([Intel XE#8007])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5579-022f0029796a06c77f3856313a38ea226a652264/shard-bmg-2/igt@xe_module_load@many-reload.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-10/igt@xe_module_load@many-reload.html
* igt@xe_multigpu_svm@mgpu-pagefault-conflict:
- shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#6964]) +3 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-2/igt@xe_multigpu_svm@mgpu-pagefault-conflict.html
* igt@xe_oa@buffer-size@oag-0-128m:
- shard-bmg: NOTRUN -> [FAIL][58] ([Intel XE#7334])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-3/igt@xe_oa@buffer-size@oag-0-128m.html
* igt@xe_oa@non-zero-reason:
- shard-bmg: [PASS][59] -> [FAIL][60] ([Intel XE#7334]) +2 other tests fail
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5579-022f0029796a06c77f3856313a38ea226a652264/shard-bmg-5/igt@xe_oa@non-zero-reason.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-3/igt@xe_oa@non-zero-reason.html
* igt@xe_page_reclaim@random:
- shard-bmg: NOTRUN -> [SKIP][61] ([Intel XE#7793]) +1 other test skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-9/igt@xe_page_reclaim@random.html
* igt@xe_peer2peer@read:
- shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#2427] / [Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-8/igt@xe_peer2peer@read.html
* igt@xe_pm@d3cold-mmap-vram:
- shard-bmg: NOTRUN -> [SKIP][63] ([Intel XE#2284] / [Intel XE#7370])
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-8/igt@xe_pm@d3cold-mmap-vram.html
* igt@xe_prefetch_fault@prefetch-fault-svm:
- shard-bmg: NOTRUN -> [SKIP][64] ([Intel XE#7599])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-8/igt@xe_prefetch_fault@prefetch-fault-svm.html
* igt@xe_pxp@pxp-termination-key-update-post-suspend:
- shard-bmg: NOTRUN -> [SKIP][65] ([Intel XE#4733] / [Intel XE#7417])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-8/igt@xe_pxp@pxp-termination-key-update-post-suspend.html
* igt@xe_query@multigpu-query-invalid-cs-cycles:
- shard-bmg: NOTRUN -> [SKIP][66] ([Intel XE#944]) +2 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-6/igt@xe_query@multigpu-query-invalid-cs-cycles.html
* igt@xe_sriov_flr@flr-vf1-clear:
- shard-bmg: NOTRUN -> [FAIL][67] ([Intel XE#6569])
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-9/igt@xe_sriov_flr@flr-vf1-clear.html
#### Possible fixes ####
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-lnl: [FAIL][68] ([Intel XE#301]) -> [PASS][69] +1 other test pass
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5579-022f0029796a06c77f3856313a38ea226a652264/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@xe_fault_injection@exec-queue-create-fail-xe_exec_queue_create_bind:
- shard-bmg: [ABORT][70] ([Intel XE#8007]) -> [PASS][71] +4 other tests pass
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5579-022f0029796a06c77f3856313a38ea226a652264/shard-bmg-2/igt@xe_fault_injection@exec-queue-create-fail-xe_exec_queue_create_bind.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-8/igt@xe_fault_injection@exec-queue-create-fail-xe_exec_queue_create_bind.html
#### Warnings ####
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-2:
- shard-lnl: [SKIP][72] ([Intel XE#6969] / [Intel XE#7006]) -> [SKIP][73] ([Intel XE#6969])
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5579-022f0029796a06c77f3856313a38ea226a652264/shard-lnl-4/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-2.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-lnl-5/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-2.html
* igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-2:
- shard-bmg: [SKIP][74] ([Intel XE#6969] / [Intel XE#7006]) -> [SKIP][75] ([Intel XE#6969])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5579-022f0029796a06c77f3856313a38ea226a652264/shard-bmg-7/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-2.html
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-3/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-d-plane-2.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][76] ([Intel XE#3544]) -> [SKIP][77] ([Intel XE#3374] / [Intel XE#3544])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5579-022f0029796a06c77f3856313a38ea226a652264/shard-bmg-4/igt@kms_hdr@brightness-with-hdr.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-8/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [FAIL][78] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][79] ([Intel XE#2426] / [Intel XE#5848])
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5579-022f0029796a06c77f3856313a38ea226a652264/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern.html
* igt@sriov_basic@pf-unbind-with-vfs-enabled-numvfs-all:
- shard-bmg: [ABORT][80] ([Intel XE#8007] / [Intel XE#8868]) -> [ABORT][81] ([Intel XE#8868])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5579-022f0029796a06c77f3856313a38ea226a652264/shard-bmg-4/igt@sriov_basic@pf-unbind-with-vfs-enabled-numvfs-all.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/shard-bmg-8/igt@sriov_basic@pf-unbind-with-vfs-enabled-numvfs-all.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
[Intel XE#2450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2450
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4090]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4090
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
[Intel XE#4210]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4210
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#5857]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5857
[Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
[Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
[Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
[Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
[Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
[Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
[Intel XE#7006]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7006
[Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7308
[Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
[Intel XE#7334]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7334
[Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
[Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353
[Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
[Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
[Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
[Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
[Intel XE#7425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7425
[Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
[Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
[Intel XE#7443]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7443
[Intel XE#7444]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7444
[Intel XE#7467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7467
[Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
[Intel XE#7760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7760
[Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
[Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
[Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
[Intel XE#8586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8586
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#8868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8868
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-5579-022f0029796a06c77f3856313a38ea226a652264 -> xe-pw-172057v1
IGT_9052: 9052
xe-5579-022f0029796a06c77f3856313a38ea226a652264: 022f0029796a06c77f3856313a38ea226a652264
xe-pw-172057v1: 172057v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172057v1/index.html
[-- Attachment #2: Type: text/html, Size: 44638 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2026-08-12 17:41 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-08-12 8:59 [PATCH 0/2] Support YUV buffers in HDR planes Chaitanya Kumar Borah
2026-08-12 8:59 ` [PATCH 1/2] [DO_NOT_REVIEW] drm/i915/color: Add color pipeline support for SDR planes Chaitanya Kumar Borah
2026-08-12 9:56 ` sashiko-bot
2026-08-12 8:59 ` [PATCH 2/2] drm/i915/color: Add YUV buffer support on HDR planes Chaitanya Kumar Borah
2026-08-12 9:48 ` sashiko-bot
2026-08-12 9:30 ` ✓ CI.KUnit: success for Support YUV buffers in " Patchwork
2026-08-12 10:24 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-08-12 11:13 ` ✓ Xe.CI.FULL: success " Patchwork
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