* [PATCH] drm/xe/forcewake: add delayed-release optimization
@ 2026-06-01 21:38 Zongyao Bai
2026-06-01 22:37 ` ✓ CI.KUnit: success for " Patchwork
` (19 more replies)
0 siblings, 20 replies; 34+ messages in thread
From: Zongyao Bai @ 2026-06-01 21:38 UTC (permalink / raw)
To: intel-xe; +Cc: jia.yao, Zongyao Bai
Add delayed-release optimization:
- Add domain sleep 200us after xe_force_wake_put()
- Skip MMIO wake in xe_force_wake_get() if domain still awake.
Reduces frequent wake/sleep cycles for back-to-back operations.
Examples of scenarios: zeDeviceGetGlobalTimestamps read by VTune, PTI
Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
---
drivers/gpu/drm/xe/xe_force_wake.c | 111 +++++++++++++++++------
drivers/gpu/drm/xe/xe_force_wake.h | 4 +-
drivers/gpu/drm/xe/xe_force_wake_types.h | 11 +++
drivers/gpu/drm/xe/xe_gt.c | 4 +-
4 files changed, 99 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
index 197e2197bd0a..183a17fa6d68 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.c
+++ b/drivers/gpu/drm/xe/xe_force_wake.c
@@ -6,15 +6,20 @@
#include "xe_force_wake.h"
#include <drm/drm_util.h>
+#include <linux/device.h>
+#include <linux/hrtimer.h>
#include "regs/xe_gt_regs.h"
#include "regs/xe_reg_defs.h"
+#include "xe_device.h"
#include "xe_gt.h"
#include "xe_gt_printk.h"
#include "xe_mmio.h"
+#include "xe_pm.h"
#include "xe_sriov.h"
#define XE_FORCE_WAKE_ACK_TIMEOUT_MS 50
+#define XE_FORCE_WAKE_HOLD_DELAY_US 200
static const char *str_wake_sleep(bool wake)
{
@@ -27,6 +32,8 @@ static void mark_domain_initialized(struct xe_force_wake *fw,
fw->initialized_domains |= BIT(id);
}
+static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer);
+
static void init_domain(struct xe_force_wake *fw,
enum xe_force_wake_domain_id id,
struct xe_reg reg, struct xe_reg ack)
@@ -38,11 +45,29 @@ static void init_domain(struct xe_force_wake *fw,
domain->reg_ack = ack;
domain->val = FORCEWAKE_MT(FORCEWAKE_KERNEL);
domain->mask = FORCEWAKE_MT_MASK(FORCEWAKE_KERNEL);
+ domain->fw_back = fw;
+ hrtimer_setup(&domain->timer, xe_force_wake_domain_timer,
+ CLOCK_MONOTONIC, HRTIMER_MODE_REL);
mark_domain_initialized(fw, id);
}
-void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
+static void xe_force_wake_fini(void *arg)
+{
+ struct xe_force_wake *fw = arg;
+ struct xe_gt *gt = fw->gt;
+ struct xe_force_wake_domain *domain;
+ unsigned int tmp;
+
+ for_each_fw_domain(domain, fw, tmp) {
+ xe_gt_WARN(gt, domain->ref,
+ "Forcewake domain %d still referenced (%u) at teardown\n",
+ domain->id, domain->ref);
+ hrtimer_cancel(&domain->timer);
+ }
+}
+
+int xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
{
struct xe_device *xe = gt_to_xe(gt);
@@ -58,6 +83,8 @@ void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
FORCEWAKE_GT,
FORCEWAKE_ACK_GT);
}
+
+ return devm_add_action_or_reset(xe->drm.dev, xe_force_wake_fini, fw);
}
void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw)
@@ -142,10 +169,36 @@ static void domain_sleep(struct xe_gt *gt, struct xe_force_wake_domain *domain)
__domain_ctl(gt, domain, false);
}
-static int domain_sleep_wait(struct xe_gt *gt,
- struct xe_force_wake_domain *domain)
+static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer)
{
- return __domain_wait(gt, domain, false);
+ struct xe_force_wake_domain *domain =
+ container_of(timer, struct xe_force_wake_domain, timer);
+ struct xe_force_wake *fw = domain->fw_back;
+ struct xe_gt *gt = fw->gt;
+ unsigned long flags;
+
+ xe_gt_assert(gt, !xe_pm_runtime_suspended(gt_to_xe(gt)));
+
+ spin_lock_irqsave(&fw->lock, flags);
+
+ if (!(fw->timer_domains & BIT(domain->id)) || domain->ref) {
+ spin_unlock_irqrestore(&fw->lock, flags);
+ return HRTIMER_NORESTART;
+ }
+ if (domain->timer_rearm) {
+ domain->timer_rearm = false;
+ spin_unlock_irqrestore(&fw->lock, flags);
+ hrtimer_forward_now(timer,
+ ns_to_ktime(XE_FORCE_WAKE_HOLD_DELAY_US *
+ NSEC_PER_USEC));
+ return HRTIMER_RESTART;
+ }
+ fw->timer_domains &= ~BIT(domain->id);
+ domain_sleep(gt, domain);
+ fw->awake_domains &= ~BIT(domain->id);
+ spin_unlock_irqrestore(&fw->lock, flags);
+
+ return HRTIMER_NORESTART;
}
/**
@@ -187,8 +240,13 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
spin_lock_irqsave(&fw->lock, flags);
for_each_fw_domain_masked(domain, ref_rqst, fw, tmp) {
if (!domain->ref++) {
- awake_rqst |= BIT(domain->id);
- domain_wake(gt, domain);
+ if (fw->awake_domains & BIT(domain->id)) {
+ fw->timer_domains &= ~BIT(domain->id);
+ hrtimer_try_to_cancel(&domain->timer);
+ } else {
+ awake_rqst |= BIT(domain->id);
+ domain_wake(gt, domain);
+ }
}
ref_incr |= BIT(domain->id);
}
@@ -213,27 +271,25 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
}
/**
- * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
+ * xe_force_wake_put - Decrement the refcount and arm the delayed-sleep timer
* @fw: Pointer to the force wake structure
* @fw_ref: return of xe_force_wake_get()
*
- * This function reduces the reference counts for domains in fw_ref. If
- * refcount for any of the specified domain reaches 0, it puts the domain to sleep
- * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
- * Warns in case of timeout of ack from domain.
+ * This function reduces the reference counts for domains in fw_ref. When a
+ * domain's refcount reaches 0 the sleep request is not issued immediately;
+ * instead a hrtimer is armed for XE_FORCE_WAKE_HOLD_DELAY_US so that a rapid
+ * xe_force_wake_get() can reuse the still-awake domain at zero MMIO cost. On
+ * timer expiry, if the domain is still idle, the sleep request is written.
+ * Mirroring i915's fw_domains_put(), the deferred sleep is fire-and-forget:
+ * no sleep ACK is polled, since the next wake re-waits for the wake ACK.
*/
void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
{
struct xe_gt *gt = fw->gt;
struct xe_force_wake_domain *domain;
- unsigned int tmp, sleep = 0;
+ unsigned int tmp;
unsigned long flags;
- int ack_fail = 0;
- /*
- * Avoid unnecessary lock and unlock when the function is called
- * in error path of individual domains.
- */
if (!fw_ref)
return;
@@ -245,20 +301,19 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
xe_gt_assert(gt, domain->ref);
if (!--domain->ref) {
- sleep |= BIT(domain->id);
- domain_sleep(gt, domain);
+ fw->timer_domains |= BIT(domain->id);
+ if (hrtimer_callback_running(&domain->timer)) {
+ domain->timer_rearm = true;
+ } else {
+ domain->timer_rearm = false;
+ hrtimer_start(&domain->timer,
+ ns_to_ktime(XE_FORCE_WAKE_HOLD_DELAY_US *
+ NSEC_PER_USEC),
+ HRTIMER_MODE_REL);
+ }
}
}
- for_each_fw_domain_masked(domain, sleep, fw, tmp) {
- if (domain_sleep_wait(gt, domain) == 0)
- fw->awake_domains &= ~BIT(domain->id);
- else
- ack_fail |= BIT(domain->id);
- }
spin_unlock_irqrestore(&fw->lock, flags);
-
- xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
- str_plural(hweight_long(ack_fail)), ack_fail);
}
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
index e2721f205d6c..19679b923dca 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.h
+++ b/drivers/gpu/drm/xe/xe_force_wake.h
@@ -11,8 +11,8 @@
struct xe_gt;
-void xe_force_wake_init_gt(struct xe_gt *gt,
- struct xe_force_wake *fw);
+int xe_force_wake_init_gt(struct xe_gt *gt,
+ struct xe_force_wake *fw);
void xe_force_wake_init_engines(struct xe_gt *gt,
struct xe_force_wake *fw);
unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
diff --git a/drivers/gpu/drm/xe/xe_force_wake_types.h b/drivers/gpu/drm/xe/xe_force_wake_types.h
index 14b7b86e801b..ee5675069fe0 100644
--- a/drivers/gpu/drm/xe/xe_force_wake_types.h
+++ b/drivers/gpu/drm/xe/xe_force_wake_types.h
@@ -6,6 +6,7 @@
#ifndef _XE_FORCE_WAKE_TYPES_H_
#define _XE_FORCE_WAKE_TYPES_H_
+#include <linux/hrtimer.h>
#include <linux/mutex.h>
#include <linux/types.h>
@@ -51,6 +52,8 @@ enum xe_force_wake_domains {
XE_FORCEWAKE_ALL = BIT(XE_FW_DOMAIN_ID_COUNT)
};
+struct xe_force_wake;
+
/**
* struct xe_force_wake_domain - Xe force wake power domain
*
@@ -82,6 +85,12 @@ struct xe_force_wake_domain {
u32 mask;
/** @ref: domain reference */
u32 ref;
+ /** @timer_rearm: put() ran while callback was in-flight; callback must restart timer */
+ bool timer_rearm;
+ /** @timer: hrtimer for delayed sleep request */
+ struct hrtimer timer;
+ /** @fw_back: back pointer to parent xe_force_wake */
+ struct xe_force_wake *fw_back;
};
/**
@@ -101,6 +110,8 @@ struct xe_force_wake {
spinlock_t lock;
/** @awake_domains: mask of all domains awake */
unsigned int awake_domains;
+ /** @timer_domains: mask of domains with an outstanding delayed-sleep timer */
+ unsigned int timer_domains;
/** @initialized_domains: mask of all initialized domains */
unsigned int initialized_domains;
/** @domains: force wake domains */
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 783eb6d631b5..43a79698cd04 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -511,7 +511,9 @@ int xe_gt_init_early(struct xe_gt *gt)
xe_wa_process_gt_oob(gt);
- xe_force_wake_init_gt(gt, gt_to_fw(gt));
+ err = xe_force_wake_init_gt(gt, gt_to_fw(gt));
+ if (err)
+ return err;
spin_lock_init(>->global_invl_lock);
err = xe_gt_tlb_inval_init_early(gt);
--
2.43.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* ✓ CI.KUnit: success for drm/xe/forcewake: add delayed-release optimization
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
@ 2026-06-01 22:37 ` Patchwork
2026-06-01 23:15 ` ✓ Xe.CI.BAT: " Patchwork
` (18 subsequent siblings)
19 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2026-06-01 22:37 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
== Series Details ==
Series: drm/xe/forcewake: add delayed-release optimization
URL : https://patchwork.freedesktop.org/series/167697/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[22:35:56] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:36:00] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:36:32] Starting KUnit Kernel (1/1)...
[22:36:32] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:36:32] ================== guc_buf (11 subtests) ===================
[22:36:32] [PASSED] test_smallest
[22:36:32] [PASSED] test_largest
[22:36:32] [PASSED] test_granular
[22:36:32] [PASSED] test_unique
[22:36:32] [PASSED] test_overlap
[22:36:32] [PASSED] test_reusable
[22:36:32] [PASSED] test_too_big
[22:36:32] [PASSED] test_flush
[22:36:32] [PASSED] test_lookup
[22:36:32] [PASSED] test_data
[22:36:32] [PASSED] test_class
[22:36:32] ===================== [PASSED] guc_buf =====================
[22:36:32] =================== guc_dbm (7 subtests) ===================
[22:36:32] [PASSED] test_empty
[22:36:32] [PASSED] test_default
[22:36:32] ======================== test_size ========================
[22:36:32] [PASSED] 4
[22:36:32] [PASSED] 8
[22:36:32] [PASSED] 32
[22:36:32] [PASSED] 256
[22:36:32] ==================== [PASSED] test_size ====================
[22:36:32] ======================= test_reuse ========================
[22:36:32] [PASSED] 4
[22:36:32] [PASSED] 8
[22:36:32] [PASSED] 32
[22:36:32] [PASSED] 256
[22:36:32] =================== [PASSED] test_reuse ====================
[22:36:32] =================== test_range_overlap ====================
[22:36:32] [PASSED] 4
[22:36:32] [PASSED] 8
[22:36:32] [PASSED] 32
[22:36:32] [PASSED] 256
[22:36:32] =============== [PASSED] test_range_overlap ================
[22:36:32] =================== test_range_compact ====================
[22:36:32] [PASSED] 4
[22:36:32] [PASSED] 8
[22:36:32] [PASSED] 32
[22:36:32] [PASSED] 256
[22:36:32] =============== [PASSED] test_range_compact ================
[22:36:32] ==================== test_range_spare =====================
[22:36:32] [PASSED] 4
[22:36:32] [PASSED] 8
[22:36:32] [PASSED] 32
[22:36:32] [PASSED] 256
[22:36:32] ================ [PASSED] test_range_spare =================
[22:36:32] ===================== [PASSED] guc_dbm =====================
[22:36:32] =================== guc_idm (6 subtests) ===================
[22:36:32] [PASSED] bad_init
[22:36:32] [PASSED] no_init
[22:36:32] [PASSED] init_fini
[22:36:32] [PASSED] check_used
[22:36:32] [PASSED] check_quota
[22:36:32] [PASSED] check_all
[22:36:32] ===================== [PASSED] guc_idm =====================
[22:36:32] ================== no_relay (3 subtests) ===================
[22:36:32] [PASSED] xe_drops_guc2pf_if_not_ready
[22:36:32] [PASSED] xe_drops_guc2vf_if_not_ready
[22:36:32] [PASSED] xe_rejects_send_if_not_ready
[22:36:32] ==================== [PASSED] no_relay =====================
[22:36:32] ================== pf_relay (14 subtests) ==================
[22:36:32] [PASSED] pf_rejects_guc2pf_too_short
[22:36:32] [PASSED] pf_rejects_guc2pf_too_long
[22:36:32] [PASSED] pf_rejects_guc2pf_no_payload
[22:36:32] [PASSED] pf_fails_no_payload
[22:36:32] [PASSED] pf_fails_bad_origin
[22:36:32] [PASSED] pf_fails_bad_type
[22:36:32] [PASSED] pf_txn_reports_error
[22:36:32] [PASSED] pf_txn_sends_pf2guc
[22:36:32] [PASSED] pf_sends_pf2guc
[22:36:32] [SKIPPED] pf_loopback_nop
[22:36:32] [SKIPPED] pf_loopback_echo
[22:36:32] [SKIPPED] pf_loopback_fail
[22:36:32] [SKIPPED] pf_loopback_busy
[22:36:32] [SKIPPED] pf_loopback_retry
[22:36:32] ==================== [PASSED] pf_relay =====================
[22:36:32] ================== vf_relay (3 subtests) ===================
[22:36:32] [PASSED] vf_rejects_guc2vf_too_short
[22:36:32] [PASSED] vf_rejects_guc2vf_too_long
[22:36:32] [PASSED] vf_rejects_guc2vf_no_payload
[22:36:32] ==================== [PASSED] vf_relay =====================
[22:36:32] ================ pf_gt_config (9 subtests) =================
[22:36:32] [PASSED] fair_contexts_1vf
[22:36:32] [PASSED] fair_doorbells_1vf
[22:36:32] [PASSED] fair_ggtt_1vf
[22:36:32] ====================== fair_vram_1vf ======================
[22:36:32] [PASSED] 3.50 GiB
[22:36:32] [PASSED] 11.5 GiB
[22:36:32] [PASSED] 15.5 GiB
[22:36:32] [PASSED] 31.5 GiB
[22:36:32] [PASSED] 63.5 GiB
[22:36:32] [PASSED] 1.91 GiB
[22:36:32] ================== [PASSED] fair_vram_1vf ==================
[22:36:32] ================ fair_vram_1vf_admin_only =================
[22:36:32] [PASSED] 3.50 GiB
[22:36:32] [PASSED] 11.5 GiB
[22:36:32] [PASSED] 15.5 GiB
[22:36:32] [PASSED] 31.5 GiB
[22:36:32] [PASSED] 63.5 GiB
[22:36:32] [PASSED] 1.91 GiB
[22:36:32] ============ [PASSED] fair_vram_1vf_admin_only =============
[22:36:32] ====================== fair_contexts ======================
[22:36:32] [PASSED] 1 VF
[22:36:32] [PASSED] 2 VFs
[22:36:32] [PASSED] 3 VFs
[22:36:32] [PASSED] 4 VFs
[22:36:32] [PASSED] 5 VFs
[22:36:32] [PASSED] 6 VFs
[22:36:32] [PASSED] 7 VFs
[22:36:32] [PASSED] 8 VFs
[22:36:32] [PASSED] 9 VFs
[22:36:32] [PASSED] 10 VFs
[22:36:32] [PASSED] 11 VFs
[22:36:32] [PASSED] 12 VFs
[22:36:32] [PASSED] 13 VFs
[22:36:32] [PASSED] 14 VFs
[22:36:32] [PASSED] 15 VFs
[22:36:32] [PASSED] 16 VFs
[22:36:32] [PASSED] 17 VFs
[22:36:32] [PASSED] 18 VFs
[22:36:32] [PASSED] 19 VFs
[22:36:32] [PASSED] 20 VFs
[22:36:32] [PASSED] 21 VFs
[22:36:32] [PASSED] 22 VFs
[22:36:32] [PASSED] 23 VFs
[22:36:32] [PASSED] 24 VFs
[22:36:32] [PASSED] 25 VFs
[22:36:32] [PASSED] 26 VFs
[22:36:32] [PASSED] 27 VFs
[22:36:32] [PASSED] 28 VFs
[22:36:32] [PASSED] 29 VFs
[22:36:32] [PASSED] 30 VFs
[22:36:32] [PASSED] 31 VFs
[22:36:32] [PASSED] 32 VFs
[22:36:32] [PASSED] 33 VFs
[22:36:32] [PASSED] 34 VFs
[22:36:32] [PASSED] 35 VFs
[22:36:32] [PASSED] 36 VFs
[22:36:32] [PASSED] 37 VFs
[22:36:32] [PASSED] 38 VFs
[22:36:32] [PASSED] 39 VFs
[22:36:32] [PASSED] 40 VFs
[22:36:32] [PASSED] 41 VFs
[22:36:32] [PASSED] 42 VFs
[22:36:32] [PASSED] 43 VFs
[22:36:32] [PASSED] 44 VFs
[22:36:32] [PASSED] 45 VFs
[22:36:32] [PASSED] 46 VFs
[22:36:32] [PASSED] 47 VFs
[22:36:32] [PASSED] 48 VFs
[22:36:32] [PASSED] 49 VFs
[22:36:32] [PASSED] 50 VFs
[22:36:32] [PASSED] 51 VFs
[22:36:32] [PASSED] 52 VFs
[22:36:32] [PASSED] 53 VFs
[22:36:32] [PASSED] 54 VFs
[22:36:32] [PASSED] 55 VFs
[22:36:32] [PASSED] 56 VFs
[22:36:32] [PASSED] 57 VFs
[22:36:32] [PASSED] 58 VFs
[22:36:32] [PASSED] 59 VFs
[22:36:32] [PASSED] 60 VFs
[22:36:32] [PASSED] 61 VFs
[22:36:32] [PASSED] 62 VFs
[22:36:32] [PASSED] 63 VFs
[22:36:32] ================== [PASSED] fair_contexts ==================
[22:36:32] ===================== fair_doorbells ======================
[22:36:32] [PASSED] 1 VF
[22:36:32] [PASSED] 2 VFs
[22:36:32] [PASSED] 3 VFs
[22:36:32] [PASSED] 4 VFs
[22:36:32] [PASSED] 5 VFs
[22:36:32] [PASSED] 6 VFs
[22:36:32] [PASSED] 7 VFs
[22:36:32] [PASSED] 8 VFs
[22:36:32] [PASSED] 9 VFs
[22:36:32] [PASSED] 10 VFs
[22:36:32] [PASSED] 11 VFs
[22:36:32] [PASSED] 12 VFs
[22:36:32] [PASSED] 13 VFs
[22:36:32] [PASSED] 14 VFs
[22:36:32] [PASSED] 15 VFs
[22:36:32] [PASSED] 16 VFs
[22:36:32] [PASSED] 17 VFs
[22:36:32] [PASSED] 18 VFs
[22:36:32] [PASSED] 19 VFs
[22:36:32] [PASSED] 20 VFs
[22:36:32] [PASSED] 21 VFs
[22:36:32] [PASSED] 22 VFs
[22:36:32] [PASSED] 23 VFs
[22:36:32] [PASSED] 24 VFs
[22:36:32] [PASSED] 25 VFs
[22:36:32] [PASSED] 26 VFs
[22:36:32] [PASSED] 27 VFs
[22:36:32] [PASSED] 28 VFs
[22:36:32] [PASSED] 29 VFs
[22:36:32] [PASSED] 30 VFs
[22:36:32] [PASSED] 31 VFs
[22:36:32] [PASSED] 32 VFs
[22:36:32] [PASSED] 33 VFs
[22:36:32] [PASSED] 34 VFs
[22:36:32] [PASSED] 35 VFs
[22:36:32] [PASSED] 36 VFs
[22:36:32] [PASSED] 37 VFs
[22:36:32] [PASSED] 38 VFs
[22:36:32] [PASSED] 39 VFs
[22:36:32] [PASSED] 40 VFs
[22:36:32] [PASSED] 41 VFs
[22:36:32] [PASSED] 42 VFs
[22:36:32] [PASSED] 43 VFs
[22:36:32] [PASSED] 44 VFs
[22:36:32] [PASSED] 45 VFs
[22:36:32] [PASSED] 46 VFs
[22:36:32] [PASSED] 47 VFs
[22:36:32] [PASSED] 48 VFs
[22:36:32] [PASSED] 49 VFs
[22:36:32] [PASSED] 50 VFs
[22:36:32] [PASSED] 51 VFs
[22:36:32] [PASSED] 52 VFs
[22:36:32] [PASSED] 53 VFs
[22:36:32] [PASSED] 54 VFs
[22:36:32] [PASSED] 55 VFs
[22:36:32] [PASSED] 56 VFs
[22:36:32] [PASSED] 57 VFs
[22:36:32] [PASSED] 58 VFs
[22:36:32] [PASSED] 59 VFs
[22:36:32] [PASSED] 60 VFs
[22:36:32] [PASSED] 61 VFs
[22:36:32] [PASSED] 62 VFs
[22:36:32] [PASSED] 63 VFs
[22:36:32] ================= [PASSED] fair_doorbells ==================
[22:36:32] ======================== fair_ggtt ========================
[22:36:32] [PASSED] 1 VF
[22:36:32] [PASSED] 2 VFs
[22:36:32] [PASSED] 3 VFs
[22:36:32] [PASSED] 4 VFs
[22:36:32] [PASSED] 5 VFs
[22:36:32] [PASSED] 6 VFs
[22:36:32] [PASSED] 7 VFs
[22:36:32] [PASSED] 8 VFs
[22:36:32] [PASSED] 9 VFs
[22:36:32] [PASSED] 10 VFs
[22:36:32] [PASSED] 11 VFs
[22:36:32] [PASSED] 12 VFs
[22:36:32] [PASSED] 13 VFs
[22:36:32] [PASSED] 14 VFs
[22:36:32] [PASSED] 15 VFs
[22:36:32] [PASSED] 16 VFs
[22:36:32] [PASSED] 17 VFs
[22:36:32] [PASSED] 18 VFs
[22:36:32] [PASSED] 19 VFs
[22:36:32] [PASSED] 20 VFs
[22:36:32] [PASSED] 21 VFs
[22:36:32] [PASSED] 22 VFs
[22:36:32] [PASSED] 23 VFs
[22:36:32] [PASSED] 24 VFs
[22:36:32] [PASSED] 25 VFs
[22:36:32] [PASSED] 26 VFs
[22:36:32] [PASSED] 27 VFs
[22:36:32] [PASSED] 28 VFs
[22:36:32] [PASSED] 29 VFs
[22:36:32] [PASSED] 30 VFs
[22:36:32] [PASSED] 31 VFs
[22:36:32] [PASSED] 32 VFs
[22:36:32] [PASSED] 33 VFs
[22:36:32] [PASSED] 34 VFs
[22:36:32] [PASSED] 35 VFs
[22:36:32] [PASSED] 36 VFs
[22:36:32] [PASSED] 37 VFs
[22:36:32] [PASSED] 38 VFs
[22:36:32] [PASSED] 39 VFs
[22:36:32] [PASSED] 40 VFs
[22:36:32] [PASSED] 41 VFs
[22:36:32] [PASSED] 42 VFs
[22:36:32] [PASSED] 43 VFs
[22:36:32] [PASSED] 44 VFs
[22:36:32] [PASSED] 45 VFs
[22:36:32] [PASSED] 46 VFs
[22:36:32] [PASSED] 47 VFs
[22:36:32] [PASSED] 48 VFs
[22:36:32] [PASSED] 49 VFs
[22:36:32] [PASSED] 50 VFs
[22:36:32] [PASSED] 51 VFs
[22:36:32] [PASSED] 52 VFs
[22:36:32] [PASSED] 53 VFs
[22:36:32] [PASSED] 54 VFs
[22:36:32] [PASSED] 55 VFs
[22:36:32] [PASSED] 56 VFs
[22:36:32] [PASSED] 57 VFs
[22:36:32] [PASSED] 58 VFs
[22:36:32] [PASSED] 59 VFs
[22:36:32] [PASSED] 60 VFs
[22:36:32] [PASSED] 61 VFs
[22:36:32] [PASSED] 62 VFs
[22:36:32] [PASSED] 63 VFs
[22:36:32] ==================== [PASSED] fair_ggtt ====================
[22:36:32] ======================== fair_vram ========================
[22:36:32] [PASSED] 1 VF
[22:36:32] [PASSED] 2 VFs
[22:36:32] [PASSED] 3 VFs
[22:36:32] [PASSED] 4 VFs
[22:36:32] [PASSED] 5 VFs
[22:36:32] [PASSED] 6 VFs
[22:36:32] [PASSED] 7 VFs
[22:36:32] [PASSED] 8 VFs
[22:36:32] [PASSED] 9 VFs
[22:36:32] [PASSED] 10 VFs
[22:36:32] [PASSED] 11 VFs
[22:36:32] [PASSED] 12 VFs
[22:36:32] [PASSED] 13 VFs
[22:36:32] [PASSED] 14 VFs
[22:36:32] [PASSED] 15 VFs
[22:36:32] [PASSED] 16 VFs
[22:36:32] [PASSED] 17 VFs
[22:36:32] [PASSED] 18 VFs
[22:36:32] [PASSED] 19 VFs
[22:36:32] [PASSED] 20 VFs
[22:36:32] [PASSED] 21 VFs
[22:36:32] [PASSED] 22 VFs
[22:36:32] [PASSED] 23 VFs
[22:36:32] [PASSED] 24 VFs
[22:36:32] [PASSED] 25 VFs
[22:36:32] [PASSED] 26 VFs
[22:36:32] [PASSED] 27 VFs
[22:36:32] [PASSED] 28 VFs
[22:36:32] [PASSED] 29 VFs
[22:36:32] [PASSED] 30 VFs
[22:36:32] [PASSED] 31 VFs
[22:36:32] [PASSED] 32 VFs
[22:36:32] [PASSED] 33 VFs
[22:36:32] [PASSED] 34 VFs
[22:36:32] [PASSED] 35 VFs
[22:36:32] [PASSED] 36 VFs
[22:36:32] [PASSED] 37 VFs
[22:36:32] [PASSED] 38 VFs
[22:36:32] [PASSED] 39 VFs
[22:36:32] [PASSED] 40 VFs
[22:36:32] [PASSED] 41 VFs
[22:36:32] [PASSED] 42 VFs
[22:36:32] [PASSED] 43 VFs
[22:36:32] [PASSED] 44 VFs
[22:36:32] [PASSED] 45 VFs
[22:36:32] [PASSED] 46 VFs
[22:36:32] [PASSED] 47 VFs
[22:36:32] [PASSED] 48 VFs
[22:36:32] [PASSED] 49 VFs
[22:36:32] [PASSED] 50 VFs
[22:36:32] [PASSED] 51 VFs
[22:36:32] [PASSED] 52 VFs
[22:36:32] [PASSED] 53 VFs
[22:36:32] [PASSED] 54 VFs
[22:36:32] [PASSED] 55 VFs
[22:36:32] [PASSED] 56 VFs
[22:36:32] [PASSED] 57 VFs
[22:36:32] [PASSED] 58 VFs
[22:36:32] [PASSED] 59 VFs
[22:36:32] [PASSED] 60 VFs
[22:36:32] [PASSED] 61 VFs
[22:36:32] [PASSED] 62 VFs
[22:36:32] [PASSED] 63 VFs
[22:36:32] ==================== [PASSED] fair_vram ====================
[22:36:32] ================== [PASSED] pf_gt_config ===================
[22:36:32] ===================== lmtt (1 subtest) =====================
[22:36:32] ======================== test_ops =========================
[22:36:32] [PASSED] 2-level
[22:36:32] [PASSED] multi-level
[22:36:32] ==================== [PASSED] test_ops =====================
[22:36:32] ====================== [PASSED] lmtt =======================
[22:36:32] ================= pf_service (11 subtests) =================
[22:36:32] [PASSED] pf_negotiate_any
[22:36:32] [PASSED] pf_negotiate_base_match
[22:36:32] [PASSED] pf_negotiate_base_newer
[22:36:32] [PASSED] pf_negotiate_base_next
[22:36:32] [SKIPPED] pf_negotiate_base_older
[22:36:32] [PASSED] pf_negotiate_base_prev
[22:36:32] [PASSED] pf_negotiate_latest_match
[22:36:32] [PASSED] pf_negotiate_latest_newer
[22:36:32] [PASSED] pf_negotiate_latest_next
[22:36:32] [SKIPPED] pf_negotiate_latest_older
[22:36:32] [SKIPPED] pf_negotiate_latest_prev
[22:36:32] =================== [PASSED] pf_service ====================
[22:36:32] ================= xe_guc_g2g (2 subtests) ==================
[22:36:32] ============== xe_live_guc_g2g_kunit_default ==============
[22:36:32] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[22:36:32] ============== xe_live_guc_g2g_kunit_allmem ===============
[22:36:32] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[22:36:32] =================== [SKIPPED] xe_guc_g2g ===================
[22:36:32] =================== xe_mocs (2 subtests) ===================
[22:36:32] ================ xe_live_mocs_kernel_kunit ================
[22:36:32] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[22:36:32] ================ xe_live_mocs_reset_kunit =================
[22:36:32] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[22:36:32] ==================== [SKIPPED] xe_mocs =====================
[22:36:32] ================= xe_migrate (2 subtests) ==================
[22:36:32] ================= xe_migrate_sanity_kunit =================
[22:36:32] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[22:36:32] ================== xe_validate_ccs_kunit ==================
[22:36:32] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[22:36:32] =================== [SKIPPED] xe_migrate ===================
[22:36:32] ================== xe_dma_buf (1 subtest) ==================
[22:36:32] ==================== xe_dma_buf_kunit =====================
[22:36:32] ================ [SKIPPED] xe_dma_buf_kunit ================
[22:36:32] =================== [SKIPPED] xe_dma_buf ===================
[22:36:32] ================= xe_bo_shrink (1 subtest) =================
[22:36:32] =================== xe_bo_shrink_kunit ====================
[22:36:32] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[22:36:32] ================== [SKIPPED] xe_bo_shrink ==================
[22:36:32] ==================== xe_bo (2 subtests) ====================
[22:36:32] ================== xe_ccs_migrate_kunit ===================
[22:36:32] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[22:36:32] ==================== xe_bo_evict_kunit ====================
[22:36:32] =============== [SKIPPED] xe_bo_evict_kunit ================
[22:36:32] ===================== [SKIPPED] xe_bo ======================
[22:36:32] ==================== args (13 subtests) ====================
[22:36:32] [PASSED] count_args_test
[22:36:32] [PASSED] call_args_example
[22:36:32] [PASSED] call_args_test
[22:36:32] [PASSED] drop_first_arg_example
[22:36:32] [PASSED] drop_first_arg_test
[22:36:32] [PASSED] first_arg_example
[22:36:32] [PASSED] first_arg_test
[22:36:32] [PASSED] last_arg_example
[22:36:32] [PASSED] last_arg_test
[22:36:32] [PASSED] pick_arg_example
[22:36:32] [PASSED] if_args_example
[22:36:32] [PASSED] if_args_test
[22:36:32] [PASSED] sep_comma_example
[22:36:32] ====================== [PASSED] args =======================
[22:36:32] =================== xe_pci (3 subtests) ====================
[22:36:32] ==================== check_graphics_ip ====================
[22:36:32] [PASSED] 12.00 Xe_LP
[22:36:32] [PASSED] 12.10 Xe_LP+
[22:36:32] [PASSED] 12.55 Xe_HPG
[22:36:32] [PASSED] 12.60 Xe_HPC
[22:36:32] [PASSED] 12.70 Xe_LPG
[22:36:32] [PASSED] 12.71 Xe_LPG
[22:36:32] [PASSED] 12.74 Xe_LPG+
[22:36:32] [PASSED] 20.01 Xe2_HPG
[22:36:32] [PASSED] 20.02 Xe2_HPG
[22:36:32] [PASSED] 20.04 Xe2_LPG
[22:36:32] [PASSED] 30.00 Xe3_LPG
[22:36:32] [PASSED] 30.01 Xe3_LPG
[22:36:32] [PASSED] 30.03 Xe3_LPG
[22:36:32] [PASSED] 30.04 Xe3_LPG
[22:36:32] [PASSED] 30.05 Xe3_LPG
[22:36:32] [PASSED] 35.10 Xe3p_LPG
[22:36:32] [PASSED] 35.11 Xe3p_XPC
[22:36:32] ================ [PASSED] check_graphics_ip ================
[22:36:32] ===================== check_media_ip ======================
[22:36:32] [PASSED] 12.00 Xe_M
[22:36:32] [PASSED] 12.55 Xe_HPM
[22:36:32] [PASSED] 13.00 Xe_LPM+
[22:36:32] [PASSED] 13.01 Xe2_HPM
[22:36:32] [PASSED] 20.00 Xe2_LPM
[22:36:32] [PASSED] 30.00 Xe3_LPM
[22:36:32] [PASSED] 30.02 Xe3_LPM
[22:36:32] [PASSED] 35.00 Xe3p_LPM
[22:36:32] [PASSED] 35.03 Xe3p_HPM
[22:36:32] ================= [PASSED] check_media_ip ==================
[22:36:32] =================== check_platform_desc ===================
[22:36:32] [PASSED] 0x9A60 (TIGERLAKE)
[22:36:32] [PASSED] 0x9A68 (TIGERLAKE)
[22:36:32] [PASSED] 0x9A70 (TIGERLAKE)
[22:36:32] [PASSED] 0x9A40 (TIGERLAKE)
[22:36:32] [PASSED] 0x9A49 (TIGERLAKE)
[22:36:32] [PASSED] 0x9A59 (TIGERLAKE)
[22:36:32] [PASSED] 0x9A78 (TIGERLAKE)
[22:36:32] [PASSED] 0x9AC0 (TIGERLAKE)
[22:36:32] [PASSED] 0x9AC9 (TIGERLAKE)
[22:36:32] [PASSED] 0x9AD9 (TIGERLAKE)
[22:36:32] [PASSED] 0x9AF8 (TIGERLAKE)
[22:36:32] [PASSED] 0x4C80 (ROCKETLAKE)
[22:36:32] [PASSED] 0x4C8A (ROCKETLAKE)
[22:36:32] [PASSED] 0x4C8B (ROCKETLAKE)
[22:36:32] [PASSED] 0x4C8C (ROCKETLAKE)
[22:36:32] [PASSED] 0x4C90 (ROCKETLAKE)
[22:36:32] [PASSED] 0x4C9A (ROCKETLAKE)
[22:36:32] [PASSED] 0x4680 (ALDERLAKE_S)
[22:36:32] [PASSED] 0x4682 (ALDERLAKE_S)
[22:36:32] [PASSED] 0x4688 (ALDERLAKE_S)
[22:36:32] [PASSED] 0x468A (ALDERLAKE_S)
[22:36:32] [PASSED] 0x468B (ALDERLAKE_S)
[22:36:32] [PASSED] 0x4690 (ALDERLAKE_S)
[22:36:32] [PASSED] 0x4692 (ALDERLAKE_S)
[22:36:32] [PASSED] 0x4693 (ALDERLAKE_S)
[22:36:32] [PASSED] 0x46A0 (ALDERLAKE_P)
[22:36:32] [PASSED] 0x46A1 (ALDERLAKE_P)
[22:36:32] [PASSED] 0x46A2 (ALDERLAKE_P)
[22:36:32] [PASSED] 0x46A3 (ALDERLAKE_P)
[22:36:32] [PASSED] 0x46A6 (ALDERLAKE_P)
[22:36:32] [PASSED] 0x46A8 (ALDERLAKE_P)
[22:36:32] [PASSED] 0x46AA (ALDERLAKE_P)
[22:36:32] [PASSED] 0x462A (ALDERLAKE_P)
[22:36:32] [PASSED] 0x4626 (ALDERLAKE_P)
[22:36:32] [PASSED] 0x4628 (ALDERLAKE_P)
[22:36:32] [PASSED] 0x46B0 (ALDERLAKE_P)
[22:36:32] [PASSED] 0x46B1 (ALDERLAKE_P)
[22:36:32] [PASSED] 0x46B2 (ALDERLAKE_P)
[22:36:32] [PASSED] 0x46B3 (ALDERLAKE_P)
[22:36:32] [PASSED] 0x46C0 (ALDERLAKE_P)
[22:36:32] [PASSED] 0x46C1 (ALDERLAKE_P)
[22:36:32] [PASSED] 0x46C2 (ALDERLAKE_P)
[22:36:32] [PASSED] 0x46C3 (ALDERLAKE_P)
[22:36:32] [PASSED] 0x46D0 (ALDERLAKE_N)
[22:36:32] [PASSED] 0x46D1 (ALDERLAKE_N)
[22:36:32] [PASSED] 0x46D2 (ALDERLAKE_N)
[22:36:32] [PASSED] 0x46D3 (ALDERLAKE_N)
[22:36:32] [PASSED] 0x46D4 (ALDERLAKE_N)
[22:36:32] [PASSED] 0xA721 (ALDERLAKE_P)
[22:36:32] [PASSED] 0xA7A1 (ALDERLAKE_P)
[22:36:32] [PASSED] 0xA7A9 (ALDERLAKE_P)
[22:36:32] [PASSED] 0xA7AC (ALDERLAKE_P)
[22:36:32] [PASSED] 0xA7AD (ALDERLAKE_P)
[22:36:32] [PASSED] 0xA720 (ALDERLAKE_P)
[22:36:32] [PASSED] 0xA7A0 (ALDERLAKE_P)
[22:36:32] [PASSED] 0xA7A8 (ALDERLAKE_P)
[22:36:32] [PASSED] 0xA7AA (ALDERLAKE_P)
[22:36:32] [PASSED] 0xA7AB (ALDERLAKE_P)
[22:36:32] [PASSED] 0xA780 (ALDERLAKE_S)
[22:36:32] [PASSED] 0xA781 (ALDERLAKE_S)
[22:36:32] [PASSED] 0xA782 (ALDERLAKE_S)
[22:36:32] [PASSED] 0xA783 (ALDERLAKE_S)
[22:36:32] [PASSED] 0xA788 (ALDERLAKE_S)
[22:36:32] [PASSED] 0xA789 (ALDERLAKE_S)
[22:36:32] [PASSED] 0xA78A (ALDERLAKE_S)
[22:36:32] [PASSED] 0xA78B (ALDERLAKE_S)
[22:36:32] [PASSED] 0x4905 (DG1)
[22:36:32] [PASSED] 0x4906 (DG1)
[22:36:32] [PASSED] 0x4907 (DG1)
[22:36:32] [PASSED] 0x4908 (DG1)
[22:36:32] [PASSED] 0x4909 (DG1)
[22:36:32] [PASSED] 0x56C0 (DG2)
[22:36:32] [PASSED] 0x56C2 (DG2)
[22:36:32] [PASSED] 0x56C1 (DG2)
[22:36:32] [PASSED] 0x7D51 (METEORLAKE)
[22:36:32] [PASSED] 0x7DD1 (METEORLAKE)
[22:36:32] [PASSED] 0x7D41 (METEORLAKE)
[22:36:32] [PASSED] 0x7D67 (METEORLAKE)
[22:36:32] [PASSED] 0xB640 (METEORLAKE)
[22:36:32] [PASSED] 0x56A0 (DG2)
[22:36:32] [PASSED] 0x56A1 (DG2)
[22:36:32] [PASSED] 0x56A2 (DG2)
[22:36:32] [PASSED] 0x56BE (DG2)
[22:36:32] [PASSED] 0x56BF (DG2)
[22:36:32] [PASSED] 0x5690 (DG2)
[22:36:32] [PASSED] 0x5691 (DG2)
[22:36:32] [PASSED] 0x5692 (DG2)
[22:36:32] [PASSED] 0x56A5 (DG2)
[22:36:32] [PASSED] 0x56A6 (DG2)
[22:36:32] [PASSED] 0x56B0 (DG2)
[22:36:32] [PASSED] 0x56B1 (DG2)
[22:36:32] [PASSED] 0x56BA (DG2)
[22:36:32] [PASSED] 0x56BB (DG2)
[22:36:32] [PASSED] 0x56BC (DG2)
[22:36:32] [PASSED] 0x56BD (DG2)
[22:36:32] [PASSED] 0x5693 (DG2)
[22:36:32] [PASSED] 0x5694 (DG2)
[22:36:32] [PASSED] 0x5695 (DG2)
[22:36:32] [PASSED] 0x56A3 (DG2)
[22:36:32] [PASSED] 0x56A4 (DG2)
[22:36:32] [PASSED] 0x56B2 (DG2)
[22:36:32] [PASSED] 0x56B3 (DG2)
[22:36:32] [PASSED] 0x5696 (DG2)
[22:36:32] [PASSED] 0x5697 (DG2)
[22:36:32] [PASSED] 0xB69 (PVC)
[22:36:32] [PASSED] 0xB6E (PVC)
[22:36:32] [PASSED] 0xBD4 (PVC)
[22:36:32] [PASSED] 0xBD5 (PVC)
[22:36:32] [PASSED] 0xBD6 (PVC)
[22:36:32] [PASSED] 0xBD7 (PVC)
[22:36:32] [PASSED] 0xBD8 (PVC)
[22:36:32] [PASSED] 0xBD9 (PVC)
[22:36:32] [PASSED] 0xBDA (PVC)
[22:36:32] [PASSED] 0xBDB (PVC)
[22:36:32] [PASSED] 0xBE0 (PVC)
[22:36:32] [PASSED] 0xBE1 (PVC)
[22:36:32] [PASSED] 0xBE5 (PVC)
[22:36:32] [PASSED] 0x7D40 (METEORLAKE)
[22:36:32] [PASSED] 0x7D45 (METEORLAKE)
[22:36:32] [PASSED] 0x7D55 (METEORLAKE)
[22:36:32] [PASSED] 0x7D60 (METEORLAKE)
[22:36:32] [PASSED] 0x7DD5 (METEORLAKE)
[22:36:32] [PASSED] 0x6420 (LUNARLAKE)
[22:36:32] [PASSED] 0x64A0 (LUNARLAKE)
[22:36:32] [PASSED] 0x64B0 (LUNARLAKE)
[22:36:32] [PASSED] 0xE202 (BATTLEMAGE)
[22:36:32] [PASSED] 0xE209 (BATTLEMAGE)
[22:36:32] [PASSED] 0xE20B (BATTLEMAGE)
[22:36:32] [PASSED] 0xE20C (BATTLEMAGE)
[22:36:32] [PASSED] 0xE20D (BATTLEMAGE)
[22:36:32] [PASSED] 0xE210 (BATTLEMAGE)
[22:36:32] [PASSED] 0xE211 (BATTLEMAGE)
[22:36:32] [PASSED] 0xE212 (BATTLEMAGE)
[22:36:32] [PASSED] 0xE216 (BATTLEMAGE)
[22:36:32] [PASSED] 0xE220 (BATTLEMAGE)
[22:36:32] [PASSED] 0xE221 (BATTLEMAGE)
[22:36:32] [PASSED] 0xE222 (BATTLEMAGE)
[22:36:32] [PASSED] 0xE223 (BATTLEMAGE)
[22:36:32] [PASSED] 0xB080 (PANTHERLAKE)
[22:36:32] [PASSED] 0xB081 (PANTHERLAKE)
[22:36:32] [PASSED] 0xB082 (PANTHERLAKE)
[22:36:32] [PASSED] 0xB083 (PANTHERLAKE)
[22:36:32] [PASSED] 0xB084 (PANTHERLAKE)
[22:36:32] [PASSED] 0xB085 (PANTHERLAKE)
[22:36:32] [PASSED] 0xB086 (PANTHERLAKE)
[22:36:32] [PASSED] 0xB087 (PANTHERLAKE)
[22:36:32] [PASSED] 0xB08F (PANTHERLAKE)
[22:36:32] [PASSED] 0xB090 (PANTHERLAKE)
[22:36:32] [PASSED] 0xB0A0 (PANTHERLAKE)
[22:36:32] [PASSED] 0xB0B0 (PANTHERLAKE)
[22:36:32] [PASSED] 0xFD80 (PANTHERLAKE)
[22:36:32] [PASSED] 0xFD81 (PANTHERLAKE)
[22:36:32] [PASSED] 0xD740 (NOVALAKE_S)
[22:36:32] [PASSED] 0xD741 (NOVALAKE_S)
[22:36:32] [PASSED] 0xD742 (NOVALAKE_S)
[22:36:32] [PASSED] 0xD743 (NOVALAKE_S)
[22:36:32] [PASSED] 0xD744 (NOVALAKE_S)
[22:36:32] [PASSED] 0xD745 (NOVALAKE_S)
[22:36:32] [PASSED] 0x674C (CRESCENTISLAND)
[22:36:32] [PASSED] 0x674D (CRESCENTISLAND)
[22:36:32] [PASSED] 0x674E (CRESCENTISLAND)
[22:36:32] [PASSED] 0x674F (CRESCENTISLAND)
[22:36:32] [PASSED] 0x6750 (CRESCENTISLAND)
[22:36:32] [PASSED] 0xD750 (NOVALAKE_P)
[22:36:32] [PASSED] 0xD751 (NOVALAKE_P)
[22:36:32] [PASSED] 0xD752 (NOVALAKE_P)
[22:36:32] [PASSED] 0xD753 (NOVALAKE_P)
[22:36:32] [PASSED] 0xD754 (NOVALAKE_P)
[22:36:32] [PASSED] 0xD755 (NOVALAKE_P)
[22:36:32] [PASSED] 0xD756 (NOVALAKE_P)
[22:36:32] [PASSED] 0xD757 (NOVALAKE_P)
[22:36:32] [PASSED] 0xD75F (NOVALAKE_P)
[22:36:32] =============== [PASSED] check_platform_desc ===============
[22:36:32] ===================== [PASSED] xe_pci ======================
[22:36:32] =================== xe_rtp (3 subtests) ====================
[22:36:32] =================== xe_rtp_rules_tests ====================
[22:36:32] [PASSED] no
[22:36:32] [PASSED] yes
[22:36:32] [PASSED] no-and-no
[22:36:32] [PASSED] no-and-yes
[22:36:32] [PASSED] yes-and-no
[22:36:32] [PASSED] yes-and-yes
[22:36:32] [PASSED] no-or-no
[22:36:32] [PASSED] no-or-yes
[22:36:32] [PASSED] yes-or-no
[22:36:32] [PASSED] yes-or-yes
[22:36:32] [PASSED] no-yes-or-yes-no
[22:36:32] [PASSED] no-yes-or-yes-yes
[22:36:32] [PASSED] yes-yes-or-no-yes
[22:36:32] [PASSED] yes-yes-or-yes-yes
[22:36:32] [PASSED] no-no-or-yes-or-no
[22:36:32] [PASSED] or
[22:36:32] [PASSED] or-yes
[22:36:32] [PASSED] or-no
[22:36:32] [PASSED] yes-or
[22:36:32] [PASSED] no-or
[22:36:32] [PASSED] no-or-or-yes
[22:36:32] [PASSED] yes-or-or-no
[22:36:32] [PASSED] no-or-or-no
[22:36:32] [PASSED] missing-context-engine-class
[22:36:32] [PASSED] missing-context-engine-class-or-yes
[22:36:32] [PASSED] missing-context-engine-class-or-or-yes
[22:36:32] =============== [PASSED] xe_rtp_rules_tests ================
[22:36:32] =============== xe_rtp_process_to_sr_tests ================
[22:36:32] [PASSED] coalesce-same-reg
[22:36:32] [PASSED] no-match-no-add
[22:36:32] [PASSED] two-regs-two-entries
[22:36:32] [PASSED] clr-one-set-other
[22:36:32] [PASSED] set-field
[22:36:32] [PASSED] conflict-duplicate
[22:36:32] [PASSED] conflict-not-disjoint
[22:36:32] [PASSED] conflict-reg-type
[22:36:32] [PASSED] bad-mcr-reg-forced-to-regular
[22:36:32] [PASSED] bad-regular-reg-forced-to-mcr
[22:36:32] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[22:36:32] ================== xe_rtp_process_tests ===================
[22:36:32] [PASSED] active1
[22:36:32] [PASSED] active2
[22:36:32] [PASSED] active-inactive
[22:36:32] [PASSED] inactive-active
[22:36:32] [PASSED] inactive-active-inactive
[22:36:32] [PASSED] inactive-inactive-inactive
[22:36:32] ============== [PASSED] xe_rtp_process_tests ===============
[22:36:32] ===================== [PASSED] xe_rtp ======================
[22:36:32] ==================== xe_wa (1 subtest) =====================
[22:36:32] ======================== xe_wa_gt =========================
[22:36:32] [PASSED] TIGERLAKE B0
[22:36:32] [PASSED] DG1 A0
[22:36:32] [PASSED] DG1 B0
[22:36:32] [PASSED] ALDERLAKE_S A0
[22:36:32] [PASSED] ALDERLAKE_S B0
[22:36:32] [PASSED] ALDERLAKE_S C0
[22:36:32] [PASSED] ALDERLAKE_S D0
[22:36:32] [PASSED] ALDERLAKE_P A0
[22:36:32] [PASSED] ALDERLAKE_P B0
[22:36:32] [PASSED] ALDERLAKE_P C0
[22:36:32] [PASSED] ALDERLAKE_S RPLS D0
[22:36:32] [PASSED] ALDERLAKE_P RPLU E0
[22:36:32] [PASSED] DG2 G10 C0
[22:36:32] [PASSED] DG2 G11 B1
[22:36:32] [PASSED] DG2 G12 A1
[22:36:32] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:36:32] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:36:32] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[22:36:32] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[22:36:32] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[22:36:32] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[22:36:32] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[22:36:32] ==================== [PASSED] xe_wa_gt =====================
[22:36:32] ====================== [PASSED] xe_wa ======================
[22:36:32] ============================================================
[22:36:32] Testing complete. Ran 624 tests: passed: 606, skipped: 18
[22:36:32] Elapsed time: 36.093s total, 4.236s configuring, 31.191s building, 0.631s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[22:36:32] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:36:34] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:36:58] Starting KUnit Kernel (1/1)...
[22:36:58] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:36:58] ============ drm_test_pick_cmdline (2 subtests) ============
[22:36:58] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[22:36:58] =============== drm_test_pick_cmdline_named ===============
[22:36:58] [PASSED] NTSC
[22:36:58] [PASSED] NTSC-J
[22:36:58] [PASSED] PAL
[22:36:58] [PASSED] PAL-M
[22:36:58] =========== [PASSED] drm_test_pick_cmdline_named ===========
[22:36:58] ============== [PASSED] drm_test_pick_cmdline ==============
[22:36:58] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[22:36:58] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[22:36:58] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[22:36:58] =========== drm_validate_clone_mode (2 subtests) ===========
[22:36:58] ============== drm_test_check_in_clone_mode ===============
[22:36:58] [PASSED] in_clone_mode
[22:36:58] [PASSED] not_in_clone_mode
[22:36:58] ========== [PASSED] drm_test_check_in_clone_mode ===========
[22:36:58] =============== drm_test_check_valid_clones ===============
[22:36:58] [PASSED] not_in_clone_mode
[22:36:58] [PASSED] valid_clone
[22:36:58] [PASSED] invalid_clone
[22:36:58] =========== [PASSED] drm_test_check_valid_clones ===========
[22:36:58] ============= [PASSED] drm_validate_clone_mode =============
[22:36:58] ============= drm_validate_modeset (1 subtest) =============
[22:36:58] [PASSED] drm_test_check_connector_changed_modeset
[22:36:58] ============== [PASSED] drm_validate_modeset ===============
[22:36:58] ====== drm_test_bridge_get_current_state (2 subtests) ======
[22:36:58] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[22:36:58] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[22:36:58] ======== [PASSED] drm_test_bridge_get_current_state ========
[22:36:58] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[22:36:58] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[22:36:58] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[22:36:58] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[22:36:58] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[22:36:58] ============== drm_bridge_alloc (2 subtests) ===============
[22:36:58] [PASSED] drm_test_drm_bridge_alloc_basic
[22:36:58] [PASSED] drm_test_drm_bridge_alloc_get_put
[22:36:58] ================ [PASSED] drm_bridge_alloc =================
[22:36:58] ============= drm_cmdline_parser (40 subtests) =============
[22:36:58] [PASSED] drm_test_cmdline_force_d_only
[22:36:58] [PASSED] drm_test_cmdline_force_D_only_dvi
[22:36:58] [PASSED] drm_test_cmdline_force_D_only_hdmi
[22:36:58] [PASSED] drm_test_cmdline_force_D_only_not_digital
[22:36:58] [PASSED] drm_test_cmdline_force_e_only
[22:36:58] [PASSED] drm_test_cmdline_res
[22:36:58] [PASSED] drm_test_cmdline_res_vesa
[22:36:58] [PASSED] drm_test_cmdline_res_vesa_rblank
[22:36:58] [PASSED] drm_test_cmdline_res_rblank
[22:36:58] [PASSED] drm_test_cmdline_res_bpp
[22:36:58] [PASSED] drm_test_cmdline_res_refresh
[22:36:58] [PASSED] drm_test_cmdline_res_bpp_refresh
[22:36:58] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[22:36:58] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[22:36:58] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[22:36:58] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[22:36:58] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[22:36:58] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[22:36:58] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[22:36:58] [PASSED] drm_test_cmdline_res_margins_force_on
[22:36:58] [PASSED] drm_test_cmdline_res_vesa_margins
[22:36:58] [PASSED] drm_test_cmdline_name
[22:36:58] [PASSED] drm_test_cmdline_name_bpp
[22:36:58] [PASSED] drm_test_cmdline_name_option
[22:36:58] [PASSED] drm_test_cmdline_name_bpp_option
[22:36:58] [PASSED] drm_test_cmdline_rotate_0
[22:36:58] [PASSED] drm_test_cmdline_rotate_90
[22:36:58] [PASSED] drm_test_cmdline_rotate_180
[22:36:58] [PASSED] drm_test_cmdline_rotate_270
[22:36:58] [PASSED] drm_test_cmdline_hmirror
[22:36:58] [PASSED] drm_test_cmdline_vmirror
[22:36:58] [PASSED] drm_test_cmdline_margin_options
[22:36:58] [PASSED] drm_test_cmdline_multiple_options
[22:36:58] [PASSED] drm_test_cmdline_bpp_extra_and_option
[22:36:58] [PASSED] drm_test_cmdline_extra_and_option
[22:36:58] [PASSED] drm_test_cmdline_freestanding_options
[22:36:58] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[22:36:58] [PASSED] drm_test_cmdline_panel_orientation
[22:36:58] ================ drm_test_cmdline_invalid =================
[22:36:58] [PASSED] margin_only
[22:36:58] [PASSED] interlace_only
[22:36:58] [PASSED] res_missing_x
[22:36:58] [PASSED] res_missing_y
[22:36:58] [PASSED] res_bad_y
[22:36:58] [PASSED] res_missing_y_bpp
[22:36:58] [PASSED] res_bad_bpp
[22:36:58] [PASSED] res_bad_refresh
[22:36:58] [PASSED] res_bpp_refresh_force_on_off
[22:36:58] [PASSED] res_invalid_mode
[22:36:58] [PASSED] res_bpp_wrong_place_mode
[22:36:58] [PASSED] name_bpp_refresh
[22:36:58] [PASSED] name_refresh
[22:36:58] [PASSED] name_refresh_wrong_mode
[22:36:58] [PASSED] name_refresh_invalid_mode
[22:36:58] [PASSED] rotate_multiple
[22:36:58] [PASSED] rotate_invalid_val
[22:36:58] [PASSED] rotate_truncated
[22:36:58] [PASSED] invalid_option
[22:36:58] [PASSED] invalid_tv_option
[22:36:58] [PASSED] truncated_tv_option
[22:36:58] ============ [PASSED] drm_test_cmdline_invalid =============
[22:36:58] =============== drm_test_cmdline_tv_options ===============
[22:36:58] [PASSED] NTSC
[22:36:58] [PASSED] NTSC_443
[22:36:58] [PASSED] NTSC_J
[22:36:58] [PASSED] PAL
[22:36:58] [PASSED] PAL_M
[22:36:58] [PASSED] PAL_N
[22:36:58] [PASSED] SECAM
[22:36:58] [PASSED] MONO_525
[22:36:58] [PASSED] MONO_625
[22:36:58] =========== [PASSED] drm_test_cmdline_tv_options ===========
[22:36:58] =============== [PASSED] drm_cmdline_parser ================
[22:36:58] ========== drmm_connector_hdmi_init (20 subtests) ==========
[22:36:58] [PASSED] drm_test_connector_hdmi_init_valid
[22:36:58] [PASSED] drm_test_connector_hdmi_init_bpc_8
[22:36:58] [PASSED] drm_test_connector_hdmi_init_bpc_10
[22:36:58] [PASSED] drm_test_connector_hdmi_init_bpc_12
[22:36:58] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[22:36:58] [PASSED] drm_test_connector_hdmi_init_bpc_null
[22:36:58] [PASSED] drm_test_connector_hdmi_init_formats_empty
[22:36:58] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[22:36:58] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[22:36:58] [PASSED] supported_formats=0x9 yuv420_allowed=1
[22:36:58] [PASSED] supported_formats=0x9 yuv420_allowed=0
[22:36:58] [PASSED] supported_formats=0x5 yuv420_allowed=1
[22:36:58] [PASSED] supported_formats=0x5 yuv420_allowed=0
[22:36:58] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[22:36:58] [PASSED] drm_test_connector_hdmi_init_null_ddc
[22:36:58] [PASSED] drm_test_connector_hdmi_init_null_product
[22:36:58] [PASSED] drm_test_connector_hdmi_init_null_vendor
[22:36:58] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[22:36:58] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[22:36:58] [PASSED] drm_test_connector_hdmi_init_product_valid
[22:36:58] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[22:36:58] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[22:36:58] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[22:36:58] ========= drm_test_connector_hdmi_init_type_valid =========
[22:36:58] [PASSED] HDMI-A
[22:36:58] [PASSED] HDMI-B
[22:36:58] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[22:36:58] ======== drm_test_connector_hdmi_init_type_invalid ========
[22:36:58] [PASSED] Unknown
[22:36:58] [PASSED] VGA
[22:36:58] [PASSED] DVI-I
[22:36:58] [PASSED] DVI-D
[22:36:58] [PASSED] DVI-A
[22:36:58] [PASSED] Composite
[22:36:58] [PASSED] SVIDEO
[22:36:58] [PASSED] LVDS
[22:36:58] [PASSED] Component
[22:36:58] [PASSED] DIN
[22:36:58] [PASSED] DP
[22:36:58] [PASSED] TV
[22:36:58] [PASSED] eDP
[22:36:58] [PASSED] Virtual
[22:36:58] [PASSED] DSI
[22:36:58] [PASSED] DPI
[22:36:58] [PASSED] Writeback
[22:36:58] [PASSED] SPI
[22:36:58] [PASSED] USB
[22:36:58] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[22:36:58] ============ [PASSED] drmm_connector_hdmi_init =============
[22:36:58] ============= drmm_connector_init (3 subtests) =============
[22:36:58] [PASSED] drm_test_drmm_connector_init
[22:36:58] [PASSED] drm_test_drmm_connector_init_null_ddc
[22:36:58] ========= drm_test_drmm_connector_init_type_valid =========
[22:36:58] [PASSED] Unknown
[22:36:58] [PASSED] VGA
[22:36:58] [PASSED] DVI-I
[22:36:58] [PASSED] DVI-D
[22:36:58] [PASSED] DVI-A
[22:36:58] [PASSED] Composite
[22:36:58] [PASSED] SVIDEO
[22:36:58] [PASSED] LVDS
[22:36:58] [PASSED] Component
[22:36:58] [PASSED] DIN
[22:36:58] [PASSED] DP
[22:36:58] [PASSED] HDMI-A
[22:36:58] [PASSED] HDMI-B
[22:36:58] [PASSED] TV
[22:36:58] [PASSED] eDP
[22:36:58] [PASSED] Virtual
[22:36:58] [PASSED] DSI
[22:36:58] [PASSED] DPI
[22:36:58] [PASSED] Writeback
[22:36:58] [PASSED] SPI
[22:36:58] [PASSED] USB
[22:36:58] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[22:36:58] =============== [PASSED] drmm_connector_init ===============
[22:36:58] ========= drm_connector_dynamic_init (6 subtests) ==========
[22:36:58] [PASSED] drm_test_drm_connector_dynamic_init
[22:36:58] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[22:36:58] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[22:36:58] [PASSED] drm_test_drm_connector_dynamic_init_properties
[22:36:58] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[22:36:58] [PASSED] Unknown
[22:36:58] [PASSED] VGA
[22:36:58] [PASSED] DVI-I
[22:36:58] [PASSED] DVI-D
[22:36:58] [PASSED] DVI-A
[22:36:58] [PASSED] Composite
[22:36:58] [PASSED] SVIDEO
[22:36:58] [PASSED] LVDS
[22:36:58] [PASSED] Component
[22:36:58] [PASSED] DIN
[22:36:58] [PASSED] DP
[22:36:58] [PASSED] HDMI-A
[22:36:58] [PASSED] HDMI-B
[22:36:58] [PASSED] TV
[22:36:58] [PASSED] eDP
[22:36:58] [PASSED] Virtual
[22:36:58] [PASSED] DSI
[22:36:58] [PASSED] DPI
[22:36:58] [PASSED] Writeback
[22:36:58] [PASSED] SPI
[22:36:58] [PASSED] USB
[22:36:58] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[22:36:58] ======== drm_test_drm_connector_dynamic_init_name =========
[22:36:58] [PASSED] Unknown
[22:36:58] [PASSED] VGA
[22:36:58] [PASSED] DVI-I
[22:36:58] [PASSED] DVI-D
[22:36:58] [PASSED] DVI-A
[22:36:58] [PASSED] Composite
[22:36:58] [PASSED] SVIDEO
[22:36:58] [PASSED] LVDS
[22:36:58] [PASSED] Component
[22:36:58] [PASSED] DIN
[22:36:58] [PASSED] DP
[22:36:58] [PASSED] HDMI-A
[22:36:58] [PASSED] HDMI-B
[22:36:58] [PASSED] TV
[22:36:58] [PASSED] eDP
[22:36:58] [PASSED] Virtual
[22:36:58] [PASSED] DSI
[22:36:58] [PASSED] DPI
[22:36:58] [PASSED] Writeback
[22:36:58] [PASSED] SPI
[22:36:58] [PASSED] USB
[22:36:58] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[22:36:58] =========== [PASSED] drm_connector_dynamic_init ============
[22:36:58] ==== drm_connector_dynamic_register_early (4 subtests) =====
[22:36:58] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[22:36:58] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[22:36:58] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[22:36:58] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[22:36:58] ====== [PASSED] drm_connector_dynamic_register_early =======
[22:36:58] ======= drm_connector_dynamic_register (7 subtests) ========
[22:36:58] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[22:36:58] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[22:36:58] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[22:36:58] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[22:36:58] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[22:36:58] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[22:36:58] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[22:36:58] ========= [PASSED] drm_connector_dynamic_register ==========
[22:36:58] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[22:36:58] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[22:36:58] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[22:36:58] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[22:36:58] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[22:36:58] ========== drm_test_get_tv_mode_from_name_valid ===========
[22:36:58] [PASSED] NTSC
[22:36:58] [PASSED] NTSC-443
[22:36:58] [PASSED] NTSC-J
[22:36:58] [PASSED] PAL
[22:36:58] [PASSED] PAL-M
[22:36:58] [PASSED] PAL-N
[22:36:58] [PASSED] SECAM
[22:36:58] [PASSED] Mono
[22:36:58] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[22:36:58] [PASSED] drm_test_get_tv_mode_from_name_truncated
[22:36:58] ============ [PASSED] drm_get_tv_mode_from_name ============
[22:36:58] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[22:36:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[22:36:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[22:36:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[22:36:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[22:36:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[22:36:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[22:36:58] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[22:36:58] [PASSED] VIC 96
[22:36:58] [PASSED] VIC 97
[22:36:58] [PASSED] VIC 101
[22:36:58] [PASSED] VIC 102
[22:36:58] [PASSED] VIC 106
[22:36:58] [PASSED] VIC 107
[22:36:58] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[22:36:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[22:36:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[22:36:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[22:36:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[22:36:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[22:36:58] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[22:36:58] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[22:36:58] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[22:36:58] [PASSED] Automatic
[22:36:58] [PASSED] Full
[22:36:58] [PASSED] Limited 16:235
[22:36:58] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[22:36:58] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[22:36:58] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[22:36:58] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[22:36:58] === drm_test_drm_hdmi_connector_get_output_format_name ====
[22:36:58] [PASSED] RGB
[22:36:58] [PASSED] YUV 4:2:0
[22:36:58] [PASSED] YUV 4:2:2
[22:36:58] [PASSED] YUV 4:4:4
[22:36:58] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[22:36:58] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[22:36:58] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[22:36:58] ============= drm_damage_helper (21 subtests) ==============
[22:36:58] [PASSED] drm_test_damage_iter_no_damage
[22:36:58] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[22:36:58] [PASSED] drm_test_damage_iter_no_damage_src_moved
[22:36:58] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[22:36:58] [PASSED] drm_test_damage_iter_no_damage_not_visible
[22:36:58] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[22:36:58] [PASSED] drm_test_damage_iter_no_damage_no_fb
[22:36:58] [PASSED] drm_test_damage_iter_simple_damage
[22:36:58] [PASSED] drm_test_damage_iter_single_damage
[22:36:58] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[22:36:58] [PASSED] drm_test_damage_iter_single_damage_outside_src
[22:36:58] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[22:36:58] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[22:36:58] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[22:36:58] [PASSED] drm_test_damage_iter_single_damage_src_moved
[22:36:58] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[22:36:58] [PASSED] drm_test_damage_iter_damage
[22:36:58] [PASSED] drm_test_damage_iter_damage_one_intersect
[22:36:58] [PASSED] drm_test_damage_iter_damage_one_outside
[22:36:58] [PASSED] drm_test_damage_iter_damage_src_moved
[22:36:58] [PASSED] drm_test_damage_iter_damage_not_visible
[22:36:58] ================ [PASSED] drm_damage_helper ================
[22:36:58] ============== drm_dp_mst_helper (3 subtests) ==============
[22:36:58] ============== drm_test_dp_mst_calc_pbn_mode ==============
[22:36:58] [PASSED] Clock 154000 BPP 30 DSC disabled
[22:36:58] [PASSED] Clock 234000 BPP 30 DSC disabled
[22:36:58] [PASSED] Clock 297000 BPP 24 DSC disabled
[22:36:58] [PASSED] Clock 332880 BPP 24 DSC enabled
[22:36:58] [PASSED] Clock 324540 BPP 24 DSC enabled
[22:36:58] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[22:36:58] ============== drm_test_dp_mst_calc_pbn_div ===============
[22:36:58] [PASSED] Link rate 2000000 lane count 4
[22:36:58] [PASSED] Link rate 2000000 lane count 2
[22:36:58] [PASSED] Link rate 2000000 lane count 1
[22:36:58] [PASSED] Link rate 1350000 lane count 4
[22:36:58] [PASSED] Link rate 1350000 lane count 2
[22:36:58] [PASSED] Link rate 1350000 lane count 1
[22:36:58] [PASSED] Link rate 1000000 lane count 4
[22:36:58] [PASSED] Link rate 1000000 lane count 2
[22:36:58] [PASSED] Link rate 1000000 lane count 1
[22:36:58] [PASSED] Link rate 810000 lane count 4
[22:36:58] [PASSED] Link rate 810000 lane count 2
[22:36:58] [PASSED] Link rate 810000 lane count 1
[22:36:58] [PASSED] Link rate 540000 lane count 4
[22:36:58] [PASSED] Link rate 540000 lane count 2
[22:36:58] [PASSED] Link rate 540000 lane count 1
[22:36:58] [PASSED] Link rate 270000 lane count 4
[22:36:58] [PASSED] Link rate 270000 lane count 2
[22:36:58] [PASSED] Link rate 270000 lane count 1
[22:36:58] [PASSED] Link rate 162000 lane count 4
[22:36:58] [PASSED] Link rate 162000 lane count 2
[22:36:58] [PASSED] Link rate 162000 lane count 1
[22:36:58] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[22:36:58] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[22:36:58] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[22:36:58] [PASSED] DP_POWER_UP_PHY with port number
[22:36:58] [PASSED] DP_POWER_DOWN_PHY with port number
[22:36:58] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[22:36:58] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[22:36:58] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[22:36:58] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[22:36:58] [PASSED] DP_QUERY_PAYLOAD with port number
[22:36:58] [PASSED] DP_QUERY_PAYLOAD with VCPI
[22:36:58] [PASSED] DP_REMOTE_DPCD_READ with port number
[22:36:58] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[22:36:58] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[22:36:58] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[22:36:58] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[22:36:58] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[22:36:58] [PASSED] DP_REMOTE_I2C_READ with port number
[22:36:58] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[22:36:58] [PASSED] DP_REMOTE_I2C_READ with transactions array
[22:36:58] [PASSED] DP_REMOTE_I2C_WRITE with port number
[22:36:58] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[22:36:58] [PASSED] DP_REMOTE_I2C_WRITE with data array
[22:36:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[22:36:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[22:36:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[22:36:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[22:36:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[22:36:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[22:36:58] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[22:36:58] ================ [PASSED] drm_dp_mst_helper ================
[22:36:58] ================== drm_exec (7 subtests) ===================
[22:36:58] [PASSED] sanitycheck
[22:36:58] [PASSED] test_lock
[22:36:58] [PASSED] test_lock_unlock
[22:36:58] [PASSED] test_duplicates
[22:36:58] [PASSED] test_prepare
[22:36:58] [PASSED] test_prepare_array
[22:36:58] [PASSED] test_multiple_loops
[22:36:58] ==================== [PASSED] drm_exec =====================
[22:36:58] =========== drm_format_helper_test (17 subtests) ===========
[22:36:58] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[22:36:58] [PASSED] single_pixel_source_buffer
[22:36:58] [PASSED] single_pixel_clip_rectangle
[22:36:58] [PASSED] well_known_colors
[22:36:58] [PASSED] destination_pitch
[22:36:58] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[22:36:58] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[22:36:58] [PASSED] single_pixel_source_buffer
[22:36:58] [PASSED] single_pixel_clip_rectangle
[22:36:58] [PASSED] well_known_colors
[22:36:58] [PASSED] destination_pitch
[22:36:58] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[22:36:58] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[22:36:58] [PASSED] single_pixel_source_buffer
[22:36:58] [PASSED] single_pixel_clip_rectangle
[22:36:58] [PASSED] well_known_colors
[22:36:58] [PASSED] destination_pitch
[22:36:58] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[22:36:58] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[22:36:58] [PASSED] single_pixel_source_buffer
[22:36:58] [PASSED] single_pixel_clip_rectangle
[22:36:58] [PASSED] well_known_colors
[22:36:58] [PASSED] destination_pitch
[22:36:58] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[22:36:58] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[22:36:58] [PASSED] single_pixel_source_buffer
[22:36:58] [PASSED] single_pixel_clip_rectangle
[22:36:58] [PASSED] well_known_colors
[22:36:58] [PASSED] destination_pitch
[22:36:58] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[22:36:58] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[22:36:58] [PASSED] single_pixel_source_buffer
[22:36:58] [PASSED] single_pixel_clip_rectangle
[22:36:58] [PASSED] well_known_colors
[22:36:58] [PASSED] destination_pitch
[22:36:58] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[22:36:58] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[22:36:58] [PASSED] single_pixel_source_buffer
[22:36:58] [PASSED] single_pixel_clip_rectangle
[22:36:58] [PASSED] well_known_colors
[22:36:58] [PASSED] destination_pitch
[22:36:58] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[22:36:58] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[22:36:58] [PASSED] single_pixel_source_buffer
[22:36:58] [PASSED] single_pixel_clip_rectangle
[22:36:58] [PASSED] well_known_colors
[22:36:58] [PASSED] destination_pitch
[22:36:58] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[22:36:58] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[22:36:58] [PASSED] single_pixel_source_buffer
[22:36:58] [PASSED] single_pixel_clip_rectangle
[22:36:58] [PASSED] well_known_colors
[22:36:58] [PASSED] destination_pitch
[22:36:58] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[22:36:58] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[22:36:58] [PASSED] single_pixel_source_buffer
[22:36:58] [PASSED] single_pixel_clip_rectangle
[22:36:58] [PASSED] well_known_colors
[22:36:58] [PASSED] destination_pitch
[22:36:58] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[22:36:58] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[22:36:58] [PASSED] single_pixel_source_buffer
[22:36:58] [PASSED] single_pixel_clip_rectangle
[22:36:58] [PASSED] well_known_colors
[22:36:58] [PASSED] destination_pitch
[22:36:58] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[22:36:58] ============== drm_test_fb_xrgb8888_to_mono ===============
[22:36:58] [PASSED] single_pixel_source_buffer
[22:36:58] [PASSED] single_pixel_clip_rectangle
[22:36:58] [PASSED] well_known_colors
[22:36:58] [PASSED] destination_pitch
[22:36:58] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[22:36:58] ==================== drm_test_fb_swab =====================
[22:36:58] [PASSED] single_pixel_source_buffer
[22:36:58] [PASSED] single_pixel_clip_rectangle
[22:36:58] [PASSED] well_known_colors
[22:36:58] [PASSED] destination_pitch
[22:36:58] ================ [PASSED] drm_test_fb_swab =================
[22:36:58] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[22:36:58] [PASSED] single_pixel_source_buffer
[22:36:58] [PASSED] single_pixel_clip_rectangle
[22:36:58] [PASSED] well_known_colors
[22:36:58] [PASSED] destination_pitch
[22:36:58] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[22:36:58] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[22:36:58] [PASSED] single_pixel_source_buffer
[22:36:58] [PASSED] single_pixel_clip_rectangle
[22:36:58] [PASSED] well_known_colors
[22:36:58] [PASSED] destination_pitch
[22:36:58] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[22:36:58] ================= drm_test_fb_clip_offset =================
[22:36:58] [PASSED] pass through
[22:36:58] [PASSED] horizontal offset
[22:36:58] [PASSED] vertical offset
[22:36:58] [PASSED] horizontal and vertical offset
[22:36:58] [PASSED] horizontal offset (custom pitch)
[22:36:58] [PASSED] vertical offset (custom pitch)
[22:36:58] [PASSED] horizontal and vertical offset (custom pitch)
[22:36:58] ============= [PASSED] drm_test_fb_clip_offset =============
[22:36:58] =================== drm_test_fb_memcpy ====================
[22:36:58] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[22:36:58] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[22:36:58] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[22:36:58] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[22:36:58] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[22:36:58] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[22:36:58] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[22:36:58] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[22:36:58] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[22:36:58] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[22:36:58] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[22:36:58] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[22:36:58] =============== [PASSED] drm_test_fb_memcpy ================
[22:36:58] ============= [PASSED] drm_format_helper_test ==============
[22:36:58] ================= drm_format (18 subtests) =================
[22:36:58] [PASSED] drm_test_format_block_width_invalid
[22:36:58] [PASSED] drm_test_format_block_width_one_plane
[22:36:58] [PASSED] drm_test_format_block_width_two_plane
[22:36:58] [PASSED] drm_test_format_block_width_three_plane
[22:36:58] [PASSED] drm_test_format_block_width_tiled
[22:36:58] [PASSED] drm_test_format_block_height_invalid
[22:36:58] [PASSED] drm_test_format_block_height_one_plane
[22:36:58] [PASSED] drm_test_format_block_height_two_plane
[22:36:58] [PASSED] drm_test_format_block_height_three_plane
[22:36:58] [PASSED] drm_test_format_block_height_tiled
[22:36:58] [PASSED] drm_test_format_min_pitch_invalid
[22:36:58] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[22:36:58] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[22:36:58] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[22:36:58] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[22:36:58] [PASSED] drm_test_format_min_pitch_two_plane
[22:36:58] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[22:36:58] [PASSED] drm_test_format_min_pitch_tiled
[22:36:58] =================== [PASSED] drm_format ====================
[22:36:58] ============== drm_framebuffer (10 subtests) ===============
[22:36:58] ========== drm_test_framebuffer_check_src_coords ==========
[22:36:58] [PASSED] Success: source fits into fb
[22:36:58] [PASSED] Fail: overflowing fb with x-axis coordinate
[22:36:58] [PASSED] Fail: overflowing fb with y-axis coordinate
[22:36:58] [PASSED] Fail: overflowing fb with source width
[22:36:58] [PASSED] Fail: overflowing fb with source height
[22:36:58] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[22:36:58] [PASSED] drm_test_framebuffer_cleanup
[22:36:58] =============== drm_test_framebuffer_create ===============
[22:36:58] [PASSED] ABGR8888 normal sizes
[22:36:58] [PASSED] ABGR8888 max sizes
[22:36:58] [PASSED] ABGR8888 pitch greater than min required
[22:36:58] [PASSED] ABGR8888 pitch less than min required
[22:36:58] [PASSED] ABGR8888 Invalid width
[22:36:58] [PASSED] ABGR8888 Invalid buffer handle
[22:36:58] [PASSED] No pixel format
[22:36:58] [PASSED] ABGR8888 Width 0
[22:36:58] [PASSED] ABGR8888 Height 0
[22:36:58] [PASSED] ABGR8888 Out of bound height * pitch combination
[22:36:58] [PASSED] ABGR8888 Large buffer offset
[22:36:58] [PASSED] ABGR8888 Buffer offset for inexistent plane
[22:36:58] [PASSED] ABGR8888 Invalid flag
[22:36:58] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[22:36:58] [PASSED] ABGR8888 Valid buffer modifier
[22:36:58] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[22:36:58] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[22:36:58] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[22:36:58] [PASSED] NV12 Normal sizes
[22:36:58] [PASSED] NV12 Max sizes
[22:36:58] [PASSED] NV12 Invalid pitch
[22:36:58] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[22:36:58] [PASSED] NV12 different modifier per-plane
[22:36:58] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[22:36:58] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[22:36:58] [PASSED] NV12 Modifier for inexistent plane
[22:36:58] [PASSED] NV12 Handle for inexistent plane
[22:36:58] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[22:36:58] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[22:36:58] [PASSED] YVU420 Normal sizes
[22:36:58] [PASSED] YVU420 Max sizes
[22:36:58] [PASSED] YVU420 Invalid pitch
[22:36:58] [PASSED] YVU420 Different pitches
[22:36:58] [PASSED] YVU420 Different buffer offsets/pitches
[22:36:58] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[22:36:58] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[22:36:58] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[22:36:58] [PASSED] YVU420 Valid modifier
[22:36:58] [PASSED] YVU420 Different modifiers per plane
[22:36:58] [PASSED] YVU420 Modifier for inexistent plane
[22:36:58] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[22:36:58] [PASSED] X0L2 Normal sizes
[22:36:58] [PASSED] X0L2 Max sizes
[22:36:58] [PASSED] X0L2 Invalid pitch
[22:36:58] [PASSED] X0L2 Pitch greater than minimum required
[22:36:58] [PASSED] X0L2 Handle for inexistent plane
[22:36:58] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[22:36:58] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[22:36:58] [PASSED] X0L2 Valid modifier
[22:36:58] [PASSED] X0L2 Modifier for inexistent plane
[22:36:58] =========== [PASSED] drm_test_framebuffer_create ===========
[22:36:58] [PASSED] drm_test_framebuffer_free
[22:36:58] [PASSED] drm_test_framebuffer_init
[22:36:58] [PASSED] drm_test_framebuffer_init_bad_format
[22:36:58] [PASSED] drm_test_framebuffer_init_dev_mismatch
[22:36:58] [PASSED] drm_test_framebuffer_lookup
[22:36:58] [PASSED] drm_test_framebuffer_lookup_inexistent
[22:36:58] [PASSED] drm_test_framebuffer_modifiers_not_supported
[22:36:58] ================= [PASSED] drm_framebuffer =================
[22:36:58] ================ drm_gem_shmem (8 subtests) ================
[22:36:58] [PASSED] drm_gem_shmem_test_obj_create
[22:36:58] [PASSED] drm_gem_shmem_test_obj_create_private
[22:36:58] [PASSED] drm_gem_shmem_test_pin_pages
[22:36:58] [PASSED] drm_gem_shmem_test_vmap
[22:36:58] [PASSED] drm_gem_shmem_test_get_sg_table
[22:36:58] [PASSED] drm_gem_shmem_test_get_pages_sgt
[22:36:58] [PASSED] drm_gem_shmem_test_madvise
[22:36:58] [PASSED] drm_gem_shmem_test_purge
[22:36:58] ================== [PASSED] drm_gem_shmem ==================
[22:36:58] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[22:36:58] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[22:36:58] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[22:36:58] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[22:36:58] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[22:36:58] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[22:36:58] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[22:36:58] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[22:36:58] [PASSED] Automatic
[22:36:58] [PASSED] Full
[22:36:58] [PASSED] Limited 16:235
[22:36:58] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[22:36:58] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[22:36:58] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[22:36:58] [PASSED] drm_test_check_disable_connector
[22:36:58] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[22:36:58] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[22:36:58] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[22:36:58] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[22:36:58] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[22:36:58] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[22:36:58] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[22:36:58] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[22:36:58] [PASSED] drm_test_check_output_bpc_dvi
[22:36:58] [PASSED] drm_test_check_output_bpc_format_vic_1
[22:36:58] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[22:36:58] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[22:36:58] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[22:36:58] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[22:36:58] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[22:36:58] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[22:36:58] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[22:36:58] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[22:36:58] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[22:36:58] [PASSED] drm_test_check_broadcast_rgb_value
[22:36:58] [PASSED] drm_test_check_bpc_8_value
[22:36:58] [PASSED] drm_test_check_bpc_10_value
[22:36:58] [PASSED] drm_test_check_bpc_12_value
[22:36:58] [PASSED] drm_test_check_format_value
[22:36:58] [PASSED] drm_test_check_tmds_char_value
[22:36:58] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[22:36:58] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[22:36:58] [PASSED] drm_test_check_mode_valid
[22:36:58] [PASSED] drm_test_check_mode_valid_reject
[22:36:58] [PASSED] drm_test_check_mode_valid_reject_rate
[22:36:58] [PASSED] drm_test_check_mode_valid_reject_max_clock
[22:36:58] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[22:36:58] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[22:36:58] [PASSED] drm_test_check_infoframes
[22:36:58] [PASSED] drm_test_check_reject_avi_infoframe
[22:36:58] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[22:36:58] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[22:36:58] [PASSED] drm_test_check_reject_audio_infoframe
[22:36:58] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[22:36:58] ================= drm_managed (2 subtests) =================
[22:36:58] [PASSED] drm_test_managed_release_action
[22:36:58] [PASSED] drm_test_managed_run_action
[22:36:58] =================== [PASSED] drm_managed ===================
[22:36:58] =================== drm_mm (6 subtests) ====================
[22:36:58] [PASSED] drm_test_mm_init
[22:36:58] [PASSED] drm_test_mm_debug
[22:36:58] [PASSED] drm_test_mm_align32
[22:36:58] [PASSED] drm_test_mm_align64
[22:36:58] [PASSED] drm_test_mm_lowest
[22:36:58] [PASSED] drm_test_mm_highest
[22:36:58] ===================== [PASSED] drm_mm ======================
[22:36:58] ============= drm_modes_analog_tv (5 subtests) =============
[22:36:58] [PASSED] drm_test_modes_analog_tv_mono_576i
[22:36:58] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[22:36:58] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[22:36:58] [PASSED] drm_test_modes_analog_tv_pal_576i
[22:36:58] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[22:36:58] =============== [PASSED] drm_modes_analog_tv ===============
[22:36:58] ============== drm_plane_helper (2 subtests) ===============
[22:36:58] =============== drm_test_check_plane_state ================
[22:36:58] [PASSED] clipping_simple
[22:36:58] [PASSED] clipping_rotate_reflect
[22:36:58] [PASSED] positioning_simple
[22:36:58] [PASSED] upscaling
[22:36:58] [PASSED] downscaling
[22:36:58] [PASSED] rounding1
[22:36:58] [PASSED] rounding2
[22:36:58] [PASSED] rounding3
[22:36:58] [PASSED] rounding4
[22:36:58] =========== [PASSED] drm_test_check_plane_state ============
[22:36:58] =========== drm_test_check_invalid_plane_state ============
[22:36:58] [PASSED] positioning_invalid
[22:36:58] [PASSED] upscaling_invalid
[22:36:58] [PASSED] downscaling_invalid
[22:36:58] ======= [PASSED] drm_test_check_invalid_plane_state ========
[22:36:58] ================ [PASSED] drm_plane_helper =================
[22:36:58] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[22:36:58] ====== drm_test_connector_helper_tv_get_modes_check =======
[22:36:58] [PASSED] None
[22:36:58] [PASSED] PAL
[22:36:58] [PASSED] NTSC
[22:36:58] [PASSED] Both, NTSC Default
[22:36:58] [PASSED] Both, PAL Default
[22:36:58] [PASSED] Both, NTSC Default, with PAL on command-line
[22:36:58] [PASSED] Both, PAL Default, with NTSC on command-line
[22:36:58] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[22:36:58] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[22:36:58] ================== drm_rect (9 subtests) ===================
[22:36:58] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[22:36:58] [PASSED] drm_test_rect_clip_scaled_not_clipped
[22:36:58] [PASSED] drm_test_rect_clip_scaled_clipped
[22:36:58] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[22:36:58] ================= drm_test_rect_intersect =================
[22:36:58] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[22:36:58] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[22:36:58] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[22:36:58] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[22:36:58] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[22:36:58] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[22:36:58] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[22:36:58] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[22:36:58] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[22:36:58] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[22:36:58] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[22:36:58] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[22:36:58] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[22:36:58] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[22:36:58] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[22:36:58] ============= [PASSED] drm_test_rect_intersect =============
[22:36:58] ================ drm_test_rect_calc_hscale ================
[22:36:58] [PASSED] normal use
[22:36:58] [PASSED] out of max range
[22:36:58] [PASSED] out of min range
[22:36:58] [PASSED] zero dst
[22:36:58] [PASSED] negative src
[22:36:58] [PASSED] negative dst
[22:36:58] ============ [PASSED] drm_test_rect_calc_hscale ============
[22:36:58] ================ drm_test_rect_calc_vscale ================
[22:36:58] [PASSED] normal use
[22:36:58] [PASSED] out of max range
[22:36:58] [PASSED] out of min range
[22:36:58] [PASSED] zero dst
[22:36:58] [PASSED] negative src
[22:36:58] [PASSED] negative dst
[22:36:58] ============ [PASSED] drm_test_rect_calc_vscale ============
[22:36:58] ================== drm_test_rect_rotate ===================
[22:36:58] [PASSED] reflect-x
[22:36:58] [PASSED] reflect-y
[22:36:58] [PASSED] rotate-0
[22:36:58] [PASSED] rotate-90
[22:36:58] [PASSED] rotate-180
[22:36:58] [PASSED] rotate-270
[22:36:58] ============== [PASSED] drm_test_rect_rotate ===============
[22:36:58] ================ drm_test_rect_rotate_inv =================
[22:36:58] [PASSED] reflect-x
[22:36:58] [PASSED] reflect-y
[22:36:58] [PASSED] rotate-0
[22:36:58] [PASSED] rotate-90
[22:36:58] [PASSED] rotate-180
[22:36:58] [PASSED] rotate-270
[22:36:58] ============ [PASSED] drm_test_rect_rotate_inv =============
[22:36:58] ==================== [PASSED] drm_rect =====================
[22:36:58] ============ drm_sysfb_modeset_test (1 subtest) ============
[22:36:58] ============ drm_test_sysfb_build_fourcc_list =============
[22:36:58] [PASSED] no native formats
[22:36:58] [PASSED] XRGB8888 as native format
[22:36:58] [PASSED] remove duplicates
[22:36:58] [PASSED] convert alpha formats
[22:36:58] [PASSED] random formats
[22:36:58] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[22:36:58] ============= [PASSED] drm_sysfb_modeset_test ==============
[22:36:58] ================== drm_fixp (2 subtests) ===================
[22:36:58] [PASSED] drm_test_int2fixp
[22:36:58] [PASSED] drm_test_sm2fixp
[22:36:58] ==================== [PASSED] drm_fixp =====================
[22:36:58] ============================================================
[22:36:58] Testing complete. Ran 621 tests: passed: 621
[22:36:58] Elapsed time: 25.787s total, 1.760s configuring, 23.809s building, 0.184s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[22:36:58] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:37:00] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:37:10] Starting KUnit Kernel (1/1)...
[22:37:10] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:37:10] ================= ttm_device (5 subtests) ==================
[22:37:10] [PASSED] ttm_device_init_basic
[22:37:10] [PASSED] ttm_device_init_multiple
[22:37:10] [PASSED] ttm_device_fini_basic
[22:37:10] [PASSED] ttm_device_init_no_vma_man
[22:37:10] ================== ttm_device_init_pools ==================
[22:37:10] [PASSED] No DMA allocations, no DMA32 required
[22:37:10] [PASSED] DMA allocations, DMA32 required
[22:37:10] [PASSED] No DMA allocations, DMA32 required
[22:37:10] [PASSED] DMA allocations, no DMA32 required
[22:37:10] ============== [PASSED] ttm_device_init_pools ==============
[22:37:10] =================== [PASSED] ttm_device ====================
[22:37:10] ================== ttm_pool (8 subtests) ===================
[22:37:10] ================== ttm_pool_alloc_basic ===================
[22:37:10] [PASSED] One page
[22:37:10] [PASSED] More than one page
[22:37:10] [PASSED] Above the allocation limit
[22:37:10] [PASSED] One page, with coherent DMA mappings enabled
[22:37:10] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:37:10] ============== [PASSED] ttm_pool_alloc_basic ===============
[22:37:10] ============== ttm_pool_alloc_basic_dma_addr ==============
[22:37:10] [PASSED] One page
[22:37:10] [PASSED] More than one page
[22:37:10] [PASSED] Above the allocation limit
[22:37:10] [PASSED] One page, with coherent DMA mappings enabled
[22:37:10] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:37:10] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[22:37:10] [PASSED] ttm_pool_alloc_order_caching_match
[22:37:10] [PASSED] ttm_pool_alloc_caching_mismatch
[22:37:10] [PASSED] ttm_pool_alloc_order_mismatch
[22:37:10] [PASSED] ttm_pool_free_dma_alloc
[22:37:10] [PASSED] ttm_pool_free_no_dma_alloc
[22:37:10] [PASSED] ttm_pool_fini_basic
[22:37:10] ==================== [PASSED] ttm_pool =====================
[22:37:10] ================ ttm_resource (8 subtests) =================
[22:37:10] ================= ttm_resource_init_basic =================
[22:37:10] [PASSED] Init resource in TTM_PL_SYSTEM
[22:37:10] [PASSED] Init resource in TTM_PL_VRAM
[22:37:10] [PASSED] Init resource in a private placement
[22:37:10] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[22:37:10] ============= [PASSED] ttm_resource_init_basic =============
[22:37:10] [PASSED] ttm_resource_init_pinned
[22:37:10] [PASSED] ttm_resource_fini_basic
[22:37:10] [PASSED] ttm_resource_manager_init_basic
[22:37:10] [PASSED] ttm_resource_manager_usage_basic
[22:37:10] [PASSED] ttm_resource_manager_set_used_basic
[22:37:10] [PASSED] ttm_sys_man_alloc_basic
[22:37:10] [PASSED] ttm_sys_man_free_basic
[22:37:10] ================== [PASSED] ttm_resource ===================
[22:37:10] =================== ttm_tt (15 subtests) ===================
[22:37:10] ==================== ttm_tt_init_basic ====================
[22:37:10] [PASSED] Page-aligned size
[22:37:10] [PASSED] Extra pages requested
[22:37:10] ================ [PASSED] ttm_tt_init_basic ================
[22:37:10] [PASSED] ttm_tt_init_misaligned
[22:37:10] [PASSED] ttm_tt_fini_basic
[22:37:10] [PASSED] ttm_tt_fini_sg
[22:37:10] [PASSED] ttm_tt_fini_shmem
[22:37:10] [PASSED] ttm_tt_create_basic
[22:37:10] [PASSED] ttm_tt_create_invalid_bo_type
[22:37:10] [PASSED] ttm_tt_create_ttm_exists
[22:37:10] [PASSED] ttm_tt_create_failed
[22:37:10] [PASSED] ttm_tt_destroy_basic
[22:37:10] [PASSED] ttm_tt_populate_null_ttm
[22:37:10] [PASSED] ttm_tt_populate_populated_ttm
[22:37:10] [PASSED] ttm_tt_unpopulate_basic
[22:37:10] [PASSED] ttm_tt_unpopulate_empty_ttm
[22:37:10] [PASSED] ttm_tt_swapin_basic
[22:37:10] ===================== [PASSED] ttm_tt ======================
[22:37:10] =================== ttm_bo (14 subtests) ===================
[22:37:10] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[22:37:10] [PASSED] Cannot be interrupted and sleeps
[22:37:10] [PASSED] Cannot be interrupted, locks straight away
[22:37:10] [PASSED] Can be interrupted, sleeps
[22:37:10] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[22:37:10] [PASSED] ttm_bo_reserve_locked_no_sleep
[22:37:10] [PASSED] ttm_bo_reserve_no_wait_ticket
[22:37:10] [PASSED] ttm_bo_reserve_double_resv
[22:37:10] [PASSED] ttm_bo_reserve_interrupted
[22:37:10] [PASSED] ttm_bo_reserve_deadlock
[22:37:10] [PASSED] ttm_bo_unreserve_basic
[22:37:10] [PASSED] ttm_bo_unreserve_pinned
[22:37:10] [PASSED] ttm_bo_unreserve_bulk
[22:37:10] [PASSED] ttm_bo_fini_basic
[22:37:10] [PASSED] ttm_bo_fini_shared_resv
[22:37:10] [PASSED] ttm_bo_pin_basic
[22:37:10] [PASSED] ttm_bo_pin_unpin_resource
[22:37:10] [PASSED] ttm_bo_multiple_pin_one_unpin
[22:37:10] ===================== [PASSED] ttm_bo ======================
[22:37:10] ============== ttm_bo_validate (22 subtests) ===============
[22:37:10] ============== ttm_bo_init_reserved_sys_man ===============
[22:37:10] [PASSED] Buffer object for userspace
[22:37:10] [PASSED] Kernel buffer object
[22:37:10] [PASSED] Shared buffer object
[22:37:10] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[22:37:10] ============== ttm_bo_init_reserved_mock_man ==============
[22:37:10] [PASSED] Buffer object for userspace
[22:37:10] [PASSED] Kernel buffer object
[22:37:10] [PASSED] Shared buffer object
[22:37:10] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[22:37:10] [PASSED] ttm_bo_init_reserved_resv
[22:37:10] ================== ttm_bo_validate_basic ==================
[22:37:10] [PASSED] Buffer object for userspace
[22:37:10] [PASSED] Kernel buffer object
[22:37:10] [PASSED] Shared buffer object
[22:37:10] ============== [PASSED] ttm_bo_validate_basic ==============
[22:37:10] [PASSED] ttm_bo_validate_invalid_placement
[22:37:10] ============= ttm_bo_validate_same_placement ==============
[22:37:10] [PASSED] System manager
[22:37:10] [PASSED] VRAM manager
[22:37:10] ========= [PASSED] ttm_bo_validate_same_placement ==========
[22:37:10] [PASSED] ttm_bo_validate_failed_alloc
[22:37:10] [PASSED] ttm_bo_validate_pinned
[22:37:10] [PASSED] ttm_bo_validate_busy_placement
[22:37:10] ================ ttm_bo_validate_multihop =================
[22:37:10] [PASSED] Buffer object for userspace
[22:37:10] [PASSED] Kernel buffer object
[22:37:10] [PASSED] Shared buffer object
[22:37:10] ============ [PASSED] ttm_bo_validate_multihop =============
[22:37:10] ========== ttm_bo_validate_no_placement_signaled ==========
[22:37:10] [PASSED] Buffer object in system domain, no page vector
[22:37:10] [PASSED] Buffer object in system domain with an existing page vector
[22:37:10] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[22:37:10] ======== ttm_bo_validate_no_placement_not_signaled ========
[22:37:10] [PASSED] Buffer object for userspace
[22:37:10] [PASSED] Kernel buffer object
[22:37:10] [PASSED] Shared buffer object
[22:37:10] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[22:37:10] [PASSED] ttm_bo_validate_move_fence_signaled
[22:37:10] ========= ttm_bo_validate_move_fence_not_signaled =========
[22:37:10] [PASSED] Waits for GPU
[22:37:10] [PASSED] Tries to lock straight away
[22:37:10] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[22:37:10] [PASSED] ttm_bo_validate_swapout
[22:37:10] [PASSED] ttm_bo_validate_happy_evict
[22:37:10] [PASSED] ttm_bo_validate_all_pinned_evict
[22:37:10] [PASSED] ttm_bo_validate_allowed_only_evict
[22:37:10] [PASSED] ttm_bo_validate_deleted_evict
[22:37:10] [PASSED] ttm_bo_validate_busy_domain_evict
[22:37:10] [PASSED] ttm_bo_validate_evict_gutting
[22:37:10] [PASSED] ttm_bo_validate_recrusive_evict
[22:37:10] ================= [PASSED] ttm_bo_validate =================
[22:37:10] ============================================================
[22:37:10] Testing complete. Ran 102 tests: passed: 102
[22:37:10] Elapsed time: 11.587s total, 1.738s configuring, 9.634s building, 0.176s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 34+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe/forcewake: add delayed-release optimization
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
2026-06-01 22:37 ` ✓ CI.KUnit: success for " Patchwork
@ 2026-06-01 23:15 ` Patchwork
2026-06-02 8:13 ` ✓ Xe.CI.FULL: " Patchwork
` (17 subsequent siblings)
19 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2026-06-01 23:15 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1540 bytes --]
== Series Details ==
Series: drm/xe/forcewake: add delayed-release optimization
URL : https://patchwork.freedesktop.org/series/167697/
State : success
== Summary ==
CI Bug Log - changes from xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a_BAT -> xe-pw-167697v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-167697v1_BAT that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@xe_live_ktest@xe_dma_buf:
- bat-bmg-vm: [ABORT][1] ([Intel XE#8007] / [Intel XE#8023]) -> [PASS][2] +1 other test pass
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a/bat-bmg-vm/igt@xe_live_ktest@xe_dma_buf.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v1/bat-bmg-vm/igt@xe_live_ktest@xe_dma_buf.html
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8023]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8023
Build changes
-------------
* Linux: xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a -> xe-pw-167697v1
IGT_8944: 8944
xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a: 4b57b105843615beabfbc703c5b38445edac8a1a
xe-pw-167697v1: 167697v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v1/index.html
[-- Attachment #2: Type: text/html, Size: 2098 bytes --]
^ permalink raw reply [flat|nested] 34+ messages in thread
* ✓ Xe.CI.FULL: success for drm/xe/forcewake: add delayed-release optimization
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
2026-06-01 22:37 ` ✓ CI.KUnit: success for " Patchwork
2026-06-01 23:15 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-06-02 8:13 ` Patchwork
2026-06-11 1:03 ` [PATCH v2] " Zongyao Bai
` (16 subsequent siblings)
19 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2026-06-02 8:13 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 7775 bytes --]
== Series Details ==
Series: drm/xe/forcewake: add delayed-release optimization
URL : https://patchwork.freedesktop.org/series/167697/
State : success
== Summary ==
CI Bug Log - changes from xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a_FULL -> xe-pw-167697v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-167697v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [PASS][1] -> [FAIL][2] ([Intel XE#301] / [Intel XE#3149])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v1/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-bmg: [PASS][3] -> [SKIP][4] ([Intel XE#7915]) +3 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a/shard-bmg-9/igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v1/shard-bmg-8/igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f.html
* igt@xe_exec_reset@long-spin-comp-reuse-many-preempt-threads:
- shard-bmg: [PASS][5] -> [FAIL][6] ([Intel XE#7850])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a/shard-bmg-2/igt@xe_exec_reset@long-spin-comp-reuse-many-preempt-threads.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v1/shard-bmg-10/igt@xe_exec_reset@long-spin-comp-reuse-many-preempt-threads.html
* igt@xe_wedged@wedged-mode-toggle:
- shard-bmg: [PASS][7] -> [ABORT][8] ([Intel XE#8007])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a/shard-bmg-5/igt@xe_wedged@wedged-mode-toggle.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v1/shard-bmg-10/igt@xe_wedged@wedged-mode-toggle.html
#### Possible fixes ####
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-lnl: [FAIL][9] ([Intel XE#301]) -> [PASS][10] +2 other tests pass
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v1/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-bmg: [SKIP][11] ([Intel XE#7915]) -> [PASS][12] +1 other test pass
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a/shard-bmg-7/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v1/shard-bmg-2/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [INCOMPLETE][13] ([Intel XE#6321]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a/shard-bmg-7/igt@xe_evict@evict-mixed-many-threads-small.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v1/shard-bmg-1/igt@xe_evict@evict-mixed-many-threads-small.html
* igt@xe_exec_reset@long-spin-many-preempt-media:
- shard-bmg: [FAIL][15] ([Intel XE#7956]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a/shard-bmg-4/igt@xe_exec_reset@long-spin-many-preempt-media.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v1/shard-bmg-8/igt@xe_exec_reset@long-spin-many-preempt-media.html
* igt@xe_exec_reset@long-spin-sys-reuse-many-preempt-threads:
- shard-bmg: [FAIL][17] ([Intel XE#7850]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a/shard-bmg-9/igt@xe_exec_reset@long-spin-sys-reuse-many-preempt-threads.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v1/shard-bmg-4/igt@xe_exec_reset@long-spin-sys-reuse-many-preempt-threads.html
#### Warnings ####
* igt@kms_flip@flip-vs-expired-vblank:
- shard-lnl: [FAIL][19] ([Intel XE#301]) -> [FAIL][20] ([Intel XE#301] / [Intel XE#3149])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v1/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][21] ([Intel XE#3544] / [Intel XE#7915] / [Intel XE#7916]) -> [SKIP][22] ([Intel XE#3544] / [Intel XE#7916])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a/shard-bmg-8/igt@kms_hdr@brightness-with-hdr.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v1/shard-bmg-4/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-bmg: [SKIP][23] ([Intel XE#7915]) -> [SKIP][24] ([Intel XE#7916]) +1 other test skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a/shard-bmg-8/igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v1/shard-bmg-4/igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][25] ([Intel XE#2509] / [Intel XE#7437]) -> [SKIP][26] ([Intel XE#2426] / [Intel XE#5848])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v1/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7850
[Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
[Intel XE#7916]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7916
[Intel XE#7956]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7956
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
Build changes
-------------
* Linux: xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a -> xe-pw-167697v1
IGT_8944: 8944
xe-5176-4b57b105843615beabfbc703c5b38445edac8a1a: 4b57b105843615beabfbc703c5b38445edac8a1a
xe-pw-167697v1: 167697v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v1/index.html
[-- Attachment #2: Type: text/html, Size: 9384 bytes --]
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v2] drm/xe/forcewake: add delayed-release optimization
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (2 preceding siblings ...)
2026-06-02 8:13 ` ✓ Xe.CI.FULL: " Patchwork
@ 2026-06-11 1:03 ` Zongyao Bai
2026-06-11 11:59 ` Maarten Lankhorst
2026-06-11 1:13 ` ✓ CI.KUnit: success for drm/xe/forcewake: add delayed-release optimization (rev2) Patchwork
` (15 subsequent siblings)
19 siblings, 1 reply; 34+ messages in thread
From: Zongyao Bai @ 2026-06-11 1:03 UTC (permalink / raw)
To: intel-xe; +Cc: jia.yao, Zongyao Bai
Add delayed-release optimization:
- Add domain sleep XE_FORCE_WAKE_HOLD_DELAY_US after xe_force_wake_put()
- Skip MMIO wake in xe_force_wake_get() if domain still awake.
Reduces frequent wake/sleep cycles for back-to-back operations.
Examples of scenarios: zeDeviceGetGlobalTimestamps read by VTune, PTI
v2:
- Add xe_force_wake_flush() and call it on the runtime/system
suspend paths to ensure no deferred-sleep runs after GT power-off.
(Sashiko)
Assisted-by: GitHub-Copilot:claude-sonnet-4.6
Assisted-by: GitHub-Copilot:claude-opus-4.8 #v2
Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
---
drivers/gpu/drm/xe/xe_force_wake.c | 146 +++++++++++++++++++----
drivers/gpu/drm/xe/xe_force_wake.h | 23 +++-
drivers/gpu/drm/xe/xe_force_wake_types.h | 11 ++
drivers/gpu/drm/xe/xe_gt.c | 26 ++--
4 files changed, 171 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
index 197e2197bd0a..b7c674f5f69a 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.c
+++ b/drivers/gpu/drm/xe/xe_force_wake.c
@@ -6,15 +6,20 @@
#include "xe_force_wake.h"
#include <drm/drm_util.h>
+#include <linux/device.h>
+#include <linux/hrtimer.h>
#include "regs/xe_gt_regs.h"
#include "regs/xe_reg_defs.h"
+#include "xe_device.h"
#include "xe_gt.h"
#include "xe_gt_printk.h"
#include "xe_mmio.h"
+#include "xe_pm.h"
#include "xe_sriov.h"
#define XE_FORCE_WAKE_ACK_TIMEOUT_MS 50
+#define XE_FORCE_WAKE_HOLD_DELAY_US 200
static const char *str_wake_sleep(bool wake)
{
@@ -27,6 +32,8 @@ static void mark_domain_initialized(struct xe_force_wake *fw,
fw->initialized_domains |= BIT(id);
}
+static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer);
+
static void init_domain(struct xe_force_wake *fw,
enum xe_force_wake_domain_id id,
struct xe_reg reg, struct xe_reg ack)
@@ -38,11 +45,29 @@ static void init_domain(struct xe_force_wake *fw,
domain->reg_ack = ack;
domain->val = FORCEWAKE_MT(FORCEWAKE_KERNEL);
domain->mask = FORCEWAKE_MT_MASK(FORCEWAKE_KERNEL);
+ domain->fw_back = fw;
+ hrtimer_setup(&domain->timer, xe_force_wake_domain_timer,
+ CLOCK_MONOTONIC, HRTIMER_MODE_REL);
mark_domain_initialized(fw, id);
}
-void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
+static void xe_force_wake_fini(void *arg)
+{
+ struct xe_force_wake *fw = arg;
+ struct xe_gt *gt = fw->gt;
+ struct xe_force_wake_domain *domain;
+ unsigned int tmp;
+
+ for_each_fw_domain(domain, fw, tmp) {
+ xe_gt_WARN(gt, domain->ref,
+ "Forcewake domain %d still referenced (%u) at teardown\n",
+ domain->id, domain->ref);
+ hrtimer_cancel(&domain->timer);
+ }
+}
+
+int xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
{
struct xe_device *xe = gt_to_xe(gt);
@@ -58,6 +83,8 @@ void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
FORCEWAKE_GT,
FORCEWAKE_ACK_GT);
}
+
+ return devm_add_action_or_reset(xe->drm.dev, xe_force_wake_fini, fw);
}
void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw)
@@ -142,10 +169,37 @@ static void domain_sleep(struct xe_gt *gt, struct xe_force_wake_domain *domain)
__domain_ctl(gt, domain, false);
}
-static int domain_sleep_wait(struct xe_gt *gt,
- struct xe_force_wake_domain *domain)
+static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer)
{
- return __domain_wait(gt, domain, false);
+ struct xe_force_wake_domain *domain =
+ container_of(timer, struct xe_force_wake_domain, timer);
+ struct xe_force_wake *fw = domain->fw_back;
+ struct xe_gt *gt = fw->gt;
+ unsigned long flags;
+
+ xe_gt_assert(gt, !xe_pm_runtime_suspended(gt_to_xe(gt)));
+
+ spin_lock_irqsave(&fw->lock, flags);
+
+ if (!(fw->timer_domains & BIT(domain->id)) || domain->ref) {
+ spin_unlock_irqrestore(&fw->lock, flags);
+ return HRTIMER_NORESTART;
+ }
+ if (domain->timer_rearm) {
+ domain->timer_rearm = false;
+ spin_unlock_irqrestore(&fw->lock, flags);
+ hrtimer_forward_now(timer,
+ ns_to_ktime(XE_FORCE_WAKE_HOLD_DELAY_US *
+ NSEC_PER_USEC));
+ return HRTIMER_RESTART;
+ }
+
+ fw->timer_domains &= ~BIT(domain->id);
+ domain_sleep(gt, domain);
+ fw->awake_domains &= ~BIT(domain->id);
+ spin_unlock_irqrestore(&fw->lock, flags);
+
+ return HRTIMER_NORESTART;
}
/**
@@ -187,8 +241,13 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
spin_lock_irqsave(&fw->lock, flags);
for_each_fw_domain_masked(domain, ref_rqst, fw, tmp) {
if (!domain->ref++) {
- awake_rqst |= BIT(domain->id);
- domain_wake(gt, domain);
+ if (fw->awake_domains & BIT(domain->id)) {
+ fw->timer_domains &= ~BIT(domain->id);
+ hrtimer_try_to_cancel(&domain->timer);
+ } else {
+ awake_rqst |= BIT(domain->id);
+ domain_wake(gt, domain);
+ }
}
ref_incr |= BIT(domain->id);
}
@@ -213,27 +272,23 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
}
/**
- * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
+ * xe_force_wake_put - Decrement the refcount and arm the delayed-sleep timer
* @fw: Pointer to the force wake structure
* @fw_ref: return of xe_force_wake_get()
*
- * This function reduces the reference counts for domains in fw_ref. If
- * refcount for any of the specified domain reaches 0, it puts the domain to sleep
- * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
- * Warns in case of timeout of ack from domain.
+ * This function reduces the reference counts for domains in fw_ref. When a
+ * domain's refcount reaches 0 the sleep request is not issued immediately;
+ * instead a hrtimer is armed for XE_FORCE_WAKE_HOLD_DELAY_US so that a rapid
+ * xe_force_wake_get() can reuse the still-awake domain at zero MMIO cost. On
+ * timer expiry, if the domain is still idle, the sleep request is written.
*/
void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
{
struct xe_gt *gt = fw->gt;
struct xe_force_wake_domain *domain;
- unsigned int tmp, sleep = 0;
+ unsigned int tmp;
unsigned long flags;
- int ack_fail = 0;
- /*
- * Avoid unnecessary lock and unlock when the function is called
- * in error path of individual domains.
- */
if (!fw_ref)
return;
@@ -245,20 +300,59 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
xe_gt_assert(gt, domain->ref);
if (!--domain->ref) {
- sleep |= BIT(domain->id);
- domain_sleep(gt, domain);
+ fw->timer_domains |= BIT(domain->id);
+ if (hrtimer_callback_running(&domain->timer)) {
+ domain->timer_rearm = true;
+ } else {
+ domain->timer_rearm = false;
+ hrtimer_start(&domain->timer,
+ ns_to_ktime(XE_FORCE_WAKE_HOLD_DELAY_US *
+ NSEC_PER_USEC),
+ HRTIMER_MODE_REL);
+ }
}
}
- for_each_fw_domain_masked(domain, sleep, fw, tmp) {
- if (domain_sleep_wait(gt, domain) == 0)
+ spin_unlock_irqrestore(&fw->lock, flags);
+}
+
+/**
+ * xe_force_wake_flush - Cancel pending delayed-sleep timers and settle domains
+ * @fw: Pointer to the force wake structure
+ *
+ * The delayed-release optimization in xe_force_wake_put() arms a short hrtimer
+ * instead of putting an idle domain to sleep immediately. That deferred sleep
+ * performs MMIO and must not be allowed to run after the device has been
+ * powered down. Callers on the runtime/system suspend path must therefore
+ * flush any outstanding timers once forcewake has been fully released, before
+ * the hardware is powered off.
+ *
+ * For every domain this cancels the pending timer (synchronously waiting for an
+ * in-flight callback to finish) and, if the domain is still idle with an
+ * outstanding deferred sleep, performs the sleep request right away so the
+ * domain is left in a consistent, fully-asleep state. hrtimer_cancel() must be
+ * called without holding fw->lock, since the timer callback takes that same
+ * lock.
+ */
+void xe_force_wake_flush(struct xe_force_wake *fw)
+{
+ struct xe_gt *gt = fw->gt;
+ struct xe_force_wake_domain *domain;
+ unsigned int tmp;
+ unsigned long flags;
+
+ for_each_fw_domain(domain, fw, tmp)
+ hrtimer_cancel(&domain->timer);
+
+ spin_lock_irqsave(&fw->lock, flags);
+ for_each_fw_domain(domain, fw, tmp) {
+ domain->timer_rearm = false;
+ if ((fw->timer_domains & BIT(domain->id)) && !domain->ref) {
+ fw->timer_domains &= ~BIT(domain->id);
+ domain_sleep(gt, domain);
fw->awake_domains &= ~BIT(domain->id);
- else
- ack_fail |= BIT(domain->id);
+ }
}
spin_unlock_irqrestore(&fw->lock, flags);
-
- xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
- str_plural(hweight_long(ack_fail)), ack_fail);
}
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
index e2721f205d6c..1b6d5efead38 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.h
+++ b/drivers/gpu/drm/xe/xe_force_wake.h
@@ -11,13 +11,32 @@
struct xe_gt;
-void xe_force_wake_init_gt(struct xe_gt *gt,
- struct xe_force_wake *fw);
+int xe_force_wake_init_gt(struct xe_gt *gt,
+ struct xe_force_wake *fw);
void xe_force_wake_init_engines(struct xe_gt *gt,
struct xe_force_wake *fw);
unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
enum xe_force_wake_domains domains);
void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref);
+void xe_force_wake_flush(struct xe_force_wake *fw);
+
+/**
+ * xe_force_wake_put_and_flush - Release forcewake and settle any deferred sleep
+ * @fw: Pointer to the force wake structure
+ * @fw_ref: return of xe_force_wake_get()
+ *
+ * Convenience helper for paths that must guarantee the domain is fully asleep
+ * before returning (typically right before the GT is powered off on
+ * runtime/system suspend). Because the flush has to run after the final put
+ * but before HW power-off, scope-based cleanup via CLASS(xe_force_wake, ...)
+ * cannot be used here.
+ */
+static inline void
+xe_force_wake_put_and_flush(struct xe_force_wake *fw, unsigned int fw_ref)
+{
+ xe_force_wake_put(fw, fw_ref);
+ xe_force_wake_flush(fw);
+}
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id);
diff --git a/drivers/gpu/drm/xe/xe_force_wake_types.h b/drivers/gpu/drm/xe/xe_force_wake_types.h
index 14b7b86e801b..ee5675069fe0 100644
--- a/drivers/gpu/drm/xe/xe_force_wake_types.h
+++ b/drivers/gpu/drm/xe/xe_force_wake_types.h
@@ -6,6 +6,7 @@
#ifndef _XE_FORCE_WAKE_TYPES_H_
#define _XE_FORCE_WAKE_TYPES_H_
+#include <linux/hrtimer.h>
#include <linux/mutex.h>
#include <linux/types.h>
@@ -51,6 +52,8 @@ enum xe_force_wake_domains {
XE_FORCEWAKE_ALL = BIT(XE_FW_DOMAIN_ID_COUNT)
};
+struct xe_force_wake;
+
/**
* struct xe_force_wake_domain - Xe force wake power domain
*
@@ -82,6 +85,12 @@ struct xe_force_wake_domain {
u32 mask;
/** @ref: domain reference */
u32 ref;
+ /** @timer_rearm: put() ran while callback was in-flight; callback must restart timer */
+ bool timer_rearm;
+ /** @timer: hrtimer for delayed sleep request */
+ struct hrtimer timer;
+ /** @fw_back: back pointer to parent xe_force_wake */
+ struct xe_force_wake *fw_back;
};
/**
@@ -101,6 +110,8 @@ struct xe_force_wake {
spinlock_t lock;
/** @awake_domains: mask of all domains awake */
unsigned int awake_domains;
+ /** @timer_domains: mask of domains with an outstanding delayed-sleep timer */
+ unsigned int timer_domains;
/** @initialized_domains: mask of all initialized domains */
unsigned int initialized_domains;
/** @domains: force wake domains */
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 783eb6d631b5..bba51a655b28 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -511,7 +511,9 @@ int xe_gt_init_early(struct xe_gt *gt)
xe_wa_process_gt_oob(gt);
- xe_force_wake_init_gt(gt, gt_to_fw(gt));
+ err = xe_force_wake_init_gt(gt, gt_to_fw(gt));
+ if (err)
+ return err;
spin_lock_init(>->global_invl_lock);
err = xe_gt_tlb_inval_init_early(gt);
@@ -998,13 +1000,15 @@ void xe_gt_suspend_prepare(struct xe_gt *gt)
int xe_gt_suspend(struct xe_gt *gt)
{
+ unsigned int fw_ref;
int err;
xe_gt_dbg(gt, "suspending\n");
xe_gt_sanitize(gt);
- CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
- if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
+ fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+ if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {
+ xe_force_wake_put(gt_to_fw(gt), fw_ref);
xe_gt_err(gt, "suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
return -ETIMEDOUT;
}
@@ -1012,7 +1016,7 @@ int xe_gt_suspend(struct xe_gt *gt)
err = xe_uc_suspend(>->uc);
if (err) {
xe_gt_err(gt, "suspend failed (%pe)\n", ERR_PTR(err));
- return err;
+ goto err_force_wake;
}
xe_gt_idle_disable_pg(gt);
@@ -1021,7 +1025,10 @@ int xe_gt_suspend(struct xe_gt *gt)
xe_gt_dbg(gt, "suspended\n");
- return 0;
+err_force_wake:
+ xe_force_wake_put_and_flush(gt_to_fw(gt), fw_ref);
+
+ return err;
}
void xe_gt_shutdown(struct xe_gt *gt)
@@ -1080,10 +1087,13 @@ int xe_gt_resume(struct xe_gt *gt)
*/
int xe_gt_runtime_suspend(struct xe_gt *gt)
{
+ unsigned int fw_ref;
+
xe_gt_dbg(gt, "runtime suspending\n");
- CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
- if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
+ fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+ if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {
+ xe_force_wake_put(gt_to_fw(gt), fw_ref);
xe_gt_err(gt, "runtime suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
return -ETIMEDOUT;
}
@@ -1093,6 +1103,8 @@ int xe_gt_runtime_suspend(struct xe_gt *gt)
xe_gt_dbg(gt, "runtime suspended\n");
+ xe_force_wake_put_and_flush(gt_to_fw(gt), fw_ref);
+
return 0;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* ✓ CI.KUnit: success for drm/xe/forcewake: add delayed-release optimization (rev2)
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (3 preceding siblings ...)
2026-06-11 1:03 ` [PATCH v2] " Zongyao Bai
@ 2026-06-11 1:13 ` Patchwork
2026-06-11 1:58 ` ✓ Xe.CI.BAT: " Patchwork
` (14 subsequent siblings)
19 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2026-06-11 1:13 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
== Series Details ==
Series: drm/xe/forcewake: add delayed-release optimization (rev2)
URL : https://patchwork.freedesktop.org/series/167697/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[01:12:15] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[01:12:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[01:12:51] Starting KUnit Kernel (1/1)...
[01:12:51] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[01:12:51] ================== guc_buf (11 subtests) ===================
[01:12:51] [PASSED] test_smallest
[01:12:51] [PASSED] test_largest
[01:12:51] [PASSED] test_granular
[01:12:51] [PASSED] test_unique
[01:12:51] [PASSED] test_overlap
[01:12:51] [PASSED] test_reusable
[01:12:51] [PASSED] test_too_big
[01:12:51] [PASSED] test_flush
[01:12:51] [PASSED] test_lookup
[01:12:51] [PASSED] test_data
[01:12:51] [PASSED] test_class
[01:12:51] ===================== [PASSED] guc_buf =====================
[01:12:51] =================== guc_dbm (7 subtests) ===================
[01:12:51] [PASSED] test_empty
[01:12:51] [PASSED] test_default
[01:12:51] ======================== test_size ========================
[01:12:51] [PASSED] 4
[01:12:51] [PASSED] 8
[01:12:51] [PASSED] 32
[01:12:51] [PASSED] 256
[01:12:51] ==================== [PASSED] test_size ====================
[01:12:51] ======================= test_reuse ========================
[01:12:51] [PASSED] 4
[01:12:51] [PASSED] 8
[01:12:51] [PASSED] 32
[01:12:51] [PASSED] 256
[01:12:51] =================== [PASSED] test_reuse ====================
[01:12:51] =================== test_range_overlap ====================
[01:12:51] [PASSED] 4
[01:12:51] [PASSED] 8
[01:12:51] [PASSED] 32
[01:12:51] [PASSED] 256
[01:12:51] =============== [PASSED] test_range_overlap ================
[01:12:51] =================== test_range_compact ====================
[01:12:51] [PASSED] 4
[01:12:51] [PASSED] 8
[01:12:51] [PASSED] 32
[01:12:51] [PASSED] 256
[01:12:51] =============== [PASSED] test_range_compact ================
[01:12:51] ==================== test_range_spare =====================
[01:12:51] [PASSED] 4
[01:12:51] [PASSED] 8
[01:12:51] [PASSED] 32
[01:12:51] [PASSED] 256
[01:12:51] ================ [PASSED] test_range_spare =================
[01:12:51] ===================== [PASSED] guc_dbm =====================
[01:12:51] =================== guc_idm (6 subtests) ===================
[01:12:51] [PASSED] bad_init
[01:12:51] [PASSED] no_init
[01:12:51] [PASSED] init_fini
[01:12:51] [PASSED] check_used
[01:12:51] [PASSED] check_quota
[01:12:51] [PASSED] check_all
[01:12:51] ===================== [PASSED] guc_idm =====================
[01:12:51] ================== no_relay (3 subtests) ===================
[01:12:51] [PASSED] xe_drops_guc2pf_if_not_ready
[01:12:51] [PASSED] xe_drops_guc2vf_if_not_ready
[01:12:51] [PASSED] xe_rejects_send_if_not_ready
[01:12:51] ==================== [PASSED] no_relay =====================
[01:12:51] ================== pf_relay (14 subtests) ==================
[01:12:51] [PASSED] pf_rejects_guc2pf_too_short
[01:12:51] [PASSED] pf_rejects_guc2pf_too_long
[01:12:51] [PASSED] pf_rejects_guc2pf_no_payload
[01:12:51] [PASSED] pf_fails_no_payload
[01:12:51] [PASSED] pf_fails_bad_origin
[01:12:51] [PASSED] pf_fails_bad_type
[01:12:51] [PASSED] pf_txn_reports_error
[01:12:51] [PASSED] pf_txn_sends_pf2guc
[01:12:51] [PASSED] pf_sends_pf2guc
[01:12:51] [SKIPPED] pf_loopback_nop
[01:12:51] [SKIPPED] pf_loopback_echo
[01:12:51] [SKIPPED] pf_loopback_fail
[01:12:51] [SKIPPED] pf_loopback_busy
[01:12:51] [SKIPPED] pf_loopback_retry
[01:12:51] ==================== [PASSED] pf_relay =====================
[01:12:51] ================== vf_relay (3 subtests) ===================
[01:12:51] [PASSED] vf_rejects_guc2vf_too_short
[01:12:51] [PASSED] vf_rejects_guc2vf_too_long
[01:12:51] [PASSED] vf_rejects_guc2vf_no_payload
[01:12:51] ==================== [PASSED] vf_relay =====================
[01:12:51] ================ pf_gt_config (9 subtests) =================
[01:12:51] [PASSED] fair_contexts_1vf
[01:12:51] [PASSED] fair_doorbells_1vf
[01:12:51] [PASSED] fair_ggtt_1vf
[01:12:51] ====================== fair_vram_1vf ======================
[01:12:51] [PASSED] 3.50 GiB
[01:12:51] [PASSED] 11.5 GiB
[01:12:51] [PASSED] 15.5 GiB
[01:12:51] [PASSED] 31.5 GiB
[01:12:51] [PASSED] 63.5 GiB
[01:12:51] [PASSED] 1.91 GiB
[01:12:51] ================== [PASSED] fair_vram_1vf ==================
[01:12:51] ================ fair_vram_1vf_admin_only =================
[01:12:51] [PASSED] 3.50 GiB
[01:12:51] [PASSED] 11.5 GiB
[01:12:51] [PASSED] 15.5 GiB
[01:12:51] [PASSED] 31.5 GiB
[01:12:51] [PASSED] 63.5 GiB
[01:12:51] [PASSED] 1.91 GiB
[01:12:51] ============ [PASSED] fair_vram_1vf_admin_only =============
[01:12:51] ====================== fair_contexts ======================
[01:12:51] [PASSED] 1 VF
[01:12:51] [PASSED] 2 VFs
[01:12:51] [PASSED] 3 VFs
[01:12:51] [PASSED] 4 VFs
[01:12:51] [PASSED] 5 VFs
[01:12:51] [PASSED] 6 VFs
[01:12:51] [PASSED] 7 VFs
[01:12:51] [PASSED] 8 VFs
[01:12:51] [PASSED] 9 VFs
[01:12:51] [PASSED] 10 VFs
[01:12:51] [PASSED] 11 VFs
[01:12:51] [PASSED] 12 VFs
[01:12:51] [PASSED] 13 VFs
[01:12:51] [PASSED] 14 VFs
[01:12:51] [PASSED] 15 VFs
[01:12:51] [PASSED] 16 VFs
[01:12:51] [PASSED] 17 VFs
[01:12:51] [PASSED] 18 VFs
[01:12:51] [PASSED] 19 VFs
[01:12:51] [PASSED] 20 VFs
[01:12:51] [PASSED] 21 VFs
[01:12:51] [PASSED] 22 VFs
[01:12:51] [PASSED] 23 VFs
[01:12:51] [PASSED] 24 VFs
[01:12:51] [PASSED] 25 VFs
[01:12:51] [PASSED] 26 VFs
[01:12:51] [PASSED] 27 VFs
[01:12:51] [PASSED] 28 VFs
[01:12:51] [PASSED] 29 VFs
[01:12:51] [PASSED] 30 VFs
[01:12:51] [PASSED] 31 VFs
[01:12:51] [PASSED] 32 VFs
[01:12:51] [PASSED] 33 VFs
[01:12:51] [PASSED] 34 VFs
[01:12:51] [PASSED] 35 VFs
[01:12:51] [PASSED] 36 VFs
[01:12:51] [PASSED] 37 VFs
[01:12:51] [PASSED] 38 VFs
[01:12:51] [PASSED] 39 VFs
[01:12:51] [PASSED] 40 VFs
[01:12:51] [PASSED] 41 VFs
[01:12:51] [PASSED] 42 VFs
[01:12:51] [PASSED] 43 VFs
[01:12:51] [PASSED] 44 VFs
[01:12:51] [PASSED] 45 VFs
[01:12:51] [PASSED] 46 VFs
[01:12:51] [PASSED] 47 VFs
[01:12:51] [PASSED] 48 VFs
[01:12:51] [PASSED] 49 VFs
[01:12:51] [PASSED] 50 VFs
[01:12:51] [PASSED] 51 VFs
[01:12:51] [PASSED] 52 VFs
[01:12:51] [PASSED] 53 VFs
[01:12:51] [PASSED] 54 VFs
[01:12:51] [PASSED] 55 VFs
[01:12:51] [PASSED] 56 VFs
[01:12:51] [PASSED] 57 VFs
[01:12:51] [PASSED] 58 VFs
[01:12:51] [PASSED] 59 VFs
[01:12:51] [PASSED] 60 VFs
[01:12:51] [PASSED] 61 VFs
[01:12:51] [PASSED] 62 VFs
[01:12:51] [PASSED] 63 VFs
[01:12:51] ================== [PASSED] fair_contexts ==================
[01:12:51] ===================== fair_doorbells ======================
[01:12:51] [PASSED] 1 VF
[01:12:51] [PASSED] 2 VFs
[01:12:51] [PASSED] 3 VFs
[01:12:51] [PASSED] 4 VFs
[01:12:51] [PASSED] 5 VFs
[01:12:51] [PASSED] 6 VFs
[01:12:51] [PASSED] 7 VFs
[01:12:51] [PASSED] 8 VFs
[01:12:51] [PASSED] 9 VFs
[01:12:51] [PASSED] 10 VFs
[01:12:51] [PASSED] 11 VFs
[01:12:51] [PASSED] 12 VFs
[01:12:51] [PASSED] 13 VFs
[01:12:51] [PASSED] 14 VFs
[01:12:51] [PASSED] 15 VFs
[01:12:51] [PASSED] 16 VFs
[01:12:51] [PASSED] 17 VFs
[01:12:51] [PASSED] 18 VFs
[01:12:51] [PASSED] 19 VFs
[01:12:51] [PASSED] 20 VFs
[01:12:51] [PASSED] 21 VFs
[01:12:51] [PASSED] 22 VFs
[01:12:51] [PASSED] 23 VFs
[01:12:51] [PASSED] 24 VFs
[01:12:51] [PASSED] 25 VFs
[01:12:51] [PASSED] 26 VFs
[01:12:51] [PASSED] 27 VFs
[01:12:51] [PASSED] 28 VFs
[01:12:51] [PASSED] 29 VFs
[01:12:51] [PASSED] 30 VFs
[01:12:51] [PASSED] 31 VFs
[01:12:51] [PASSED] 32 VFs
[01:12:51] [PASSED] 33 VFs
[01:12:51] [PASSED] 34 VFs
[01:12:51] [PASSED] 35 VFs
[01:12:51] [PASSED] 36 VFs
[01:12:51] [PASSED] 37 VFs
[01:12:51] [PASSED] 38 VFs
[01:12:51] [PASSED] 39 VFs
[01:12:51] [PASSED] 40 VFs
[01:12:51] [PASSED] 41 VFs
[01:12:51] [PASSED] 42 VFs
[01:12:51] [PASSED] 43 VFs
[01:12:51] [PASSED] 44 VFs
[01:12:51] [PASSED] 45 VFs
[01:12:51] [PASSED] 46 VFs
[01:12:51] [PASSED] 47 VFs
[01:12:51] [PASSED] 48 VFs
[01:12:51] [PASSED] 49 VFs
[01:12:51] [PASSED] 50 VFs
[01:12:51] [PASSED] 51 VFs
[01:12:51] [PASSED] 52 VFs
[01:12:51] [PASSED] 53 VFs
[01:12:51] [PASSED] 54 VFs
[01:12:51] [PASSED] 55 VFs
[01:12:51] [PASSED] 56 VFs
[01:12:51] [PASSED] 57 VFs
[01:12:51] [PASSED] 58 VFs
[01:12:51] [PASSED] 59 VFs
[01:12:51] [PASSED] 60 VFs
[01:12:51] [PASSED] 61 VFs
[01:12:51] [PASSED] 62 VFs
[01:12:51] [PASSED] 63 VFs
[01:12:51] ================= [PASSED] fair_doorbells ==================
[01:12:51] ======================== fair_ggtt ========================
[01:12:51] [PASSED] 1 VF
[01:12:51] [PASSED] 2 VFs
[01:12:51] [PASSED] 3 VFs
[01:12:51] [PASSED] 4 VFs
[01:12:51] [PASSED] 5 VFs
[01:12:51] [PASSED] 6 VFs
[01:12:51] [PASSED] 7 VFs
[01:12:51] [PASSED] 8 VFs
[01:12:51] [PASSED] 9 VFs
[01:12:51] [PASSED] 10 VFs
[01:12:51] [PASSED] 11 VFs
[01:12:51] [PASSED] 12 VFs
[01:12:51] [PASSED] 13 VFs
[01:12:51] [PASSED] 14 VFs
[01:12:51] [PASSED] 15 VFs
[01:12:51] [PASSED] 16 VFs
[01:12:51] [PASSED] 17 VFs
[01:12:51] [PASSED] 18 VFs
[01:12:51] [PASSED] 19 VFs
[01:12:51] [PASSED] 20 VFs
[01:12:51] [PASSED] 21 VFs
[01:12:51] [PASSED] 22 VFs
[01:12:51] [PASSED] 23 VFs
[01:12:51] [PASSED] 24 VFs
[01:12:51] [PASSED] 25 VFs
[01:12:51] [PASSED] 26 VFs
[01:12:51] [PASSED] 27 VFs
[01:12:51] [PASSED] 28 VFs
[01:12:51] [PASSED] 29 VFs
[01:12:51] [PASSED] 30 VFs
[01:12:51] [PASSED] 31 VFs
[01:12:51] [PASSED] 32 VFs
[01:12:51] [PASSED] 33 VFs
[01:12:51] [PASSED] 34 VFs
[01:12:51] [PASSED] 35 VFs
[01:12:51] [PASSED] 36 VFs
[01:12:51] [PASSED] 37 VFs
[01:12:51] [PASSED] 38 VFs
[01:12:51] [PASSED] 39 VFs
[01:12:51] [PASSED] 40 VFs
[01:12:51] [PASSED] 41 VFs
[01:12:51] [PASSED] 42 VFs
[01:12:51] [PASSED] 43 VFs
[01:12:51] [PASSED] 44 VFs
[01:12:51] [PASSED] 45 VFs
[01:12:51] [PASSED] 46 VFs
[01:12:51] [PASSED] 47 VFs
[01:12:51] [PASSED] 48 VFs
[01:12:51] [PASSED] 49 VFs
[01:12:51] [PASSED] 50 VFs
[01:12:51] [PASSED] 51 VFs
[01:12:51] [PASSED] 52 VFs
[01:12:51] [PASSED] 53 VFs
[01:12:51] [PASSED] 54 VFs
[01:12:51] [PASSED] 55 VFs
[01:12:51] [PASSED] 56 VFs
[01:12:51] [PASSED] 57 VFs
[01:12:51] [PASSED] 58 VFs
[01:12:51] [PASSED] 59 VFs
[01:12:51] [PASSED] 60 VFs
[01:12:51] [PASSED] 61 VFs
[01:12:51] [PASSED] 62 VFs
[01:12:51] [PASSED] 63 VFs
[01:12:51] ==================== [PASSED] fair_ggtt ====================
[01:12:51] ======================== fair_vram ========================
[01:12:51] [PASSED] 1 VF
[01:12:51] [PASSED] 2 VFs
[01:12:51] [PASSED] 3 VFs
[01:12:51] [PASSED] 4 VFs
[01:12:51] [PASSED] 5 VFs
[01:12:51] [PASSED] 6 VFs
[01:12:51] [PASSED] 7 VFs
[01:12:51] [PASSED] 8 VFs
[01:12:51] [PASSED] 9 VFs
[01:12:51] [PASSED] 10 VFs
[01:12:51] [PASSED] 11 VFs
[01:12:51] [PASSED] 12 VFs
[01:12:51] [PASSED] 13 VFs
[01:12:51] [PASSED] 14 VFs
[01:12:51] [PASSED] 15 VFs
[01:12:51] [PASSED] 16 VFs
[01:12:51] [PASSED] 17 VFs
[01:12:51] [PASSED] 18 VFs
[01:12:51] [PASSED] 19 VFs
[01:12:51] [PASSED] 20 VFs
[01:12:51] [PASSED] 21 VFs
[01:12:51] [PASSED] 22 VFs
[01:12:51] [PASSED] 23 VFs
[01:12:51] [PASSED] 24 VFs
[01:12:51] [PASSED] 25 VFs
[01:12:51] [PASSED] 26 VFs
[01:12:51] [PASSED] 27 VFs
[01:12:51] [PASSED] 28 VFs
[01:12:51] [PASSED] 29 VFs
[01:12:51] [PASSED] 30 VFs
[01:12:51] [PASSED] 31 VFs
[01:12:51] [PASSED] 32 VFs
[01:12:51] [PASSED] 33 VFs
[01:12:51] [PASSED] 34 VFs
[01:12:51] [PASSED] 35 VFs
[01:12:51] [PASSED] 36 VFs
[01:12:51] [PASSED] 37 VFs
[01:12:51] [PASSED] 38 VFs
[01:12:51] [PASSED] 39 VFs
[01:12:51] [PASSED] 40 VFs
[01:12:51] [PASSED] 41 VFs
[01:12:51] [PASSED] 42 VFs
[01:12:51] [PASSED] 43 VFs
[01:12:51] [PASSED] 44 VFs
[01:12:51] [PASSED] 45 VFs
[01:12:51] [PASSED] 46 VFs
[01:12:51] [PASSED] 47 VFs
[01:12:51] [PASSED] 48 VFs
[01:12:51] [PASSED] 49 VFs
[01:12:51] [PASSED] 50 VFs
[01:12:51] [PASSED] 51 VFs
[01:12:51] [PASSED] 52 VFs
[01:12:51] [PASSED] 53 VFs
[01:12:51] [PASSED] 54 VFs
[01:12:51] [PASSED] 55 VFs
[01:12:51] [PASSED] 56 VFs
[01:12:51] [PASSED] 57 VFs
[01:12:51] [PASSED] 58 VFs
[01:12:51] [PASSED] 59 VFs
[01:12:51] [PASSED] 60 VFs
[01:12:51] [PASSED] 61 VFs
[01:12:51] [PASSED] 62 VFs
[01:12:51] [PASSED] 63 VFs
[01:12:51] ==================== [PASSED] fair_vram ====================
[01:12:51] ================== [PASSED] pf_gt_config ===================
[01:12:51] ===================== lmtt (1 subtest) =====================
[01:12:51] ======================== test_ops =========================
[01:12:51] [PASSED] 2-level
[01:12:51] [PASSED] multi-level
[01:12:51] ==================== [PASSED] test_ops =====================
[01:12:51] ====================== [PASSED] lmtt =======================
[01:12:51] ================= pf_service (11 subtests) =================
[01:12:51] [PASSED] pf_negotiate_any
[01:12:51] [PASSED] pf_negotiate_base_match
[01:12:51] [PASSED] pf_negotiate_base_newer
[01:12:51] [PASSED] pf_negotiate_base_next
[01:12:51] [SKIPPED] pf_negotiate_base_older
[01:12:51] [PASSED] pf_negotiate_base_prev
[01:12:51] [PASSED] pf_negotiate_latest_match
[01:12:51] [PASSED] pf_negotiate_latest_newer
[01:12:51] [PASSED] pf_negotiate_latest_next
[01:12:51] [SKIPPED] pf_negotiate_latest_older
[01:12:51] [SKIPPED] pf_negotiate_latest_prev
[01:12:51] =================== [PASSED] pf_service ====================
[01:12:51] ================= xe_guc_g2g (2 subtests) ==================
[01:12:51] ============== xe_live_guc_g2g_kunit_default ==============
[01:12:51] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[01:12:51] ============== xe_live_guc_g2g_kunit_allmem ===============
[01:12:51] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[01:12:51] =================== [SKIPPED] xe_guc_g2g ===================
[01:12:51] =================== xe_mocs (2 subtests) ===================
[01:12:51] ================ xe_live_mocs_kernel_kunit ================
[01:12:51] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[01:12:51] ================ xe_live_mocs_reset_kunit =================
[01:12:51] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[01:12:51] ==================== [SKIPPED] xe_mocs =====================
[01:12:51] ================= xe_migrate (2 subtests) ==================
[01:12:51] ================= xe_migrate_sanity_kunit =================
[01:12:51] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[01:12:51] ================== xe_validate_ccs_kunit ==================
[01:12:51] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[01:12:51] =================== [SKIPPED] xe_migrate ===================
[01:12:51] ================== xe_dma_buf (1 subtest) ==================
[01:12:51] ==================== xe_dma_buf_kunit =====================
[01:12:51] ================ [SKIPPED] xe_dma_buf_kunit ================
[01:12:51] =================== [SKIPPED] xe_dma_buf ===================
[01:12:51] ================= xe_bo_shrink (1 subtest) =================
[01:12:51] =================== xe_bo_shrink_kunit ====================
[01:12:51] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[01:12:51] ================== [SKIPPED] xe_bo_shrink ==================
[01:12:51] ==================== xe_bo (2 subtests) ====================
[01:12:51] ================== xe_ccs_migrate_kunit ===================
[01:12:51] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[01:12:51] ==================== xe_bo_evict_kunit ====================
[01:12:51] =============== [SKIPPED] xe_bo_evict_kunit ================
[01:12:51] ===================== [SKIPPED] xe_bo ======================
[01:12:51] ==================== args (13 subtests) ====================
[01:12:51] [PASSED] count_args_test
[01:12:51] [PASSED] call_args_example
[01:12:51] [PASSED] call_args_test
[01:12:51] [PASSED] drop_first_arg_example
[01:12:51] [PASSED] drop_first_arg_test
[01:12:51] [PASSED] first_arg_example
[01:12:51] [PASSED] first_arg_test
[01:12:51] [PASSED] last_arg_example
[01:12:51] [PASSED] last_arg_test
[01:12:51] [PASSED] pick_arg_example
[01:12:51] [PASSED] if_args_example
[01:12:51] [PASSED] if_args_test
[01:12:51] [PASSED] sep_comma_example
[01:12:51] ====================== [PASSED] args =======================
[01:12:51] =================== xe_pci (3 subtests) ====================
[01:12:51] ==================== check_graphics_ip ====================
[01:12:51] [PASSED] 12.00 Xe_LP
[01:12:51] [PASSED] 12.10 Xe_LP+
[01:12:51] [PASSED] 12.55 Xe_HPG
[01:12:51] [PASSED] 12.60 Xe_HPC
[01:12:51] [PASSED] 12.70 Xe_LPG
[01:12:51] [PASSED] 12.71 Xe_LPG
[01:12:51] [PASSED] 12.74 Xe_LPG+
[01:12:51] [PASSED] 20.01 Xe2_HPG
[01:12:51] [PASSED] 20.02 Xe2_HPG
[01:12:51] [PASSED] 20.04 Xe2_LPG
[01:12:51] [PASSED] 30.00 Xe3_LPG
[01:12:51] [PASSED] 30.01 Xe3_LPG
[01:12:51] [PASSED] 30.03 Xe3_LPG
[01:12:51] [PASSED] 30.04 Xe3_LPG
[01:12:51] [PASSED] 30.05 Xe3_LPG
[01:12:51] [PASSED] 35.10 Xe3p_LPG
[01:12:51] [PASSED] 35.11 Xe3p_XPC
[01:12:51] ================ [PASSED] check_graphics_ip ================
[01:12:51] ===================== check_media_ip ======================
[01:12:51] [PASSED] 12.00 Xe_M
[01:12:51] [PASSED] 12.55 Xe_HPM
[01:12:51] [PASSED] 13.00 Xe_LPM+
[01:12:51] [PASSED] 13.01 Xe2_HPM
[01:12:51] [PASSED] 20.00 Xe2_LPM
[01:12:51] [PASSED] 30.00 Xe3_LPM
[01:12:51] [PASSED] 30.02 Xe3_LPM
[01:12:51] [PASSED] 35.00 Xe3p_LPM
[01:12:51] [PASSED] 35.03 Xe3p_HPM
[01:12:51] ================= [PASSED] check_media_ip ==================
[01:12:51] =================== check_platform_desc ===================
[01:12:51] [PASSED] 0x9A60 (TIGERLAKE)
[01:12:51] [PASSED] 0x9A68 (TIGERLAKE)
[01:12:51] [PASSED] 0x9A70 (TIGERLAKE)
[01:12:51] [PASSED] 0x9A40 (TIGERLAKE)
[01:12:51] [PASSED] 0x9A49 (TIGERLAKE)
[01:12:51] [PASSED] 0x9A59 (TIGERLAKE)
[01:12:51] [PASSED] 0x9A78 (TIGERLAKE)
[01:12:51] [PASSED] 0x9AC0 (TIGERLAKE)
[01:12:51] [PASSED] 0x9AC9 (TIGERLAKE)
[01:12:51] [PASSED] 0x9AD9 (TIGERLAKE)
[01:12:51] [PASSED] 0x9AF8 (TIGERLAKE)
[01:12:51] [PASSED] 0x4C80 (ROCKETLAKE)
[01:12:51] [PASSED] 0x4C8A (ROCKETLAKE)
[01:12:51] [PASSED] 0x4C8B (ROCKETLAKE)
[01:12:51] [PASSED] 0x4C8C (ROCKETLAKE)
[01:12:51] [PASSED] 0x4C90 (ROCKETLAKE)
[01:12:51] [PASSED] 0x4C9A (ROCKETLAKE)
[01:12:51] [PASSED] 0x4680 (ALDERLAKE_S)
[01:12:51] [PASSED] 0x4682 (ALDERLAKE_S)
[01:12:51] [PASSED] 0x4688 (ALDERLAKE_S)
[01:12:51] [PASSED] 0x468A (ALDERLAKE_S)
[01:12:51] [PASSED] 0x468B (ALDERLAKE_S)
[01:12:51] [PASSED] 0x4690 (ALDERLAKE_S)
[01:12:51] [PASSED] 0x4692 (ALDERLAKE_S)
[01:12:51] [PASSED] 0x4693 (ALDERLAKE_S)
[01:12:51] [PASSED] 0x46A0 (ALDERLAKE_P)
[01:12:51] [PASSED] 0x46A1 (ALDERLAKE_P)
[01:12:51] [PASSED] 0x46A2 (ALDERLAKE_P)
[01:12:51] [PASSED] 0x46A3 (ALDERLAKE_P)
[01:12:51] [PASSED] 0x46A6 (ALDERLAKE_P)
[01:12:51] [PASSED] 0x46A8 (ALDERLAKE_P)
[01:12:51] [PASSED] 0x46AA (ALDERLAKE_P)
[01:12:51] [PASSED] 0x462A (ALDERLAKE_P)
[01:12:51] [PASSED] 0x4626 (ALDERLAKE_P)
[01:12:51] [PASSED] 0x4628 (ALDERLAKE_P)
[01:12:51] [PASSED] 0x46B0 (ALDERLAKE_P)
[01:12:51] [PASSED] 0x46B1 (ALDERLAKE_P)
[01:12:51] [PASSED] 0x46B2 (ALDERLAKE_P)
[01:12:51] [PASSED] 0x46B3 (ALDERLAKE_P)
[01:12:51] [PASSED] 0x46C0 (ALDERLAKE_P)
[01:12:51] [PASSED] 0x46C1 (ALDERLAKE_P)
[01:12:51] [PASSED] 0x46C2 (ALDERLAKE_P)
[01:12:51] [PASSED] 0x46C3 (ALDERLAKE_P)
[01:12:51] [PASSED] 0x46D0 (ALDERLAKE_N)
[01:12:51] [PASSED] 0x46D1 (ALDERLAKE_N)
[01:12:51] [PASSED] 0x46D2 (ALDERLAKE_N)
[01:12:51] [PASSED] 0x46D3 (ALDERLAKE_N)
[01:12:51] [PASSED] 0x46D4 (ALDERLAKE_N)
[01:12:51] [PASSED] 0xA721 (ALDERLAKE_P)
[01:12:51] [PASSED] 0xA7A1 (ALDERLAKE_P)
[01:12:51] [PASSED] 0xA7A9 (ALDERLAKE_P)
[01:12:51] [PASSED] 0xA7AC (ALDERLAKE_P)
[01:12:51] [PASSED] 0xA7AD (ALDERLAKE_P)
[01:12:51] [PASSED] 0xA720 (ALDERLAKE_P)
[01:12:51] [PASSED] 0xA7A0 (ALDERLAKE_P)
[01:12:51] [PASSED] 0xA7A8 (ALDERLAKE_P)
[01:12:51] [PASSED] 0xA7AA (ALDERLAKE_P)
[01:12:51] [PASSED] 0xA7AB (ALDERLAKE_P)
[01:12:51] [PASSED] 0xA780 (ALDERLAKE_S)
[01:12:51] [PASSED] 0xA781 (ALDERLAKE_S)
[01:12:51] [PASSED] 0xA782 (ALDERLAKE_S)
[01:12:51] [PASSED] 0xA783 (ALDERLAKE_S)
[01:12:51] [PASSED] 0xA788 (ALDERLAKE_S)
[01:12:51] [PASSED] 0xA789 (ALDERLAKE_S)
[01:12:51] [PASSED] 0xA78A (ALDERLAKE_S)
[01:12:51] [PASSED] 0xA78B (ALDERLAKE_S)
[01:12:51] [PASSED] 0x4905 (DG1)
[01:12:51] [PASSED] 0x4906 (DG1)
[01:12:51] [PASSED] 0x4907 (DG1)
[01:12:51] [PASSED] 0x4908 (DG1)
[01:12:51] [PASSED] 0x4909 (DG1)
[01:12:51] [PASSED] 0x56C0 (DG2)
[01:12:51] [PASSED] 0x56C2 (DG2)
[01:12:51] [PASSED] 0x56C1 (DG2)
[01:12:51] [PASSED] 0x7D51 (METEORLAKE)
[01:12:51] [PASSED] 0x7DD1 (METEORLAKE)
[01:12:51] [PASSED] 0x7D41 (METEORLAKE)
[01:12:51] [PASSED] 0x7D67 (METEORLAKE)
[01:12:51] [PASSED] 0xB640 (METEORLAKE)
[01:12:51] [PASSED] 0x56A0 (DG2)
[01:12:51] [PASSED] 0x56A1 (DG2)
[01:12:51] [PASSED] 0x56A2 (DG2)
[01:12:51] [PASSED] 0x56BE (DG2)
[01:12:51] [PASSED] 0x56BF (DG2)
[01:12:51] [PASSED] 0x5690 (DG2)
[01:12:51] [PASSED] 0x5691 (DG2)
[01:12:51] [PASSED] 0x5692 (DG2)
[01:12:51] [PASSED] 0x56A5 (DG2)
[01:12:51] [PASSED] 0x56A6 (DG2)
[01:12:51] [PASSED] 0x56B0 (DG2)
[01:12:51] [PASSED] 0x56B1 (DG2)
[01:12:51] [PASSED] 0x56BA (DG2)
[01:12:51] [PASSED] 0x56BB (DG2)
[01:12:51] [PASSED] 0x56BC (DG2)
[01:12:51] [PASSED] 0x56BD (DG2)
[01:12:51] [PASSED] 0x5693 (DG2)
[01:12:51] [PASSED] 0x5694 (DG2)
[01:12:51] [PASSED] 0x5695 (DG2)
[01:12:51] [PASSED] 0x56A3 (DG2)
[01:12:51] [PASSED] 0x56A4 (DG2)
[01:12:51] [PASSED] 0x56B2 (DG2)
[01:12:51] [PASSED] 0x56B3 (DG2)
[01:12:51] [PASSED] 0x5696 (DG2)
[01:12:51] [PASSED] 0x5697 (DG2)
[01:12:51] [PASSED] 0xB69 (PVC)
[01:12:51] [PASSED] 0xB6E (PVC)
[01:12:51] [PASSED] 0xBD4 (PVC)
[01:12:51] [PASSED] 0xBD5 (PVC)
[01:12:51] [PASSED] 0xBD6 (PVC)
[01:12:51] [PASSED] 0xBD7 (PVC)
[01:12:51] [PASSED] 0xBD8 (PVC)
[01:12:51] [PASSED] 0xBD9 (PVC)
[01:12:51] [PASSED] 0xBDA (PVC)
[01:12:51] [PASSED] 0xBDB (PVC)
[01:12:51] [PASSED] 0xBE0 (PVC)
[01:12:51] [PASSED] 0xBE1 (PVC)
[01:12:51] [PASSED] 0xBE5 (PVC)
[01:12:51] [PASSED] 0x7D40 (METEORLAKE)
[01:12:51] [PASSED] 0x7D45 (METEORLAKE)
[01:12:51] [PASSED] 0x7D55 (METEORLAKE)
[01:12:51] [PASSED] 0x7D60 (METEORLAKE)
[01:12:51] [PASSED] 0x7DD5 (METEORLAKE)
[01:12:51] [PASSED] 0x6420 (LUNARLAKE)
[01:12:51] [PASSED] 0x64A0 (LUNARLAKE)
[01:12:51] [PASSED] 0x64B0 (LUNARLAKE)
[01:12:51] [PASSED] 0xE202 (BATTLEMAGE)
[01:12:51] [PASSED] 0xE209 (BATTLEMAGE)
[01:12:51] [PASSED] 0xE20B (BATTLEMAGE)
[01:12:51] [PASSED] 0xE20C (BATTLEMAGE)
[01:12:51] [PASSED] 0xE20D (BATTLEMAGE)
[01:12:51] [PASSED] 0xE210 (BATTLEMAGE)
[01:12:51] [PASSED] 0xE211 (BATTLEMAGE)
[01:12:51] [PASSED] 0xE212 (BATTLEMAGE)
[01:12:51] [PASSED] 0xE216 (BATTLEMAGE)
[01:12:51] [PASSED] 0xE220 (BATTLEMAGE)
[01:12:51] [PASSED] 0xE221 (BATTLEMAGE)
[01:12:51] [PASSED] 0xE222 (BATTLEMAGE)
[01:12:51] [PASSED] 0xE223 (BATTLEMAGE)
[01:12:51] [PASSED] 0xB080 (PANTHERLAKE)
[01:12:51] [PASSED] 0xB081 (PANTHERLAKE)
[01:12:51] [PASSED] 0xB082 (PANTHERLAKE)
[01:12:51] [PASSED] 0xB083 (PANTHERLAKE)
[01:12:51] [PASSED] 0xB084 (PANTHERLAKE)
[01:12:51] [PASSED] 0xB085 (PANTHERLAKE)
[01:12:51] [PASSED] 0xB086 (PANTHERLAKE)
[01:12:51] [PASSED] 0xB087 (PANTHERLAKE)
[01:12:51] [PASSED] 0xB08F (PANTHERLAKE)
[01:12:51] [PASSED] 0xB090 (PANTHERLAKE)
[01:12:51] [PASSED] 0xB0A0 (PANTHERLAKE)
[01:12:51] [PASSED] 0xB0B0 (PANTHERLAKE)
[01:12:51] [PASSED] 0xFD80 (PANTHERLAKE)
[01:12:51] [PASSED] 0xFD81 (PANTHERLAKE)
[01:12:51] [PASSED] 0xD740 (NOVALAKE_S)
[01:12:51] [PASSED] 0xD741 (NOVALAKE_S)
[01:12:51] [PASSED] 0xD742 (NOVALAKE_S)
[01:12:51] [PASSED] 0xD743 (NOVALAKE_S)
[01:12:51] [PASSED] 0xD745 (NOVALAKE_S)
[01:12:51] [PASSED] 0xD74A (NOVALAKE_S)
[01:12:51] [PASSED] 0xD74B (NOVALAKE_S)
[01:12:51] [PASSED] 0x674C (CRESCENTISLAND)
[01:12:51] [PASSED] 0x674D (CRESCENTISLAND)
[01:12:51] [PASSED] 0x674E (CRESCENTISLAND)
[01:12:51] [PASSED] 0x674F (CRESCENTISLAND)
[01:12:51] [PASSED] 0x6750 (CRESCENTISLAND)
[01:12:51] [PASSED] 0xD750 (NOVALAKE_P)
[01:12:51] [PASSED] 0xD751 (NOVALAKE_P)
[01:12:51] [PASSED] 0xD752 (NOVALAKE_P)
[01:12:51] [PASSED] 0xD753 (NOVALAKE_P)
[01:12:51] [PASSED] 0xD754 (NOVALAKE_P)
[01:12:51] [PASSED] 0xD755 (NOVALAKE_P)
[01:12:51] [PASSED] 0xD756 (NOVALAKE_P)
[01:12:51] [PASSED] 0xD757 (NOVALAKE_P)
[01:12:51] [PASSED] 0xD75F (NOVALAKE_P)
[01:12:51] =============== [PASSED] check_platform_desc ===============
[01:12:51] ===================== [PASSED] xe_pci ======================
[01:12:51] ============= xe_rtp_tables_test (4 subtests) ==============
[01:12:51] ================== xe_rtp_table_gt_test ===================
[01:12:51] [PASSED] gt_was/14011060649
[01:12:51] [PASSED] gt_was/14011059788
[01:12:51] [PASSED] gt_was/14015795083
[01:12:51] [PASSED] gt_was/16021867713
[01:12:51] [PASSED] gt_was/14019449301
[01:12:51] [PASSED] gt_was/16028005424
[01:12:51] [PASSED] gt_was/14026578760
[01:12:51] [PASSED] gt_was/1409420604
[01:12:51] [PASSED] gt_was/1408615072
[01:12:51] [PASSED] gt_was/22010523718
[01:12:51] [PASSED] gt_was/14011006942
[01:12:51] [PASSED] gt_was/14014830051
[01:12:51] [PASSED] gt_was/18018781329
[01:12:51] [PASSED] gt_was/1509235366
[01:12:51] [PASSED] gt_was/18018781329
[01:12:51] [PASSED] gt_was/16016694945
[01:12:51] [PASSED] gt_was/14018575942
[01:12:51] [PASSED] gt_was/22016670082
[01:12:51] [PASSED] gt_was/22016670082
[01:12:51] [PASSED] gt_was/14017421178
[01:12:51] [PASSED] gt_was/16025250150
[01:12:51] [PASSED] gt_was/14021871409
[01:12:51] [PASSED] gt_was/16021865536
[01:12:51] [PASSED] gt_was/14021486841
[01:12:51] [PASSED] gt_was/14025160223
[01:12:51] [PASSED] gt_was/14026144927, 16029437861
[01:12:51] [PASSED] gt_was/14025635424
[01:12:51] [PASSED] gt_was/16028005424
[01:12:51] ============== [PASSED] xe_rtp_table_gt_test ===============
[01:12:51] ================== xe_rtp_table_gt_test ===================
[01:12:51] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[01:12:51] [PASSED] gt_tunings/Tuning: 32B Access Enable
[01:12:51] [PASSED] gt_tunings/Tuning: L3 cache
[01:12:51] [PASSED] gt_tunings/Tuning: L3 cache - media
[01:12:51] [PASSED] gt_tunings/Tuning: Compression Overfetch
[01:12:51] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[01:12:51] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[01:12:51] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[01:12:51] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[01:12:51] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[01:12:51] [PASSED] gt_tunings/Tuning: Stateless compression control
[01:12:51] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[01:12:51] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[01:12:51] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[01:12:51] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[01:12:51] ============== [PASSED] xe_rtp_table_gt_test ===============
[01:12:51] ================== xe_rtp_table_oob_test ==================
[01:12:51] [PASSED] oob_was/1607983814
[01:12:51] [PASSED] oob_was/16010904313
[01:12:51] [PASSED] oob_was/18022495364
[01:12:51] [PASSED] oob_was/22012773006
[01:12:51] [PASSED] oob_was/14014475959
[01:12:51] [PASSED] oob_was/22011391025
[01:12:51] [PASSED] oob_was/22012727170
[01:12:51] [PASSED] oob_was/22012727685
[01:12:51] [PASSED] oob_was/22016596838
[01:12:51] [PASSED] oob_was/18020744125
[01:12:51] [PASSED] oob_was/1409600907
[01:12:51] [PASSED] oob_was/22014953428
[01:12:51] [PASSED] oob_was/16017236439
[01:12:51] [PASSED] oob_was/14019821291
[01:12:51] [PASSED] oob_was/14015076503
[01:12:51] [PASSED] oob_was/14018913170
[01:12:51] [PASSED] oob_was/14018094691
[01:12:51] [PASSED] oob_was/18024947630
[01:12:51] [PASSED] oob_was/16022287689
[01:12:51] [PASSED] oob_was/13011645652
[01:12:51] [PASSED] oob_was/14022293748
[01:12:51] [PASSED] oob_was/22019794406
[01:12:51] [PASSED] oob_was/22019338487
[01:12:51] [PASSED] oob_was/16023588340
[01:12:51] [PASSED] oob_was/14019789679
[01:12:51] [PASSED] oob_was/14022866841
[01:12:51] [PASSED] oob_was/16021333562
[01:12:51] [PASSED] oob_was/14016712196
[01:12:51] [PASSED] oob_was/14015568240
[01:12:51] [PASSED] oob_was/18013179988
[01:12:51] [PASSED] oob_was/1508761755
[01:12:51] [PASSED] oob_was/16023105232
[01:12:51] [PASSED] oob_was/16026508708
[01:12:51] [PASSED] oob_was/14020001231
[01:12:51] [PASSED] oob_was/16023683509
[01:12:51] [PASSED] oob_was/14025515070
[01:12:51] [PASSED] oob_was/15015404425_disable
[01:12:51] [PASSED] oob_was/16026007364
[01:12:51] [PASSED] oob_was/14020316580
[01:12:51] [PASSED] oob_was/14025883347
[01:12:51] ============== [PASSED] xe_rtp_table_oob_test ==============
[01:12:51] ================ xe_rtp_table_dev_oob_test ================
[01:12:51] [PASSED] device_oob_was/22010954014
[01:12:51] [PASSED] device_oob_was/15015404425
[01:12:51] [PASSED] device_oob_was/22019338487_display
[01:12:51] [PASSED] device_oob_was/14022085890
[01:12:51] [PASSED] device_oob_was/14026539277
[01:12:51] [PASSED] device_oob_was/14026633728
[01:12:51] [PASSED] device_oob_was/14026746987
[01:12:51] [PASSED] device_oob_was/14026779378
[01:12:51] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[01:12:51] =============== [PASSED] xe_rtp_tables_test ================
[01:12:51] =================== xe_rtp (3 subtests) ====================
[01:12:51] =================== xe_rtp_rules_tests ====================
[01:12:51] [PASSED] no
[01:12:51] [PASSED] yes
[01:12:51] [PASSED] no-and-no
[01:12:51] [PASSED] no-and-yes
[01:12:51] [PASSED] yes-and-no
[01:12:51] [PASSED] yes-and-yes
[01:12:51] [PASSED] no-or-no
[01:12:51] [PASSED] no-or-yes
[01:12:51] [PASSED] yes-or-no
[01:12:51] [PASSED] yes-or-yes
[01:12:51] [PASSED] no-yes-or-yes-no
[01:12:51] [PASSED] no-yes-or-yes-yes
[01:12:51] [PASSED] yes-yes-or-no-yes
[01:12:51] [PASSED] yes-yes-or-yes-yes
[01:12:51] [PASSED] no-no-or-yes-or-no
[01:12:51] [PASSED] or
[01:12:51] [PASSED] or-yes
[01:12:51] [PASSED] or-no
[01:12:51] [PASSED] yes-or
[01:12:51] [PASSED] no-or
[01:12:51] [PASSED] no-or-or-yes
[01:12:51] [PASSED] yes-or-or-no
[01:12:51] [PASSED] no-or-or-no
[01:12:51] [PASSED] missing-context-engine-class
[01:12:51] [PASSED] missing-context-engine-class-or-yes
[01:12:51] [PASSED] missing-context-engine-class-or-or-yes
[01:12:51] =============== [PASSED] xe_rtp_rules_tests ================
[01:12:51] =============== xe_rtp_process_to_sr_tests ================
[01:12:51] [PASSED] coalesce-same-reg
[01:12:51] [PASSED] no-match-no-add
[01:12:51] [PASSED] two-regs-two-entries
[01:12:51] [PASSED] clr-one-set-other
[01:12:51] [PASSED] set-field
[01:12:51] [PASSED] conflict-duplicate
[01:12:51] [PASSED] conflict-not-disjoint
[01:12:51] [PASSED] conflict-reg-type
[01:12:51] [PASSED] bad-mcr-reg-forced-to-regular
[01:12:51] [PASSED] bad-regular-reg-forced-to-mcr
[01:12:51] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[01:12:51] ================== xe_rtp_process_tests ===================
[01:12:51] [PASSED] active1
[01:12:51] [PASSED] active2
[01:12:51] [PASSED] active-inactive
[01:12:51] [PASSED] inactive-active
[01:12:51] [PASSED] inactive-active-inactive
[01:12:51] [PASSED] inactive-inactive-inactive
[01:12:51] ============== [PASSED] xe_rtp_process_tests ===============
[01:12:51] ===================== [PASSED] xe_rtp ======================
[01:12:51] ==================== xe_wa (1 subtest) =====================
[01:12:51] ======================== xe_wa_gt =========================
[01:12:51] [PASSED] TIGERLAKE B0
[01:12:51] [PASSED] DG1 A0
[01:12:51] [PASSED] DG1 B0
[01:12:51] [PASSED] ALDERLAKE_S A0
[01:12:51] [PASSED] ALDERLAKE_S B0
[01:12:51] [PASSED] ALDERLAKE_S C0
[01:12:51] [PASSED] ALDERLAKE_S D0
[01:12:51] [PASSED] ALDERLAKE_P A0
[01:12:51] [PASSED] ALDERLAKE_P B0
[01:12:51] [PASSED] ALDERLAKE_P C0
[01:12:51] [PASSED] ALDERLAKE_S RPLS D0
[01:12:51] [PASSED] ALDERLAKE_P RPLU E0
[01:12:51] [PASSED] DG2 G10 C0
[01:12:51] [PASSED] DG2 G11 B1
[01:12:51] [PASSED] DG2 G12 A1
[01:12:51] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[01:12:51] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[01:12:51] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[01:12:51] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[01:12:51] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[01:12:51] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[01:12:51] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[01:12:51] ==================== [PASSED] xe_wa_gt =====================
[01:12:51] ====================== [PASSED] xe_wa ======================
[01:12:51] ============================================================
[01:12:51] Testing complete. Ran 716 tests: passed: 698, skipped: 18
[01:12:51] Elapsed time: 36.823s total, 4.345s configuring, 31.812s building, 0.657s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[01:12:52] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[01:12:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
In file included from ../drivers/gpu/drm/tests/drm_bridge_test.c:21:
../drivers/gpu/drm/tests/drm_kunit_edid.h:958:28: warning: ‘test_edid_hdmi_4k_rgb_yuv420_dc_max_340mhz’ defined but not used [-Wunused-const-variable=]
958 | static const unsigned char test_edid_hdmi_4k_rgb_yuv420_dc_max_340mhz[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:726:28: warning: ‘test_edid_hdmi_1080p_rgb_yuv_dc_max_340mhz’ defined but not used [-Wunused-const-variable=]
726 | static const unsigned char test_edid_hdmi_1080p_rgb_yuv_dc_max_340mhz[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:612:28: warning: ‘test_edid_hdmi_1080p_rgb_yuv_dc_max_200mhz’ defined but not used [-Wunused-const-variable=]
612 | static const unsigned char test_edid_hdmi_1080p_rgb_yuv_dc_max_200mhz[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:498:28: warning: ‘test_edid_hdmi_1080p_rgb_max_340mhz’ defined but not used [-Wunused-const-variable=]
498 | static const unsigned char test_edid_hdmi_1080p_rgb_max_340mhz[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:390:28: warning: ‘test_edid_hdmi_1080p_rgb_max_200mhz_hdr’ defined but not used [-Wunused-const-variable=]
390 | static const unsigned char test_edid_hdmi_1080p_rgb_max_200mhz_hdr[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:271:28: warning: ‘test_edid_hdmi_1080p_rgb_max_200mhz’ defined but not used [-Wunused-const-variable=]
271 | static const unsigned char test_edid_hdmi_1080p_rgb_max_200mhz[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:163:28: warning: ‘test_edid_hdmi_1080p_rgb_max_100mhz’ defined but not used [-Wunused-const-variable=]
163 | static const unsigned char test_edid_hdmi_1080p_rgb_max_100mhz[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/gpu/drm/tests/drm_kunit_edid.h:57:28: warning: ‘test_edid_dvi_1080p’ defined but not used [-Wunused-const-variable=]
57 | static const unsigned char test_edid_dvi_1080p[] = {
| ^~~~~~~~~~~~~~~~~~~
[01:13:18] Starting KUnit Kernel (1/1)...
[01:13:18] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[01:13:18] ============ drm_test_pick_cmdline (2 subtests) ============
[01:13:18] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[01:13:18] =============== drm_test_pick_cmdline_named ===============
[01:13:18] [PASSED] NTSC
[01:13:18] [PASSED] NTSC-J
[01:13:18] [PASSED] PAL
[01:13:18] [PASSED] PAL-M
[01:13:18] =========== [PASSED] drm_test_pick_cmdline_named ===========
[01:13:18] ============== [PASSED] drm_test_pick_cmdline ==============
[01:13:18] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[01:13:18] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[01:13:18] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[01:13:18] =========== drm_validate_clone_mode (2 subtests) ===========
[01:13:18] ============== drm_test_check_in_clone_mode ===============
[01:13:18] [PASSED] in_clone_mode
[01:13:18] [PASSED] not_in_clone_mode
[01:13:18] ========== [PASSED] drm_test_check_in_clone_mode ===========
[01:13:18] =============== drm_test_check_valid_clones ===============
[01:13:18] [PASSED] not_in_clone_mode
[01:13:18] [PASSED] valid_clone
[01:13:18] [PASSED] invalid_clone
[01:13:18] =========== [PASSED] drm_test_check_valid_clones ===========
[01:13:18] ============= [PASSED] drm_validate_clone_mode =============
[01:13:18] ============= drm_validate_modeset (1 subtest) =============
[01:13:18] [PASSED] drm_test_check_connector_changed_modeset
[01:13:18] ============== [PASSED] drm_validate_modeset ===============
[01:13:18] ====== drm_test_bridge_get_current_state (2 subtests) ======
[01:13:18] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[01:13:18] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[01:13:18] ======== [PASSED] drm_test_bridge_get_current_state ========
[01:13:18] ====== drm_test_bridge_helper_reset_crtc (4 subtests) ======
[01:13:18] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[01:13:18] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[01:13:18] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[01:13:18] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[01:13:18] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[01:13:18] ============== drm_bridge_alloc (2 subtests) ===============
[01:13:18] [PASSED] drm_test_drm_bridge_alloc_basic
[01:13:18] [PASSED] drm_test_drm_bridge_alloc_get_put
[01:13:18] ================ [PASSED] drm_bridge_alloc =================
[01:13:18] ============= drm_bridge_bus_fmt (5 subtests) ==============
[01:13:18] [PASSED] drm_test_bridge_rgb_yuv_rgb
[01:13:18] [PASSED] drm_test_bridge_must_convert_to_yuv444
[01:13:18] [PASSED] drm_test_bridge_hdmi_auto_rgb
[01:13:18] [PASSED] drm_test_bridge_auto_first
[01:13:18] [PASSED] drm_test_bridge_rgb_yuv_no_path
[01:13:18] =============== [PASSED] drm_bridge_bus_fmt ================
[01:13:18] ============= drm_cmdline_parser (40 subtests) =============
[01:13:18] [PASSED] drm_test_cmdline_force_d_only
[01:13:18] [PASSED] drm_test_cmdline_force_D_only_dvi
[01:13:18] [PASSED] drm_test_cmdline_force_D_only_hdmi
[01:13:18] [PASSED] drm_test_cmdline_force_D_only_not_digital
[01:13:18] [PASSED] drm_test_cmdline_force_e_only
[01:13:18] [PASSED] drm_test_cmdline_res
[01:13:18] [PASSED] drm_test_cmdline_res_vesa
[01:13:18] [PASSED] drm_test_cmdline_res_vesa_rblank
[01:13:18] [PASSED] drm_test_cmdline_res_rblank
[01:13:18] [PASSED] drm_test_cmdline_res_bpp
[01:13:18] [PASSED] drm_test_cmdline_res_refresh
[01:13:18] [PASSED] drm_test_cmdline_res_bpp_refresh
[01:13:18] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[01:13:18] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[01:13:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[01:13:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[01:13:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[01:13:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[01:13:18] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[01:13:18] [PASSED] drm_test_cmdline_res_margins_force_on
[01:13:18] [PASSED] drm_test_cmdline_res_vesa_margins
[01:13:18] [PASSED] drm_test_cmdline_name
[01:13:18] [PASSED] drm_test_cmdline_name_bpp
[01:13:18] [PASSED] drm_test_cmdline_name_option
[01:13:18] [PASSED] drm_test_cmdline_name_bpp_option
[01:13:18] [PASSED] drm_test_cmdline_rotate_0
[01:13:18] [PASSED] drm_test_cmdline_rotate_90
[01:13:18] [PASSED] drm_test_cmdline_rotate_180
[01:13:18] [PASSED] drm_test_cmdline_rotate_270
[01:13:18] [PASSED] drm_test_cmdline_hmirror
[01:13:18] [PASSED] drm_test_cmdline_vmirror
[01:13:18] [PASSED] drm_test_cmdline_margin_options
[01:13:18] [PASSED] drm_test_cmdline_multiple_options
[01:13:18] [PASSED] drm_test_cmdline_bpp_extra_and_option
[01:13:18] [PASSED] drm_test_cmdline_extra_and_option
[01:13:18] [PASSED] drm_test_cmdline_freestanding_options
[01:13:18] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[01:13:18] [PASSED] drm_test_cmdline_panel_orientation
[01:13:18] ================ drm_test_cmdline_invalid =================
[01:13:18] [PASSED] margin_only
[01:13:18] [PASSED] interlace_only
[01:13:18] [PASSED] res_missing_x
[01:13:18] [PASSED] res_missing_y
[01:13:18] [PASSED] res_bad_y
[01:13:18] [PASSED] res_missing_y_bpp
[01:13:18] [PASSED] res_bad_bpp
[01:13:18] [PASSED] res_bad_refresh
[01:13:18] [PASSED] res_bpp_refresh_force_on_off
[01:13:18] [PASSED] res_invalid_mode
[01:13:18] [PASSED] res_bpp_wrong_place_mode
[01:13:18] [PASSED] name_bpp_refresh
[01:13:18] [PASSED] name_refresh
[01:13:18] [PASSED] name_refresh_wrong_mode
[01:13:18] [PASSED] name_refresh_invalid_mode
[01:13:18] [PASSED] rotate_multiple
[01:13:18] [PASSED] rotate_invalid_val
[01:13:18] [PASSED] rotate_truncated
[01:13:18] [PASSED] invalid_option
[01:13:18] [PASSED] invalid_tv_option
[01:13:18] [PASSED] truncated_tv_option
[01:13:18] ============ [PASSED] drm_test_cmdline_invalid =============
[01:13:18] =============== drm_test_cmdline_tv_options ===============
[01:13:18] [PASSED] NTSC
[01:13:18] [PASSED] NTSC_443
[01:13:18] [PASSED] NTSC_J
[01:13:18] [PASSED] PAL
[01:13:18] [PASSED] PAL_M
[01:13:18] [PASSED] PAL_N
[01:13:18] [PASSED] SECAM
[01:13:18] [PASSED] MONO_525
[01:13:18] [PASSED] MONO_625
[01:13:18] =========== [PASSED] drm_test_cmdline_tv_options ===========
[01:13:18] =============== [PASSED] drm_cmdline_parser ================
[01:13:18] ========== drmm_connector_hdmi_init (20 subtests) ==========
[01:13:18] [PASSED] drm_test_connector_hdmi_init_valid
[01:13:18] [PASSED] drm_test_connector_hdmi_init_bpc_8
[01:13:18] [PASSED] drm_test_connector_hdmi_init_bpc_10
[01:13:18] [PASSED] drm_test_connector_hdmi_init_bpc_12
[01:13:18] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[01:13:18] [PASSED] drm_test_connector_hdmi_init_bpc_null
[01:13:18] [PASSED] drm_test_connector_hdmi_init_formats_empty
[01:13:18] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[01:13:18] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[01:13:18] [PASSED] supported_formats=0x9 yuv420_allowed=1
[01:13:18] [PASSED] supported_formats=0x9 yuv420_allowed=0
[01:13:18] [PASSED] supported_formats=0x5 yuv420_allowed=1
[01:13:18] [PASSED] supported_formats=0x5 yuv420_allowed=0
[01:13:18] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[01:13:18] [PASSED] drm_test_connector_hdmi_init_null_ddc
[01:13:18] [PASSED] drm_test_connector_hdmi_init_null_product
[01:13:18] [PASSED] drm_test_connector_hdmi_init_null_vendor
[01:13:18] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[01:13:18] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[01:13:18] [PASSED] drm_test_connector_hdmi_init_product_valid
[01:13:18] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[01:13:18] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[01:13:18] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[01:13:18] ========= drm_test_connector_hdmi_init_type_valid =========
[01:13:18] [PASSED] HDMI-A
[01:13:18] [PASSED] HDMI-B
[01:13:18] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[01:13:18] ======== drm_test_connector_hdmi_init_type_invalid ========
[01:13:18] [PASSED] Unknown
[01:13:18] [PASSED] VGA
[01:13:18] [PASSED] DVI-I
[01:13:18] [PASSED] DVI-D
[01:13:18] [PASSED] DVI-A
[01:13:18] [PASSED] Composite
[01:13:18] [PASSED] SVIDEO
[01:13:18] [PASSED] LVDS
[01:13:18] [PASSED] Component
[01:13:18] [PASSED] DIN
[01:13:18] [PASSED] DP
[01:13:18] [PASSED] TV
[01:13:18] [PASSED] eDP
[01:13:18] [PASSED] Virtual
[01:13:18] [PASSED] DSI
[01:13:18] [PASSED] DPI
[01:13:18] [PASSED] Writeback
[01:13:18] [PASSED] SPI
[01:13:18] [PASSED] USB
[01:13:18] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[01:13:18] ============ [PASSED] drmm_connector_hdmi_init =============
[01:13:18] ============= drmm_connector_init (3 subtests) =============
[01:13:18] [PASSED] drm_test_drmm_connector_init
[01:13:18] [PASSED] drm_test_drmm_connector_init_null_ddc
[01:13:18] ========= drm_test_drmm_connector_init_type_valid =========
[01:13:18] [PASSED] Unknown
[01:13:18] [PASSED] VGA
[01:13:18] [PASSED] DVI-I
[01:13:18] [PASSED] DVI-D
[01:13:18] [PASSED] DVI-A
[01:13:18] [PASSED] Composite
[01:13:18] [PASSED] SVIDEO
[01:13:18] [PASSED] LVDS
[01:13:18] [PASSED] Component
[01:13:18] [PASSED] DIN
[01:13:18] [PASSED] DP
[01:13:18] [PASSED] HDMI-A
[01:13:18] [PASSED] HDMI-B
[01:13:18] [PASSED] TV
[01:13:18] [PASSED] eDP
[01:13:18] [PASSED] Virtual
[01:13:18] [PASSED] DSI
[01:13:18] [PASSED] DPI
[01:13:18] [PASSED] Writeback
[01:13:18] [PASSED] SPI
[01:13:18] [PASSED] USB
[01:13:18] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[01:13:18] =============== [PASSED] drmm_connector_init ===============
[01:13:18] ========= drm_connector_dynamic_init (6 subtests) ==========
[01:13:18] [PASSED] drm_test_drm_connector_dynamic_init
[01:13:18] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[01:13:18] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[01:13:18] [PASSED] drm_test_drm_connector_dynamic_init_properties
[01:13:18] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[01:13:18] [PASSED] Unknown
[01:13:18] [PASSED] VGA
[01:13:18] [PASSED] DVI-I
[01:13:18] [PASSED] DVI-D
[01:13:18] [PASSED] DVI-A
[01:13:18] [PASSED] Composite
[01:13:18] [PASSED] SVIDEO
[01:13:18] [PASSED] LVDS
[01:13:18] [PASSED] Component
[01:13:18] [PASSED] DIN
[01:13:18] [PASSED] DP
[01:13:18] [PASSED] HDMI-A
[01:13:18] [PASSED] HDMI-B
[01:13:18] [PASSED] TV
[01:13:18] [PASSED] eDP
[01:13:18] [PASSED] Virtual
[01:13:18] [PASSED] DSI
[01:13:18] [PASSED] DPI
[01:13:18] [PASSED] Writeback
[01:13:18] [PASSED] SPI
[01:13:18] [PASSED] USB
[01:13:18] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[01:13:18] ======== drm_test_drm_connector_dynamic_init_name =========
[01:13:18] [PASSED] Unknown
[01:13:18] [PASSED] VGA
[01:13:18] [PASSED] DVI-I
[01:13:18] [PASSED] DVI-D
[01:13:18] [PASSED] DVI-A
[01:13:18] [PASSED] Composite
[01:13:18] [PASSED] SVIDEO
[01:13:18] [PASSED] LVDS
[01:13:18] [PASSED] Component
[01:13:18] [PASSED] DIN
[01:13:18] [PASSED] DP
[01:13:18] [PASSED] HDMI-A
[01:13:18] [PASSED] HDMI-B
[01:13:18] [PASSED] TV
[01:13:18] [PASSED] eDP
[01:13:18] [PASSED] Virtual
[01:13:18] [PASSED] DSI
[01:13:18] [PASSED] DPI
[01:13:18] [PASSED] Writeback
[01:13:18] [PASSED] SPI
[01:13:18] [PASSED] USB
[01:13:18] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[01:13:18] =========== [PASSED] drm_connector_dynamic_init ============
[01:13:18] ==== drm_connector_dynamic_register_early (4 subtests) =====
[01:13:18] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[01:13:18] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[01:13:18] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[01:13:18] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[01:13:18] ====== [PASSED] drm_connector_dynamic_register_early =======
[01:13:18] ======= drm_connector_dynamic_register (7 subtests) ========
[01:13:18] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[01:13:18] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[01:13:18] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[01:13:18] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[01:13:18] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[01:13:18] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[01:13:18] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[01:13:18] ========= [PASSED] drm_connector_dynamic_register ==========
[01:13:18] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[01:13:18] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[01:13:18] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[01:13:18] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[01:13:18] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[01:13:18] ========== drm_test_get_tv_mode_from_name_valid ===========
[01:13:18] [PASSED] NTSC
[01:13:18] [PASSED] NTSC-443
[01:13:18] [PASSED] NTSC-J
[01:13:18] [PASSED] PAL
[01:13:18] [PASSED] PAL-M
[01:13:18] [PASSED] PAL-N
[01:13:18] [PASSED] SECAM
[01:13:18] [PASSED] Mono
[01:13:18] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[01:13:18] [PASSED] drm_test_get_tv_mode_from_name_truncated
[01:13:18] ============ [PASSED] drm_get_tv_mode_from_name ============
[01:13:18] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[01:13:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[01:13:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[01:13:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[01:13:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[01:13:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[01:13:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[01:13:18] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[01:13:18] [PASSED] VIC 96
[01:13:18] [PASSED] VIC 97
[01:13:18] [PASSED] VIC 101
[01:13:18] [PASSED] VIC 102
[01:13:18] [PASSED] VIC 106
[01:13:18] [PASSED] VIC 107
[01:13:18] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[01:13:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[01:13:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[01:13:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[01:13:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[01:13:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[01:13:18] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[01:13:18] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[01:13:18] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[01:13:18] [PASSED] Automatic
[01:13:18] [PASSED] Full
[01:13:18] [PASSED] Limited 16:235
[01:13:18] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[01:13:18] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[01:13:18] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[01:13:18] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[01:13:18] === drm_test_drm_hdmi_connector_get_output_format_name ====
[01:13:18] [PASSED] RGB
[01:13:18] [PASSED] YUV 4:2:0
[01:13:18] [PASSED] YUV 4:2:2
[01:13:18] [PASSED] YUV 4:4:4
[01:13:18] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[01:13:18] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[01:13:18] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[01:13:18] ============= drm_damage_helper (21 subtests) ==============
[01:13:18] [PASSED] drm_test_damage_iter_no_damage
[01:13:18] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[01:13:18] [PASSED] drm_test_damage_iter_no_damage_src_moved
[01:13:18] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[01:13:18] [PASSED] drm_test_damage_iter_no_damage_not_visible
[01:13:18] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[01:13:18] [PASSED] drm_test_damage_iter_no_damage_no_fb
[01:13:18] [PASSED] drm_test_damage_iter_simple_damage
[01:13:18] [PASSED] drm_test_damage_iter_single_damage
[01:13:18] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[01:13:18] [PASSED] drm_test_damage_iter_single_damage_outside_src
[01:13:18] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[01:13:18] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[01:13:18] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[01:13:18] [PASSED] drm_test_damage_iter_single_damage_src_moved
[01:13:18] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[01:13:18] [PASSED] drm_test_damage_iter_damage
[01:13:18] [PASSED] drm_test_damage_iter_damage_one_intersect
[01:13:18] [PASSED] drm_test_damage_iter_damage_one_outside
[01:13:18] [PASSED] drm_test_damage_iter_damage_src_moved
[01:13:18] [PASSED] drm_test_damage_iter_damage_not_visible
[01:13:18] ================ [PASSED] drm_damage_helper ================
[01:13:18] ============== drm_dp_mst_helper (3 subtests) ==============
[01:13:18] ============== drm_test_dp_mst_calc_pbn_mode ==============
[01:13:18] [PASSED] Clock 154000 BPP 30 DSC disabled
[01:13:18] [PASSED] Clock 234000 BPP 30 DSC disabled
[01:13:18] [PASSED] Clock 297000 BPP 24 DSC disabled
[01:13:18] [PASSED] Clock 332880 BPP 24 DSC enabled
[01:13:18] [PASSED] Clock 324540 BPP 24 DSC enabled
[01:13:18] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[01:13:18] ============== drm_test_dp_mst_calc_pbn_div ===============
[01:13:18] [PASSED] Link rate 2000000 lane count 4
[01:13:18] [PASSED] Link rate 2000000 lane count 2
[01:13:18] [PASSED] Link rate 2000000 lane count 1
[01:13:18] [PASSED] Link rate 1350000 lane count 4
[01:13:18] [PASSED] Link rate 1350000 lane count 2
[01:13:18] [PASSED] Link rate 1350000 lane count 1
[01:13:18] [PASSED] Link rate 1000000 lane count 4
[01:13:18] [PASSED] Link rate 1000000 lane count 2
[01:13:18] [PASSED] Link rate 1000000 lane count 1
[01:13:18] [PASSED] Link rate 810000 lane count 4
[01:13:18] [PASSED] Link rate 810000 lane count 2
[01:13:18] [PASSED] Link rate 810000 lane count 1
[01:13:18] [PASSED] Link rate 540000 lane count 4
[01:13:18] [PASSED] Link rate 540000 lane count 2
[01:13:18] [PASSED] Link rate 540000 lane count 1
[01:13:18] [PASSED] Link rate 270000 lane count 4
[01:13:18] [PASSED] Link rate 270000 lane count 2
[01:13:18] [PASSED] Link rate 270000 lane count 1
[01:13:18] [PASSED] Link rate 162000 lane count 4
[01:13:18] [PASSED] Link rate 162000 lane count 2
[01:13:18] [PASSED] Link rate 162000 lane count 1
[01:13:18] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[01:13:18] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[01:13:18] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[01:13:18] [PASSED] DP_POWER_UP_PHY with port number
[01:13:18] [PASSED] DP_POWER_DOWN_PHY with port number
[01:13:18] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[01:13:18] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[01:13:18] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[01:13:18] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[01:13:18] [PASSED] DP_QUERY_PAYLOAD with port number
[01:13:18] [PASSED] DP_QUERY_PAYLOAD with VCPI
[01:13:18] [PASSED] DP_REMOTE_DPCD_READ with port number
[01:13:18] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[01:13:18] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[01:13:18] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[01:13:18] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[01:13:18] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[01:13:18] [PASSED] DP_REMOTE_I2C_READ with port number
[01:13:18] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[01:13:18] [PASSED] DP_REMOTE_I2C_READ with transactions array
[01:13:18] [PASSED] DP_REMOTE_I2C_WRITE with port number
[01:13:18] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[01:13:18] [PASSED] DP_REMOTE_I2C_WRITE with data array
[01:13:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[01:13:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[01:13:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[01:13:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[01:13:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[01:13:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[01:13:18] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[01:13:18] ================ [PASSED] drm_dp_mst_helper ================
[01:13:18] ================== drm_exec (7 subtests) ===================
[01:13:18] [PASSED] sanitycheck
[01:13:18] [PASSED] test_lock
[01:13:18] [PASSED] test_lock_unlock
[01:13:18] [PASSED] test_duplicates
[01:13:18] [PASSED] test_prepare
[01:13:18] [PASSED] test_prepare_array
[01:13:18] [PASSED] test_multiple_loops
[01:13:18] ==================== [PASSED] drm_exec =====================
[01:13:18] =========== drm_format_helper_test (17 subtests) ===========
[01:13:18] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[01:13:18] [PASSED] single_pixel_source_buffer
[01:13:18] [PASSED] single_pixel_clip_rectangle
[01:13:18] [PASSED] well_known_colors
[01:13:18] [PASSED] destination_pitch
[01:13:18] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[01:13:18] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[01:13:18] [PASSED] single_pixel_source_buffer
[01:13:18] [PASSED] single_pixel_clip_rectangle
[01:13:18] [PASSED] well_known_colors
[01:13:18] [PASSED] destination_pitch
[01:13:18] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[01:13:18] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[01:13:18] [PASSED] single_pixel_source_buffer
[01:13:18] [PASSED] single_pixel_clip_rectangle
[01:13:18] [PASSED] well_known_colors
[01:13:18] [PASSED] destination_pitch
[01:13:18] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[01:13:18] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[01:13:18] [PASSED] single_pixel_source_buffer
[01:13:18] [PASSED] single_pixel_clip_rectangle
[01:13:18] [PASSED] well_known_colors
[01:13:18] [PASSED] destination_pitch
[01:13:18] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[01:13:18] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[01:13:18] [PASSED] single_pixel_source_buffer
[01:13:18] [PASSED] single_pixel_clip_rectangle
[01:13:18] [PASSED] well_known_colors
[01:13:18] [PASSED] destination_pitch
[01:13:18] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[01:13:18] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[01:13:18] [PASSED] single_pixel_source_buffer
[01:13:18] [PASSED] single_pixel_clip_rectangle
[01:13:18] [PASSED] well_known_colors
[01:13:18] [PASSED] destination_pitch
[01:13:18] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[01:13:18] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[01:13:18] [PASSED] single_pixel_source_buffer
[01:13:18] [PASSED] single_pixel_clip_rectangle
[01:13:18] [PASSED] well_known_colors
[01:13:18] [PASSED] destination_pitch
[01:13:18] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[01:13:18] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[01:13:18] [PASSED] single_pixel_source_buffer
[01:13:18] [PASSED] single_pixel_clip_rectangle
[01:13:18] [PASSED] well_known_colors
[01:13:18] [PASSED] destination_pitch
[01:13:18] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[01:13:18] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[01:13:18] [PASSED] single_pixel_source_buffer
[01:13:18] [PASSED] single_pixel_clip_rectangle
[01:13:18] [PASSED] well_known_colors
[01:13:18] [PASSED] destination_pitch
[01:13:18] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[01:13:18] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[01:13:18] [PASSED] single_pixel_source_buffer
[01:13:18] [PASSED] single_pixel_clip_rectangle
[01:13:18] [PASSED] well_known_colors
[01:13:18] [PASSED] destination_pitch
[01:13:18] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[01:13:18] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[01:13:18] [PASSED] single_pixel_source_buffer
[01:13:18] [PASSED] single_pixel_clip_rectangle
[01:13:18] [PASSED] well_known_colors
[01:13:18] [PASSED] destination_pitch
[01:13:18] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[01:13:18] ============== drm_test_fb_xrgb8888_to_mono ===============
[01:13:18] [PASSED] single_pixel_source_buffer
[01:13:18] [PASSED] single_pixel_clip_rectangle
[01:13:18] [PASSED] well_known_colors
[01:13:18] [PASSED] destination_pitch
[01:13:18] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[01:13:18] ==================== drm_test_fb_swab =====================
[01:13:18] [PASSED] single_pixel_source_buffer
[01:13:18] [PASSED] single_pixel_clip_rectangle
[01:13:18] [PASSED] well_known_colors
[01:13:18] [PASSED] destination_pitch
[01:13:18] ================ [PASSED] drm_test_fb_swab =================
[01:13:18] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[01:13:18] [PASSED] single_pixel_source_buffer
[01:13:18] [PASSED] single_pixel_clip_rectangle
[01:13:18] [PASSED] well_known_colors
[01:13:18] [PASSED] destination_pitch
[01:13:18] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[01:13:18] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[01:13:18] [PASSED] single_pixel_source_buffer
[01:13:18] [PASSED] single_pixel_clip_rectangle
[01:13:18] [PASSED] well_known_colors
[01:13:18] [PASSED] destination_pitch
[01:13:18] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[01:13:18] ================= drm_test_fb_clip_offset =================
[01:13:18] [PASSED] pass through
[01:13:18] [PASSED] horizontal offset
[01:13:18] [PASSED] vertical offset
[01:13:18] [PASSED] horizontal and vertical offset
[01:13:18] [PASSED] horizontal offset (custom pitch)
[01:13:18] [PASSED] vertical offset (custom pitch)
[01:13:18] [PASSED] horizontal and vertical offset (custom pitch)
[01:13:18] ============= [PASSED] drm_test_fb_clip_offset =============
[01:13:18] =================== drm_test_fb_memcpy ====================
[01:13:18] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[01:13:18] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[01:13:18] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[01:13:18] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[01:13:18] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[01:13:18] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[01:13:18] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[01:13:18] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[01:13:18] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[01:13:18] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[01:13:18] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[01:13:18] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[01:13:18] =============== [PASSED] drm_test_fb_memcpy ================
[01:13:18] ============= [PASSED] drm_format_helper_test ==============
[01:13:18] ================= drm_format (18 subtests) =================
[01:13:18] [PASSED] drm_test_format_block_width_invalid
[01:13:18] [PASSED] drm_test_format_block_width_one_plane
[01:13:18] [PASSED] drm_test_format_block_width_two_plane
[01:13:18] [PASSED] drm_test_format_block_width_three_plane
[01:13:18] [PASSED] drm_test_format_block_width_tiled
[01:13:18] [PASSED] drm_test_format_block_height_invalid
[01:13:18] [PASSED] drm_test_format_block_height_one_plane
[01:13:18] [PASSED] drm_test_format_block_height_two_plane
[01:13:18] [PASSED] drm_test_format_block_height_three_plane
[01:13:18] [PASSED] drm_test_format_block_height_tiled
[01:13:18] [PASSED] drm_test_format_min_pitch_invalid
[01:13:18] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[01:13:18] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[01:13:18] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[01:13:18] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[01:13:18] [PASSED] drm_test_format_min_pitch_two_plane
[01:13:18] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[01:13:18] [PASSED] drm_test_format_min_pitch_tiled
[01:13:18] =================== [PASSED] drm_format ====================
[01:13:18] ============== drm_framebuffer (10 subtests) ===============
[01:13:18] ========== drm_test_framebuffer_check_src_coords ==========
[01:13:18] [PASSED] Success: source fits into fb
[01:13:18] [PASSED] Fail: overflowing fb with x-axis coordinate
[01:13:18] [PASSED] Fail: overflowing fb with y-axis coordinate
[01:13:18] [PASSED] Fail: overflowing fb with source width
[01:13:18] [PASSED] Fail: overflowing fb with source height
[01:13:18] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[01:13:18] [PASSED] drm_test_framebuffer_cleanup
[01:13:18] =============== drm_test_framebuffer_create ===============
[01:13:18] [PASSED] ABGR8888 normal sizes
[01:13:18] [PASSED] ABGR8888 max sizes
[01:13:18] [PASSED] ABGR8888 pitch greater than min required
[01:13:18] [PASSED] ABGR8888 pitch less than min required
[01:13:18] [PASSED] ABGR8888 Invalid width
[01:13:18] [PASSED] ABGR8888 Invalid buffer handle
[01:13:18] [PASSED] No pixel format
[01:13:18] [PASSED] ABGR8888 Width 0
[01:13:18] [PASSED] ABGR8888 Height 0
[01:13:18] [PASSED] ABGR8888 Out of bound height * pitch combination
[01:13:18] [PASSED] ABGR8888 Large buffer offset
[01:13:18] [PASSED] ABGR8888 Buffer offset for inexistent plane
[01:13:18] [PASSED] ABGR8888 Invalid flag
[01:13:18] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[01:13:18] [PASSED] ABGR8888 Valid buffer modifier
[01:13:18] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[01:13:18] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[01:13:18] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[01:13:18] [PASSED] NV12 Normal sizes
[01:13:18] [PASSED] NV12 Max sizes
[01:13:18] [PASSED] NV12 Invalid pitch
[01:13:18] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[01:13:18] [PASSED] NV12 different modifier per-plane
[01:13:18] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[01:13:18] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[01:13:18] [PASSED] NV12 Modifier for inexistent plane
[01:13:18] [PASSED] NV12 Handle for inexistent plane
[01:13:18] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[01:13:18] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[01:13:18] [PASSED] YVU420 Normal sizes
[01:13:18] [PASSED] YVU420 Max sizes
[01:13:18] [PASSED] YVU420 Invalid pitch
[01:13:18] [PASSED] YVU420 Different pitches
[01:13:18] [PASSED] YVU420 Different buffer offsets/pitches
[01:13:18] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[01:13:18] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[01:13:18] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[01:13:18] [PASSED] YVU420 Valid modifier
[01:13:18] [PASSED] YVU420 Different modifiers per plane
[01:13:18] [PASSED] YVU420 Modifier for inexistent plane
[01:13:18] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[01:13:18] [PASSED] X0L2 Normal sizes
[01:13:18] [PASSED] X0L2 Max sizes
[01:13:18] [PASSED] X0L2 Invalid pitch
[01:13:18] [PASSED] X0L2 Pitch greater than minimum required
[01:13:18] [PASSED] X0L2 Handle for inexistent plane
[01:13:18] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[01:13:18] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[01:13:18] [PASSED] X0L2 Valid modifier
[01:13:18] [PASSED] X0L2 Modifier for inexistent plane
[01:13:18] =========== [PASSED] drm_test_framebuffer_create ===========
[01:13:18] [PASSED] drm_test_framebuffer_free
[01:13:18] [PASSED] drm_test_framebuffer_init
[01:13:18] [PASSED] drm_test_framebuffer_init_bad_format
[01:13:18] [PASSED] drm_test_framebuffer_init_dev_mismatch
[01:13:18] [PASSED] drm_test_framebuffer_lookup
[01:13:18] [PASSED] drm_test_framebuffer_lookup_inexistent
[01:13:18] [PASSED] drm_test_framebuffer_modifiers_not_supported
[01:13:18] ================= [PASSED] drm_framebuffer =================
[01:13:18] ================ drm_gem_shmem (8 subtests) ================
[01:13:18] [PASSED] drm_gem_shmem_test_obj_create
[01:13:18] [PASSED] drm_gem_shmem_test_obj_create_private
[01:13:18] [PASSED] drm_gem_shmem_test_pin_pages
[01:13:18] [PASSED] drm_gem_shmem_test_vmap
[01:13:18] [PASSED] drm_gem_shmem_test_get_sg_table
[01:13:18] [PASSED] drm_gem_shmem_test_get_pages_sgt
[01:13:18] [PASSED] drm_gem_shmem_test_madvise
[01:13:18] [PASSED] drm_gem_shmem_test_purge
[01:13:18] ================== [PASSED] drm_gem_shmem ==================
[01:13:18] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[01:13:18] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[01:13:18] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[01:13:18] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[01:13:18] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[01:13:18] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[01:13:18] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[01:13:18] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[01:13:18] [PASSED] Automatic
[01:13:18] [PASSED] Full
[01:13:18] [PASSED] Limited 16:235
[01:13:18] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[01:13:18] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[01:13:18] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[01:13:18] [PASSED] drm_test_check_disable_connector
[01:13:18] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[01:13:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[01:13:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[01:13:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[01:13:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[01:13:18] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[01:13:18] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[01:13:18] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[01:13:18] [PASSED] drm_test_check_output_bpc_dvi
[01:13:18] [PASSED] drm_test_check_output_bpc_format_vic_1
[01:13:18] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[01:13:18] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[01:13:18] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[01:13:18] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[01:13:18] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[01:13:18] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[01:13:18] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[01:13:18] ============ drm_test_check_hdmi_color_format =============
[01:13:18] [PASSED] AUTO -> RGB
[01:13:18] [PASSED] YCBCR422 -> YUV422
[01:13:18] [PASSED] YCBCR420 -> YUV420
[01:13:18] [PASSED] YCBCR444 -> YUV444
[01:13:18] [PASSED] RGB -> RGB
[01:13:18] ======== [PASSED] drm_test_check_hdmi_color_format =========
[01:13:18] ======== drm_test_check_hdmi_color_format_420_only ========
[01:13:18] [PASSED] RGB should fail
[01:13:18] [PASSED] YUV444 should fail
[01:13:18] [PASSED] YUV422 should fail
[01:13:18] [PASSED] YUV420 should work
[01:13:18] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[01:13:18] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[01:13:18] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[01:13:18] [PASSED] drm_test_check_broadcast_rgb_value
[01:13:18] [PASSED] drm_test_check_bpc_8_value
[01:13:18] [PASSED] drm_test_check_bpc_10_value
[01:13:18] [PASSED] drm_test_check_bpc_12_value
[01:13:18] [PASSED] drm_test_check_format_value
[01:13:18] [PASSED] drm_test_check_tmds_char_value
[01:13:18] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[01:13:18] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[01:13:18] [PASSED] drm_test_check_mode_valid
[01:13:18] [PASSED] drm_test_check_mode_valid_reject
[01:13:18] [PASSED] drm_test_check_mode_valid_reject_rate
[01:13:18] [PASSED] drm_test_check_mode_valid_reject_max_clock
[01:13:18] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[01:13:18] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[01:13:18] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[01:13:18] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[01:13:18] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[01:13:18] [PASSED] drm_test_check_infoframes
[01:13:18] [PASSED] drm_test_check_reject_avi_infoframe
[01:13:18] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[01:13:18] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[01:13:18] [PASSED] drm_test_check_reject_audio_infoframe
[01:13:18] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[01:13:18] ================= drm_managed (2 subtests) =================
[01:13:18] [PASSED] drm_test_managed_release_action
[01:13:18] [PASSED] drm_test_managed_run_action
[01:13:18] =================== [PASSED] drm_managed ===================
[01:13:18] =================== drm_mm (6 subtests) ====================
[01:13:18] [PASSED] drm_test_mm_init
[01:13:18] [PASSED] drm_test_mm_debug
[01:13:18] [PASSED] drm_test_mm_align32
[01:13:18] [PASSED] drm_test_mm_align64
[01:13:18] [PASSED] drm_test_mm_lowest
[01:13:18] [PASSED] drm_test_mm_highest
[01:13:18] ===================== [PASSED] drm_mm ======================
[01:13:18] ============= drm_modes_analog_tv (5 subtests) =============
[01:13:18] [PASSED] drm_test_modes_analog_tv_mono_576i
[01:13:18] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[01:13:18] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[01:13:18] [PASSED] drm_test_modes_analog_tv_pal_576i
[01:13:18] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[01:13:18] =============== [PASSED] drm_modes_analog_tv ===============
[01:13:18] ============== drm_plane_helper (2 subtests) ===============
[01:13:18] =============== drm_test_check_plane_state ================
[01:13:18] [PASSED] clipping_simple
[01:13:18] [PASSED] clipping_rotate_reflect
[01:13:18] [PASSED] positioning_simple
[01:13:18] [PASSED] upscaling
[01:13:18] [PASSED] downscaling
[01:13:18] [PASSED] rounding1
[01:13:18] [PASSED] rounding2
[01:13:18] [PASSED] rounding3
[01:13:18] [PASSED] rounding4
[01:13:18] =========== [PASSED] drm_test_check_plane_state ============
[01:13:18] =========== drm_test_check_invalid_plane_state ============
[01:13:18] [PASSED] positioning_invalid
[01:13:18] [PASSED] upscaling_invalid
[01:13:18] [PASSED] downscaling_invalid
[01:13:18] ======= [PASSED] drm_test_check_invalid_plane_state ========
[01:13:18] ================ [PASSED] drm_plane_helper =================
[01:13:18] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[01:13:18] ====== drm_test_connector_helper_tv_get_modes_check =======
[01:13:18] [PASSED] None
[01:13:18] [PASSED] PAL
[01:13:18] [PASSED] NTSC
[01:13:18] [PASSED] Both, NTSC Default
[01:13:18] [PASSED] Both, PAL Default
[01:13:18] [PASSED] Both, NTSC Default, with PAL on command-line
[01:13:18] [PASSED] Both, PAL Default, with NTSC on command-line
[01:13:18] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[01:13:18] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[01:13:18] ================== drm_rect (9 subtests) ===================
[01:13:18] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[01:13:18] [PASSED] drm_test_rect_clip_scaled_not_clipped
[01:13:18] [PASSED] drm_test_rect_clip_scaled_clipped
[01:13:18] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[01:13:18] ================= drm_test_rect_intersect =================
[01:13:18] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[01:13:18] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[01:13:18] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[01:13:18] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[01:13:18] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[01:13:18] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[01:13:18] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[01:13:18] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[01:13:18] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[01:13:18] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[01:13:18] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[01:13:18] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[01:13:18] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[01:13:18] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[01:13:18] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[01:13:18] ============= [PASSED] drm_test_rect_intersect =============
[01:13:18] ================ drm_test_rect_calc_hscale ================
[01:13:18] [PASSED] normal use
[01:13:18] [PASSED] out of max range
[01:13:18] [PASSED] out of min range
[01:13:18] [PASSED] zero dst
[01:13:18] [PASSED] negative src
[01:13:18] [PASSED] negative dst
[01:13:18] ============ [PASSED] drm_test_rect_calc_hscale ============
[01:13:18] ================ drm_test_rect_calc_vscale ================
[01:13:18] [PASSED] normal use
[01:13:18] [PASSED] out of max range
[01:13:18] [PASSED] out of min range
[01:13:18] [PASSED] zero dst
[01:13:18] [PASSED] negative src
[01:13:18] [PASSED] negative dst
[01:13:18] ============ [PASSED] drm_test_rect_calc_vscale ============
[01:13:18] ================== drm_test_rect_rotate ===================
[01:13:18] [PASSED] reflect-x
[01:13:18] [PASSED] reflect-y
[01:13:18] [PASSED] rotate-0
[01:13:18] [PASSED] rotate-90
[01:13:18] [PASSED] rotate-180
[01:13:18] [PASSED] rotate-270
[01:13:18] ============== [PASSED] drm_test_rect_rotate ===============
[01:13:18] ================ drm_test_rect_rotate_inv =================
[01:13:18] [PASSED] reflect-x
[01:13:18] [PASSED] reflect-y
[01:13:18] [PASSED] rotate-0
[01:13:18] [PASSED] rotate-90
[01:13:18] [PASSED] rotate-180
[01:13:18] [PASSED] rotate-270
[01:13:18] ============ [PASSED] drm_test_rect_rotate_inv =============
[01:13:18] ==================== [PASSED] drm_rect =====================
[01:13:18] ============ drm_sysfb_modeset_test (1 subtest) ============
[01:13:18] ============ drm_test_sysfb_build_fourcc_list =============
[01:13:18] [PASSED] no native formats
[01:13:18] [PASSED] XRGB8888 as native format
[01:13:18] [PASSED] remove duplicates
[01:13:18] [PASSED] convert alpha formats
[01:13:18] [PASSED] random formats
[01:13:18] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[01:13:18] ============= [PASSED] drm_sysfb_modeset_test ==============
[01:13:18] ================== drm_fixp (2 subtests) ===================
[01:13:18] [PASSED] drm_test_int2fixp
[01:13:18] [PASSED] drm_test_sm2fixp
[01:13:18] ==================== [PASSED] drm_fixp =====================
[01:13:18] ============================================================
[01:13:18] Testing complete. Ran 639 tests: passed: 639
[01:13:18] Elapsed time: 26.601s total, 1.790s configuring, 24.544s building, 0.213s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[01:13:18] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[01:13:20] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[01:13:30] Starting KUnit Kernel (1/1)...
[01:13:30] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[01:13:30] ================= ttm_device (5 subtests) ==================
[01:13:30] [PASSED] ttm_device_init_basic
[01:13:30] [PASSED] ttm_device_init_multiple
[01:13:30] [PASSED] ttm_device_fini_basic
[01:13:30] [PASSED] ttm_device_init_no_vma_man
[01:13:30] ================== ttm_device_init_pools ==================
[01:13:30] [PASSED] No DMA allocations, no DMA32 required
[01:13:30] [PASSED] DMA allocations, DMA32 required
[01:13:30] [PASSED] No DMA allocations, DMA32 required
[01:13:30] [PASSED] DMA allocations, no DMA32 required
[01:13:30] ============== [PASSED] ttm_device_init_pools ==============
[01:13:30] =================== [PASSED] ttm_device ====================
[01:13:30] ================== ttm_pool (8 subtests) ===================
[01:13:30] ================== ttm_pool_alloc_basic ===================
[01:13:30] [PASSED] One page
[01:13:30] [PASSED] More than one page
[01:13:30] [PASSED] Above the allocation limit
[01:13:30] [PASSED] One page, with coherent DMA mappings enabled
[01:13:30] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[01:13:30] ============== [PASSED] ttm_pool_alloc_basic ===============
[01:13:30] ============== ttm_pool_alloc_basic_dma_addr ==============
[01:13:30] [PASSED] One page
[01:13:30] [PASSED] More than one page
[01:13:30] [PASSED] Above the allocation limit
[01:13:30] [PASSED] One page, with coherent DMA mappings enabled
[01:13:30] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[01:13:30] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[01:13:30] [PASSED] ttm_pool_alloc_order_caching_match
[01:13:30] [PASSED] ttm_pool_alloc_caching_mismatch
[01:13:30] [PASSED] ttm_pool_alloc_order_mismatch
[01:13:30] [PASSED] ttm_pool_free_dma_alloc
[01:13:30] [PASSED] ttm_pool_free_no_dma_alloc
[01:13:30] [PASSED] ttm_pool_fini_basic
[01:13:30] ==================== [PASSED] ttm_pool =====================
[01:13:30] ================ ttm_resource (8 subtests) =================
[01:13:30] ================= ttm_resource_init_basic =================
[01:13:30] [PASSED] Init resource in TTM_PL_SYSTEM
[01:13:30] [PASSED] Init resource in TTM_PL_VRAM
[01:13:30] [PASSED] Init resource in a private placement
[01:13:30] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[01:13:30] ============= [PASSED] ttm_resource_init_basic =============
[01:13:30] [PASSED] ttm_resource_init_pinned
[01:13:30] [PASSED] ttm_resource_fini_basic
[01:13:30] [PASSED] ttm_resource_manager_init_basic
[01:13:30] [PASSED] ttm_resource_manager_usage_basic
[01:13:30] [PASSED] ttm_resource_manager_set_used_basic
[01:13:30] [PASSED] ttm_sys_man_alloc_basic
[01:13:30] [PASSED] ttm_sys_man_free_basic
[01:13:30] ================== [PASSED] ttm_resource ===================
[01:13:30] =================== ttm_tt (15 subtests) ===================
[01:13:30] ==================== ttm_tt_init_basic ====================
[01:13:30] [PASSED] Page-aligned size
[01:13:30] [PASSED] Extra pages requested
[01:13:30] ================ [PASSED] ttm_tt_init_basic ================
[01:13:30] [PASSED] ttm_tt_init_misaligned
[01:13:30] [PASSED] ttm_tt_fini_basic
[01:13:30] [PASSED] ttm_tt_fini_sg
[01:13:30] [PASSED] ttm_tt_fini_shmem
[01:13:30] [PASSED] ttm_tt_create_basic
[01:13:30] [PASSED] ttm_tt_create_invalid_bo_type
[01:13:30] [PASSED] ttm_tt_create_ttm_exists
[01:13:30] [PASSED] ttm_tt_create_failed
[01:13:30] [PASSED] ttm_tt_destroy_basic
[01:13:30] [PASSED] ttm_tt_populate_null_ttm
[01:13:30] [PASSED] ttm_tt_populate_populated_ttm
[01:13:30] [PASSED] ttm_tt_unpopulate_basic
[01:13:30] [PASSED] ttm_tt_unpopulate_empty_ttm
[01:13:30] [PASSED] ttm_tt_swapin_basic
[01:13:30] ===================== [PASSED] ttm_tt ======================
[01:13:30] =================== ttm_bo (14 subtests) ===================
[01:13:30] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[01:13:30] [PASSED] Cannot be interrupted and sleeps
[01:13:30] [PASSED] Cannot be interrupted, locks straight away
[01:13:30] [PASSED] Can be interrupted, sleeps
[01:13:30] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[01:13:30] [PASSED] ttm_bo_reserve_locked_no_sleep
[01:13:30] [PASSED] ttm_bo_reserve_no_wait_ticket
[01:13:31] [PASSED] ttm_bo_reserve_double_resv
[01:13:31] [PASSED] ttm_bo_reserve_interrupted
[01:13:31] [PASSED] ttm_bo_reserve_deadlock
[01:13:31] [PASSED] ttm_bo_unreserve_basic
[01:13:31] [PASSED] ttm_bo_unreserve_pinned
[01:13:31] [PASSED] ttm_bo_unreserve_bulk
[01:13:31] [PASSED] ttm_bo_fini_basic
[01:13:31] [PASSED] ttm_bo_fini_shared_resv
[01:13:31] [PASSED] ttm_bo_pin_basic
[01:13:31] [PASSED] ttm_bo_pin_unpin_resource
[01:13:31] [PASSED] ttm_bo_multiple_pin_one_unpin
[01:13:31] ===================== [PASSED] ttm_bo ======================
[01:13:31] ============== ttm_bo_validate (22 subtests) ===============
[01:13:31] ============== ttm_bo_init_reserved_sys_man ===============
[01:13:31] [PASSED] Buffer object for userspace
[01:13:31] [PASSED] Kernel buffer object
[01:13:31] [PASSED] Shared buffer object
[01:13:31] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[01:13:31] ============== ttm_bo_init_reserved_mock_man ==============
[01:13:31] [PASSED] Buffer object for userspace
[01:13:31] [PASSED] Kernel buffer object
[01:13:31] [PASSED] Shared buffer object
[01:13:31] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[01:13:31] [PASSED] ttm_bo_init_reserved_resv
[01:13:31] ================== ttm_bo_validate_basic ==================
[01:13:31] [PASSED] Buffer object for userspace
[01:13:31] [PASSED] Kernel buffer object
[01:13:31] [PASSED] Shared buffer object
[01:13:31] ============== [PASSED] ttm_bo_validate_basic ==============
[01:13:31] [PASSED] ttm_bo_validate_invalid_placement
[01:13:31] ============= ttm_bo_validate_same_placement ==============
[01:13:31] [PASSED] System manager
[01:13:31] [PASSED] VRAM manager
[01:13:31] ========= [PASSED] ttm_bo_validate_same_placement ==========
[01:13:31] [PASSED] ttm_bo_validate_failed_alloc
[01:13:31] [PASSED] ttm_bo_validate_pinned
[01:13:31] [PASSED] ttm_bo_validate_busy_placement
[01:13:31] ================ ttm_bo_validate_multihop =================
[01:13:31] [PASSED] Buffer object for userspace
[01:13:31] [PASSED] Kernel buffer object
[01:13:31] [PASSED] Shared buffer object
[01:13:31] ============ [PASSED] ttm_bo_validate_multihop =============
[01:13:31] ========== ttm_bo_validate_no_placement_signaled ==========
[01:13:31] [PASSED] Buffer object in system domain, no page vector
[01:13:31] [PASSED] Buffer object in system domain with an existing page vector
[01:13:31] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[01:13:31] ======== ttm_bo_validate_no_placement_not_signaled ========
[01:13:31] [PASSED] Buffer object for userspace
[01:13:31] [PASSED] Kernel buffer object
[01:13:31] [PASSED] Shared buffer object
[01:13:31] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[01:13:31] [PASSED] ttm_bo_validate_move_fence_signaled
[01:13:31] ========= ttm_bo_validate_move_fence_not_signaled =========
[01:13:31] [PASSED] Waits for GPU
[01:13:31] [PASSED] Tries to lock straight away
[01:13:31] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[01:13:31] [PASSED] ttm_bo_validate_swapout
[01:13:31] [PASSED] ttm_bo_validate_happy_evict
[01:13:31] [PASSED] ttm_bo_validate_all_pinned_evict
[01:13:31] [PASSED] ttm_bo_validate_allowed_only_evict
[01:13:31] [PASSED] ttm_bo_validate_deleted_evict
[01:13:31] [PASSED] ttm_bo_validate_busy_domain_evict
[01:13:31] [PASSED] ttm_bo_validate_evict_gutting
[01:13:31] [PASSED] ttm_bo_validate_recrusive_evict
[01:13:31] ================= [PASSED] ttm_bo_validate =================
[01:13:31] ============================================================
[01:13:31] Testing complete. Ran 102 tests: passed: 102
[01:13:31] Elapsed time: 12.355s total, 2.044s configuring, 10.096s building, 0.180s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 34+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe/forcewake: add delayed-release optimization (rev2)
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (4 preceding siblings ...)
2026-06-11 1:13 ` ✓ CI.KUnit: success for drm/xe/forcewake: add delayed-release optimization (rev2) Patchwork
@ 2026-06-11 1:58 ` Patchwork
2026-06-11 3:09 ` [PATCH] drm/xe/forcewake: add delayed-release optimization Matthew Brost
` (13 subsequent siblings)
19 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2026-06-11 1:58 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1544 bytes --]
== Series Details ==
Series: drm/xe/forcewake: add delayed-release optimization (rev2)
URL : https://patchwork.freedesktop.org/series/167697/
State : success
== Summary ==
CI Bug Log - changes from xe-5234-10db0c83b0ccc3211990b54235475abb9d383851_BAT -> xe-pw-167697v2_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (12 -> 12)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-167697v2_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_live_ktest@xe_dma_buf:
- bat-bmg-vm: [PASS][1] -> [ABORT][2] ([Intel XE#8007] / [Intel XE#8023]) +1 other test abort
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5234-10db0c83b0ccc3211990b54235475abb9d383851/bat-bmg-vm/igt@xe_live_ktest@xe_dma_buf.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/bat-bmg-vm/igt@xe_live_ktest@xe_dma_buf.html
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8023]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8023
Build changes
-------------
* Linux: xe-5234-10db0c83b0ccc3211990b54235475abb9d383851 -> xe-pw-167697v2
IGT_8958: 8958
xe-5234-10db0c83b0ccc3211990b54235475abb9d383851: 10db0c83b0ccc3211990b54235475abb9d383851
xe-pw-167697v2: 167697v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/index.html
[-- Attachment #2: Type: text/html, Size: 2102 bytes --]
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH] drm/xe/forcewake: add delayed-release optimization
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (5 preceding siblings ...)
2026-06-11 1:58 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-06-11 3:09 ` Matthew Brost
2026-06-11 3:15 ` Matthew Brost
2026-06-11 11:29 ` ✓ Xe.CI.FULL: success for drm/xe/forcewake: add delayed-release optimization (rev2) Patchwork
` (12 subsequent siblings)
19 siblings, 1 reply; 34+ messages in thread
From: Matthew Brost @ 2026-06-11 3:09 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe, jia.yao
On Mon, Jun 01, 2026 at 09:38:04PM +0000, Zongyao Bai wrote:
> Add delayed-release optimization:
> - Add domain sleep 200us after xe_force_wake_put()
> - Skip MMIO wake in xe_force_wake_get() if domain still awake.
> Reduces frequent wake/sleep cycles for back-to-back operations.
> Examples of scenarios: zeDeviceGetGlobalTimestamps read by VTune, PTI
>
I think this concept makes sense, as MMIO read operations are relatively
expensive in terms of time cost (perhaps ~5 µs). However, the downside
is increased power usage.
Should we make delayed release an optional call—for example,
xe_force_wake_put_delay—and only use it in specific critical paths? For
instance, we could limit its use to paths tied to Level Zero calls like
zeDeviceGetGlobalTimestamps.
This gets a bit tricky if xe_force_wake_put_delay is called and is not
the last reference, followed by xe_force_wake_put being the final
reference. However, it should be straightforward to track that an
delayed put was requested and have the final xe_force_wake_put issue the
delay.
> Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
> ---
> drivers/gpu/drm/xe/xe_force_wake.c | 111 +++++++++++++++++------
> drivers/gpu/drm/xe/xe_force_wake.h | 4 +-
> drivers/gpu/drm/xe/xe_force_wake_types.h | 11 +++
> drivers/gpu/drm/xe/xe_gt.c | 4 +-
> 4 files changed, 99 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
> index 197e2197bd0a..183a17fa6d68 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake.c
> +++ b/drivers/gpu/drm/xe/xe_force_wake.c
> @@ -6,15 +6,20 @@
> #include "xe_force_wake.h"
>
> #include <drm/drm_util.h>
> +#include <linux/device.h>
> +#include <linux/hrtimer.h>
>
> #include "regs/xe_gt_regs.h"
> #include "regs/xe_reg_defs.h"
> +#include "xe_device.h"
> #include "xe_gt.h"
> #include "xe_gt_printk.h"
> #include "xe_mmio.h"
> +#include "xe_pm.h"
> #include "xe_sriov.h"
>
> #define XE_FORCE_WAKE_ACK_TIMEOUT_MS 50
> +#define XE_FORCE_WAKE_HOLD_DELAY_US 200
How did you choose this value? It seems like it should be something
configurable via Kconfig or configfs.
>
> static const char *str_wake_sleep(bool wake)
> {
> @@ -27,6 +32,8 @@ static void mark_domain_initialized(struct xe_force_wake *fw,
> fw->initialized_domains |= BIT(id);
> }
>
> +static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer);
> +
> static void init_domain(struct xe_force_wake *fw,
> enum xe_force_wake_domain_id id,
> struct xe_reg reg, struct xe_reg ack)
> @@ -38,11 +45,29 @@ static void init_domain(struct xe_force_wake *fw,
> domain->reg_ack = ack;
> domain->val = FORCEWAKE_MT(FORCEWAKE_KERNEL);
> domain->mask = FORCEWAKE_MT_MASK(FORCEWAKE_KERNEL);
> + domain->fw_back = fw;
> + hrtimer_setup(&domain->timer, xe_force_wake_domain_timer,
> + CLOCK_MONOTONIC, HRTIMER_MODE_REL);
>
> mark_domain_initialized(fw, id);
> }
>
> -void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
> +static void xe_force_wake_fini(void *arg)
> +{
> + struct xe_force_wake *fw = arg;
> + struct xe_gt *gt = fw->gt;
> + struct xe_force_wake_domain *domain;
> + unsigned int tmp;
> +
> + for_each_fw_domain(domain, fw, tmp) {
> + xe_gt_WARN(gt, domain->ref,
> + "Forcewake domain %d still referenced (%u) at teardown\n",
> + domain->id, domain->ref);
Is the warning above actually valid? It seems fairly normal for a fini
to race with a delayed fw put. I would drop this.
> + hrtimer_cancel(&domain->timer);
> + }
> +}
> +
> +int xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
> {
> struct xe_device *xe = gt_to_xe(gt);
>
> @@ -58,6 +83,8 @@ void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
> FORCEWAKE_GT,
> FORCEWAKE_ACK_GT);
> }
> +
> + return devm_add_action_or_reset(xe->drm.dev, xe_force_wake_fini, fw);
> }
>
> void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw)
> @@ -142,10 +169,36 @@ static void domain_sleep(struct xe_gt *gt, struct xe_force_wake_domain *domain)
> __domain_ctl(gt, domain, false);
> }
>
> -static int domain_sleep_wait(struct xe_gt *gt,
> - struct xe_force_wake_domain *domain)
> +static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer)
> {
> - return __domain_wait(gt, domain, false);
> + struct xe_force_wake_domain *domain =
> + container_of(timer, struct xe_force_wake_domain, timer);
> + struct xe_force_wake *fw = domain->fw_back;
> + struct xe_gt *gt = fw->gt;
> + unsigned long flags;
> +
> + xe_gt_assert(gt, !xe_pm_runtime_suspended(gt_to_xe(gt)));
> +
> + spin_lock_irqsave(&fw->lock, flags);
I'd use guard(spinlock_irqsave) here rather manually unlock this.
hrtimer_forward_now should be safe under fw->lock unless I'm missing
something.
> +
> + if (!(fw->timer_domains & BIT(domain->id)) || domain->ref) {
> + spin_unlock_irqrestore(&fw->lock, flags);
> + return HRTIMER_NORESTART;
> + }
> + if (domain->timer_rearm) {
> + domain->timer_rearm = false;
> + spin_unlock_irqrestore(&fw->lock, flags);
> + hrtimer_forward_now(timer,
> + ns_to_ktime(XE_FORCE_WAKE_HOLD_DELAY_US *
> + NSEC_PER_USEC));
> + return HRTIMER_RESTART;
> + }
> + fw->timer_domains &= ~BIT(domain->id);
> + domain_sleep(gt, domain);
> + fw->awake_domains &= ~BIT(domain->id);
> + spin_unlock_irqrestore(&fw->lock, flags);
> +
> + return HRTIMER_NORESTART;
> }
>
> /**
> @@ -187,8 +240,13 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
> spin_lock_irqsave(&fw->lock, flags);
> for_each_fw_domain_masked(domain, ref_rqst, fw, tmp) {
> if (!domain->ref++) {
> - awake_rqst |= BIT(domain->id);
> - domain_wake(gt, domain);
> + if (fw->awake_domains & BIT(domain->id)) {
> + fw->timer_domains &= ~BIT(domain->id);
> + hrtimer_try_to_cancel(&domain->timer);
> + } else {
> + awake_rqst |= BIT(domain->id);
> + domain_wake(gt, domain);
> + }
> }
> ref_incr |= BIT(domain->id);
> }
> @@ -213,27 +271,25 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
> }
>
> /**
> - * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
> + * xe_force_wake_put - Decrement the refcount and arm the delayed-sleep timer
> * @fw: Pointer to the force wake structure
> * @fw_ref: return of xe_force_wake_get()
> *
> - * This function reduces the reference counts for domains in fw_ref. If
> - * refcount for any of the specified domain reaches 0, it puts the domain to sleep
> - * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
> - * Warns in case of timeout of ack from domain.
> + * This function reduces the reference counts for domains in fw_ref. When a
> + * domain's refcount reaches 0 the sleep request is not issued immediately;
> + * instead a hrtimer is armed for XE_FORCE_WAKE_HOLD_DELAY_US so that a rapid
> + * xe_force_wake_get() can reuse the still-awake domain at zero MMIO cost. On
> + * timer expiry, if the domain is still idle, the sleep request is written.
> + * Mirroring i915's fw_domains_put(), the deferred sleep is fire-and-forget:
> + * no sleep ACK is polled, since the next wake re-waits for the wake ACK.
Let's not mention the i915 in Xe code.
> */
> void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
> {
> struct xe_gt *gt = fw->gt;
> struct xe_force_wake_domain *domain;
> - unsigned int tmp, sleep = 0;
> + unsigned int tmp;
> unsigned long flags;
> - int ack_fail = 0;
>
> - /*
> - * Avoid unnecessary lock and unlock when the function is called
> - * in error path of individual domains.
> - */
Why delete this comment?
> if (!fw_ref)
> return;
>
> @@ -245,20 +301,19 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
> xe_gt_assert(gt, domain->ref);
>
> if (!--domain->ref) {
> - sleep |= BIT(domain->id);
> - domain_sleep(gt, domain);
> + fw->timer_domains |= BIT(domain->id);
> + if (hrtimer_callback_running(&domain->timer)) {
> + domain->timer_rearm = true;
> + } else {
> + domain->timer_rearm = false;
> + hrtimer_start(&domain->timer,
> + ns_to_ktime(XE_FORCE_WAKE_HOLD_DELAY_US *
> + NSEC_PER_USEC),
> + HRTIMER_MODE_REL);
> + }
> }
> }
> - for_each_fw_domain_masked(domain, sleep, fw, tmp) {
> - if (domain_sleep_wait(gt, domain) == 0)
> - fw->awake_domains &= ~BIT(domain->id);
> - else
> - ack_fail |= BIT(domain->id);
> - }
> spin_unlock_irqrestore(&fw->lock, flags);
> -
> - xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
> - str_plural(hweight_long(ack_fail)), ack_fail);
This deleted code for domain_sleep_wait / error probably needs to be in
xe_force_wake_domain_timer.
> }
>
> const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
> diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
> index e2721f205d6c..19679b923dca 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake.h
> +++ b/drivers/gpu/drm/xe/xe_force_wake.h
> @@ -11,8 +11,8 @@
>
> struct xe_gt;
>
> -void xe_force_wake_init_gt(struct xe_gt *gt,
> - struct xe_force_wake *fw);
> +int xe_force_wake_init_gt(struct xe_gt *gt,
> + struct xe_force_wake *fw);
> void xe_force_wake_init_engines(struct xe_gt *gt,
> struct xe_force_wake *fw);
> unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
> diff --git a/drivers/gpu/drm/xe/xe_force_wake_types.h b/drivers/gpu/drm/xe/xe_force_wake_types.h
> index 14b7b86e801b..ee5675069fe0 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake_types.h
> +++ b/drivers/gpu/drm/xe/xe_force_wake_types.h
> @@ -6,6 +6,7 @@
> #ifndef _XE_FORCE_WAKE_TYPES_H_
> #define _XE_FORCE_WAKE_TYPES_H_
>
> +#include <linux/hrtimer.h>
> #include <linux/mutex.h>
> #include <linux/types.h>
>
> @@ -51,6 +52,8 @@ enum xe_force_wake_domains {
> XE_FORCEWAKE_ALL = BIT(XE_FW_DOMAIN_ID_COUNT)
> };
>
> +struct xe_force_wake;
> +
> /**
> * struct xe_force_wake_domain - Xe force wake power domain
> *
> @@ -82,6 +85,12 @@ struct xe_force_wake_domain {
> u32 mask;
> /** @ref: domain reference */
> u32 ref;
> + /** @timer_rearm: put() ran while callback was in-flight; callback must restart timer */
Protected fw_back->lock.
> + bool timer_rearm;
In general, I’d reorganize the layout so that structs are at the top of
xe_force_wake_domain, followed by u32 fields, and finally the bool
fields.
> + /** @timer: hrtimer for delayed sleep request */
> + struct hrtimer timer;
> + /** @fw_back: back pointer to parent xe_force_wake */
> + struct xe_force_wake *fw_back;
> };
>
> /**
> @@ -101,6 +110,8 @@ struct xe_force_wake {
> spinlock_t lock;
> /** @awake_domains: mask of all domains awake */
> unsigned int awake_domains;
> + /** @timer_domains: mask of domains with an outstanding delayed-sleep timer */
> + unsigned int timer_domains;
> /** @initialized_domains: mask of all initialized domains */
> unsigned int initialized_domains;
> /** @domains: force wake domains */
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index 783eb6d631b5..43a79698cd04 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -511,7 +511,9 @@ int xe_gt_init_early(struct xe_gt *gt)
>
> xe_wa_process_gt_oob(gt);
>
> - xe_force_wake_init_gt(gt, gt_to_fw(gt));
> + err = xe_force_wake_init_gt(gt, gt_to_fw(gt));
> + if (err)
> + return err;
I'd add newline here.
Matt
> spin_lock_init(>->global_invl_lock);
>
> err = xe_gt_tlb_inval_init_early(gt);
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH] drm/xe/forcewake: add delayed-release optimization
2026-06-11 3:09 ` [PATCH] drm/xe/forcewake: add delayed-release optimization Matthew Brost
@ 2026-06-11 3:15 ` Matthew Brost
2026-06-25 1:37 ` Bai, Zongyao
0 siblings, 1 reply; 34+ messages in thread
From: Matthew Brost @ 2026-06-11 3:15 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe, jia.yao
On Wed, Jun 10, 2026 at 08:09:33PM -0700, Matthew Brost wrote:
Ugh, I realized I replied to wrong version but I think most of comments
are still relavent to v2, so let's continue the discussion here.
Matt
> On Mon, Jun 01, 2026 at 09:38:04PM +0000, Zongyao Bai wrote:
> > Add delayed-release optimization:
> > - Add domain sleep 200us after xe_force_wake_put()
> > - Skip MMIO wake in xe_force_wake_get() if domain still awake.
> > Reduces frequent wake/sleep cycles for back-to-back operations.
> > Examples of scenarios: zeDeviceGetGlobalTimestamps read by VTune, PTI
> >
>
> I think this concept makes sense, as MMIO read operations are relatively
> expensive in terms of time cost (perhaps ~5 µs). However, the downside
> is increased power usage.
>
> Should we make delayed release an optional call—for example,
> xe_force_wake_put_delay—and only use it in specific critical paths? For
> instance, we could limit its use to paths tied to Level Zero calls like
> zeDeviceGetGlobalTimestamps.
>
> This gets a bit tricky if xe_force_wake_put_delay is called and is not
> the last reference, followed by xe_force_wake_put being the final
> reference. However, it should be straightforward to track that an
> delayed put was requested and have the final xe_force_wake_put issue the
> delay.
>
> > Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_force_wake.c | 111 +++++++++++++++++------
> > drivers/gpu/drm/xe/xe_force_wake.h | 4 +-
> > drivers/gpu/drm/xe/xe_force_wake_types.h | 11 +++
> > drivers/gpu/drm/xe/xe_gt.c | 4 +-
> > 4 files changed, 99 insertions(+), 31 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
> > index 197e2197bd0a..183a17fa6d68 100644
> > --- a/drivers/gpu/drm/xe/xe_force_wake.c
> > +++ b/drivers/gpu/drm/xe/xe_force_wake.c
> > @@ -6,15 +6,20 @@
> > #include "xe_force_wake.h"
> >
> > #include <drm/drm_util.h>
> > +#include <linux/device.h>
> > +#include <linux/hrtimer.h>
> >
> > #include "regs/xe_gt_regs.h"
> > #include "regs/xe_reg_defs.h"
> > +#include "xe_device.h"
> > #include "xe_gt.h"
> > #include "xe_gt_printk.h"
> > #include "xe_mmio.h"
> > +#include "xe_pm.h"
> > #include "xe_sriov.h"
> >
> > #define XE_FORCE_WAKE_ACK_TIMEOUT_MS 50
> > +#define XE_FORCE_WAKE_HOLD_DELAY_US 200
>
> How did you choose this value? It seems like it should be something
> configurable via Kconfig or configfs.
>
> >
> > static const char *str_wake_sleep(bool wake)
> > {
> > @@ -27,6 +32,8 @@ static void mark_domain_initialized(struct xe_force_wake *fw,
> > fw->initialized_domains |= BIT(id);
> > }
> >
> > +static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer);
> > +
> > static void init_domain(struct xe_force_wake *fw,
> > enum xe_force_wake_domain_id id,
> > struct xe_reg reg, struct xe_reg ack)
> > @@ -38,11 +45,29 @@ static void init_domain(struct xe_force_wake *fw,
> > domain->reg_ack = ack;
> > domain->val = FORCEWAKE_MT(FORCEWAKE_KERNEL);
> > domain->mask = FORCEWAKE_MT_MASK(FORCEWAKE_KERNEL);
> > + domain->fw_back = fw;
> > + hrtimer_setup(&domain->timer, xe_force_wake_domain_timer,
> > + CLOCK_MONOTONIC, HRTIMER_MODE_REL);
> >
> > mark_domain_initialized(fw, id);
> > }
> >
> > -void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
> > +static void xe_force_wake_fini(void *arg)
> > +{
> > + struct xe_force_wake *fw = arg;
> > + struct xe_gt *gt = fw->gt;
> > + struct xe_force_wake_domain *domain;
> > + unsigned int tmp;
> > +
> > + for_each_fw_domain(domain, fw, tmp) {
> > + xe_gt_WARN(gt, domain->ref,
> > + "Forcewake domain %d still referenced (%u) at teardown\n",
> > + domain->id, domain->ref);
>
> Is the warning above actually valid? It seems fairly normal for a fini
> to race with a delayed fw put. I would drop this.
>
> > + hrtimer_cancel(&domain->timer);
> > + }
> > +}
> > +
> > +int xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
> > {
> > struct xe_device *xe = gt_to_xe(gt);
> >
> > @@ -58,6 +83,8 @@ void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
> > FORCEWAKE_GT,
> > FORCEWAKE_ACK_GT);
> > }
> > +
> > + return devm_add_action_or_reset(xe->drm.dev, xe_force_wake_fini, fw);
> > }
> >
> > void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw)
> > @@ -142,10 +169,36 @@ static void domain_sleep(struct xe_gt *gt, struct xe_force_wake_domain *domain)
> > __domain_ctl(gt, domain, false);
> > }
> >
> > -static int domain_sleep_wait(struct xe_gt *gt,
> > - struct xe_force_wake_domain *domain)
> > +static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer)
> > {
> > - return __domain_wait(gt, domain, false);
> > + struct xe_force_wake_domain *domain =
> > + container_of(timer, struct xe_force_wake_domain, timer);
> > + struct xe_force_wake *fw = domain->fw_back;
> > + struct xe_gt *gt = fw->gt;
> > + unsigned long flags;
> > +
> > + xe_gt_assert(gt, !xe_pm_runtime_suspended(gt_to_xe(gt)));
> > +
> > + spin_lock_irqsave(&fw->lock, flags);
>
> I'd use guard(spinlock_irqsave) here rather manually unlock this.
> hrtimer_forward_now should be safe under fw->lock unless I'm missing
> something.
>
> > +
> > + if (!(fw->timer_domains & BIT(domain->id)) || domain->ref) {
> > + spin_unlock_irqrestore(&fw->lock, flags);
> > + return HRTIMER_NORESTART;
> > + }
> > + if (domain->timer_rearm) {
> > + domain->timer_rearm = false;
> > + spin_unlock_irqrestore(&fw->lock, flags);
> > + hrtimer_forward_now(timer,
> > + ns_to_ktime(XE_FORCE_WAKE_HOLD_DELAY_US *
> > + NSEC_PER_USEC));
> > + return HRTIMER_RESTART;
> > + }
> > + fw->timer_domains &= ~BIT(domain->id);
> > + domain_sleep(gt, domain);
> > + fw->awake_domains &= ~BIT(domain->id);
> > + spin_unlock_irqrestore(&fw->lock, flags);
> > +
> > + return HRTIMER_NORESTART;
> > }
> >
> > /**
> > @@ -187,8 +240,13 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
> > spin_lock_irqsave(&fw->lock, flags);
> > for_each_fw_domain_masked(domain, ref_rqst, fw, tmp) {
> > if (!domain->ref++) {
> > - awake_rqst |= BIT(domain->id);
> > - domain_wake(gt, domain);
> > + if (fw->awake_domains & BIT(domain->id)) {
> > + fw->timer_domains &= ~BIT(domain->id);
> > + hrtimer_try_to_cancel(&domain->timer);
> > + } else {
> > + awake_rqst |= BIT(domain->id);
> > + domain_wake(gt, domain);
> > + }
> > }
> > ref_incr |= BIT(domain->id);
> > }
> > @@ -213,27 +271,25 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
> > }
> >
> > /**
> > - * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
> > + * xe_force_wake_put - Decrement the refcount and arm the delayed-sleep timer
> > * @fw: Pointer to the force wake structure
> > * @fw_ref: return of xe_force_wake_get()
> > *
> > - * This function reduces the reference counts for domains in fw_ref. If
> > - * refcount for any of the specified domain reaches 0, it puts the domain to sleep
> > - * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
> > - * Warns in case of timeout of ack from domain.
> > + * This function reduces the reference counts for domains in fw_ref. When a
> > + * domain's refcount reaches 0 the sleep request is not issued immediately;
> > + * instead a hrtimer is armed for XE_FORCE_WAKE_HOLD_DELAY_US so that a rapid
> > + * xe_force_wake_get() can reuse the still-awake domain at zero MMIO cost. On
> > + * timer expiry, if the domain is still idle, the sleep request is written.
> > + * Mirroring i915's fw_domains_put(), the deferred sleep is fire-and-forget:
> > + * no sleep ACK is polled, since the next wake re-waits for the wake ACK.
>
> Let's not mention the i915 in Xe code.
>
> > */
> > void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
> > {
> > struct xe_gt *gt = fw->gt;
> > struct xe_force_wake_domain *domain;
> > - unsigned int tmp, sleep = 0;
> > + unsigned int tmp;
> > unsigned long flags;
> > - int ack_fail = 0;
> >
> > - /*
> > - * Avoid unnecessary lock and unlock when the function is called
> > - * in error path of individual domains.
> > - */
>
> Why delete this comment?
>
> > if (!fw_ref)
> > return;
> >
> > @@ -245,20 +301,19 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
> > xe_gt_assert(gt, domain->ref);
> >
> > if (!--domain->ref) {
> > - sleep |= BIT(domain->id);
> > - domain_sleep(gt, domain);
> > + fw->timer_domains |= BIT(domain->id);
> > + if (hrtimer_callback_running(&domain->timer)) {
> > + domain->timer_rearm = true;
> > + } else {
> > + domain->timer_rearm = false;
> > + hrtimer_start(&domain->timer,
> > + ns_to_ktime(XE_FORCE_WAKE_HOLD_DELAY_US *
> > + NSEC_PER_USEC),
> > + HRTIMER_MODE_REL);
> > + }
> > }
> > }
> > - for_each_fw_domain_masked(domain, sleep, fw, tmp) {
> > - if (domain_sleep_wait(gt, domain) == 0)
> > - fw->awake_domains &= ~BIT(domain->id);
> > - else
> > - ack_fail |= BIT(domain->id);
> > - }
> > spin_unlock_irqrestore(&fw->lock, flags);
> > -
> > - xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
> > - str_plural(hweight_long(ack_fail)), ack_fail);
>
> This deleted code for domain_sleep_wait / error probably needs to be in
> xe_force_wake_domain_timer.
>
> > }
> >
> > const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
> > diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
> > index e2721f205d6c..19679b923dca 100644
> > --- a/drivers/gpu/drm/xe/xe_force_wake.h
> > +++ b/drivers/gpu/drm/xe/xe_force_wake.h
> > @@ -11,8 +11,8 @@
> >
> > struct xe_gt;
> >
> > -void xe_force_wake_init_gt(struct xe_gt *gt,
> > - struct xe_force_wake *fw);
> > +int xe_force_wake_init_gt(struct xe_gt *gt,
> > + struct xe_force_wake *fw);
> > void xe_force_wake_init_engines(struct xe_gt *gt,
> > struct xe_force_wake *fw);
> > unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
> > diff --git a/drivers/gpu/drm/xe/xe_force_wake_types.h b/drivers/gpu/drm/xe/xe_force_wake_types.h
> > index 14b7b86e801b..ee5675069fe0 100644
> > --- a/drivers/gpu/drm/xe/xe_force_wake_types.h
> > +++ b/drivers/gpu/drm/xe/xe_force_wake_types.h
> > @@ -6,6 +6,7 @@
> > #ifndef _XE_FORCE_WAKE_TYPES_H_
> > #define _XE_FORCE_WAKE_TYPES_H_
> >
> > +#include <linux/hrtimer.h>
> > #include <linux/mutex.h>
> > #include <linux/types.h>
> >
> > @@ -51,6 +52,8 @@ enum xe_force_wake_domains {
> > XE_FORCEWAKE_ALL = BIT(XE_FW_DOMAIN_ID_COUNT)
> > };
> >
> > +struct xe_force_wake;
> > +
> > /**
> > * struct xe_force_wake_domain - Xe force wake power domain
> > *
> > @@ -82,6 +85,12 @@ struct xe_force_wake_domain {
> > u32 mask;
> > /** @ref: domain reference */
> > u32 ref;
> > + /** @timer_rearm: put() ran while callback was in-flight; callback must restart timer */
>
> Protected fw_back->lock.
>
> > + bool timer_rearm;
>
> In general, I’d reorganize the layout so that structs are at the top of
> xe_force_wake_domain, followed by u32 fields, and finally the bool
> fields.
>
> > + /** @timer: hrtimer for delayed sleep request */
> > + struct hrtimer timer;
> > + /** @fw_back: back pointer to parent xe_force_wake */
> > + struct xe_force_wake *fw_back;
> > };
> >
> > /**
> > @@ -101,6 +110,8 @@ struct xe_force_wake {
> > spinlock_t lock;
> > /** @awake_domains: mask of all domains awake */
> > unsigned int awake_domains;
> > + /** @timer_domains: mask of domains with an outstanding delayed-sleep timer */
> > + unsigned int timer_domains;
> > /** @initialized_domains: mask of all initialized domains */
> > unsigned int initialized_domains;
> > /** @domains: force wake domains */
> > diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> > index 783eb6d631b5..43a79698cd04 100644
> > --- a/drivers/gpu/drm/xe/xe_gt.c
> > +++ b/drivers/gpu/drm/xe/xe_gt.c
> > @@ -511,7 +511,9 @@ int xe_gt_init_early(struct xe_gt *gt)
> >
> > xe_wa_process_gt_oob(gt);
> >
> > - xe_force_wake_init_gt(gt, gt_to_fw(gt));
> > + err = xe_force_wake_init_gt(gt, gt_to_fw(gt));
> > + if (err)
> > + return err;
>
> I'd add newline here.
>
> Matt
>
> > spin_lock_init(>->global_invl_lock);
> >
> > err = xe_gt_tlb_inval_init_early(gt);
> > --
> > 2.43.0
> >
^ permalink raw reply [flat|nested] 34+ messages in thread
* ✓ Xe.CI.FULL: success for drm/xe/forcewake: add delayed-release optimization (rev2)
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (6 preceding siblings ...)
2026-06-11 3:09 ` [PATCH] drm/xe/forcewake: add delayed-release optimization Matthew Brost
@ 2026-06-11 11:29 ` Patchwork
2026-06-25 8:19 ` [PATCH v3] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (11 subsequent siblings)
19 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2026-06-11 11:29 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 12963 bytes --]
== Series Details ==
Series: drm/xe/forcewake: add delayed-release optimization (rev2)
URL : https://patchwork.freedesktop.org/series/167697/
State : success
== Summary ==
CI Bug Log - changes from xe-5234-10db0c83b0ccc3211990b54235475abb9d383851_FULL -> xe-pw-167697v2_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-167697v2_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0:
- shard-bmg: NOTRUN -> [SKIP][1] ([Intel XE#1124])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-5/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic:
- shard-bmg: NOTRUN -> [INCOMPLETE][2] ([Intel XE#8151])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-5/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-lnl: [PASS][3] -> [FAIL][4] ([Intel XE#301])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5234-10db0c83b0ccc3211990b54235475abb9d383851/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp2:
- shard-bmg: [PASS][5] -> [FAIL][6] ([Intel XE#3321]) +1 other test fail
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5234-10db0c83b0ccc3211990b54235475abb9d383851/shard-bmg-3/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp2.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp2.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#4141]) +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [PASS][8] -> [SKIP][9] ([Intel XE#1503])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5234-10db0c83b0ccc3211990b54235475abb9d383851/shard-bmg-6/igt@kms_hdr@invalid-hdr.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-3/igt@kms_hdr@invalid-hdr.html
* igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010:
- shard-bmg: [PASS][10] -> [SKIP][11] ([Intel XE#7922]) +1 other test skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5234-10db0c83b0ccc3211990b54235475abb9d383851/shard-bmg-6/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-3/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
* igt@kms_hdr@static-toggle-suspend@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-bmg: [PASS][12] -> [SKIP][13] ([Intel XE#7915]) +1 other test skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5234-10db0c83b0ccc3211990b54235475abb9d383851/shard-bmg-10/igt@kms_hdr@static-toggle-suspend@pipe-a-hdmi-a-3-xrgb16161616f.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-6/igt@kms_hdr@static-toggle-suspend@pipe-a-hdmi-a-3-xrgb16161616f.html
* igt@kms_vrr@max-min:
- shard-lnl: [PASS][14] -> [FAIL][15] ([Intel XE#4227]) +1 other test fail
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5234-10db0c83b0ccc3211990b54235475abb9d383851/shard-lnl-8/igt@kms_vrr@max-min.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-lnl-8/igt@kms_vrr@max-min.html
* igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#2322] / [Intel XE#7372])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-5/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
* igt@xe_exec_reset@multi-queue-close-fd:
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#7866])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-5/igt@xe_exec_reset@multi-queue-close-fd.html
* igt@xe_exec_system_allocator@many-execqueues-mmap-new-huge:
- shard-bmg: NOTRUN -> [ABORT][18] ([Intel XE#8007])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-10/igt@xe_exec_system_allocator@many-execqueues-mmap-new-huge.html
* igt@xe_exec_threads@threads-multi-queue-mixed-fd-userptr:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#7138])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-5/igt@xe_exec_threads@threads-multi-queue-mixed-fd-userptr.html
* igt@xe_peer2peer@read:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2427] / [Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-5/igt@xe_peer2peer@read.html
* igt@xe_pm@d3hot-basic-exec:
- shard-lnl: [PASS][21] -> [TIMEOUT][22] ([Intel XE#8269])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5234-10db0c83b0ccc3211990b54235475abb9d383851/shard-lnl-8/igt@xe_pm@d3hot-basic-exec.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-lnl-3/igt@xe_pm@d3hot-basic-exec.html
#### Possible fixes ####
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-bmg: [FAIL][23] ([Intel XE#7809]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5234-10db0c83b0ccc3211990b54235475abb9d383851/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-3/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [FAIL][25] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][26] +1 other test pass
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5234-10db0c83b0ccc3211990b54235475abb9d383851/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-bmg: [SKIP][27] ([Intel XE#7915]) -> [PASS][28] +3 other tests pass
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5234-10db0c83b0ccc3211990b54235475abb9d383851/shard-bmg-8/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-9/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [INCOMPLETE][29] ([Intel XE#6321]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5234-10db0c83b0ccc3211990b54235475abb9d383851/shard-bmg-8/igt@xe_evict@evict-mixed-many-threads-small.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-9/igt@xe_evict@evict-mixed-many-threads-small.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-free-nomemset:
- shard-bmg: [INCOMPLETE][31] ([Intel XE#8159]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5234-10db0c83b0ccc3211990b54235475abb9d383851/shard-bmg-3/igt@xe_exec_system_allocator@threads-shared-vm-many-free-nomemset.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-5/igt@xe_exec_system_allocator@threads-shared-vm-many-free-nomemset.html
* igt@xe_wedged@wedged-mode-toggle:
- shard-bmg: [ABORT][33] ([Intel XE#8007]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5234-10db0c83b0ccc3211990b54235475abb9d383851/shard-bmg-4/igt@xe_wedged@wedged-mode-toggle.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-10/igt@xe_wedged@wedged-mode-toggle.html
#### Warnings ####
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-lnl: [SKIP][35] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935]) -> [SKIP][36] ([Intel XE#309] / [Intel XE#7343])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5234-10db0c83b0ccc3211990b54235475abb9d383851/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-lnl-3/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][37] ([Intel XE#3544] / [Intel XE#7916]) -> [SKIP][38] ([Intel XE#3544] / [Intel XE#7915] / [Intel XE#7916])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5234-10db0c83b0ccc3211990b54235475abb9d383851/shard-bmg-9/igt@kms_hdr@brightness-with-hdr.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-6/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-bmg: [SKIP][39] ([Intel XE#7916]) -> [SKIP][40] ([Intel XE#7915]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5234-10db0c83b0ccc3211990b54235475abb9d383851/shard-bmg-9/igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-6/igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [SKIP][41] ([Intel XE#2426] / [Intel XE#5848]) -> [FAIL][42] ([Intel XE#1729] / [Intel XE#7424])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5234-10db0c83b0ccc3211990b54235475abb9d383851/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
[Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
[Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
[Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
[Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
[Intel XE#7809]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7809
[Intel XE#7866]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7866
[Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
[Intel XE#7916]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7916
[Intel XE#7922]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7922
[Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8151]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8151
[Intel XE#8159]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8159
[Intel XE#8269]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8269
Build changes
-------------
* Linux: xe-5234-10db0c83b0ccc3211990b54235475abb9d383851 -> xe-pw-167697v2
IGT_8958: 8958
xe-5234-10db0c83b0ccc3211990b54235475abb9d383851: 10db0c83b0ccc3211990b54235475abb9d383851
xe-pw-167697v2: 167697v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v2/index.html
[-- Attachment #2: Type: text/html, Size: 14716 bytes --]
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v2] drm/xe/forcewake: add delayed-release optimization
2026-06-11 1:03 ` [PATCH v2] " Zongyao Bai
@ 2026-06-11 11:59 ` Maarten Lankhorst
2026-06-18 21:18 ` Bai, Zongyao
0 siblings, 1 reply; 34+ messages in thread
From: Maarten Lankhorst @ 2026-06-11 11:59 UTC (permalink / raw)
To: Zongyao Bai, intel-xe; +Cc: jia.yao
Hey,
Why not used delayed_work instead of introducing a hrtimer?
Is the 200 µs that time critical?
Regardless, can we not configure the delay in hardware instead of software?
Kind regards,
~Maarten Lankhorst
On 6/11/26 03:03, Zongyao Bai wrote:
> Add delayed-release optimization:
> - Add domain sleep XE_FORCE_WAKE_HOLD_DELAY_US after xe_force_wake_put()
> - Skip MMIO wake in xe_force_wake_get() if domain still awake.
> Reduces frequent wake/sleep cycles for back-to-back operations.
> Examples of scenarios: zeDeviceGetGlobalTimestamps read by VTune, PTI
>
> v2:
> - Add xe_force_wake_flush() and call it on the runtime/system
> suspend paths to ensure no deferred-sleep runs after GT power-off.
> (Sashiko)
>
> Assisted-by: GitHub-Copilot:claude-sonnet-4.6
> Assisted-by: GitHub-Copilot:claude-opus-4.8 #v2
> Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
> ---
> drivers/gpu/drm/xe/xe_force_wake.c | 146 +++++++++++++++++++----
> drivers/gpu/drm/xe/xe_force_wake.h | 23 +++-
> drivers/gpu/drm/xe/xe_force_wake_types.h | 11 ++
> drivers/gpu/drm/xe/xe_gt.c | 26 ++--
> 4 files changed, 171 insertions(+), 35 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
> index 197e2197bd0a..b7c674f5f69a 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake.c
> +++ b/drivers/gpu/drm/xe/xe_force_wake.c
> @@ -6,15 +6,20 @@
> #include "xe_force_wake.h"
>
> #include <drm/drm_util.h>
> +#include <linux/device.h>
> +#include <linux/hrtimer.h>
>
> #include "regs/xe_gt_regs.h"
> #include "regs/xe_reg_defs.h"
> +#include "xe_device.h"
> #include "xe_gt.h"
> #include "xe_gt_printk.h"
> #include "xe_mmio.h"
> +#include "xe_pm.h"
> #include "xe_sriov.h"
>
> #define XE_FORCE_WAKE_ACK_TIMEOUT_MS 50
> +#define XE_FORCE_WAKE_HOLD_DELAY_US 200
>
> static const char *str_wake_sleep(bool wake)
> {
> @@ -27,6 +32,8 @@ static void mark_domain_initialized(struct xe_force_wake *fw,
> fw->initialized_domains |= BIT(id);
> }
>
> +static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer);
> +
> static void init_domain(struct xe_force_wake *fw,
> enum xe_force_wake_domain_id id,
> struct xe_reg reg, struct xe_reg ack)
> @@ -38,11 +45,29 @@ static void init_domain(struct xe_force_wake *fw,
> domain->reg_ack = ack;
> domain->val = FORCEWAKE_MT(FORCEWAKE_KERNEL);
> domain->mask = FORCEWAKE_MT_MASK(FORCEWAKE_KERNEL);
> + domain->fw_back = fw;
> + hrtimer_setup(&domain->timer, xe_force_wake_domain_timer,
> + CLOCK_MONOTONIC, HRTIMER_MODE_REL);
>
> mark_domain_initialized(fw, id);
> }
>
> -void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
> +static void xe_force_wake_fini(void *arg)
> +{
> + struct xe_force_wake *fw = arg;
> + struct xe_gt *gt = fw->gt;
> + struct xe_force_wake_domain *domain;
> + unsigned int tmp;
> +
> + for_each_fw_domain(domain, fw, tmp) {
> + xe_gt_WARN(gt, domain->ref,
> + "Forcewake domain %d still referenced (%u) at teardown\n",
> + domain->id, domain->ref);
> + hrtimer_cancel(&domain->timer);
> + }
> +}
> +
> +int xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
> {
> struct xe_device *xe = gt_to_xe(gt);
>
> @@ -58,6 +83,8 @@ void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
> FORCEWAKE_GT,
> FORCEWAKE_ACK_GT);
> }
> +
> + return devm_add_action_or_reset(xe->drm.dev, xe_force_wake_fini, fw);
> }
>
> void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw)
> @@ -142,10 +169,37 @@ static void domain_sleep(struct xe_gt *gt, struct xe_force_wake_domain *domain)
> __domain_ctl(gt, domain, false);
> }
>
> -static int domain_sleep_wait(struct xe_gt *gt,
> - struct xe_force_wake_domain *domain)
> +static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer)
> {
> - return __domain_wait(gt, domain, false);
> + struct xe_force_wake_domain *domain =
> + container_of(timer, struct xe_force_wake_domain, timer);
> + struct xe_force_wake *fw = domain->fw_back;
> + struct xe_gt *gt = fw->gt;
> + unsigned long flags;
> +
> + xe_gt_assert(gt, !xe_pm_runtime_suspended(gt_to_xe(gt)));
> +
> + spin_lock_irqsave(&fw->lock, flags);
> +
> + if (!(fw->timer_domains & BIT(domain->id)) || domain->ref) {
> + spin_unlock_irqrestore(&fw->lock, flags);
> + return HRTIMER_NORESTART;
> + }
> + if (domain->timer_rearm) {
> + domain->timer_rearm = false;
> + spin_unlock_irqrestore(&fw->lock, flags);
> + hrtimer_forward_now(timer,
> + ns_to_ktime(XE_FORCE_WAKE_HOLD_DELAY_US *
> + NSEC_PER_USEC));
> + return HRTIMER_RESTART;
> + }
> +
> + fw->timer_domains &= ~BIT(domain->id);
> + domain_sleep(gt, domain);
> + fw->awake_domains &= ~BIT(domain->id);
> + spin_unlock_irqrestore(&fw->lock, flags);
> +
> + return HRTIMER_NORESTART;
> }
>
> /**
> @@ -187,8 +241,13 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
> spin_lock_irqsave(&fw->lock, flags);
> for_each_fw_domain_masked(domain, ref_rqst, fw, tmp) {
> if (!domain->ref++) {
> - awake_rqst |= BIT(domain->id);
> - domain_wake(gt, domain);
> + if (fw->awake_domains & BIT(domain->id)) {
> + fw->timer_domains &= ~BIT(domain->id);
> + hrtimer_try_to_cancel(&domain->timer);
> + } else {
> + awake_rqst |= BIT(domain->id);
> + domain_wake(gt, domain);
> + }
> }
> ref_incr |= BIT(domain->id);
> }
> @@ -213,27 +272,23 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
> }
>
> /**
> - * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
> + * xe_force_wake_put - Decrement the refcount and arm the delayed-sleep timer
> * @fw: Pointer to the force wake structure
> * @fw_ref: return of xe_force_wake_get()
> *
> - * This function reduces the reference counts for domains in fw_ref. If
> - * refcount for any of the specified domain reaches 0, it puts the domain to sleep
> - * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
> - * Warns in case of timeout of ack from domain.
> + * This function reduces the reference counts for domains in fw_ref. When a
> + * domain's refcount reaches 0 the sleep request is not issued immediately;
> + * instead a hrtimer is armed for XE_FORCE_WAKE_HOLD_DELAY_US so that a rapid
> + * xe_force_wake_get() can reuse the still-awake domain at zero MMIO cost. On
> + * timer expiry, if the domain is still idle, the sleep request is written.
> */
> void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
> {
> struct xe_gt *gt = fw->gt;
> struct xe_force_wake_domain *domain;
> - unsigned int tmp, sleep = 0;
> + unsigned int tmp;
> unsigned long flags;
> - int ack_fail = 0;
>
> - /*
> - * Avoid unnecessary lock and unlock when the function is called
> - * in error path of individual domains.
> - */
> if (!fw_ref)
> return;
>
> @@ -245,20 +300,59 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
> xe_gt_assert(gt, domain->ref);
>
> if (!--domain->ref) {
> - sleep |= BIT(domain->id);
> - domain_sleep(gt, domain);
> + fw->timer_domains |= BIT(domain->id);
> + if (hrtimer_callback_running(&domain->timer)) {
> + domain->timer_rearm = true;
> + } else {
> + domain->timer_rearm = false;
> + hrtimer_start(&domain->timer,
> + ns_to_ktime(XE_FORCE_WAKE_HOLD_DELAY_US *
> + NSEC_PER_USEC),
> + HRTIMER_MODE_REL);
> + }
> }
> }
> - for_each_fw_domain_masked(domain, sleep, fw, tmp) {
> - if (domain_sleep_wait(gt, domain) == 0)
> + spin_unlock_irqrestore(&fw->lock, flags);
> +}
> +
> +/**
> + * xe_force_wake_flush - Cancel pending delayed-sleep timers and settle domains
> + * @fw: Pointer to the force wake structure
> + *
> + * The delayed-release optimization in xe_force_wake_put() arms a short hrtimer
> + * instead of putting an idle domain to sleep immediately. That deferred sleep
> + * performs MMIO and must not be allowed to run after the device has been
> + * powered down. Callers on the runtime/system suspend path must therefore
> + * flush any outstanding timers once forcewake has been fully released, before
> + * the hardware is powered off.
> + *
> + * For every domain this cancels the pending timer (synchronously waiting for an
> + * in-flight callback to finish) and, if the domain is still idle with an
> + * outstanding deferred sleep, performs the sleep request right away so the
> + * domain is left in a consistent, fully-asleep state. hrtimer_cancel() must be
> + * called without holding fw->lock, since the timer callback takes that same
> + * lock.
> + */
> +void xe_force_wake_flush(struct xe_force_wake *fw)
> +{
> + struct xe_gt *gt = fw->gt;
> + struct xe_force_wake_domain *domain;
> + unsigned int tmp;
> + unsigned long flags;
> +
> + for_each_fw_domain(domain, fw, tmp)
> + hrtimer_cancel(&domain->timer);
> +
> + spin_lock_irqsave(&fw->lock, flags);
> + for_each_fw_domain(domain, fw, tmp) {
> + domain->timer_rearm = false;
> + if ((fw->timer_domains & BIT(domain->id)) && !domain->ref) {
> + fw->timer_domains &= ~BIT(domain->id);
> + domain_sleep(gt, domain);
> fw->awake_domains &= ~BIT(domain->id);
> - else
> - ack_fail |= BIT(domain->id);
> + }
> }
> spin_unlock_irqrestore(&fw->lock, flags);
> -
> - xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
> - str_plural(hweight_long(ack_fail)), ack_fail);
> }
>
> const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
> diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
> index e2721f205d6c..1b6d5efead38 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake.h
> +++ b/drivers/gpu/drm/xe/xe_force_wake.h
> @@ -11,13 +11,32 @@
>
> struct xe_gt;
>
> -void xe_force_wake_init_gt(struct xe_gt *gt,
> - struct xe_force_wake *fw);
> +int xe_force_wake_init_gt(struct xe_gt *gt,
> + struct xe_force_wake *fw);
> void xe_force_wake_init_engines(struct xe_gt *gt,
> struct xe_force_wake *fw);
> unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
> enum xe_force_wake_domains domains);
> void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref);
> +void xe_force_wake_flush(struct xe_force_wake *fw);
> +
> +/**
> + * xe_force_wake_put_and_flush - Release forcewake and settle any deferred sleep
> + * @fw: Pointer to the force wake structure
> + * @fw_ref: return of xe_force_wake_get()
> + *
> + * Convenience helper for paths that must guarantee the domain is fully asleep
> + * before returning (typically right before the GT is powered off on
> + * runtime/system suspend). Because the flush has to run after the final put
> + * but before HW power-off, scope-based cleanup via CLASS(xe_force_wake, ...)
> + * cannot be used here.
> + */
> +static inline void
> +xe_force_wake_put_and_flush(struct xe_force_wake *fw, unsigned int fw_ref)
> +{
> + xe_force_wake_put(fw, fw_ref);
> + xe_force_wake_flush(fw);
> +}
>
> const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id);
>
> diff --git a/drivers/gpu/drm/xe/xe_force_wake_types.h b/drivers/gpu/drm/xe/xe_force_wake_types.h
> index 14b7b86e801b..ee5675069fe0 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake_types.h
> +++ b/drivers/gpu/drm/xe/xe_force_wake_types.h
> @@ -6,6 +6,7 @@
> #ifndef _XE_FORCE_WAKE_TYPES_H_
> #define _XE_FORCE_WAKE_TYPES_H_
>
> +#include <linux/hrtimer.h>
> #include <linux/mutex.h>
> #include <linux/types.h>
>
> @@ -51,6 +52,8 @@ enum xe_force_wake_domains {
> XE_FORCEWAKE_ALL = BIT(XE_FW_DOMAIN_ID_COUNT)
> };
>
> +struct xe_force_wake;
> +
> /**
> * struct xe_force_wake_domain - Xe force wake power domain
> *
> @@ -82,6 +85,12 @@ struct xe_force_wake_domain {
> u32 mask;
> /** @ref: domain reference */
> u32 ref;
> + /** @timer_rearm: put() ran while callback was in-flight; callback must restart timer */
> + bool timer_rearm;
> + /** @timer: hrtimer for delayed sleep request */
> + struct hrtimer timer;
> + /** @fw_back: back pointer to parent xe_force_wake */
> + struct xe_force_wake *fw_back;
> };
>
> /**
> @@ -101,6 +110,8 @@ struct xe_force_wake {
> spinlock_t lock;
> /** @awake_domains: mask of all domains awake */
> unsigned int awake_domains;
> + /** @timer_domains: mask of domains with an outstanding delayed-sleep timer */
> + unsigned int timer_domains;
> /** @initialized_domains: mask of all initialized domains */
> unsigned int initialized_domains;
> /** @domains: force wake domains */
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index 783eb6d631b5..bba51a655b28 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -511,7 +511,9 @@ int xe_gt_init_early(struct xe_gt *gt)
>
> xe_wa_process_gt_oob(gt);
>
> - xe_force_wake_init_gt(gt, gt_to_fw(gt));
> + err = xe_force_wake_init_gt(gt, gt_to_fw(gt));
> + if (err)
> + return err;
> spin_lock_init(>->global_invl_lock);
>
> err = xe_gt_tlb_inval_init_early(gt);
> @@ -998,13 +1000,15 @@ void xe_gt_suspend_prepare(struct xe_gt *gt)
>
> int xe_gt_suspend(struct xe_gt *gt)
> {
> + unsigned int fw_ref;
> int err;
>
> xe_gt_dbg(gt, "suspending\n");
> xe_gt_sanitize(gt);
>
> - CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
> - if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
> + fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
> + if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {
> + xe_force_wake_put(gt_to_fw(gt), fw_ref);
> xe_gt_err(gt, "suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
> return -ETIMEDOUT;
> }
> @@ -1012,7 +1016,7 @@ int xe_gt_suspend(struct xe_gt *gt)
> err = xe_uc_suspend(>->uc);
> if (err) {
> xe_gt_err(gt, "suspend failed (%pe)\n", ERR_PTR(err));
> - return err;
> + goto err_force_wake;
> }
>
> xe_gt_idle_disable_pg(gt);
> @@ -1021,7 +1025,10 @@ int xe_gt_suspend(struct xe_gt *gt)
>
> xe_gt_dbg(gt, "suspended\n");
>
> - return 0;
> +err_force_wake:
> + xe_force_wake_put_and_flush(gt_to_fw(gt), fw_ref);
> +
> + return err;
> }
>
> void xe_gt_shutdown(struct xe_gt *gt)
> @@ -1080,10 +1087,13 @@ int xe_gt_resume(struct xe_gt *gt)
> */
> int xe_gt_runtime_suspend(struct xe_gt *gt)
> {
> + unsigned int fw_ref;
> +
> xe_gt_dbg(gt, "runtime suspending\n");
>
> - CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
> - if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
> + fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
> + if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {
> + xe_force_wake_put(gt_to_fw(gt), fw_ref);
> xe_gt_err(gt, "runtime suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
> return -ETIMEDOUT;
> }
> @@ -1093,6 +1103,8 @@ int xe_gt_runtime_suspend(struct xe_gt *gt)
>
> xe_gt_dbg(gt, "runtime suspended\n");
>
> + xe_force_wake_put_and_flush(gt_to_fw(gt), fw_ref);
> +
> return 0;
> }
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v2] drm/xe/forcewake: add delayed-release optimization
2026-06-11 11:59 ` Maarten Lankhorst
@ 2026-06-18 21:18 ` Bai, Zongyao
0 siblings, 0 replies; 34+ messages in thread
From: Bai, Zongyao @ 2026-06-18 21:18 UTC (permalink / raw)
To: Maarten Lankhorst, intel-xe; +Cc: jia.yao
On 6/11/2026 4:59 AM, Maarten Lankhorst wrote:
> Hey,
>
> Why not used delayed_work instead of introducing a hrtimer?
> Is the 200 µs that time critical?
>
> Regardless, can we not configure the delay in hardware instead of software?
>
> Kind regards,
> ~Maarten Lankhorst
Hi Maarten,
Thank you for review.
1. Why not used delayed_work instead of introducing a hrtimer?
Is the 200 µs that time critical?
This optimization is target for back-to-back access to avoid
frequently sleep/wake up actions.
A tiny short hold time is enough for that. Introducing a hrtimer
could make it precise with less jitter.
delayed_work may make this tiny-short time > 1ms.
200us is validated for zeDeviceGetGlobalTimestamps benchmark.
But yes, we could test more values, like 100us/50us/...
The shorter the better for the power consume.
I'll update the result here later.
2. Regardless, can we not configure the delay in hardware instead of software?
I do not see a generic, driver-visible hardware control for programming a
forcewake auto-release delay in the current xe forcewake interface or register.
And it likes a kind of software policy for optimization, there is no hard-limitation here.
so the delayed release is implemented in software.
>
> On 6/11/26 03:03, Zongyao Bai wrote:
>> Add delayed-release optimization:
>> - Add domain sleep XE_FORCE_WAKE_HOLD_DELAY_US after xe_force_wake_put()
>> - Skip MMIO wake in xe_force_wake_get() if domain still awake.
>> Reduces frequent wake/sleep cycles for back-to-back operations.
>> Examples of scenarios: zeDeviceGetGlobalTimestamps read by VTune, PTI
>>
>> v2:
>> - Add xe_force_wake_flush() and call it on the runtime/system
>> suspend paths to ensure no deferred-sleep runs after GT power-off.
>> (Sashiko)
>>
>> Assisted-by: GitHub-Copilot:claude-sonnet-4.6
>> Assisted-by: GitHub-Copilot:claude-opus-4.8 #v2
>> Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_force_wake.c | 146 +++++++++++++++++++----
>> drivers/gpu/drm/xe/xe_force_wake.h | 23 +++-
>> drivers/gpu/drm/xe/xe_force_wake_types.h | 11 ++
>> drivers/gpu/drm/xe/xe_gt.c | 26 ++--
>> 4 files changed, 171 insertions(+), 35 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
>> index 197e2197bd0a..b7c674f5f69a 100644
>> --- a/drivers/gpu/drm/xe/xe_force_wake.c
>> +++ b/drivers/gpu/drm/xe/xe_force_wake.c
>> @@ -6,15 +6,20 @@
>> #include "xe_force_wake.h"
>>
>> #include <drm/drm_util.h>
>> +#include <linux/device.h>
>> +#include <linux/hrtimer.h>
>>
>> #include "regs/xe_gt_regs.h"
>> #include "regs/xe_reg_defs.h"
>> +#include "xe_device.h"
>> #include "xe_gt.h"
>> #include "xe_gt_printk.h"
>> #include "xe_mmio.h"
>> +#include "xe_pm.h"
>> #include "xe_sriov.h"
>>
>> #define XE_FORCE_WAKE_ACK_TIMEOUT_MS 50
>> +#define XE_FORCE_WAKE_HOLD_DELAY_US 200
>>
>> static const char *str_wake_sleep(bool wake)
>> {
>> @@ -27,6 +32,8 @@ static void mark_domain_initialized(struct xe_force_wake *fw,
>> fw->initialized_domains |= BIT(id);
>> }
>>
>> +static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer);
>> +
>> static void init_domain(struct xe_force_wake *fw,
>> enum xe_force_wake_domain_id id,
>> struct xe_reg reg, struct xe_reg ack)
>> @@ -38,11 +45,29 @@ static void init_domain(struct xe_force_wake *fw,
>> domain->reg_ack = ack;
>> domain->val = FORCEWAKE_MT(FORCEWAKE_KERNEL);
>> domain->mask = FORCEWAKE_MT_MASK(FORCEWAKE_KERNEL);
>> + domain->fw_back = fw;
>> + hrtimer_setup(&domain->timer, xe_force_wake_domain_timer,
>> + CLOCK_MONOTONIC, HRTIMER_MODE_REL);
>>
>> mark_domain_initialized(fw, id);
>> }
>>
>> -void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
>> +static void xe_force_wake_fini(void *arg)
>> +{
>> + struct xe_force_wake *fw = arg;
>> + struct xe_gt *gt = fw->gt;
>> + struct xe_force_wake_domain *domain;
>> + unsigned int tmp;
>> +
>> + for_each_fw_domain(domain, fw, tmp) {
>> + xe_gt_WARN(gt, domain->ref,
>> + "Forcewake domain %d still referenced (%u) at teardown\n",
>> + domain->id, domain->ref);
>> + hrtimer_cancel(&domain->timer);
>> + }
>> +}
>> +
>> +int xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
>> {
>> struct xe_device *xe = gt_to_xe(gt);
>>
>> @@ -58,6 +83,8 @@ void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
>> FORCEWAKE_GT,
>> FORCEWAKE_ACK_GT);
>> }
>> +
>> + return devm_add_action_or_reset(xe->drm.dev, xe_force_wake_fini, fw);
>> }
>>
>> void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw)
>> @@ -142,10 +169,37 @@ static void domain_sleep(struct xe_gt *gt, struct xe_force_wake_domain *domain)
>> __domain_ctl(gt, domain, false);
>> }
>>
>> -static int domain_sleep_wait(struct xe_gt *gt,
>> - struct xe_force_wake_domain *domain)
>> +static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer)
>> {
>> - return __domain_wait(gt, domain, false);
>> + struct xe_force_wake_domain *domain =
>> + container_of(timer, struct xe_force_wake_domain, timer);
>> + struct xe_force_wake *fw = domain->fw_back;
>> + struct xe_gt *gt = fw->gt;
>> + unsigned long flags;
>> +
>> + xe_gt_assert(gt, !xe_pm_runtime_suspended(gt_to_xe(gt)));
>> +
>> + spin_lock_irqsave(&fw->lock, flags);
>> +
>> + if (!(fw->timer_domains & BIT(domain->id)) || domain->ref) {
>> + spin_unlock_irqrestore(&fw->lock, flags);
>> + return HRTIMER_NORESTART;
>> + }
>> + if (domain->timer_rearm) {
>> + domain->timer_rearm = false;
>> + spin_unlock_irqrestore(&fw->lock, flags);
>> + hrtimer_forward_now(timer,
>> + ns_to_ktime(XE_FORCE_WAKE_HOLD_DELAY_US *
>> + NSEC_PER_USEC));
>> + return HRTIMER_RESTART;
>> + }
>> +
>> + fw->timer_domains &= ~BIT(domain->id);
>> + domain_sleep(gt, domain);
>> + fw->awake_domains &= ~BIT(domain->id);
>> + spin_unlock_irqrestore(&fw->lock, flags);
>> +
>> + return HRTIMER_NORESTART;
>> }
>>
>> /**
>> @@ -187,8 +241,13 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
>> spin_lock_irqsave(&fw->lock, flags);
>> for_each_fw_domain_masked(domain, ref_rqst, fw, tmp) {
>> if (!domain->ref++) {
>> - awake_rqst |= BIT(domain->id);
>> - domain_wake(gt, domain);
>> + if (fw->awake_domains & BIT(domain->id)) {
>> + fw->timer_domains &= ~BIT(domain->id);
>> + hrtimer_try_to_cancel(&domain->timer);
>> + } else {
>> + awake_rqst |= BIT(domain->id);
>> + domain_wake(gt, domain);
>> + }
>> }
>> ref_incr |= BIT(domain->id);
>> }
>> @@ -213,27 +272,23 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
>> }
>>
>> /**
>> - * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
>> + * xe_force_wake_put - Decrement the refcount and arm the delayed-sleep timer
>> * @fw: Pointer to the force wake structure
>> * @fw_ref: return of xe_force_wake_get()
>> *
>> - * This function reduces the reference counts for domains in fw_ref. If
>> - * refcount for any of the specified domain reaches 0, it puts the domain to sleep
>> - * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
>> - * Warns in case of timeout of ack from domain.
>> + * This function reduces the reference counts for domains in fw_ref. When a
>> + * domain's refcount reaches 0 the sleep request is not issued immediately;
>> + * instead a hrtimer is armed for XE_FORCE_WAKE_HOLD_DELAY_US so that a rapid
>> + * xe_force_wake_get() can reuse the still-awake domain at zero MMIO cost. On
>> + * timer expiry, if the domain is still idle, the sleep request is written.
>> */
>> void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
>> {
>> struct xe_gt *gt = fw->gt;
>> struct xe_force_wake_domain *domain;
>> - unsigned int tmp, sleep = 0;
>> + unsigned int tmp;
>> unsigned long flags;
>> - int ack_fail = 0;
>>
>> - /*
>> - * Avoid unnecessary lock and unlock when the function is called
>> - * in error path of individual domains.
>> - */
>> if (!fw_ref)
>> return;
>>
>> @@ -245,20 +300,59 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
>> xe_gt_assert(gt, domain->ref);
>>
>> if (!--domain->ref) {
>> - sleep |= BIT(domain->id);
>> - domain_sleep(gt, domain);
>> + fw->timer_domains |= BIT(domain->id);
>> + if (hrtimer_callback_running(&domain->timer)) {
>> + domain->timer_rearm = true;
>> + } else {
>> + domain->timer_rearm = false;
>> + hrtimer_start(&domain->timer,
>> + ns_to_ktime(XE_FORCE_WAKE_HOLD_DELAY_US *
>> + NSEC_PER_USEC),
>> + HRTIMER_MODE_REL);
>> + }
>> }
>> }
>> - for_each_fw_domain_masked(domain, sleep, fw, tmp) {
>> - if (domain_sleep_wait(gt, domain) == 0)
>> + spin_unlock_irqrestore(&fw->lock, flags);
>> +}
>> +
>> +/**
>> + * xe_force_wake_flush - Cancel pending delayed-sleep timers and settle domains
>> + * @fw: Pointer to the force wake structure
>> + *
>> + * The delayed-release optimization in xe_force_wake_put() arms a short hrtimer
>> + * instead of putting an idle domain to sleep immediately. That deferred sleep
>> + * performs MMIO and must not be allowed to run after the device has been
>> + * powered down. Callers on the runtime/system suspend path must therefore
>> + * flush any outstanding timers once forcewake has been fully released, before
>> + * the hardware is powered off.
>> + *
>> + * For every domain this cancels the pending timer (synchronously waiting for an
>> + * in-flight callback to finish) and, if the domain is still idle with an
>> + * outstanding deferred sleep, performs the sleep request right away so the
>> + * domain is left in a consistent, fully-asleep state. hrtimer_cancel() must be
>> + * called without holding fw->lock, since the timer callback takes that same
>> + * lock.
>> + */
>> +void xe_force_wake_flush(struct xe_force_wake *fw)
>> +{
>> + struct xe_gt *gt = fw->gt;
>> + struct xe_force_wake_domain *domain;
>> + unsigned int tmp;
>> + unsigned long flags;
>> +
>> + for_each_fw_domain(domain, fw, tmp)
>> + hrtimer_cancel(&domain->timer);
>> +
>> + spin_lock_irqsave(&fw->lock, flags);
>> + for_each_fw_domain(domain, fw, tmp) {
>> + domain->timer_rearm = false;
>> + if ((fw->timer_domains & BIT(domain->id)) && !domain->ref) {
>> + fw->timer_domains &= ~BIT(domain->id);
>> + domain_sleep(gt, domain);
>> fw->awake_domains &= ~BIT(domain->id);
>> - else
>> - ack_fail |= BIT(domain->id);
>> + }
>> }
>> spin_unlock_irqrestore(&fw->lock, flags);
>> -
>> - xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
>> - str_plural(hweight_long(ack_fail)), ack_fail);
>> }
>>
>> const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
>> diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
>> index e2721f205d6c..1b6d5efead38 100644
>> --- a/drivers/gpu/drm/xe/xe_force_wake.h
>> +++ b/drivers/gpu/drm/xe/xe_force_wake.h
>> @@ -11,13 +11,32 @@
>>
>> struct xe_gt;
>>
>> -void xe_force_wake_init_gt(struct xe_gt *gt,
>> - struct xe_force_wake *fw);
>> +int xe_force_wake_init_gt(struct xe_gt *gt,
>> + struct xe_force_wake *fw);
>> void xe_force_wake_init_engines(struct xe_gt *gt,
>> struct xe_force_wake *fw);
>> unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
>> enum xe_force_wake_domains domains);
>> void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref);
>> +void xe_force_wake_flush(struct xe_force_wake *fw);
>> +
>> +/**
>> + * xe_force_wake_put_and_flush - Release forcewake and settle any deferred sleep
>> + * @fw: Pointer to the force wake structure
>> + * @fw_ref: return of xe_force_wake_get()
>> + *
>> + * Convenience helper for paths that must guarantee the domain is fully asleep
>> + * before returning (typically right before the GT is powered off on
>> + * runtime/system suspend). Because the flush has to run after the final put
>> + * but before HW power-off, scope-based cleanup via CLASS(xe_force_wake, ...)
>> + * cannot be used here.
>> + */
>> +static inline void
>> +xe_force_wake_put_and_flush(struct xe_force_wake *fw, unsigned int fw_ref)
>> +{
>> + xe_force_wake_put(fw, fw_ref);
>> + xe_force_wake_flush(fw);
>> +}
>>
>> const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id);
>>
>> diff --git a/drivers/gpu/drm/xe/xe_force_wake_types.h b/drivers/gpu/drm/xe/xe_force_wake_types.h
>> index 14b7b86e801b..ee5675069fe0 100644
>> --- a/drivers/gpu/drm/xe/xe_force_wake_types.h
>> +++ b/drivers/gpu/drm/xe/xe_force_wake_types.h
>> @@ -6,6 +6,7 @@
>> #ifndef _XE_FORCE_WAKE_TYPES_H_
>> #define _XE_FORCE_WAKE_TYPES_H_
>>
>> +#include <linux/hrtimer.h>
>> #include <linux/mutex.h>
>> #include <linux/types.h>
>>
>> @@ -51,6 +52,8 @@ enum xe_force_wake_domains {
>> XE_FORCEWAKE_ALL = BIT(XE_FW_DOMAIN_ID_COUNT)
>> };
>>
>> +struct xe_force_wake;
>> +
>> /**
>> * struct xe_force_wake_domain - Xe force wake power domain
>> *
>> @@ -82,6 +85,12 @@ struct xe_force_wake_domain {
>> u32 mask;
>> /** @ref: domain reference */
>> u32 ref;
>> + /** @timer_rearm: put() ran while callback was in-flight; callback must restart timer */
>> + bool timer_rearm;
>> + /** @timer: hrtimer for delayed sleep request */
>> + struct hrtimer timer;
>> + /** @fw_back: back pointer to parent xe_force_wake */
>> + struct xe_force_wake *fw_back;
>> };
>>
>> /**
>> @@ -101,6 +110,8 @@ struct xe_force_wake {
>> spinlock_t lock;
>> /** @awake_domains: mask of all domains awake */
>> unsigned int awake_domains;
>> + /** @timer_domains: mask of domains with an outstanding delayed-sleep timer */
>> + unsigned int timer_domains;
>> /** @initialized_domains: mask of all initialized domains */
>> unsigned int initialized_domains;
>> /** @domains: force wake domains */
>> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
>> index 783eb6d631b5..bba51a655b28 100644
>> --- a/drivers/gpu/drm/xe/xe_gt.c
>> +++ b/drivers/gpu/drm/xe/xe_gt.c
>> @@ -511,7 +511,9 @@ int xe_gt_init_early(struct xe_gt *gt)
>>
>> xe_wa_process_gt_oob(gt);
>>
>> - xe_force_wake_init_gt(gt, gt_to_fw(gt));
>> + err = xe_force_wake_init_gt(gt, gt_to_fw(gt));
>> + if (err)
>> + return err;
>> spin_lock_init(>->global_invl_lock);
>>
>> err = xe_gt_tlb_inval_init_early(gt);
>> @@ -998,13 +1000,15 @@ void xe_gt_suspend_prepare(struct xe_gt *gt)
>>
>> int xe_gt_suspend(struct xe_gt *gt)
>> {
>> + unsigned int fw_ref;
>> int err;
>>
>> xe_gt_dbg(gt, "suspending\n");
>> xe_gt_sanitize(gt);
>>
>> - CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
>> - if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
>> + fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
>> + if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {
>> + xe_force_wake_put(gt_to_fw(gt), fw_ref);
>> xe_gt_err(gt, "suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
>> return -ETIMEDOUT;
>> }
>> @@ -1012,7 +1016,7 @@ int xe_gt_suspend(struct xe_gt *gt)
>> err = xe_uc_suspend(>->uc);
>> if (err) {
>> xe_gt_err(gt, "suspend failed (%pe)\n", ERR_PTR(err));
>> - return err;
>> + goto err_force_wake;
>> }
>>
>> xe_gt_idle_disable_pg(gt);
>> @@ -1021,7 +1025,10 @@ int xe_gt_suspend(struct xe_gt *gt)
>>
>> xe_gt_dbg(gt, "suspended\n");
>>
>> - return 0;
>> +err_force_wake:
>> + xe_force_wake_put_and_flush(gt_to_fw(gt), fw_ref);
>> +
>> + return err;
>> }
>>
>> void xe_gt_shutdown(struct xe_gt *gt)
>> @@ -1080,10 +1087,13 @@ int xe_gt_resume(struct xe_gt *gt)
>> */
>> int xe_gt_runtime_suspend(struct xe_gt *gt)
>> {
>> + unsigned int fw_ref;
>> +
>> xe_gt_dbg(gt, "runtime suspending\n");
>>
>> - CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
>> - if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
>> + fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
>> + if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {
>> + xe_force_wake_put(gt_to_fw(gt), fw_ref);
>> xe_gt_err(gt, "runtime suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
>> return -ETIMEDOUT;
>> }
>> @@ -1093,6 +1103,8 @@ int xe_gt_runtime_suspend(struct xe_gt *gt)
>>
>> xe_gt_dbg(gt, "runtime suspended\n");
>>
>> + xe_force_wake_put_and_flush(gt_to_fw(gt), fw_ref);
>> +
>> return 0;
>> }
>>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH] drm/xe/forcewake: add delayed-release optimization
2026-06-11 3:15 ` Matthew Brost
@ 2026-06-25 1:37 ` Bai, Zongyao
0 siblings, 0 replies; 34+ messages in thread
From: Bai, Zongyao @ 2026-06-25 1:37 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe, jia.yao, Maarten Lankhorst
On 6/10/2026 8:15 PM, Matthew Brost wrote:
> On Wed, Jun 10, 2026 at 08:09:33PM -0700, Matthew Brost wrote:
>
> Ugh, I realized I replied to wrong version but I think most of comments
> are still relavent to v2, so let's continue the discussion here.
>
> Matt
>
>> On Mon, Jun 01, 2026 at 09:38:04PM +0000, Zongyao Bai wrote:
>>> Add delayed-release optimization:
>>> - Add domain sleep 200us after xe_force_wake_put()
>>> - Skip MMIO wake in xe_force_wake_get() if domain still awake.
>>> Reduces frequent wake/sleep cycles for back-to-back operations.
>>> Examples of scenarios: zeDeviceGetGlobalTimestamps read by VTune, PTI
>>>
>> I think this concept makes sense, as MMIO read operations are relatively
>> expensive in terms of time cost (perhaps ~5 µs). However, the downside
>> is increased power usage.
>>
>> Should we make delayed release an optional call—for example,
>> xe_force_wake_put_delay—and only use it in specific critical paths? For
>> instance, we could limit its use to paths tied to Level Zero calls like
>> zeDeviceGetGlobalTimestamps.
>>
>> This gets a bit tricky if xe_force_wake_put_delay is called and is not
>> the last reference, followed by xe_force_wake_put being the final
>> reference. However, it should be straightforward to track that an
>> delayed put was requested and have the final xe_force_wake_put issue the
>> delay.
Hi Matt,
Thank you to review the patch!
1. Without this patch, the avg MMIO read cost about 17 µs, and with
delayed-release, it is ~5 µs.
2. Maarten also had questions about #define XE_FORCE_WAKE_HOLD_DELAY_US
200 I run a compare test with 25/50/75/100/125/... And 100 is the
first workable value.
Will change the default value from 200 to 100 for better power usage.
3. Should we make delayed release an optional call -> need more time to
think about it. I'll send out the v3 version for below review
suggestions first.
zongyao
>>> Signed-off-by: Zongyao Bai<zongyao.bai@intel.com>
>>> ---
>>> drivers/gpu/drm/xe/xe_force_wake.c | 111 +++++++++++++++++------
>>> drivers/gpu/drm/xe/xe_force_wake.h | 4 +-
>>> drivers/gpu/drm/xe/xe_force_wake_types.h | 11 +++
>>> drivers/gpu/drm/xe/xe_gt.c | 4 +-
>>> 4 files changed, 99 insertions(+), 31 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
>>> index 197e2197bd0a..183a17fa6d68 100644
>>> --- a/drivers/gpu/drm/xe/xe_force_wake.c
>>> +++ b/drivers/gpu/drm/xe/xe_force_wake.c
>>> @@ -6,15 +6,20 @@
>>> #include "xe_force_wake.h"
>>>
>>> #include <drm/drm_util.h>
>>> +#include <linux/device.h>
>>> +#include <linux/hrtimer.h>
>>>
>>> #include "regs/xe_gt_regs.h"
>>> #include "regs/xe_reg_defs.h"
>>> +#include "xe_device.h"
>>> #include "xe_gt.h"
>>> #include "xe_gt_printk.h"
>>> #include "xe_mmio.h"
>>> +#include "xe_pm.h"
>>> #include "xe_sriov.h"
>>>
>>> #define XE_FORCE_WAKE_ACK_TIMEOUT_MS 50
>>> +#define XE_FORCE_WAKE_HOLD_DELAY_US 200
>> How did you choose this value? It seems like it should be something
>> configurable via Kconfig or configfs.
As wrote above, 100 is a better value. I'll set 100 as default.
Yes, it is better to make "XE_FORCE_WAKE_HOLD_DELAY_US" configurable.
Will add this parameter to configfs in next version.
Zongyao
>>>
>>> static const char *str_wake_sleep(bool wake)
>>> {
>>> @@ -27,6 +32,8 @@ static void mark_domain_initialized(struct xe_force_wake *fw,
>>> fw->initialized_domains |= BIT(id);
>>> }
>>>
>>> +static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer);
>>> +
>>> static void init_domain(struct xe_force_wake *fw,
>>> enum xe_force_wake_domain_id id,
>>> struct xe_reg reg, struct xe_reg ack)
>>> @@ -38,11 +45,29 @@ static void init_domain(struct xe_force_wake *fw,
>>> domain->reg_ack = ack;
>>> domain->val = FORCEWAKE_MT(FORCEWAKE_KERNEL);
>>> domain->mask = FORCEWAKE_MT_MASK(FORCEWAKE_KERNEL);
>>> + domain->fw_back = fw;
>>> + hrtimer_setup(&domain->timer, xe_force_wake_domain_timer,
>>> + CLOCK_MONOTONIC, HRTIMER_MODE_REL);
>>>
>>> mark_domain_initialized(fw, id);
>>> }
>>>
>>> -void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
>>> +static void xe_force_wake_fini(void *arg)
>>> +{
>>> + struct xe_force_wake *fw = arg;
>>> + struct xe_gt *gt = fw->gt;
>>> + struct xe_force_wake_domain *domain;
>>> + unsigned int tmp;
>>> +
>>> + for_each_fw_domain(domain, fw, tmp) {
>>> + xe_gt_WARN(gt, domain->ref,
>>> + "Forcewake domain %d still referenced (%u) at teardown\n",
>>> + domain->id, domain->ref);
>> Is the warning above actually valid? It seems fairly normal for a fini
>> to race with a delayed fw put. I would drop this.
Got it. Will drop this WARN.
Zongyao
>>> + hrtimer_cancel(&domain->timer);
>>> + }
>>> +}
>>> +
>>> +int xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
>>> {
>>> struct xe_device *xe = gt_to_xe(gt);
>>>
>>> @@ -58,6 +83,8 @@ void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
>>> FORCEWAKE_GT,
>>> FORCEWAKE_ACK_GT);
>>> }
>>> +
>>> + return devm_add_action_or_reset(xe->drm.dev, xe_force_wake_fini, fw);
>>> }
>>>
>>> void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw)
>>> @@ -142,10 +169,36 @@ static void domain_sleep(struct xe_gt *gt, struct xe_force_wake_domain *domain)
>>> __domain_ctl(gt, domain, false);
>>> }
>>>
>>> -static int domain_sleep_wait(struct xe_gt *gt,
>>> - struct xe_force_wake_domain *domain)
>>> +static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer)
>>> {
>>> - return __domain_wait(gt, domain, false);
>>> + struct xe_force_wake_domain *domain =
>>> + container_of(timer, struct xe_force_wake_domain, timer);
>>> + struct xe_force_wake *fw = domain->fw_back;
>>> + struct xe_gt *gt = fw->gt;
>>> + unsigned long flags;
>>> +
>>> + xe_gt_assert(gt, !xe_pm_runtime_suspended(gt_to_xe(gt)));
>>> +
>>> + spin_lock_irqsave(&fw->lock, flags);
>> I'd use guard(spinlock_irqsave) here rather manually unlock this.
>> hrtimer_forward_now should be safe under fw->lock unless I'm missing
>> something.
Thanks Matt. Yes, it's much better. I don't know guard() before.
Will modify here in next version.
zongyao
>>> +
>>> + if (!(fw->timer_domains & BIT(domain->id)) || domain->ref) {
>>> + spin_unlock_irqrestore(&fw->lock, flags);
>>> + return HRTIMER_NORESTART;
>>> + }
>>> + if (domain->timer_rearm) {
>>> + domain->timer_rearm = false;
>>> + spin_unlock_irqrestore(&fw->lock, flags);
>>> + hrtimer_forward_now(timer,
>>> + ns_to_ktime(XE_FORCE_WAKE_HOLD_DELAY_US *
>>> + NSEC_PER_USEC));
>>> + return HRTIMER_RESTART;
>>> + }
>>> + fw->timer_domains &= ~BIT(domain->id);
>>> + domain_sleep(gt, domain);
>>> + fw->awake_domains &= ~BIT(domain->id);
>>> + spin_unlock_irqrestore(&fw->lock, flags);
>>> +
>>> + return HRTIMER_NORESTART;
>>> }
>>>
>>> /**
>>> @@ -187,8 +240,13 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
>>> spin_lock_irqsave(&fw->lock, flags);
>>> for_each_fw_domain_masked(domain, ref_rqst, fw, tmp) {
>>> if (!domain->ref++) {
>>> - awake_rqst |= BIT(domain->id);
>>> - domain_wake(gt, domain);
>>> + if (fw->awake_domains & BIT(domain->id)) {
>>> + fw->timer_domains &= ~BIT(domain->id);
>>> + hrtimer_try_to_cancel(&domain->timer);
>>> + } else {
>>> + awake_rqst |= BIT(domain->id);
>>> + domain_wake(gt, domain);
>>> + }
>>> }
>>> ref_incr |= BIT(domain->id);
>>> }
>>> @@ -213,27 +271,25 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
>>> }
>>>
>>> /**
>>> - * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
>>> + * xe_force_wake_put - Decrement the refcount and arm the delayed-sleep timer
>>> * @fw: Pointer to the force wake structure
>>> * @fw_ref: return of xe_force_wake_get()
>>> *
>>> - * This function reduces the reference counts for domains in fw_ref. If
>>> - * refcount for any of the specified domain reaches 0, it puts the domain to sleep
>>> - * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
>>> - * Warns in case of timeout of ack from domain.
>>> + * This function reduces the reference counts for domains in fw_ref. When a
>>> + * domain's refcount reaches 0 the sleep request is not issued immediately;
>>> + * instead a hrtimer is armed for XE_FORCE_WAKE_HOLD_DELAY_US so that a rapid
>>> + * xe_force_wake_get() can reuse the still-awake domain at zero MMIO cost. On
>>> + * timer expiry, if the domain is still idle, the sleep request is written.
>>> + * Mirroring i915's fw_domains_put(), the deferred sleep is fire-and-forget:
>>> + * no sleep ACK is polled, since the next wake re-waits for the wake ACK.
>> Let's not mention the i915 in Xe code.
My bad, will update in next version.
Zongyao
>>
>>> */
>>> void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
>>> {
>>> struct xe_gt *gt = fw->gt;
>>> struct xe_force_wake_domain *domain;
>>> - unsigned int tmp, sleep = 0;
>>> + unsigned int tmp;
>>> unsigned long flags;
>>> - int ack_fail = 0;
>>>
>>> - /*
>>> - * Avoid unnecessary lock and unlock when the function is called
>>> - * in error path of individual domains.
>>> - */
>> Why delete this comment?
I thought this comment is generated by AI.
Will add it back.
Zongyao
>>
>>> if (!fw_ref)
>>> return;
>>>
>>> @@ -245,20 +301,19 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
>>> xe_gt_assert(gt, domain->ref);
>>>
>>> if (!--domain->ref) {
>>> - sleep |= BIT(domain->id);
>>> - domain_sleep(gt, domain);
>>> + fw->timer_domains |= BIT(domain->id);
>>> + if (hrtimer_callback_running(&domain->timer)) {
>>> + domain->timer_rearm = true;
>>> + } else {
>>> + domain->timer_rearm = false;
>>> + hrtimer_start(&domain->timer,
>>> + ns_to_ktime(XE_FORCE_WAKE_HOLD_DELAY_US *
>>> + NSEC_PER_USEC),
>>> + HRTIMER_MODE_REL);
>>> + }
>>> }
>>> }
>>> - for_each_fw_domain_masked(domain, sleep, fw, tmp) {
>>> - if (domain_sleep_wait(gt, domain) == 0)
>>> - fw->awake_domains &= ~BIT(domain->id);
>>> - else
>>> - ack_fail |= BIT(domain->id);
>>> - }
>>> spin_unlock_irqrestore(&fw->lock, flags);
>>> -
>>> - xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
>>> - str_plural(hweight_long(ack_fail)), ack_fail);
>> This deleted code for domain_sleep_wait / error probably needs to be in
>> xe_force_wake_domain_timer.
This follow the i915 driver behavior: don't wait for the sleep ACK in
xe_force_wake_put().
Any timing issue from the sleep not completing is self-correcting: the
next xe_force_wake_get()
will wait for the wake ACK, then re-synchronizes hardware state.
That is one of the main optimizations here, saving ~33µs per put(). So
I'd like to keep this design if in low risk.
Zongyao
>>
>>> }
>>>
>>> const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
>>> diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
>>> index e2721f205d6c..19679b923dca 100644
>>> --- a/drivers/gpu/drm/xe/xe_force_wake.h
>>> +++ b/drivers/gpu/drm/xe/xe_force_wake.h
>>> @@ -11,8 +11,8 @@
>>>
>>> struct xe_gt;
>>>
>>> -void xe_force_wake_init_gt(struct xe_gt *gt,
>>> - struct xe_force_wake *fw);
>>> +int xe_force_wake_init_gt(struct xe_gt *gt,
>>> + struct xe_force_wake *fw);
>>> void xe_force_wake_init_engines(struct xe_gt *gt,
>>> struct xe_force_wake *fw);
>>> unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
>>> diff --git a/drivers/gpu/drm/xe/xe_force_wake_types.h b/drivers/gpu/drm/xe/xe_force_wake_types.h
>>> index 14b7b86e801b..ee5675069fe0 100644
>>> --- a/drivers/gpu/drm/xe/xe_force_wake_types.h
>>> +++ b/drivers/gpu/drm/xe/c
>>> @@ -6,6 +6,7 @@
>>> #ifndef _XE_FORCE_WAKE_TYPES_H_
>>> #define _XE_FORCE_WAKE_TYPES_H_
>>>
>>> +#include <linux/hrtimer.h>
>>> #include <linux/mutex.h>
>>> #include <linux/types.h>
>>>
>>> @@ -51,6 +52,8 @@ enum xe_force_wake_domains {
>>> XE_FORCEWAKE_ALL = BIT(XE_FW_DOMAIN_ID_COUNT)
>>> };
>>>
>>> +struct xe_force_wake;
>>> +
>>> /**
>>> * struct xe_force_wake_domain - Xe force wake power domain
>>> *
>>> @@ -82,6 +85,12 @@ struct xe_force_wake_domain {
>>> u32 mask;
>>> /** @ref: domain reference */
>>> u32 ref;
>>> + /** @timer_rearm: put() ran while callback was in-flight; callback must restart timer */
>> Protected fw_back->lock.
got it.
zongyao
>>
>>> + bool timer_rearm;
>> In general, I’d reorganize the layout so that structs are at the top of
>> xe_force_wake_domain, followed by u32 fields, and finally the bool
>> fields.
>>
>>> + /** @timer: hrtimer for delayed sleep request */
>>> + struct hrtimer timer;
>>> + /** @fw_back: back pointer to parent xe_force_wake */
>>> + struct xe_force_wake *fw_back;
>>> };
>>>
>>> /**
>>> @@ -101,6 +110,8 @@ struct xe_force_wake {
>>> spinlock_t lock;
>>> /** @awake_domains: mask of all domains awake */
>>> unsigned int awake_domains;
>>> + /** @timer_domains: mask of domains with an outstanding delayed-sleep timer */
Will add "Protected by @lock." as above.
zongyao
>>> + unsigned int timer_domains;
>>> /** @initialized_domains: mask of all initialized domains */
>>> unsigned int initialized_domains;
>>> /** @domains: force wake domains */
>>> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
>>> index 783eb6d631b5..43a79698cd04 100644
>>> --- a/drivers/gpu/drm/xe/xe_gt.c
>>> +++ b/drivers/gpu/drm/xe/xe_gt.c
>>> @@ -511,7 +511,9 @@ int xe_gt_init_early(struct xe_gt *gt)
>>>
>>> xe_wa_process_gt_oob(gt);
>>>
>>> - xe_force_wake_init_gt(gt, gt_to_fw(gt));
>>> + err = xe_force_wake_init_gt(gt, gt_to_fw(gt));
>>> + if (err)
>>> + return err;
>> I'd add newline here.
>>
>> Matt
Got it.
Zongyao
>>> spin_lock_init(>->global_invl_lock);
>>>
>>> err = xe_gt_tlb_inval_init_early(gt);
>>> --
>>> 2.43.0
>>>
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v3] drm/xe/forcewake: add delayed-release optimization
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (7 preceding siblings ...)
2026-06-11 11:29 ` ✓ Xe.CI.FULL: success for drm/xe/forcewake: add delayed-release optimization (rev2) Patchwork
@ 2026-06-25 8:19 ` Zongyao Bai
2026-06-25 8:51 ` ✓ CI.KUnit: success for drm/xe/forcewake: add delayed-release optimization (rev3) Patchwork
` (10 subsequent siblings)
19 siblings, 0 replies; 34+ messages in thread
From: Zongyao Bai @ 2026-06-25 8:19 UTC (permalink / raw)
To: intel-xe; +Cc: jia.yao, matthew.brost, Zongyao Bai
Add delayed-release optimization:
- Add domain sleep XE_FORCE_WAKE_HOLD_DELAY_US after xe_force_wake_put()
- Skip MMIO wake in xe_force_wake_get() if domain still awake.
Reduces frequent wake/sleep cycles for back-to-back operations.
Examples of scenarios: zeDeviceGetGlobalTimestamps read by VTune, PTI
v2:
- Add xe_force_wake_flush() and call it on the runtime/system
suspend paths to ensure no deferred-sleep runs after GT power-off.
(Sashiko)
v3:
- Add configfs for XE_DEFAULT_FORCE_WAKE_HOLD_DELAY_US. (Matt)
- Modify the default value of forcewake_hold_delay_us to 100. (Maarten)
- Use guard(spinlock_irqsave) in the delayed-sleep timer callback. (Matt)
- Drop the redundant refcount WARN in xe_force_wake_fini(). (Matt)
- Document the spinlock protection of the timer_rearm / timer_domains
fields, and reorder struct xe_force_wake_domain by member type. (Matt)
Assisted-by: GitHub-Copilot:claude-sonnet-4.6
Assisted-by: GitHub-Copilot:claude-opus-4.8 #v2
Assisted-by: GitHub-Copilot:claude-opus-4.8 #v3
Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
---
drivers/gpu/drm/xe/xe_configfs.c | 67 +++++++++++
drivers/gpu/drm/xe/xe_configfs.h | 5 +
drivers/gpu/drm/xe/xe_defaults.h | 1 +
drivers/gpu/drm/xe/xe_device.c | 2 +
drivers/gpu/drm/xe/xe_device_types.h | 3 +
drivers/gpu/drm/xe/xe_force_wake.c | 135 +++++++++++++++++++----
drivers/gpu/drm/xe/xe_force_wake.h | 23 +++-
drivers/gpu/drm/xe/xe_force_wake_types.h | 17 +++
drivers/gpu/drm/xe/xe_gt.c | 27 +++--
9 files changed, 249 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 32102600a148..c17ec2e20992 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -237,6 +237,18 @@
*
* This setting only takes effect when probing the device.
*
+ * Force wake hold delay:
+ * ----------------------
+ *
+ * Delay in microseconds before an idle forcewake domain is put to sleep after
+ * the last reference is dropped. Keeping the domain awake for this short
+ * window lets rapid back-to-back accesses reuse a still-awake domain without
+ * paying the cost of a full wake + ACK cycle each time. Example::
+ *
+ * # echo 100 > /sys/kernel/config/xe/0000:03:00.0/forcewake_hold_delay_us
+ *
+ * This attribute can only be set before binding to the device.
+ *
* Remove devices
* ==============
*
@@ -262,6 +274,7 @@ struct xe_config_group_device {
struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
bool survivability_mode;
bool enable_psmi;
+ u32 forcewake_hold_delay_us;
struct {
unsigned int max_vfs;
bool admin_only_pf;
@@ -281,6 +294,7 @@ static const struct xe_config_device device_defaults = {
.engines_allowed = U64_MAX,
.survivability_mode = false,
.enable_psmi = false,
+ .forcewake_hold_delay_us = XE_DEFAULT_FORCE_WAKE_HOLD_DELAY_US,
.sriov = {
.max_vfs = XE_DEFAULT_MAX_VFS,
.admin_only_pf = XE_DEFAULT_ADMIN_ONLY_PF,
@@ -575,6 +589,36 @@ static ssize_t enable_psmi_store(struct config_item *item, const char *page, siz
return len;
}
+static ssize_t forcewake_hold_delay_us_show(struct config_item *item, char *page)
+{
+ struct xe_config_device *dev = to_xe_config_device(item);
+
+ return sprintf(page, "%u\n", dev->forcewake_hold_delay_us);
+}
+
+static ssize_t forcewake_hold_delay_us_store(struct config_item *item,
+ const char *page, size_t len)
+{
+ struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ u32 val;
+ int ret;
+
+ ret = kstrtouint(page, 0, &val);
+ if (ret)
+ return ret;
+
+ if (!val)
+ return -EINVAL;
+
+ guard(mutex)(&dev->lock);
+ if (is_bound(dev))
+ return -EBUSY;
+
+ dev->config.forcewake_hold_delay_us = val;
+
+ return len;
+}
+
static bool wa_bb_read_advance(bool dereference, char **p,
const char *append, size_t len,
size_t *max_size)
@@ -814,6 +858,7 @@ CONFIGFS_ATTR(, ctx_restore_mid_bb);
CONFIGFS_ATTR(, ctx_restore_post_bb);
CONFIGFS_ATTR(, enable_psmi);
CONFIGFS_ATTR(, engines_allowed);
+CONFIGFS_ATTR(, forcewake_hold_delay_us);
CONFIGFS_ATTR(, gt_types_allowed);
CONFIGFS_ATTR(, survivability_mode);
@@ -822,6 +867,7 @@ static struct configfs_attribute *xe_config_device_attrs[] = {
&attr_ctx_restore_post_bb,
&attr_enable_psmi,
&attr_engines_allowed,
+ &attr_forcewake_hold_delay_us,
&attr_gt_types_allowed,
&attr_survivability_mode,
NULL,
@@ -1099,6 +1145,7 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
PRI_CUSTOM_ATTR("%llx", engines_allowed);
PRI_CUSTOM_ATTR("%d", enable_psmi);
PRI_CUSTOM_ATTR("%d", survivability_mode);
+ PRI_CUSTOM_ATTR("%u", forcewake_hold_delay_us);
PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
#undef PRI_CUSTOM_ATTR
@@ -1225,6 +1272,26 @@ bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
return ret;
}
+/**
+ * xe_configfs_get_forcewake_hold_delay_us - get configfs forcewake_hold_delay_us setting
+ * @pdev: pci device
+ *
+ * Return: forcewake_hold_delay_us setting in configfs
+ */
+u32 xe_configfs_get_forcewake_hold_delay_us(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+ u32 ret;
+
+ if (!dev)
+ return device_defaults.forcewake_hold_delay_us;
+
+ ret = dev->config.forcewake_hold_delay_us;
+ config_group_put(&dev->group);
+
+ return ret;
+}
+
/**
* xe_configfs_get_ctx_restore_mid_bb - get configfs ctx_restore_mid_bb setting
* @pdev: pci device
diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
index 07d62bf0c152..a54e9bba3208 100644
--- a/drivers/gpu/drm/xe/xe_configfs.h
+++ b/drivers/gpu/drm/xe/xe_configfs.h
@@ -23,6 +23,7 @@ bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
+u32 xe_configfs_get_forcewake_hold_delay_us(struct pci_dev *pdev);
u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
enum xe_engine_class class,
const u32 **cs);
@@ -42,6 +43,10 @@ static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return
static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; }
static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
+static inline u32 xe_configfs_get_forcewake_hold_delay_us(struct pci_dev *pdev)
+{
+ return XE_DEFAULT_FORCE_WAKE_HOLD_DELAY_US;
+}
static inline u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
enum xe_engine_class class,
const u32 **cs) { return 0; }
diff --git a/drivers/gpu/drm/xe/xe_defaults.h b/drivers/gpu/drm/xe/xe_defaults.h
index c8ae1d5f3d60..3d8f57a54547 100644
--- a/drivers/gpu/drm/xe/xe_defaults.h
+++ b/drivers/gpu/drm/xe/xe_defaults.h
@@ -22,5 +22,6 @@
#define XE_DEFAULT_WEDGED_MODE XE_WEDGED_MODE_UPON_CRITICAL_ERROR
#define XE_DEFAULT_WEDGED_MODE_STR "upon-critical-error"
#define XE_DEFAULT_SVM_NOTIFIER_SIZE 512
+#define XE_DEFAULT_FORCE_WAKE_HOLD_DELAY_US 100
#endif
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index d224861b6f6f..75e8e4f7bc59 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -541,6 +541,8 @@ int xe_device_init_early(struct xe_device *xe)
xe->atomic_svm_timeslice_ms = 5;
xe->min_run_period_lr_ms = 5;
+ xe->forcewake_hold_delay_us =
+ xe_configfs_get_forcewake_hold_delay_us(to_pci_dev(xe->drm.dev));
err = xe_irq_init(xe);
if (err)
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 32dd2ffbc796..a52e419be3c9 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -524,6 +524,9 @@ struct xe_device {
/** @min_run_period_pf_ms: LR VM (page fault mode) timeslice */
u32 min_run_period_pf_ms;
+ /** @forcewake_hold_delay_us: Delayed forcewake release window in microseconds. */
+ u32 forcewake_hold_delay_us;
+
#ifdef TEST_VM_OPS_ERROR
/**
* @vm_inject_error_position: inject errors at different places in VM
diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
index 197e2197bd0a..e91f2ffc8655 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.c
+++ b/drivers/gpu/drm/xe/xe_force_wake.c
@@ -6,12 +6,17 @@
#include "xe_force_wake.h"
#include <drm/drm_util.h>
+#include <linux/cleanup.h>
+#include <linux/device.h>
+#include <linux/hrtimer.h>
#include "regs/xe_gt_regs.h"
#include "regs/xe_reg_defs.h"
+#include "xe_device.h"
#include "xe_gt.h"
#include "xe_gt_printk.h"
#include "xe_mmio.h"
+#include "xe_pm.h"
#include "xe_sriov.h"
#define XE_FORCE_WAKE_ACK_TIMEOUT_MS 50
@@ -27,6 +32,8 @@ static void mark_domain_initialized(struct xe_force_wake *fw,
fw->initialized_domains |= BIT(id);
}
+static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer);
+
static void init_domain(struct xe_force_wake *fw,
enum xe_force_wake_domain_id id,
struct xe_reg reg, struct xe_reg ack)
@@ -38,11 +45,24 @@ static void init_domain(struct xe_force_wake *fw,
domain->reg_ack = ack;
domain->val = FORCEWAKE_MT(FORCEWAKE_KERNEL);
domain->mask = FORCEWAKE_MT_MASK(FORCEWAKE_KERNEL);
+ domain->fw_back = fw;
+ hrtimer_setup(&domain->timer, xe_force_wake_domain_timer,
+ CLOCK_MONOTONIC, HRTIMER_MODE_REL);
mark_domain_initialized(fw, id);
}
-void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
+static void xe_force_wake_fini(void *arg)
+{
+ struct xe_force_wake *fw = arg;
+ struct xe_force_wake_domain *domain;
+ unsigned int tmp;
+
+ for_each_fw_domain(domain, fw, tmp)
+ hrtimer_cancel(&domain->timer);
+}
+
+int xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
{
struct xe_device *xe = gt_to_xe(gt);
@@ -58,6 +78,8 @@ void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
FORCEWAKE_GT,
FORCEWAKE_ACK_GT);
}
+
+ return devm_add_action_or_reset(xe->drm.dev, xe_force_wake_fini, fw);
}
void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw)
@@ -142,10 +164,34 @@ static void domain_sleep(struct xe_gt *gt, struct xe_force_wake_domain *domain)
__domain_ctl(gt, domain, false);
}
-static int domain_sleep_wait(struct xe_gt *gt,
- struct xe_force_wake_domain *domain)
+static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer)
{
- return __domain_wait(gt, domain, false);
+ struct xe_force_wake_domain *domain =
+ container_of(timer, struct xe_force_wake_domain, timer);
+ struct xe_force_wake *fw = domain->fw_back;
+ struct xe_gt *gt = fw->gt;
+ struct xe_device *xe = gt_to_xe(gt);
+
+ xe_gt_assert(gt, !xe_pm_runtime_suspended(gt_to_xe(gt)));
+
+ guard(spinlock_irqsave)(&fw->lock);
+
+ if (!(fw->timer_domains & BIT(domain->id)) || domain->ref)
+ return HRTIMER_NORESTART;
+
+ if (domain->timer_rearm) {
+ domain->timer_rearm = false;
+ hrtimer_forward_now(timer,
+ ns_to_ktime(xe->forcewake_hold_delay_us *
+ NSEC_PER_USEC));
+ return HRTIMER_RESTART;
+ }
+
+ fw->timer_domains &= ~BIT(domain->id);
+ domain_sleep(gt, domain);
+ fw->awake_domains &= ~BIT(domain->id);
+
+ return HRTIMER_NORESTART;
}
/**
@@ -187,8 +233,13 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
spin_lock_irqsave(&fw->lock, flags);
for_each_fw_domain_masked(domain, ref_rqst, fw, tmp) {
if (!domain->ref++) {
- awake_rqst |= BIT(domain->id);
- domain_wake(gt, domain);
+ if (fw->awake_domains & BIT(domain->id)) {
+ fw->timer_domains &= ~BIT(domain->id);
+ hrtimer_try_to_cancel(&domain->timer);
+ } else {
+ awake_rqst |= BIT(domain->id);
+ domain_wake(gt, domain);
+ }
}
ref_incr |= BIT(domain->id);
}
@@ -213,22 +264,23 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
}
/**
- * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
+ * xe_force_wake_put - Decrement the refcount and arm the delayed-sleep timer
* @fw: Pointer to the force wake structure
* @fw_ref: return of xe_force_wake_get()
*
- * This function reduces the reference counts for domains in fw_ref. If
- * refcount for any of the specified domain reaches 0, it puts the domain to sleep
- * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
- * Warns in case of timeout of ack from domain.
+ * This function reduces the reference counts for domains in fw_ref. When a
+ * domain's refcount reaches 0 the sleep request is not issued immediately;
+ * instead a hrtimer is armed for xe->forcewake_hold_delay_us so that a rapid
+ * xe_force_wake_get() can reuse the still-awake domain at zero MMIO cost. On
+ * timer expiry, if the domain is still idle, the sleep request is written.
*/
void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
{
struct xe_gt *gt = fw->gt;
+ struct xe_device *xe = gt_to_xe(gt);
struct xe_force_wake_domain *domain;
- unsigned int tmp, sleep = 0;
+ unsigned int tmp;
unsigned long flags;
- int ack_fail = 0;
/*
* Avoid unnecessary lock and unlock when the function is called
@@ -245,20 +297,59 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
xe_gt_assert(gt, domain->ref);
if (!--domain->ref) {
- sleep |= BIT(domain->id);
- domain_sleep(gt, domain);
+ fw->timer_domains |= BIT(domain->id);
+ if (hrtimer_callback_running(&domain->timer)) {
+ domain->timer_rearm = true;
+ } else {
+ domain->timer_rearm = false;
+ hrtimer_start(&domain->timer,
+ ns_to_ktime(xe->forcewake_hold_delay_us *
+ NSEC_PER_USEC),
+ HRTIMER_MODE_REL);
+ }
}
}
- for_each_fw_domain_masked(domain, sleep, fw, tmp) {
- if (domain_sleep_wait(gt, domain) == 0)
+ spin_unlock_irqrestore(&fw->lock, flags);
+}
+
+/**
+ * xe_force_wake_flush - Cancel pending delayed-sleep timers and settle domains
+ * @fw: Pointer to the force wake structure
+ *
+ * The delayed-release optimization in xe_force_wake_put() arms a short hrtimer
+ * instead of putting an idle domain to sleep immediately. That deferred sleep
+ * performs MMIO and must not be allowed to run after the device has been
+ * powered down. Callers on the runtime/system suspend path must therefore
+ * flush any outstanding timers once forcewake has been fully released, before
+ * the hardware is powered off.
+ *
+ * For every domain this cancels the pending timer (synchronously waiting for an
+ * in-flight callback to finish) and, if the domain is still idle with an
+ * outstanding deferred sleep, performs the sleep request right away so the
+ * domain is left in a consistent, fully-asleep state. hrtimer_cancel() must be
+ * called without holding fw->lock, since the timer callback takes that same
+ * lock.
+ */
+void xe_force_wake_flush(struct xe_force_wake *fw)
+{
+ struct xe_gt *gt = fw->gt;
+ struct xe_force_wake_domain *domain;
+ unsigned int tmp;
+ unsigned long flags;
+
+ for_each_fw_domain(domain, fw, tmp)
+ hrtimer_cancel(&domain->timer);
+
+ spin_lock_irqsave(&fw->lock, flags);
+ for_each_fw_domain(domain, fw, tmp) {
+ domain->timer_rearm = false;
+ if ((fw->timer_domains & BIT(domain->id)) && !domain->ref) {
+ fw->timer_domains &= ~BIT(domain->id);
+ domain_sleep(gt, domain);
fw->awake_domains &= ~BIT(domain->id);
- else
- ack_fail |= BIT(domain->id);
+ }
}
spin_unlock_irqrestore(&fw->lock, flags);
-
- xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
- str_plural(hweight_long(ack_fail)), ack_fail);
}
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
index e2721f205d6c..1b6d5efead38 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.h
+++ b/drivers/gpu/drm/xe/xe_force_wake.h
@@ -11,13 +11,32 @@
struct xe_gt;
-void xe_force_wake_init_gt(struct xe_gt *gt,
- struct xe_force_wake *fw);
+int xe_force_wake_init_gt(struct xe_gt *gt,
+ struct xe_force_wake *fw);
void xe_force_wake_init_engines(struct xe_gt *gt,
struct xe_force_wake *fw);
unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
enum xe_force_wake_domains domains);
void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref);
+void xe_force_wake_flush(struct xe_force_wake *fw);
+
+/**
+ * xe_force_wake_put_and_flush - Release forcewake and settle any deferred sleep
+ * @fw: Pointer to the force wake structure
+ * @fw_ref: return of xe_force_wake_get()
+ *
+ * Convenience helper for paths that must guarantee the domain is fully asleep
+ * before returning (typically right before the GT is powered off on
+ * runtime/system suspend). Because the flush has to run after the final put
+ * but before HW power-off, scope-based cleanup via CLASS(xe_force_wake, ...)
+ * cannot be used here.
+ */
+static inline void
+xe_force_wake_put_and_flush(struct xe_force_wake *fw, unsigned int fw_ref)
+{
+ xe_force_wake_put(fw, fw_ref);
+ xe_force_wake_flush(fw);
+}
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id);
diff --git a/drivers/gpu/drm/xe/xe_force_wake_types.h b/drivers/gpu/drm/xe/xe_force_wake_types.h
index 14b7b86e801b..14c256bd487e 100644
--- a/drivers/gpu/drm/xe/xe_force_wake_types.h
+++ b/drivers/gpu/drm/xe/xe_force_wake_types.h
@@ -6,6 +6,7 @@
#ifndef _XE_FORCE_WAKE_TYPES_H_
#define _XE_FORCE_WAKE_TYPES_H_
+#include <linux/hrtimer.h>
#include <linux/mutex.h>
#include <linux/types.h>
@@ -51,6 +52,8 @@ enum xe_force_wake_domains {
XE_FORCEWAKE_ALL = BIT(XE_FW_DOMAIN_ID_COUNT)
};
+struct xe_force_wake;
+
/**
* struct xe_force_wake_domain - Xe force wake power domain
*
@@ -76,12 +79,21 @@ struct xe_force_wake_domain {
struct xe_reg reg_ctl;
/** @reg_ack: domain ack register address */
struct xe_reg reg_ack;
+ /** @timer: hrtimer for delayed sleep request */
+ struct hrtimer timer;
+ /** @fw_back: back pointer to parent xe_force_wake */
+ struct xe_force_wake *fw_back;
/** @val: domain wake write value */
u32 val;
/** @mask: domain mask */
u32 mask;
/** @ref: domain reference */
u32 ref;
+ /**
+ * @timer_rearm: put() ran while callback was in-flight; callback must
+ * restart timer. Protected by @fw_back->lock.
+ */
+ bool timer_rearm;
};
/**
@@ -101,6 +113,11 @@ struct xe_force_wake {
spinlock_t lock;
/** @awake_domains: mask of all domains awake */
unsigned int awake_domains;
+ /**
+ * @timer_domains: mask of domains with an outstanding delayed-sleep
+ * timer. Protected by @lock.
+ */
+ unsigned int timer_domains;
/** @initialized_domains: mask of all initialized domains */
unsigned int initialized_domains;
/** @domains: force wake domains */
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 783eb6d631b5..fdae8333fefc 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -511,7 +511,10 @@ int xe_gt_init_early(struct xe_gt *gt)
xe_wa_process_gt_oob(gt);
- xe_force_wake_init_gt(gt, gt_to_fw(gt));
+ err = xe_force_wake_init_gt(gt, gt_to_fw(gt));
+ if (err)
+ return err;
+
spin_lock_init(>->global_invl_lock);
err = xe_gt_tlb_inval_init_early(gt);
@@ -998,13 +1001,15 @@ void xe_gt_suspend_prepare(struct xe_gt *gt)
int xe_gt_suspend(struct xe_gt *gt)
{
+ unsigned int fw_ref;
int err;
xe_gt_dbg(gt, "suspending\n");
xe_gt_sanitize(gt);
- CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
- if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
+ fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+ if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {
+ xe_force_wake_put(gt_to_fw(gt), fw_ref);
xe_gt_err(gt, "suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
return -ETIMEDOUT;
}
@@ -1012,7 +1017,7 @@ int xe_gt_suspend(struct xe_gt *gt)
err = xe_uc_suspend(>->uc);
if (err) {
xe_gt_err(gt, "suspend failed (%pe)\n", ERR_PTR(err));
- return err;
+ goto err_force_wake;
}
xe_gt_idle_disable_pg(gt);
@@ -1021,7 +1026,10 @@ int xe_gt_suspend(struct xe_gt *gt)
xe_gt_dbg(gt, "suspended\n");
- return 0;
+err_force_wake:
+ xe_force_wake_put_and_flush(gt_to_fw(gt), fw_ref);
+
+ return err;
}
void xe_gt_shutdown(struct xe_gt *gt)
@@ -1080,10 +1088,13 @@ int xe_gt_resume(struct xe_gt *gt)
*/
int xe_gt_runtime_suspend(struct xe_gt *gt)
{
+ unsigned int fw_ref;
+
xe_gt_dbg(gt, "runtime suspending\n");
- CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
- if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
+ fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+ if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {
+ xe_force_wake_put(gt_to_fw(gt), fw_ref);
xe_gt_err(gt, "runtime suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
return -ETIMEDOUT;
}
@@ -1093,6 +1104,8 @@ int xe_gt_runtime_suspend(struct xe_gt *gt)
xe_gt_dbg(gt, "runtime suspended\n");
+ xe_force_wake_put_and_flush(gt_to_fw(gt), fw_ref);
+
return 0;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* ✓ CI.KUnit: success for drm/xe/forcewake: add delayed-release optimization (rev3)
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (8 preceding siblings ...)
2026-06-25 8:19 ` [PATCH v3] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
@ 2026-06-25 8:51 ` Patchwork
2026-06-25 9:26 ` ✗ Xe.CI.BAT: failure " Patchwork
` (9 subsequent siblings)
19 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2026-06-25 8:51 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
== Series Details ==
Series: drm/xe/forcewake: add delayed-release optimization (rev3)
URL : https://patchwork.freedesktop.org/series/167697/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[08:50:27] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:50:31] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:51:02] Starting KUnit Kernel (1/1)...
[08:51:02] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:51:02] ================== guc_buf (11 subtests) ===================
[08:51:02] [PASSED] test_smallest
[08:51:02] [PASSED] test_largest
[08:51:02] [PASSED] test_granular
[08:51:02] [PASSED] test_unique
[08:51:02] [PASSED] test_overlap
[08:51:02] [PASSED] test_reusable
[08:51:02] [PASSED] test_too_big
[08:51:02] [PASSED] test_flush
[08:51:02] [PASSED] test_lookup
[08:51:02] [PASSED] test_data
[08:51:02] [PASSED] test_class
[08:51:02] ===================== [PASSED] guc_buf =====================
[08:51:02] =================== guc_dbm (7 subtests) ===================
[08:51:02] [PASSED] test_empty
[08:51:02] [PASSED] test_default
[08:51:02] ======================== test_size ========================
[08:51:02] [PASSED] 4
[08:51:02] [PASSED] 8
[08:51:02] [PASSED] 32
[08:51:02] [PASSED] 256
[08:51:02] ==================== [PASSED] test_size ====================
[08:51:02] ======================= test_reuse ========================
[08:51:02] [PASSED] 4
[08:51:02] [PASSED] 8
[08:51:02] [PASSED] 32
[08:51:02] [PASSED] 256
[08:51:02] =================== [PASSED] test_reuse ====================
[08:51:02] =================== test_range_overlap ====================
[08:51:02] [PASSED] 4
[08:51:02] [PASSED] 8
[08:51:02] [PASSED] 32
[08:51:02] [PASSED] 256
[08:51:02] =============== [PASSED] test_range_overlap ================
[08:51:02] =================== test_range_compact ====================
[08:51:02] [PASSED] 4
[08:51:02] [PASSED] 8
[08:51:02] [PASSED] 32
[08:51:02] [PASSED] 256
[08:51:02] =============== [PASSED] test_range_compact ================
[08:51:02] ==================== test_range_spare =====================
[08:51:02] [PASSED] 4
[08:51:02] [PASSED] 8
[08:51:02] [PASSED] 32
[08:51:02] [PASSED] 256
[08:51:02] ================ [PASSED] test_range_spare =================
[08:51:02] ===================== [PASSED] guc_dbm =====================
[08:51:02] =================== guc_idm (6 subtests) ===================
[08:51:02] [PASSED] bad_init
[08:51:02] [PASSED] no_init
[08:51:02] [PASSED] init_fini
[08:51:02] [PASSED] check_used
[08:51:02] [PASSED] check_quota
[08:51:02] [PASSED] check_all
[08:51:02] ===================== [PASSED] guc_idm =====================
[08:51:02] ================== no_relay (3 subtests) ===================
[08:51:02] [PASSED] xe_drops_guc2pf_if_not_ready
[08:51:02] [PASSED] xe_drops_guc2vf_if_not_ready
[08:51:02] [PASSED] xe_rejects_send_if_not_ready
[08:51:02] ==================== [PASSED] no_relay =====================
[08:51:02] ================== pf_relay (14 subtests) ==================
[08:51:02] [PASSED] pf_rejects_guc2pf_too_short
[08:51:02] [PASSED] pf_rejects_guc2pf_too_long
[08:51:02] [PASSED] pf_rejects_guc2pf_no_payload
[08:51:02] [PASSED] pf_fails_no_payload
[08:51:02] [PASSED] pf_fails_bad_origin
[08:51:02] [PASSED] pf_fails_bad_type
[08:51:02] [PASSED] pf_txn_reports_error
[08:51:02] [PASSED] pf_txn_sends_pf2guc
[08:51:02] [PASSED] pf_sends_pf2guc
[08:51:02] [SKIPPED] pf_loopback_nop
[08:51:02] [SKIPPED] pf_loopback_echo
[08:51:02] [SKIPPED] pf_loopback_fail
[08:51:02] [SKIPPED] pf_loopback_busy
[08:51:02] [SKIPPED] pf_loopback_retry
[08:51:02] ==================== [PASSED] pf_relay =====================
[08:51:02] ================== vf_relay (3 subtests) ===================
[08:51:02] [PASSED] vf_rejects_guc2vf_too_short
[08:51:02] [PASSED] vf_rejects_guc2vf_too_long
[08:51:02] [PASSED] vf_rejects_guc2vf_no_payload
[08:51:02] ==================== [PASSED] vf_relay =====================
[08:51:02] ================ pf_gt_config (9 subtests) =================
[08:51:02] [PASSED] fair_contexts_1vf
[08:51:02] [PASSED] fair_doorbells_1vf
[08:51:02] [PASSED] fair_ggtt_1vf
[08:51:02] ====================== fair_vram_1vf ======================
[08:51:02] [PASSED] 3.50 GiB
[08:51:02] [PASSED] 11.5 GiB
[08:51:02] [PASSED] 15.5 GiB
[08:51:02] [PASSED] 31.5 GiB
[08:51:02] [PASSED] 63.5 GiB
[08:51:02] [PASSED] 1.91 GiB
[08:51:02] ================== [PASSED] fair_vram_1vf ==================
[08:51:02] ================ fair_vram_1vf_admin_only =================
[08:51:02] [PASSED] 3.50 GiB
[08:51:02] [PASSED] 11.5 GiB
[08:51:02] [PASSED] 15.5 GiB
[08:51:02] [PASSED] 31.5 GiB
[08:51:02] [PASSED] 63.5 GiB
[08:51:02] [PASSED] 1.91 GiB
[08:51:02] ============ [PASSED] fair_vram_1vf_admin_only =============
[08:51:02] ====================== fair_contexts ======================
[08:51:02] [PASSED] 1 VF
[08:51:02] [PASSED] 2 VFs
[08:51:02] [PASSED] 3 VFs
[08:51:02] [PASSED] 4 VFs
[08:51:02] [PASSED] 5 VFs
[08:51:02] [PASSED] 6 VFs
[08:51:02] [PASSED] 7 VFs
[08:51:02] [PASSED] 8 VFs
[08:51:02] [PASSED] 9 VFs
[08:51:02] [PASSED] 10 VFs
[08:51:02] [PASSED] 11 VFs
[08:51:02] [PASSED] 12 VFs
[08:51:02] [PASSED] 13 VFs
[08:51:02] [PASSED] 14 VFs
[08:51:02] [PASSED] 15 VFs
[08:51:02] [PASSED] 16 VFs
[08:51:02] [PASSED] 17 VFs
[08:51:02] [PASSED] 18 VFs
[08:51:02] [PASSED] 19 VFs
[08:51:02] [PASSED] 20 VFs
[08:51:02] [PASSED] 21 VFs
[08:51:02] [PASSED] 22 VFs
[08:51:02] [PASSED] 23 VFs
[08:51:02] [PASSED] 24 VFs
[08:51:02] [PASSED] 25 VFs
[08:51:03] [PASSED] 26 VFs
[08:51:03] [PASSED] 27 VFs
[08:51:03] [PASSED] 28 VFs
[08:51:03] [PASSED] 29 VFs
[08:51:03] [PASSED] 30 VFs
[08:51:03] [PASSED] 31 VFs
[08:51:03] [PASSED] 32 VFs
[08:51:03] [PASSED] 33 VFs
[08:51:03] [PASSED] 34 VFs
[08:51:03] [PASSED] 35 VFs
[08:51:03] [PASSED] 36 VFs
[08:51:03] [PASSED] 37 VFs
[08:51:03] [PASSED] 38 VFs
[08:51:03] [PASSED] 39 VFs
[08:51:03] [PASSED] 40 VFs
[08:51:03] [PASSED] 41 VFs
[08:51:03] [PASSED] 42 VFs
[08:51:03] [PASSED] 43 VFs
[08:51:03] [PASSED] 44 VFs
[08:51:03] [PASSED] 45 VFs
[08:51:03] [PASSED] 46 VFs
[08:51:03] [PASSED] 47 VFs
[08:51:03] [PASSED] 48 VFs
[08:51:03] [PASSED] 49 VFs
[08:51:03] [PASSED] 50 VFs
[08:51:03] [PASSED] 51 VFs
[08:51:03] [PASSED] 52 VFs
[08:51:03] [PASSED] 53 VFs
[08:51:03] [PASSED] 54 VFs
[08:51:03] [PASSED] 55 VFs
[08:51:03] [PASSED] 56 VFs
[08:51:03] [PASSED] 57 VFs
[08:51:03] [PASSED] 58 VFs
[08:51:03] [PASSED] 59 VFs
[08:51:03] [PASSED] 60 VFs
[08:51:03] [PASSED] 61 VFs
[08:51:03] [PASSED] 62 VFs
[08:51:03] [PASSED] 63 VFs
[08:51:03] ================== [PASSED] fair_contexts ==================
[08:51:03] ===================== fair_doorbells ======================
[08:51:03] [PASSED] 1 VF
[08:51:03] [PASSED] 2 VFs
[08:51:03] [PASSED] 3 VFs
[08:51:03] [PASSED] 4 VFs
[08:51:03] [PASSED] 5 VFs
[08:51:03] [PASSED] 6 VFs
[08:51:03] [PASSED] 7 VFs
[08:51:03] [PASSED] 8 VFs
[08:51:03] [PASSED] 9 VFs
[08:51:03] [PASSED] 10 VFs
[08:51:03] [PASSED] 11 VFs
[08:51:03] [PASSED] 12 VFs
[08:51:03] [PASSED] 13 VFs
[08:51:03] [PASSED] 14 VFs
[08:51:03] [PASSED] 15 VFs
[08:51:03] [PASSED] 16 VFs
[08:51:03] [PASSED] 17 VFs
[08:51:03] [PASSED] 18 VFs
[08:51:03] [PASSED] 19 VFs
[08:51:03] [PASSED] 20 VFs
[08:51:03] [PASSED] 21 VFs
[08:51:03] [PASSED] 22 VFs
[08:51:03] [PASSED] 23 VFs
[08:51:03] [PASSED] 24 VFs
[08:51:03] [PASSED] 25 VFs
[08:51:03] [PASSED] 26 VFs
[08:51:03] [PASSED] 27 VFs
[08:51:03] [PASSED] 28 VFs
[08:51:03] [PASSED] 29 VFs
[08:51:03] [PASSED] 30 VFs
[08:51:03] [PASSED] 31 VFs
[08:51:03] [PASSED] 32 VFs
[08:51:03] [PASSED] 33 VFs
[08:51:03] [PASSED] 34 VFs
[08:51:03] [PASSED] 35 VFs
[08:51:03] [PASSED] 36 VFs
[08:51:03] [PASSED] 37 VFs
[08:51:03] [PASSED] 38 VFs
[08:51:03] [PASSED] 39 VFs
[08:51:03] [PASSED] 40 VFs
[08:51:03] [PASSED] 41 VFs
[08:51:03] [PASSED] 42 VFs
[08:51:03] [PASSED] 43 VFs
[08:51:03] [PASSED] 44 VFs
[08:51:03] [PASSED] 45 VFs
[08:51:03] [PASSED] 46 VFs
[08:51:03] [PASSED] 47 VFs
[08:51:03] [PASSED] 48 VFs
[08:51:03] [PASSED] 49 VFs
[08:51:03] [PASSED] 50 VFs
[08:51:03] [PASSED] 51 VFs
[08:51:03] [PASSED] 52 VFs
[08:51:03] [PASSED] 53 VFs
[08:51:03] [PASSED] 54 VFs
[08:51:03] [PASSED] 55 VFs
[08:51:03] [PASSED] 56 VFs
[08:51:03] [PASSED] 57 VFs
[08:51:03] [PASSED] 58 VFs
[08:51:03] [PASSED] 59 VFs
[08:51:03] [PASSED] 60 VFs
[08:51:03] [PASSED] 61 VFs
[08:51:03] [PASSED] 62 VFs
[08:51:03] [PASSED] 63 VFs
[08:51:03] ================= [PASSED] fair_doorbells ==================
[08:51:03] ======================== fair_ggtt ========================
[08:51:03] [PASSED] 1 VF
[08:51:03] [PASSED] 2 VFs
[08:51:03] [PASSED] 3 VFs
[08:51:03] [PASSED] 4 VFs
[08:51:03] [PASSED] 5 VFs
[08:51:03] [PASSED] 6 VFs
[08:51:03] [PASSED] 7 VFs
[08:51:03] [PASSED] 8 VFs
[08:51:03] [PASSED] 9 VFs
[08:51:03] [PASSED] 10 VFs
[08:51:03] [PASSED] 11 VFs
[08:51:03] [PASSED] 12 VFs
[08:51:03] [PASSED] 13 VFs
[08:51:03] [PASSED] 14 VFs
[08:51:03] [PASSED] 15 VFs
[08:51:03] [PASSED] 16 VFs
[08:51:03] [PASSED] 17 VFs
[08:51:03] [PASSED] 18 VFs
[08:51:03] [PASSED] 19 VFs
[08:51:03] [PASSED] 20 VFs
[08:51:03] [PASSED] 21 VFs
[08:51:03] [PASSED] 22 VFs
[08:51:03] [PASSED] 23 VFs
[08:51:03] [PASSED] 24 VFs
[08:51:03] [PASSED] 25 VFs
[08:51:03] [PASSED] 26 VFs
[08:51:03] [PASSED] 27 VFs
[08:51:03] [PASSED] 28 VFs
[08:51:03] [PASSED] 29 VFs
[08:51:03] [PASSED] 30 VFs
[08:51:03] [PASSED] 31 VFs
[08:51:03] [PASSED] 32 VFs
[08:51:03] [PASSED] 33 VFs
[08:51:03] [PASSED] 34 VFs
[08:51:03] [PASSED] 35 VFs
[08:51:03] [PASSED] 36 VFs
[08:51:03] [PASSED] 37 VFs
[08:51:03] [PASSED] 38 VFs
[08:51:03] [PASSED] 39 VFs
[08:51:03] [PASSED] 40 VFs
[08:51:03] [PASSED] 41 VFs
[08:51:03] [PASSED] 42 VFs
[08:51:03] [PASSED] 43 VFs
[08:51:03] [PASSED] 44 VFs
[08:51:03] [PASSED] 45 VFs
[08:51:03] [PASSED] 46 VFs
[08:51:03] [PASSED] 47 VFs
[08:51:03] [PASSED] 48 VFs
[08:51:03] [PASSED] 49 VFs
[08:51:03] [PASSED] 50 VFs
[08:51:03] [PASSED] 51 VFs
[08:51:03] [PASSED] 52 VFs
[08:51:03] [PASSED] 53 VFs
[08:51:03] [PASSED] 54 VFs
[08:51:03] [PASSED] 55 VFs
[08:51:03] [PASSED] 56 VFs
[08:51:03] [PASSED] 57 VFs
[08:51:03] [PASSED] 58 VFs
[08:51:03] [PASSED] 59 VFs
[08:51:03] [PASSED] 60 VFs
[08:51:03] [PASSED] 61 VFs
[08:51:03] [PASSED] 62 VFs
[08:51:03] [PASSED] 63 VFs
[08:51:03] ==================== [PASSED] fair_ggtt ====================
[08:51:03] ======================== fair_vram ========================
[08:51:03] [PASSED] 1 VF
[08:51:03] [PASSED] 2 VFs
[08:51:03] [PASSED] 3 VFs
[08:51:03] [PASSED] 4 VFs
[08:51:03] [PASSED] 5 VFs
[08:51:03] [PASSED] 6 VFs
[08:51:03] [PASSED] 7 VFs
[08:51:03] [PASSED] 8 VFs
[08:51:03] [PASSED] 9 VFs
[08:51:03] [PASSED] 10 VFs
[08:51:03] [PASSED] 11 VFs
[08:51:03] [PASSED] 12 VFs
[08:51:03] [PASSED] 13 VFs
[08:51:03] [PASSED] 14 VFs
[08:51:03] [PASSED] 15 VFs
[08:51:03] [PASSED] 16 VFs
[08:51:03] [PASSED] 17 VFs
[08:51:03] [PASSED] 18 VFs
[08:51:03] [PASSED] 19 VFs
[08:51:03] [PASSED] 20 VFs
[08:51:03] [PASSED] 21 VFs
[08:51:03] [PASSED] 22 VFs
[08:51:03] [PASSED] 23 VFs
[08:51:03] [PASSED] 24 VFs
[08:51:03] [PASSED] 25 VFs
[08:51:03] [PASSED] 26 VFs
[08:51:03] [PASSED] 27 VFs
[08:51:03] [PASSED] 28 VFs
[08:51:03] [PASSED] 29 VFs
[08:51:03] [PASSED] 30 VFs
[08:51:03] [PASSED] 31 VFs
[08:51:03] [PASSED] 32 VFs
[08:51:03] [PASSED] 33 VFs
[08:51:03] [PASSED] 34 VFs
[08:51:03] [PASSED] 35 VFs
[08:51:03] [PASSED] 36 VFs
[08:51:03] [PASSED] 37 VFs
[08:51:03] [PASSED] 38 VFs
[08:51:03] [PASSED] 39 VFs
[08:51:03] [PASSED] 40 VFs
[08:51:03] [PASSED] 41 VFs
[08:51:03] [PASSED] 42 VFs
[08:51:03] [PASSED] 43 VFs
[08:51:03] [PASSED] 44 VFs
[08:51:03] [PASSED] 45 VFs
[08:51:03] [PASSED] 46 VFs
[08:51:03] [PASSED] 47 VFs
[08:51:03] [PASSED] 48 VFs
[08:51:03] [PASSED] 49 VFs
[08:51:03] [PASSED] 50 VFs
[08:51:03] [PASSED] 51 VFs
[08:51:03] [PASSED] 52 VFs
[08:51:03] [PASSED] 53 VFs
[08:51:03] [PASSED] 54 VFs
[08:51:03] [PASSED] 55 VFs
[08:51:03] [PASSED] 56 VFs
[08:51:03] [PASSED] 57 VFs
[08:51:03] [PASSED] 58 VFs
[08:51:03] [PASSED] 59 VFs
[08:51:03] [PASSED] 60 VFs
[08:51:03] [PASSED] 61 VFs
[08:51:03] [PASSED] 62 VFs
[08:51:03] [PASSED] 63 VFs
[08:51:03] ==================== [PASSED] fair_vram ====================
[08:51:03] ================== [PASSED] pf_gt_config ===================
[08:51:03] ===================== lmtt (1 subtest) =====================
[08:51:03] ======================== test_ops =========================
[08:51:03] [PASSED] 2-level
[08:51:03] [PASSED] multi-level
[08:51:03] ==================== [PASSED] test_ops =====================
[08:51:03] ====================== [PASSED] lmtt =======================
[08:51:03] ================= pf_service (11 subtests) =================
[08:51:03] [PASSED] pf_negotiate_any
[08:51:03] [PASSED] pf_negotiate_base_match
[08:51:03] [PASSED] pf_negotiate_base_newer
[08:51:03] [PASSED] pf_negotiate_base_next
[08:51:03] [SKIPPED] pf_negotiate_base_older
[08:51:03] [PASSED] pf_negotiate_base_prev
[08:51:03] [PASSED] pf_negotiate_latest_match
[08:51:03] [PASSED] pf_negotiate_latest_newer
[08:51:03] [PASSED] pf_negotiate_latest_next
[08:51:03] [SKIPPED] pf_negotiate_latest_older
[08:51:03] [SKIPPED] pf_negotiate_latest_prev
[08:51:03] =================== [PASSED] pf_service ====================
[08:51:03] ================= xe_guc_g2g (2 subtests) ==================
[08:51:03] ============== xe_live_guc_g2g_kunit_default ==============
[08:51:03] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[08:51:03] ============== xe_live_guc_g2g_kunit_allmem ===============
[08:51:03] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[08:51:03] =================== [SKIPPED] xe_guc_g2g ===================
[08:51:03] =================== xe_mocs (2 subtests) ===================
[08:51:03] ================ xe_live_mocs_kernel_kunit ================
[08:51:03] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[08:51:03] ================ xe_live_mocs_reset_kunit =================
[08:51:03] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[08:51:03] ==================== [SKIPPED] xe_mocs =====================
[08:51:03] ================= xe_migrate (2 subtests) ==================
[08:51:03] ================= xe_migrate_sanity_kunit =================
[08:51:03] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[08:51:03] ================== xe_validate_ccs_kunit ==================
[08:51:03] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[08:51:03] =================== [SKIPPED] xe_migrate ===================
[08:51:03] ================== xe_dma_buf (1 subtest) ==================
[08:51:03] ==================== xe_dma_buf_kunit =====================
[08:51:03] ================ [SKIPPED] xe_dma_buf_kunit ================
[08:51:03] =================== [SKIPPED] xe_dma_buf ===================
[08:51:03] ================= xe_bo_shrink (1 subtest) =================
[08:51:03] =================== xe_bo_shrink_kunit ====================
[08:51:03] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[08:51:03] ================== [SKIPPED] xe_bo_shrink ==================
[08:51:03] ==================== xe_bo (2 subtests) ====================
[08:51:03] ================== xe_ccs_migrate_kunit ===================
[08:51:03] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[08:51:03] ==================== xe_bo_evict_kunit ====================
[08:51:03] =============== [SKIPPED] xe_bo_evict_kunit ================
[08:51:03] ===================== [SKIPPED] xe_bo ======================
[08:51:03] ==================== args (13 subtests) ====================
[08:51:03] [PASSED] count_args_test
[08:51:03] [PASSED] call_args_example
[08:51:03] [PASSED] call_args_test
[08:51:03] [PASSED] drop_first_arg_example
[08:51:03] [PASSED] drop_first_arg_test
[08:51:03] [PASSED] first_arg_example
[08:51:03] [PASSED] first_arg_test
[08:51:03] [PASSED] last_arg_example
[08:51:03] [PASSED] last_arg_test
[08:51:03] [PASSED] pick_arg_example
[08:51:03] [PASSED] if_args_example
[08:51:03] [PASSED] if_args_test
[08:51:03] [PASSED] sep_comma_example
[08:51:03] ====================== [PASSED] args =======================
[08:51:03] =================== xe_pci (3 subtests) ====================
[08:51:03] ==================== check_graphics_ip ====================
[08:51:03] [PASSED] 12.00 Xe_LP
[08:51:03] [PASSED] 12.10 Xe_LP+
[08:51:03] [PASSED] 12.55 Xe_HPG
[08:51:03] [PASSED] 12.60 Xe_HPC
[08:51:03] [PASSED] 12.70 Xe_LPG
[08:51:03] [PASSED] 12.71 Xe_LPG
[08:51:03] [PASSED] 12.74 Xe_LPG+
[08:51:03] [PASSED] 20.01 Xe2_HPG
[08:51:03] [PASSED] 20.02 Xe2_HPG
[08:51:03] [PASSED] 20.04 Xe2_LPG
[08:51:03] [PASSED] 30.00 Xe3_LPG
[08:51:03] [PASSED] 30.01 Xe3_LPG
[08:51:03] [PASSED] 30.03 Xe3_LPG
[08:51:03] [PASSED] 30.04 Xe3_LPG
[08:51:03] [PASSED] 30.05 Xe3_LPG
[08:51:03] [PASSED] 35.10 Xe3p_LPG
[08:51:03] [PASSED] 35.11 Xe3p_XPC
[08:51:03] ================ [PASSED] check_graphics_ip ================
[08:51:03] ===================== check_media_ip ======================
[08:51:03] [PASSED] 12.00 Xe_M
[08:51:03] [PASSED] 12.55 Xe_HPM
[08:51:03] [PASSED] 13.00 Xe_LPM+
[08:51:03] [PASSED] 13.01 Xe2_HPM
[08:51:03] [PASSED] 20.00 Xe2_LPM
[08:51:03] [PASSED] 30.00 Xe3_LPM
[08:51:03] [PASSED] 30.02 Xe3_LPM
[08:51:03] [PASSED] 35.00 Xe3p_LPM
[08:51:03] [PASSED] 35.03 Xe3p_HPM
[08:51:03] ================= [PASSED] check_media_ip ==================
[08:51:03] =================== check_platform_desc ===================
[08:51:03] [PASSED] 0x9A60 (TIGERLAKE)
[08:51:03] [PASSED] 0x9A68 (TIGERLAKE)
[08:51:03] [PASSED] 0x9A70 (TIGERLAKE)
[08:51:03] [PASSED] 0x9A40 (TIGERLAKE)
[08:51:03] [PASSED] 0x9A49 (TIGERLAKE)
[08:51:03] [PASSED] 0x9A59 (TIGERLAKE)
[08:51:03] [PASSED] 0x9A78 (TIGERLAKE)
[08:51:03] [PASSED] 0x9AC0 (TIGERLAKE)
[08:51:03] [PASSED] 0x9AC9 (TIGERLAKE)
[08:51:03] [PASSED] 0x9AD9 (TIGERLAKE)
[08:51:03] [PASSED] 0x9AF8 (TIGERLAKE)
[08:51:03] [PASSED] 0x4C80 (ROCKETLAKE)
[08:51:03] [PASSED] 0x4C8A (ROCKETLAKE)
[08:51:03] [PASSED] 0x4C8B (ROCKETLAKE)
[08:51:03] [PASSED] 0x4C8C (ROCKETLAKE)
[08:51:03] [PASSED] 0x4C90 (ROCKETLAKE)
[08:51:03] [PASSED] 0x4C9A (ROCKETLAKE)
[08:51:03] [PASSED] 0x4680 (ALDERLAKE_S)
[08:51:03] [PASSED] 0x4682 (ALDERLAKE_S)
[08:51:03] [PASSED] 0x4688 (ALDERLAKE_S)
[08:51:03] [PASSED] 0x468A (ALDERLAKE_S)
[08:51:03] [PASSED] 0x468B (ALDERLAKE_S)
[08:51:03] [PASSED] 0x4690 (ALDERLAKE_S)
[08:51:03] [PASSED] 0x4692 (ALDERLAKE_S)
[08:51:03] [PASSED] 0x4693 (ALDERLAKE_S)
[08:51:03] [PASSED] 0x46A0 (ALDERLAKE_P)
[08:51:03] [PASSED] 0x46A1 (ALDERLAKE_P)
[08:51:03] [PASSED] 0x46A2 (ALDERLAKE_P)
[08:51:03] [PASSED] 0x46A3 (ALDERLAKE_P)
[08:51:03] [PASSED] 0x46A6 (ALDERLAKE_P)
[08:51:03] [PASSED] 0x46A8 (ALDERLAKE_P)
[08:51:03] [PASSED] 0x46AA (ALDERLAKE_P)
[08:51:03] [PASSED] 0x462A (ALDERLAKE_P)
[08:51:03] [PASSED] 0x4626 (ALDERLAKE_P)
[08:51:03] [PASSED] 0x4628 (ALDERLAKE_P)
[08:51:03] [PASSED] 0x46B0 (ALDERLAKE_P)
[08:51:03] [PASSED] 0x46B1 (ALDERLAKE_P)
[08:51:03] [PASSED] 0x46B2 (ALDERLAKE_P)
[08:51:03] [PASSED] 0x46B3 (ALDERLAKE_P)
[08:51:03] [PASSED] 0x46C0 (ALDERLAKE_P)
[08:51:03] [PASSED] 0x46C1 (ALDERLAKE_P)
[08:51:03] [PASSED] 0x46C2 (ALDERLAKE_P)
[08:51:03] [PASSED] 0x46C3 (ALDERLAKE_P)
[08:51:03] [PASSED] 0x46D0 (ALDERLAKE_N)
[08:51:03] [PASSED] 0x46D1 (ALDERLAKE_N)
[08:51:03] [PASSED] 0x46D2 (ALDERLAKE_N)
[08:51:03] [PASSED] 0x46D3 (ALDERLAKE_N)
[08:51:03] [PASSED] 0x46D4 (ALDERLAKE_N)
[08:51:03] [PASSED] 0xA721 (ALDERLAKE_P)
[08:51:03] [PASSED] 0xA7A1 (ALDERLAKE_P)
[08:51:03] [PASSED] 0xA7A9 (ALDERLAKE_P)
[08:51:03] [PASSED] 0xA7AC (ALDERLAKE_P)
[08:51:03] [PASSED] 0xA7AD (ALDERLAKE_P)
[08:51:03] [PASSED] 0xA720 (ALDERLAKE_P)
[08:51:03] [PASSED] 0xA7A0 (ALDERLAKE_P)
[08:51:03] [PASSED] 0xA7A8 (ALDERLAKE_P)
[08:51:03] [PASSED] 0xA7AA (ALDERLAKE_P)
[08:51:03] [PASSED] 0xA7AB (ALDERLAKE_P)
[08:51:03] [PASSED] 0xA780 (ALDERLAKE_S)
[08:51:03] [PASSED] 0xA781 (ALDERLAKE_S)
[08:51:03] [PASSED] 0xA782 (ALDERLAKE_S)
[08:51:03] [PASSED] 0xA783 (ALDERLAKE_S)
[08:51:03] [PASSED] 0xA788 (ALDERLAKE_S)
[08:51:03] [PASSED] 0xA789 (ALDERLAKE_S)
[08:51:03] [PASSED] 0xA78A (ALDERLAKE_S)
[08:51:03] [PASSED] 0xA78B (ALDERLAKE_S)
[08:51:03] [PASSED] 0x4905 (DG1)
[08:51:03] [PASSED] 0x4906 (DG1)
[08:51:03] [PASSED] 0x4907 (DG1)
[08:51:03] [PASSED] 0x4908 (DG1)
[08:51:03] [PASSED] 0x4909 (DG1)
[08:51:03] [PASSED] 0x56C0 (DG2)
[08:51:03] [PASSED] 0x56C2 (DG2)
[08:51:03] [PASSED] 0x56C1 (DG2)
[08:51:03] [PASSED] 0x7D51 (METEORLAKE)
[08:51:03] [PASSED] 0x7DD1 (METEORLAKE)
[08:51:03] [PASSED] 0x7D41 (METEORLAKE)
[08:51:03] [PASSED] 0x7D67 (METEORLAKE)
[08:51:03] [PASSED] 0xB640 (METEORLAKE)
[08:51:03] [PASSED] 0x56A0 (DG2)
[08:51:03] [PASSED] 0x56A1 (DG2)
[08:51:03] [PASSED] 0x56A2 (DG2)
[08:51:03] [PASSED] 0x56BE (DG2)
[08:51:03] [PASSED] 0x56BF (DG2)
[08:51:03] [PASSED] 0x5690 (DG2)
[08:51:03] [PASSED] 0x5691 (DG2)
[08:51:03] [PASSED] 0x5692 (DG2)
[08:51:03] [PASSED] 0x56A5 (DG2)
[08:51:03] [PASSED] 0x56A6 (DG2)
[08:51:03] [PASSED] 0x56B0 (DG2)
[08:51:03] [PASSED] 0x56B1 (DG2)
[08:51:03] [PASSED] 0x56BA (DG2)
[08:51:03] [PASSED] 0x56BB (DG2)
[08:51:03] [PASSED] 0x56BC (DG2)
[08:51:03] [PASSED] 0x56BD (DG2)
[08:51:03] [PASSED] 0x5693 (DG2)
[08:51:03] [PASSED] 0x5694 (DG2)
[08:51:03] [PASSED] 0x5695 (DG2)
[08:51:03] [PASSED] 0x56A3 (DG2)
[08:51:03] [PASSED] 0x56A4 (DG2)
[08:51:03] [PASSED] 0x56B2 (DG2)
[08:51:03] [PASSED] 0x56B3 (DG2)
[08:51:03] [PASSED] 0x5696 (DG2)
[08:51:03] [PASSED] 0x5697 (DG2)
[08:51:03] [PASSED] 0xB69 (PVC)
[08:51:03] [PASSED] 0xB6E (PVC)
[08:51:03] [PASSED] 0xBD4 (PVC)
[08:51:03] [PASSED] 0xBD5 (PVC)
[08:51:03] [PASSED] 0xBD6 (PVC)
[08:51:03] [PASSED] 0xBD7 (PVC)
[08:51:03] [PASSED] 0xBD8 (PVC)
[08:51:03] [PASSED] 0xBD9 (PVC)
[08:51:03] [PASSED] 0xBDA (PVC)
[08:51:03] [PASSED] 0xBDB (PVC)
[08:51:03] [PASSED] 0xBE0 (PVC)
[08:51:03] [PASSED] 0xBE1 (PVC)
[08:51:03] [PASSED] 0xBE5 (PVC)
[08:51:03] [PASSED] 0x7D40 (METEORLAKE)
[08:51:03] [PASSED] 0x7D45 (METEORLAKE)
[08:51:03] [PASSED] 0x7D55 (METEORLAKE)
[08:51:03] [PASSED] 0x7D60 (METEORLAKE)
[08:51:03] [PASSED] 0x7DD5 (METEORLAKE)
[08:51:03] [PASSED] 0x6420 (LUNARLAKE)
[08:51:03] [PASSED] 0x64A0 (LUNARLAKE)
[08:51:03] [PASSED] 0x64B0 (LUNARLAKE)
[08:51:03] [PASSED] 0xE202 (BATTLEMAGE)
[08:51:03] [PASSED] 0xE209 (BATTLEMAGE)
[08:51:03] [PASSED] 0xE20B (BATTLEMAGE)
[08:51:03] [PASSED] 0xE20C (BATTLEMAGE)
[08:51:03] [PASSED] 0xE20D (BATTLEMAGE)
[08:51:03] [PASSED] 0xE210 (BATTLEMAGE)
[08:51:03] [PASSED] 0xE211 (BATTLEMAGE)
[08:51:03] [PASSED] 0xE212 (BATTLEMAGE)
[08:51:03] [PASSED] 0xE216 (BATTLEMAGE)
[08:51:03] [PASSED] 0xE220 (BATTLEMAGE)
[08:51:03] [PASSED] 0xE221 (BATTLEMAGE)
[08:51:03] [PASSED] 0xE222 (BATTLEMAGE)
[08:51:03] [PASSED] 0xE223 (BATTLEMAGE)
[08:51:03] [PASSED] 0xB080 (PANTHERLAKE)
[08:51:03] [PASSED] 0xB081 (PANTHERLAKE)
[08:51:03] [PASSED] 0xB082 (PANTHERLAKE)
[08:51:03] [PASSED] 0xB083 (PANTHERLAKE)
[08:51:03] [PASSED] 0xB084 (PANTHERLAKE)
[08:51:03] [PASSED] 0xB085 (PANTHERLAKE)
[08:51:03] [PASSED] 0xB086 (PANTHERLAKE)
[08:51:03] [PASSED] 0xB087 (PANTHERLAKE)
[08:51:03] [PASSED] 0xB08F (PANTHERLAKE)
[08:51:03] [PASSED] 0xB090 (PANTHERLAKE)
[08:51:03] [PASSED] 0xB0A0 (PANTHERLAKE)
[08:51:03] [PASSED] 0xB0B0 (PANTHERLAKE)
[08:51:03] [PASSED] 0xFD80 (PANTHERLAKE)
[08:51:03] [PASSED] 0xFD81 (PANTHERLAKE)
[08:51:03] [PASSED] 0xD740 (NOVALAKE_S)
[08:51:03] [PASSED] 0xD741 (NOVALAKE_S)
[08:51:03] [PASSED] 0xD742 (NOVALAKE_S)
[08:51:03] [PASSED] 0xD743 (NOVALAKE_S)
[08:51:03] [PASSED] 0xD745 (NOVALAKE_S)
[08:51:03] [PASSED] 0xD74A (NOVALAKE_S)
[08:51:03] [PASSED] 0xD74B (NOVALAKE_S)
[08:51:03] [PASSED] 0x674C (CRESCENTISLAND)
[08:51:03] [PASSED] 0x674D (CRESCENTISLAND)
[08:51:03] [PASSED] 0x674E (CRESCENTISLAND)
[08:51:03] [PASSED] 0x674F (CRESCENTISLAND)
[08:51:03] [PASSED] 0x6750 (CRESCENTISLAND)
[08:51:03] [PASSED] 0xD750 (NOVALAKE_P)
[08:51:03] [PASSED] 0xD751 (NOVALAKE_P)
[08:51:03] [PASSED] 0xD752 (NOVALAKE_P)
[08:51:03] [PASSED] 0xD753 (NOVALAKE_P)
[08:51:03] [PASSED] 0xD754 (NOVALAKE_P)
[08:51:03] [PASSED] 0xD755 (NOVALAKE_P)
[08:51:03] [PASSED] 0xD756 (NOVALAKE_P)
[08:51:03] [PASSED] 0xD757 (NOVALAKE_P)
[08:51:03] [PASSED] 0xD75F (NOVALAKE_P)
[08:51:03] =============== [PASSED] check_platform_desc ===============
[08:51:03] ===================== [PASSED] xe_pci ======================
[08:51:03] ============= xe_rtp_tables_test (4 subtests) ==============
[08:51:03] ================== xe_rtp_table_gt_test ===================
[08:51:03] [PASSED] gt_was/14011060649
[08:51:03] [PASSED] gt_was/14011059788
[08:51:03] [PASSED] gt_was/14015795083
[08:51:03] [PASSED] gt_was/16021867713
[08:51:03] [PASSED] gt_was/14019449301
[08:51:03] [PASSED] gt_was/16028005424
[08:51:03] [PASSED] gt_was/14026578760
[08:51:03] [PASSED] gt_was/1409420604
[08:51:03] [PASSED] gt_was/1408615072
[08:51:03] [PASSED] gt_was/22010523718
[08:51:03] [PASSED] gt_was/14011006942
[08:51:03] [PASSED] gt_was/14014830051
[08:51:03] [PASSED] gt_was/18018781329
[08:51:03] [PASSED] gt_was/1509235366
[08:51:03] [PASSED] gt_was/18018781329
[08:51:03] [PASSED] gt_was/16016694945
[08:51:03] [PASSED] gt_was/14018575942
[08:51:03] [PASSED] gt_was/22016670082
[08:51:03] [PASSED] gt_was/22016670082
[08:51:03] [PASSED] gt_was/14017421178
[08:51:03] [PASSED] gt_was/16025250150
[08:51:03] [PASSED] gt_was/14021871409
[08:51:03] [PASSED] gt_was/16021865536
[08:51:03] [PASSED] gt_was/14021486841
[08:51:03] [PASSED] gt_was/14025160223
[08:51:03] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[08:51:03] [PASSED] gt_was/14025635424
[08:51:03] [PASSED] gt_was/16028005424
[08:51:03] ============== [PASSED] xe_rtp_table_gt_test ===============
[08:51:03] ================== xe_rtp_table_gt_test ===================
[08:51:03] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[08:51:03] [PASSED] gt_tunings/Tuning: 32B Access Enable
[08:51:03] [PASSED] gt_tunings/Tuning: L3 cache
[08:51:03] [PASSED] gt_tunings/Tuning: L3 cache - media
[08:51:03] [PASSED] gt_tunings/Tuning: Compression Overfetch
[08:51:03] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[08:51:03] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[08:51:03] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[08:51:03] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[08:51:03] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[08:51:03] [PASSED] gt_tunings/Tuning: Stateless compression control
[08:51:03] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[08:51:03] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[08:51:03] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[08:51:03] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[08:51:03] ============== [PASSED] xe_rtp_table_gt_test ===============
[08:51:03] ================== xe_rtp_table_oob_test ==================
[08:51:03] [PASSED] oob_was/1607983814
[08:51:03] [PASSED] oob_was/16010904313
[08:51:03] [PASSED] oob_was/18022495364
[08:51:03] [PASSED] oob_was/22012773006
[08:51:03] [PASSED] oob_was/14014475959
[08:51:03] [PASSED] oob_was/22011391025
[08:51:03] [PASSED] oob_was/22012727170
[08:51:03] [PASSED] oob_was/22012727685
[08:51:03] [PASSED] oob_was/22016596838
[08:51:03] [PASSED] oob_was/18020744125
[08:51:03] [PASSED] oob_was/1409600907
[08:51:03] [PASSED] oob_was/22014953428
[08:51:03] [PASSED] oob_was/16017236439
[08:51:03] [PASSED] oob_was/14019821291
[08:51:03] [PASSED] oob_was/14015076503
[08:51:03] [PASSED] oob_was/14018913170
[08:51:03] [PASSED] oob_was/14018094691
[08:51:03] [PASSED] oob_was/18024947630
[08:51:03] [PASSED] oob_was/16022287689
[08:51:03] [PASSED] oob_was/13011645652
[08:51:03] [PASSED] oob_was/14022293748
[08:51:03] [PASSED] oob_was/22019794406
[08:51:03] [PASSED] oob_was/22019338487
[08:51:03] [PASSED] oob_was/16023588340
[08:51:03] [PASSED] oob_was/14019789679
[08:51:03] [PASSED] oob_was/14022866841
[08:51:03] [PASSED] oob_was/16021333562
[08:51:03] [PASSED] oob_was/14016712196
[08:51:03] [PASSED] oob_was/14015568240
[08:51:03] [PASSED] oob_was/18013179988
[08:51:03] [PASSED] oob_was/1508761755
[08:51:03] [PASSED] oob_was/16023105232
[08:51:03] [PASSED] oob_was/16026508708
[08:51:03] [PASSED] oob_was/14020001231
[08:51:03] [PASSED] oob_was/16023683509
[08:51:03] [PASSED] oob_was/14025515070
[08:51:03] [PASSED] oob_was/15015404425_disable
[08:51:03] [PASSED] oob_was/16026007364
[08:51:03] [PASSED] oob_was/14020316580
[08:51:03] [PASSED] oob_was/14025883347
[08:51:03] [PASSED] oob_was/16029380221
[08:51:03] ============== [PASSED] xe_rtp_table_oob_test ==============
[08:51:03] ================ xe_rtp_table_dev_oob_test ================
[08:51:03] [PASSED] device_oob_was/22010954014
[08:51:03] [PASSED] device_oob_was/15015404425
[08:51:03] [PASSED] device_oob_was/22019338487_display
[08:51:03] [PASSED] device_oob_was/14022085890
[08:51:03] [PASSED] device_oob_was/14026539277
[08:51:03] [PASSED] device_oob_was/14026633728
[08:51:03] [PASSED] device_oob_was/14026746987
[08:51:03] [PASSED] device_oob_was/14026779378
[08:51:03] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[08:51:03] =============== [PASSED] xe_rtp_tables_test ================
[08:51:03] =================== xe_rtp (3 subtests) ====================
[08:51:03] =================== xe_rtp_rules_tests ====================
[08:51:03] [PASSED] no
[08:51:03] [PASSED] yes
[08:51:03] [PASSED] no-and-no
[08:51:03] [PASSED] no-and-yes
[08:51:03] [PASSED] yes-and-no
[08:51:03] [PASSED] yes-and-yes
[08:51:03] [PASSED] no-or-no
[08:51:03] [PASSED] no-or-yes
[08:51:03] [PASSED] yes-or-no
[08:51:03] [PASSED] yes-or-yes
[08:51:03] [PASSED] no-yes-or-yes-no
[08:51:03] [PASSED] no-yes-or-yes-yes
[08:51:03] [PASSED] yes-yes-or-no-yes
[08:51:03] [PASSED] yes-yes-or-yes-yes
[08:51:03] [PASSED] no-no-or-yes-or-no
[08:51:03] [PASSED] or
[08:51:03] [PASSED] or-yes
[08:51:03] [PASSED] or-no
[08:51:03] [PASSED] yes-or
[08:51:03] [PASSED] no-or
[08:51:03] [PASSED] no-or-or-yes
[08:51:03] [PASSED] yes-or-or-no
[08:51:03] [PASSED] no-or-or-no
[08:51:03] [PASSED] missing-context-engine-class
[08:51:03] [PASSED] missing-context-engine-class-or-yes
[08:51:03] [PASSED] missing-context-engine-class-or-or-yes
[08:51:03] =============== [PASSED] xe_rtp_rules_tests ================
[08:51:03] =============== xe_rtp_process_to_sr_tests ================
[08:51:03] [PASSED] coalesce-same-reg
[08:51:03] [PASSED] coalesce-same-reg-literal-and-func
[08:51:03] [PASSED] no-match-no-add
[08:51:03] [PASSED] two-regs-two-entries
[08:51:03] [PASSED] clr-one-set-other
[08:51:03] [PASSED] set-field
[08:51:03] [PASSED] conflict-duplicate
[08:51:03] [PASSED] conflict-not-disjoint
[08:51:03] [PASSED] conflict-not-disjoint-literal-and-func
[08:51:03] [PASSED] conflict-reg-type
[08:51:03] [PASSED] bad-mcr-reg-forced-to-regular
[08:51:03] [PASSED] bad-regular-reg-forced-to-mcr
[08:51:03] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[08:51:03] ================== xe_rtp_process_tests ===================
[08:51:03] [PASSED] active1
[08:51:03] [PASSED] active2
[08:51:03] [PASSED] active-inactive
[08:51:03] [PASSED] inactive-active
[08:51:03] [PASSED] inactive-active-inactive
[08:51:03] [PASSED] inactive-inactive-inactive
[08:51:03] ============== [PASSED] xe_rtp_process_tests ===============
[08:51:03] ===================== [PASSED] xe_rtp ======================
[08:51:03] ==================== xe_wa (1 subtest) =====================
[08:51:03] ======================== xe_wa_gt =========================
[08:51:03] [PASSED] TIGERLAKE B0
[08:51:03] [PASSED] DG1 A0
[08:51:03] [PASSED] DG1 B0
[08:51:03] [PASSED] ALDERLAKE_S A0
[08:51:03] [PASSED] ALDERLAKE_S B0
[08:51:03] [PASSED] ALDERLAKE_S C0
[08:51:03] [PASSED] ALDERLAKE_S D0
[08:51:03] [PASSED] ALDERLAKE_P A0
[08:51:03] [PASSED] ALDERLAKE_P B0
[08:51:03] [PASSED] ALDERLAKE_P C0
[08:51:03] [PASSED] ALDERLAKE_S RPLS D0
[08:51:03] [PASSED] ALDERLAKE_P RPLU E0
[08:51:03] [PASSED] DG2 G10 C0
[08:51:03] [PASSED] DG2 G11 B1
[08:51:03] [PASSED] DG2 G12 A1
[08:51:03] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[08:51:03] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[08:51:03] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[08:51:03] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[08:51:03] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[08:51:03] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[08:51:03] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[08:51:03] ==================== [PASSED] xe_wa_gt =====================
[08:51:03] ====================== [PASSED] xe_wa ======================
[08:51:03] ============================================================
[08:51:03] Testing complete. Ran 719 tests: passed: 701, skipped: 18
[08:51:03] Elapsed time: 36.171s total, 4.315s configuring, 31.189s building, 0.645s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[08:51:03] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:51:05] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:51:29] Starting KUnit Kernel (1/1)...
[08:51:29] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:51:29] ============ drm_test_pick_cmdline (2 subtests) ============
[08:51:29] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[08:51:29] =============== drm_test_pick_cmdline_named ===============
[08:51:29] [PASSED] NTSC
[08:51:29] [PASSED] NTSC-J
[08:51:29] [PASSED] PAL
[08:51:29] [PASSED] PAL-M
[08:51:29] =========== [PASSED] drm_test_pick_cmdline_named ===========
[08:51:29] ============== [PASSED] drm_test_pick_cmdline ==============
[08:51:29] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[08:51:29] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[08:51:29] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[08:51:29] =========== drm_validate_clone_mode (2 subtests) ===========
[08:51:29] ============== drm_test_check_in_clone_mode ===============
[08:51:29] [PASSED] in_clone_mode
[08:51:29] [PASSED] not_in_clone_mode
[08:51:29] ========== [PASSED] drm_test_check_in_clone_mode ===========
[08:51:29] =============== drm_test_check_valid_clones ===============
[08:51:29] [PASSED] not_in_clone_mode
[08:51:29] [PASSED] valid_clone
[08:51:29] [PASSED] invalid_clone
[08:51:29] =========== [PASSED] drm_test_check_valid_clones ===========
[08:51:29] ============= [PASSED] drm_validate_clone_mode =============
[08:51:29] ============= drm_validate_modeset (1 subtest) =============
[08:51:29] [PASSED] drm_test_check_connector_changed_modeset
[08:51:29] ============== [PASSED] drm_validate_modeset ===============
[08:51:29] ====== drm_test_bridge_get_current_state (2 subtests) ======
[08:51:29] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[08:51:29] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[08:51:29] ======== [PASSED] drm_test_bridge_get_current_state ========
[08:51:29] ====== drm_test_bridge_helper_reset_crtc (4 subtests) ======
[08:51:29] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[08:51:29] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[08:51:29] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[08:51:29] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[08:51:29] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[08:51:29] ============== drm_bridge_alloc (2 subtests) ===============
[08:51:29] [PASSED] drm_test_drm_bridge_alloc_basic
[08:51:29] [PASSED] drm_test_drm_bridge_alloc_get_put
[08:51:29] ================ [PASSED] drm_bridge_alloc =================
[08:51:29] ============= drm_bridge_bus_fmt (5 subtests) ==============
[08:51:29] [PASSED] drm_test_bridge_rgb_yuv_rgb
[08:51:29] [PASSED] drm_test_bridge_must_convert_to_yuv444
[08:51:29] [PASSED] drm_test_bridge_hdmi_auto_rgb
[08:51:29] [PASSED] drm_test_bridge_auto_first
[08:51:29] [PASSED] drm_test_bridge_rgb_yuv_no_path
[08:51:29] =============== [PASSED] drm_bridge_bus_fmt ================
[08:51:29] ============= drm_cmdline_parser (40 subtests) =============
[08:51:29] [PASSED] drm_test_cmdline_force_d_only
[08:51:29] [PASSED] drm_test_cmdline_force_D_only_dvi
[08:51:29] [PASSED] drm_test_cmdline_force_D_only_hdmi
[08:51:29] [PASSED] drm_test_cmdline_force_D_only_not_digital
[08:51:29] [PASSED] drm_test_cmdline_force_e_only
[08:51:29] [PASSED] drm_test_cmdline_res
[08:51:29] [PASSED] drm_test_cmdline_res_vesa
[08:51:29] [PASSED] drm_test_cmdline_res_vesa_rblank
[08:51:29] [PASSED] drm_test_cmdline_res_rblank
[08:51:29] [PASSED] drm_test_cmdline_res_bpp
[08:51:29] [PASSED] drm_test_cmdline_res_refresh
[08:51:29] [PASSED] drm_test_cmdline_res_bpp_refresh
[08:51:29] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[08:51:29] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[08:51:29] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[08:51:29] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[08:51:29] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[08:51:29] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[08:51:29] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[08:51:29] [PASSED] drm_test_cmdline_res_margins_force_on
[08:51:29] [PASSED] drm_test_cmdline_res_vesa_margins
[08:51:29] [PASSED] drm_test_cmdline_name
[08:51:29] [PASSED] drm_test_cmdline_name_bpp
[08:51:29] [PASSED] drm_test_cmdline_name_option
[08:51:29] [PASSED] drm_test_cmdline_name_bpp_option
[08:51:29] [PASSED] drm_test_cmdline_rotate_0
[08:51:29] [PASSED] drm_test_cmdline_rotate_90
[08:51:29] [PASSED] drm_test_cmdline_rotate_180
[08:51:29] [PASSED] drm_test_cmdline_rotate_270
[08:51:29] [PASSED] drm_test_cmdline_hmirror
[08:51:29] [PASSED] drm_test_cmdline_vmirror
[08:51:29] [PASSED] drm_test_cmdline_margin_options
[08:51:29] [PASSED] drm_test_cmdline_multiple_options
[08:51:29] [PASSED] drm_test_cmdline_bpp_extra_and_option
[08:51:29] [PASSED] drm_test_cmdline_extra_and_option
[08:51:29] [PASSED] drm_test_cmdline_freestanding_options
[08:51:29] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[08:51:29] [PASSED] drm_test_cmdline_panel_orientation
[08:51:29] ================ drm_test_cmdline_invalid =================
[08:51:29] [PASSED] margin_only
[08:51:29] [PASSED] interlace_only
[08:51:29] [PASSED] res_missing_x
[08:51:29] [PASSED] res_missing_y
[08:51:29] [PASSED] res_bad_y
[08:51:29] [PASSED] res_missing_y_bpp
[08:51:29] [PASSED] res_bad_bpp
[08:51:29] [PASSED] res_bad_refresh
[08:51:29] [PASSED] res_bpp_refresh_force_on_off
[08:51:29] [PASSED] res_invalid_mode
[08:51:29] [PASSED] res_bpp_wrong_place_mode
[08:51:29] [PASSED] name_bpp_refresh
[08:51:29] [PASSED] name_refresh
[08:51:29] [PASSED] name_refresh_wrong_mode
[08:51:29] [PASSED] name_refresh_invalid_mode
[08:51:29] [PASSED] rotate_multiple
[08:51:29] [PASSED] rotate_invalid_val
[08:51:29] [PASSED] rotate_truncated
[08:51:29] [PASSED] invalid_option
[08:51:29] [PASSED] invalid_tv_option
[08:51:29] [PASSED] truncated_tv_option
[08:51:29] ============ [PASSED] drm_test_cmdline_invalid =============
[08:51:29] =============== drm_test_cmdline_tv_options ===============
[08:51:29] [PASSED] NTSC
[08:51:29] [PASSED] NTSC_443
[08:51:29] [PASSED] NTSC_J
[08:51:29] [PASSED] PAL
[08:51:29] [PASSED] PAL_M
[08:51:29] [PASSED] PAL_N
[08:51:29] [PASSED] SECAM
[08:51:29] [PASSED] MONO_525
[08:51:29] [PASSED] MONO_625
[08:51:29] =========== [PASSED] drm_test_cmdline_tv_options ===========
[08:51:29] =============== [PASSED] drm_cmdline_parser ================
[08:51:29] ========== drmm_connector_hdmi_init (20 subtests) ==========
[08:51:29] [PASSED] drm_test_connector_hdmi_init_valid
[08:51:29] [PASSED] drm_test_connector_hdmi_init_bpc_8
[08:51:29] [PASSED] drm_test_connector_hdmi_init_bpc_10
[08:51:29] [PASSED] drm_test_connector_hdmi_init_bpc_12
[08:51:29] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[08:51:29] [PASSED] drm_test_connector_hdmi_init_bpc_null
[08:51:29] [PASSED] drm_test_connector_hdmi_init_formats_empty
[08:51:29] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[08:51:29] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[08:51:29] [PASSED] supported_formats=0x9 yuv420_allowed=1
[08:51:29] [PASSED] supported_formats=0x9 yuv420_allowed=0
[08:51:29] [PASSED] supported_formats=0x5 yuv420_allowed=1
[08:51:29] [PASSED] supported_formats=0x5 yuv420_allowed=0
[08:51:29] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[08:51:29] [PASSED] drm_test_connector_hdmi_init_null_ddc
[08:51:29] [PASSED] drm_test_connector_hdmi_init_null_product
[08:51:29] [PASSED] drm_test_connector_hdmi_init_null_vendor
[08:51:29] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[08:51:29] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[08:51:29] [PASSED] drm_test_connector_hdmi_init_product_valid
[08:51:29] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[08:51:29] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[08:51:29] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[08:51:29] ========= drm_test_connector_hdmi_init_type_valid =========
[08:51:29] [PASSED] HDMI-A
[08:51:29] [PASSED] HDMI-B
[08:51:29] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[08:51:29] ======== drm_test_connector_hdmi_init_type_invalid ========
[08:51:29] [PASSED] Unknown
[08:51:29] [PASSED] VGA
[08:51:29] [PASSED] DVI-I
[08:51:29] [PASSED] DVI-D
[08:51:29] [PASSED] DVI-A
[08:51:29] [PASSED] Composite
[08:51:29] [PASSED] SVIDEO
[08:51:29] [PASSED] LVDS
[08:51:29] [PASSED] Component
[08:51:29] [PASSED] DIN
[08:51:29] [PASSED] DP
[08:51:29] [PASSED] TV
[08:51:29] [PASSED] eDP
[08:51:29] [PASSED] Virtual
[08:51:29] [PASSED] DSI
[08:51:29] [PASSED] DPI
[08:51:29] [PASSED] Writeback
[08:51:29] [PASSED] SPI
[08:51:29] [PASSED] USB
[08:51:29] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[08:51:29] ============ [PASSED] drmm_connector_hdmi_init =============
[08:51:29] ============= drmm_connector_init (3 subtests) =============
[08:51:29] [PASSED] drm_test_drmm_connector_init
[08:51:29] [PASSED] drm_test_drmm_connector_init_null_ddc
[08:51:29] ========= drm_test_drmm_connector_init_type_valid =========
[08:51:29] [PASSED] Unknown
[08:51:29] [PASSED] VGA
[08:51:29] [PASSED] DVI-I
[08:51:29] [PASSED] DVI-D
[08:51:29] [PASSED] DVI-A
[08:51:29] [PASSED] Composite
[08:51:29] [PASSED] SVIDEO
[08:51:29] [PASSED] LVDS
[08:51:29] [PASSED] Component
[08:51:29] [PASSED] DIN
[08:51:29] [PASSED] DP
[08:51:29] [PASSED] HDMI-A
[08:51:29] [PASSED] HDMI-B
[08:51:29] [PASSED] TV
[08:51:29] [PASSED] eDP
[08:51:29] [PASSED] Virtual
[08:51:29] [PASSED] DSI
[08:51:29] [PASSED] DPI
[08:51:29] [PASSED] Writeback
[08:51:29] [PASSED] SPI
[08:51:29] [PASSED] USB
[08:51:29] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[08:51:29] =============== [PASSED] drmm_connector_init ===============
[08:51:29] ========= drm_connector_dynamic_init (6 subtests) ==========
[08:51:29] [PASSED] drm_test_drm_connector_dynamic_init
[08:51:29] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[08:51:29] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[08:51:29] [PASSED] drm_test_drm_connector_dynamic_init_properties
[08:51:29] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[08:51:29] [PASSED] Unknown
[08:51:29] [PASSED] VGA
[08:51:29] [PASSED] DVI-I
[08:51:29] [PASSED] DVI-D
[08:51:29] [PASSED] DVI-A
[08:51:29] [PASSED] Composite
[08:51:29] [PASSED] SVIDEO
[08:51:29] [PASSED] LVDS
[08:51:29] [PASSED] Component
[08:51:29] [PASSED] DIN
[08:51:29] [PASSED] DP
[08:51:29] [PASSED] HDMI-A
[08:51:29] [PASSED] HDMI-B
[08:51:29] [PASSED] TV
[08:51:29] [PASSED] eDP
[08:51:29] [PASSED] Virtual
[08:51:29] [PASSED] DSI
[08:51:29] [PASSED] DPI
[08:51:29] [PASSED] Writeback
[08:51:29] [PASSED] SPI
[08:51:29] [PASSED] USB
[08:51:29] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[08:51:29] ======== drm_test_drm_connector_dynamic_init_name =========
[08:51:29] [PASSED] Unknown
[08:51:29] [PASSED] VGA
[08:51:29] [PASSED] DVI-I
[08:51:29] [PASSED] DVI-D
[08:51:29] [PASSED] DVI-A
[08:51:29] [PASSED] Composite
[08:51:29] [PASSED] SVIDEO
[08:51:29] [PASSED] LVDS
[08:51:29] [PASSED] Component
[08:51:29] [PASSED] DIN
[08:51:29] [PASSED] DP
[08:51:29] [PASSED] HDMI-A
[08:51:29] [PASSED] HDMI-B
[08:51:29] [PASSED] TV
[08:51:29] [PASSED] eDP
[08:51:29] [PASSED] Virtual
[08:51:29] [PASSED] DSI
[08:51:29] [PASSED] DPI
[08:51:29] [PASSED] Writeback
[08:51:29] [PASSED] SPI
[08:51:29] [PASSED] USB
[08:51:29] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[08:51:29] =========== [PASSED] drm_connector_dynamic_init ============
[08:51:29] ==== drm_connector_dynamic_register_early (4 subtests) =====
[08:51:29] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[08:51:29] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[08:51:29] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[08:51:29] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[08:51:29] ====== [PASSED] drm_connector_dynamic_register_early =======
[08:51:29] ======= drm_connector_dynamic_register (7 subtests) ========
[08:51:29] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[08:51:29] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[08:51:29] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[08:51:29] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[08:51:29] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[08:51:29] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[08:51:29] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[08:51:29] ========= [PASSED] drm_connector_dynamic_register ==========
[08:51:29] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[08:51:29] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[08:51:29] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[08:51:29] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[08:51:29] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[08:51:29] ========== drm_test_get_tv_mode_from_name_valid ===========
[08:51:29] [PASSED] NTSC
[08:51:29] [PASSED] NTSC-443
[08:51:29] [PASSED] NTSC-J
[08:51:29] [PASSED] PAL
[08:51:29] [PASSED] PAL-M
[08:51:29] [PASSED] PAL-N
[08:51:29] [PASSED] SECAM
[08:51:29] [PASSED] Mono
[08:51:29] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[08:51:29] [PASSED] drm_test_get_tv_mode_from_name_truncated
[08:51:29] ============ [PASSED] drm_get_tv_mode_from_name ============
[08:51:29] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[08:51:29] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[08:51:29] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[08:51:29] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[08:51:29] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[08:51:29] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[08:51:29] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[08:51:29] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[08:51:29] [PASSED] VIC 96
[08:51:29] [PASSED] VIC 97
[08:51:29] [PASSED] VIC 101
[08:51:29] [PASSED] VIC 102
[08:51:29] [PASSED] VIC 106
[08:51:29] [PASSED] VIC 107
[08:51:29] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[08:51:29] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[08:51:29] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[08:51:29] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[08:51:29] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[08:51:29] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[08:51:29] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[08:51:29] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[08:51:29] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[08:51:29] [PASSED] Automatic
[08:51:29] [PASSED] Full
[08:51:29] [PASSED] Limited 16:235
[08:51:29] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[08:51:29] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[08:51:29] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[08:51:29] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[08:51:29] === drm_test_drm_hdmi_connector_get_output_format_name ====
[08:51:29] [PASSED] RGB
[08:51:29] [PASSED] YUV 4:2:0
[08:51:29] [PASSED] YUV 4:2:2
[08:51:29] [PASSED] YUV 4:4:4
[08:51:29] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[08:51:29] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[08:51:29] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[08:51:29] ============= drm_damage_helper (21 subtests) ==============
[08:51:29] [PASSED] drm_test_damage_iter_no_damage
[08:51:29] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[08:51:29] [PASSED] drm_test_damage_iter_no_damage_src_moved
[08:51:29] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[08:51:29] [PASSED] drm_test_damage_iter_no_damage_not_visible
[08:51:29] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[08:51:29] [PASSED] drm_test_damage_iter_no_damage_no_fb
[08:51:29] [PASSED] drm_test_damage_iter_simple_damage
[08:51:29] [PASSED] drm_test_damage_iter_single_damage
[08:51:29] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[08:51:29] [PASSED] drm_test_damage_iter_single_damage_outside_src
[08:51:29] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[08:51:29] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[08:51:29] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[08:51:29] [PASSED] drm_test_damage_iter_single_damage_src_moved
[08:51:29] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[08:51:29] [PASSED] drm_test_damage_iter_damage
[08:51:29] [PASSED] drm_test_damage_iter_damage_one_intersect
[08:51:29] [PASSED] drm_test_damage_iter_damage_one_outside
[08:51:29] [PASSED] drm_test_damage_iter_damage_src_moved
[08:51:29] [PASSED] drm_test_damage_iter_damage_not_visible
[08:51:29] ================ [PASSED] drm_damage_helper ================
[08:51:29] ============== drm_dp_mst_helper (3 subtests) ==============
[08:51:29] ============== drm_test_dp_mst_calc_pbn_mode ==============
[08:51:29] [PASSED] Clock 154000 BPP 30 DSC disabled
[08:51:29] [PASSED] Clock 234000 BPP 30 DSC disabled
[08:51:29] [PASSED] Clock 297000 BPP 24 DSC disabled
[08:51:29] [PASSED] Clock 332880 BPP 24 DSC enabled
[08:51:29] [PASSED] Clock 324540 BPP 24 DSC enabled
[08:51:29] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[08:51:29] ============== drm_test_dp_mst_calc_pbn_div ===============
[08:51:29] [PASSED] Link rate 2000000 lane count 4
[08:51:29] [PASSED] Link rate 2000000 lane count 2
[08:51:29] [PASSED] Link rate 2000000 lane count 1
[08:51:29] [PASSED] Link rate 1350000 lane count 4
[08:51:29] [PASSED] Link rate 1350000 lane count 2
[08:51:29] [PASSED] Link rate 1350000 lane count 1
[08:51:29] [PASSED] Link rate 1000000 lane count 4
[08:51:29] [PASSED] Link rate 1000000 lane count 2
[08:51:29] [PASSED] Link rate 1000000 lane count 1
[08:51:29] [PASSED] Link rate 810000 lane count 4
[08:51:29] [PASSED] Link rate 810000 lane count 2
[08:51:29] [PASSED] Link rate 810000 lane count 1
[08:51:29] [PASSED] Link rate 540000 lane count 4
[08:51:29] [PASSED] Link rate 540000 lane count 2
[08:51:29] [PASSED] Link rate 540000 lane count 1
[08:51:29] [PASSED] Link rate 270000 lane count 4
[08:51:29] [PASSED] Link rate 270000 lane count 2
[08:51:29] [PASSED] Link rate 270000 lane count 1
[08:51:29] [PASSED] Link rate 162000 lane count 4
[08:51:29] [PASSED] Link rate 162000 lane count 2
[08:51:29] [PASSED] Link rate 162000 lane count 1
[08:51:29] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[08:51:29] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[08:51:29] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[08:51:29] [PASSED] DP_POWER_UP_PHY with port number
[08:51:29] [PASSED] DP_POWER_DOWN_PHY with port number
[08:51:29] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[08:51:29] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[08:51:29] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[08:51:29] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[08:51:29] [PASSED] DP_QUERY_PAYLOAD with port number
[08:51:29] [PASSED] DP_QUERY_PAYLOAD with VCPI
[08:51:29] [PASSED] DP_REMOTE_DPCD_READ with port number
[08:51:29] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[08:51:29] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[08:51:29] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[08:51:29] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[08:51:29] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[08:51:29] [PASSED] DP_REMOTE_I2C_READ with port number
[08:51:29] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[08:51:29] [PASSED] DP_REMOTE_I2C_READ with transactions array
[08:51:29] [PASSED] DP_REMOTE_I2C_WRITE with port number
[08:51:29] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[08:51:29] [PASSED] DP_REMOTE_I2C_WRITE with data array
[08:51:29] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[08:51:29] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[08:51:29] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[08:51:29] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[08:51:29] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[08:51:29] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[08:51:29] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[08:51:29] ================ [PASSED] drm_dp_mst_helper ================
[08:51:29] ================== drm_exec (7 subtests) ===================
[08:51:29] [PASSED] sanitycheck
[08:51:29] [PASSED] test_lock
[08:51:29] [PASSED] test_lock_unlock
[08:51:29] [PASSED] test_duplicates
[08:51:29] [PASSED] test_prepare
[08:51:29] [PASSED] test_prepare_array
[08:51:29] [PASSED] test_multiple_loops
[08:51:29] ==================== [PASSED] drm_exec =====================
[08:51:29] =========== drm_format_helper_test (17 subtests) ===========
[08:51:29] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[08:51:29] [PASSED] single_pixel_source_buffer
[08:51:29] [PASSED] single_pixel_clip_rectangle
[08:51:29] [PASSED] well_known_colors
[08:51:29] [PASSED] destination_pitch
[08:51:29] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[08:51:29] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[08:51:29] [PASSED] single_pixel_source_buffer
[08:51:29] [PASSED] single_pixel_clip_rectangle
[08:51:29] [PASSED] well_known_colors
[08:51:29] [PASSED] destination_pitch
[08:51:29] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[08:51:29] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[08:51:29] [PASSED] single_pixel_source_buffer
[08:51:29] [PASSED] single_pixel_clip_rectangle
[08:51:29] [PASSED] well_known_colors
[08:51:29] [PASSED] destination_pitch
[08:51:29] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[08:51:29] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[08:51:29] [PASSED] single_pixel_source_buffer
[08:51:29] [PASSED] single_pixel_clip_rectangle
[08:51:29] [PASSED] well_known_colors
[08:51:29] [PASSED] destination_pitch
[08:51:29] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[08:51:29] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[08:51:29] [PASSED] single_pixel_source_buffer
[08:51:29] [PASSED] single_pixel_clip_rectangle
[08:51:29] [PASSED] well_known_colors
[08:51:29] [PASSED] destination_pitch
[08:51:29] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[08:51:29] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[08:51:29] [PASSED] single_pixel_source_buffer
[08:51:29] [PASSED] single_pixel_clip_rectangle
[08:51:29] [PASSED] well_known_colors
[08:51:29] [PASSED] destination_pitch
[08:51:29] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[08:51:29] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[08:51:29] [PASSED] single_pixel_source_buffer
[08:51:29] [PASSED] single_pixel_clip_rectangle
[08:51:29] [PASSED] well_known_colors
[08:51:29] [PASSED] destination_pitch
[08:51:29] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[08:51:29] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[08:51:29] [PASSED] single_pixel_source_buffer
[08:51:29] [PASSED] single_pixel_clip_rectangle
[08:51:29] [PASSED] well_known_colors
[08:51:29] [PASSED] destination_pitch
[08:51:29] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[08:51:29] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[08:51:29] [PASSED] single_pixel_source_buffer
[08:51:29] [PASSED] single_pixel_clip_rectangle
[08:51:29] [PASSED] well_known_colors
[08:51:29] [PASSED] destination_pitch
[08:51:29] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[08:51:29] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[08:51:29] [PASSED] single_pixel_source_buffer
[08:51:29] [PASSED] single_pixel_clip_rectangle
[08:51:29] [PASSED] well_known_colors
[08:51:29] [PASSED] destination_pitch
[08:51:29] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[08:51:29] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[08:51:29] [PASSED] single_pixel_source_buffer
[08:51:29] [PASSED] single_pixel_clip_rectangle
[08:51:29] [PASSED] well_known_colors
[08:51:29] [PASSED] destination_pitch
[08:51:29] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[08:51:29] ============== drm_test_fb_xrgb8888_to_mono ===============
[08:51:29] [PASSED] single_pixel_source_buffer
[08:51:29] [PASSED] single_pixel_clip_rectangle
[08:51:29] [PASSED] well_known_colors
[08:51:29] [PASSED] destination_pitch
[08:51:29] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[08:51:29] ==================== drm_test_fb_swab =====================
[08:51:29] [PASSED] single_pixel_source_buffer
[08:51:29] [PASSED] single_pixel_clip_rectangle
[08:51:29] [PASSED] well_known_colors
[08:51:29] [PASSED] destination_pitch
[08:51:29] ================ [PASSED] drm_test_fb_swab =================
[08:51:29] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[08:51:29] [PASSED] single_pixel_source_buffer
[08:51:29] [PASSED] single_pixel_clip_rectangle
[08:51:29] [PASSED] well_known_colors
[08:51:29] [PASSED] destination_pitch
[08:51:29] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[08:51:29] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[08:51:29] [PASSED] single_pixel_source_buffer
[08:51:29] [PASSED] single_pixel_clip_rectangle
[08:51:29] [PASSED] well_known_colors
[08:51:29] [PASSED] destination_pitch
[08:51:29] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[08:51:29] ================= drm_test_fb_clip_offset =================
[08:51:29] [PASSED] pass through
[08:51:29] [PASSED] horizontal offset
[08:51:29] [PASSED] vertical offset
[08:51:29] [PASSED] horizontal and vertical offset
[08:51:29] [PASSED] horizontal offset (custom pitch)
[08:51:29] [PASSED] vertical offset (custom pitch)
[08:51:29] [PASSED] horizontal and vertical offset (custom pitch)
[08:51:29] ============= [PASSED] drm_test_fb_clip_offset =============
[08:51:29] =================== drm_test_fb_memcpy ====================
[08:51:29] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[08:51:29] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[08:51:29] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[08:51:29] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[08:51:29] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[08:51:29] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[08:51:29] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[08:51:29] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[08:51:29] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[08:51:29] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[08:51:29] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[08:51:29] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[08:51:29] =============== [PASSED] drm_test_fb_memcpy ================
[08:51:29] ============= [PASSED] drm_format_helper_test ==============
[08:51:29] ================= drm_format (18 subtests) =================
[08:51:29] [PASSED] drm_test_format_block_width_invalid
[08:51:29] [PASSED] drm_test_format_block_width_one_plane
[08:51:29] [PASSED] drm_test_format_block_width_two_plane
[08:51:29] [PASSED] drm_test_format_block_width_three_plane
[08:51:29] [PASSED] drm_test_format_block_width_tiled
[08:51:29] [PASSED] drm_test_format_block_height_invalid
[08:51:29] [PASSED] drm_test_format_block_height_one_plane
[08:51:29] [PASSED] drm_test_format_block_height_two_plane
[08:51:29] [PASSED] drm_test_format_block_height_three_plane
[08:51:29] [PASSED] drm_test_format_block_height_tiled
[08:51:29] [PASSED] drm_test_format_min_pitch_invalid
[08:51:29] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[08:51:29] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[08:51:29] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[08:51:29] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[08:51:29] [PASSED] drm_test_format_min_pitch_two_plane
[08:51:29] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[08:51:29] [PASSED] drm_test_format_min_pitch_tiled
[08:51:29] =================== [PASSED] drm_format ====================
[08:51:29] ============== drm_framebuffer (10 subtests) ===============
[08:51:29] ========== drm_test_framebuffer_check_src_coords ==========
[08:51:29] [PASSED] Success: source fits into fb
[08:51:29] [PASSED] Fail: overflowing fb with x-axis coordinate
[08:51:29] [PASSED] Fail: overflowing fb with y-axis coordinate
[08:51:29] [PASSED] Fail: overflowing fb with source width
[08:51:29] [PASSED] Fail: overflowing fb with source height
[08:51:29] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[08:51:29] [PASSED] drm_test_framebuffer_cleanup
[08:51:29] =============== drm_test_framebuffer_create ===============
[08:51:29] [PASSED] ABGR8888 normal sizes
[08:51:29] [PASSED] ABGR8888 max sizes
[08:51:29] [PASSED] ABGR8888 pitch greater than min required
[08:51:29] [PASSED] ABGR8888 pitch less than min required
[08:51:29] [PASSED] ABGR8888 Invalid width
[08:51:29] [PASSED] ABGR8888 Invalid buffer handle
[08:51:29] [PASSED] No pixel format
[08:51:29] [PASSED] ABGR8888 Width 0
[08:51:29] [PASSED] ABGR8888 Height 0
[08:51:29] [PASSED] ABGR8888 Out of bound height * pitch combination
[08:51:29] [PASSED] ABGR8888 Large buffer offset
[08:51:29] [PASSED] ABGR8888 Buffer offset for inexistent plane
[08:51:29] [PASSED] ABGR8888 Invalid flag
[08:51:29] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[08:51:29] [PASSED] ABGR8888 Valid buffer modifier
[08:51:29] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[08:51:29] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[08:51:29] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[08:51:29] [PASSED] NV12 Normal sizes
[08:51:29] [PASSED] NV12 Max sizes
[08:51:29] [PASSED] NV12 Invalid pitch
[08:51:29] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[08:51:29] [PASSED] NV12 different modifier per-plane
[08:51:29] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[08:51:29] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[08:51:29] [PASSED] NV12 Modifier for inexistent plane
[08:51:29] [PASSED] NV12 Handle for inexistent plane
[08:51:29] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[08:51:29] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[08:51:29] [PASSED] YVU420 Normal sizes
[08:51:29] [PASSED] YVU420 Max sizes
[08:51:29] [PASSED] YVU420 Invalid pitch
[08:51:29] [PASSED] YVU420 Different pitches
[08:51:29] [PASSED] YVU420 Different buffer offsets/pitches
[08:51:29] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[08:51:29] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[08:51:29] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[08:51:29] [PASSED] YVU420 Valid modifier
[08:51:29] [PASSED] YVU420 Different modifiers per plane
[08:51:29] [PASSED] YVU420 Modifier for inexistent plane
[08:51:29] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[08:51:29] [PASSED] X0L2 Normal sizes
[08:51:29] [PASSED] X0L2 Max sizes
[08:51:29] [PASSED] X0L2 Invalid pitch
[08:51:29] [PASSED] X0L2 Pitch greater than minimum required
[08:51:29] [PASSED] X0L2 Handle for inexistent plane
[08:51:29] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[08:51:29] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[08:51:29] [PASSED] X0L2 Valid modifier
[08:51:29] [PASSED] X0L2 Modifier for inexistent plane
[08:51:29] =========== [PASSED] drm_test_framebuffer_create ===========
[08:51:29] [PASSED] drm_test_framebuffer_free
[08:51:29] [PASSED] drm_test_framebuffer_init
[08:51:29] [PASSED] drm_test_framebuffer_init_bad_format
[08:51:29] [PASSED] drm_test_framebuffer_init_dev_mismatch
[08:51:29] [PASSED] drm_test_framebuffer_lookup
[08:51:29] [PASSED] drm_test_framebuffer_lookup_inexistent
[08:51:29] [PASSED] drm_test_framebuffer_modifiers_not_supported
[08:51:29] ================= [PASSED] drm_framebuffer =================
[08:51:29] ================ drm_gem_shmem (8 subtests) ================
[08:51:29] [PASSED] drm_gem_shmem_test_obj_create
[08:51:29] [PASSED] drm_gem_shmem_test_obj_create_private
[08:51:29] [PASSED] drm_gem_shmem_test_pin_pages
[08:51:29] [PASSED] drm_gem_shmem_test_vmap
[08:51:29] [PASSED] drm_gem_shmem_test_get_sg_table
[08:51:29] [PASSED] drm_gem_shmem_test_get_pages_sgt
[08:51:29] [PASSED] drm_gem_shmem_test_madvise
[08:51:29] [PASSED] drm_gem_shmem_test_purge
[08:51:29] ================== [PASSED] drm_gem_shmem ==================
[08:51:29] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[08:51:29] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[08:51:29] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[08:51:29] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[08:51:29] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[08:51:29] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[08:51:29] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[08:51:29] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[08:51:29] [PASSED] Automatic
[08:51:29] [PASSED] Full
[08:51:29] [PASSED] Limited 16:235
[08:51:29] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[08:51:29] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[08:51:29] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[08:51:29] [PASSED] drm_test_check_disable_connector
[08:51:29] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[08:51:29] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[08:51:29] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[08:51:29] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[08:51:29] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[08:51:29] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[08:51:29] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[08:51:29] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[08:51:29] [PASSED] drm_test_check_output_bpc_dvi
[08:51:29] [PASSED] drm_test_check_output_bpc_format_vic_1
[08:51:29] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[08:51:29] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[08:51:29] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[08:51:29] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[08:51:29] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[08:51:29] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[08:51:29] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[08:51:29] ============ drm_test_check_hdmi_color_format =============
[08:51:29] [PASSED] AUTO -> RGB
[08:51:29] [PASSED] YCBCR422 -> YUV422
[08:51:29] [PASSED] YCBCR420 -> YUV420
[08:51:29] [PASSED] YCBCR444 -> YUV444
[08:51:29] [PASSED] RGB -> RGB
[08:51:29] ======== [PASSED] drm_test_check_hdmi_color_format =========
[08:51:29] ======== drm_test_check_hdmi_color_format_420_only ========
[08:51:29] [PASSED] RGB should fail
[08:51:29] [PASSED] YUV444 should fail
[08:51:29] [PASSED] YUV422 should fail
[08:51:29] [PASSED] YUV420 should work
[08:51:29] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[08:51:29] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[08:51:29] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[08:51:29] [PASSED] drm_test_check_broadcast_rgb_value
[08:51:29] [PASSED] drm_test_check_bpc_8_value
[08:51:29] [PASSED] drm_test_check_bpc_10_value
[08:51:29] [PASSED] drm_test_check_bpc_12_value
[08:51:29] [PASSED] drm_test_check_format_value
[08:51:29] [PASSED] drm_test_check_tmds_char_value
[08:51:29] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[08:51:29] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[08:51:29] [PASSED] drm_test_check_mode_valid
[08:51:29] [PASSED] drm_test_check_mode_valid_reject
[08:51:29] [PASSED] drm_test_check_mode_valid_reject_rate
[08:51:29] [PASSED] drm_test_check_mode_valid_reject_max_clock
[08:51:29] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[08:51:29] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[08:51:29] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[08:51:29] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[08:51:29] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[08:51:29] [PASSED] drm_test_check_infoframes
[08:51:29] [PASSED] drm_test_check_reject_avi_infoframe
[08:51:29] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[08:51:29] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[08:51:29] [PASSED] drm_test_check_reject_audio_infoframe
[08:51:29] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[08:51:29] ================= drm_managed (2 subtests) =================
[08:51:29] [PASSED] drm_test_managed_release_action
[08:51:29] [PASSED] drm_test_managed_run_action
[08:51:29] =================== [PASSED] drm_managed ===================
[08:51:29] =================== drm_mm (6 subtests) ====================
[08:51:29] [PASSED] drm_test_mm_init
[08:51:29] [PASSED] drm_test_mm_debug
[08:51:29] [PASSED] drm_test_mm_align32
[08:51:29] [PASSED] drm_test_mm_align64
[08:51:29] [PASSED] drm_test_mm_lowest
[08:51:29] [PASSED] drm_test_mm_highest
[08:51:29] ===================== [PASSED] drm_mm ======================
[08:51:29] ============= drm_modes_analog_tv (5 subtests) =============
[08:51:29] [PASSED] drm_test_modes_analog_tv_mono_576i
[08:51:29] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[08:51:29] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[08:51:29] [PASSED] drm_test_modes_analog_tv_pal_576i
[08:51:29] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[08:51:29] =============== [PASSED] drm_modes_analog_tv ===============
[08:51:29] ============== drm_plane_helper (2 subtests) ===============
[08:51:29] =============== drm_test_check_plane_state ================
[08:51:29] [PASSED] clipping_simple
[08:51:29] [PASSED] clipping_rotate_reflect
[08:51:29] [PASSED] positioning_simple
[08:51:29] [PASSED] upscaling
[08:51:29] [PASSED] downscaling
[08:51:29] [PASSED] rounding1
[08:51:29] [PASSED] rounding2
[08:51:29] [PASSED] rounding3
[08:51:29] [PASSED] rounding4
[08:51:29] =========== [PASSED] drm_test_check_plane_state ============
[08:51:29] =========== drm_test_check_invalid_plane_state ============
[08:51:29] [PASSED] positioning_invalid
[08:51:29] [PASSED] upscaling_invalid
[08:51:29] [PASSED] downscaling_invalid
[08:51:29] ======= [PASSED] drm_test_check_invalid_plane_state ========
[08:51:29] ================ [PASSED] drm_plane_helper =================
[08:51:29] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[08:51:29] ====== drm_test_connector_helper_tv_get_modes_check =======
[08:51:29] [PASSED] None
[08:51:29] [PASSED] PAL
[08:51:29] [PASSED] NTSC
[08:51:29] [PASSED] Both, NTSC Default
[08:51:29] [PASSED] Both, PAL Default
[08:51:29] [PASSED] Both, NTSC Default, with PAL on command-line
[08:51:29] [PASSED] Both, PAL Default, with NTSC on command-line
[08:51:29] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[08:51:29] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[08:51:29] ================== drm_rect (9 subtests) ===================
[08:51:29] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[08:51:29] [PASSED] drm_test_rect_clip_scaled_not_clipped
[08:51:29] [PASSED] drm_test_rect_clip_scaled_clipped
[08:51:29] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[08:51:29] ================= drm_test_rect_intersect =================
[08:51:29] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[08:51:29] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[08:51:29] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[08:51:29] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[08:51:29] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[08:51:29] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[08:51:29] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[08:51:29] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[08:51:29] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[08:51:29] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[08:51:29] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[08:51:29] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[08:51:29] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[08:51:29] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[08:51:29] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[08:51:29] ============= [PASSED] drm_test_rect_intersect =============
[08:51:29] ================ drm_test_rect_calc_hscale ================
[08:51:29] [PASSED] normal use
[08:51:29] [PASSED] out of max range
[08:51:29] [PASSED] out of min range
[08:51:29] [PASSED] zero dst
[08:51:29] [PASSED] negative src
[08:51:29] [PASSED] negative dst
[08:51:29] ============ [PASSED] drm_test_rect_calc_hscale ============
[08:51:29] ================ drm_test_rect_calc_vscale ================
[08:51:29] [PASSED] normal use
[08:51:29] [PASSED] out of max range
[08:51:29] [PASSED] out of min range
[08:51:29] [PASSED] zero dst
[08:51:29] [PASSED] negative src
[08:51:29] [PASSED] negative dst
[08:51:29] ============ [PASSED] drm_test_rect_calc_vscale ============
[08:51:29] ================== drm_test_rect_rotate ===================
[08:51:29] [PASSED] reflect-x
[08:51:29] [PASSED] reflect-y
[08:51:29] [PASSED] rotate-0
[08:51:29] [PASSED] rotate-90
[08:51:29] [PASSED] rotate-180
[08:51:29] [PASSED] rotate-270
[08:51:29] ============== [PASSED] drm_test_rect_rotate ===============
[08:51:29] ================ drm_test_rect_rotate_inv =================
[08:51:29] [PASSED] reflect-x
[08:51:29] [PASSED] reflect-y
[08:51:29] [PASSED] rotate-0
[08:51:29] [PASSED] rotate-90
[08:51:29] [PASSED] rotate-180
[08:51:29] [PASSED] rotate-270
[08:51:29] ============ [PASSED] drm_test_rect_rotate_inv =============
[08:51:29] ==================== [PASSED] drm_rect =====================
[08:51:29] ============ drm_sysfb_modeset_test (1 subtest) ============
[08:51:29] ============ drm_test_sysfb_build_fourcc_list =============
[08:51:29] [PASSED] no native formats
[08:51:29] [PASSED] XRGB8888 as native format
[08:51:29] [PASSED] remove duplicates
[08:51:29] [PASSED] convert alpha formats
[08:51:29] [PASSED] random formats
[08:51:29] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[08:51:29] ============= [PASSED] drm_sysfb_modeset_test ==============
[08:51:29] ================== drm_fixp (2 subtests) ===================
[08:51:29] [PASSED] drm_test_int2fixp
[08:51:29] [PASSED] drm_test_sm2fixp
[08:51:29] ==================== [PASSED] drm_fixp =====================
[08:51:29] ============================================================
[08:51:29] Testing complete. Ran 639 tests: passed: 639
[08:51:29] Elapsed time: 25.890s total, 1.696s configuring, 24.025s building, 0.150s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[08:51:29] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:51:31] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:51:40] Starting KUnit Kernel (1/1)...
[08:51:40] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:51:40] ================= ttm_device (5 subtests) ==================
[08:51:40] [PASSED] ttm_device_init_basic
[08:51:40] [PASSED] ttm_device_init_multiple
[08:51:40] [PASSED] ttm_device_fini_basic
[08:51:40] [PASSED] ttm_device_init_no_vma_man
[08:51:40] ================== ttm_device_init_pools ==================
[08:51:40] [PASSED] No DMA allocations, no DMA32 required
[08:51:40] [PASSED] DMA allocations, DMA32 required
[08:51:40] [PASSED] No DMA allocations, DMA32 required
[08:51:40] [PASSED] DMA allocations, no DMA32 required
[08:51:40] ============== [PASSED] ttm_device_init_pools ==============
[08:51:40] =================== [PASSED] ttm_device ====================
[08:51:40] ================== ttm_pool (8 subtests) ===================
[08:51:40] ================== ttm_pool_alloc_basic ===================
[08:51:40] [PASSED] One page
[08:51:40] [PASSED] More than one page
[08:51:40] [PASSED] Above the allocation limit
[08:51:40] [PASSED] One page, with coherent DMA mappings enabled
[08:51:40] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:51:40] ============== [PASSED] ttm_pool_alloc_basic ===============
[08:51:40] ============== ttm_pool_alloc_basic_dma_addr ==============
[08:51:40] [PASSED] One page
[08:51:40] [PASSED] More than one page
[08:51:40] [PASSED] Above the allocation limit
[08:51:40] [PASSED] One page, with coherent DMA mappings enabled
[08:51:40] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:51:40] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[08:51:40] [PASSED] ttm_pool_alloc_order_caching_match
[08:51:40] [PASSED] ttm_pool_alloc_caching_mismatch
[08:51:40] [PASSED] ttm_pool_alloc_order_mismatch
[08:51:40] [PASSED] ttm_pool_free_dma_alloc
[08:51:40] [PASSED] ttm_pool_free_no_dma_alloc
[08:51:40] [PASSED] ttm_pool_fini_basic
[08:51:40] ==================== [PASSED] ttm_pool =====================
[08:51:40] ================ ttm_resource (8 subtests) =================
[08:51:40] ================= ttm_resource_init_basic =================
[08:51:40] [PASSED] Init resource in TTM_PL_SYSTEM
[08:51:40] [PASSED] Init resource in TTM_PL_VRAM
[08:51:40] [PASSED] Init resource in a private placement
[08:51:40] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[08:51:40] ============= [PASSED] ttm_resource_init_basic =============
[08:51:40] [PASSED] ttm_resource_init_pinned
[08:51:40] [PASSED] ttm_resource_fini_basic
[08:51:40] [PASSED] ttm_resource_manager_init_basic
[08:51:40] [PASSED] ttm_resource_manager_usage_basic
[08:51:40] [PASSED] ttm_resource_manager_set_used_basic
[08:51:40] [PASSED] ttm_sys_man_alloc_basic
[08:51:40] [PASSED] ttm_sys_man_free_basic
[08:51:40] ================== [PASSED] ttm_resource ===================
[08:51:40] =================== ttm_tt (15 subtests) ===================
[08:51:40] ==================== ttm_tt_init_basic ====================
[08:51:40] [PASSED] Page-aligned size
[08:51:40] [PASSED] Extra pages requested
[08:51:40] ================ [PASSED] ttm_tt_init_basic ================
[08:51:40] [PASSED] ttm_tt_init_misaligned
[08:51:40] [PASSED] ttm_tt_fini_basic
[08:51:40] [PASSED] ttm_tt_fini_sg
[08:51:40] [PASSED] ttm_tt_fini_shmem
[08:51:40] [PASSED] ttm_tt_create_basic
[08:51:40] [PASSED] ttm_tt_create_invalid_bo_type
[08:51:40] [PASSED] ttm_tt_create_ttm_exists
[08:51:40] [PASSED] ttm_tt_create_failed
[08:51:40] [PASSED] ttm_tt_destroy_basic
[08:51:40] [PASSED] ttm_tt_populate_null_ttm
[08:51:40] [PASSED] ttm_tt_populate_populated_ttm
[08:51:40] [PASSED] ttm_tt_unpopulate_basic
[08:51:40] [PASSED] ttm_tt_unpopulate_empty_ttm
[08:51:40] [PASSED] ttm_tt_swapin_basic
[08:51:40] ===================== [PASSED] ttm_tt ======================
[08:51:40] =================== ttm_bo (14 subtests) ===================
[08:51:40] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[08:51:40] [PASSED] Cannot be interrupted and sleeps
[08:51:40] [PASSED] Cannot be interrupted, locks straight away
[08:51:40] [PASSED] Can be interrupted, sleeps
[08:51:40] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[08:51:40] [PASSED] ttm_bo_reserve_locked_no_sleep
[08:51:40] [PASSED] ttm_bo_reserve_no_wait_ticket
[08:51:41] [PASSED] ttm_bo_reserve_double_resv
[08:51:41] [PASSED] ttm_bo_reserve_interrupted
[08:51:41] [PASSED] ttm_bo_reserve_deadlock
[08:51:41] [PASSED] ttm_bo_unreserve_basic
[08:51:41] [PASSED] ttm_bo_unreserve_pinned
[08:51:41] [PASSED] ttm_bo_unreserve_bulk
[08:51:41] [PASSED] ttm_bo_fini_basic
[08:51:41] [PASSED] ttm_bo_fini_shared_resv
[08:51:41] [PASSED] ttm_bo_pin_basic
[08:51:41] [PASSED] ttm_bo_pin_unpin_resource
[08:51:41] [PASSED] ttm_bo_multiple_pin_one_unpin
[08:51:41] ===================== [PASSED] ttm_bo ======================
[08:51:41] ============== ttm_bo_validate (22 subtests) ===============
[08:51:41] ============== ttm_bo_init_reserved_sys_man ===============
[08:51:41] [PASSED] Buffer object for userspace
[08:51:41] [PASSED] Kernel buffer object
[08:51:41] [PASSED] Shared buffer object
[08:51:41] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[08:51:41] ============== ttm_bo_init_reserved_mock_man ==============
[08:51:41] [PASSED] Buffer object for userspace
[08:51:41] [PASSED] Kernel buffer object
[08:51:41] [PASSED] Shared buffer object
[08:51:41] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[08:51:41] [PASSED] ttm_bo_init_reserved_resv
[08:51:41] ================== ttm_bo_validate_basic ==================
[08:51:41] [PASSED] Buffer object for userspace
[08:51:41] [PASSED] Kernel buffer object
[08:51:41] [PASSED] Shared buffer object
[08:51:41] ============== [PASSED] ttm_bo_validate_basic ==============
[08:51:41] [PASSED] ttm_bo_validate_invalid_placement
[08:51:41] ============= ttm_bo_validate_same_placement ==============
[08:51:41] [PASSED] System manager
[08:51:41] [PASSED] VRAM manager
[08:51:41] ========= [PASSED] ttm_bo_validate_same_placement ==========
[08:51:41] [PASSED] ttm_bo_validate_failed_alloc
[08:51:41] [PASSED] ttm_bo_validate_pinned
[08:51:41] [PASSED] ttm_bo_validate_busy_placement
[08:51:41] ================ ttm_bo_validate_multihop =================
[08:51:41] [PASSED] Buffer object for userspace
[08:51:41] [PASSED] Kernel buffer object
[08:51:41] [PASSED] Shared buffer object
[08:51:41] ============ [PASSED] ttm_bo_validate_multihop =============
[08:51:41] ========== ttm_bo_validate_no_placement_signaled ==========
[08:51:41] [PASSED] Buffer object in system domain, no page vector
[08:51:41] [PASSED] Buffer object in system domain with an existing page vector
[08:51:41] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[08:51:41] ======== ttm_bo_validate_no_placement_not_signaled ========
[08:51:41] [PASSED] Buffer object for userspace
[08:51:41] [PASSED] Kernel buffer object
[08:51:41] [PASSED] Shared buffer object
[08:51:41] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[08:51:41] [PASSED] ttm_bo_validate_move_fence_signaled
[08:51:41] ========= ttm_bo_validate_move_fence_not_signaled =========
[08:51:41] [PASSED] Waits for GPU
[08:51:41] [PASSED] Tries to lock straight away
[08:51:41] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[08:51:41] [PASSED] ttm_bo_validate_swapout
[08:51:41] [PASSED] ttm_bo_validate_happy_evict
[08:51:41] [PASSED] ttm_bo_validate_all_pinned_evict
[08:51:41] [PASSED] ttm_bo_validate_allowed_only_evict
[08:51:41] [PASSED] ttm_bo_validate_deleted_evict
[08:51:41] [PASSED] ttm_bo_validate_busy_domain_evict
[08:51:41] [PASSED] ttm_bo_validate_evict_gutting
[08:51:41] [PASSED] ttm_bo_validate_recrusive_evict
[08:51:41] ================= [PASSED] ttm_bo_validate =================
[08:51:41] ============================================================
[08:51:41] Testing complete. Ran 102 tests: passed: 102
[08:51:41] Elapsed time: 11.690s total, 1.763s configuring, 9.662s building, 0.221s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 34+ messages in thread
* ✗ Xe.CI.BAT: failure for drm/xe/forcewake: add delayed-release optimization (rev3)
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (9 preceding siblings ...)
2026-06-25 8:51 ` ✓ CI.KUnit: success for drm/xe/forcewake: add delayed-release optimization (rev3) Patchwork
@ 2026-06-25 9:26 ` Patchwork
2026-06-25 10:55 ` ✗ Xe.CI.FULL: " Patchwork
` (8 subsequent siblings)
19 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2026-06-25 9:26 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 4768 bytes --]
== Series Details ==
Series: drm/xe/forcewake: add delayed-release optimization (rev3)
URL : https://patchwork.freedesktop.org/series/167697/
State : failure
== Summary ==
CI Bug Log - changes from xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973_BAT -> xe-pw-167697v3_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-167697v3_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-167697v3_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-167697v3_BAT:
### IGT changes ###
#### Possible regressions ####
* igt@xe_ccs@ctrl-surf-copy@linear-compressed-compfmt0-system-vram01:
- bat-bmg-2: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/bat-bmg-2/igt@xe_ccs@ctrl-surf-copy@linear-compressed-compfmt0-system-vram01.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/bat-bmg-2/igt@xe_ccs@ctrl-surf-copy@linear-compressed-compfmt0-system-vram01.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race:
- bat-bmg-3: NOTRUN -> [CRASH][3] +4 other tests crash
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/bat-bmg-3/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate:
- bat-bmg-3: NOTRUN -> [INCOMPLETE][4] +1 other test incomplete
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/bat-bmg-3/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate.html
* igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz:
- bat-bmg-3: NOTRUN -> [FAIL][5]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/bat-bmg-3/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html
Known issues
------------
Here are the changes found in xe-pw-167697v3_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-rebind:
- bat-bmg-3: NOTRUN -> [INCOMPLETE][6] ([Intel XE#8439]) +4 other tests incomplete
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/bat-bmg-3/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-rebind.html
* igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p:
- bat-bmg-3: NOTRUN -> [SKIP][7] ([Intel XE#6566]) +3 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/bat-bmg-3/igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p.html
#### Possible fixes ####
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-mmap:
- bat-bmg-3: [INCOMPLETE][8] ([Intel XE#8439]) -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/bat-bmg-3/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-mmap.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/bat-bmg-3/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-mmap.html
#### Warnings ####
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-mmap:
- bat-bmg-3: [CRASH][10] ([Intel XE#8438]) -> [INCOMPLETE][11] ([Intel XE#8439])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/bat-bmg-3/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-mmap.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/bat-bmg-3/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-mmap.html
[Intel XE#6566]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6566
[Intel XE#8438]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8438
[Intel XE#8439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8439
Build changes
-------------
* Linux: xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973 -> xe-pw-167697v3
IGT_8985: d5fe8732b8547454c38fdd220b55f6f0cc841a3b @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973: adbc617250e16fb2db4a4c777b89440927cb8973
xe-pw-167697v3: 167697v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/index.html
[-- Attachment #2: Type: text/html, Size: 5693 bytes --]
^ permalink raw reply [flat|nested] 34+ messages in thread
* ✗ Xe.CI.FULL: failure for drm/xe/forcewake: add delayed-release optimization (rev3)
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (10 preceding siblings ...)
2026-06-25 9:26 ` ✗ Xe.CI.BAT: failure " Patchwork
@ 2026-06-25 10:55 ` Patchwork
2026-07-20 22:13 ` [PATCH v4] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (7 subsequent siblings)
19 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2026-06-25 10:55 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 107937 bytes --]
== Series Details ==
Series: drm/xe/forcewake: add delayed-release optimization (rev3)
URL : https://patchwork.freedesktop.org/series/167697/
State : failure
== Summary ==
CI Bug Log - changes from xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973_FULL -> xe-pw-167697v3_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-167697v3_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-167697v3_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-167697v3_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_addfb_basic@unused-handle:
- shard-bmg: NOTRUN -> [SKIP][1] +153 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_addfb_basic@unused-handle.html
* igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible:
- shard-bmg: NOTRUN -> [TIMEOUT][2] +3 other tests timeout
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-bmg: [PASS][3] -> [TIMEOUT][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-5/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-pri-shrfb-draw-mmap-wc.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-2/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate:
- shard-bmg: NOTRUN -> [CRASH][5]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate.html
* igt@xe_exec_system_allocator@process-many-large-execqueues-malloc-race-nomemset:
- shard-lnl: NOTRUN -> [INCOMPLETE][6] +5 other tests incomplete
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@xe_exec_system_allocator@process-many-large-execqueues-malloc-race-nomemset.html
* igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-race-nomemset:
- shard-bmg: NOTRUN -> [FAIL][7] +2 other tests fail
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-race-nomemset.html
* igt@xe_exec_system_allocator@process-many-new-nomemset:
- shard-bmg: [PASS][8] -> [SKIP][9] +96 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-3/igt@xe_exec_system_allocator@process-many-new-nomemset.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@xe_exec_system_allocator@process-many-new-nomemset.html
* igt@xe_exec_system_allocator@process-many-stride-malloc-prefetch-race:
- shard-bmg: [PASS][10] -> [FAIL][11] +6 other tests fail
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@xe_exec_system_allocator@process-many-stride-malloc-prefetch-race.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-3/igt@xe_exec_system_allocator@process-many-stride-malloc-prefetch-race.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_pcode_probe_early:
- shard-bmg: [PASS][12] -> [INCOMPLETE][13]
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@xe_fault_injection@inject-fault-probe-function-xe_pcode_probe_early.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@xe_fault_injection@inject-fault-probe-function-xe_pcode_probe_early.html
* igt@xe_pmu@engine-activity-accuracy-90:
- shard-lnl: [PASS][14] -> [FAIL][15] +2 other tests fail
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-lnl-3/igt@xe_pmu@engine-activity-accuracy-90.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-3/igt@xe_pmu@engine-activity-accuracy-90.html
* igt@xe_vm@munmap-style-unbind-either-side-partial-large-page-hammer:
- shard-bmg: NOTRUN -> [INCOMPLETE][16]
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@xe_vm@munmap-style-unbind-either-side-partial-large-page-hammer.html
#### Warnings ####
* igt@kms_atomic_transition@modeset-transition-nonblocking-fencing:
- shard-bmg: [INCOMPLETE][17] ([Intel XE#8174]) -> [SKIP][18]
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-3/igt@kms_atomic_transition@modeset-transition-nonblocking-fencing.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_atomic_transition@modeset-transition-nonblocking-fencing.html
* igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p:
- shard-bmg: [SKIP][19] ([Intel XE#7679]) -> [SKIP][20]
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p.html
* igt@kms_chamelium_color_pipeline@plane-lut1d:
- shard-bmg: [SKIP][21] ([Intel XE#7358]) -> [SKIP][22]
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-3/igt@kms_chamelium_color_pipeline@plane-lut1d.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_chamelium_color_pipeline@plane-lut1d.html
* igt@kms_chamelium_hpd@hdmi-hpd-storm-disable:
- shard-bmg: [SKIP][23] ([Intel XE#2252]) -> [SKIP][24] +1 other test skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html
* igt@kms_content_protection@type1:
- shard-bmg: [SKIP][25] ([Intel XE#7642]) -> [SKIP][26]
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_content_protection@type1.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_content_protection@type1.html
* igt@kms_cursor_crc@cursor-random-512x512:
- shard-bmg: [SKIP][27] ([Intel XE#2321] / [Intel XE#7355]) -> [SKIP][28]
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_cursor_crc@cursor-random-512x512.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_cursor_crc@cursor-random-512x512.html
* igt@kms_cursor_crc@cursor-sliding-32x32:
- shard-bmg: [SKIP][29] ([Intel XE#2320]) -> [SKIP][30]
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-3/igt@kms_cursor_crc@cursor-sliding-32x32.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_cursor_crc@cursor-sliding-32x32.html
* igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible:
- shard-bmg: [INCOMPLETE][31] ([Intel XE#8155]) -> [SKIP][32]
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling:
- shard-bmg: [SKIP][33] ([Intel XE#7178] / [Intel XE#7351]) -> [INCOMPLETE][34]
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-5/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-spr-indfb-fullscreen:
- shard-bmg: [SKIP][35] ([Intel XE#2313]) -> [CRASH][36]
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-spr-indfb-fullscreen.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-bmg: [SKIP][37] ([Intel XE#2486]) -> [SKIP][38]
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-3/igt@kms_panel_fitting@atomic-fastset.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_plane_multiple@tiling-yf:
- shard-bmg: [SKIP][39] ([Intel XE#5020] / [Intel XE#7348]) -> [SKIP][40]
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_plane_multiple@tiling-yf.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_plane_multiple@tiling-yf.html
* igt@kms_plane_scaling@planes-downscale-factor-0-75:
- shard-bmg: [SKIP][41] ([Intel XE#2763] / [Intel XE#6886]) -> [SKIP][42]
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-3/igt@kms_plane_scaling@planes-downscale-factor-0-75.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_plane_scaling@planes-downscale-factor-0-75.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf:
- shard-lnl: [TIMEOUT][43] ([Intel XE#8473]) -> [INCOMPLETE][44] +1 other test incomplete
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [FAIL][45] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][46]
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_tiled_display@basic-test-pattern.html
* igt@xe_ccs@block-copy-compressed-inc-dimension@linear-compressed-compfmt0-system-vram01-1x1:
- shard-bmg: [INCOMPLETE][47] ([Intel XE#8437]) -> [INCOMPLETE][48] +3 other tests incomplete
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-2/igt@xe_ccs@block-copy-compressed-inc-dimension@linear-compressed-compfmt0-system-vram01-1x1.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-8/igt@xe_ccs@block-copy-compressed-inc-dimension@linear-compressed-compfmt0-system-vram01-1x1.html
* igt@xe_eudebug@basic-vm-bind-extended-discovery:
- shard-bmg: [SKIP][49] ([Intel XE#7636]) -> [SKIP][50]
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@xe_eudebug@basic-vm-bind-extended-discovery.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@xe_eudebug@basic-vm-bind-extended-discovery.html
* igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate-race:
- shard-bmg: [SKIP][51] ([Intel XE#2322] / [Intel XE#7372]) -> [SKIP][52] +1 other test skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate-race.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate-race.html
* igt@xe_exec_basic@multigpu-once-null-rebind:
- shard-bmg: [SKIP][53] ([Intel XE#8440]) -> [SKIP][54] +236 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-5/igt@xe_exec_basic@multigpu-once-null-rebind.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@xe_exec_basic@multigpu-once-null-rebind.html
* igt@xe_exec_fault_mode@once-multi-queue-rebind-imm:
- shard-bmg: [SKIP][55] ([Intel XE#8374]) -> [SKIP][56]
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-3/igt@xe_exec_fault_mode@once-multi-queue-rebind-imm.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@xe_exec_fault_mode@once-multi-queue-rebind-imm.html
* igt@xe_exec_multi_queue@few-execs-preempt-mode-userptr-invalidate:
- shard-bmg: [SKIP][57] ([Intel XE#8364]) -> [SKIP][58] +8 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-3/igt@xe_exec_multi_queue@few-execs-preempt-mode-userptr-invalidate.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@xe_exec_multi_queue@few-execs-preempt-mode-userptr-invalidate.html
* igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-huge-nomemset:
- shard-bmg: [INCOMPLETE][59] ([Intel XE#8159]) -> [FAIL][60]
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-4/igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-huge-nomemset.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-huge-nomemset.html
* igt@xe_exec_system_allocator@process-many-large-execqueues-new-prefetch:
- shard-bmg: [FAIL][61] -> [SKIP][62]
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@xe_exec_system_allocator@process-many-large-execqueues-new-prefetch.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@xe_exec_system_allocator@process-many-large-execqueues-new-prefetch.html
* igt@xe_exec_system_allocator@threads-many-stride-free-nomemset:
- shard-bmg: [SKIP][63] ([Intel XE#8441]) -> [SKIP][64] +89 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-10/igt@xe_exec_system_allocator@threads-many-stride-free-nomemset.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@xe_exec_system_allocator@threads-many-stride-free-nomemset.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-mmap-remap-dontunmap-eocheck:
- shard-lnl: [INCOMPLETE][65] ([Intel XE#8437]) -> [INCOMPLETE][66] +307 other tests incomplete
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-lnl-5/igt@xe_exec_system_allocator@threads-shared-vm-many-mmap-remap-dontunmap-eocheck.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-8/igt@xe_exec_system_allocator@threads-shared-vm-many-mmap-remap-dontunmap-eocheck.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_device_probe_early:
- shard-bmg: [CRASH][67] ([Intel XE#8448]) -> [INCOMPLETE][68]
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-3/igt@xe_fault_injection@inject-fault-probe-function-xe_device_probe_early.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@xe_fault_injection@inject-fault-probe-function-xe_device_probe_early.html
* igt@xe_pxp@display-black-pxp-fb:
- shard-bmg: [SKIP][69] ([Intel XE#4733] / [Intel XE#7417]) -> [SKIP][70]
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@xe_pxp@display-black-pxp-fb.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@xe_pxp@display-black-pxp-fb.html
* igt@xe_query@multigpu-query-pxp-status:
- shard-bmg: [SKIP][71] ([Intel XE#944]) -> [SKIP][72]
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-3/igt@xe_query@multigpu-query-pxp-status.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@xe_query@multigpu-query-pxp-status.html
Known issues
------------
Here are the changes found in xe-pw-167697v3_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@fbdev@pan:
- shard-bmg: NOTRUN -> [SKIP][73] ([Intel XE#2134])
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@fbdev@pan.html
* igt@fbdev@write:
- shard-bmg: [PASS][74] -> [SKIP][75] ([Intel XE#2134])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@fbdev@write.html
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@fbdev@write.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- shard-bmg: NOTRUN -> [SKIP][76] ([Intel XE#2233])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_async_flips@basic-modeset-with-all-modifiers-formats@pipe-a-dp-2-4-rc-ccs-xrgb2101010:
- shard-bmg: NOTRUN -> [INCOMPLETE][77] ([Intel XE#8437]) +4 other tests incomplete
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_async_flips@basic-modeset-with-all-modifiers-formats@pipe-a-dp-2-4-rc-ccs-xrgb2101010.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-bmg: NOTRUN -> [SKIP][78] ([Intel XE#2370])
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-7/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-90:
- shard-lnl: NOTRUN -> [SKIP][79] ([Intel XE#1407]) +1 other test skip
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-bmg: NOTRUN -> [TIMEOUT][80] ([Intel XE#8446]) +3 other tests timeout
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-lnl: NOTRUN -> [INCOMPLETE][81] ([Intel XE#5643])
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip:
- shard-bmg: NOTRUN -> [SKIP][82] ([Intel XE#7059] / [Intel XE#7085])
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][83] ([Intel XE#2327])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-bmg: [PASS][84] -> [TIMEOUT][85] ([Intel XE#8446]) +1 other test timeout
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-3/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_big_fb@y-tiled-16bpp-rotate-180:
- shard-bmg: NOTRUN -> [SKIP][86] ([Intel XE#1124]) +7 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-7/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
- shard-bmg: NOTRUN -> [SKIP][87] ([Intel XE#607] / [Intel XE#7361])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
- shard-bmg: NOTRUN -> [SKIP][88] ([Intel XE#8441]) +52 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-lnl: NOTRUN -> [SKIP][89] ([Intel XE#1124]) +1 other test skip
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_bw@connected-linear-tiling-2-displays-target-3840x2160p:
- shard-bmg: [PASS][90] -> [TIMEOUT][91] ([Intel XE#8469] / [Intel XE#8476])
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-target-3840x2160p.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-7/igt@kms_bw@connected-linear-tiling-2-displays-target-3840x2160p.html
* igt@kms_bw@connected-linear-tiling-3-displays-target-3840x2160p:
- shard-bmg: NOTRUN -> [SKIP][92] ([Intel XE#7679])
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-7/igt@kms_bw@connected-linear-tiling-3-displays-target-3840x2160p.html
* igt@kms_bw@linear-tiling-1-displays-target-2160x1440p:
- shard-bmg: NOTRUN -> [INCOMPLETE][93] ([Intel XE#8479])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_bw@linear-tiling-1-displays-target-2160x1440p.html
* igt@kms_bw@linear-tiling-4-displays-target-2560x1440p:
- shard-lnl: NOTRUN -> [INCOMPLETE][94] ([Intel XE#8445])
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_bw@linear-tiling-4-displays-target-2560x1440p.html
* igt@kms_bw@linear-tiling-4-displays-target-3840x2160p:
- shard-bmg: NOTRUN -> [SKIP][95] ([Intel XE#367]) +1 other test skip
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@kms_bw@linear-tiling-4-displays-target-3840x2160p.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs:
- shard-lnl: NOTRUN -> [ABORT][96] ([Intel XE#8007])
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-2/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs:
- shard-bmg: NOTRUN -> [INCOMPLETE][97] ([Intel XE#8150] / [Intel XE#8437])
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-7/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-hdmi-a-3:
- shard-bmg: NOTRUN -> [SKIP][98] ([Intel XE#2652]) +17 other tests skip
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][99] ([Intel XE#3432])
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][100] ([Intel XE#2887]) +9 other tests skip
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-7/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-rc-ccs-cc:
- shard-lnl: NOTRUN -> [INCOMPLETE][101] ([Intel XE#8437])
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_chamelium_color@ctm-0-75:
- shard-bmg: NOTRUN -> [SKIP][102] ([Intel XE#2325] / [Intel XE#7358])
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_chamelium_color@ctm-0-75.html
* igt@kms_chamelium_color_pipeline@plane-lut1d-lut1d:
- shard-bmg: NOTRUN -> [SKIP][103] ([Intel XE#7358]) +1 other test skip
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-2/igt@kms_chamelium_color_pipeline@plane-lut1d-lut1d.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- shard-bmg: NOTRUN -> [SKIP][104] ([Intel XE#2252]) +5 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_content_protection@lic-type-1:
- shard-lnl: NOTRUN -> [SKIP][105] ([Intel XE#7642])
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_content_protection@lic-type-1.html
* igt@kms_cursor_crc@cursor-rapid-movement-128x42:
- shard-lnl: NOTRUN -> [SKIP][106] ([Intel XE#1424])
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_cursor_crc@cursor-rapid-movement-128x42.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x32:
- shard-bmg: NOTRUN -> [SKIP][107] ([Intel XE#2320])
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html
* igt@kms_cursor_crc@cursor-sliding-512x512:
- shard-bmg: NOTRUN -> [SKIP][108] ([Intel XE#2321] / [Intel XE#7355]) +2 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_cursor_crc@cursor-sliding-512x512.html
* igt@kms_dirtyfb@psr-dirtyfb-ioctl:
- shard-bmg: NOTRUN -> [SKIP][109] ([Intel XE#1508])
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
* igt@kms_dp_link_training@uhbr-mst:
- shard-lnl: NOTRUN -> [SKIP][110] ([Intel XE#4354] / [Intel XE#7386])
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_dp_link_training@uhbr-mst.html
* igt@kms_dsc@dsc-basic-bigjoiner:
- shard-bmg: NOTRUN -> [SKIP][111] ([Intel XE#8265]) +3 other tests skip
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_dsc@dsc-basic-bigjoiner.html
* igt@kms_dsc@dsc-with-bpc-formats-ultrajoiner:
- shard-lnl: NOTRUN -> [SKIP][112] ([Intel XE#8265])
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_dsc@dsc-with-bpc-formats-ultrajoiner.html
* igt@kms_flip@2x-dpms-vs-vblank-race:
- shard-lnl: NOTRUN -> [SKIP][113] ([Intel XE#1421])
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_flip@2x-dpms-vs-vblank-race.html
* igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset@ab-dp2-hdmi-a3:
- shard-bmg: NOTRUN -> [INCOMPLETE][114] ([Intel XE#8155])
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-8/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset@ab-dp2-hdmi-a3.html
* igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible:
- shard-bmg: [PASS][115] -> [INCOMPLETE][116] ([Intel XE#8155] / [Intel XE#8479])
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-2/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-lnl: [PASS][117] -> [FAIL][118] ([Intel XE#301])
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset:
- shard-bmg: [PASS][119] -> [CRASH][120] ([Intel XE#8461])
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-9/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset.html
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-5/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling:
- shard-bmg: NOTRUN -> [SKIP][121] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling:
- shard-bmg: NOTRUN -> [TIMEOUT][122] ([Intel XE#8467]) +1 other test timeout
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling.html
* igt@kms_flip_scaled_crc@flip-p016-linear-to-p016-linear-reflect-x:
- shard-bmg: NOTRUN -> [SKIP][123] ([Intel XE#7179]) +1 other test skip
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@kms_flip_scaled_crc@flip-p016-linear-to-p016-linear-reflect-x.html
* igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-shrfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][124] ([Intel XE#6312])
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][125] ([Intel XE#7061] / [Intel XE#7356]) +4 other tests skip
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrshdr-abgr161616f-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][126] ([Intel XE#7061])
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_frontbuffer_tracking@drrshdr-abgr161616f-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][127] ([Intel XE#656] / [Intel XE#7905]) +5 other tests skip
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
- shard-bmg: NOTRUN -> [SKIP][128] ([Intel XE#4141]) +8 other tests skip
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render:
- shard-bmg: NOTRUN -> [SKIP][129] ([Intel XE#2311]) +45 other tests skip
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: [PASS][130] -> [TIMEOUT][131] ([Intel XE#8466]) +1 other test timeout
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-mmap-wc.html
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-render:
- shard-bmg: [PASS][132] -> [INCOMPLETE][133] ([Intel XE#8368])
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-9/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-render.html
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-5/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-cur-indfb-draw-render:
- shard-bmg: NOTRUN -> [INCOMPLETE][134] ([Intel XE#8368])
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-7/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [TIMEOUT][135] ([Intel XE#8466])
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbchdr-tiling-y:
- shard-bmg: NOTRUN -> [SKIP][136] ([Intel XE#7399])
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-5/igt@kms_frontbuffer_tracking@fbchdr-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcpsr-abgr161616f-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][137] ([Intel XE#7061] / [Intel XE#7356])
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_frontbuffer_tracking@fbcpsr-abgr161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render:
- shard-bmg: NOTRUN -> [SKIP][138] ([Intel XE#2313]) +45 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-rte:
- shard-lnl: NOTRUN -> [SKIP][139] ([Intel XE#7865]) +3 other tests skip
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-rte.html
* igt@kms_frontbuffer_tracking@hdr-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: [PASS][140] -> [SKIP][141] ([Intel XE#8441])
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-3/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-spr-indfb-draw-mmap-wc.html
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-cur-indfb-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][142] ([Intel XE#7905]) +2 other tests skip
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_joiner@basic-max-non-joiner:
- shard-bmg: NOTRUN -> [SKIP][143] ([Intel XE#4298] / [Intel XE#5873])
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@kms_joiner@basic-max-non-joiner.html
* igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier:
- shard-bmg: NOTRUN -> [SKIP][144] ([Intel XE#7283]) +1 other test skip
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-2/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier.html
* igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping@pipe-a-plane-0:
- shard-bmg: NOTRUN -> [TIMEOUT][145] ([Intel XE#8465])
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-8/igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping@pipe-a-plane-0.html
* igt@kms_plane@pixel-format-x-tiled-modifier-source-clamping:
- shard-bmg: NOTRUN -> [CRASH][146] ([Intel XE#8460])
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_plane@pixel-format-x-tiled-modifier-source-clamping.html
* igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier-source-clamping:
- shard-bmg: NOTRUN -> [INCOMPLETE][147] ([Intel XE#1035] / [Intel XE#8479])
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier-source-clamping.html
* igt@kms_plane_lowres@tiling-y:
- shard-bmg: NOTRUN -> [SKIP][148] ([Intel XE#2393])
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-5/igt@kms_plane_lowres@tiling-y.html
* igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25:
- shard-bmg: [PASS][149] -> [INCOMPLETE][150] ([Intel XE#8437] / [Intel XE#8459]) +1 other test incomplete
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-3/igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25.html
* igt@kms_pm_dc@deep-pkgc:
- shard-bmg: NOTRUN -> [SKIP][151] ([Intel XE#2505] / [Intel XE#7447])
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_pm_dc@deep-pkgc.html
* igt@kms_pm_rpm@modeset-lpsp:
- shard-bmg: NOTRUN -> [SKIP][152] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836])
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_pm_rpm@modeset-lpsp.html
* igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf:
- shard-bmg: NOTRUN -> [SKIP][153] ([Intel XE#1489]) +5 other tests skip
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr@psr-primary-page-flip:
- shard-bmg: NOTRUN -> [SKIP][154] ([Intel XE#2234] / [Intel XE#2850]) +6 other tests skip
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-7/igt@kms_psr@psr-primary-page-flip.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-lnl: NOTRUN -> [SKIP][155] ([Intel XE#8361])
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@primary-rotation-270:
- shard-bmg: NOTRUN -> [SKIP][156] ([Intel XE#3904] / [Intel XE#7342]) +1 other test skip
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_rotation_crc@primary-rotation-270.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
- shard-lnl: NOTRUN -> [SKIP][157] ([Intel XE#1127] / [Intel XE#5813])
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
* igt@kms_scaling_modes@scaling-mode-full-aspect:
- shard-bmg: NOTRUN -> [SKIP][158] ([Intel XE#2413])
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_scaling_modes@scaling-mode-full-aspect.html
* igt@kms_setmode@invalid-clone-exclusive-crtc:
- shard-bmg: NOTRUN -> [SKIP][159] ([Intel XE#1435])
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_setmode@invalid-clone-exclusive-crtc.html
* igt@kms_sharpness_filter@invalid-filter-with-scaling-mode:
- shard-bmg: NOTRUN -> [SKIP][160] ([Intel XE#6503])
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-7/igt@kms_sharpness_filter@invalid-filter-with-scaling-mode.html
* igt@kms_tv_load_detect@load-detect:
- shard-bmg: NOTRUN -> [SKIP][161] ([Intel XE#2450] / [Intel XE#5857])
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-7/igt@kms_tv_load_detect@load-detect.html
* igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute:
- shard-bmg: [PASS][162] -> [ABORT][163] ([Intel XE#7893] / [Intel XE#8300]) +1 other test abort
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-9/igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute.html
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-3/igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute.html
* igt@xe_eudebug_online@tdctl-parameters:
- shard-bmg: NOTRUN -> [SKIP][164] ([Intel XE#7636]) +11 other tests skip
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@xe_eudebug_online@tdctl-parameters.html
* igt@xe_exec_balancer@many-virtual-userptr-rebind:
- shard-lnl: NOTRUN -> [SKIP][165] ([Intel XE#7482]) +2 other tests skip
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@xe_exec_balancer@many-virtual-userptr-rebind.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr:
- shard-lnl: NOTRUN -> [SKIP][166] ([Intel XE#1392])
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr.html
* igt@xe_exec_basic@multigpu-once-basic-defer-mmap:
- shard-bmg: NOTRUN -> [SKIP][167] ([Intel XE#2322] / [Intel XE#7372]) +1 other test skip
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@xe_exec_basic@multigpu-once-basic-defer-mmap.html
* igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-invalidate-imm:
- shard-bmg: NOTRUN -> [SKIP][168] ([Intel XE#8374]) +12 other tests skip
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-invalidate-imm.html
* igt@xe_exec_fault_mode@once-bindexecqueue-userptr-invalidate-race-prefetch:
- shard-bmg: [PASS][169] -> [INCOMPLETE][170] ([Intel XE#8479]) +3 other tests incomplete
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@xe_exec_fault_mode@once-bindexecqueue-userptr-invalidate-race-prefetch.html
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-3/igt@xe_exec_fault_mode@once-bindexecqueue-userptr-invalidate-race-prefetch.html
* igt@xe_exec_fault_mode@once-multi-queue-userptr-invalidate:
- shard-lnl: NOTRUN -> [SKIP][171] ([Intel XE#8374])
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@xe_exec_fault_mode@once-multi-queue-userptr-invalidate.html
* igt@xe_exec_multi_queue@two-queues-basic-smem:
- shard-bmg: NOTRUN -> [SKIP][172] ([Intel XE#8364]) +16 other tests skip
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@xe_exec_multi_queue@two-queues-basic-smem.html
* igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-dyn-priority-smem:
- shard-lnl: NOTRUN -> [SKIP][173] ([Intel XE#8364])
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-dyn-priority-smem.html
* igt@xe_exec_reset@cm-multi-queue-close-fd:
- shard-lnl: NOTRUN -> [SKIP][174] ([Intel XE#8369])
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@xe_exec_reset@cm-multi-queue-close-fd.html
* igt@xe_exec_store@basic-all@engine-drm_xe_engine_class_render-instance-0-tile-0-region-system:
- shard-bmg: [PASS][175] -> [INCOMPLETE][176] ([Intel XE#8437]) +1 other test incomplete
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-4/igt@xe_exec_store@basic-all@engine-drm_xe_engine_class_render-instance-0-tile-0-region-system.html
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@xe_exec_store@basic-all@engine-drm_xe_engine_class_render-instance-0-tile-0-region-system.html
* igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-multi-vma:
- shard-bmg: [PASS][177] -> [INCOMPLETE][178] ([Intel XE#8159])
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-10/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-multi-vma.html
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-multi-vma.html
* igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-remap-ro-dontunmap:
- shard-bmg: [PASS][179] -> [INCOMPLETE][180] ([Intel XE#7928] / [Intel XE#8159] / [Intel XE#8479])
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-remap-ro-dontunmap.html
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-remap-ro-dontunmap.html
* igt@xe_exec_system_allocator@threads-many-execqueues-mmap-new-madvise:
- shard-lnl: [PASS][181] -> [TIMEOUT][182] ([Intel XE#8447]) +1 other test timeout
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-lnl-3/igt@xe_exec_system_allocator@threads-many-execqueues-mmap-new-madvise.html
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@xe_exec_system_allocator@threads-many-execqueues-mmap-new-madvise.html
* igt@xe_exec_system_allocator@threads-many-large-execqueues-malloc-madvise:
- shard-bmg: NOTRUN -> [TIMEOUT][183] ([Intel XE#8447])
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@xe_exec_system_allocator@threads-many-large-execqueues-malloc-madvise.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-malloc-fork-read-after:
- shard-bmg: [PASS][184] -> [INCOMPLETE][185] ([Intel XE#8159] / [Intel XE#8437]) +3 other tests incomplete
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-malloc-fork-read-after.html
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-malloc-fork-read-after.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-malloc-nomemset:
- shard-bmg: [PASS][186] -> [INCOMPLETE][187] ([Intel XE#8159] / [Intel XE#8479]) +35 other tests incomplete
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-2/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-malloc-nomemset.html
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-malloc-nomemset.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-malloc-prefetch-madvise:
- shard-bmg: NOTRUN -> [INCOMPLETE][188] ([Intel XE#8159] / [Intel XE#8479])
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@xe_exec_system_allocator@threads-shared-vm-many-large-malloc-prefetch-madvise.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-stride-malloc-madvise:
- shard-lnl: NOTRUN -> [TIMEOUT][189] ([Intel XE#8447])
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-malloc-madvise.html
* igt@xe_exec_threads@threads-multi-queue-cm-fd-rebind:
- shard-bmg: NOTRUN -> [SKIP][190] ([Intel XE#8378]) +5 other tests skip
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-7/igt@xe_exec_threads@threads-multi-queue-cm-fd-rebind.html
* igt@xe_exec_threads@threads-multi-queue-mixed-fd-userptr-invalidate-race:
- shard-bmg: NOTRUN -> [INCOMPLETE][191] ([Intel XE#8366] / [Intel XE#8479])
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@xe_exec_threads@threads-multi-queue-mixed-fd-userptr-invalidate-race.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_device_create:
- shard-bmg: NOTRUN -> [CRASH][192] ([Intel XE#8448]) +1 other test crash
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@xe_fault_injection@inject-fault-probe-function-xe_device_create.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early:
- shard-bmg: [PASS][193] -> [CRASH][194] ([Intel XE#8448]) +1 other test crash
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-2/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-8/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html
* igt@xe_gpgpu_fill@offset-4x4:
- shard-bmg: NOTRUN -> [SKIP][195] ([Intel XE#7954])
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-7/igt@xe_gpgpu_fill@offset-4x4.html
* igt@xe_multigpu_svm@mgpu-atomic-op-basic:
- shard-bmg: NOTRUN -> [SKIP][196] ([Intel XE#6964]) +4 other tests skip
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@xe_multigpu_svm@mgpu-atomic-op-basic.html
* igt@xe_page_reclaim@basic-mixed:
- shard-bmg: NOTRUN -> [SKIP][197] ([Intel XE#7793]) +2 other tests skip
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@xe_page_reclaim@basic-mixed.html
* igt@xe_pat@pat-sw-hw-compare:
- shard-bmg: NOTRUN -> [FAIL][198] ([Intel XE#7695])
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@xe_pat@pat-sw-hw-compare.html
* igt@xe_pat@xa-app-transient-media-on:
- shard-bmg: NOTRUN -> [SKIP][199] ([Intel XE#7590])
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@xe_pat@xa-app-transient-media-on.html
* igt@xe_peer2peer@write:
- shard-bmg: NOTRUN -> [SKIP][200] ([Intel XE#2427] / [Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353]) +1 other test skip
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-2/igt@xe_peer2peer@write.html
* igt@xe_pm@s3-vm-bind-prefetch:
- shard-lnl: NOTRUN -> [SKIP][201] ([Intel XE#584] / [Intel XE#7369]) +1 other test skip
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@xe_pm@s3-vm-bind-prefetch.html
* igt@xe_prefetch_fault@prefetch-fault-svm:
- shard-bmg: NOTRUN -> [SKIP][202] ([Intel XE#7599])
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@xe_prefetch_fault@prefetch-fault-svm.html
* igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq:
- shard-bmg: NOTRUN -> [SKIP][203] ([Intel XE#4733] / [Intel XE#7417]) +2 other tests skip
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html
* igt@xe_query@multigpu-query-invalid-size:
- shard-bmg: NOTRUN -> [SKIP][204] ([Intel XE#944]) +2 other tests skip
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@xe_query@multigpu-query-invalid-size.html
* igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz:
- shard-lnl: NOTRUN -> [SKIP][205] ([Intel XE#944])
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html
* igt@xe_sriov_admin@exec-quantum-write-readback-vfs-disabled:
- shard-bmg: [PASS][206] -> [INCOMPLETE][207] ([Intel XE#8477] / [Intel XE#8479]) +1 other test incomplete
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-8/igt@xe_sriov_admin@exec-quantum-write-readback-vfs-disabled.html
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@xe_sriov_admin@exec-quantum-write-readback-vfs-disabled.html
* igt@xe_sriov_scheduling@nonpreempt-engine-resets-normal-priority@numvfs-random-gt1-vcs0:
- shard-bmg: NOTRUN -> [TIMEOUT][208] ([Intel XE#8472]) +1 other test timeout
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@xe_sriov_scheduling@nonpreempt-engine-resets-normal-priority@numvfs-random-gt1-vcs0.html
#### Possible fixes ####
* igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size:
- shard-bmg: [TIMEOUT][209] ([Intel XE#7935]) -> [PASS][210]
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-2/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-8/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
- shard-bmg: [TIMEOUT][211] ([Intel XE#8451]) -> [PASS][212] +1 other test pass
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-9/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@short-flip-after-cursor-atomic-transitions-varying-size:
- shard-bmg: [TIMEOUT][213] -> [PASS][214]
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@kms_cursor_legacy@short-flip-after-cursor-atomic-transitions-varying-size.html
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_cursor_legacy@short-flip-after-cursor-atomic-transitions-varying-size.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-lnl: [FAIL][215] ([Intel XE#301]) -> [PASS][216]
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible@a-dp2:
- shard-bmg: [INCOMPLETE][217] ([Intel XE#8155]) -> [PASS][218] +1 other test pass
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-10/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible@a-dp2.html
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible@a-dp2.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: [TIMEOUT][219] ([Intel XE#8466]) -> [PASS][220]
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-8/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-mmap-wc.html
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][221] ([Intel XE#1503]) -> [PASS][222]
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-5/igt@kms_hdr@invalid-hdr.html
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-2/igt@kms_hdr@invalid-hdr.html
* igt@xe_exec_compute_mode@many-execqueues-bindexecqueue-userptr-invalidate:
- shard-bmg: [INCOMPLETE][223] ([Intel XE#8437]) -> [PASS][224] +9 other tests pass
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-9/igt@xe_exec_compute_mode@many-execqueues-bindexecqueue-userptr-invalidate.html
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-5/igt@xe_exec_compute_mode@many-execqueues-bindexecqueue-userptr-invalidate.html
* igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-single-vma:
- shard-bmg: [CRASH][225] ([Intel XE#8450]) -> [PASS][226]
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-2/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-single-vma.html
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-8/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-single-vma.html
* igt@xe_exec_system_allocator@process-many-execqueues-mmap-shared-remap-dontunmap:
- shard-bmg: [FAIL][227] -> [PASS][228] +10 other tests pass
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-2/igt@xe_exec_system_allocator@process-many-execqueues-mmap-shared-remap-dontunmap.html
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-8/igt@xe_exec_system_allocator@process-many-execqueues-mmap-shared-remap-dontunmap.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-new-madvise:
- shard-bmg: [TIMEOUT][229] ([Intel XE#8447]) -> [PASS][230]
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-10/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-new-madvise.html
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-new-madvise.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-malloc-prefetch:
- shard-bmg: [INCOMPLETE][231] ([Intel XE#8159]) -> [PASS][232] +17 other tests pass
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-10/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-malloc-prefetch.html
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-malloc-prefetch.html
* igt@xe_exec_threads@threads-bal-mixed-fd-userptr-invalidate-race:
- shard-lnl: [TIMEOUT][233] ([Intel XE#8470]) -> [PASS][234]
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-lnl-3/igt@xe_exec_threads@threads-bal-mixed-fd-userptr-invalidate-race.html
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-3/igt@xe_exec_threads@threads-bal-mixed-fd-userptr-invalidate-race.html
* igt@xe_pat@false-sharing:
- shard-bmg: [SKIP][235] ([Intel XE#8440]) -> [PASS][236] +50 other tests pass
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@xe_pat@false-sharing.html
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-5/igt@xe_pat@false-sharing.html
* igt@xe_wedged@wedged-mode-toggle:
- shard-lnl: [ABORT][237] ([Intel XE#8007]) -> [PASS][238]
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-lnl-6/igt@xe_wedged@wedged-mode-toggle.html
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-2/igt@xe_wedged@wedged-mode-toggle.html
#### Warnings ####
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-bmg: [TIMEOUT][239] ([Intel XE#8446]) -> [SKIP][240] ([Intel XE#8441]) +1 other test skip
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-3/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-bmg: [TIMEOUT][241] -> [TIMEOUT][242] ([Intel XE#8446])
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
- shard-bmg: [TIMEOUT][243] ([Intel XE#8446]) -> [INCOMPLETE][244] ([Intel XE#5643])
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-270:
- shard-bmg: [SKIP][245] ([Intel XE#8440]) -> [SKIP][246] ([Intel XE#2327])
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-bmg: [SKIP][247] ([Intel XE#8440]) -> [INCOMPLETE][248] ([Intel XE#5643])
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-bmg: [INCOMPLETE][249] ([Intel XE#5643]) -> [TIMEOUT][250] ([Intel XE#8446])
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-9/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-5/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-270:
- shard-bmg: [SKIP][251] ([Intel XE#1124]) -> [SKIP][252] ([Intel XE#8441]) +2 other tests skip
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-lnl: [INCOMPLETE][253] ([Intel XE#5643]) -> [TIMEOUT][254] ([Intel XE#8446]) +2 other tests timeout
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-lnl-2/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-7/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
- shard-lnl: [SKIP][255] ([Intel XE#1124]) -> [TIMEOUT][256] ([Intel XE#8446])
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-lnl-3/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
* igt@kms_bw@connected-linear-tiling-1-displays-target-2160x1440p:
- shard-bmg: [INCOMPLETE][257] ([Intel XE#8437]) -> [CRASH][258] ([Intel XE#8449])
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-4/igt@kms_bw@connected-linear-tiling-1-displays-target-2160x1440p.html
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-2/igt@kms_bw@connected-linear-tiling-1-displays-target-2160x1440p.html
* igt@kms_bw@connected-linear-tiling-2-displays-target-2160x1440p:
- shard-bmg: [TIMEOUT][259] ([Intel XE#8476]) -> [INCOMPLETE][260] ([Intel XE#8479])
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-4/igt@kms_bw@connected-linear-tiling-2-displays-target-2160x1440p.html
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-2/igt@kms_bw@connected-linear-tiling-2-displays-target-2160x1440p.html
* igt@kms_bw@connected-linear-tiling-3-displays-target-2560x1440p:
- shard-bmg: [INCOMPLETE][261] ([Intel XE#8437]) -> [INCOMPLETE][262] ([Intel XE#8479]) +6 other tests incomplete
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_bw@connected-linear-tiling-3-displays-target-2560x1440p.html
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-5/igt@kms_bw@connected-linear-tiling-3-displays-target-2560x1440p.html
* igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p:
- shard-lnl: [INCOMPLETE][263] ([Intel XE#8437]) -> [INCOMPLETE][264] ([Intel XE#8445]) +15 other tests incomplete
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-lnl-2/igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p.html
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-7/igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p.html
* igt@kms_bw@connected-linear-tiling-4-displays-target-3840x2160p:
- shard-bmg: [SKIP][265] ([Intel XE#7679]) -> [INCOMPLETE][266] ([Intel XE#8479])
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@kms_bw@connected-linear-tiling-4-displays-target-3840x2160p.html
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-3/igt@kms_bw@connected-linear-tiling-4-displays-target-3840x2160p.html
* igt@kms_bw@linear-tiling-1-displays-target-2560x1440p:
- shard-bmg: [INCOMPLETE][267] ([Intel XE#8437]) -> [SKIP][268] ([Intel XE#367]) +2 other tests skip
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-2/igt@kms_bw@linear-tiling-1-displays-target-2560x1440p.html
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_bw@linear-tiling-1-displays-target-2560x1440p.html
* igt@kms_bw@linear-tiling-2-displays-target-2560x1440p:
- shard-bmg: [SKIP][269] ([Intel XE#367]) -> [INCOMPLETE][270] ([Intel XE#8479])
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-3/igt@kms_bw@linear-tiling-2-displays-target-2560x1440p.html
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-4/igt@kms_bw@linear-tiling-2-displays-target-2560x1440p.html
* igt@kms_bw@linear-tiling-2-displays-target-3840x2160p:
- shard-bmg: [TIMEOUT][271] ([Intel XE#8469]) -> [INCOMPLETE][272] ([Intel XE#8479])
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-2/igt@kms_bw@linear-tiling-2-displays-target-3840x2160p.html
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-8/igt@kms_bw@linear-tiling-2-displays-target-3840x2160p.html
* igt@kms_bw@linear-tiling-3-displays-target-2160x1440p:
- shard-bmg: [SKIP][273] ([Intel XE#8440]) -> [INCOMPLETE][274] ([Intel XE#8479]) +1 other test incomplete
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@kms_bw@linear-tiling-3-displays-target-2160x1440p.html
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_bw@linear-tiling-3-displays-target-2160x1440p.html
* igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs:
- shard-bmg: [SKIP][275] ([Intel XE#2887]) -> [SKIP][276] ([Intel XE#8441]) +4 other tests skip
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html
[276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs:
- shard-bmg: [SKIP][277] ([Intel XE#8440]) -> [SKIP][278] ([Intel XE#2887])
[277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs.html
[278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs:
- shard-bmg: [INCOMPLETE][279] ([Intel XE#8150]) -> [INCOMPLETE][280] ([Intel XE#8150] / [Intel XE#8479])
[279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html
[280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-5/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs:
- shard-bmg: [SKIP][281] ([Intel XE#3432]) -> [INCOMPLETE][282] ([Intel XE#8150] / [Intel XE#8437])
[281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html
[282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs:
- shard-bmg: [SKIP][283] ([Intel XE#2887]) -> [TIMEOUT][284] ([Intel XE#8463])
[283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-2/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs.html
[284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs.html
* igt@kms_cdclk@plane-scaling:
- shard-bmg: [SKIP][285] ([Intel XE#8440]) -> [SKIP][286] ([Intel XE#2724] / [Intel XE#7449])
[285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@kms_cdclk@plane-scaling.html
[286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_cdclk@plane-scaling.html
* igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions-varying-size:
- shard-bmg: [TIMEOUT][287] ([Intel XE#7935]) -> [TIMEOUT][288] ([Intel XE#8451])
[287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-10/igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions-varying-size.html
[288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
- shard-bmg: [INCOMPLETE][289] ([Intel XE#8151]) -> [TIMEOUT][290] ([Intel XE#8451])
[289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-2/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
[290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-8/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-lnl: [SKIP][291] ([Intel XE#309] / [Intel XE#7343]) -> [SKIP][292] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935])
[291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-lnl-7/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions-varying-size:
- shard-bmg: [TIMEOUT][293] ([Intel XE#8451]) -> [INCOMPLETE][294] ([Intel XE#8151])
[293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-5/igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions-varying-size.html
[294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-7/igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc-ultrajoiner:
- shard-lnl: [INCOMPLETE][295] ([Intel XE#8437]) -> [INCOMPLETE][296] ([Intel XE#8456])
[295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-lnl-3/igt@kms_dsc@dsc-with-output-formats-with-bpc-ultrajoiner.html
[296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-1/igt@kms_dsc@dsc-with-output-formats-with-bpc-ultrajoiner.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-bmg: [SKIP][297] ([Intel XE#8440]) -> [SKIP][298] ([Intel XE#4156] / [Intel XE#7425])
[297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_fbcon_fbt@fbc-suspend.html
[298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-5/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset:
- shard-bmg: [CRASH][299] ([Intel XE#8461]) -> [INCOMPLETE][300] ([Intel XE#8155])
[299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-2/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset.html
[300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-8/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling:
- shard-bmg: [INCOMPLETE][301] ([Intel XE#8437]) -> [SKIP][302] ([Intel XE#8441])
[301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html
[302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
- shard-bmg: [INCOMPLETE][303] ([Intel XE#8437]) -> [SKIP][304] ([Intel XE#7178] / [Intel XE#7351])
[303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
[304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
* igt@kms_frontbuffer_tracking@drrshdr-2p-primscrn-pri-shrfb-draw-blt:
- shard-bmg: [SKIP][305] ([Intel XE#8440]) -> [SKIP][306] ([Intel XE#2311]) +3 other tests skip
[305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@kms_frontbuffer_tracking@drrshdr-2p-primscrn-pri-shrfb-draw-blt.html
[306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_frontbuffer_tracking@drrshdr-2p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@drrshdr-2p-scndscrn-spr-indfb-draw-blt:
- shard-bmg: [SKIP][307] ([Intel XE#2311]) -> [SKIP][308] ([Intel XE#8441]) +11 other tests skip
[307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_frontbuffer_tracking@drrshdr-2p-scndscrn-spr-indfb-draw-blt.html
[308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_frontbuffer_tracking@drrshdr-2p-scndscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@drrshdr-argb161616f-draw-blt:
- shard-bmg: [SKIP][309] ([Intel XE#8440]) -> [SKIP][310] ([Intel XE#7061]) +2 other tests skip
[309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@kms_frontbuffer_tracking@drrshdr-argb161616f-draw-blt.html
[310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_frontbuffer_tracking@drrshdr-argb161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
- shard-bmg: [SKIP][311] ([Intel XE#8440]) -> [SKIP][312] ([Intel XE#4141]) +2 other tests skip
[311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
[312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
- shard-bmg: [SKIP][313] ([Intel XE#4141]) -> [SKIP][314] ([Intel XE#8441])
[313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
[314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-argb161616f-draw-render:
- shard-bmg: [SKIP][315] ([Intel XE#7061] / [Intel XE#7356]) -> [SKIP][316] ([Intel XE#8441]) +2 other tests skip
[315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-argb161616f-draw-render.html
[316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_frontbuffer_tracking@fbc-argb161616f-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-spr-indfb-draw-render:
- shard-bmg: [INCOMPLETE][317] ([Intel XE#8368]) -> [SKIP][318] ([Intel XE#2311])
[317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-spr-indfb-draw-render.html
[318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-argb161616f-draw-blt:
- shard-bmg: [SKIP][319] ([Intel XE#7061]) -> [SKIP][320] ([Intel XE#8441])
[319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrshdr-argb161616f-draw-blt.html
[320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcdrrshdr-argb161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-render:
- shard-bmg: [SKIP][321] ([Intel XE#2313]) -> [INCOMPLETE][322] ([Intel XE#8368])
[321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-render.html
[322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-move:
- shard-bmg: [SKIP][323] ([Intel XE#2313]) -> [SKIP][324] ([Intel XE#8441]) +8 other tests skip
[323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-move.html
[324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-render:
- shard-bmg: [SKIP][325] ([Intel XE#8440]) -> [SKIP][326] ([Intel XE#7061] / [Intel XE#7356])
[325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-render.html
[326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-render.html
* igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-spr-indfb-draw-render:
- shard-bmg: [SKIP][327] ([Intel XE#8440]) -> [SKIP][328] ([Intel XE#2313]) +5 other tests skip
[327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-spr-indfb-draw-render.html
[328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-spr-indfb-draw-render.html
* igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping:
- shard-bmg: [CRASH][329] ([Intel XE#8460]) -> [TIMEOUT][330] ([Intel XE#8465])
[329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-2/igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping.html
[330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-8/igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping.html
* igt@kms_plane@pixel-format-linear-modifier-source-clamping:
- shard-bmg: [INCOMPLETE][331] ([Intel XE#1035]) -> [INCOMPLETE][332] ([Intel XE#1035] / [Intel XE#8479]) +1 other test incomplete
[331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_plane@pixel-format-linear-modifier-source-clamping.html
[332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-5/igt@kms_plane@pixel-format-linear-modifier-source-clamping.html
* igt@kms_plane@pixel-format-y-tiled-ccs-modifier-source-clamping:
- shard-bmg: [INCOMPLETE][333] ([Intel XE#1035]) -> [SKIP][334] ([Intel XE#7283]) +1 other test skip
[333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@kms_plane@pixel-format-y-tiled-ccs-modifier-source-clamping.html
[334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-3/igt@kms_plane@pixel-format-y-tiled-ccs-modifier-source-clamping.html
* igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping:
- shard-bmg: [SKIP][335] ([Intel XE#7283]) -> [INCOMPLETE][336] ([Intel XE#1035] / [Intel XE#8479])
[335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-5/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping.html
[336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-2/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-a:
- shard-bmg: [SKIP][337] ([Intel XE#2763] / [Intel XE#6886]) -> [INCOMPLETE][338] ([Intel XE#8459]) +2 other tests incomplete
[337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-a.html
[338]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-5/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-a.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5:
- shard-bmg: [SKIP][339] ([Intel XE#2763] / [Intel XE#6886]) -> [CRASH][340] ([Intel XE#8458])
[339]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-9/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html
[340]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-3/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75:
- shard-bmg: [SKIP][341] ([Intel XE#2763] / [Intel XE#6886]) -> [INCOMPLETE][342] ([Intel XE#8437] / [Intel XE#8459]) +1 other test incomplete
[341]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-5/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75.html
[342]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-7/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75.html
* igt@kms_pm_dc@dc5-pageflip-negative:
- shard-bmg: [SKIP][343] ([Intel XE#6927]) -> [SKIP][344] ([Intel XE#8441])
[343]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_pm_dc@dc5-pageflip-negative.html
[344]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_pm_dc@dc5-pageflip-negative.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf:
- shard-lnl: [SKIP][345] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304]) -> [CRASH][346] ([Intel XE#8455])
[345]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-lnl-3/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf.html
[346]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-3/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf@pipe-a-edp-1:
- shard-lnl: [SKIP][347] ([Intel XE#4608]) -> [CRASH][348] ([Intel XE#8455])
[347]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-lnl-3/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf@pipe-a-edp-1.html
[348]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-lnl-3/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf@pipe-a-edp-1.html
* igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area:
- shard-bmg: [SKIP][349] ([Intel XE#8440]) -> [SKIP][350] ([Intel XE#1489])
[349]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area.html
[350]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr@fbc-pr-suspend:
- shard-bmg: [SKIP][351] ([Intel XE#8440]) -> [SKIP][352] ([Intel XE#2234] / [Intel XE#2850])
[351]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_psr@fbc-pr-suspend.html
[352]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-5/igt@kms_psr@fbc-pr-suspend.html
* igt@kms_psr@fbc-psr-dpms:
- shard-bmg: [SKIP][353] ([Intel XE#2234] / [Intel XE#2850]) -> [SKIP][354] ([Intel XE#8441]) +1 other test skip
[353]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@kms_psr@fbc-psr-dpms.html
[354]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-10/igt@kms_psr@fbc-psr-dpms.html
* igt@xe_evict@evict-small-external-multi-queue-cm:
- shard-bmg: [SKIP][355] ([Intel XE#8440]) -> [SKIP][356] ([Intel XE#8370])
[355]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@xe_evict@evict-small-external-multi-queue-cm.html
[356]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@xe_evict@evict-small-external-multi-queue-cm.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr:
- shard-bmg: [INCOMPLETE][357] ([Intel XE#8439]) -> [INCOMPLETE][358] ([Intel XE#8439] / [Intel XE#8479]) +1 other test incomplete
[357]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-10/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html
[358]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr:
- shard-bmg: [SKIP][359] ([Intel XE#2322] / [Intel XE#7372]) -> [INCOMPLETE][360] ([Intel XE#8479])
[359]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr.html
[360]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-5/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr.html
* igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate:
- shard-bmg: [SKIP][361] ([Intel XE#8440]) -> [INCOMPLETE][362] ([Intel XE#8439] / [Intel XE#8479])
[361]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate.html
[362]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue:
- shard-bmg: [SKIP][363] ([Intel XE#8440]) -> [SKIP][364] ([Intel XE#2322] / [Intel XE#7372])
[363]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@xe_exec_basic@multigpu-once-bindexecqueue.html
[364]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@xe_exec_basic@multigpu-once-bindexecqueue.html
* igt@xe_exec_multi_queue@many-queues-preempt-mode-close-fd-smem:
- shard-bmg: [SKIP][365] ([Intel XE#8440]) -> [SKIP][366] ([Intel XE#8364]) +5 other tests skip
[365]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@xe_exec_multi_queue@many-queues-preempt-mode-close-fd-smem.html
[366]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@xe_exec_multi_queue@many-queues-preempt-mode-close-fd-smem.html
* igt@xe_exec_sip_eudebug@breakpoint-writesip-nodebug:
- shard-bmg: [SKIP][367] ([Intel XE#8440]) -> [SKIP][368] ([Intel XE#7636])
[367]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-7/igt@xe_exec_sip_eudebug@breakpoint-writesip-nodebug.html
[368]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-5/igt@xe_exec_sip_eudebug@breakpoint-writesip-nodebug.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-malloc-nomemset:
- shard-bmg: [INCOMPLETE][369] ([Intel XE#8159]) -> [INCOMPLETE][370] ([Intel XE#8159] / [Intel XE#8479]) +2 other tests incomplete
[369]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-10/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-malloc-nomemset.html
[370]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-malloc-nomemset.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-malloc-busy-nomemset:
- shard-bmg: [SKIP][371] ([Intel XE#8440]) -> [INCOMPLETE][372] ([Intel XE#8159] / [Intel XE#8479]) +1 other test incomplete
[371]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-1/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-malloc-busy-nomemset.html
[372]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-malloc-busy-nomemset.html
* igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr-rebind:
- shard-bmg: [INCOMPLETE][373] ([Intel XE#8366]) -> [SKIP][374] ([Intel XE#8378]) +3 other tests skip
[373]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-10/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr-rebind.html
[374]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-7/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr-rebind.html
* igt@xe_exec_threads@threads-multi-queue-shared-vm-userptr-invalidate-race:
- shard-bmg: [SKIP][375] ([Intel XE#8378]) -> [INCOMPLETE][376] ([Intel XE#8366] / [Intel XE#8479]) +1 other test incomplete
[375]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973/shard-bmg-8/igt@xe_exec_threads@threads-multi-queue-shared-vm-userptr-invalidate-race.html
[376]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/shard-bmg-9/igt@xe_exec_threads@threads-multi-queue-shared-vm-userptr-invalidate-race.html
[Intel XE#1035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1035
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
[Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
[Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
[Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
[Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
[Intel XE#2450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2450
[Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
[Intel XE#2505]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2505
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
[Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
[Intel XE#5643]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5643
[Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
[Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
[Intel XE#5857]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5857
[Intel XE#5873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5873
[Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
[Intel XE#6927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6927
[Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
[Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
[Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
[Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
[Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353
[Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7361
[Intel XE#7369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7369
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
[Intel XE#7386]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7386
[Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
[Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
[Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
[Intel XE#7425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7425
[Intel XE#7447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7447
[Intel XE#7449]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7449
[Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
[Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
[Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
[Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
[Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
[Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
[Intel XE#7695]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7695
[Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
[Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
[Intel XE#7893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7893
[Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
[Intel XE#7928]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7928
[Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
[Intel XE#7954]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7954
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
[Intel XE#8151]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8151
[Intel XE#8155]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8155
[Intel XE#8159]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8159
[Intel XE#8174]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8174
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#8300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8300
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#8361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8361
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8366
[Intel XE#8368]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8368
[Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
[Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370
[Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
[Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
[Intel XE#8437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8437
[Intel XE#8439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8439
[Intel XE#8440]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8440
[Intel XE#8441]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8441
[Intel XE#8445]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8445
[Intel XE#8446]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8446
[Intel XE#8447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8447
[Intel XE#8448]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8448
[Intel XE#8449]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8449
[Intel XE#8450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8450
[Intel XE#8451]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8451
[Intel XE#8455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8455
[Intel XE#8456]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8456
[Intel XE#8458]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8458
[Intel XE#8459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8459
[Intel XE#8460]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8460
[Intel XE#8461]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8461
[Intel XE#8463]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8463
[Intel XE#8465]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8465
[Intel XE#8466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8466
[Intel XE#8467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8467
[Intel XE#8469]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8469
[Intel XE#8470]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8470
[Intel XE#8472]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8472
[Intel XE#8473]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8473
[Intel XE#8476]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8476
[Intel XE#8477]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8477
[Intel XE#8479]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8479
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973 -> xe-pw-167697v3
IGT_8985: d5fe8732b8547454c38fdd220b55f6f0cc841a3b @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5299-adbc617250e16fb2db4a4c777b89440927cb8973: adbc617250e16fb2db4a4c777b89440927cb8973
xe-pw-167697v3: 167697v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v3/index.html
[-- Attachment #2: Type: text/html, Size: 128498 bytes --]
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v4] drm/xe/forcewake: add delayed-release optimization
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (11 preceding siblings ...)
2026-06-25 10:55 ` ✗ Xe.CI.FULL: " Patchwork
@ 2026-07-20 22:13 ` Zongyao Bai
2026-07-21 22:43 ` Matthew Brost
2026-07-20 22:18 ` ✗ CI.checkpatch: warning for drm/xe/forcewake: add delayed-release optimization (rev4) Patchwork
` (6 subsequent siblings)
19 siblings, 1 reply; 34+ messages in thread
From: Zongyao Bai @ 2026-07-20 22:13 UTC (permalink / raw)
To: intel-xe; +Cc: jia.yao, matthew.brost, Zongyao Bai
Add delayed-release optimization:
- Add domain sleep XE_FORCE_WAKE_HOLD_DELAY_US after xe_force_wake_put()
- Skip MMIO wake in xe_force_wake_get() if domain still awake.
Reduces frequent wake/sleep cycles for back-to-back operations.
Examples of scenarios: zeDeviceGetGlobalTimestamps read by VTune, PTI
v2:
- Add xe_force_wake_flush() and call it on the runtime/system
suspend paths to ensure no deferred-sleep runs after GT power-off.
(Sashiko)
v3:
- Add configfs for XE_DEFAULT_FORCE_WAKE_HOLD_DELAY_US. (Matt)
- Modify the default value of forcewake_hold_delay_us to 100. (Maarten)
- Use guard(spinlock_irqsave) in the delayed-sleep timer callback. (Matt)
- Drop the redundant refcount WARN in xe_force_wake_fini(). (Matt)
- Document the spinlock protection of the timer_rearm / timer_domains
fields, and reorder struct xe_force_wake_domain by member type. (Matt)
v4:
- Make delayed release opt-in via a new xe_force_wake_put_delay(),
used only by xe_query.c:query_engine_cycles(); xe_force_wake_put()
restores immediate sleep-and-ack-wait behavior for all other callers.
(Matt)
- Track a pending delayed-release request per domain so the final
reference drop honors it, regardless of whether that drop happens via
xe_force_wake_put() or xe_force_wake_put_delay(). (Matt)
Assisted-by: GitHub-Copilot:claude-opus-4.8
Suggested-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
---
drivers/gpu/drm/xe/xe_configfs.c | 65 +++++++++
drivers/gpu/drm/xe/xe_configfs.h | 5 +
drivers/gpu/drm/xe/xe_defaults.h | 1 +
drivers/gpu/drm/xe/xe_device.c | 2 +
drivers/gpu/drm/xe/xe_device_types.h | 3 +
drivers/gpu/drm/xe/xe_force_wake.c | 173 ++++++++++++++++++++---
drivers/gpu/drm/xe/xe_force_wake.h | 42 +++++-
drivers/gpu/drm/xe/xe_force_wake_types.h | 25 ++++
drivers/gpu/drm/xe/xe_gt.c | 27 +++-
drivers/gpu/drm/xe/xe_query.c | 2 +-
10 files changed, 319 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 052cce962161..e371ac190c2d 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -247,6 +247,16 @@
*
* # echo 0 > /sys/kernel/config/xe/0000:03:00.0/enable_multi_queue
*
+ * Force wake hold delay:
+ * ----------------------
+ *
+ * Delay in microseconds before an idle forcewake domain is put to sleep after
+ * the last reference is dropped. Keeping the domain awake for this short
+ * window lets rapid back-to-back accesses reuse a still-awake domain without
+ * paying the cost of a full wake + ACK cycle each time. Example::
+ *
+ * # echo 100 > /sys/kernel/config/xe/0000:03:00.0/forcewake_hold_delay_us
+ *
* This attribute can only be set before binding to the device.
*
* Remove devices
@@ -275,6 +285,7 @@ struct xe_config_group_device {
bool survivability_mode;
bool enable_psmi;
bool enable_multi_queue;
+ u32 forcewake_hold_delay_us;
struct {
unsigned int max_vfs;
bool admin_only_pf;
@@ -295,6 +306,7 @@ static const struct xe_config_device device_defaults = {
.survivability_mode = false,
.enable_psmi = false,
.enable_multi_queue = true,
+ .forcewake_hold_delay_us = XE_DEFAULT_FORCE_WAKE_HOLD_DELAY_US,
.sriov = {
.max_vfs = XE_DEFAULT_MAX_VFS,
.admin_only_pf = XE_DEFAULT_ADMIN_ONLY_PF,
@@ -616,6 +628,36 @@ static ssize_t enable_multi_queue_store(struct config_item *item, const char *pa
return len;
}
+static ssize_t forcewake_hold_delay_us_show(struct config_item *item, char *page)
+{
+ struct xe_config_device *dev = to_xe_config_device(item);
+
+ return sprintf(page, "%u\n", dev->forcewake_hold_delay_us);
+}
+
+static ssize_t forcewake_hold_delay_us_store(struct config_item *item,
+ const char *page, size_t len)
+{
+ struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ u32 val;
+ int ret;
+
+ ret = kstrtouint(page, 0, &val);
+ if (ret)
+ return ret;
+
+ if (!val)
+ return -EINVAL;
+
+ guard(mutex)(&dev->lock);
+ if (is_bound(dev))
+ return -EBUSY;
+
+ dev->config.forcewake_hold_delay_us = val;
+
+ return len;
+}
+
static bool wa_bb_read_advance(bool dereference, char **p,
const char *append, size_t len,
size_t *max_size)
@@ -856,6 +898,7 @@ CONFIGFS_ATTR(, ctx_restore_post_bb);
CONFIGFS_ATTR(, enable_multi_queue);
CONFIGFS_ATTR(, enable_psmi);
CONFIGFS_ATTR(, engines_allowed);
+CONFIGFS_ATTR(, forcewake_hold_delay_us);
CONFIGFS_ATTR(, gt_types_allowed);
CONFIGFS_ATTR(, survivability_mode);
@@ -865,6 +908,7 @@ static struct configfs_attribute *xe_config_device_attrs[] = {
&attr_enable_multi_queue,
&attr_enable_psmi,
&attr_engines_allowed,
+ &attr_forcewake_hold_delay_us,
&attr_gt_types_allowed,
&attr_survivability_mode,
NULL,
@@ -1143,6 +1187,7 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
PRI_CUSTOM_ATTR("%d", enable_multi_queue);
PRI_CUSTOM_ATTR("%d", enable_psmi);
PRI_CUSTOM_ATTR("%d", survivability_mode);
+ PRI_CUSTOM_ATTR("%u", forcewake_hold_delay_us);
PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
#undef PRI_CUSTOM_ATTR
@@ -1290,6 +1335,26 @@ bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev)
return ret;
}
+/**
+ * xe_configfs_get_forcewake_hold_delay_us - get configfs forcewake_hold_delay_us setting
+ * @pdev: pci device
+ *
+ * Return: forcewake_hold_delay_us setting in configfs
+ */
+u32 xe_configfs_get_forcewake_hold_delay_us(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+ u32 ret;
+
+ if (!dev)
+ return device_defaults.forcewake_hold_delay_us;
+
+ ret = dev->config.forcewake_hold_delay_us;
+ config_group_put(&dev->group);
+
+ return ret;
+}
+
/**
* xe_configfs_get_ctx_restore_mid_bb - get configfs ctx_restore_mid_bb setting
* @pdev: pci device
diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
index 4fbbeafba473..77abc83a6f70 100644
--- a/drivers/gpu/drm/xe/xe_configfs.h
+++ b/drivers/gpu/drm/xe/xe_configfs.h
@@ -24,6 +24,7 @@ bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev);
+u32 xe_configfs_get_forcewake_hold_delay_us(struct pci_dev *pdev);
u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
enum xe_engine_class class,
const u32 **cs);
@@ -44,6 +45,10 @@ static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return t
static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
static inline bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev) { return true; }
+static inline u32 xe_configfs_get_forcewake_hold_delay_us(struct pci_dev *pdev)
+{
+ return XE_DEFAULT_FORCE_WAKE_HOLD_DELAY_US;
+}
static inline u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
enum xe_engine_class class,
const u32 **cs) { return 0; }
diff --git a/drivers/gpu/drm/xe/xe_defaults.h b/drivers/gpu/drm/xe/xe_defaults.h
index c8ae1d5f3d60..3d8f57a54547 100644
--- a/drivers/gpu/drm/xe/xe_defaults.h
+++ b/drivers/gpu/drm/xe/xe_defaults.h
@@ -22,5 +22,6 @@
#define XE_DEFAULT_WEDGED_MODE XE_WEDGED_MODE_UPON_CRITICAL_ERROR
#define XE_DEFAULT_WEDGED_MODE_STR "upon-critical-error"
#define XE_DEFAULT_SVM_NOTIFIER_SIZE 512
+#define XE_DEFAULT_FORCE_WAKE_HOLD_DELAY_US 100
#endif
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 4eed9a251e65..88ba267c9303 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -541,6 +541,8 @@ int xe_device_init_early(struct xe_device *xe)
xe->atomic_svm_timeslice_ms = 5;
xe->min_run_period_lr_ms = 5;
+ xe->forcewake_hold_delay_us =
+ xe_configfs_get_forcewake_hold_delay_us(to_pci_dev(xe->drm.dev));
err = xe_irq_init(xe);
if (err)
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 56c17cca79c0..35aac1ef6454 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -530,6 +530,9 @@ struct xe_device {
/** @min_run_period_pf_ms: LR VM (page fault mode) timeslice */
u32 min_run_period_pf_ms;
+ /** @forcewake_hold_delay_us: Delayed forcewake release window in microseconds. */
+ u32 forcewake_hold_delay_us;
+
#ifdef TEST_VM_OPS_ERROR
/**
* @vm_inject_error_position: inject errors at different places in VM
diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
index 197e2197bd0a..34c3c23f79ca 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.c
+++ b/drivers/gpu/drm/xe/xe_force_wake.c
@@ -6,12 +6,17 @@
#include "xe_force_wake.h"
#include <drm/drm_util.h>
+#include <linux/cleanup.h>
+#include <linux/device.h>
+#include <linux/hrtimer.h>
#include "regs/xe_gt_regs.h"
#include "regs/xe_reg_defs.h"
+#include "xe_device.h"
#include "xe_gt.h"
#include "xe_gt_printk.h"
#include "xe_mmio.h"
+#include "xe_pm.h"
#include "xe_sriov.h"
#define XE_FORCE_WAKE_ACK_TIMEOUT_MS 50
@@ -27,6 +32,8 @@ static void mark_domain_initialized(struct xe_force_wake *fw,
fw->initialized_domains |= BIT(id);
}
+static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer);
+
static void init_domain(struct xe_force_wake *fw,
enum xe_force_wake_domain_id id,
struct xe_reg reg, struct xe_reg ack)
@@ -38,11 +45,24 @@ static void init_domain(struct xe_force_wake *fw,
domain->reg_ack = ack;
domain->val = FORCEWAKE_MT(FORCEWAKE_KERNEL);
domain->mask = FORCEWAKE_MT_MASK(FORCEWAKE_KERNEL);
+ domain->fw_back = fw;
+ hrtimer_setup(&domain->timer, xe_force_wake_domain_timer,
+ CLOCK_MONOTONIC, HRTIMER_MODE_REL);
mark_domain_initialized(fw, id);
}
-void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
+static void xe_force_wake_fini(void *arg)
+{
+ struct xe_force_wake *fw = arg;
+ struct xe_force_wake_domain *domain;
+ unsigned int tmp;
+
+ for_each_fw_domain(domain, fw, tmp)
+ hrtimer_cancel(&domain->timer);
+}
+
+int xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
{
struct xe_device *xe = gt_to_xe(gt);
@@ -58,6 +78,8 @@ void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
FORCEWAKE_GT,
FORCEWAKE_ACK_GT);
}
+
+ return devm_add_action_or_reset(xe->drm.dev, xe_force_wake_fini, fw);
}
void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw)
@@ -148,6 +170,36 @@ static int domain_sleep_wait(struct xe_gt *gt,
return __domain_wait(gt, domain, false);
}
+static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer)
+{
+ struct xe_force_wake_domain *domain =
+ container_of(timer, struct xe_force_wake_domain, timer);
+ struct xe_force_wake *fw = domain->fw_back;
+ struct xe_gt *gt = fw->gt;
+ struct xe_device *xe = gt_to_xe(gt);
+
+ xe_gt_assert(gt, !xe_pm_runtime_suspended(gt_to_xe(gt)));
+
+ guard(spinlock_irqsave)(&fw->lock);
+
+ if (!(fw->timer_domains & BIT(domain->id)) || domain->ref)
+ return HRTIMER_NORESTART;
+
+ if (domain->timer_rearm) {
+ domain->timer_rearm = false;
+ hrtimer_forward_now(timer,
+ ns_to_ktime(xe->forcewake_hold_delay_us *
+ NSEC_PER_USEC));
+ return HRTIMER_RESTART;
+ }
+
+ fw->timer_domains &= ~BIT(domain->id);
+ domain_sleep(gt, domain);
+ fw->awake_domains &= ~BIT(domain->id);
+
+ return HRTIMER_NORESTART;
+}
+
/**
* xe_force_wake_get() : Increase the domain refcount
* @fw: struct xe_force_wake
@@ -187,8 +239,13 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
spin_lock_irqsave(&fw->lock, flags);
for_each_fw_domain_masked(domain, ref_rqst, fw, tmp) {
if (!domain->ref++) {
- awake_rqst |= BIT(domain->id);
- domain_wake(gt, domain);
+ if (fw->awake_domains & BIT(domain->id)) {
+ fw->timer_domains &= ~BIT(domain->id);
+ hrtimer_try_to_cancel(&domain->timer);
+ } else {
+ awake_rqst |= BIT(domain->id);
+ domain_wake(gt, domain);
+ }
}
ref_incr |= BIT(domain->id);
}
@@ -212,19 +269,11 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
return ref_incr;
}
-/**
- * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
- * @fw: Pointer to the force wake structure
- * @fw_ref: return of xe_force_wake_get()
- *
- * This function reduces the reference counts for domains in fw_ref. If
- * refcount for any of the specified domain reaches 0, it puts the domain to sleep
- * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
- * Warns in case of timeout of ack from domain.
- */
-void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
+static void __xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref,
+ bool delayed_release)
{
struct xe_gt *gt = fw->gt;
+ struct xe_device *xe = gt_to_xe(gt);
struct xe_force_wake_domain *domain;
unsigned int tmp, sleep = 0;
unsigned long flags;
@@ -245,8 +294,24 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
xe_gt_assert(gt, domain->ref);
if (!--domain->ref) {
- sleep |= BIT(domain->id);
- domain_sleep(gt, domain);
+ if (delayed_release || domain->delay_requested) {
+ domain->delay_requested = false;
+ fw->timer_domains |= BIT(domain->id);
+ if (hrtimer_callback_running(&domain->timer)) {
+ domain->timer_rearm = true;
+ } else {
+ domain->timer_rearm = false;
+ hrtimer_start(&domain->timer,
+ ns_to_ktime(xe->forcewake_hold_delay_us *
+ NSEC_PER_USEC),
+ HRTIMER_MODE_REL);
+ }
+ } else {
+ sleep |= BIT(domain->id);
+ domain_sleep(gt, domain);
+ }
+ } else if (delayed_release) {
+ domain->delay_requested = true;
}
}
for_each_fw_domain_masked(domain, sleep, fw, tmp) {
@@ -261,6 +326,82 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
str_plural(hweight_long(ack_fail)), ack_fail);
}
+/**
+ * xe_force_wake_put - Decrement the refcount and release the domain
+ * @fw: Pointer to the force wake structure
+ * @fw_ref: return of xe_force_wake_get()
+ *
+ * This function reduces the reference counts for domains in fw_ref. If the
+ * refcount for a domain reaches 0, it puts the domain to sleep and waits for
+ * acknowledgment of the sleep request, warning if the domain fails to
+ * acknowledge.
+ */
+void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
+{
+ __xe_force_wake_put(fw, fw_ref, false);
+}
+
+/**
+ * xe_force_wake_put_delay - Decrement the refcount and defer the sleep request
+ * @fw: Pointer to the force wake structure
+ * @fw_ref: return of xe_force_wake_get()
+ *
+ * Same as xe_force_wake_put(), except that when a domain's refcount reaches 0
+ * the sleep request is not issued immediately. Instead a hrtimer is armed
+ * for xe->forcewake_hold_delay_us, so a rapid subsequent xe_force_wake_get()
+ * can reuse the still-awake domain at zero MMIO cost. If the domain is
+ * still idle when the timer fires, the sleep request is issued then.
+ *
+ * If the domain still has other references held when this is called, the
+ * request is recorded and honored later, whether the last reference is
+ * eventually dropped by this function or by xe_force_wake_put().
+ */
+void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref)
+{
+ __xe_force_wake_put(fw, fw_ref, true);
+}
+
+/**
+ * xe_force_wake_flush - Cancel pending delayed-sleep timers and settle domains
+ * @fw: Pointer to the force wake structure
+ *
+ * xe_force_wake_put_delay() arms a short hrtimer instead of putting an idle
+ * domain to sleep immediately. That deferred sleep performs MMIO and must
+ * not be allowed to run after the device has been powered down. Callers on
+ * the runtime/system suspend path must therefore flush any outstanding
+ * timers once forcewake has been fully released, before the hardware is
+ * powered off.
+ *
+ * For every domain this cancels the pending timer (synchronously waiting for an
+ * in-flight callback to finish) and, if the domain is still idle with an
+ * outstanding deferred sleep, performs the sleep request right away so the
+ * domain is left in a consistent, fully-asleep state. hrtimer_cancel() must be
+ * called without holding fw->lock, since the timer callback takes that same
+ * lock.
+ */
+void xe_force_wake_flush(struct xe_force_wake *fw)
+{
+ struct xe_gt *gt = fw->gt;
+ struct xe_force_wake_domain *domain;
+ unsigned int tmp;
+ unsigned long flags;
+
+ for_each_fw_domain(domain, fw, tmp)
+ hrtimer_cancel(&domain->timer);
+
+ spin_lock_irqsave(&fw->lock, flags);
+ for_each_fw_domain(domain, fw, tmp) {
+ domain->timer_rearm = false;
+ domain->delay_requested = false;
+ if ((fw->timer_domains & BIT(domain->id)) && !domain->ref) {
+ fw->timer_domains &= ~BIT(domain->id);
+ domain_sleep(gt, domain);
+ fw->awake_domains &= ~BIT(domain->id);
+ }
+ }
+ spin_unlock_irqrestore(&fw->lock, flags);
+}
+
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
{
switch (id) {
diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
index e2721f205d6c..232aaa3ba621 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.h
+++ b/drivers/gpu/drm/xe/xe_force_wake.h
@@ -11,13 +11,33 @@
struct xe_gt;
-void xe_force_wake_init_gt(struct xe_gt *gt,
- struct xe_force_wake *fw);
+int xe_force_wake_init_gt(struct xe_gt *gt,
+ struct xe_force_wake *fw);
void xe_force_wake_init_engines(struct xe_gt *gt,
struct xe_force_wake *fw);
unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
enum xe_force_wake_domains domains);
void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref);
+void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref);
+void xe_force_wake_flush(struct xe_force_wake *fw);
+
+/**
+ * xe_force_wake_put_and_flush - Release forcewake and settle any deferred sleep
+ * @fw: Pointer to the force wake structure
+ * @fw_ref: return of xe_force_wake_get()
+ *
+ * Convenience helper for paths that must guarantee the domain is fully asleep
+ * before returning (typically right before the GT is powered off on
+ * runtime/system suspend). Because the flush has to run after the final put
+ * but before HW power-off, scope-based cleanup via CLASS(xe_force_wake, ...)
+ * cannot be used here.
+ */
+static inline void
+xe_force_wake_put_and_flush(struct xe_force_wake *fw, unsigned int fw_ref)
+{
+ xe_force_wake_put(fw, fw_ref);
+ xe_force_wake_flush(fw);
+}
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id);
@@ -103,6 +123,24 @@ DEFINE_CLASS(xe_force_wake, struct xe_force_wake_ref,
#define xe_with_force_wake(ref, fw, domains) \
__xe_with_force_wake(ref, fw, domains, __UNIQUE_ID(done))
+/*
+ * Same as xe_with_force_wake(), but releases forcewake via
+ * xe_force_wake_put_delay() instead of xe_force_wake_put() on scope exit.
+ * Only use this for hot paths where the caller expects forcewake to be
+ * re-acquired again shortly.
+ */
+DEFINE_CLASS(xe_force_wake_delay, struct xe_force_wake_ref,
+ xe_force_wake_put_delay(_T.fw, _T.domains),
+ xe_force_wake_constructor(fw, domains),
+ struct xe_force_wake *fw, unsigned int domains);
+
+#define __xe_with_force_wake_delay(ref, fw, domains, done) \
+ for (CLASS(xe_force_wake_delay, ref)(fw, domains), *(done) = NULL; \
+ !(done); (done) = (void *)1)
+
+#define xe_with_force_wake_delay(ref, fw, domains) \
+ __xe_with_force_wake_delay(ref, fw, domains, __UNIQUE_ID(done))
+
/*
* Used when xe_force_wake_constructor() has already been called by another
* function and the current function is responsible for releasing the forcewake
diff --git a/drivers/gpu/drm/xe/xe_force_wake_types.h b/drivers/gpu/drm/xe/xe_force_wake_types.h
index 14b7b86e801b..5b3d2b6873ed 100644
--- a/drivers/gpu/drm/xe/xe_force_wake_types.h
+++ b/drivers/gpu/drm/xe/xe_force_wake_types.h
@@ -6,6 +6,7 @@
#ifndef _XE_FORCE_WAKE_TYPES_H_
#define _XE_FORCE_WAKE_TYPES_H_
+#include <linux/hrtimer.h>
#include <linux/mutex.h>
#include <linux/types.h>
@@ -51,6 +52,8 @@ enum xe_force_wake_domains {
XE_FORCEWAKE_ALL = BIT(XE_FW_DOMAIN_ID_COUNT)
};
+struct xe_force_wake;
+
/**
* struct xe_force_wake_domain - Xe force wake power domain
*
@@ -76,12 +79,29 @@ struct xe_force_wake_domain {
struct xe_reg reg_ctl;
/** @reg_ack: domain ack register address */
struct xe_reg reg_ack;
+ /** @timer: hrtimer for delayed sleep request */
+ struct hrtimer timer;
+ /** @fw_back: back pointer to parent xe_force_wake */
+ struct xe_force_wake *fw_back;
/** @val: domain wake write value */
u32 val;
/** @mask: domain mask */
u32 mask;
/** @ref: domain reference */
u32 ref;
+ /**
+ * @timer_rearm: put() ran while callback was in-flight; callback must
+ * restart timer. Protected by @fw_back->lock.
+ */
+ bool timer_rearm;
+ /**
+ * @delay_requested: xe_force_wake_put_delay() was called while the
+ * domain still had other references held; whichever call
+ * (xe_force_wake_put() or xe_force_wake_put_delay()) ends up dropping
+ * the last reference must honor the deferred-release request.
+ * Protected by @fw_back->lock.
+ */
+ bool delay_requested;
};
/**
@@ -101,6 +121,11 @@ struct xe_force_wake {
spinlock_t lock;
/** @awake_domains: mask of all domains awake */
unsigned int awake_domains;
+ /**
+ * @timer_domains: mask of domains with an outstanding delayed-sleep
+ * timer. Protected by @lock.
+ */
+ unsigned int timer_domains;
/** @initialized_domains: mask of all initialized domains */
unsigned int initialized_domains;
/** @domains: force wake domains */
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index dfdacc0f6de9..9c4980b81a8e 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -512,7 +512,10 @@ int xe_gt_init_early(struct xe_gt *gt)
xe_wa_process_gt_oob(gt);
- xe_force_wake_init_gt(gt, gt_to_fw(gt));
+ err = xe_force_wake_init_gt(gt, gt_to_fw(gt));
+ if (err)
+ return err;
+
spin_lock_init(>->global_invl_lock);
err = xe_gt_tlb_inval_init_early(gt);
@@ -1005,13 +1008,15 @@ void xe_gt_suspend_prepare(struct xe_gt *gt)
int xe_gt_suspend(struct xe_gt *gt)
{
+ unsigned int fw_ref;
int err;
xe_gt_dbg(gt, "suspending\n");
xe_gt_sanitize(gt);
- CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
- if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
+ fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+ if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {
+ xe_force_wake_put(gt_to_fw(gt), fw_ref);
xe_gt_err(gt, "suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
return -ETIMEDOUT;
}
@@ -1019,7 +1024,7 @@ int xe_gt_suspend(struct xe_gt *gt)
err = xe_uc_suspend(>->uc);
if (err) {
xe_gt_err(gt, "suspend failed (%pe)\n", ERR_PTR(err));
- return err;
+ goto err_force_wake;
}
xe_gt_idle_disable_pg(gt);
@@ -1028,7 +1033,10 @@ int xe_gt_suspend(struct xe_gt *gt)
xe_gt_dbg(gt, "suspended\n");
- return 0;
+err_force_wake:
+ xe_force_wake_put_and_flush(gt_to_fw(gt), fw_ref);
+
+ return err;
}
void xe_gt_shutdown(struct xe_gt *gt)
@@ -1087,10 +1095,13 @@ int xe_gt_resume(struct xe_gt *gt)
*/
int xe_gt_runtime_suspend(struct xe_gt *gt)
{
+ unsigned int fw_ref;
+
xe_gt_dbg(gt, "runtime suspending\n");
- CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
- if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
+ fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+ if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {
+ xe_force_wake_put(gt_to_fw(gt), fw_ref);
xe_gt_err(gt, "runtime suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
return -ETIMEDOUT;
}
@@ -1100,6 +1111,8 @@ int xe_gt_runtime_suspend(struct xe_gt *gt)
xe_gt_dbg(gt, "runtime suspended\n");
+ xe_force_wake_put_and_flush(gt_to_fw(gt), fw_ref);
+
return 0;
}
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index dc975f595368..86c4e1dfc101 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -157,7 +157,7 @@ query_engine_cycles(struct xe_device *xe,
fw_domain = xe_hw_engine_to_fw_domain(hwe);
- xe_with_force_wake(fw_ref, gt_to_fw(gt), fw_domain) {
+ xe_with_force_wake_delay(fw_ref, gt_to_fw(gt), fw_domain) {
if (!xe_force_wake_ref_has_domain(fw_ref.domains, fw_domain))
return -EIO;
--
2.43.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* ✗ CI.checkpatch: warning for drm/xe/forcewake: add delayed-release optimization (rev4)
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (12 preceding siblings ...)
2026-07-20 22:13 ` [PATCH v4] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
@ 2026-07-20 22:18 ` Patchwork
2026-07-20 22:20 ` ✓ CI.KUnit: success " Patchwork
` (5 subsequent siblings)
19 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2026-07-20 22:18 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
== Series Details ==
Series: drm/xe/forcewake: add delayed-release optimization (rev4)
URL : https://patchwork.freedesktop.org/series/167697/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 1fa470c9542fbe0396a3e144845f16ddc2c97cad
Author: Zongyao Bai <zongyao.bai@intel.com>
Date: Mon Jul 20 22:13:05 2026 +0000
drm/xe/forcewake: add delayed-release optimization
Add delayed-release optimization:
- Add domain sleep XE_FORCE_WAKE_HOLD_DELAY_US after xe_force_wake_put()
- Skip MMIO wake in xe_force_wake_get() if domain still awake.
Reduces frequent wake/sleep cycles for back-to-back operations.
Examples of scenarios: zeDeviceGetGlobalTimestamps read by VTune, PTI
v2:
- Add xe_force_wake_flush() and call it on the runtime/system
suspend paths to ensure no deferred-sleep runs after GT power-off.
(Sashiko)
v3:
- Add configfs for XE_DEFAULT_FORCE_WAKE_HOLD_DELAY_US. (Matt)
- Modify the default value of forcewake_hold_delay_us to 100. (Maarten)
- Use guard(spinlock_irqsave) in the delayed-sleep timer callback. (Matt)
- Drop the redundant refcount WARN in xe_force_wake_fini(). (Matt)
- Document the spinlock protection of the timer_rearm / timer_domains
fields, and reorder struct xe_force_wake_domain by member type. (Matt)
v4:
- Make delayed release opt-in via a new xe_force_wake_put_delay(),
used only by xe_query.c:query_engine_cycles(); xe_force_wake_put()
restores immediate sleep-and-ack-wait behavior for all other callers.
(Matt)
- Track a pending delayed-release request per domain so the final
reference drop honors it, regardless of whether that drop happens via
xe_force_wake_put() or xe_force_wake_put_delay(). (Matt)
Assisted-by: GitHub-Copilot:claude-opus-4.8
Suggested-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
+ /mt/dim checkpatch b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405 drm-intel
1fa470c9542f drm/xe/forcewake: add delayed-release optimization
-:531: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'done' - possible side-effects?
#531: FILE: drivers/gpu/drm/xe/xe_force_wake.h:137:
+#define __xe_with_force_wake_delay(ref, fw, domains, done) \
+ for (CLASS(xe_force_wake_delay, ref)(fw, domains), *(done) = NULL; \
+ !(done); (done) = (void *)1)
total: 0 errors, 0 warnings, 1 checks, 584 lines checked
^ permalink raw reply [flat|nested] 34+ messages in thread
* ✓ CI.KUnit: success for drm/xe/forcewake: add delayed-release optimization (rev4)
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (13 preceding siblings ...)
2026-07-20 22:18 ` ✗ CI.checkpatch: warning for drm/xe/forcewake: add delayed-release optimization (rev4) Patchwork
@ 2026-07-20 22:20 ` Patchwork
2026-07-20 22:54 ` ✓ Xe.CI.BAT: " Patchwork
` (4 subsequent siblings)
19 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2026-07-20 22:20 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
== Series Details ==
Series: drm/xe/forcewake: add delayed-release optimization (rev4)
URL : https://patchwork.freedesktop.org/series/167697/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[22:18:57] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:19:01] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:19:33] Starting KUnit Kernel (1/1)...
[22:19:33] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:19:33] ================== guc_buf (11 subtests) ===================
[22:19:33] [PASSED] test_smallest
[22:19:33] [PASSED] test_largest
[22:19:33] [PASSED] test_granular
[22:19:33] [PASSED] test_unique
[22:19:33] [PASSED] test_overlap
[22:19:33] [PASSED] test_reusable
[22:19:33] [PASSED] test_too_big
[22:19:33] [PASSED] test_flush
[22:19:33] [PASSED] test_lookup
[22:19:33] [PASSED] test_data
[22:19:33] [PASSED] test_class
[22:19:33] ===================== [PASSED] guc_buf =====================
[22:19:33] =================== guc_dbm (7 subtests) ===================
[22:19:33] [PASSED] test_empty
[22:19:33] [PASSED] test_default
[22:19:33] ======================== test_size ========================
[22:19:33] [PASSED] 4
[22:19:33] [PASSED] 8
[22:19:33] [PASSED] 32
[22:19:33] [PASSED] 256
[22:19:33] ==================== [PASSED] test_size ====================
[22:19:33] ======================= test_reuse ========================
[22:19:33] [PASSED] 4
[22:19:33] [PASSED] 8
[22:19:33] [PASSED] 32
[22:19:33] [PASSED] 256
[22:19:33] =================== [PASSED] test_reuse ====================
[22:19:33] =================== test_range_overlap ====================
[22:19:33] [PASSED] 4
[22:19:33] [PASSED] 8
[22:19:33] [PASSED] 32
[22:19:33] [PASSED] 256
[22:19:33] =============== [PASSED] test_range_overlap ================
[22:19:33] =================== test_range_compact ====================
[22:19:33] [PASSED] 4
[22:19:33] [PASSED] 8
[22:19:33] [PASSED] 32
[22:19:33] [PASSED] 256
[22:19:33] =============== [PASSED] test_range_compact ================
[22:19:33] ==================== test_range_spare =====================
[22:19:33] [PASSED] 4
[22:19:33] [PASSED] 8
[22:19:33] [PASSED] 32
[22:19:33] [PASSED] 256
[22:19:33] ================ [PASSED] test_range_spare =================
[22:19:33] ===================== [PASSED] guc_dbm =====================
[22:19:33] =================== guc_idm (6 subtests) ===================
[22:19:33] [PASSED] bad_init
[22:19:33] [PASSED] no_init
[22:19:33] [PASSED] init_fini
[22:19:33] [PASSED] check_used
[22:19:33] [PASSED] check_quota
[22:19:33] [PASSED] check_all
[22:19:33] ===================== [PASSED] guc_idm =====================
[22:19:33] =============== guc_klv_helpers (9 subtests) ===============
[22:19:33] [PASSED] test_count
[22:19:33] [PASSED] test_encode_u32
[22:19:33] [PASSED] test_encode_u64
[22:19:33] [PASSED] test_encode_string
[22:19:33] [PASSED] test_encode_object_raw
[22:19:33] [PASSED] test_encode_object_klv
[22:19:33] [PASSED] test_encode_object_nested
[22:19:33] [PASSED] test_encode_object_basic
[22:19:33] [PASSED] test_print
[22:19:33] ================= [PASSED] guc_klv_helpers =================
[22:19:33] ================== no_relay (3 subtests) ===================
[22:19:33] [PASSED] xe_drops_guc2pf_if_not_ready
[22:19:33] [PASSED] xe_drops_guc2vf_if_not_ready
[22:19:33] [PASSED] xe_rejects_send_if_not_ready
[22:19:33] ==================== [PASSED] no_relay =====================
[22:19:33] ================== pf_relay (14 subtests) ==================
[22:19:33] [PASSED] pf_rejects_guc2pf_too_short
[22:19:33] [PASSED] pf_rejects_guc2pf_too_long
[22:19:33] [PASSED] pf_rejects_guc2pf_no_payload
[22:19:33] [PASSED] pf_fails_no_payload
[22:19:33] [PASSED] pf_fails_bad_origin
[22:19:33] [PASSED] pf_fails_bad_type
[22:19:33] [PASSED] pf_txn_reports_error
[22:19:33] [PASSED] pf_txn_sends_pf2guc
[22:19:33] [PASSED] pf_sends_pf2guc
[22:19:33] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:19:33] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:19:33] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:19:33] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:19:33] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[22:19:33] ==================== [PASSED] pf_relay =====================
[22:19:33] ================== vf_relay (3 subtests) ===================
[22:19:33] [PASSED] vf_rejects_guc2vf_too_short
[22:19:33] [PASSED] vf_rejects_guc2vf_too_long
[22:19:33] [PASSED] vf_rejects_guc2vf_no_payload
[22:19:33] ==================== [PASSED] vf_relay =====================
[22:19:33] ================ pf_gt_config (9 subtests) =================
[22:19:33] [PASSED] fair_contexts_1vf
[22:19:33] [PASSED] fair_doorbells_1vf
[22:19:33] [PASSED] fair_ggtt_1vf
[22:19:33] ====================== fair_vram_1vf ======================
[22:19:33] [PASSED] 3.50 GiB
[22:19:33] [PASSED] 11.5 GiB
[22:19:33] [PASSED] 15.5 GiB
[22:19:33] [PASSED] 31.5 GiB
[22:19:33] [PASSED] 63.5 GiB
[22:19:33] [PASSED] 1.91 GiB
[22:19:33] ================== [PASSED] fair_vram_1vf ==================
[22:19:33] ================ fair_vram_1vf_admin_only =================
[22:19:33] [PASSED] 3.50 GiB
[22:19:33] [PASSED] 11.5 GiB
[22:19:33] [PASSED] 15.5 GiB
[22:19:33] [PASSED] 31.5 GiB
[22:19:33] [PASSED] 63.5 GiB
[22:19:33] [PASSED] 1.91 GiB
[22:19:33] ============ [PASSED] fair_vram_1vf_admin_only =============
[22:19:33] ====================== fair_contexts ======================
[22:19:33] [PASSED] 1 VF
[22:19:33] [PASSED] 2 VFs
[22:19:33] [PASSED] 3 VFs
[22:19:33] [PASSED] 4 VFs
[22:19:33] [PASSED] 5 VFs
[22:19:33] [PASSED] 6 VFs
[22:19:33] [PASSED] 7 VFs
[22:19:33] [PASSED] 8 VFs
[22:19:33] [PASSED] 9 VFs
[22:19:33] [PASSED] 10 VFs
[22:19:33] [PASSED] 11 VFs
[22:19:33] [PASSED] 12 VFs
[22:19:33] [PASSED] 13 VFs
[22:19:33] [PASSED] 14 VFs
[22:19:33] [PASSED] 15 VFs
[22:19:33] [PASSED] 16 VFs
[22:19:33] [PASSED] 17 VFs
[22:19:33] [PASSED] 18 VFs
[22:19:33] [PASSED] 19 VFs
[22:19:33] [PASSED] 20 VFs
[22:19:33] [PASSED] 21 VFs
[22:19:33] [PASSED] 22 VFs
[22:19:33] [PASSED] 23 VFs
[22:19:33] [PASSED] 24 VFs
[22:19:33] [PASSED] 25 VFs
[22:19:33] [PASSED] 26 VFs
[22:19:33] [PASSED] 27 VFs
[22:19:33] [PASSED] 28 VFs
[22:19:33] [PASSED] 29 VFs
[22:19:33] [PASSED] 30 VFs
[22:19:33] [PASSED] 31 VFs
[22:19:33] [PASSED] 32 VFs
[22:19:33] [PASSED] 33 VFs
[22:19:33] [PASSED] 34 VFs
[22:19:33] [PASSED] 35 VFs
[22:19:33] [PASSED] 36 VFs
[22:19:33] [PASSED] 37 VFs
[22:19:33] [PASSED] 38 VFs
[22:19:33] [PASSED] 39 VFs
[22:19:33] [PASSED] 40 VFs
[22:19:33] [PASSED] 41 VFs
[22:19:33] [PASSED] 42 VFs
[22:19:33] [PASSED] 43 VFs
[22:19:33] [PASSED] 44 VFs
[22:19:33] [PASSED] 45 VFs
[22:19:33] [PASSED] 46 VFs
[22:19:33] [PASSED] 47 VFs
[22:19:33] [PASSED] 48 VFs
[22:19:33] [PASSED] 49 VFs
[22:19:33] [PASSED] 50 VFs
[22:19:33] [PASSED] 51 VFs
[22:19:33] [PASSED] 52 VFs
[22:19:33] [PASSED] 53 VFs
[22:19:33] [PASSED] 54 VFs
[22:19:33] [PASSED] 55 VFs
[22:19:33] [PASSED] 56 VFs
[22:19:33] [PASSED] 57 VFs
[22:19:33] [PASSED] 58 VFs
[22:19:33] [PASSED] 59 VFs
[22:19:33] [PASSED] 60 VFs
[22:19:33] [PASSED] 61 VFs
[22:19:33] [PASSED] 62 VFs
[22:19:33] [PASSED] 63 VFs
[22:19:33] ================== [PASSED] fair_contexts ==================
[22:19:33] ===================== fair_doorbells ======================
[22:19:33] [PASSED] 1 VF
[22:19:33] [PASSED] 2 VFs
[22:19:33] [PASSED] 3 VFs
[22:19:33] [PASSED] 4 VFs
[22:19:33] [PASSED] 5 VFs
[22:19:33] [PASSED] 6 VFs
[22:19:33] [PASSED] 7 VFs
[22:19:33] [PASSED] 8 VFs
[22:19:33] [PASSED] 9 VFs
[22:19:33] [PASSED] 10 VFs
[22:19:33] [PASSED] 11 VFs
[22:19:33] [PASSED] 12 VFs
[22:19:33] [PASSED] 13 VFs
[22:19:33] [PASSED] 14 VFs
[22:19:33] [PASSED] 15 VFs
[22:19:33] [PASSED] 16 VFs
[22:19:33] [PASSED] 17 VFs
[22:19:33] [PASSED] 18 VFs
[22:19:33] [PASSED] 19 VFs
[22:19:33] [PASSED] 20 VFs
[22:19:33] [PASSED] 21 VFs
[22:19:33] [PASSED] 22 VFs
[22:19:33] [PASSED] 23 VFs
[22:19:33] [PASSED] 24 VFs
[22:19:33] [PASSED] 25 VFs
[22:19:33] [PASSED] 26 VFs
[22:19:33] [PASSED] 27 VFs
[22:19:33] [PASSED] 28 VFs
[22:19:33] [PASSED] 29 VFs
[22:19:33] [PASSED] 30 VFs
[22:19:33] [PASSED] 31 VFs
[22:19:33] [PASSED] 32 VFs
[22:19:33] [PASSED] 33 VFs
[22:19:33] [PASSED] 34 VFs
[22:19:33] [PASSED] 35 VFs
[22:19:33] [PASSED] 36 VFs
[22:19:33] [PASSED] 37 VFs
[22:19:33] [PASSED] 38 VFs
[22:19:33] [PASSED] 39 VFs
[22:19:33] [PASSED] 40 VFs
[22:19:33] [PASSED] 41 VFs
[22:19:33] [PASSED] 42 VFs
[22:19:33] [PASSED] 43 VFs
[22:19:33] [PASSED] 44 VFs
[22:19:33] [PASSED] 45 VFs
[22:19:33] [PASSED] 46 VFs
[22:19:33] [PASSED] 47 VFs
[22:19:33] [PASSED] 48 VFs
[22:19:33] [PASSED] 49 VFs
[22:19:33] [PASSED] 50 VFs
[22:19:33] [PASSED] 51 VFs
[22:19:33] [PASSED] 52 VFs
[22:19:33] [PASSED] 53 VFs
[22:19:33] [PASSED] 54 VFs
[22:19:33] [PASSED] 55 VFs
[22:19:33] [PASSED] 56 VFs
[22:19:33] [PASSED] 57 VFs
[22:19:33] [PASSED] 58 VFs
[22:19:33] [PASSED] 59 VFs
[22:19:33] [PASSED] 60 VFs
[22:19:33] [PASSED] 61 VFs
[22:19:33] [PASSED] 62 VFs
[22:19:33] [PASSED] 63 VFs
[22:19:33] ================= [PASSED] fair_doorbells ==================
[22:19:33] ======================== fair_ggtt ========================
[22:19:33] [PASSED] 1 VF
[22:19:33] [PASSED] 2 VFs
[22:19:33] [PASSED] 3 VFs
[22:19:33] [PASSED] 4 VFs
[22:19:33] [PASSED] 5 VFs
[22:19:33] [PASSED] 6 VFs
[22:19:33] [PASSED] 7 VFs
[22:19:33] [PASSED] 8 VFs
[22:19:33] [PASSED] 9 VFs
[22:19:33] [PASSED] 10 VFs
[22:19:33] [PASSED] 11 VFs
[22:19:33] [PASSED] 12 VFs
[22:19:33] [PASSED] 13 VFs
[22:19:33] [PASSED] 14 VFs
[22:19:33] [PASSED] 15 VFs
[22:19:33] [PASSED] 16 VFs
[22:19:33] [PASSED] 17 VFs
[22:19:33] [PASSED] 18 VFs
[22:19:33] [PASSED] 19 VFs
[22:19:33] [PASSED] 20 VFs
[22:19:33] [PASSED] 21 VFs
[22:19:33] [PASSED] 22 VFs
[22:19:33] [PASSED] 23 VFs
[22:19:33] [PASSED] 24 VFs
[22:19:33] [PASSED] 25 VFs
[22:19:33] [PASSED] 26 VFs
[22:19:33] [PASSED] 27 VFs
[22:19:33] [PASSED] 28 VFs
[22:19:33] [PASSED] 29 VFs
[22:19:33] [PASSED] 30 VFs
[22:19:33] [PASSED] 31 VFs
[22:19:33] [PASSED] 32 VFs
[22:19:33] [PASSED] 33 VFs
[22:19:33] [PASSED] 34 VFs
[22:19:33] [PASSED] 35 VFs
[22:19:33] [PASSED] 36 VFs
[22:19:33] [PASSED] 37 VFs
[22:19:33] [PASSED] 38 VFs
[22:19:33] [PASSED] 39 VFs
[22:19:33] [PASSED] 40 VFs
[22:19:33] [PASSED] 41 VFs
[22:19:33] [PASSED] 42 VFs
[22:19:33] [PASSED] 43 VFs
[22:19:33] [PASSED] 44 VFs
[22:19:33] [PASSED] 45 VFs
[22:19:33] [PASSED] 46 VFs
[22:19:33] [PASSED] 47 VFs
[22:19:33] [PASSED] 48 VFs
[22:19:33] [PASSED] 49 VFs
[22:19:33] [PASSED] 50 VFs
[22:19:33] [PASSED] 51 VFs
[22:19:33] [PASSED] 52 VFs
[22:19:33] [PASSED] 53 VFs
[22:19:33] [PASSED] 54 VFs
[22:19:33] [PASSED] 55 VFs
[22:19:33] [PASSED] 56 VFs
[22:19:33] [PASSED] 57 VFs
[22:19:33] [PASSED] 58 VFs
[22:19:33] [PASSED] 59 VFs
[22:19:33] [PASSED] 60 VFs
[22:19:33] [PASSED] 61 VFs
[22:19:33] [PASSED] 62 VFs
[22:19:33] [PASSED] 63 VFs
[22:19:33] ==================== [PASSED] fair_ggtt ====================
[22:19:33] ======================== fair_vram ========================
[22:19:33] [PASSED] 1 VF
[22:19:33] [PASSED] 2 VFs
[22:19:33] [PASSED] 3 VFs
[22:19:33] [PASSED] 4 VFs
[22:19:33] [PASSED] 5 VFs
[22:19:33] [PASSED] 6 VFs
[22:19:33] [PASSED] 7 VFs
[22:19:33] [PASSED] 8 VFs
[22:19:33] [PASSED] 9 VFs
[22:19:33] [PASSED] 10 VFs
[22:19:33] [PASSED] 11 VFs
[22:19:33] [PASSED] 12 VFs
[22:19:33] [PASSED] 13 VFs
[22:19:33] [PASSED] 14 VFs
[22:19:33] [PASSED] 15 VFs
[22:19:33] [PASSED] 16 VFs
[22:19:33] [PASSED] 17 VFs
[22:19:33] [PASSED] 18 VFs
[22:19:33] [PASSED] 19 VFs
[22:19:33] [PASSED] 20 VFs
[22:19:33] [PASSED] 21 VFs
[22:19:33] [PASSED] 22 VFs
[22:19:33] [PASSED] 23 VFs
[22:19:33] [PASSED] 24 VFs
[22:19:33] [PASSED] 25 VFs
[22:19:33] [PASSED] 26 VFs
[22:19:33] [PASSED] 27 VFs
[22:19:33] [PASSED] 28 VFs
[22:19:33] [PASSED] 29 VFs
[22:19:33] [PASSED] 30 VFs
[22:19:33] [PASSED] 31 VFs
[22:19:33] [PASSED] 32 VFs
[22:19:33] [PASSED] 33 VFs
[22:19:33] [PASSED] 34 VFs
[22:19:33] [PASSED] 35 VFs
[22:19:33] [PASSED] 36 VFs
[22:19:33] [PASSED] 37 VFs
[22:19:33] [PASSED] 38 VFs
[22:19:33] [PASSED] 39 VFs
[22:19:33] [PASSED] 40 VFs
[22:19:33] [PASSED] 41 VFs
[22:19:33] [PASSED] 42 VFs
[22:19:33] [PASSED] 43 VFs
[22:19:33] [PASSED] 44 VFs
[22:19:33] [PASSED] 45 VFs
[22:19:33] [PASSED] 46 VFs
[22:19:33] [PASSED] 47 VFs
[22:19:33] [PASSED] 48 VFs
[22:19:33] [PASSED] 49 VFs
[22:19:33] [PASSED] 50 VFs
[22:19:33] [PASSED] 51 VFs
[22:19:33] [PASSED] 52 VFs
[22:19:33] [PASSED] 53 VFs
[22:19:33] [PASSED] 54 VFs
[22:19:33] [PASSED] 55 VFs
[22:19:33] [PASSED] 56 VFs
[22:19:33] [PASSED] 57 VFs
[22:19:33] [PASSED] 58 VFs
[22:19:33] [PASSED] 59 VFs
[22:19:33] [PASSED] 60 VFs
[22:19:33] [PASSED] 61 VFs
[22:19:33] [PASSED] 62 VFs
[22:19:33] [PASSED] 63 VFs
[22:19:33] ==================== [PASSED] fair_vram ====================
[22:19:33] ================== [PASSED] pf_gt_config ===================
[22:19:33] ===================== lmtt (1 subtest) =====================
[22:19:33] ======================== test_ops =========================
[22:19:33] [PASSED] 2-level
[22:19:33] [PASSED] multi-level
[22:19:33] ==================== [PASSED] test_ops =====================
[22:19:33] ====================== [PASSED] lmtt =======================
[22:19:33] ================= sriov_packet (1 subtest) =================
[22:19:33] [PASSED] test_descriptor_init
[22:19:33] ================== [PASSED] sriov_packet ===================
[22:19:33] ================= pf_service (11 subtests) =================
[22:19:33] [PASSED] pf_negotiate_any
[22:19:33] [PASSED] pf_negotiate_base_match
[22:19:33] [PASSED] pf_negotiate_base_newer
[22:19:33] [PASSED] pf_negotiate_base_next
[22:19:33] [SKIPPED] pf_negotiate_base_older (no older minor)
[22:19:33] [PASSED] pf_negotiate_base_prev
[22:19:33] [PASSED] pf_negotiate_latest_match
[22:19:33] [PASSED] pf_negotiate_latest_newer
[22:19:33] [PASSED] pf_negotiate_latest_next
[22:19:33] [SKIPPED] pf_negotiate_latest_older (no older minor)
[22:19:33] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[22:19:33] =================== [PASSED] pf_service ====================
[22:19:33] ================= xe_guc_g2g (2 subtests) ==================
[22:19:33] ============== xe_live_guc_g2g_kunit_default ==============
[22:19:33] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[22:19:33] ============== xe_live_guc_g2g_kunit_allmem ===============
[22:19:33] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[22:19:33] =================== [SKIPPED] xe_guc_g2g ===================
[22:19:33] =================== xe_mocs (2 subtests) ===================
[22:19:33] ================ xe_live_mocs_kernel_kunit ================
[22:19:33] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[22:19:33] ================ xe_live_mocs_reset_kunit =================
[22:19:33] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[22:19:33] ==================== [SKIPPED] xe_mocs =====================
[22:19:33] ================= xe_migrate (2 subtests) ==================
[22:19:33] ================= xe_migrate_sanity_kunit =================
[22:19:33] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[22:19:33] ================== xe_validate_ccs_kunit ==================
[22:19:33] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[22:19:33] =================== [SKIPPED] xe_migrate ===================
[22:19:33] ================== xe_dma_buf (1 subtest) ==================
[22:19:33] ==================== xe_dma_buf_kunit =====================
[22:19:33] ================ [SKIPPED] xe_dma_buf_kunit ================
[22:19:33] =================== [SKIPPED] xe_dma_buf ===================
[22:19:33] ================= xe_bo_shrink (1 subtest) =================
[22:19:33] =================== xe_bo_shrink_kunit ====================
[22:19:33] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[22:19:33] ================== [SKIPPED] xe_bo_shrink ==================
[22:19:33] ==================== xe_bo (2 subtests) ====================
[22:19:33] ================== xe_ccs_migrate_kunit ===================
[22:19:33] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[22:19:33] ==================== xe_bo_evict_kunit ====================
[22:19:33] =============== [SKIPPED] xe_bo_evict_kunit ================
[22:19:33] ===================== [SKIPPED] xe_bo ======================
[22:19:33] ==================== args (13 subtests) ====================
[22:19:33] [PASSED] count_args_test
[22:19:33] [PASSED] call_args_example
[22:19:33] [PASSED] call_args_test
[22:19:33] [PASSED] drop_first_arg_example
[22:19:33] [PASSED] drop_first_arg_test
[22:19:33] [PASSED] first_arg_example
[22:19:33] [PASSED] first_arg_test
[22:19:33] [PASSED] last_arg_example
[22:19:33] [PASSED] last_arg_test
[22:19:33] [PASSED] pick_arg_example
[22:19:33] [PASSED] if_args_example
[22:19:33] [PASSED] if_args_test
[22:19:33] [PASSED] sep_comma_example
[22:19:33] ====================== [PASSED] args =======================
[22:19:33] =================== xe_pci (3 subtests) ====================
[22:19:33] ==================== check_graphics_ip ====================
[22:19:33] [PASSED] 12.00 Xe_LP
[22:19:33] [PASSED] 12.10 Xe_LP+
[22:19:33] [PASSED] 12.55 Xe_HPG
[22:19:33] [PASSED] 12.60 Xe_HPC
[22:19:33] [PASSED] 12.70 Xe_LPG
[22:19:33] [PASSED] 12.71 Xe_LPG
[22:19:33] [PASSED] 12.74 Xe_LPG+
[22:19:33] [PASSED] 20.01 Xe2_HPG
[22:19:33] [PASSED] 20.02 Xe2_HPG
[22:19:33] [PASSED] 20.04 Xe2_LPG
[22:19:33] [PASSED] 30.00 Xe3_LPG
[22:19:33] [PASSED] 30.01 Xe3_LPG
[22:19:33] [PASSED] 30.03 Xe3_LPG
[22:19:33] [PASSED] 30.04 Xe3_LPG
[22:19:33] [PASSED] 30.05 Xe3_LPG
[22:19:33] [PASSED] 35.10 Xe3p_LPG
[22:19:33] [PASSED] 35.11 Xe3p_XPC
[22:19:33] ================ [PASSED] check_graphics_ip ================
[22:19:33] ===================== check_media_ip ======================
[22:19:33] [PASSED] 12.00 Xe_M
[22:19:33] [PASSED] 12.55 Xe_HPM
[22:19:33] [PASSED] 13.00 Xe_LPM+
[22:19:33] [PASSED] 13.01 Xe2_HPM
[22:19:33] [PASSED] 20.00 Xe2_LPM
[22:19:33] [PASSED] 30.00 Xe3_LPM
[22:19:33] [PASSED] 30.02 Xe3_LPM
[22:19:33] [PASSED] 35.00 Xe3p_LPM
[22:19:33] [PASSED] 35.03 Xe3p_HPM
[22:19:33] ================= [PASSED] check_media_ip ==================
[22:19:33] =================== check_platform_desc ===================
[22:19:33] [PASSED] 0x9A60 (TIGERLAKE)
[22:19:33] [PASSED] 0x9A68 (TIGERLAKE)
[22:19:33] [PASSED] 0x9A70 (TIGERLAKE)
[22:19:33] [PASSED] 0x9A40 (TIGERLAKE)
[22:19:33] [PASSED] 0x9A49 (TIGERLAKE)
[22:19:33] [PASSED] 0x9A59 (TIGERLAKE)
[22:19:33] [PASSED] 0x9A78 (TIGERLAKE)
[22:19:33] [PASSED] 0x9AC0 (TIGERLAKE)
[22:19:33] [PASSED] 0x9AC9 (TIGERLAKE)
[22:19:33] [PASSED] 0x9AD9 (TIGERLAKE)
[22:19:33] [PASSED] 0x9AF8 (TIGERLAKE)
[22:19:33] [PASSED] 0x4C80 (ROCKETLAKE)
[22:19:33] [PASSED] 0x4C8A (ROCKETLAKE)
[22:19:33] [PASSED] 0x4C8B (ROCKETLAKE)
[22:19:33] [PASSED] 0x4C8C (ROCKETLAKE)
[22:19:33] [PASSED] 0x4C90 (ROCKETLAKE)
[22:19:33] [PASSED] 0x4C9A (ROCKETLAKE)
[22:19:33] [PASSED] 0x4680 (ALDERLAKE_S)
[22:19:33] [PASSED] 0x4682 (ALDERLAKE_S)
[22:19:33] [PASSED] 0x4688 (ALDERLAKE_S)
[22:19:33] [PASSED] 0x468A (ALDERLAKE_S)
[22:19:33] [PASSED] 0x468B (ALDERLAKE_S)
[22:19:33] [PASSED] 0x4690 (ALDERLAKE_S)
[22:19:33] [PASSED] 0x4692 (ALDERLAKE_S)
[22:19:33] [PASSED] 0x4693 (ALDERLAKE_S)
[22:19:33] [PASSED] 0x46A0 (ALDERLAKE_P)
[22:19:33] [PASSED] 0x46A1 (ALDERLAKE_P)
[22:19:33] [PASSED] 0x46A2 (ALDERLAKE_P)
[22:19:33] [PASSED] 0x46A3 (ALDERLAKE_P)
[22:19:33] [PASSED] 0x46A6 (ALDERLAKE_P)
[22:19:33] [PASSED] 0x46A8 (ALDERLAKE_P)
[22:19:33] [PASSED] 0x46AA (ALDERLAKE_P)
[22:19:33] [PASSED] 0x462A (ALDERLAKE_P)
[22:19:33] [PASSED] 0x4626 (ALDERLAKE_P)
[22:19:33] [PASSED] 0x4628 (ALDERLAKE_P)
[22:19:33] [PASSED] 0x46B0 (ALDERLAKE_P)
[22:19:33] [PASSED] 0x46B1 (ALDERLAKE_P)
[22:19:33] [PASSED] 0x46B2 (ALDERLAKE_P)
[22:19:33] [PASSED] 0x46B3 (ALDERLAKE_P)
[22:19:33] [PASSED] 0x46C0 (ALDERLAKE_P)
[22:19:33] [PASSED] 0x46C1 (ALDERLAKE_P)
[22:19:33] [PASSED] 0x46C2 (ALDERLAKE_P)
[22:19:33] [PASSED] 0x46C3 (ALDERLAKE_P)
[22:19:33] [PASSED] 0x46D0 (ALDERLAKE_N)
[22:19:33] [PASSED] 0x46D1 (ALDERLAKE_N)
[22:19:33] [PASSED] 0x46D2 (ALDERLAKE_N)
[22:19:33] [PASSED] 0x46D3 (ALDERLAKE_N)
[22:19:33] [PASSED] 0x46D4 (ALDERLAKE_N)
[22:19:33] [PASSED] 0xA721 (ALDERLAKE_P)
[22:19:33] [PASSED] 0xA7A1 (ALDERLAKE_P)
[22:19:33] [PASSED] 0xA7A9 (ALDERLAKE_P)
[22:19:33] [PASSED] 0xA7AC (ALDERLAKE_P)
[22:19:33] [PASSED] 0xA7AD (ALDERLAKE_P)
[22:19:33] [PASSED] 0xA720 (ALDERLAKE_P)
[22:19:33] [PASSED] 0xA7A0 (ALDERLAKE_P)
[22:19:33] [PASSED] 0xA7A8 (ALDERLAKE_P)
[22:19:33] [PASSED] 0xA7AA (ALDERLAKE_P)
[22:19:33] [PASSED] 0xA7AB (ALDERLAKE_P)
[22:19:33] [PASSED] 0xA780 (ALDERLAKE_S)
[22:19:33] [PASSED] 0xA781 (ALDERLAKE_S)
[22:19:33] [PASSED] 0xA782 (ALDERLAKE_S)
[22:19:33] [PASSED] 0xA783 (ALDERLAKE_S)
[22:19:33] [PASSED] 0xA788 (ALDERLAKE_S)
[22:19:33] [PASSED] 0xA789 (ALDERLAKE_S)
[22:19:33] [PASSED] 0xA78A (ALDERLAKE_S)
[22:19:33] [PASSED] 0xA78B (ALDERLAKE_S)
[22:19:33] [PASSED] 0x4905 (DG1)
[22:19:33] [PASSED] 0x4906 (DG1)
[22:19:33] [PASSED] 0x4907 (DG1)
[22:19:33] [PASSED] 0x4908 (DG1)
[22:19:33] [PASSED] 0x4909 (DG1)
[22:19:33] [PASSED] 0x56C0 (DG2)
[22:19:33] [PASSED] 0x56C2 (DG2)
[22:19:33] [PASSED] 0x56C1 (DG2)
[22:19:33] [PASSED] 0x7D51 (METEORLAKE)
[22:19:33] [PASSED] 0x7DD1 (METEORLAKE)
[22:19:33] [PASSED] 0x7D41 (METEORLAKE)
[22:19:33] [PASSED] 0x7D67 (METEORLAKE)
[22:19:33] [PASSED] 0xB640 (METEORLAKE)
[22:19:33] [PASSED] 0x56A0 (DG2)
[22:19:33] [PASSED] 0x56A1 (DG2)
[22:19:33] [PASSED] 0x56A2 (DG2)
[22:19:33] [PASSED] 0x56BE (DG2)
[22:19:33] [PASSED] 0x56BF (DG2)
[22:19:33] [PASSED] 0x5690 (DG2)
[22:19:33] [PASSED] 0x5691 (DG2)
[22:19:33] [PASSED] 0x5692 (DG2)
[22:19:33] [PASSED] 0x56A5 (DG2)
[22:19:33] [PASSED] 0x56A6 (DG2)
[22:19:33] [PASSED] 0x56B0 (DG2)
[22:19:33] [PASSED] 0x56B1 (DG2)
[22:19:33] [PASSED] 0x56BA (DG2)
[22:19:33] [PASSED] 0x56BB (DG2)
[22:19:33] [PASSED] 0x56BC (DG2)
[22:19:33] [PASSED] 0x56BD (DG2)
[22:19:33] [PASSED] 0x5693 (DG2)
[22:19:33] [PASSED] 0x5694 (DG2)
[22:19:33] [PASSED] 0x5695 (DG2)
[22:19:33] [PASSED] 0x56A3 (DG2)
[22:19:33] [PASSED] 0x56A4 (DG2)
[22:19:33] [PASSED] 0x56B2 (DG2)
[22:19:33] [PASSED] 0x56B3 (DG2)
[22:19:33] [PASSED] 0x5696 (DG2)
[22:19:33] [PASSED] 0x5697 (DG2)
[22:19:33] [PASSED] 0xB69 (PVC)
[22:19:33] [PASSED] 0xB6E (PVC)
[22:19:33] [PASSED] 0xBD4 (PVC)
[22:19:33] [PASSED] 0xBD5 (PVC)
[22:19:33] [PASSED] 0xBD6 (PVC)
[22:19:33] [PASSED] 0xBD7 (PVC)
[22:19:33] [PASSED] 0xBD8 (PVC)
[22:19:33] [PASSED] 0xBD9 (PVC)
[22:19:33] [PASSED] 0xBDA (PVC)
[22:19:33] [PASSED] 0xBDB (PVC)
[22:19:33] [PASSED] 0xBE0 (PVC)
[22:19:33] [PASSED] 0xBE1 (PVC)
[22:19:33] [PASSED] 0xBE5 (PVC)
[22:19:33] [PASSED] 0x7D40 (METEORLAKE)
[22:19:33] [PASSED] 0x7D45 (METEORLAKE)
[22:19:33] [PASSED] 0x7D55 (METEORLAKE)
[22:19:33] [PASSED] 0x7D60 (METEORLAKE)
[22:19:33] [PASSED] 0x7DD5 (METEORLAKE)
[22:19:33] [PASSED] 0x6420 (LUNARLAKE)
[22:19:33] [PASSED] 0x64A0 (LUNARLAKE)
[22:19:33] [PASSED] 0x64B0 (LUNARLAKE)
[22:19:33] [PASSED] 0xE202 (BATTLEMAGE)
[22:19:33] [PASSED] 0xE209 (BATTLEMAGE)
[22:19:33] [PASSED] 0xE20B (BATTLEMAGE)
[22:19:33] [PASSED] 0xE20C (BATTLEMAGE)
[22:19:33] [PASSED] 0xE20D (BATTLEMAGE)
[22:19:33] [PASSED] 0xE210 (BATTLEMAGE)
[22:19:33] [PASSED] 0xE211 (BATTLEMAGE)
[22:19:33] [PASSED] 0xE212 (BATTLEMAGE)
[22:19:33] [PASSED] 0xE216 (BATTLEMAGE)
[22:19:33] [PASSED] 0xE220 (BATTLEMAGE)
[22:19:33] [PASSED] 0xE221 (BATTLEMAGE)
[22:19:33] [PASSED] 0xE222 (BATTLEMAGE)
[22:19:33] [PASSED] 0xE223 (BATTLEMAGE)
[22:19:33] [PASSED] 0xB080 (PANTHERLAKE)
[22:19:33] [PASSED] 0xB081 (PANTHERLAKE)
[22:19:33] [PASSED] 0xB082 (PANTHERLAKE)
[22:19:33] [PASSED] 0xB083 (PANTHERLAKE)
[22:19:33] [PASSED] 0xB084 (PANTHERLAKE)
[22:19:33] [PASSED] 0xB085 (PANTHERLAKE)
[22:19:33] [PASSED] 0xB086 (PANTHERLAKE)
[22:19:33] [PASSED] 0xB087 (PANTHERLAKE)
[22:19:33] [PASSED] 0xB08F (PANTHERLAKE)
[22:19:33] [PASSED] 0xB090 (PANTHERLAKE)
[22:19:33] [PASSED] 0xB0A0 (PANTHERLAKE)
[22:19:33] [PASSED] 0xB0B0 (PANTHERLAKE)
[22:19:33] [PASSED] 0xFD80 (PANTHERLAKE)
[22:19:33] [PASSED] 0xFD81 (PANTHERLAKE)
[22:19:33] [PASSED] 0xD740 (NOVALAKE_S)
[22:19:33] [PASSED] 0xD741 (NOVALAKE_S)
[22:19:33] [PASSED] 0xD742 (NOVALAKE_S)
[22:19:33] [PASSED] 0xD743 (NOVALAKE_S)
[22:19:33] [PASSED] 0xD745 (NOVALAKE_S)
[22:19:33] [PASSED] 0xD74A (NOVALAKE_S)
[22:19:33] [PASSED] 0xD74B (NOVALAKE_S)
[22:19:33] [PASSED] 0x674C (CRESCENTISLAND)
[22:19:33] [PASSED] 0x674D (CRESCENTISLAND)
[22:19:33] [PASSED] 0x674E (CRESCENTISLAND)
[22:19:33] [PASSED] 0x674F (CRESCENTISLAND)
[22:19:33] [PASSED] 0x6750 (CRESCENTISLAND)
[22:19:33] [PASSED] 0xD750 (NOVALAKE_P)
[22:19:33] [PASSED] 0xD751 (NOVALAKE_P)
[22:19:33] [PASSED] 0xD752 (NOVALAKE_P)
[22:19:33] [PASSED] 0xD753 (NOVALAKE_P)
[22:19:33] [PASSED] 0xD754 (NOVALAKE_P)
[22:19:33] [PASSED] 0xD755 (NOVALAKE_P)
[22:19:33] [PASSED] 0xD756 (NOVALAKE_P)
[22:19:33] [PASSED] 0xD757 (NOVALAKE_P)
[22:19:33] [PASSED] 0xD75F (NOVALAKE_P)
[22:19:33] =============== [PASSED] check_platform_desc ===============
[22:19:33] ===================== [PASSED] xe_pci ======================
[22:19:33] ============= xe_rtp_tables_test (5 subtests) ==============
[22:19:33] ================== xe_rtp_table_gt_test ===================
[22:19:33] [PASSED] gt_was/14011060649
[22:19:33] [PASSED] gt_was/14011059788
[22:19:33] [PASSED] gt_was/14015795083
[22:19:33] [PASSED] gt_was/16021867713
[22:19:33] [PASSED] gt_was/14019449301
[22:19:33] [PASSED] gt_was/16028005424
[22:19:33] [PASSED] gt_was/14026578760
[22:19:33] [PASSED] gt_was/1409420604
[22:19:33] [PASSED] gt_was/1408615072
[22:19:33] [PASSED] gt_was/22010523718
[22:19:33] [PASSED] gt_was/14011006942
[22:19:33] [PASSED] gt_was/14014830051
[22:19:33] [PASSED] gt_was/18018781329
[22:19:33] [PASSED] gt_was/1509235366
[22:19:33] [PASSED] gt_was/18018781329
[22:19:33] [PASSED] gt_was/16016694945
[22:19:33] [PASSED] gt_was/14018575942
[22:19:33] [PASSED] gt_was/22016670082
[22:19:33] [PASSED] gt_was/22016670082
[22:19:33] [PASSED] gt_was/14017421178
[22:19:33] [PASSED] gt_was/16025250150
[22:19:33] [PASSED] gt_was/14021871409
[22:19:33] [PASSED] gt_was/16021865536
[22:19:33] [PASSED] gt_was/14021486841
[22:19:33] [PASSED] gt_was/14025160223
[22:19:33] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[22:19:33] [PASSED] gt_was/14025635424
[22:19:33] [PASSED] gt_was/16028005424
[22:19:33] ============== [PASSED] xe_rtp_table_gt_test ===============
[22:19:33] ================== xe_rtp_table_gt_test ===================
[22:19:33] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[22:19:33] [PASSED] gt_tunings/Tuning: 32B Access Enable
[22:19:33] [PASSED] gt_tunings/Tuning: L3 cache
[22:19:33] [PASSED] gt_tunings/Tuning: L3 cache - media
[22:19:33] [PASSED] gt_tunings/Tuning: Compression Overfetch
[22:19:33] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[22:19:33] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[22:19:33] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[22:19:33] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[22:19:33] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[22:19:33] [PASSED] gt_tunings/Tuning: Stateless compression control
[22:19:33] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[22:19:33] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[22:19:33] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[22:19:33] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[22:19:33] ============== [PASSED] xe_rtp_table_gt_test ===============
[22:19:33] ================== xe_rtp_table_oob_test ==================
[22:19:33] [PASSED] oob_was/1607983814
[22:19:33] [PASSED] oob_was/16010904313
[22:19:33] [PASSED] oob_was/18022495364
[22:19:33] [PASSED] oob_was/22012773006
[22:19:33] [PASSED] oob_was/14014475959
[22:19:33] [PASSED] oob_was/22011391025
[22:19:33] [PASSED] oob_was/22012727170
[22:19:33] [PASSED] oob_was/22012727685
[22:19:33] [PASSED] oob_was/22016596838
[22:19:33] [PASSED] oob_was/18020744125
[22:19:33] [PASSED] oob_was/1409600907
[22:19:33] [PASSED] oob_was/22014953428
[22:19:33] [PASSED] oob_was/16017236439
[22:19:33] [PASSED] oob_was/14019821291
[22:19:33] [PASSED] oob_was/14015076503
[22:19:33] [PASSED] oob_was/14018913170
[22:19:33] [PASSED] oob_was/14018094691
[22:19:33] [PASSED] oob_was/18024947630
[22:19:33] [PASSED] oob_was/16022287689
[22:19:33] [PASSED] oob_was/13011645652
[22:19:33] [PASSED] oob_was/14022293748
[22:19:33] [PASSED] oob_was/22019794406
[22:19:33] [PASSED] oob_was/22019338487
[22:19:33] [PASSED] oob_was/16023588340
[22:19:33] [PASSED] oob_was/14019789679
[22:19:33] [PASSED] oob_was/14022866841
[22:19:33] [PASSED] oob_was/16021333562
[22:19:33] [PASSED] oob_was/14016712196
[22:19:33] [PASSED] oob_was/14015568240
[22:19:33] [PASSED] oob_was/18013179988
[22:19:33] [PASSED] oob_was/1508761755
[22:19:33] [PASSED] oob_was/16023105232
[22:19:33] [PASSED] oob_was/16026508708
[22:19:33] [PASSED] oob_was/14020001231
[22:19:33] [PASSED] oob_was/16023683509
[22:19:33] [PASSED] oob_was/14025515070
[22:19:33] [PASSED] oob_was/15015404425_disable
[22:19:33] [PASSED] oob_was/16026007364
[22:19:33] [PASSED] oob_was/14020316580
[22:19:33] [PASSED] oob_was/14025883347
[22:19:33] [PASSED] oob_was/16029380221
[22:19:33] [PASSED] oob_was/22022079272
[22:19:33] [PASSED] oob_was/16029897822
[22:19:33] ============== [PASSED] xe_rtp_table_oob_test ==============
[22:19:33] ================ xe_rtp_table_dev_oob_test ================
[22:19:33] [PASSED] device_oob_was/22010954014
[22:19:33] [PASSED] device_oob_was/15015404425
[22:19:33] [PASSED] device_oob_was/22019338487_display
[22:19:33] [PASSED] device_oob_was/14022085890
[22:19:33] [PASSED] device_oob_was/14026539277
[22:19:33] [PASSED] device_oob_was/14026633728
[22:19:33] [PASSED] device_oob_was/14026746987
[22:19:33] [PASSED] device_oob_was/14026779378
[22:19:33] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[22:19:33] ========== xe_rtp_table_missing_upper_bound_test ==========
[22:19:33] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[22:19:33] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[22:19:33] [PASSED] register_whitelist/1806527549
[22:19:33] [PASSED] register_whitelist/allow_read_ctx_timestamp
[22:19:33] [PASSED] register_whitelist/allow_read_queue_timestamp
[22:19:33] [PASSED] register_whitelist/16014440446
[22:19:33] [PASSED] register_whitelist/16017236439
[22:19:33] [PASSED] register_whitelist/16020183090
[22:19:33] [PASSED] register_whitelist/14024997852
[22:19:33] [PASSED] register_whitelist/14024997852
[22:19:33] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[22:19:33] =============== [PASSED] xe_rtp_tables_test ================
[22:19:33] =================== xe_rtp (3 subtests) ====================
[22:19:33] =================== xe_rtp_rules_tests ====================
[22:19:33] [PASSED] no
[22:19:33] [PASSED] yes
[22:19:33] [PASSED] no-and-no
[22:19:33] [PASSED] no-and-yes
[22:19:33] [PASSED] yes-and-no
[22:19:33] [PASSED] yes-and-yes
[22:19:33] [PASSED] no-or-no
[22:19:33] [PASSED] no-or-yes
[22:19:33] [PASSED] yes-or-no
[22:19:33] [PASSED] yes-or-yes
[22:19:33] [PASSED] no-yes-or-yes-no
[22:19:33] [PASSED] no-yes-or-yes-yes
[22:19:33] [PASSED] yes-yes-or-no-yes
[22:19:33] [PASSED] yes-yes-or-yes-yes
[22:19:33] [PASSED] no-no-or-yes-or-no
[22:19:33] [PASSED] or
[22:19:33] [PASSED] or-yes
[22:19:33] [PASSED] or-no
[22:19:33] [PASSED] yes-or
[22:19:33] [PASSED] no-or
[22:19:33] [PASSED] no-or-or-yes
[22:19:33] [PASSED] yes-or-or-no
[22:19:33] [PASSED] no-or-or-no
[22:19:33] [PASSED] missing-context-engine-class
[22:19:33] [PASSED] missing-context-engine-class-or-yes
[22:19:33] [PASSED] missing-context-engine-class-or-or-yes
[22:19:33] =============== [PASSED] xe_rtp_rules_tests ================
[22:19:33] =============== xe_rtp_process_to_sr_tests ================
[22:19:33] [PASSED] coalesce-same-reg
[22:19:33] [PASSED] coalesce-same-reg-literal-and-func
[22:19:33] [PASSED] no-match-no-add
[22:19:33] [PASSED] two-regs-two-entries
[22:19:33] [PASSED] clr-one-set-other
[22:19:33] [PASSED] set-field
[22:19:33] [PASSED] conflict-duplicate
[22:19:33] [PASSED] conflict-not-disjoint
[22:19:33] [PASSED] conflict-not-disjoint-literal-and-func
[22:19:33] [PASSED] conflict-reg-type
[22:19:33] [PASSED] bad-mcr-reg-forced-to-regular
[22:19:33] [PASSED] bad-regular-reg-forced-to-mcr
[22:19:33] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[22:19:33] ================== xe_rtp_process_tests ===================
[22:19:33] [PASSED] active1
[22:19:33] [PASSED] active2
[22:19:33] [PASSED] active-inactive
[22:19:33] [PASSED] inactive-active
[22:19:33] [PASSED] inactive-active-inactive
[22:19:33] [PASSED] inactive-inactive-inactive
[22:19:33] ============== [PASSED] xe_rtp_process_tests ===============
[22:19:33] ===================== [PASSED] xe_rtp ======================
[22:19:33] ==================== xe_wa (1 subtest) =====================
[22:19:33] ======================== xe_wa_gt =========================
[22:19:33] [PASSED] TIGERLAKE B0
[22:19:33] [PASSED] DG1 A0
[22:19:33] [PASSED] DG1 B0
[22:19:33] [PASSED] ALDERLAKE_S A0
[22:19:33] [PASSED] ALDERLAKE_S B0
[22:19:33] [PASSED] ALDERLAKE_S C0
[22:19:33] [PASSED] ALDERLAKE_S D0
[22:19:33] [PASSED] ALDERLAKE_P A0
[22:19:33] [PASSED] ALDERLAKE_P B0
[22:19:33] [PASSED] ALDERLAKE_P C0
[22:19:33] [PASSED] ALDERLAKE_S RPLS D0
[22:19:33] [PASSED] ALDERLAKE_P RPLU E0
[22:19:33] [PASSED] DG2 G10 C0
[22:19:33] [PASSED] DG2 G11 B1
[22:19:33] [PASSED] DG2 G12 A1
[22:19:33] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:19:33] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:19:33] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[22:19:33] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[22:19:33] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[22:19:33] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[22:19:33] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[22:19:33] ==================== [PASSED] xe_wa_gt =====================
[22:19:33] ====================== [PASSED] xe_wa ======================
[22:19:33] ============================================================
[22:19:33] Testing complete. Ran 741 tests: passed: 723, skipped: 18
[22:19:33] Elapsed time: 36.574s total, 4.315s configuring, 31.588s building, 0.645s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[22:19:34] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:19:35] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:20:00] Starting KUnit Kernel (1/1)...
[22:20:00] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:20:00] ============ drm_test_pick_cmdline (2 subtests) ============
[22:20:00] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[22:20:00] =============== drm_test_pick_cmdline_named ===============
[22:20:00] [PASSED] NTSC
[22:20:00] [PASSED] NTSC-J
[22:20:00] [PASSED] PAL
[22:20:00] [PASSED] PAL-M
[22:20:00] =========== [PASSED] drm_test_pick_cmdline_named ===========
[22:20:00] ============== [PASSED] drm_test_pick_cmdline ==============
[22:20:00] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[22:20:00] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[22:20:00] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[22:20:00] =========== drm_validate_clone_mode (2 subtests) ===========
[22:20:00] ============== drm_test_check_in_clone_mode ===============
[22:20:00] [PASSED] in_clone_mode
[22:20:00] [PASSED] not_in_clone_mode
[22:20:00] ========== [PASSED] drm_test_check_in_clone_mode ===========
[22:20:00] =============== drm_test_check_valid_clones ===============
[22:20:00] [PASSED] not_in_clone_mode
[22:20:00] [PASSED] valid_clone
[22:20:00] [PASSED] invalid_clone
[22:20:00] =========== [PASSED] drm_test_check_valid_clones ===========
[22:20:00] ============= [PASSED] drm_validate_clone_mode =============
[22:20:00] ============= drm_validate_modeset (1 subtest) =============
[22:20:00] [PASSED] drm_test_check_connector_changed_modeset
[22:20:00] ============== [PASSED] drm_validate_modeset ===============
[22:20:00] ====== drm_test_bridge_get_current_state (1 subtest) =======
[22:20:00] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[22:20:00] ======== [PASSED] drm_test_bridge_get_current_state ========
[22:20:00] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[22:20:00] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[22:20:00] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[22:20:00] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[22:20:00] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[22:20:00] ============== drm_bridge_alloc (2 subtests) ===============
[22:20:00] [PASSED] drm_test_drm_bridge_alloc_basic
[22:20:00] [PASSED] drm_test_drm_bridge_alloc_get_put
[22:20:00] ================ [PASSED] drm_bridge_alloc =================
[22:20:00] ============= drm_bridge_bus_fmt (5 subtests) ==============
[22:20:00] [PASSED] drm_test_bridge_rgb_yuv_rgb
[22:20:00] [PASSED] drm_test_bridge_must_convert_to_yuv444
[22:20:00] [PASSED] drm_test_bridge_hdmi_auto_rgb
[22:20:00] [PASSED] drm_test_bridge_auto_first
[22:20:00] [PASSED] drm_test_bridge_rgb_yuv_no_path
[22:20:00] =============== [PASSED] drm_bridge_bus_fmt ================
[22:20:00] ============= drm_cmdline_parser (40 subtests) =============
[22:20:00] [PASSED] drm_test_cmdline_force_d_only
[22:20:00] [PASSED] drm_test_cmdline_force_D_only_dvi
[22:20:00] [PASSED] drm_test_cmdline_force_D_only_hdmi
[22:20:00] [PASSED] drm_test_cmdline_force_D_only_not_digital
[22:20:00] [PASSED] drm_test_cmdline_force_e_only
[22:20:00] [PASSED] drm_test_cmdline_res
[22:20:00] [PASSED] drm_test_cmdline_res_vesa
[22:20:00] [PASSED] drm_test_cmdline_res_vesa_rblank
[22:20:00] [PASSED] drm_test_cmdline_res_rblank
[22:20:00] [PASSED] drm_test_cmdline_res_bpp
[22:20:00] [PASSED] drm_test_cmdline_res_refresh
[22:20:00] [PASSED] drm_test_cmdline_res_bpp_refresh
[22:20:00] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[22:20:00] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[22:20:00] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[22:20:00] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[22:20:00] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[22:20:00] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[22:20:00] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[22:20:00] [PASSED] drm_test_cmdline_res_margins_force_on
[22:20:00] [PASSED] drm_test_cmdline_res_vesa_margins
[22:20:00] [PASSED] drm_test_cmdline_name
[22:20:00] [PASSED] drm_test_cmdline_name_bpp
[22:20:00] [PASSED] drm_test_cmdline_name_option
[22:20:00] [PASSED] drm_test_cmdline_name_bpp_option
[22:20:00] [PASSED] drm_test_cmdline_rotate_0
[22:20:00] [PASSED] drm_test_cmdline_rotate_90
[22:20:00] [PASSED] drm_test_cmdline_rotate_180
[22:20:00] [PASSED] drm_test_cmdline_rotate_270
[22:20:00] [PASSED] drm_test_cmdline_hmirror
[22:20:00] [PASSED] drm_test_cmdline_vmirror
[22:20:00] [PASSED] drm_test_cmdline_margin_options
[22:20:00] [PASSED] drm_test_cmdline_multiple_options
[22:20:00] [PASSED] drm_test_cmdline_bpp_extra_and_option
[22:20:00] [PASSED] drm_test_cmdline_extra_and_option
[22:20:00] [PASSED] drm_test_cmdline_freestanding_options
[22:20:00] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[22:20:00] [PASSED] drm_test_cmdline_panel_orientation
[22:20:00] ================ drm_test_cmdline_invalid =================
[22:20:00] [PASSED] margin_only
[22:20:00] [PASSED] interlace_only
[22:20:00] [PASSED] res_missing_x
[22:20:00] [PASSED] res_missing_y
[22:20:00] [PASSED] res_bad_y
[22:20:00] [PASSED] res_missing_y_bpp
[22:20:00] [PASSED] res_bad_bpp
[22:20:00] [PASSED] res_bad_refresh
[22:20:00] [PASSED] res_bpp_refresh_force_on_off
[22:20:00] [PASSED] res_invalid_mode
[22:20:00] [PASSED] res_bpp_wrong_place_mode
[22:20:00] [PASSED] name_bpp_refresh
[22:20:00] [PASSED] name_refresh
[22:20:00] [PASSED] name_refresh_wrong_mode
[22:20:00] [PASSED] name_refresh_invalid_mode
[22:20:00] [PASSED] rotate_multiple
[22:20:00] [PASSED] rotate_invalid_val
[22:20:00] [PASSED] rotate_truncated
[22:20:00] [PASSED] invalid_option
[22:20:00] [PASSED] invalid_tv_option
[22:20:00] [PASSED] truncated_tv_option
[22:20:00] ============ [PASSED] drm_test_cmdline_invalid =============
[22:20:00] =============== drm_test_cmdline_tv_options ===============
[22:20:00] [PASSED] NTSC
[22:20:00] [PASSED] NTSC_443
[22:20:00] [PASSED] NTSC_J
[22:20:00] [PASSED] PAL
[22:20:00] [PASSED] PAL_M
[22:20:00] [PASSED] PAL_N
[22:20:00] [PASSED] SECAM
[22:20:00] [PASSED] MONO_525
[22:20:00] [PASSED] MONO_625
[22:20:00] =========== [PASSED] drm_test_cmdline_tv_options ===========
[22:20:00] =============== [PASSED] drm_cmdline_parser ================
[22:20:00] ========== drmm_connector_hdmi_init (20 subtests) ==========
[22:20:00] [PASSED] drm_test_connector_hdmi_init_valid
[22:20:00] [PASSED] drm_test_connector_hdmi_init_bpc_8
[22:20:00] [PASSED] drm_test_connector_hdmi_init_bpc_10
[22:20:00] [PASSED] drm_test_connector_hdmi_init_bpc_12
[22:20:00] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[22:20:00] [PASSED] drm_test_connector_hdmi_init_bpc_null
[22:20:00] [PASSED] drm_test_connector_hdmi_init_formats_empty
[22:20:00] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[22:20:00] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[22:20:00] [PASSED] supported_formats=0x9 yuv420_allowed=1
[22:20:00] [PASSED] supported_formats=0x9 yuv420_allowed=0
[22:20:00] [PASSED] supported_formats=0x5 yuv420_allowed=1
[22:20:00] [PASSED] supported_formats=0x5 yuv420_allowed=0
[22:20:00] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[22:20:00] [PASSED] drm_test_connector_hdmi_init_null_ddc
[22:20:00] [PASSED] drm_test_connector_hdmi_init_null_product
[22:20:00] [PASSED] drm_test_connector_hdmi_init_null_vendor
[22:20:00] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[22:20:00] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[22:20:00] [PASSED] drm_test_connector_hdmi_init_product_valid
[22:20:00] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[22:20:00] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[22:20:00] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[22:20:00] ========= drm_test_connector_hdmi_init_type_valid =========
[22:20:00] [PASSED] HDMI-A
[22:20:00] [PASSED] HDMI-B
[22:20:00] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[22:20:00] ======== drm_test_connector_hdmi_init_type_invalid ========
[22:20:00] [PASSED] Unknown
[22:20:00] [PASSED] VGA
[22:20:00] [PASSED] DVI-I
[22:20:00] [PASSED] DVI-D
[22:20:00] [PASSED] DVI-A
[22:20:00] [PASSED] Composite
[22:20:00] [PASSED] SVIDEO
[22:20:00] [PASSED] LVDS
[22:20:00] [PASSED] Component
[22:20:00] [PASSED] DIN
[22:20:00] [PASSED] DP
[22:20:00] [PASSED] TV
[22:20:00] [PASSED] eDP
[22:20:00] [PASSED] Virtual
[22:20:00] [PASSED] DSI
[22:20:00] [PASSED] DPI
[22:20:00] [PASSED] Writeback
[22:20:00] [PASSED] SPI
[22:20:00] [PASSED] USB
[22:20:00] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[22:20:00] ============ [PASSED] drmm_connector_hdmi_init =============
[22:20:00] ============= drmm_connector_init (3 subtests) =============
[22:20:00] [PASSED] drm_test_drmm_connector_init
[22:20:00] [PASSED] drm_test_drmm_connector_init_null_ddc
[22:20:00] ========= drm_test_drmm_connector_init_type_valid =========
[22:20:00] [PASSED] Unknown
[22:20:00] [PASSED] VGA
[22:20:00] [PASSED] DVI-I
[22:20:00] [PASSED] DVI-D
[22:20:00] [PASSED] DVI-A
[22:20:00] [PASSED] Composite
[22:20:00] [PASSED] SVIDEO
[22:20:00] [PASSED] LVDS
[22:20:00] [PASSED] Component
[22:20:00] [PASSED] DIN
[22:20:00] [PASSED] DP
[22:20:00] [PASSED] HDMI-A
[22:20:00] [PASSED] HDMI-B
[22:20:00] [PASSED] TV
[22:20:00] [PASSED] eDP
[22:20:00] [PASSED] Virtual
[22:20:00] [PASSED] DSI
[22:20:00] [PASSED] DPI
[22:20:00] [PASSED] Writeback
[22:20:00] [PASSED] SPI
[22:20:00] [PASSED] USB
[22:20:00] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[22:20:00] =============== [PASSED] drmm_connector_init ===============
[22:20:00] ========= drm_connector_dynamic_init (6 subtests) ==========
[22:20:00] [PASSED] drm_test_drm_connector_dynamic_init
[22:20:00] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[22:20:00] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[22:20:00] [PASSED] drm_test_drm_connector_dynamic_init_properties
[22:20:00] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[22:20:00] [PASSED] Unknown
[22:20:00] [PASSED] VGA
[22:20:00] [PASSED] DVI-I
[22:20:00] [PASSED] DVI-D
[22:20:00] [PASSED] DVI-A
[22:20:00] [PASSED] Composite
[22:20:00] [PASSED] SVIDEO
[22:20:00] [PASSED] LVDS
[22:20:00] [PASSED] Component
[22:20:00] [PASSED] DIN
[22:20:00] [PASSED] DP
[22:20:00] [PASSED] HDMI-A
[22:20:00] [PASSED] HDMI-B
[22:20:00] [PASSED] TV
[22:20:00] [PASSED] eDP
[22:20:00] [PASSED] Virtual
[22:20:00] [PASSED] DSI
[22:20:00] [PASSED] DPI
[22:20:00] [PASSED] Writeback
[22:20:00] [PASSED] SPI
[22:20:00] [PASSED] USB
[22:20:00] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[22:20:00] ======== drm_test_drm_connector_dynamic_init_name =========
[22:20:00] [PASSED] Unknown
[22:20:00] [PASSED] VGA
[22:20:00] [PASSED] DVI-I
[22:20:00] [PASSED] DVI-D
[22:20:00] [PASSED] DVI-A
[22:20:00] [PASSED] Composite
[22:20:00] [PASSED] SVIDEO
[22:20:00] [PASSED] LVDS
[22:20:00] [PASSED] Component
[22:20:00] [PASSED] DIN
[22:20:00] [PASSED] DP
[22:20:00] [PASSED] HDMI-A
[22:20:00] [PASSED] HDMI-B
[22:20:00] [PASSED] TV
[22:20:00] [PASSED] eDP
[22:20:00] [PASSED] Virtual
[22:20:00] [PASSED] DSI
[22:20:00] [PASSED] DPI
[22:20:00] [PASSED] Writeback
[22:20:00] [PASSED] SPI
[22:20:00] [PASSED] USB
[22:20:00] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[22:20:00] =========== [PASSED] drm_connector_dynamic_init ============
[22:20:00] ==== drm_connector_dynamic_register_early (4 subtests) =====
[22:20:00] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[22:20:00] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[22:20:00] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[22:20:00] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[22:20:00] ====== [PASSED] drm_connector_dynamic_register_early =======
[22:20:00] ======= drm_connector_dynamic_register (7 subtests) ========
[22:20:00] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[22:20:00] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[22:20:00] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[22:20:00] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[22:20:00] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[22:20:00] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[22:20:00] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[22:20:00] ========= [PASSED] drm_connector_dynamic_register ==========
[22:20:00] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[22:20:00] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[22:20:00] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[22:20:00] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[22:20:00] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[22:20:00] ========== drm_test_get_tv_mode_from_name_valid ===========
[22:20:00] [PASSED] NTSC
[22:20:00] [PASSED] NTSC-443
[22:20:00] [PASSED] NTSC-J
[22:20:00] [PASSED] PAL
[22:20:00] [PASSED] PAL-M
[22:20:00] [PASSED] PAL-N
[22:20:00] [PASSED] SECAM
[22:20:00] [PASSED] Mono
[22:20:00] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[22:20:00] [PASSED] drm_test_get_tv_mode_from_name_truncated
[22:20:00] ============ [PASSED] drm_get_tv_mode_from_name ============
[22:20:00] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[22:20:00] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[22:20:00] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[22:20:00] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[22:20:00] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[22:20:00] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[22:20:00] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[22:20:00] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[22:20:00] [PASSED] VIC 96
[22:20:00] [PASSED] VIC 97
[22:20:00] [PASSED] VIC 101
[22:20:00] [PASSED] VIC 102
[22:20:00] [PASSED] VIC 106
[22:20:00] [PASSED] VIC 107
[22:20:00] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[22:20:00] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[22:20:00] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[22:20:00] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[22:20:00] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[22:20:00] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[22:20:00] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[22:20:00] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[22:20:00] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[22:20:00] [PASSED] Automatic
[22:20:00] [PASSED] Full
[22:20:00] [PASSED] Limited 16:235
[22:20:00] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[22:20:00] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[22:20:00] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[22:20:00] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[22:20:00] === drm_test_drm_hdmi_connector_get_output_format_name ====
[22:20:00] [PASSED] RGB
[22:20:00] [PASSED] YUV 4:2:0
[22:20:00] [PASSED] YUV 4:2:2
[22:20:00] [PASSED] YUV 4:4:4
[22:20:00] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[22:20:00] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[22:20:00] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[22:20:00] ============= drm_damage_helper (21 subtests) ==============
[22:20:00] [PASSED] drm_test_damage_iter_no_damage
[22:20:00] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[22:20:00] [PASSED] drm_test_damage_iter_no_damage_src_moved
[22:20:00] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[22:20:00] [PASSED] drm_test_damage_iter_no_damage_not_visible
[22:20:00] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[22:20:00] [PASSED] drm_test_damage_iter_no_damage_no_fb
[22:20:00] [PASSED] drm_test_damage_iter_simple_damage
[22:20:00] [PASSED] drm_test_damage_iter_single_damage
[22:20:00] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[22:20:00] [PASSED] drm_test_damage_iter_single_damage_outside_src
[22:20:00] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[22:20:00] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[22:20:00] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[22:20:00] [PASSED] drm_test_damage_iter_single_damage_src_moved
[22:20:00] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[22:20:00] [PASSED] drm_test_damage_iter_damage
[22:20:00] [PASSED] drm_test_damage_iter_damage_one_intersect
[22:20:00] [PASSED] drm_test_damage_iter_damage_one_outside
[22:20:00] [PASSED] drm_test_damage_iter_damage_src_moved
[22:20:00] [PASSED] drm_test_damage_iter_damage_not_visible
[22:20:00] ================ [PASSED] drm_damage_helper ================
[22:20:00] ============== drm_dp_mst_helper (3 subtests) ==============
[22:20:00] ============== drm_test_dp_mst_calc_pbn_mode ==============
[22:20:00] [PASSED] Clock 154000 BPP 30 DSC disabled
[22:20:00] [PASSED] Clock 234000 BPP 30 DSC disabled
[22:20:00] [PASSED] Clock 297000 BPP 24 DSC disabled
[22:20:00] [PASSED] Clock 332880 BPP 24 DSC enabled
[22:20:00] [PASSED] Clock 324540 BPP 24 DSC enabled
[22:20:00] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[22:20:00] ============== drm_test_dp_mst_calc_pbn_div ===============
[22:20:00] [PASSED] Link rate 2000000 lane count 4
[22:20:00] [PASSED] Link rate 2000000 lane count 2
[22:20:00] [PASSED] Link rate 2000000 lane count 1
[22:20:00] [PASSED] Link rate 1350000 lane count 4
[22:20:00] [PASSED] Link rate 1350000 lane count 2
[22:20:00] [PASSED] Link rate 1350000 lane count 1
[22:20:00] [PASSED] Link rate 1000000 lane count 4
[22:20:00] [PASSED] Link rate 1000000 lane count 2
[22:20:00] [PASSED] Link rate 1000000 lane count 1
[22:20:00] [PASSED] Link rate 810000 lane count 4
[22:20:00] [PASSED] Link rate 810000 lane count 2
[22:20:00] [PASSED] Link rate 810000 lane count 1
[22:20:00] [PASSED] Link rate 540000 lane count 4
[22:20:00] [PASSED] Link rate 540000 lane count 2
[22:20:00] [PASSED] Link rate 540000 lane count 1
[22:20:00] [PASSED] Link rate 270000 lane count 4
[22:20:00] [PASSED] Link rate 270000 lane count 2
[22:20:00] [PASSED] Link rate 270000 lane count 1
[22:20:00] [PASSED] Link rate 162000 lane count 4
[22:20:00] [PASSED] Link rate 162000 lane count 2
[22:20:00] [PASSED] Link rate 162000 lane count 1
[22:20:00] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[22:20:00] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[22:20:00] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[22:20:00] [PASSED] DP_POWER_UP_PHY with port number
[22:20:00] [PASSED] DP_POWER_DOWN_PHY with port number
[22:20:00] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[22:20:00] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[22:20:00] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[22:20:00] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[22:20:00] [PASSED] DP_QUERY_PAYLOAD with port number
[22:20:00] [PASSED] DP_QUERY_PAYLOAD with VCPI
[22:20:00] [PASSED] DP_REMOTE_DPCD_READ with port number
[22:20:00] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[22:20:00] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[22:20:00] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[22:20:00] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[22:20:00] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[22:20:00] [PASSED] DP_REMOTE_I2C_READ with port number
[22:20:00] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[22:20:00] [PASSED] DP_REMOTE_I2C_READ with transactions array
[22:20:00] [PASSED] DP_REMOTE_I2C_WRITE with port number
[22:20:00] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[22:20:00] [PASSED] DP_REMOTE_I2C_WRITE with data array
[22:20:00] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[22:20:00] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[22:20:00] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[22:20:00] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[22:20:00] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[22:20:00] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[22:20:00] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[22:20:00] ================ [PASSED] drm_dp_mst_helper ================
[22:20:00] ================== drm_exec (7 subtests) ===================
[22:20:00] [PASSED] sanitycheck
[22:20:00] [PASSED] test_lock
[22:20:00] [PASSED] test_lock_unlock
[22:20:00] [PASSED] test_duplicates
[22:20:00] [PASSED] test_prepare
[22:20:00] [PASSED] test_prepare_array
[22:20:00] [PASSED] test_multiple_loops
[22:20:00] ==================== [PASSED] drm_exec =====================
[22:20:00] =========== drm_format_helper_test (17 subtests) ===========
[22:20:00] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[22:20:00] [PASSED] single_pixel_source_buffer
[22:20:00] [PASSED] single_pixel_clip_rectangle
[22:20:00] [PASSED] well_known_colors
[22:20:00] [PASSED] destination_pitch
[22:20:00] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[22:20:00] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[22:20:00] [PASSED] single_pixel_source_buffer
[22:20:00] [PASSED] single_pixel_clip_rectangle
[22:20:00] [PASSED] well_known_colors
[22:20:00] [PASSED] destination_pitch
[22:20:00] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[22:20:00] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[22:20:00] [PASSED] single_pixel_source_buffer
[22:20:00] [PASSED] single_pixel_clip_rectangle
[22:20:00] [PASSED] well_known_colors
[22:20:00] [PASSED] destination_pitch
[22:20:00] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[22:20:00] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[22:20:00] [PASSED] single_pixel_source_buffer
[22:20:00] [PASSED] single_pixel_clip_rectangle
[22:20:00] [PASSED] well_known_colors
[22:20:00] [PASSED] destination_pitch
[22:20:00] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[22:20:00] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[22:20:00] [PASSED] single_pixel_source_buffer
[22:20:00] [PASSED] single_pixel_clip_rectangle
[22:20:00] [PASSED] well_known_colors
[22:20:00] [PASSED] destination_pitch
[22:20:00] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[22:20:00] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[22:20:00] [PASSED] single_pixel_source_buffer
[22:20:00] [PASSED] single_pixel_clip_rectangle
[22:20:00] [PASSED] well_known_colors
[22:20:00] [PASSED] destination_pitch
[22:20:00] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[22:20:00] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[22:20:00] [PASSED] single_pixel_source_buffer
[22:20:00] [PASSED] single_pixel_clip_rectangle
[22:20:00] [PASSED] well_known_colors
[22:20:00] [PASSED] destination_pitch
[22:20:00] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[22:20:00] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[22:20:00] [PASSED] single_pixel_source_buffer
[22:20:00] [PASSED] single_pixel_clip_rectangle
[22:20:00] [PASSED] well_known_colors
[22:20:00] [PASSED] destination_pitch
[22:20:00] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[22:20:00] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[22:20:00] [PASSED] single_pixel_source_buffer
[22:20:00] [PASSED] single_pixel_clip_rectangle
[22:20:00] [PASSED] well_known_colors
[22:20:00] [PASSED] destination_pitch
[22:20:00] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[22:20:00] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[22:20:00] [PASSED] single_pixel_source_buffer
[22:20:00] [PASSED] single_pixel_clip_rectangle
[22:20:00] [PASSED] well_known_colors
[22:20:00] [PASSED] destination_pitch
[22:20:00] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[22:20:00] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[22:20:00] [PASSED] single_pixel_source_buffer
[22:20:00] [PASSED] single_pixel_clip_rectangle
[22:20:00] [PASSED] well_known_colors
[22:20:00] [PASSED] destination_pitch
[22:20:00] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[22:20:00] ============== drm_test_fb_xrgb8888_to_mono ===============
[22:20:00] [PASSED] single_pixel_source_buffer
[22:20:00] [PASSED] single_pixel_clip_rectangle
[22:20:00] [PASSED] well_known_colors
[22:20:00] [PASSED] destination_pitch
[22:20:00] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[22:20:00] ==================== drm_test_fb_swab =====================
[22:20:00] [PASSED] single_pixel_source_buffer
[22:20:00] [PASSED] single_pixel_clip_rectangle
[22:20:00] [PASSED] well_known_colors
[22:20:00] [PASSED] destination_pitch
[22:20:00] ================ [PASSED] drm_test_fb_swab =================
[22:20:00] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[22:20:00] [PASSED] single_pixel_source_buffer
[22:20:00] [PASSED] single_pixel_clip_rectangle
[22:20:00] [PASSED] well_known_colors
[22:20:00] [PASSED] destination_pitch
[22:20:00] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[22:20:00] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[22:20:00] [PASSED] single_pixel_source_buffer
[22:20:00] [PASSED] single_pixel_clip_rectangle
[22:20:00] [PASSED] well_known_colors
[22:20:00] [PASSED] destination_pitch
[22:20:00] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[22:20:00] ================= drm_test_fb_clip_offset =================
[22:20:00] [PASSED] pass through
[22:20:00] [PASSED] horizontal offset
[22:20:00] [PASSED] vertical offset
[22:20:00] [PASSED] horizontal and vertical offset
[22:20:00] [PASSED] horizontal offset (custom pitch)
[22:20:00] [PASSED] vertical offset (custom pitch)
[22:20:00] [PASSED] horizontal and vertical offset (custom pitch)
[22:20:00] ============= [PASSED] drm_test_fb_clip_offset =============
[22:20:00] =================== drm_test_fb_memcpy ====================
[22:20:00] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[22:20:00] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[22:20:00] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[22:20:00] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[22:20:00] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[22:20:00] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[22:20:00] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[22:20:00] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[22:20:00] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[22:20:00] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[22:20:00] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[22:20:00] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[22:20:00] =============== [PASSED] drm_test_fb_memcpy ================
[22:20:00] ============= [PASSED] drm_format_helper_test ==============
[22:20:00] ================= drm_format (18 subtests) =================
[22:20:00] [PASSED] drm_test_format_block_width_invalid
[22:20:00] [PASSED] drm_test_format_block_width_one_plane
[22:20:00] [PASSED] drm_test_format_block_width_two_plane
[22:20:00] [PASSED] drm_test_format_block_width_three_plane
[22:20:00] [PASSED] drm_test_format_block_width_tiled
[22:20:00] [PASSED] drm_test_format_block_height_invalid
[22:20:00] [PASSED] drm_test_format_block_height_one_plane
[22:20:00] [PASSED] drm_test_format_block_height_two_plane
[22:20:00] [PASSED] drm_test_format_block_height_three_plane
[22:20:00] [PASSED] drm_test_format_block_height_tiled
[22:20:00] [PASSED] drm_test_format_min_pitch_invalid
[22:20:00] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[22:20:00] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[22:20:00] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[22:20:00] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[22:20:00] [PASSED] drm_test_format_min_pitch_two_plane
[22:20:00] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[22:20:00] [PASSED] drm_test_format_min_pitch_tiled
[22:20:00] =================== [PASSED] drm_format ====================
[22:20:00] ============== drm_framebuffer (10 subtests) ===============
[22:20:00] ========== drm_test_framebuffer_check_src_coords ==========
[22:20:00] [PASSED] Success: source fits into fb
[22:20:00] [PASSED] Fail: overflowing fb with x-axis coordinate
[22:20:00] [PASSED] Fail: overflowing fb with y-axis coordinate
[22:20:00] [PASSED] Fail: overflowing fb with source width
[22:20:00] [PASSED] Fail: overflowing fb with source height
[22:20:00] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[22:20:00] [PASSED] drm_test_framebuffer_cleanup
[22:20:00] =============== drm_test_framebuffer_create ===============
[22:20:00] [PASSED] ABGR8888 normal sizes
[22:20:00] [PASSED] ABGR8888 max sizes
[22:20:00] [PASSED] ABGR8888 pitch greater than min required
[22:20:00] [PASSED] ABGR8888 pitch less than min required
[22:20:00] [PASSED] ABGR8888 Invalid width
[22:20:00] [PASSED] ABGR8888 Invalid buffer handle
[22:20:00] [PASSED] No pixel format
[22:20:00] [PASSED] ABGR8888 Width 0
[22:20:00] [PASSED] ABGR8888 Height 0
[22:20:00] [PASSED] ABGR8888 Out of bound height * pitch combination
[22:20:00] [PASSED] ABGR8888 Large buffer offset
[22:20:00] [PASSED] ABGR8888 Buffer offset for inexistent plane
[22:20:00] [PASSED] ABGR8888 Invalid flag
[22:20:00] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[22:20:00] [PASSED] ABGR8888 Valid buffer modifier
[22:20:00] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[22:20:00] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[22:20:00] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[22:20:00] [PASSED] NV12 Normal sizes
[22:20:00] [PASSED] NV12 Max sizes
[22:20:00] [PASSED] NV12 Invalid pitch
[22:20:00] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[22:20:00] [PASSED] NV12 different modifier per-plane
[22:20:00] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[22:20:00] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[22:20:00] [PASSED] NV12 Modifier for inexistent plane
[22:20:00] [PASSED] NV12 Handle for inexistent plane
[22:20:00] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[22:20:00] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[22:20:00] [PASSED] YVU420 Normal sizes
[22:20:00] [PASSED] YVU420 Max sizes
[22:20:00] [PASSED] YVU420 Invalid pitch
[22:20:00] [PASSED] YVU420 Different pitches
[22:20:00] [PASSED] YVU420 Different buffer offsets/pitches
[22:20:00] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[22:20:00] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[22:20:00] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[22:20:00] [PASSED] YVU420 Valid modifier
[22:20:00] [PASSED] YVU420 Different modifiers per plane
[22:20:00] [PASSED] YVU420 Modifier for inexistent plane
[22:20:00] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[22:20:00] [PASSED] X0L2 Normal sizes
[22:20:00] [PASSED] X0L2 Max sizes
[22:20:00] [PASSED] X0L2 Invalid pitch
[22:20:00] [PASSED] X0L2 Pitch greater than minimum required
[22:20:00] [PASSED] X0L2 Handle for inexistent plane
[22:20:00] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[22:20:00] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[22:20:00] [PASSED] X0L2 Valid modifier
[22:20:00] [PASSED] X0L2 Modifier for inexistent plane
[22:20:00] =========== [PASSED] drm_test_framebuffer_create ===========
[22:20:00] [PASSED] drm_test_framebuffer_free
[22:20:00] [PASSED] drm_test_framebuffer_init
[22:20:00] [PASSED] drm_test_framebuffer_init_bad_format
[22:20:00] [PASSED] drm_test_framebuffer_init_dev_mismatch
[22:20:00] [PASSED] drm_test_framebuffer_lookup
[22:20:00] [PASSED] drm_test_framebuffer_lookup_inexistent
[22:20:00] [PASSED] drm_test_framebuffer_modifiers_not_supported
[22:20:00] ================= [PASSED] drm_framebuffer =================
[22:20:00] ================ drm_gem_shmem (8 subtests) ================
[22:20:00] [PASSED] drm_gem_shmem_test_obj_create
[22:20:00] [PASSED] drm_gem_shmem_test_obj_create_private
[22:20:00] [PASSED] drm_gem_shmem_test_pin_pages
[22:20:00] [PASSED] drm_gem_shmem_test_vmap
[22:20:00] [PASSED] drm_gem_shmem_test_get_sg_table
[22:20:00] [PASSED] drm_gem_shmem_test_get_pages_sgt
[22:20:00] [PASSED] drm_gem_shmem_test_madvise
[22:20:00] [PASSED] drm_gem_shmem_test_purge
[22:20:00] ================== [PASSED] drm_gem_shmem ==================
[22:20:00] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[22:20:00] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[22:20:00] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[22:20:00] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[22:20:00] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[22:20:00] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[22:20:00] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[22:20:00] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[22:20:00] [PASSED] Automatic
[22:20:00] [PASSED] Full
[22:20:00] [PASSED] Limited 16:235
[22:20:00] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[22:20:00] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[22:20:00] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[22:20:00] [PASSED] drm_test_check_disable_connector
[22:20:00] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[22:20:00] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[22:20:00] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[22:20:00] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[22:20:00] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[22:20:00] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[22:20:00] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[22:20:00] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[22:20:00] [PASSED] drm_test_check_output_bpc_dvi
[22:20:00] [PASSED] drm_test_check_output_bpc_format_vic_1
[22:20:00] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[22:20:00] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[22:20:00] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[22:20:00] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[22:20:00] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[22:20:00] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[22:20:00] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[22:20:00] ============ drm_test_check_hdmi_color_format =============
[22:20:00] [PASSED] AUTO -> RGB
[22:20:00] [PASSED] YCBCR422 -> YUV422
[22:20:00] [PASSED] YCBCR420 -> YUV420
[22:20:00] [PASSED] YCBCR444 -> YUV444
[22:20:00] [PASSED] RGB -> RGB
[22:20:00] ======== [PASSED] drm_test_check_hdmi_color_format =========
[22:20:00] ======== drm_test_check_hdmi_color_format_420_only ========
[22:20:00] [PASSED] RGB should fail
[22:20:00] [PASSED] YUV444 should fail
[22:20:00] [PASSED] YUV422 should fail
[22:20:00] [PASSED] YUV420 should work
[22:20:00] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[22:20:00] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[22:20:00] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[22:20:00] [PASSED] drm_test_check_broadcast_rgb_value
[22:20:00] [PASSED] drm_test_check_bpc_8_value
[22:20:00] [PASSED] drm_test_check_bpc_10_value
[22:20:00] [PASSED] drm_test_check_bpc_12_value
[22:20:00] [PASSED] drm_test_check_format_value
[22:20:00] [PASSED] drm_test_check_tmds_char_value
[22:20:00] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[22:20:00] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[22:20:00] [PASSED] drm_test_check_mode_valid
[22:20:00] [PASSED] drm_test_check_mode_valid_reject
[22:20:00] [PASSED] drm_test_check_mode_valid_reject_rate
[22:20:00] [PASSED] drm_test_check_mode_valid_reject_max_clock
[22:20:00] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[22:20:00] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[22:20:00] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[22:20:00] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[22:20:00] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[22:20:00] [PASSED] drm_test_check_infoframes
[22:20:00] [PASSED] drm_test_check_reject_avi_infoframe
[22:20:00] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[22:20:00] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[22:20:00] [PASSED] drm_test_check_reject_audio_infoframe
[22:20:00] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[22:20:00] ================= drm_managed (2 subtests) =================
[22:20:00] [PASSED] drm_test_managed_release_action
[22:20:00] [PASSED] drm_test_managed_run_action
[22:20:00] =================== [PASSED] drm_managed ===================
[22:20:00] =================== drm_mm (6 subtests) ====================
[22:20:00] [PASSED] drm_test_mm_init
[22:20:00] [PASSED] drm_test_mm_debug
[22:20:00] [PASSED] drm_test_mm_align32
[22:20:00] [PASSED] drm_test_mm_align64
[22:20:00] [PASSED] drm_test_mm_lowest
[22:20:00] [PASSED] drm_test_mm_highest
[22:20:00] ===================== [PASSED] drm_mm ======================
[22:20:00] ============= drm_modes_analog_tv (5 subtests) =============
[22:20:00] [PASSED] drm_test_modes_analog_tv_mono_576i
[22:20:00] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[22:20:00] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[22:20:00] [PASSED] drm_test_modes_analog_tv_pal_576i
[22:20:00] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[22:20:00] =============== [PASSED] drm_modes_analog_tv ===============
[22:20:00] ============== drm_plane_helper (2 subtests) ===============
[22:20:00] =============== drm_test_check_plane_state ================
[22:20:00] [PASSED] clipping_simple
[22:20:00] [PASSED] clipping_rotate_reflect
[22:20:00] [PASSED] positioning_simple
[22:20:00] [PASSED] upscaling
[22:20:00] [PASSED] downscaling
[22:20:00] [PASSED] rounding1
[22:20:00] [PASSED] rounding2
[22:20:00] [PASSED] rounding3
[22:20:00] [PASSED] rounding4
[22:20:00] =========== [PASSED] drm_test_check_plane_state ============
[22:20:00] =========== drm_test_check_invalid_plane_state ============
[22:20:00] [PASSED] positioning_invalid
[22:20:00] [PASSED] upscaling_invalid
[22:20:00] [PASSED] downscaling_invalid
[22:20:00] ======= [PASSED] drm_test_check_invalid_plane_state ========
[22:20:00] ================ [PASSED] drm_plane_helper =================
[22:20:00] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[22:20:00] ====== drm_test_connector_helper_tv_get_modes_check =======
[22:20:00] [PASSED] None
[22:20:00] [PASSED] PAL
[22:20:00] [PASSED] NTSC
[22:20:00] [PASSED] Both, NTSC Default
[22:20:00] [PASSED] Both, PAL Default
[22:20:00] [PASSED] Both, NTSC Default, with PAL on command-line
[22:20:00] [PASSED] Both, PAL Default, with NTSC on command-line
[22:20:00] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[22:20:00] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[22:20:00] ================== drm_rect (9 subtests) ===================
[22:20:00] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[22:20:00] [PASSED] drm_test_rect_clip_scaled_not_clipped
[22:20:00] [PASSED] drm_test_rect_clip_scaled_clipped
[22:20:00] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[22:20:00] ================= drm_test_rect_intersect =================
[22:20:00] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[22:20:00] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[22:20:00] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[22:20:00] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[22:20:00] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[22:20:00] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[22:20:00] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[22:20:00] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[22:20:00] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[22:20:00] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[22:20:00] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[22:20:00] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[22:20:00] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[22:20:00] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[22:20:00] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[22:20:00] ============= [PASSED] drm_test_rect_intersect =============
[22:20:00] ================ drm_test_rect_calc_hscale ================
[22:20:00] [PASSED] normal use
[22:20:00] [PASSED] out of max range
[22:20:00] [PASSED] out of min range
[22:20:00] [PASSED] zero dst
[22:20:00] [PASSED] negative src
[22:20:00] [PASSED] negative dst
[22:20:00] ============ [PASSED] drm_test_rect_calc_hscale ============
[22:20:00] ================ drm_test_rect_calc_vscale ================
[22:20:00] [PASSED] normal use
[22:20:00] [PASSED] out of max range
[22:20:00] [PASSED] out of min range
[22:20:00] [PASSED] zero dst
[22:20:00] [PASSED] negative src
[22:20:00] [PASSED] negative dst
[22:20:00] ============ [PASSED] drm_test_rect_calc_vscale ============
[22:20:00] ================== drm_test_rect_rotate ===================
[22:20:00] [PASSED] reflect-x
[22:20:00] [PASSED] reflect-y
[22:20:00] [PASSED] rotate-0
[22:20:00] [PASSED] rotate-90
[22:20:00] [PASSED] rotate-180
[22:20:00] [PASSED] rotate-270
[22:20:00] ============== [PASSED] drm_test_rect_rotate ===============
[22:20:00] ================ drm_test_rect_rotate_inv =================
[22:20:00] [PASSED] reflect-x
[22:20:00] [PASSED] reflect-y
[22:20:00] [PASSED] rotate-0
[22:20:00] [PASSED] rotate-90
[22:20:00] [PASSED] rotate-180
[22:20:00] [PASSED] rotate-270
[22:20:00] ============ [PASSED] drm_test_rect_rotate_inv =============
[22:20:00] ==================== [PASSED] drm_rect =====================
[22:20:00] ============ drm_sysfb_modeset_test (1 subtest) ============
[22:20:00] ============ drm_test_sysfb_build_fourcc_list =============
[22:20:00] [PASSED] no native formats
[22:20:00] [PASSED] XRGB8888 as native format
[22:20:00] [PASSED] remove duplicates
[22:20:00] [PASSED] convert alpha formats
[22:20:00] [PASSED] random formats
[22:20:00] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[22:20:00] ============= [PASSED] drm_sysfb_modeset_test ==============
[22:20:00] ================== drm_fixp (2 subtests) ===================
[22:20:00] [PASSED] drm_test_int2fixp
[22:20:00] [PASSED] drm_test_sm2fixp
[22:20:00] ==================== [PASSED] drm_fixp =====================
[22:20:00] ============================================================
[22:20:00] Testing complete. Ran 637 tests: passed: 637
[22:20:00] Elapsed time: 26.614s total, 1.825s configuring, 24.619s building, 0.151s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[22:20:00] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:20:02] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:20:12] Starting KUnit Kernel (1/1)...
[22:20:12] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:20:12] ================= ttm_device (5 subtests) ==================
[22:20:12] [PASSED] ttm_device_init_basic
[22:20:12] [PASSED] ttm_device_init_multiple
[22:20:12] [PASSED] ttm_device_fini_basic
[22:20:12] [PASSED] ttm_device_init_no_vma_man
[22:20:12] ================== ttm_device_init_pools ==================
[22:20:12] [PASSED] No DMA allocations, no DMA32 required
[22:20:12] [PASSED] DMA allocations, DMA32 required
[22:20:12] [PASSED] No DMA allocations, DMA32 required
[22:20:12] [PASSED] DMA allocations, no DMA32 required
[22:20:12] ============== [PASSED] ttm_device_init_pools ==============
[22:20:12] =================== [PASSED] ttm_device ====================
[22:20:12] ================== ttm_pool (8 subtests) ===================
[22:20:12] ================== ttm_pool_alloc_basic ===================
[22:20:12] [PASSED] One page
[22:20:12] [PASSED] More than one page
[22:20:12] [PASSED] Above the allocation limit
[22:20:12] [PASSED] One page, with coherent DMA mappings enabled
[22:20:12] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:20:12] ============== [PASSED] ttm_pool_alloc_basic ===============
[22:20:12] ============== ttm_pool_alloc_basic_dma_addr ==============
[22:20:12] [PASSED] One page
[22:20:12] [PASSED] More than one page
[22:20:12] [PASSED] Above the allocation limit
[22:20:12] [PASSED] One page, with coherent DMA mappings enabled
[22:20:12] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:20:12] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[22:20:12] [PASSED] ttm_pool_alloc_order_caching_match
[22:20:12] [PASSED] ttm_pool_alloc_caching_mismatch
[22:20:12] [PASSED] ttm_pool_alloc_order_mismatch
[22:20:12] [PASSED] ttm_pool_free_dma_alloc
[22:20:12] [PASSED] ttm_pool_free_no_dma_alloc
[22:20:12] [PASSED] ttm_pool_fini_basic
[22:20:12] ==================== [PASSED] ttm_pool =====================
[22:20:12] ================ ttm_resource (8 subtests) =================
[22:20:12] ================= ttm_resource_init_basic =================
[22:20:12] [PASSED] Init resource in TTM_PL_SYSTEM
[22:20:12] [PASSED] Init resource in TTM_PL_VRAM
[22:20:12] [PASSED] Init resource in a private placement
[22:20:12] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[22:20:12] ============= [PASSED] ttm_resource_init_basic =============
[22:20:12] [PASSED] ttm_resource_init_pinned
[22:20:12] [PASSED] ttm_resource_fini_basic
[22:20:12] [PASSED] ttm_resource_manager_init_basic
[22:20:12] [PASSED] ttm_resource_manager_usage_basic
[22:20:12] [PASSED] ttm_resource_manager_set_used_basic
[22:20:12] [PASSED] ttm_sys_man_alloc_basic
[22:20:12] [PASSED] ttm_sys_man_free_basic
[22:20:12] ================== [PASSED] ttm_resource ===================
[22:20:12] =================== ttm_tt (15 subtests) ===================
[22:20:12] ==================== ttm_tt_init_basic ====================
[22:20:12] [PASSED] Page-aligned size
[22:20:12] [PASSED] Extra pages requested
[22:20:12] ================ [PASSED] ttm_tt_init_basic ================
[22:20:12] [PASSED] ttm_tt_init_misaligned
[22:20:12] [PASSED] ttm_tt_fini_basic
[22:20:12] [PASSED] ttm_tt_fini_sg
[22:20:12] [PASSED] ttm_tt_fini_shmem
[22:20:12] [PASSED] ttm_tt_create_basic
[22:20:12] [PASSED] ttm_tt_create_invalid_bo_type
[22:20:12] [PASSED] ttm_tt_create_ttm_exists
[22:20:12] [PASSED] ttm_tt_create_failed
[22:20:12] [PASSED] ttm_tt_destroy_basic
[22:20:12] [PASSED] ttm_tt_populate_null_ttm
[22:20:12] [PASSED] ttm_tt_populate_populated_ttm
[22:20:12] [PASSED] ttm_tt_unpopulate_basic
[22:20:12] [PASSED] ttm_tt_unpopulate_empty_ttm
[22:20:12] [PASSED] ttm_tt_swapin_basic
[22:20:12] ===================== [PASSED] ttm_tt ======================
[22:20:12] =================== ttm_bo (14 subtests) ===================
[22:20:12] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[22:20:12] [PASSED] Cannot be interrupted and sleeps
[22:20:12] [PASSED] Cannot be interrupted, locks straight away
[22:20:12] [PASSED] Can be interrupted, sleeps
[22:20:12] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[22:20:12] [PASSED] ttm_bo_reserve_locked_no_sleep
[22:20:12] [PASSED] ttm_bo_reserve_no_wait_ticket
[22:20:12] [PASSED] ttm_bo_reserve_double_resv
[22:20:12] [PASSED] ttm_bo_reserve_interrupted
[22:20:12] [PASSED] ttm_bo_reserve_deadlock
[22:20:12] [PASSED] ttm_bo_unreserve_basic
[22:20:12] [PASSED] ttm_bo_unreserve_pinned
[22:20:12] [PASSED] ttm_bo_unreserve_bulk
[22:20:12] [PASSED] ttm_bo_fini_basic
[22:20:12] [PASSED] ttm_bo_fini_shared_resv
[22:20:12] [PASSED] ttm_bo_pin_basic
[22:20:12] [PASSED] ttm_bo_pin_unpin_resource
[22:20:12] [PASSED] ttm_bo_multiple_pin_one_unpin
[22:20:12] ===================== [PASSED] ttm_bo ======================
[22:20:12] ============== ttm_bo_validate (22 subtests) ===============
[22:20:12] ============== ttm_bo_init_reserved_sys_man ===============
[22:20:12] [PASSED] Buffer object for userspace
[22:20:12] [PASSED] Kernel buffer object
[22:20:12] [PASSED] Shared buffer object
[22:20:12] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[22:20:12] ============== ttm_bo_init_reserved_mock_man ==============
[22:20:12] [PASSED] Buffer object for userspace
[22:20:12] [PASSED] Kernel buffer object
[22:20:12] [PASSED] Shared buffer object
[22:20:12] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[22:20:12] [PASSED] ttm_bo_init_reserved_resv
[22:20:12] ================== ttm_bo_validate_basic ==================
[22:20:12] [PASSED] Buffer object for userspace
[22:20:12] [PASSED] Kernel buffer object
[22:20:12] [PASSED] Shared buffer object
[22:20:12] ============== [PASSED] ttm_bo_validate_basic ==============
[22:20:12] [PASSED] ttm_bo_validate_invalid_placement
[22:20:12] ============= ttm_bo_validate_same_placement ==============
[22:20:12] [PASSED] System manager
[22:20:12] [PASSED] VRAM manager
[22:20:12] ========= [PASSED] ttm_bo_validate_same_placement ==========
[22:20:12] [PASSED] ttm_bo_validate_failed_alloc
[22:20:12] [PASSED] ttm_bo_validate_pinned
[22:20:12] [PASSED] ttm_bo_validate_busy_placement
[22:20:12] ================ ttm_bo_validate_multihop =================
[22:20:12] [PASSED] Buffer object for userspace
[22:20:12] [PASSED] Kernel buffer object
[22:20:12] [PASSED] Shared buffer object
[22:20:12] ============ [PASSED] ttm_bo_validate_multihop =============
[22:20:12] ========== ttm_bo_validate_no_placement_signaled ==========
[22:20:12] [PASSED] Buffer object in system domain, no page vector
[22:20:12] [PASSED] Buffer object in system domain with an existing page vector
[22:20:12] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[22:20:12] ======== ttm_bo_validate_no_placement_not_signaled ========
[22:20:12] [PASSED] Buffer object for userspace
[22:20:12] [PASSED] Kernel buffer object
[22:20:12] [PASSED] Shared buffer object
[22:20:12] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[22:20:12] [PASSED] ttm_bo_validate_move_fence_signaled
[22:20:12] ========= ttm_bo_validate_move_fence_not_signaled =========
[22:20:12] [PASSED] Waits for GPU
[22:20:12] [PASSED] Tries to lock straight away
[22:20:12] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[22:20:12] [PASSED] ttm_bo_validate_swapout
[22:20:12] [PASSED] ttm_bo_validate_happy_evict
[22:20:12] [PASSED] ttm_bo_validate_all_pinned_evict
[22:20:12] [PASSED] ttm_bo_validate_allowed_only_evict
[22:20:12] [PASSED] ttm_bo_validate_deleted_evict
[22:20:12] [PASSED] ttm_bo_validate_busy_domain_evict
[22:20:12] [PASSED] ttm_bo_validate_evict_gutting
[22:20:12] [PASSED] ttm_bo_validate_recrusive_evict
[22:20:12] ================= [PASSED] ttm_bo_validate =================
[22:20:12] ============================================================
[22:20:12] Testing complete. Ran 102 tests: passed: 102
[22:20:12] Elapsed time: 11.859s total, 1.814s configuring, 9.830s building, 0.184s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 34+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe/forcewake: add delayed-release optimization (rev4)
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (14 preceding siblings ...)
2026-07-20 22:20 ` ✓ CI.KUnit: success " Patchwork
@ 2026-07-20 22:54 ` Patchwork
2026-07-21 5:00 ` ✓ Xe.CI.FULL: " Patchwork
` (3 subsequent siblings)
19 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2026-07-20 22:54 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 4941 bytes --]
== Series Details ==
Series: drm/xe/forcewake: add delayed-release optimization (rev4)
URL : https://patchwork.freedesktop.org/series/167697/
State : success
== Summary ==
CI Bug Log - changes from xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405_BAT -> xe-pw-167697v4_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (12 -> 13)
------------------------------
Additional (1): bat-bmg-2
Known issues
------------
Here are the changes found in xe-pw-167697v4_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@fbdev@write:
- bat-bmg-2: NOTRUN -> [SKIP][1] ([Intel XE#2134]) +4 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/bat-bmg-2/igt@fbdev@write.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-bmg-2: NOTRUN -> [SKIP][2] ([Intel XE#2233])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/bat-bmg-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- bat-bmg-2: NOTRUN -> [SKIP][3] ([Intel XE#2489] / [Intel XE#3419]) +13 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/bat-bmg-2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
* igt@kms_flip@basic-flip-vs-modeset:
- bat-bmg-2: NOTRUN -> [SKIP][4] ([Intel XE#2482]) +3 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/bat-bmg-2/igt@kms_flip@basic-flip-vs-modeset.html
* igt@kms_frontbuffer_tracking@basic:
- bat-bmg-2: NOTRUN -> [SKIP][5] ([Intel XE#2434] / [Intel XE#2548] / [Intel XE#6314])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/bat-bmg-2/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_psr@psr-sprite-plane-onoff:
- bat-bmg-2: NOTRUN -> [SKIP][6] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/bat-bmg-2/igt@kms_psr@psr-sprite-plane-onoff.html
* igt@xe_exec_multi_queue@priority:
- bat-bmg-2: NOTRUN -> [SKIP][7] ([Intel XE#8364]) +13 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/bat-bmg-2/igt@xe_exec_multi_queue@priority.html
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- bat-bmg-2: NOTRUN -> [SKIP][8] ([Intel XE#2229])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/bat-bmg-2/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
* igt@xe_pat@pat-index-xehpc:
- bat-bmg-2: NOTRUN -> [SKIP][9] ([Intel XE#1420] / [Intel XE#7590])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/bat-bmg-2/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pat@pat-index-xelp:
- bat-bmg-2: NOTRUN -> [SKIP][10] ([Intel XE#2245] / [Intel XE#7590])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/bat-bmg-2/igt@xe_pat@pat-index-xelp.html
* igt@xe_pat@pat-index-xelpg:
- bat-bmg-2: NOTRUN -> [SKIP][11] ([Intel XE#2236] / [Intel XE#7590])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/bat-bmg-2/igt@xe_pat@pat-index-xelpg.html
[Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
[Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
[Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
[Intel XE#2434]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2434
[Intel XE#2482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2482
[Intel XE#2489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2489
[Intel XE#2548]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2548
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#3419]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3419
[Intel XE#6314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6314
[Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
Build changes
-------------
* Linux: xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405 -> xe-pw-167697v4
IGT_9014: 6d3784ab505ea6a7917b191c0e060d5b4b0c2be7 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405: b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405
xe-pw-167697v4: 167697v4
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/index.html
[-- Attachment #2: Type: text/html, Size: 5853 bytes --]
^ permalink raw reply [flat|nested] 34+ messages in thread
* ✓ Xe.CI.FULL: success for drm/xe/forcewake: add delayed-release optimization (rev4)
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (15 preceding siblings ...)
2026-07-20 22:54 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-07-21 5:00 ` Patchwork
2026-08-13 0:06 ` [PATCH v5 0/4] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (2 subsequent siblings)
19 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2026-07-21 5:00 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 9267 bytes --]
== Series Details ==
Series: drm/xe/forcewake: add delayed-release optimization (rev4)
URL : https://patchwork.freedesktop.org/series/167697/
State : success
== Summary ==
CI Bug Log - changes from xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405_FULL -> xe-pw-167697v4_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-167697v4_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_addfb_basic@addfb25-bad-modifier:
- shard-bmg: [PASS][1] -> [INCOMPLETE][2] ([Intel XE#2594])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405/shard-bmg-4/igt@kms_addfb_basic@addfb25-bad-modifier.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/shard-bmg-6/igt@kms_addfb_basic@addfb25-bad-modifier.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-bmg: [PASS][3] -> [FAIL][4] ([Intel XE#3718] / [Intel XE#6078])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/shard-bmg-4/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2:
- shard-bmg: [PASS][5] -> [FAIL][6] ([Intel XE#6078])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/shard-bmg-4/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-dp-2.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1:
- shard-lnl: [PASS][7] -> [FAIL][8] ([Intel XE#301])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-lnl: [PASS][9] -> [FAIL][10] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [PASS][11] -> [INCOMPLETE][12] ([Intel XE#6321] / [Intel XE#8355])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405/shard-bmg-1/igt@xe_evict@evict-mixed-many-threads-small.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/shard-bmg-4/igt@xe_evict@evict-mixed-many-threads-small.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_pcode_probe_early:
- shard-bmg: [PASS][13] -> [ABORT][14] ([Intel XE#8007])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405/shard-bmg-10/igt@xe_fault_injection@inject-fault-probe-function-xe_pcode_probe_early.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/shard-bmg-7/igt@xe_fault_injection@inject-fault-probe-function-xe_pcode_probe_early.html
#### Possible fixes ####
* igt@kms_async_flips@alternate-sync-async-flip-atomic:
- shard-bmg: [FAIL][15] ([Intel XE#3718] / [Intel XE#6078]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405/shard-bmg-8/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/shard-bmg-10/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
* igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-dp-2:
- shard-bmg: [FAIL][17] ([Intel XE#6078]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405/shard-bmg-8/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-dp-2.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/shard-bmg-10/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-b-dp-2.html
* igt@kms_flip@2x-wf_vblank-ts-check-interruptible@ad-dp2-hdmi-a3:
- shard-bmg: [FAIL][19] ([Intel XE#5408] / [Intel XE#6266]) -> [PASS][20] +1 other test pass
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405/shard-bmg-1/igt@kms_flip@2x-wf_vblank-ts-check-interruptible@ad-dp2-hdmi-a3.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/shard-bmg-4/igt@kms_flip@2x-wf_vblank-ts-check-interruptible@ad-dp2-hdmi-a3.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-lnl: [FAIL][21] ([Intel XE#301]) -> [PASS][22] +1 other test pass
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip@plain-flip-ts-check@c-edp1:
- shard-lnl: [FAIL][23] ([Intel XE#3149] / [Intel XE#6266]) -> [PASS][24] +1 other test pass
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405/shard-lnl-7/igt@kms_flip@plain-flip-ts-check@c-edp1.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/shard-lnl-6/igt@kms_flip@plain-flip-ts-check@c-edp1.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][25] ([Intel XE#1503]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405/shard-bmg-5/igt@kms_hdr@invalid-hdr.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/shard-bmg-8/igt@kms_hdr@invalid-hdr.html
#### Warnings ####
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-lnl: [SKIP][27] ([Intel XE#309] / [Intel XE#7343]) -> [SKIP][28] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405/shard-lnl-1/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][29] ([Intel XE#2509] / [Intel XE#7437]) -> [SKIP][30] ([Intel XE#2426] / [Intel XE#5848])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2594
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
[Intel XE#5408]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5408
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
[Intel XE#6266]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6266
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
Build changes
-------------
* Linux: xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405 -> xe-pw-167697v4
IGT_9014: 6d3784ab505ea6a7917b191c0e060d5b4b0c2be7 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5443-b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405: b521b0cb70bcb6e524b6c2ee6f86f5c6f0803405
xe-pw-167697v4: 167697v4
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167697v4/index.html
[-- Attachment #2: Type: text/html, Size: 10829 bytes --]
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4] drm/xe/forcewake: add delayed-release optimization
2026-07-20 22:13 ` [PATCH v4] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
@ 2026-07-21 22:43 ` Matthew Brost
0 siblings, 0 replies; 34+ messages in thread
From: Matthew Brost @ 2026-07-21 22:43 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe, jia.yao
On Mon, Jul 20, 2026 at 10:13:05PM +0000, Zongyao Bai wrote:
> Add delayed-release optimization:
> - Add domain sleep XE_FORCE_WAKE_HOLD_DELAY_US after xe_force_wake_put()
> - Skip MMIO wake in xe_force_wake_get() if domain still awake.
> Reduces frequent wake/sleep cycles for back-to-back operations.
> Examples of scenarios: zeDeviceGetGlobalTimestamps read by VTune, PTI
>
> v2:
> - Add xe_force_wake_flush() and call it on the runtime/system
> suspend paths to ensure no deferred-sleep runs after GT power-off.
> (Sashiko)
>
> v3:
> - Add configfs for XE_DEFAULT_FORCE_WAKE_HOLD_DELAY_US. (Matt)
> - Modify the default value of forcewake_hold_delay_us to 100. (Maarten)
> - Use guard(spinlock_irqsave) in the delayed-sleep timer callback. (Matt)
> - Drop the redundant refcount WARN in xe_force_wake_fini(). (Matt)
> - Document the spinlock protection of the timer_rearm / timer_domains
> fields, and reorder struct xe_force_wake_domain by member type. (Matt)
>
> v4:
> - Make delayed release opt-in via a new xe_force_wake_put_delay(),
> used only by xe_query.c:query_engine_cycles(); xe_force_wake_put()
> restores immediate sleep-and-ack-wait behavior for all other callers.
> (Matt)
> - Track a pending delayed-release request per domain so the final
> reference drop honors it, regardless of whether that drop happens via
> xe_force_wake_put() or xe_force_wake_put_delay(). (Matt)
>
Sashiko flagged 3 issues and all of these look valid:
https://sashiko.dev/#/patchset/20260720221306.1173028-1-zongyao.bai%40intel.com
Matt
> Assisted-by: GitHub-Copilot:claude-opus-4.8
> Suggested-by: Matthew Brost <matthew.brost@intel.com>
> Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
> ---
> drivers/gpu/drm/xe/xe_configfs.c | 65 +++++++++
> drivers/gpu/drm/xe/xe_configfs.h | 5 +
> drivers/gpu/drm/xe/xe_defaults.h | 1 +
> drivers/gpu/drm/xe/xe_device.c | 2 +
> drivers/gpu/drm/xe/xe_device_types.h | 3 +
> drivers/gpu/drm/xe/xe_force_wake.c | 173 ++++++++++++++++++++---
> drivers/gpu/drm/xe/xe_force_wake.h | 42 +++++-
> drivers/gpu/drm/xe/xe_force_wake_types.h | 25 ++++
> drivers/gpu/drm/xe/xe_gt.c | 27 +++-
> drivers/gpu/drm/xe/xe_query.c | 2 +-
> 10 files changed, 319 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
> index 052cce962161..e371ac190c2d 100644
> --- a/drivers/gpu/drm/xe/xe_configfs.c
> +++ b/drivers/gpu/drm/xe/xe_configfs.c
> @@ -247,6 +247,16 @@
> *
> * # echo 0 > /sys/kernel/config/xe/0000:03:00.0/enable_multi_queue
> *
> + * Force wake hold delay:
> + * ----------------------
> + *
> + * Delay in microseconds before an idle forcewake domain is put to sleep after
> + * the last reference is dropped. Keeping the domain awake for this short
> + * window lets rapid back-to-back accesses reuse a still-awake domain without
> + * paying the cost of a full wake + ACK cycle each time. Example::
> + *
> + * # echo 100 > /sys/kernel/config/xe/0000:03:00.0/forcewake_hold_delay_us
> + *
> * This attribute can only be set before binding to the device.
> *
> * Remove devices
> @@ -275,6 +285,7 @@ struct xe_config_group_device {
> bool survivability_mode;
> bool enable_psmi;
> bool enable_multi_queue;
> + u32 forcewake_hold_delay_us;
> struct {
> unsigned int max_vfs;
> bool admin_only_pf;
> @@ -295,6 +306,7 @@ static const struct xe_config_device device_defaults = {
> .survivability_mode = false,
> .enable_psmi = false,
> .enable_multi_queue = true,
> + .forcewake_hold_delay_us = XE_DEFAULT_FORCE_WAKE_HOLD_DELAY_US,
> .sriov = {
> .max_vfs = XE_DEFAULT_MAX_VFS,
> .admin_only_pf = XE_DEFAULT_ADMIN_ONLY_PF,
> @@ -616,6 +628,36 @@ static ssize_t enable_multi_queue_store(struct config_item *item, const char *pa
> return len;
> }
>
> +static ssize_t forcewake_hold_delay_us_show(struct config_item *item, char *page)
> +{
> + struct xe_config_device *dev = to_xe_config_device(item);
> +
> + return sprintf(page, "%u\n", dev->forcewake_hold_delay_us);
> +}
> +
> +static ssize_t forcewake_hold_delay_us_store(struct config_item *item,
> + const char *page, size_t len)
> +{
> + struct xe_config_group_device *dev = to_xe_config_group_device(item);
> + u32 val;
> + int ret;
> +
> + ret = kstrtouint(page, 0, &val);
> + if (ret)
> + return ret;
> +
> + if (!val)
> + return -EINVAL;
> +
> + guard(mutex)(&dev->lock);
> + if (is_bound(dev))
> + return -EBUSY;
> +
> + dev->config.forcewake_hold_delay_us = val;
> +
> + return len;
> +}
> +
> static bool wa_bb_read_advance(bool dereference, char **p,
> const char *append, size_t len,
> size_t *max_size)
> @@ -856,6 +898,7 @@ CONFIGFS_ATTR(, ctx_restore_post_bb);
> CONFIGFS_ATTR(, enable_multi_queue);
> CONFIGFS_ATTR(, enable_psmi);
> CONFIGFS_ATTR(, engines_allowed);
> +CONFIGFS_ATTR(, forcewake_hold_delay_us);
> CONFIGFS_ATTR(, gt_types_allowed);
> CONFIGFS_ATTR(, survivability_mode);
>
> @@ -865,6 +908,7 @@ static struct configfs_attribute *xe_config_device_attrs[] = {
> &attr_enable_multi_queue,
> &attr_enable_psmi,
> &attr_engines_allowed,
> + &attr_forcewake_hold_delay_us,
> &attr_gt_types_allowed,
> &attr_survivability_mode,
> NULL,
> @@ -1143,6 +1187,7 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
> PRI_CUSTOM_ATTR("%d", enable_multi_queue);
> PRI_CUSTOM_ATTR("%d", enable_psmi);
> PRI_CUSTOM_ATTR("%d", survivability_mode);
> + PRI_CUSTOM_ATTR("%u", forcewake_hold_delay_us);
> PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
>
> #undef PRI_CUSTOM_ATTR
> @@ -1290,6 +1335,26 @@ bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev)
> return ret;
> }
>
> +/**
> + * xe_configfs_get_forcewake_hold_delay_us - get configfs forcewake_hold_delay_us setting
> + * @pdev: pci device
> + *
> + * Return: forcewake_hold_delay_us setting in configfs
> + */
> +u32 xe_configfs_get_forcewake_hold_delay_us(struct pci_dev *pdev)
> +{
> + struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
> + u32 ret;
> +
> + if (!dev)
> + return device_defaults.forcewake_hold_delay_us;
> +
> + ret = dev->config.forcewake_hold_delay_us;
> + config_group_put(&dev->group);
> +
> + return ret;
> +}
> +
> /**
> * xe_configfs_get_ctx_restore_mid_bb - get configfs ctx_restore_mid_bb setting
> * @pdev: pci device
> diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
> index 4fbbeafba473..77abc83a6f70 100644
> --- a/drivers/gpu/drm/xe/xe_configfs.h
> +++ b/drivers/gpu/drm/xe/xe_configfs.h
> @@ -24,6 +24,7 @@ bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
> u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
> bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
> bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev);
> +u32 xe_configfs_get_forcewake_hold_delay_us(struct pci_dev *pdev);
> u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
> enum xe_engine_class class,
> const u32 **cs);
> @@ -44,6 +45,10 @@ static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return t
> static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
> static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
> static inline bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev) { return true; }
> +static inline u32 xe_configfs_get_forcewake_hold_delay_us(struct pci_dev *pdev)
> +{
> + return XE_DEFAULT_FORCE_WAKE_HOLD_DELAY_US;
> +}
> static inline u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
> enum xe_engine_class class,
> const u32 **cs) { return 0; }
> diff --git a/drivers/gpu/drm/xe/xe_defaults.h b/drivers/gpu/drm/xe/xe_defaults.h
> index c8ae1d5f3d60..3d8f57a54547 100644
> --- a/drivers/gpu/drm/xe/xe_defaults.h
> +++ b/drivers/gpu/drm/xe/xe_defaults.h
> @@ -22,5 +22,6 @@
> #define XE_DEFAULT_WEDGED_MODE XE_WEDGED_MODE_UPON_CRITICAL_ERROR
> #define XE_DEFAULT_WEDGED_MODE_STR "upon-critical-error"
> #define XE_DEFAULT_SVM_NOTIFIER_SIZE 512
> +#define XE_DEFAULT_FORCE_WAKE_HOLD_DELAY_US 100
>
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 4eed9a251e65..88ba267c9303 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -541,6 +541,8 @@ int xe_device_init_early(struct xe_device *xe)
>
> xe->atomic_svm_timeslice_ms = 5;
> xe->min_run_period_lr_ms = 5;
> + xe->forcewake_hold_delay_us =
> + xe_configfs_get_forcewake_hold_delay_us(to_pci_dev(xe->drm.dev));
>
> err = xe_irq_init(xe);
> if (err)
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 56c17cca79c0..35aac1ef6454 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -530,6 +530,9 @@ struct xe_device {
> /** @min_run_period_pf_ms: LR VM (page fault mode) timeslice */
> u32 min_run_period_pf_ms;
>
> + /** @forcewake_hold_delay_us: Delayed forcewake release window in microseconds. */
> + u32 forcewake_hold_delay_us;
> +
> #ifdef TEST_VM_OPS_ERROR
> /**
> * @vm_inject_error_position: inject errors at different places in VM
> diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
> index 197e2197bd0a..34c3c23f79ca 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake.c
> +++ b/drivers/gpu/drm/xe/xe_force_wake.c
> @@ -6,12 +6,17 @@
> #include "xe_force_wake.h"
>
> #include <drm/drm_util.h>
> +#include <linux/cleanup.h>
> +#include <linux/device.h>
> +#include <linux/hrtimer.h>
>
> #include "regs/xe_gt_regs.h"
> #include "regs/xe_reg_defs.h"
> +#include "xe_device.h"
> #include "xe_gt.h"
> #include "xe_gt_printk.h"
> #include "xe_mmio.h"
> +#include "xe_pm.h"
> #include "xe_sriov.h"
>
> #define XE_FORCE_WAKE_ACK_TIMEOUT_MS 50
> @@ -27,6 +32,8 @@ static void mark_domain_initialized(struct xe_force_wake *fw,
> fw->initialized_domains |= BIT(id);
> }
>
> +static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer);
> +
> static void init_domain(struct xe_force_wake *fw,
> enum xe_force_wake_domain_id id,
> struct xe_reg reg, struct xe_reg ack)
> @@ -38,11 +45,24 @@ static void init_domain(struct xe_force_wake *fw,
> domain->reg_ack = ack;
> domain->val = FORCEWAKE_MT(FORCEWAKE_KERNEL);
> domain->mask = FORCEWAKE_MT_MASK(FORCEWAKE_KERNEL);
> + domain->fw_back = fw;
> + hrtimer_setup(&domain->timer, xe_force_wake_domain_timer,
> + CLOCK_MONOTONIC, HRTIMER_MODE_REL);
>
> mark_domain_initialized(fw, id);
> }
>
> -void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
> +static void xe_force_wake_fini(void *arg)
> +{
> + struct xe_force_wake *fw = arg;
> + struct xe_force_wake_domain *domain;
> + unsigned int tmp;
> +
> + for_each_fw_domain(domain, fw, tmp)
> + hrtimer_cancel(&domain->timer);
> +}
> +
> +int xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
> {
> struct xe_device *xe = gt_to_xe(gt);
>
> @@ -58,6 +78,8 @@ void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
> FORCEWAKE_GT,
> FORCEWAKE_ACK_GT);
> }
> +
> + return devm_add_action_or_reset(xe->drm.dev, xe_force_wake_fini, fw);
> }
>
> void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw)
> @@ -148,6 +170,36 @@ static int domain_sleep_wait(struct xe_gt *gt,
> return __domain_wait(gt, domain, false);
> }
>
> +static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer)
> +{
> + struct xe_force_wake_domain *domain =
> + container_of(timer, struct xe_force_wake_domain, timer);
> + struct xe_force_wake *fw = domain->fw_back;
> + struct xe_gt *gt = fw->gt;
> + struct xe_device *xe = gt_to_xe(gt);
> +
> + xe_gt_assert(gt, !xe_pm_runtime_suspended(gt_to_xe(gt)));
> +
> + guard(spinlock_irqsave)(&fw->lock);
> +
> + if (!(fw->timer_domains & BIT(domain->id)) || domain->ref)
> + return HRTIMER_NORESTART;
> +
> + if (domain->timer_rearm) {
> + domain->timer_rearm = false;
> + hrtimer_forward_now(timer,
> + ns_to_ktime(xe->forcewake_hold_delay_us *
> + NSEC_PER_USEC));
> + return HRTIMER_RESTART;
> + }
> +
> + fw->timer_domains &= ~BIT(domain->id);
> + domain_sleep(gt, domain);
> + fw->awake_domains &= ~BIT(domain->id);
> +
> + return HRTIMER_NORESTART;
> +}
> +
> /**
> * xe_force_wake_get() : Increase the domain refcount
> * @fw: struct xe_force_wake
> @@ -187,8 +239,13 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
> spin_lock_irqsave(&fw->lock, flags);
> for_each_fw_domain_masked(domain, ref_rqst, fw, tmp) {
> if (!domain->ref++) {
> - awake_rqst |= BIT(domain->id);
> - domain_wake(gt, domain);
> + if (fw->awake_domains & BIT(domain->id)) {
> + fw->timer_domains &= ~BIT(domain->id);
> + hrtimer_try_to_cancel(&domain->timer);
> + } else {
> + awake_rqst |= BIT(domain->id);
> + domain_wake(gt, domain);
> + }
> }
> ref_incr |= BIT(domain->id);
> }
> @@ -212,19 +269,11 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
> return ref_incr;
> }
>
> -/**
> - * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
> - * @fw: Pointer to the force wake structure
> - * @fw_ref: return of xe_force_wake_get()
> - *
> - * This function reduces the reference counts for domains in fw_ref. If
> - * refcount for any of the specified domain reaches 0, it puts the domain to sleep
> - * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
> - * Warns in case of timeout of ack from domain.
> - */
> -void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
> +static void __xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref,
> + bool delayed_release)
> {
> struct xe_gt *gt = fw->gt;
> + struct xe_device *xe = gt_to_xe(gt);
> struct xe_force_wake_domain *domain;
> unsigned int tmp, sleep = 0;
> unsigned long flags;
> @@ -245,8 +294,24 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
> xe_gt_assert(gt, domain->ref);
>
> if (!--domain->ref) {
> - sleep |= BIT(domain->id);
> - domain_sleep(gt, domain);
> + if (delayed_release || domain->delay_requested) {
> + domain->delay_requested = false;
> + fw->timer_domains |= BIT(domain->id);
> + if (hrtimer_callback_running(&domain->timer)) {
> + domain->timer_rearm = true;
> + } else {
> + domain->timer_rearm = false;
> + hrtimer_start(&domain->timer,
> + ns_to_ktime(xe->forcewake_hold_delay_us *
> + NSEC_PER_USEC),
> + HRTIMER_MODE_REL);
> + }
> + } else {
> + sleep |= BIT(domain->id);
> + domain_sleep(gt, domain);
> + }
> + } else if (delayed_release) {
> + domain->delay_requested = true;
> }
> }
> for_each_fw_domain_masked(domain, sleep, fw, tmp) {
> @@ -261,6 +326,82 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
> str_plural(hweight_long(ack_fail)), ack_fail);
> }
>
> +/**
> + * xe_force_wake_put - Decrement the refcount and release the domain
> + * @fw: Pointer to the force wake structure
> + * @fw_ref: return of xe_force_wake_get()
> + *
> + * This function reduces the reference counts for domains in fw_ref. If the
> + * refcount for a domain reaches 0, it puts the domain to sleep and waits for
> + * acknowledgment of the sleep request, warning if the domain fails to
> + * acknowledge.
> + */
> +void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
> +{
> + __xe_force_wake_put(fw, fw_ref, false);
> +}
> +
> +/**
> + * xe_force_wake_put_delay - Decrement the refcount and defer the sleep request
> + * @fw: Pointer to the force wake structure
> + * @fw_ref: return of xe_force_wake_get()
> + *
> + * Same as xe_force_wake_put(), except that when a domain's refcount reaches 0
> + * the sleep request is not issued immediately. Instead a hrtimer is armed
> + * for xe->forcewake_hold_delay_us, so a rapid subsequent xe_force_wake_get()
> + * can reuse the still-awake domain at zero MMIO cost. If the domain is
> + * still idle when the timer fires, the sleep request is issued then.
> + *
> + * If the domain still has other references held when this is called, the
> + * request is recorded and honored later, whether the last reference is
> + * eventually dropped by this function or by xe_force_wake_put().
> + */
> +void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref)
> +{
> + __xe_force_wake_put(fw, fw_ref, true);
> +}
> +
> +/**
> + * xe_force_wake_flush - Cancel pending delayed-sleep timers and settle domains
> + * @fw: Pointer to the force wake structure
> + *
> + * xe_force_wake_put_delay() arms a short hrtimer instead of putting an idle
> + * domain to sleep immediately. That deferred sleep performs MMIO and must
> + * not be allowed to run after the device has been powered down. Callers on
> + * the runtime/system suspend path must therefore flush any outstanding
> + * timers once forcewake has been fully released, before the hardware is
> + * powered off.
> + *
> + * For every domain this cancels the pending timer (synchronously waiting for an
> + * in-flight callback to finish) and, if the domain is still idle with an
> + * outstanding deferred sleep, performs the sleep request right away so the
> + * domain is left in a consistent, fully-asleep state. hrtimer_cancel() must be
> + * called without holding fw->lock, since the timer callback takes that same
> + * lock.
> + */
> +void xe_force_wake_flush(struct xe_force_wake *fw)
> +{
> + struct xe_gt *gt = fw->gt;
> + struct xe_force_wake_domain *domain;
> + unsigned int tmp;
> + unsigned long flags;
> +
> + for_each_fw_domain(domain, fw, tmp)
> + hrtimer_cancel(&domain->timer);
> +
> + spin_lock_irqsave(&fw->lock, flags);
> + for_each_fw_domain(domain, fw, tmp) {
> + domain->timer_rearm = false;
> + domain->delay_requested = false;
> + if ((fw->timer_domains & BIT(domain->id)) && !domain->ref) {
> + fw->timer_domains &= ~BIT(domain->id);
> + domain_sleep(gt, domain);
> + fw->awake_domains &= ~BIT(domain->id);
> + }
> + }
> + spin_unlock_irqrestore(&fw->lock, flags);
> +}
> +
> const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
> {
> switch (id) {
> diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
> index e2721f205d6c..232aaa3ba621 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake.h
> +++ b/drivers/gpu/drm/xe/xe_force_wake.h
> @@ -11,13 +11,33 @@
>
> struct xe_gt;
>
> -void xe_force_wake_init_gt(struct xe_gt *gt,
> - struct xe_force_wake *fw);
> +int xe_force_wake_init_gt(struct xe_gt *gt,
> + struct xe_force_wake *fw);
> void xe_force_wake_init_engines(struct xe_gt *gt,
> struct xe_force_wake *fw);
> unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
> enum xe_force_wake_domains domains);
> void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref);
> +void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref);
> +void xe_force_wake_flush(struct xe_force_wake *fw);
> +
> +/**
> + * xe_force_wake_put_and_flush - Release forcewake and settle any deferred sleep
> + * @fw: Pointer to the force wake structure
> + * @fw_ref: return of xe_force_wake_get()
> + *
> + * Convenience helper for paths that must guarantee the domain is fully asleep
> + * before returning (typically right before the GT is powered off on
> + * runtime/system suspend). Because the flush has to run after the final put
> + * but before HW power-off, scope-based cleanup via CLASS(xe_force_wake, ...)
> + * cannot be used here.
> + */
> +static inline void
> +xe_force_wake_put_and_flush(struct xe_force_wake *fw, unsigned int fw_ref)
> +{
> + xe_force_wake_put(fw, fw_ref);
> + xe_force_wake_flush(fw);
> +}
>
> const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id);
>
> @@ -103,6 +123,24 @@ DEFINE_CLASS(xe_force_wake, struct xe_force_wake_ref,
> #define xe_with_force_wake(ref, fw, domains) \
> __xe_with_force_wake(ref, fw, domains, __UNIQUE_ID(done))
>
> +/*
> + * Same as xe_with_force_wake(), but releases forcewake via
> + * xe_force_wake_put_delay() instead of xe_force_wake_put() on scope exit.
> + * Only use this for hot paths where the caller expects forcewake to be
> + * re-acquired again shortly.
> + */
> +DEFINE_CLASS(xe_force_wake_delay, struct xe_force_wake_ref,
> + xe_force_wake_put_delay(_T.fw, _T.domains),
> + xe_force_wake_constructor(fw, domains),
> + struct xe_force_wake *fw, unsigned int domains);
> +
> +#define __xe_with_force_wake_delay(ref, fw, domains, done) \
> + for (CLASS(xe_force_wake_delay, ref)(fw, domains), *(done) = NULL; \
> + !(done); (done) = (void *)1)
> +
> +#define xe_with_force_wake_delay(ref, fw, domains) \
> + __xe_with_force_wake_delay(ref, fw, domains, __UNIQUE_ID(done))
> +
> /*
> * Used when xe_force_wake_constructor() has already been called by another
> * function and the current function is responsible for releasing the forcewake
> diff --git a/drivers/gpu/drm/xe/xe_force_wake_types.h b/drivers/gpu/drm/xe/xe_force_wake_types.h
> index 14b7b86e801b..5b3d2b6873ed 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake_types.h
> +++ b/drivers/gpu/drm/xe/xe_force_wake_types.h
> @@ -6,6 +6,7 @@
> #ifndef _XE_FORCE_WAKE_TYPES_H_
> #define _XE_FORCE_WAKE_TYPES_H_
>
> +#include <linux/hrtimer.h>
> #include <linux/mutex.h>
> #include <linux/types.h>
>
> @@ -51,6 +52,8 @@ enum xe_force_wake_domains {
> XE_FORCEWAKE_ALL = BIT(XE_FW_DOMAIN_ID_COUNT)
> };
>
> +struct xe_force_wake;
> +
> /**
> * struct xe_force_wake_domain - Xe force wake power domain
> *
> @@ -76,12 +79,29 @@ struct xe_force_wake_domain {
> struct xe_reg reg_ctl;
> /** @reg_ack: domain ack register address */
> struct xe_reg reg_ack;
> + /** @timer: hrtimer for delayed sleep request */
> + struct hrtimer timer;
> + /** @fw_back: back pointer to parent xe_force_wake */
> + struct xe_force_wake *fw_back;
> /** @val: domain wake write value */
> u32 val;
> /** @mask: domain mask */
> u32 mask;
> /** @ref: domain reference */
> u32 ref;
> + /**
> + * @timer_rearm: put() ran while callback was in-flight; callback must
> + * restart timer. Protected by @fw_back->lock.
> + */
> + bool timer_rearm;
> + /**
> + * @delay_requested: xe_force_wake_put_delay() was called while the
> + * domain still had other references held; whichever call
> + * (xe_force_wake_put() or xe_force_wake_put_delay()) ends up dropping
> + * the last reference must honor the deferred-release request.
> + * Protected by @fw_back->lock.
> + */
> + bool delay_requested;
> };
>
> /**
> @@ -101,6 +121,11 @@ struct xe_force_wake {
> spinlock_t lock;
> /** @awake_domains: mask of all domains awake */
> unsigned int awake_domains;
> + /**
> + * @timer_domains: mask of domains with an outstanding delayed-sleep
> + * timer. Protected by @lock.
> + */
> + unsigned int timer_domains;
> /** @initialized_domains: mask of all initialized domains */
> unsigned int initialized_domains;
> /** @domains: force wake domains */
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index dfdacc0f6de9..9c4980b81a8e 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -512,7 +512,10 @@ int xe_gt_init_early(struct xe_gt *gt)
>
> xe_wa_process_gt_oob(gt);
>
> - xe_force_wake_init_gt(gt, gt_to_fw(gt));
> + err = xe_force_wake_init_gt(gt, gt_to_fw(gt));
> + if (err)
> + return err;
> +
> spin_lock_init(>->global_invl_lock);
>
> err = xe_gt_tlb_inval_init_early(gt);
> @@ -1005,13 +1008,15 @@ void xe_gt_suspend_prepare(struct xe_gt *gt)
>
> int xe_gt_suspend(struct xe_gt *gt)
> {
> + unsigned int fw_ref;
> int err;
>
> xe_gt_dbg(gt, "suspending\n");
> xe_gt_sanitize(gt);
>
> - CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
> - if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
> + fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
> + if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {
> + xe_force_wake_put(gt_to_fw(gt), fw_ref);
> xe_gt_err(gt, "suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
> return -ETIMEDOUT;
> }
> @@ -1019,7 +1024,7 @@ int xe_gt_suspend(struct xe_gt *gt)
> err = xe_uc_suspend(>->uc);
> if (err) {
> xe_gt_err(gt, "suspend failed (%pe)\n", ERR_PTR(err));
> - return err;
> + goto err_force_wake;
> }
>
> xe_gt_idle_disable_pg(gt);
> @@ -1028,7 +1033,10 @@ int xe_gt_suspend(struct xe_gt *gt)
>
> xe_gt_dbg(gt, "suspended\n");
>
> - return 0;
> +err_force_wake:
> + xe_force_wake_put_and_flush(gt_to_fw(gt), fw_ref);
> +
> + return err;
> }
>
> void xe_gt_shutdown(struct xe_gt *gt)
> @@ -1087,10 +1095,13 @@ int xe_gt_resume(struct xe_gt *gt)
> */
> int xe_gt_runtime_suspend(struct xe_gt *gt)
> {
> + unsigned int fw_ref;
> +
> xe_gt_dbg(gt, "runtime suspending\n");
>
> - CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
> - if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
> + fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
> + if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {
> + xe_force_wake_put(gt_to_fw(gt), fw_ref);
> xe_gt_err(gt, "runtime suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
> return -ETIMEDOUT;
> }
> @@ -1100,6 +1111,8 @@ int xe_gt_runtime_suspend(struct xe_gt *gt)
>
> xe_gt_dbg(gt, "runtime suspended\n");
>
> + xe_force_wake_put_and_flush(gt_to_fw(gt), fw_ref);
> +
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index dc975f595368..86c4e1dfc101 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -157,7 +157,7 @@ query_engine_cycles(struct xe_device *xe,
>
> fw_domain = xe_hw_engine_to_fw_domain(hwe);
>
> - xe_with_force_wake(fw_ref, gt_to_fw(gt), fw_domain) {
> + xe_with_force_wake_delay(fw_ref, gt_to_fw(gt), fw_domain) {
> if (!xe_force_wake_ref_has_domain(fw_ref.domains, fw_domain))
> return -EIO;
>
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v5 0/4] drm/xe/forcewake: add delayed-release optimization
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (16 preceding siblings ...)
2026-07-21 5:00 ` ✓ Xe.CI.FULL: " Patchwork
@ 2026-08-13 0:06 ` Zongyao Bai
2026-08-13 0:06 ` [PATCH v5 1/4] drm/xe/forcewake: synchronize engine-cycle access with unplug Zongyao Bai
` (3 more replies)
2026-08-13 0:13 ` ✗ CI.checkpatch: warning for drm/xe/forcewake: add delayed-release optimization (rev5) Patchwork
2026-08-13 0:15 ` ✓ CI.KUnit: success " Patchwork
19 siblings, 4 replies; 34+ messages in thread
From: Zongyao Bai @ 2026-08-13 0:06 UTC (permalink / raw)
To: intel-xe; +Cc: jia.yao, matthew.brost, Zongyao Bai
Engine-cycle queries used by tools such as VTune and PTI can arrive in
bursts. Releasing forcewake immediately after every query makes the next
query issue another wake request and wait for its ACK.
Add an opt-in delayed-release path that keeps an idle forcewake domain
awake for a configurable interval, allowing a subsequent engine-cycle
query to reuse it. Other forcewake users retain the existing immediate
release behavior. The default hold interval is 100 us and can be changed
through configfs before binding the device.
The series also synchronizes engine-cycle queries with unplug and flushes
pending delayed releases before suspend, shutdown, remove, and probe
unwind, ensuring timer callbacks cannot access MMIO after power-off or
teardown.
On BMG, this reduced the Level Zero timestamp median from approximately
48.5 us to 9.4 us.
v5:
- Split the original patch into four patches: unplug synchronization,
delayed-release infrastructure, power-boundary flushing, and opt-in
enablement/configuration.
- Preserve a newer hold interval when an older timer callback is running,
and settle an outstanding sleep ACK before waking a domain again.
(Sashiko, Matt)
- Synchronously cancel delayed-release timers during forcewake cleanup.
(Sashiko, Matt)
- Flush delayed releases during shutdown, device removal, and
post-registration probe unwind in addition to system/runtime suspend.
(Matt)
Zongyao Bai (4):
drm/xe/forcewake: synchronize engine-cycle access with unplug
drm/xe/forcewake: add delayed-release state machine
drm/xe/forcewake: flush delayed release at power boundaries
drm/xe/forcewake: enable configurable delayed forcewake release
drivers/gpu/drm/xe/xe_configfs.c | 72 ++++++++
drivers/gpu/drm/xe/xe_configfs.h | 5 +
drivers/gpu/drm/xe/xe_defaults.h | 1 +
drivers/gpu/drm/xe/xe_device.c | 16 +-
drivers/gpu/drm/xe/xe_device_types.h | 3 +
drivers/gpu/drm/xe/xe_force_wake.c | 211 +++++++++++++++++++++--
drivers/gpu/drm/xe/xe_force_wake.h | 46 ++++-
drivers/gpu/drm/xe/xe_force_wake_types.h | 68 +++++++-
drivers/gpu/drm/xe/xe_gt.c | 12 +-
drivers/gpu/drm/xe/xe_query.c | 36 +++-
10 files changed, 437 insertions(+), 33 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v5 1/4] drm/xe/forcewake: synchronize engine-cycle access with unplug
2026-08-13 0:06 ` [PATCH v5 0/4] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
@ 2026-08-13 0:06 ` Zongyao Bai
2026-08-13 0:21 ` sashiko-bot
2026-08-13 0:06 ` [PATCH v5 2/4] drm/xe/forcewake: add delayed-release state machine Zongyao Bai
` (2 subsequent siblings)
3 siblings, 1 reply; 34+ messages in thread
From: Zongyao Bai @ 2026-08-13 0:06 UTC (permalink / raw)
To: intel-xe; +Cc: jia.yao, matthew.brost, Zongyao Bai
Prepare engine-cycle queries for delayed forcewake release by
protecting their forcewake and MMIO section with drm_dev_enter(). This
lets unplug wait for admitted queries before flushing delayed-release
timers.
Use drm_dev_unplug() on post-registration probe failure to provide the
same synchronization before teardown.
Assisted-by: GitHub-Copilot:gpt-5.6-sol
Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
---
drivers/gpu/drm/xe/xe_device.c | 2 +-
drivers/gpu/drm/xe/xe_query.c | 34 ++++++++++++++++++++++++++--------
2 files changed, 27 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 71111ad32465..81b31325e581 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -1166,7 +1166,7 @@ int xe_device_probe(struct xe_device *xe)
err_unregister_display:
xe_display_unregister(xe);
- drm_dev_unregister(&xe->drm);
+ drm_dev_unplug(&xe->drm);
return err;
}
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index dc975f595368..3c356bc48e2a 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -8,6 +8,7 @@
#include <linux/nospec.h>
#include <linux/sched/clock.h>
+#include <drm/drm_drv.h>
#include <drm/ttm/ttm_placement.h>
#include <generated/xe_wa_oob.h>
#include <uapi/drm/xe_drm.h>
@@ -123,6 +124,7 @@ query_engine_cycles(struct xe_device *xe,
__ktime_func_t cpu_clock;
struct xe_hw_engine *hwe;
struct xe_gt *gt;
+ int dev_idx, err = 0;
if (IS_SRIOV_VF(xe))
return -EOPNOTSUPP;
@@ -143,28 +145,44 @@ query_engine_cycles(struct xe_device *xe,
return -EINVAL;
eci = &resp.eci;
+ if (!drm_dev_enter(&xe->drm, &dev_idx))
+ return -ENODEV;
+
gt = xe_device_get_gt(xe, eci->gt_id);
- if (!gt)
- return -EINVAL;
+ if (!gt) {
+ err = -EINVAL;
+ goto out;
+ }
- if (eci->engine_class >= ARRAY_SIZE(user_to_xe_engine_class))
- return -EINVAL;
+ if (eci->engine_class >= ARRAY_SIZE(user_to_xe_engine_class)) {
+ err = -EINVAL;
+ goto out;
+ }
hwe = xe_gt_hw_engine(gt, user_to_xe_engine_class[eci->engine_class],
eci->engine_instance, true);
- if (!hwe)
- return -EINVAL;
+ if (!hwe) {
+ err = -EINVAL;
+ goto out;
+ }
fw_domain = xe_hw_engine_to_fw_domain(hwe);
xe_with_force_wake(fw_ref, gt_to_fw(gt), fw_domain) {
- if (!xe_force_wake_ref_has_domain(fw_ref.domains, fw_domain))
- return -EIO;
+ if (!xe_force_wake_ref_has_domain(fw_ref.domains, fw_domain)) {
+ err = -EIO;
+ goto out;
+ }
hwe_read_timestamp(hwe, &resp.engine_cycles, &resp.cpu_timestamp,
&resp.cpu_delta, cpu_clock);
}
+out:
+ drm_dev_exit(dev_idx);
+ if (err)
+ return err;
+
if (GRAPHICS_VER(xe) >= 20)
resp.width = 64;
else
--
2.43.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v5 2/4] drm/xe/forcewake: add delayed-release state machine
2026-08-13 0:06 ` [PATCH v5 0/4] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
2026-08-13 0:06 ` [PATCH v5 1/4] drm/xe/forcewake: synchronize engine-cycle access with unplug Zongyao Bai
@ 2026-08-13 0:06 ` Zongyao Bai
2026-08-13 0:23 ` sashiko-bot
2026-08-13 0:06 ` [PATCH v5 3/4] drm/xe/forcewake: flush delayed release at power boundaries Zongyao Bai
2026-08-13 0:06 ` [PATCH v5 4/4] drm/xe/forcewake: enable configurable delayed forcewake release Zongyao Bai
3 siblings, 1 reply; 34+ messages in thread
From: Zongyao Bai @ 2026-08-13 0:06 UTC (permalink / raw)
To: intel-xe; +Cc: jia.yao, matthew.brost, Zongyao Bai
Add an opt-in forcewake release path that keeps an idle domain awake
for a short hold interval. A subsequent get can reuse the domain
without issuing another wake request or waiting for its ACK. Without a
recorded delayed-release request, normal puts release immediately.
If a delayed release is requested while other references remain,
whichever put drops the final reference honors that request.(Matt)
Use a per-domain hrtimer and state protected by the forcewake lock to
preserve a newer hold interval armed while an older timer callback is
running. Remember delayed-release requests while other references
remain, and reconcile timer-issued sleep acknowledgments before a
subsequent wake.(Sashiko, Matt)
Register a devm cleanup action to synchronously cancel the timers
before the forcewake state is destroyed.(Sashiko, Matt)
This patch provides only the infrastructure; no caller opts in yet.
Suggested-by: Matthew Brost <matthew.brost@intel.com>
Assisted-by: GitHub-Copilot:gpt-5.6-sol
Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
---
drivers/gpu/drm/xe/xe_defaults.h | 1 +
drivers/gpu/drm/xe/xe_device.c | 2 +
drivers/gpu/drm/xe/xe_device_types.h | 3 +
drivers/gpu/drm/xe/xe_force_wake.c | 166 ++++++++++++++++++++---
drivers/gpu/drm/xe/xe_force_wake.h | 23 +++-
drivers/gpu/drm/xe/xe_force_wake_types.h | 26 +++-
drivers/gpu/drm/xe/xe_gt.c | 5 +-
7 files changed, 204 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_defaults.h b/drivers/gpu/drm/xe/xe_defaults.h
index 0884224ef7c7..de009af8c77f 100644
--- a/drivers/gpu/drm/xe/xe_defaults.h
+++ b/drivers/gpu/drm/xe/xe_defaults.h
@@ -22,6 +22,7 @@
#define XE_DEFAULT_WEDGED_MODE XE_WEDGED_MODE_UPON_CRITICAL_ERROR
#define XE_DEFAULT_WEDGED_MODE_STR "upon-critical-error"
#define XE_DEFAULT_SVM_NOTIFIER_SIZE 512
+#define XE_DEFAULT_FORCE_WAKE_HOLD_DELAY_US 100
#define XE_DEFAULT_NUM_PF_WORK 2
#endif
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 81b31325e581..21d02809c3a4 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -552,6 +552,8 @@ int xe_device_init_early(struct xe_device *xe)
xe_device_parse_modparam(xe);
+ xe->forcewake_hold_delay_us = XE_DEFAULT_FORCE_WAKE_HOLD_DELAY_US;
+
err = xe_irq_init(xe);
if (err)
return err;
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 180d450a6deb..4c16bb7e44bb 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -568,6 +568,9 @@ struct xe_device {
/** @min_run_period_pf_ms: LR VM (page fault mode) timeslice */
u32 min_run_period_pf_ms;
+ /** @forcewake_hold_delay_us: Delayed forcewake release window in microseconds. */
+ u32 forcewake_hold_delay_us;
+
#ifdef TEST_VM_OPS_ERROR
/**
* @vm_inject_error_position: inject errors at different places in VM
diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
index 197e2197bd0a..3f5013c7424c 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.c
+++ b/drivers/gpu/drm/xe/xe_force_wake.c
@@ -6,12 +6,17 @@
#include "xe_force_wake.h"
#include <drm/drm_util.h>
+#include <linux/cleanup.h>
+#include <linux/device.h>
+#include <linux/hrtimer.h>
#include "regs/xe_gt_regs.h"
#include "regs/xe_reg_defs.h"
+#include "xe_device.h"
#include "xe_gt.h"
#include "xe_gt_printk.h"
#include "xe_mmio.h"
+#include "xe_pm.h"
#include "xe_sriov.h"
#define XE_FORCE_WAKE_ACK_TIMEOUT_MS 50
@@ -27,6 +32,8 @@ static void mark_domain_initialized(struct xe_force_wake *fw,
fw->initialized_domains |= BIT(id);
}
+static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer);
+
static void init_domain(struct xe_force_wake *fw,
enum xe_force_wake_domain_id id,
struct xe_reg reg, struct xe_reg ack)
@@ -38,11 +45,24 @@ static void init_domain(struct xe_force_wake *fw,
domain->reg_ack = ack;
domain->val = FORCEWAKE_MT(FORCEWAKE_KERNEL);
domain->mask = FORCEWAKE_MT_MASK(FORCEWAKE_KERNEL);
+ domain->fw_back = fw;
+ hrtimer_setup(&domain->sleep_timer, xe_force_wake_domain_timer,
+ CLOCK_MONOTONIC, HRTIMER_MODE_REL);
mark_domain_initialized(fw, id);
}
-void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
+static void xe_force_wake_fini(void *arg)
+{
+ struct xe_force_wake *fw = arg;
+ struct xe_force_wake_domain *domain;
+ unsigned int tmp;
+
+ for_each_fw_domain(domain, fw, tmp)
+ hrtimer_cancel(&domain->sleep_timer);
+}
+
+int xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
{
struct xe_device *xe = gt_to_xe(gt);
@@ -58,6 +78,8 @@ void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
FORCEWAKE_GT,
FORCEWAKE_ACK_GT);
}
+
+ return devm_add_action_or_reset(xe->drm.dev, xe_force_wake_fini, fw);
}
void xe_force_wake_init_engines(struct xe_gt *gt, struct xe_force_wake *fw)
@@ -148,6 +170,59 @@ static int domain_sleep_wait(struct xe_gt *gt,
return __domain_wait(gt, domain, false);
}
+static void assert_domain_state(struct xe_force_wake *fw,
+ struct xe_force_wake_domain *domain)
+{
+ unsigned int domain_mask = BIT(domain->id);
+
+ lockdep_assert_held(&fw->lock);
+ xe_gt_assert(fw->gt,
+ !domain->delayed_release_requested || domain->ref);
+ xe_gt_assert(fw->gt,
+ !(fw->delayed_release_domains & domain_mask) ||
+ !domain->ref);
+ xe_gt_assert(fw->gt,
+ !(fw->sleep_ack_pending_domains & domain_mask) ||
+ !domain->ref);
+ xe_gt_assert(fw->gt,
+ !(fw->sleep_ack_pending_domains & domain_mask) ||
+ !(fw->awake_domains & domain_mask));
+ xe_gt_assert(fw->gt,
+ !(fw->sleep_ack_pending_domains & domain_mask) ||
+ !(fw->delayed_release_domains & domain_mask));
+}
+
+static enum hrtimer_restart xe_force_wake_domain_timer(struct hrtimer *timer)
+{
+ struct xe_force_wake_domain *domain =
+ container_of(timer, struct xe_force_wake_domain, sleep_timer);
+ struct xe_force_wake *fw = domain->fw_back;
+ struct xe_gt *gt = fw->gt;
+
+ xe_gt_assert(gt, !xe_pm_runtime_suspended(gt_to_xe(gt)));
+
+ guard(spinlock_irqsave)(&fw->lock);
+ assert_domain_state(fw, domain);
+
+ if (!(fw->delayed_release_domains & BIT(domain->id)) || domain->ref)
+ return HRTIMER_NORESTART;
+
+ /*
+ * The core dequeues an expiring timer before invoking its callback, so
+ * a queued timer here is a newer hold interval armed by put().
+ */
+ if (hrtimer_is_queued(timer))
+ return HRTIMER_NORESTART;
+
+ fw->delayed_release_domains &= ~BIT(domain->id);
+ fw->sleep_ack_pending_domains |= BIT(domain->id);
+ domain_sleep(gt, domain);
+ fw->awake_domains &= ~BIT(domain->id);
+ assert_domain_state(fw, domain);
+
+ return HRTIMER_NORESTART;
+}
+
/**
* xe_force_wake_get() : Increase the domain refcount
* @fw: struct xe_force_wake
@@ -176,6 +251,7 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
struct xe_gt *gt = fw->gt;
struct xe_force_wake_domain *domain;
unsigned int ref_incr = 0, awake_rqst = 0, awake_failed = 0;
+ unsigned int sleep_failed = 0;
unsigned int tmp, ref_rqst;
unsigned long flags;
@@ -186,11 +262,29 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
ref_rqst = (domains == XE_FORCEWAKE_ALL) ? fw->initialized_domains : domains;
spin_lock_irqsave(&fw->lock, flags);
for_each_fw_domain_masked(domain, ref_rqst, fw, tmp) {
+ assert_domain_state(fw, domain);
if (!domain->ref++) {
- awake_rqst |= BIT(domain->id);
- domain_wake(gt, domain);
+ if (fw->sleep_ack_pending_domains & BIT(domain->id)) {
+ if (domain_sleep_wait(gt, domain))
+ sleep_failed |= BIT(domain->id);
+ fw->sleep_ack_pending_domains &= ~BIT(domain->id);
+ awake_rqst |= BIT(domain->id);
+ domain_wake(gt, domain);
+ } else if ((fw->awake_domains & BIT(domain->id)) &&
+ (fw->delayed_release_domains & BIT(domain->id))) {
+ fw->delayed_release_domains &= ~BIT(domain->id);
+ /*
+ * A running callback will re-check the cleared bit and
+ * nonzero reference under fw->lock before issuing sleep.
+ */
+ hrtimer_try_to_cancel(&domain->sleep_timer);
+ } else {
+ awake_rqst |= BIT(domain->id);
+ domain_wake(gt, domain);
+ }
}
ref_incr |= BIT(domain->id);
+ assert_domain_state(fw, domain);
}
for_each_fw_domain_masked(domain, awake_rqst, fw, tmp) {
if (domain_wake_wait(gt, domain) == 0) {
@@ -203,6 +297,9 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
ref_incr &= ~awake_failed;
spin_unlock_irqrestore(&fw->lock, flags);
+ xe_gt_WARN(gt, sleep_failed,
+ "Forcewake domain%s %#x failed to acknowledge pending sleep request\n",
+ str_plural(hweight_long(sleep_failed)), sleep_failed);
xe_gt_WARN(gt, awake_failed, "Forcewake domain%s %#x failed to acknowledge awake request\n",
str_plural(hweight_long(awake_failed)), awake_failed);
@@ -212,23 +309,14 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
return ref_incr;
}
-/**
- * xe_force_wake_put - Decrement the refcount and put domain to sleep if refcount becomes 0
- * @fw: Pointer to the force wake structure
- * @fw_ref: return of xe_force_wake_get()
- *
- * This function reduces the reference counts for domains in fw_ref. If
- * refcount for any of the specified domain reaches 0, it puts the domain to sleep
- * and waits for acknowledgment for domain to sleep within 50 milisec timeout.
- * Warns in case of timeout of ack from domain.
- */
-void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
+static void __xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref,
+ bool delayed_release)
{
struct xe_gt *gt = fw->gt;
+ struct xe_device *xe = gt_to_xe(gt);
struct xe_force_wake_domain *domain;
- unsigned int tmp, sleep = 0;
+ unsigned int tmp, sleep = 0, ack_fail = 0;
unsigned long flags;
- int ack_fail = 0;
/*
* Avoid unnecessary lock and unlock when the function is called
@@ -242,12 +330,24 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
spin_lock_irqsave(&fw->lock, flags);
for_each_fw_domain_masked(domain, fw_ref, fw, tmp) {
+ assert_domain_state(fw, domain);
xe_gt_assert(gt, domain->ref);
if (!--domain->ref) {
- sleep |= BIT(domain->id);
- domain_sleep(gt, domain);
+ if (delayed_release || domain->delayed_release_requested) {
+ domain->delayed_release_requested = false;
+ fw->delayed_release_domains |= BIT(domain->id);
+ hrtimer_start(&domain->sleep_timer,
+ us_to_ktime(xe->forcewake_hold_delay_us),
+ HRTIMER_MODE_REL);
+ } else {
+ sleep |= BIT(domain->id);
+ domain_sleep(gt, domain);
+ }
+ } else if (delayed_release) {
+ domain->delayed_release_requested = true;
}
+ assert_domain_state(fw, domain);
}
for_each_fw_domain_masked(domain, sleep, fw, tmp) {
if (domain_sleep_wait(gt, domain) == 0)
@@ -261,6 +361,36 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
str_plural(hweight_long(ack_fail)), ack_fail);
}
+/**
+ * xe_force_wake_put - Release forcewake domains
+ * @fw: Pointer to the force wake structure
+ * @fw_ref: Result from xe_force_wake_get()
+ *
+ * Drops the referenced domains. The final put requests sleep and waits for
+ * its ACK, unless a delayed release was previously recorded for the domain.
+ */
+void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
+{
+ __xe_force_wake_put(fw, fw_ref, false);
+}
+
+/**
+ * xe_force_wake_put_delay - Release forcewake after a delay
+ * @fw: Pointer to the force wake structure
+ * @fw_ref: Result from xe_force_wake_get()
+ *
+ * Drops references like xe_force_wake_put(), but delays the sleep request
+ * when the final reference is released. A get before the timer expires reuses
+ * the awake domain without forcewake MMIO; otherwise the timer requests sleep.
+ *
+ * If references remain, the delayed release is recorded and honored by the
+ * put that releases the final reference.
+ */
+void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref)
+{
+ __xe_force_wake_put(fw, fw_ref, true);
+}
+
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
{
switch (id) {
diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
index e2721f205d6c..8da675d8db0b 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.h
+++ b/drivers/gpu/drm/xe/xe_force_wake.h
@@ -11,13 +11,14 @@
struct xe_gt;
-void xe_force_wake_init_gt(struct xe_gt *gt,
- struct xe_force_wake *fw);
+int xe_force_wake_init_gt(struct xe_gt *gt,
+ struct xe_force_wake *fw);
void xe_force_wake_init_engines(struct xe_gt *gt,
struct xe_force_wake *fw);
unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
enum xe_force_wake_domains domains);
void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref);
+void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref);
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id);
@@ -103,6 +104,24 @@ DEFINE_CLASS(xe_force_wake, struct xe_force_wake_ref,
#define xe_with_force_wake(ref, fw, domains) \
__xe_with_force_wake(ref, fw, domains, __UNIQUE_ID(done))
+/*
+ * Same as xe_with_force_wake(), but releases forcewake via
+ * xe_force_wake_put_delay() instead of xe_force_wake_put() on scope exit.
+ * Only use this for hot paths where the caller expects forcewake to be
+ * re-acquired again shortly.
+ */
+DEFINE_CLASS(xe_force_wake_delay, struct xe_force_wake_ref,
+ xe_force_wake_put_delay(_T.fw, _T.domains),
+ xe_force_wake_constructor(fw, domains),
+ struct xe_force_wake *fw, unsigned int domains);
+
+#define __xe_with_force_wake_delay(ref, fw, domains, done) \
+ for (CLASS(xe_force_wake_delay, ref)(fw, domains), *(done) = NULL; \
+ !(done); (done) = (void *)1)
+
+#define xe_with_force_wake_delay(ref, fw, domains) \
+ __xe_with_force_wake_delay(ref, fw, domains, __UNIQUE_ID(done))
+
/*
* Used when xe_force_wake_constructor() has already been called by another
* function and the current function is responsible for releasing the forcewake
diff --git a/drivers/gpu/drm/xe/xe_force_wake_types.h b/drivers/gpu/drm/xe/xe_force_wake_types.h
index 14b7b86e801b..28c6f6dc87a3 100644
--- a/drivers/gpu/drm/xe/xe_force_wake_types.h
+++ b/drivers/gpu/drm/xe/xe_force_wake_types.h
@@ -6,6 +6,7 @@
#ifndef _XE_FORCE_WAKE_TYPES_H_
#define _XE_FORCE_WAKE_TYPES_H_
+#include <linux/hrtimer.h>
#include <linux/mutex.h>
#include <linux/types.h>
@@ -51,6 +52,8 @@ enum xe_force_wake_domains {
XE_FORCEWAKE_ALL = BIT(XE_FW_DOMAIN_ID_COUNT)
};
+struct xe_force_wake;
+
/**
* struct xe_force_wake_domain - Xe force wake power domain
*
@@ -76,12 +79,23 @@ struct xe_force_wake_domain {
struct xe_reg reg_ctl;
/** @reg_ack: domain ack register address */
struct xe_reg reg_ack;
+ /** @sleep_timer: hrtimer for the delayed sleep request */
+ struct hrtimer sleep_timer;
+ /** @fw_back: back pointer to parent xe_force_wake */
+ struct xe_force_wake *fw_back;
/** @val: domain wake write value */
u32 val;
/** @mask: domain mask */
u32 mask;
- /** @ref: domain reference */
+ /** @ref: domain reference, protected by @fw_back->lock */
u32 ref;
+ /**
+ * @delayed_release_requested: xe_force_wake_put_delay() was called
+ * while the domain still had other references held; whichever call
+ * drops the last reference must honor the delayed-release request.
+ * Protected by @fw_back->lock.
+ */
+ bool delayed_release_requested;
};
/**
@@ -101,6 +115,16 @@ struct xe_force_wake {
spinlock_t lock;
/** @awake_domains: mask of all domains awake */
unsigned int awake_domains;
+ /**
+ * @delayed_release_domains: mask of domains in DELAYED HOLD.
+ * Protected by @lock.
+ */
+ unsigned int delayed_release_domains;
+ /**
+ * @sleep_ack_pending_domains: mask of domains in SLEEP SENT.
+ * Protected by @lock.
+ */
+ unsigned int sleep_ack_pending_domains;
/** @initialized_domains: mask of all initialized domains */
unsigned int initialized_domains;
/** @domains: force wake domains */
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index dfdacc0f6de9..efe425dbcc85 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -512,7 +512,10 @@ int xe_gt_init_early(struct xe_gt *gt)
xe_wa_process_gt_oob(gt);
- xe_force_wake_init_gt(gt, gt_to_fw(gt));
+ err = xe_force_wake_init_gt(gt, gt_to_fw(gt));
+ if (err)
+ return err;
+
spin_lock_init(>->global_invl_lock);
err = xe_gt_tlb_inval_init_early(gt);
--
2.43.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v5 3/4] drm/xe/forcewake: flush delayed release at power boundaries
2026-08-13 0:06 ` [PATCH v5 0/4] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
2026-08-13 0:06 ` [PATCH v5 1/4] drm/xe/forcewake: synchronize engine-cycle access with unplug Zongyao Bai
2026-08-13 0:06 ` [PATCH v5 2/4] drm/xe/forcewake: add delayed-release state machine Zongyao Bai
@ 2026-08-13 0:06 ` Zongyao Bai
2026-08-13 0:23 ` sashiko-bot
2026-08-13 0:06 ` [PATCH v5 4/4] drm/xe/forcewake: enable configurable delayed forcewake release Zongyao Bai
3 siblings, 1 reply; 34+ messages in thread
From: Zongyao Bai @ 2026-08-13 0:06 UTC (permalink / raw)
To: intel-xe; +Cc: jia.yao, matthew.brost, Zongyao Bai
Add a synchronous forcewake flush that cancels per-domain timers and
settles pending sleep acknowledgments. Provide a scoped cleanup class
so the final put is always followed by the flush before the caller
continues toward power-off.
Use it for system suspend, runtime suspend, and shutdown. After DRM
unplug has quiesced engine-cycle readers, flush every GT during remove
and post-registration probe unwind so delayed callbacks cannot cross
teardown or a later device FLR.
Suggested-by: Matthew Brost <matthew.brost@intel.com>
Assisted-by: GitHub-Copilot:gpt-5.6-sol
Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
---
drivers/gpu/drm/xe/xe_device.c | 11 ++++++
drivers/gpu/drm/xe/xe_force_wake.c | 49 ++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_force_wake.h | 23 +++++++++++
drivers/gpu/drm/xe/xe_force_wake_types.h | 42 ++++++++++++++++++++
drivers/gpu/drm/xe/xe_gt.c | 7 ++--
5 files changed, 129 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 21d02809c3a4..d69fd8236b0f 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -711,6 +711,15 @@ static void xe_device_sanitize(void *arg)
xe_gt_sanitize(gt);
}
+static void xe_device_force_wake_flush(struct xe_device *xe)
+{
+ struct xe_gt *gt;
+ u8 id;
+
+ for_each_gt(gt, xe, id)
+ xe_force_wake_flush(gt_to_fw(gt));
+}
+
static int xe_set_dma_info(struct xe_device *xe)
{
unsigned int mask_size = xe->info.dma_mask_size;
@@ -1169,6 +1178,7 @@ int xe_device_probe(struct xe_device *xe)
err_unregister_display:
xe_display_unregister(xe);
drm_dev_unplug(&xe->drm);
+ xe_device_force_wake_flush(xe);
return err;
}
@@ -1178,6 +1188,7 @@ void xe_device_remove(struct xe_device *xe)
xe_display_unregister(xe);
drm_dev_unplug(&xe->drm);
+ xe_device_force_wake_flush(xe);
xe_bo_pci_dev_remove_all(xe);
}
diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
index 3f5013c7424c..ef43899e1f7d 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.c
+++ b/drivers/gpu/drm/xe/xe_force_wake.c
@@ -391,6 +391,55 @@ void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref)
__xe_force_wake_put(fw, fw_ref, true);
}
+/**
+ * xe_force_wake_flush - Flush delayed forcewake releases
+ * @fw: Pointer to the force wake structure
+ *
+ * Synchronously cancels delayed-release timers and completes pending sleep
+ * requests and ACK waits. This must be called after the final forcewake put
+ * and before power-off because the timer callback accesses MMIO.
+ *
+ * The caller must ensure no forcewake reference outlives this call and
+ * serialize against new delayed releases or final puts that consume a
+ * recorded delayed-release request. Timers are canceled before taking
+ * fw->lock because their callbacks acquire the same lock.
+ */
+void xe_force_wake_flush(struct xe_force_wake *fw)
+{
+ struct xe_gt *gt = fw->gt;
+ struct xe_force_wake_domain *domain;
+ unsigned int tmp, sleep, ack_fail = 0;
+ unsigned long flags;
+
+ for_each_fw_domain(domain, fw, tmp)
+ hrtimer_cancel(&domain->sleep_timer);
+
+ spin_lock_irqsave(&fw->lock, flags);
+ sleep = fw->sleep_ack_pending_domains;
+ for_each_fw_domain(domain, fw, tmp) {
+ assert_domain_state(fw, domain);
+ domain->delayed_release_requested = false;
+ if ((fw->delayed_release_domains & BIT(domain->id)) &&
+ !domain->ref) {
+ fw->delayed_release_domains &= ~BIT(domain->id);
+ sleep |= BIT(domain->id);
+ domain_sleep(gt, domain);
+ }
+ assert_domain_state(fw, domain);
+ }
+ for_each_fw_domain_masked(domain, sleep, fw, tmp) {
+ fw->sleep_ack_pending_domains &= ~BIT(domain->id);
+ if (domain_sleep_wait(gt, domain) == 0)
+ fw->awake_domains &= ~BIT(domain->id);
+ else
+ ack_fail |= BIT(domain->id);
+ }
+ spin_unlock_irqrestore(&fw->lock, flags);
+
+ xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
+ str_plural(hweight_long(ack_fail)), ack_fail);
+}
+
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id)
{
switch (id) {
diff --git a/drivers/gpu/drm/xe/xe_force_wake.h b/drivers/gpu/drm/xe/xe_force_wake.h
index 8da675d8db0b..ac37a0177d7b 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.h
+++ b/drivers/gpu/drm/xe/xe_force_wake.h
@@ -19,6 +19,23 @@ unsigned int __must_check xe_force_wake_get(struct xe_force_wake *fw,
enum xe_force_wake_domains domains);
void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref);
void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref);
+void xe_force_wake_flush(struct xe_force_wake *fw);
+
+/**
+ * xe_force_wake_put_and_flush - Release forcewake and flush deferred sleep
+ * @fw: Pointer to the force wake structure
+ * @fw_ref: return of xe_force_wake_get()
+ *
+ * Convenience helper for paths that must complete or cancel deferred-release
+ * work before powering off the GT. Sleep acknowledgment failures are reported
+ * by xe_force_wake_flush().
+ */
+static inline void
+xe_force_wake_put_and_flush(struct xe_force_wake *fw, unsigned int fw_ref)
+{
+ xe_force_wake_put(fw, fw_ref);
+ xe_force_wake_flush(fw);
+}
const char *xe_force_wake_domain_to_str(enum xe_force_wake_domain_id id);
@@ -93,6 +110,12 @@ DEFINE_CLASS(xe_force_wake, struct xe_force_wake_ref,
xe_force_wake_constructor(fw, domains),
struct xe_force_wake *fw, unsigned int domains);
+/* Release forcewake and flush delayed-release work on scope exit. */
+DEFINE_CLASS(xe_force_wake_flush, struct xe_force_wake_ref,
+ xe_force_wake_put_and_flush(_T.fw, _T.domains),
+ xe_force_wake_constructor(fw, domains),
+ struct xe_force_wake *fw, unsigned int domains);
+
/*
* Scoped helper for the forcewake class, using the same trick as scoped_guard()
* to bind the lifetime to the next statement/block.
diff --git a/drivers/gpu/drm/xe/xe_force_wake_types.h b/drivers/gpu/drm/xe/xe_force_wake_types.h
index 28c6f6dc87a3..3f20f91b3a70 100644
--- a/drivers/gpu/drm/xe/xe_force_wake_types.h
+++ b/drivers/gpu/drm/xe/xe_force_wake_types.h
@@ -107,6 +107,48 @@ struct xe_force_wake_domain {
* Currently only used for GT power domains (where the term "forcewake" is used
* in the hardware documentation), although the interface could be extended to
* power wells in other parts of the hardware in the future.
+ *
+ * Delayed-release state flow, protected by @lock:
+ *
+ * final delayed put
+ * +------------+ ----------------------> +---------------+
+ * | REFERENCED | | DELAYED HOLD |
+ * | ref > 0 | <---------------------- | ref == 0 |
+ * +------+-----+ get: cancel and reuse +-------+-------+
+ * | |
+ * | | timer expires
+ * final immediate put v
+ * | +---------------+
+ * | | SLEEP SENT |
+ * | | ref == 0 |
+ * | +-------+-------+
+ * | |
+ * v v
+ * +-------------+ <------------------ flush: wait for ACK
+ * | ASLEEP |
+ * | ref == 0 | <--- flush delayed hold
+ * +-------------+
+ *
+ * A get from SLEEP SENT first reconciles the sleep ACK, then wakes the
+ * domain and returns it to REFERENCED. A delayed put that is not the final
+ * put sets domain->delayed_release_requested. The final put consumes that
+ * request and transitions the domain to DELAYED HOLD.
+ *
+ * Successful-path state representation at stable boundaries:
+ *
+ * REFERENCED:
+ * domain->ref > 0; domain->delayed_release_requested may be set.
+ *
+ * DELAYED HOLD:
+ * domain->ref == 0; @delayed_release_domains contains the domain.
+ *
+ * SLEEP SENT:
+ * domain->ref == 0; @sleep_ack_pending_domains contains the domain and
+ * @awake_domains does not.
+ *
+ * ASLEEP:
+ * domain->ref == 0; neither delayed-release state mask nor @awake_domains
+ * contains the domain.
*/
struct xe_force_wake {
/** @gt: back pointers to GT */
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index efe425dbcc85..8e7c5f82d362 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -1013,7 +1013,7 @@ int xe_gt_suspend(struct xe_gt *gt)
xe_gt_dbg(gt, "suspending\n");
xe_gt_sanitize(gt);
- CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+ CLASS(xe_force_wake_flush, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
xe_gt_err(gt, "suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
return -ETIMEDOUT;
@@ -1036,7 +1036,8 @@ int xe_gt_suspend(struct xe_gt *gt)
void xe_gt_shutdown(struct xe_gt *gt)
{
- CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+ CLASS(xe_force_wake_flush, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+
do_gt_reset(gt);
}
@@ -1092,7 +1093,7 @@ int xe_gt_runtime_suspend(struct xe_gt *gt)
{
xe_gt_dbg(gt, "runtime suspending\n");
- CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
+ CLASS(xe_force_wake_flush, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
if (!xe_force_wake_ref_has_domain(fw_ref.domains, XE_FORCEWAKE_ALL)) {
xe_gt_err(gt, "runtime suspend failed (%pe)\n", ERR_PTR(-ETIMEDOUT));
return -ETIMEDOUT;
--
2.43.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v5 4/4] drm/xe/forcewake: enable configurable delayed forcewake release
2026-08-13 0:06 ` [PATCH v5 0/4] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (2 preceding siblings ...)
2026-08-13 0:06 ` [PATCH v5 3/4] drm/xe/forcewake: flush delayed release at power boundaries Zongyao Bai
@ 2026-08-13 0:06 ` Zongyao Bai
2026-08-13 0:18 ` sashiko-bot
3 siblings, 1 reply; 34+ messages in thread
From: Zongyao Bai @ 2026-08-13 0:06 UTC (permalink / raw)
To: intel-xe; +Cc: jia.yao, matthew.brost, Zongyao Bai
Enable delayed forcewake release for engine-cycle queries used by
tools such as VTune and PTI. Bursts of queries can reuse an already
awake domain, avoiding another wake request and ACK wait. Only
engine-cycle queries request delayed release; all other forcewake users
continue to request immediate release.
Add the bind-time configfs forcewake_hold_delay_us attribute to control
the hold interval. It defaults to 100 us and accepts values from 1 to
U32_MAX microseconds. Runtime and system suspend cancel and settle
outstanding delayed releases before power-off. Longer intervals trade
higher power use for more opportunities to reuse an awake domain.
Suggested-by: Matthew Brost <matthew.brost@intel.com>
Assisted-by: GitHub-Copilot:gpt-5.6-sol
Assisted-by: GitHub-Copilot:claude-opus-4.8
Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
---
drivers/gpu/drm/xe/xe_configfs.c | 72 ++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_configfs.h | 5 +++
drivers/gpu/drm/xe/xe_device.c | 3 +-
drivers/gpu/drm/xe/xe_force_wake.c | 2 +-
drivers/gpu/drm/xe/xe_query.c | 2 +-
5 files changed, 81 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 052cce962161..3d8cd6fb165e 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -249,6 +249,23 @@
*
* This attribute can only be set before binding to the device.
*
+ * Force wake hold delay
+ * ---------------------
+ *
+ * Delay in microseconds before an idle forcewake domain is put to sleep after
+ * an opt-in delayed release. Currently, only engine-cycle queries use this
+ * interval; normal forcewake puts remain immediate. Keeping the domain awake
+ * for this short window lets rapid back-to-back accesses reuse it without
+ * paying for another wake + ACK cycle. The default is 100 microseconds. Valid
+ * values range from 1 through U32_MAX microseconds; zero is rejected with
+ * -EINVAL. Runtime and system suspend cancel outstanding hold intervals before
+ * power-off. Large values may increase power use while the device remains
+ * active. Example::
+ *
+ * # echo 100 > /sys/kernel/config/xe/0000:03:00.0/forcewake_hold_delay_us
+ *
+ * This attribute can only be set before binding to the device.
+ *
* Remove devices
* ==============
*
@@ -275,6 +292,7 @@ struct xe_config_group_device {
bool survivability_mode;
bool enable_psmi;
bool enable_multi_queue;
+ u32 forcewake_hold_delay_us;
struct {
unsigned int max_vfs;
bool admin_only_pf;
@@ -295,6 +313,7 @@ static const struct xe_config_device device_defaults = {
.survivability_mode = false,
.enable_psmi = false,
.enable_multi_queue = true,
+ .forcewake_hold_delay_us = XE_DEFAULT_FORCE_WAKE_HOLD_DELAY_US,
.sriov = {
.max_vfs = XE_DEFAULT_MAX_VFS,
.admin_only_pf = XE_DEFAULT_ADMIN_ONLY_PF,
@@ -616,6 +635,36 @@ static ssize_t enable_multi_queue_store(struct config_item *item, const char *pa
return len;
}
+static ssize_t forcewake_hold_delay_us_show(struct config_item *item, char *page)
+{
+ struct xe_config_device *dev = to_xe_config_device(item);
+
+ return sprintf(page, "%u\n", dev->forcewake_hold_delay_us);
+}
+
+static ssize_t forcewake_hold_delay_us_store(struct config_item *item,
+ const char *page, size_t len)
+{
+ struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ u32 val;
+ int ret;
+
+ ret = kstrtouint(page, 0, &val);
+ if (ret)
+ return ret;
+
+ if (!val)
+ return -EINVAL;
+
+ guard(mutex)(&dev->lock);
+ if (is_bound(dev))
+ return -EBUSY;
+
+ dev->config.forcewake_hold_delay_us = val;
+
+ return len;
+}
+
static bool wa_bb_read_advance(bool dereference, char **p,
const char *append, size_t len,
size_t *max_size)
@@ -856,6 +905,7 @@ CONFIGFS_ATTR(, ctx_restore_post_bb);
CONFIGFS_ATTR(, enable_multi_queue);
CONFIGFS_ATTR(, enable_psmi);
CONFIGFS_ATTR(, engines_allowed);
+CONFIGFS_ATTR(, forcewake_hold_delay_us);
CONFIGFS_ATTR(, gt_types_allowed);
CONFIGFS_ATTR(, survivability_mode);
@@ -865,6 +915,7 @@ static struct configfs_attribute *xe_config_device_attrs[] = {
&attr_enable_multi_queue,
&attr_enable_psmi,
&attr_engines_allowed,
+ &attr_forcewake_hold_delay_us,
&attr_gt_types_allowed,
&attr_survivability_mode,
NULL,
@@ -1143,6 +1194,7 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
PRI_CUSTOM_ATTR("%d", enable_multi_queue);
PRI_CUSTOM_ATTR("%d", enable_psmi);
PRI_CUSTOM_ATTR("%d", survivability_mode);
+ PRI_CUSTOM_ATTR("%u", forcewake_hold_delay_us);
PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
#undef PRI_CUSTOM_ATTR
@@ -1290,6 +1342,26 @@ bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev)
return ret;
}
+/**
+ * xe_configfs_get_forcewake_hold_delay_us - get configfs forcewake_hold_delay_us setting
+ * @pdev: pci device
+ *
+ * Return: forcewake_hold_delay_us setting in configfs
+ */
+u32 xe_configfs_get_forcewake_hold_delay_us(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+ u32 ret;
+
+ if (!dev)
+ return device_defaults.forcewake_hold_delay_us;
+
+ ret = dev->config.forcewake_hold_delay_us;
+ config_group_put(&dev->group);
+
+ return ret;
+}
+
/**
* xe_configfs_get_ctx_restore_mid_bb - get configfs ctx_restore_mid_bb setting
* @pdev: pci device
diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
index 4fbbeafba473..77abc83a6f70 100644
--- a/drivers/gpu/drm/xe/xe_configfs.h
+++ b/drivers/gpu/drm/xe/xe_configfs.h
@@ -24,6 +24,7 @@ bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev);
+u32 xe_configfs_get_forcewake_hold_delay_us(struct pci_dev *pdev);
u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
enum xe_engine_class class,
const u32 **cs);
@@ -44,6 +45,10 @@ static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return t
static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
static inline bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev) { return true; }
+static inline u32 xe_configfs_get_forcewake_hold_delay_us(struct pci_dev *pdev)
+{
+ return XE_DEFAULT_FORCE_WAKE_HOLD_DELAY_US;
+}
static inline u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
enum xe_engine_class class,
const u32 **cs) { return 0; }
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index d69fd8236b0f..196eaa3973e9 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -552,7 +552,8 @@ int xe_device_init_early(struct xe_device *xe)
xe_device_parse_modparam(xe);
- xe->forcewake_hold_delay_us = XE_DEFAULT_FORCE_WAKE_HOLD_DELAY_US;
+ xe->forcewake_hold_delay_us =
+ xe_configfs_get_forcewake_hold_delay_us(to_pci_dev(xe->drm.dev));
err = xe_irq_init(xe);
if (err)
diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
index ef43899e1f7d..dc25f77d5f83 100644
--- a/drivers/gpu/drm/xe/xe_force_wake.c
+++ b/drivers/gpu/drm/xe/xe_force_wake.c
@@ -375,7 +375,7 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
}
/**
- * xe_force_wake_put_delay - Release forcewake after a delay
+ * xe_force_wake_put_delay - Release forcewake after a configurable delay
* @fw: Pointer to the force wake structure
* @fw_ref: Result from xe_force_wake_get()
*
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 3c356bc48e2a..628d587e79e1 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -168,7 +168,7 @@ query_engine_cycles(struct xe_device *xe,
fw_domain = xe_hw_engine_to_fw_domain(hwe);
- xe_with_force_wake(fw_ref, gt_to_fw(gt), fw_domain) {
+ xe_with_force_wake_delay(fw_ref, gt_to_fw(gt), fw_domain) {
if (!xe_force_wake_ref_has_domain(fw_ref.domains, fw_domain)) {
err = -EIO;
goto out;
--
2.43.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* ✗ CI.checkpatch: warning for drm/xe/forcewake: add delayed-release optimization (rev5)
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (17 preceding siblings ...)
2026-08-13 0:06 ` [PATCH v5 0/4] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
@ 2026-08-13 0:13 ` Patchwork
2026-08-13 0:15 ` ✓ CI.KUnit: success " Patchwork
19 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2026-08-13 0:13 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
== Series Details ==
Series: drm/xe/forcewake: add delayed-release optimization (rev5)
URL : https://patchwork.freedesktop.org/series/167697/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 41fe5f0484cedabba39f47ff346d9290a8df708c
Author: Zongyao Bai <zongyao.bai@intel.com>
Date: Thu Aug 13 00:06:54 2026 +0000
drm/xe/forcewake: enable configurable delayed forcewake release
Enable delayed forcewake release for engine-cycle queries used by
tools such as VTune and PTI. Bursts of queries can reuse an already
awake domain, avoiding another wake request and ACK wait. Only
engine-cycle queries request delayed release; all other forcewake users
continue to request immediate release.
Add the bind-time configfs forcewake_hold_delay_us attribute to control
the hold interval. It defaults to 100 us and accepts values from 1 to
U32_MAX microseconds. Runtime and system suspend cancel and settle
outstanding delayed releases before power-off. Longer intervals trade
higher power use for more opportunities to reuse an awake domain.
Suggested-by: Matthew Brost <matthew.brost@intel.com>
Assisted-by: GitHub-Copilot:gpt-5.6-sol
Assisted-by: GitHub-Copilot:claude-opus-4.8
Signed-off-by: Zongyao Bai <zongyao.bai@intel.com>
+ /mt/dim checkpatch 707b81710802330f08e561e54d174f74abdb10e5 drm-intel
f7a1ee94feef drm/xe/forcewake: synchronize engine-cycle access with unplug
ee83ee075600 drm/xe/forcewake: add delayed-release state machine
-:372: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'done' - possible side-effects?
#372: FILE: drivers/gpu/drm/xe/xe_force_wake.h:118:
+#define __xe_with_force_wake_delay(ref, fw, domains, done) \
+ for (CLASS(xe_force_wake_delay, ref)(fw, domains), *(done) = NULL; \
+ !(done); (done) = (void *)1)
total: 0 errors, 0 warnings, 1 checks, 383 lines checked
3487b5031ec3 drm/xe/forcewake: flush delayed release at power boundaries
41fe5f0484ce drm/xe/forcewake: enable configurable delayed forcewake release
^ permalink raw reply [flat|nested] 34+ messages in thread
* ✓ CI.KUnit: success for drm/xe/forcewake: add delayed-release optimization (rev5)
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
` (18 preceding siblings ...)
2026-08-13 0:13 ` ✗ CI.checkpatch: warning for drm/xe/forcewake: add delayed-release optimization (rev5) Patchwork
@ 2026-08-13 0:15 ` Patchwork
19 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2026-08-13 0:15 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
== Series Details ==
Series: drm/xe/forcewake: add delayed-release optimization (rev5)
URL : https://patchwork.freedesktop.org/series/167697/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[00:13:22] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[00:13:26] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[00:13:46] Starting KUnit Kernel (1/1)...
[00:13:46] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[00:13:46] ================= gpu_buddy (13 subtests) ==================
[00:13:46] [PASSED] gpu_test_buddy_alloc_limit
[00:13:46] [PASSED] gpu_test_buddy_alloc_optimistic
[00:13:46] [PASSED] gpu_test_buddy_alloc_pessimistic
[00:13:46] [PASSED] gpu_test_buddy_alloc_pathological
[00:13:46] [PASSED] gpu_test_buddy_alloc_contiguous
[00:13:46] [PASSED] gpu_test_buddy_alloc_clear
[00:13:46] [PASSED] gpu_test_buddy_alloc_range
[00:13:47] [PASSED] gpu_test_buddy_alloc_range_bias
[00:13:47] [PASSED] gpu_test_buddy_fragmentation_performance
[00:13:47] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[00:13:47] [PASSED] gpu_test_buddy_offset_aligned_allocation
[00:13:47] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[00:13:47] [PASSED] gpu_test_buddy_addr_to_block
[00:13:47] ==================== [PASSED] gpu_buddy ====================
[00:13:47] ============================================================
[00:13:47] Testing complete. Ran 13 tests: passed: 13
[00:13:47] Elapsed time: 24.962s total, 4.358s configuring, 20.189s building, 0.392s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[00:13:47] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[00:13:49] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[00:14:22] Starting KUnit Kernel (1/1)...
[00:14:22] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[00:14:22] ================== guc_buf (11 subtests) ===================
[00:14:22] [PASSED] test_smallest
[00:14:22] [PASSED] test_largest
[00:14:22] [PASSED] test_granular
[00:14:22] [PASSED] test_unique
[00:14:22] [PASSED] test_overlap
[00:14:22] [PASSED] test_reusable
[00:14:22] [PASSED] test_too_big
[00:14:22] [PASSED] test_flush
[00:14:22] [PASSED] test_lookup
[00:14:22] [PASSED] test_data
[00:14:22] [PASSED] test_class
[00:14:22] ===================== [PASSED] guc_buf =====================
[00:14:22] =================== guc_dbm (7 subtests) ===================
[00:14:22] [PASSED] test_empty
[00:14:22] [PASSED] test_default
[00:14:22] ======================== test_size ========================
[00:14:22] [PASSED] 4
[00:14:22] [PASSED] 8
[00:14:22] [PASSED] 32
[00:14:22] [PASSED] 256
[00:14:22] ==================== [PASSED] test_size ====================
[00:14:22] ======================= test_reuse ========================
[00:14:22] [PASSED] 4
[00:14:22] [PASSED] 8
[00:14:22] [PASSED] 32
[00:14:22] [PASSED] 256
[00:14:22] =================== [PASSED] test_reuse ====================
[00:14:22] =================== test_range_overlap ====================
[00:14:22] [PASSED] 4
[00:14:22] [PASSED] 8
[00:14:22] [PASSED] 32
[00:14:22] [PASSED] 256
[00:14:22] =============== [PASSED] test_range_overlap ================
[00:14:22] =================== test_range_compact ====================
[00:14:22] [PASSED] 4
[00:14:22] [PASSED] 8
[00:14:22] [PASSED] 32
[00:14:22] [PASSED] 256
[00:14:22] =============== [PASSED] test_range_compact ================
[00:14:22] ==================== test_range_spare =====================
[00:14:22] [PASSED] 4
[00:14:22] [PASSED] 8
[00:14:22] [PASSED] 32
[00:14:22] [PASSED] 256
[00:14:22] ================ [PASSED] test_range_spare =================
[00:14:22] ===================== [PASSED] guc_dbm =====================
[00:14:22] =================== guc_idm (6 subtests) ===================
[00:14:22] [PASSED] bad_init
[00:14:22] [PASSED] no_init
[00:14:22] [PASSED] init_fini
[00:14:22] [PASSED] check_used
[00:14:22] [PASSED] check_quota
[00:14:22] [PASSED] check_all
[00:14:22] ===================== [PASSED] guc_idm =====================
[00:14:22] =============== guc_klv_helpers (9 subtests) ===============
[00:14:22] [PASSED] test_count
[00:14:22] [PASSED] test_encode_u32
[00:14:22] [PASSED] test_encode_u64
[00:14:22] [PASSED] test_encode_string
[00:14:22] [PASSED] test_encode_object_raw
[00:14:22] [PASSED] test_encode_object_klv
[00:14:22] [PASSED] test_encode_object_nested
[00:14:22] [PASSED] test_encode_object_basic
[00:14:22] [PASSED] test_print
[00:14:22] ================= [PASSED] guc_klv_helpers =================
[00:14:22] ================== no_relay (3 subtests) ===================
[00:14:22] [PASSED] xe_drops_guc2pf_if_not_ready
[00:14:22] [PASSED] xe_drops_guc2vf_if_not_ready
[00:14:22] [PASSED] xe_rejects_send_if_not_ready
[00:14:22] ==================== [PASSED] no_relay =====================
[00:14:22] ================== pf_relay (14 subtests) ==================
[00:14:22] [PASSED] pf_rejects_guc2pf_too_short
[00:14:22] [PASSED] pf_rejects_guc2pf_too_long
[00:14:22] [PASSED] pf_rejects_guc2pf_no_payload
[00:14:22] [PASSED] pf_fails_no_payload
[00:14:22] [PASSED] pf_fails_bad_origin
[00:14:22] [PASSED] pf_fails_bad_type
[00:14:22] [PASSED] pf_txn_reports_error
[00:14:22] [PASSED] pf_txn_sends_pf2guc
[00:14:22] [PASSED] pf_sends_pf2guc
[00:14:22] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[00:14:22] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[00:14:22] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[00:14:22] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[00:14:22] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[00:14:22] ==================== [PASSED] pf_relay =====================
[00:14:22] ================== vf_relay (3 subtests) ===================
[00:14:22] [PASSED] vf_rejects_guc2vf_too_short
[00:14:22] [PASSED] vf_rejects_guc2vf_too_long
[00:14:22] [PASSED] vf_rejects_guc2vf_no_payload
[00:14:22] ==================== [PASSED] vf_relay =====================
[00:14:22] ================ pf_gt_config (9 subtests) =================
[00:14:22] [PASSED] fair_contexts_1vf
[00:14:22] [PASSED] fair_doorbells_1vf
[00:14:22] [PASSED] fair_ggtt_1vf
[00:14:22] ====================== fair_vram_1vf ======================
[00:14:22] [PASSED] 3.50 GiB
[00:14:22] [PASSED] 11.5 GiB
[00:14:22] [PASSED] 15.5 GiB
[00:14:22] [PASSED] 31.5 GiB
[00:14:22] [PASSED] 63.5 GiB
[00:14:22] [PASSED] 1.91 GiB
[00:14:22] ================== [PASSED] fair_vram_1vf ==================
[00:14:22] ================ fair_vram_1vf_admin_only =================
[00:14:22] [PASSED] 3.50 GiB
[00:14:22] [PASSED] 11.5 GiB
[00:14:22] [PASSED] 15.5 GiB
[00:14:22] [PASSED] 31.5 GiB
[00:14:22] [PASSED] 63.5 GiB
[00:14:22] [PASSED] 1.91 GiB
[00:14:22] ============ [PASSED] fair_vram_1vf_admin_only =============
[00:14:22] ====================== fair_contexts ======================
[00:14:22] [PASSED] 1 VF
[00:14:22] [PASSED] 2 VFs
[00:14:22] [PASSED] 3 VFs
[00:14:22] [PASSED] 4 VFs
[00:14:22] [PASSED] 5 VFs
[00:14:22] [PASSED] 6 VFs
[00:14:22] [PASSED] 7 VFs
[00:14:22] [PASSED] 8 VFs
[00:14:22] [PASSED] 9 VFs
[00:14:22] [PASSED] 10 VFs
[00:14:22] [PASSED] 11 VFs
[00:14:22] [PASSED] 12 VFs
[00:14:22] [PASSED] 13 VFs
[00:14:22] [PASSED] 14 VFs
[00:14:22] [PASSED] 15 VFs
[00:14:22] [PASSED] 16 VFs
[00:14:22] [PASSED] 17 VFs
[00:14:22] [PASSED] 18 VFs
[00:14:22] [PASSED] 19 VFs
[00:14:22] [PASSED] 20 VFs
[00:14:22] [PASSED] 21 VFs
[00:14:22] [PASSED] 22 VFs
[00:14:22] [PASSED] 23 VFs
[00:14:22] [PASSED] 24 VFs
[00:14:22] [PASSED] 25 VFs
[00:14:22] [PASSED] 26 VFs
[00:14:22] [PASSED] 27 VFs
[00:14:22] [PASSED] 28 VFs
[00:14:22] [PASSED] 29 VFs
[00:14:22] [PASSED] 30 VFs
[00:14:22] [PASSED] 31 VFs
[00:14:22] [PASSED] 32 VFs
[00:14:22] [PASSED] 33 VFs
[00:14:22] [PASSED] 34 VFs
[00:14:22] [PASSED] 35 VFs
[00:14:22] [PASSED] 36 VFs
[00:14:22] [PASSED] 37 VFs
[00:14:22] [PASSED] 38 VFs
[00:14:22] [PASSED] 39 VFs
[00:14:22] [PASSED] 40 VFs
[00:14:22] [PASSED] 41 VFs
[00:14:22] [PASSED] 42 VFs
[00:14:22] [PASSED] 43 VFs
[00:14:22] [PASSED] 44 VFs
[00:14:22] [PASSED] 45 VFs
[00:14:22] [PASSED] 46 VFs
[00:14:22] [PASSED] 47 VFs
[00:14:22] [PASSED] 48 VFs
[00:14:22] [PASSED] 49 VFs
[00:14:22] [PASSED] 50 VFs
[00:14:22] [PASSED] 51 VFs
[00:14:22] [PASSED] 52 VFs
[00:14:22] [PASSED] 53 VFs
[00:14:22] [PASSED] 54 VFs
[00:14:22] [PASSED] 55 VFs
[00:14:22] [PASSED] 56 VFs
[00:14:22] [PASSED] 57 VFs
[00:14:22] [PASSED] 58 VFs
[00:14:22] [PASSED] 59 VFs
[00:14:22] [PASSED] 60 VFs
[00:14:22] [PASSED] 61 VFs
[00:14:22] [PASSED] 62 VFs
[00:14:22] [PASSED] 63 VFs
[00:14:22] ================== [PASSED] fair_contexts ==================
[00:14:22] ===================== fair_doorbells ======================
[00:14:22] [PASSED] 1 VF
[00:14:22] [PASSED] 2 VFs
[00:14:22] [PASSED] 3 VFs
[00:14:22] [PASSED] 4 VFs
[00:14:22] [PASSED] 5 VFs
[00:14:22] [PASSED] 6 VFs
[00:14:22] [PASSED] 7 VFs
[00:14:22] [PASSED] 8 VFs
[00:14:22] [PASSED] 9 VFs
[00:14:22] [PASSED] 10 VFs
[00:14:22] [PASSED] 11 VFs
[00:14:22] [PASSED] 12 VFs
[00:14:22] [PASSED] 13 VFs
[00:14:22] [PASSED] 14 VFs
[00:14:22] [PASSED] 15 VFs
[00:14:22] [PASSED] 16 VFs
[00:14:22] [PASSED] 17 VFs
[00:14:22] [PASSED] 18 VFs
[00:14:22] [PASSED] 19 VFs
[00:14:22] [PASSED] 20 VFs
[00:14:22] [PASSED] 21 VFs
[00:14:22] [PASSED] 22 VFs
[00:14:22] [PASSED] 23 VFs
[00:14:22] [PASSED] 24 VFs
[00:14:22] [PASSED] 25 VFs
[00:14:22] [PASSED] 26 VFs
[00:14:22] [PASSED] 27 VFs
[00:14:22] [PASSED] 28 VFs
[00:14:22] [PASSED] 29 VFs
[00:14:22] [PASSED] 30 VFs
[00:14:22] [PASSED] 31 VFs
[00:14:22] [PASSED] 32 VFs
[00:14:22] [PASSED] 33 VFs
[00:14:22] [PASSED] 34 VFs
[00:14:22] [PASSED] 35 VFs
[00:14:22] [PASSED] 36 VFs
[00:14:22] [PASSED] 37 VFs
[00:14:22] [PASSED] 38 VFs
[00:14:22] [PASSED] 39 VFs
[00:14:22] [PASSED] 40 VFs
[00:14:22] [PASSED] 41 VFs
[00:14:22] [PASSED] 42 VFs
[00:14:22] [PASSED] 43 VFs
[00:14:22] [PASSED] 44 VFs
[00:14:22] [PASSED] 45 VFs
[00:14:22] [PASSED] 46 VFs
[00:14:22] [PASSED] 47 VFs
[00:14:22] [PASSED] 48 VFs
[00:14:22] [PASSED] 49 VFs
[00:14:22] [PASSED] 50 VFs
[00:14:22] [PASSED] 51 VFs
[00:14:22] [PASSED] 52 VFs
[00:14:22] [PASSED] 53 VFs
[00:14:22] [PASSED] 54 VFs
[00:14:22] [PASSED] 55 VFs
[00:14:22] [PASSED] 56 VFs
[00:14:22] [PASSED] 57 VFs
[00:14:22] [PASSED] 58 VFs
[00:14:22] [PASSED] 59 VFs
[00:14:22] [PASSED] 60 VFs
[00:14:22] [PASSED] 61 VFs
[00:14:22] [PASSED] 62 VFs
[00:14:22] [PASSED] 63 VFs
[00:14:22] ================= [PASSED] fair_doorbells ==================
[00:14:22] ======================== fair_ggtt ========================
[00:14:22] [PASSED] 1 VF
[00:14:22] [PASSED] 2 VFs
[00:14:22] [PASSED] 3 VFs
[00:14:22] [PASSED] 4 VFs
[00:14:22] [PASSED] 5 VFs
[00:14:22] [PASSED] 6 VFs
[00:14:22] [PASSED] 7 VFs
[00:14:22] [PASSED] 8 VFs
[00:14:22] [PASSED] 9 VFs
[00:14:22] [PASSED] 10 VFs
[00:14:22] [PASSED] 11 VFs
[00:14:22] [PASSED] 12 VFs
[00:14:22] [PASSED] 13 VFs
[00:14:22] [PASSED] 14 VFs
[00:14:22] [PASSED] 15 VFs
[00:14:22] [PASSED] 16 VFs
[00:14:22] [PASSED] 17 VFs
[00:14:22] [PASSED] 18 VFs
[00:14:22] [PASSED] 19 VFs
[00:14:22] [PASSED] 20 VFs
[00:14:22] [PASSED] 21 VFs
[00:14:22] [PASSED] 22 VFs
[00:14:22] [PASSED] 23 VFs
[00:14:22] [PASSED] 24 VFs
[00:14:22] [PASSED] 25 VFs
[00:14:22] [PASSED] 26 VFs
[00:14:22] [PASSED] 27 VFs
[00:14:22] [PASSED] 28 VFs
[00:14:22] [PASSED] 29 VFs
[00:14:22] [PASSED] 30 VFs
[00:14:22] [PASSED] 31 VFs
[00:14:22] [PASSED] 32 VFs
[00:14:22] [PASSED] 33 VFs
[00:14:22] [PASSED] 34 VFs
[00:14:22] [PASSED] 35 VFs
[00:14:22] [PASSED] 36 VFs
[00:14:22] [PASSED] 37 VFs
[00:14:22] [PASSED] 38 VFs
[00:14:22] [PASSED] 39 VFs
[00:14:22] [PASSED] 40 VFs
[00:14:22] [PASSED] 41 VFs
[00:14:22] [PASSED] 42 VFs
[00:14:22] [PASSED] 43 VFs
[00:14:22] [PASSED] 44 VFs
[00:14:22] [PASSED] 45 VFs
[00:14:22] [PASSED] 46 VFs
[00:14:22] [PASSED] 47 VFs
[00:14:22] [PASSED] 48 VFs
[00:14:22] [PASSED] 49 VFs
[00:14:22] [PASSED] 50 VFs
[00:14:22] [PASSED] 51 VFs
[00:14:22] [PASSED] 52 VFs
[00:14:22] [PASSED] 53 VFs
[00:14:22] [PASSED] 54 VFs
[00:14:22] [PASSED] 55 VFs
[00:14:22] [PASSED] 56 VFs
[00:14:22] [PASSED] 57 VFs
[00:14:22] [PASSED] 58 VFs
[00:14:22] [PASSED] 59 VFs
[00:14:22] [PASSED] 60 VFs
[00:14:22] [PASSED] 61 VFs
[00:14:22] [PASSED] 62 VFs
[00:14:22] [PASSED] 63 VFs
[00:14:22] ==================== [PASSED] fair_ggtt ====================
[00:14:22] ======================== fair_vram ========================
[00:14:22] [PASSED] 1 VF
[00:14:22] [PASSED] 2 VFs
[00:14:22] [PASSED] 3 VFs
[00:14:22] [PASSED] 4 VFs
[00:14:22] [PASSED] 5 VFs
[00:14:22] [PASSED] 6 VFs
[00:14:22] [PASSED] 7 VFs
[00:14:22] [PASSED] 8 VFs
[00:14:22] [PASSED] 9 VFs
[00:14:22] [PASSED] 10 VFs
[00:14:22] [PASSED] 11 VFs
[00:14:22] [PASSED] 12 VFs
[00:14:22] [PASSED] 13 VFs
[00:14:22] [PASSED] 14 VFs
[00:14:22] [PASSED] 15 VFs
[00:14:22] [PASSED] 16 VFs
[00:14:22] [PASSED] 17 VFs
[00:14:22] [PASSED] 18 VFs
[00:14:22] [PASSED] 19 VFs
[00:14:22] [PASSED] 20 VFs
[00:14:22] [PASSED] 21 VFs
[00:14:22] [PASSED] 22 VFs
[00:14:22] [PASSED] 23 VFs
[00:14:22] [PASSED] 24 VFs
[00:14:22] [PASSED] 25 VFs
[00:14:22] [PASSED] 26 VFs
[00:14:22] [PASSED] 27 VFs
[00:14:22] [PASSED] 28 VFs
[00:14:22] [PASSED] 29 VFs
[00:14:22] [PASSED] 30 VFs
[00:14:22] [PASSED] 31 VFs
[00:14:22] [PASSED] 32 VFs
[00:14:22] [PASSED] 33 VFs
[00:14:22] [PASSED] 34 VFs
[00:14:22] [PASSED] 35 VFs
[00:14:22] [PASSED] 36 VFs
[00:14:22] [PASSED] 37 VFs
[00:14:22] [PASSED] 38 VFs
[00:14:22] [PASSED] 39 VFs
[00:14:22] [PASSED] 40 VFs
[00:14:22] [PASSED] 41 VFs
[00:14:22] [PASSED] 42 VFs
[00:14:22] [PASSED] 43 VFs
[00:14:22] [PASSED] 44 VFs
[00:14:22] [PASSED] 45 VFs
[00:14:22] [PASSED] 46 VFs
[00:14:22] [PASSED] 47 VFs
[00:14:22] [PASSED] 48 VFs
[00:14:22] [PASSED] 49 VFs
[00:14:22] [PASSED] 50 VFs
[00:14:22] [PASSED] 51 VFs
[00:14:22] [PASSED] 52 VFs
[00:14:22] [PASSED] 53 VFs
[00:14:22] [PASSED] 54 VFs
[00:14:22] [PASSED] 55 VFs
[00:14:22] [PASSED] 56 VFs
[00:14:22] [PASSED] 57 VFs
[00:14:22] [PASSED] 58 VFs
[00:14:22] [PASSED] 59 VFs
[00:14:22] [PASSED] 60 VFs
[00:14:22] [PASSED] 61 VFs
[00:14:22] [PASSED] 62 VFs
[00:14:22] [PASSED] 63 VFs
[00:14:22] ==================== [PASSED] fair_vram ====================
[00:14:22] ================== [PASSED] pf_gt_config ===================
[00:14:22] ===================== lmtt (1 subtest) =====================
[00:14:22] ======================== test_ops =========================
[00:14:22] [PASSED] 2-level
[00:14:22] [PASSED] multi-level
[00:14:22] ==================== [PASSED] test_ops =====================
[00:14:22] ====================== [PASSED] lmtt =======================
[00:14:22] ================= sriov_packet (1 subtest) =================
[00:14:22] [PASSED] test_descriptor_init
[00:14:22] ================== [PASSED] sriov_packet ===================
[00:14:22] ================= pf_service (11 subtests) =================
[00:14:22] [PASSED] pf_negotiate_any
[00:14:22] [PASSED] pf_negotiate_base_match
[00:14:22] [PASSED] pf_negotiate_base_newer
[00:14:22] [PASSED] pf_negotiate_base_next
[00:14:22] [SKIPPED] pf_negotiate_base_older (no older minor)
[00:14:22] [PASSED] pf_negotiate_base_prev
[00:14:22] [PASSED] pf_negotiate_latest_match
[00:14:22] [PASSED] pf_negotiate_latest_newer
[00:14:22] [PASSED] pf_negotiate_latest_next
[00:14:22] [SKIPPED] pf_negotiate_latest_older (no older minor)
[00:14:22] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[00:14:22] =================== [PASSED] pf_service ====================
[00:14:22] ================= xe_guc_g2g (2 subtests) ==================
[00:14:22] ============== xe_live_guc_g2g_kunit_default ==============
[00:14:22] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[00:14:22] ============== xe_live_guc_g2g_kunit_allmem ===============
[00:14:22] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[00:14:22] =================== [SKIPPED] xe_guc_g2g ===================
[00:14:22] =================== xe_mocs (2 subtests) ===================
[00:14:22] ================ xe_live_mocs_kernel_kunit ================
[00:14:22] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[00:14:22] ================ xe_live_mocs_reset_kunit =================
[00:14:22] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[00:14:22] ==================== [SKIPPED] xe_mocs =====================
[00:14:22] ================= xe_migrate (2 subtests) ==================
[00:14:22] ================= xe_migrate_sanity_kunit =================
[00:14:22] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[00:14:22] ================== xe_validate_ccs_kunit ==================
[00:14:22] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[00:14:22] =================== [SKIPPED] xe_migrate ===================
[00:14:22] ================== xe_dma_buf (1 subtest) ==================
[00:14:22] ==================== xe_dma_buf_kunit =====================
[00:14:22] ================ [SKIPPED] xe_dma_buf_kunit ================
[00:14:22] =================== [SKIPPED] xe_dma_buf ===================
[00:14:22] ================= xe_bo_shrink (1 subtest) =================
[00:14:22] =================== xe_bo_shrink_kunit ====================
[00:14:22] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[00:14:22] ================== [SKIPPED] xe_bo_shrink ==================
[00:14:22] ==================== xe_bo (2 subtests) ====================
[00:14:22] ================== xe_ccs_migrate_kunit ===================
[00:14:22] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[00:14:22] ==================== xe_bo_evict_kunit ====================
[00:14:22] =============== [SKIPPED] xe_bo_evict_kunit ================
[00:14:22] ===================== [SKIPPED] xe_bo ======================
[00:14:22] ==================== args (13 subtests) ====================
[00:14:22] [PASSED] count_args_test
[00:14:22] [PASSED] call_args_example
[00:14:22] [PASSED] call_args_test
[00:14:22] [PASSED] drop_first_arg_example
[00:14:22] [PASSED] drop_first_arg_test
[00:14:22] [PASSED] first_arg_example
[00:14:22] [PASSED] first_arg_test
[00:14:22] [PASSED] last_arg_example
[00:14:22] [PASSED] last_arg_test
[00:14:22] [PASSED] pick_arg_example
[00:14:22] [PASSED] if_args_example
[00:14:22] [PASSED] if_args_test
[00:14:22] [PASSED] sep_comma_example
[00:14:22] ====================== [PASSED] args =======================
[00:14:22] =================== xe_pci (3 subtests) ====================
[00:14:22] ==================== check_graphics_ip ====================
[00:14:22] [PASSED] 12.00 Xe_LP
[00:14:22] [PASSED] 12.10 Xe_LP+
[00:14:22] [PASSED] 12.55 Xe_HPG
[00:14:22] [PASSED] 12.60 Xe_HPC
[00:14:22] [PASSED] 12.70 Xe_LPG
[00:14:22] [PASSED] 12.71 Xe_LPG
[00:14:22] [PASSED] 12.74 Xe_LPG+
[00:14:22] [PASSED] 20.01 Xe2_HPG
[00:14:22] [PASSED] 20.02 Xe2_HPG
[00:14:22] [PASSED] 20.04 Xe2_LPG
[00:14:22] [PASSED] 30.00 Xe3_LPG
[00:14:22] [PASSED] 30.01 Xe3_LPG
[00:14:22] [PASSED] 30.03 Xe3_LPG
[00:14:22] [PASSED] 30.04 Xe3_LPG
[00:14:22] [PASSED] 30.05 Xe3_LPG
[00:14:22] [PASSED] 35.10 Xe3p_LPG
[00:14:22] [PASSED] 35.11 Xe3p_XPC
[00:14:22] ================ [PASSED] check_graphics_ip ================
[00:14:22] ===================== check_media_ip ======================
[00:14:22] [PASSED] 12.00 Xe_M
[00:14:22] [PASSED] 12.55 Xe_HPM
[00:14:22] [PASSED] 13.00 Xe_LPM+
[00:14:22] [PASSED] 13.01 Xe2_HPM
[00:14:22] [PASSED] 20.00 Xe2_LPM
[00:14:22] [PASSED] 30.00 Xe3_LPM
[00:14:22] [PASSED] 30.02 Xe3_LPM
[00:14:22] [PASSED] 35.00 Xe3p_LPM
[00:14:22] [PASSED] 35.03 Xe3p_HPM
[00:14:22] ================= [PASSED] check_media_ip ==================
[00:14:22] =================== check_platform_desc ===================
[00:14:22] [PASSED] 0x9A60 (TIGERLAKE)
[00:14:22] [PASSED] 0x9A68 (TIGERLAKE)
[00:14:22] [PASSED] 0x9A70 (TIGERLAKE)
[00:14:22] [PASSED] 0x9A40 (TIGERLAKE)
[00:14:22] [PASSED] 0x9A49 (TIGERLAKE)
[00:14:22] [PASSED] 0x9A59 (TIGERLAKE)
[00:14:22] [PASSED] 0x9A78 (TIGERLAKE)
[00:14:22] [PASSED] 0x9AC0 (TIGERLAKE)
[00:14:22] [PASSED] 0x9AC9 (TIGERLAKE)
[00:14:22] [PASSED] 0x9AD9 (TIGERLAKE)
[00:14:22] [PASSED] 0x9AF8 (TIGERLAKE)
[00:14:22] [PASSED] 0x4C80 (ROCKETLAKE)
[00:14:22] [PASSED] 0x4C8A (ROCKETLAKE)
[00:14:22] [PASSED] 0x4C8B (ROCKETLAKE)
[00:14:22] [PASSED] 0x4C8C (ROCKETLAKE)
[00:14:22] [PASSED] 0x4C90 (ROCKETLAKE)
[00:14:22] [PASSED] 0x4C9A (ROCKETLAKE)
[00:14:22] [PASSED] 0x4680 (ALDERLAKE_S)
[00:14:22] [PASSED] 0x4682 (ALDERLAKE_S)
[00:14:22] [PASSED] 0x4688 (ALDERLAKE_S)
[00:14:22] [PASSED] 0x468A (ALDERLAKE_S)
[00:14:22] [PASSED] 0x468B (ALDERLAKE_S)
[00:14:22] [PASSED] 0x4690 (ALDERLAKE_S)
[00:14:22] [PASSED] 0x4692 (ALDERLAKE_S)
[00:14:22] [PASSED] 0x4693 (ALDERLAKE_S)
[00:14:22] [PASSED] 0x46A0 (ALDERLAKE_P)
[00:14:22] [PASSED] 0x46A1 (ALDERLAKE_P)
[00:14:22] [PASSED] 0x46A2 (ALDERLAKE_P)
[00:14:22] [PASSED] 0x46A3 (ALDERLAKE_P)
[00:14:22] [PASSED] 0x46A6 (ALDERLAKE_P)
[00:14:22] [PASSED] 0x46A8 (ALDERLAKE_P)
[00:14:22] [PASSED] 0x46AA (ALDERLAKE_P)
[00:14:22] [PASSED] 0x462A (ALDERLAKE_P)
[00:14:22] [PASSED] 0x4626 (ALDERLAKE_P)
[00:14:22] [PASSED] 0x4628 (ALDERLAKE_P)
[00:14:22] [PASSED] 0x46B0 (ALDERLAKE_P)
[00:14:22] [PASSED] 0x46B1 (ALDERLAKE_P)
[00:14:22] [PASSED] 0x46B2 (ALDERLAKE_P)
[00:14:22] [PASSED] 0x46B3 (ALDERLAKE_P)
[00:14:22] [PASSED] 0x46C0 (ALDERLAKE_P)
[00:14:22] [PASSED] 0x46C1 (ALDERLAKE_P)
[00:14:22] [PASSED] 0x46C2 (ALDERLAKE_P)
[00:14:22] [PASSED] 0x46C3 (ALDERLAKE_P)
[00:14:22] [PASSED] 0x46D0 (ALDERLAKE_N)
[00:14:22] [PASSED] 0x46D1 (ALDERLAKE_N)
[00:14:22] [PASSED] 0x46D2 (ALDERLAKE_N)
[00:14:22] [PASSED] 0x46D3 (ALDERLAKE_N)
[00:14:22] [PASSED] 0x46D4 (ALDERLAKE_N)
[00:14:22] [PASSED] 0xA721 (ALDERLAKE_P)
[00:14:22] [PASSED] 0xA7A1 (ALDERLAKE_P)
[00:14:22] [PASSED] 0xA7A9 (ALDERLAKE_P)
[00:14:22] [PASSED] 0xA7AC (ALDERLAKE_P)
[00:14:22] [PASSED] 0xA7AD (ALDERLAKE_P)
[00:14:22] [PASSED] 0xA720 (ALDERLAKE_P)
[00:14:22] [PASSED] 0xA7A0 (ALDERLAKE_P)
[00:14:22] [PASSED] 0xA7A8 (ALDERLAKE_P)
[00:14:22] [PASSED] 0xA7AA (ALDERLAKE_P)
[00:14:22] [PASSED] 0xA7AB (ALDERLAKE_P)
[00:14:22] [PASSED] 0xA780 (ALDERLAKE_S)
[00:14:22] [PASSED] 0xA781 (ALDERLAKE_S)
[00:14:22] [PASSED] 0xA782 (ALDERLAKE_S)
[00:14:22] [PASSED] 0xA783 (ALDERLAKE_S)
[00:14:22] [PASSED] 0xA788 (ALDERLAKE_S)
[00:14:22] [PASSED] 0xA789 (ALDERLAKE_S)
[00:14:22] [PASSED] 0xA78A (ALDERLAKE_S)
[00:14:22] [PASSED] 0xA78B (ALDERLAKE_S)
[00:14:22] [PASSED] 0x4905 (DG1)
[00:14:22] [PASSED] 0x4906 (DG1)
[00:14:22] [PASSED] 0x4907 (DG1)
[00:14:22] [PASSED] 0x4908 (DG1)
[00:14:22] [PASSED] 0x4909 (DG1)
[00:14:22] [PASSED] 0x56C0 (DG2)
[00:14:22] [PASSED] 0x56C2 (DG2)
[00:14:22] [PASSED] 0x56C1 (DG2)
[00:14:22] [PASSED] 0x7D51 (METEORLAKE)
[00:14:22] [PASSED] 0x7DD1 (METEORLAKE)
[00:14:22] [PASSED] 0x7D41 (METEORLAKE)
[00:14:22] [PASSED] 0x7D67 (METEORLAKE)
[00:14:22] [PASSED] 0xB640 (METEORLAKE)
[00:14:22] [PASSED] 0x56A0 (DG2)
[00:14:22] [PASSED] 0x56A1 (DG2)
[00:14:22] [PASSED] 0x56A2 (DG2)
[00:14:22] [PASSED] 0x56BE (DG2)
[00:14:22] [PASSED] 0x56BF (DG2)
[00:14:22] [PASSED] 0x5690 (DG2)
[00:14:22] [PASSED] 0x5691 (DG2)
[00:14:22] [PASSED] 0x5692 (DG2)
[00:14:22] [PASSED] 0x56A5 (DG2)
[00:14:22] [PASSED] 0x56A6 (DG2)
[00:14:22] [PASSED] 0x56B0 (DG2)
[00:14:22] [PASSED] 0x56B1 (DG2)
[00:14:22] [PASSED] 0x56BA (DG2)
[00:14:22] [PASSED] 0x56BB (DG2)
[00:14:22] [PASSED] 0x56BC (DG2)
[00:14:22] [PASSED] 0x56BD (DG2)
[00:14:22] [PASSED] 0x5693 (DG2)
[00:14:22] [PASSED] 0x5694 (DG2)
[00:14:22] [PASSED] 0x5695 (DG2)
[00:14:22] [PASSED] 0x56A3 (DG2)
[00:14:22] [PASSED] 0x56A4 (DG2)
[00:14:22] [PASSED] 0x56B2 (DG2)
[00:14:22] [PASSED] 0x56B3 (DG2)
[00:14:22] [PASSED] 0x5696 (DG2)
[00:14:22] [PASSED] 0x5697 (DG2)
[00:14:22] [PASSED] 0xB69 (PVC)
[00:14:22] [PASSED] 0xB6E (PVC)
[00:14:22] [PASSED] 0xBD4 (PVC)
[00:14:22] [PASSED] 0xBD5 (PVC)
[00:14:22] [PASSED] 0xBD6 (PVC)
[00:14:22] [PASSED] 0xBD7 (PVC)
[00:14:22] [PASSED] 0xBD8 (PVC)
[00:14:22] [PASSED] 0xBD9 (PVC)
[00:14:22] [PASSED] 0xBDA (PVC)
[00:14:22] [PASSED] 0xBDB (PVC)
[00:14:22] [PASSED] 0xBE0 (PVC)
[00:14:22] [PASSED] 0xBE1 (PVC)
[00:14:22] [PASSED] 0xBE5 (PVC)
[00:14:22] [PASSED] 0x7D40 (METEORLAKE)
[00:14:22] [PASSED] 0x7D45 (METEORLAKE)
[00:14:22] [PASSED] 0x7D55 (METEORLAKE)
[00:14:22] [PASSED] 0x7D60 (METEORLAKE)
[00:14:22] [PASSED] 0x7DD5 (METEORLAKE)
[00:14:22] [PASSED] 0x6420 (LUNARLAKE)
[00:14:22] [PASSED] 0x64A0 (LUNARLAKE)
[00:14:22] [PASSED] 0x64B0 (LUNARLAKE)
[00:14:22] [PASSED] 0xE202 (BATTLEMAGE)
[00:14:22] [PASSED] 0xE209 (BATTLEMAGE)
[00:14:22] [PASSED] 0xE20B (BATTLEMAGE)
[00:14:22] [PASSED] 0xE20C (BATTLEMAGE)
[00:14:22] [PASSED] 0xE20D (BATTLEMAGE)
[00:14:22] [PASSED] 0xE210 (BATTLEMAGE)
[00:14:22] [PASSED] 0xE211 (BATTLEMAGE)
[00:14:22] [PASSED] 0xE212 (BATTLEMAGE)
[00:14:22] [PASSED] 0xE216 (BATTLEMAGE)
[00:14:22] [PASSED] 0xE220 (BATTLEMAGE)
[00:14:22] [PASSED] 0xE221 (BATTLEMAGE)
[00:14:22] [PASSED] 0xE222 (BATTLEMAGE)
[00:14:22] [PASSED] 0xE223 (BATTLEMAGE)
[00:14:22] [PASSED] 0xB080 (PANTHERLAKE)
[00:14:22] [PASSED] 0xB081 (PANTHERLAKE)
[00:14:22] [PASSED] 0xB082 (PANTHERLAKE)
[00:14:22] [PASSED] 0xB083 (PANTHERLAKE)
[00:14:22] [PASSED] 0xB084 (PANTHERLAKE)
[00:14:22] [PASSED] 0xB085 (PANTHERLAKE)
[00:14:22] [PASSED] 0xB086 (PANTHERLAKE)
[00:14:22] [PASSED] 0xB087 (PANTHERLAKE)
[00:14:22] [PASSED] 0xB08F (PANTHERLAKE)
[00:14:22] [PASSED] 0xB090 (PANTHERLAKE)
[00:14:22] [PASSED] 0xB0A0 (PANTHERLAKE)
[00:14:22] [PASSED] 0xB0B0 (PANTHERLAKE)
[00:14:22] [PASSED] 0xFD80 (PANTHERLAKE)
[00:14:22] [PASSED] 0xFD81 (PANTHERLAKE)
[00:14:22] [PASSED] 0xD740 (NOVALAKE_S)
[00:14:22] [PASSED] 0xD741 (NOVALAKE_S)
[00:14:22] [PASSED] 0xD742 (NOVALAKE_S)
[00:14:22] [PASSED] 0xD743 (NOVALAKE_S)
[00:14:22] [PASSED] 0xD745 (NOVALAKE_S)
[00:14:22] [PASSED] 0xD74A (NOVALAKE_S)
[00:14:22] [PASSED] 0xD74B (NOVALAKE_S)
[00:14:22] [PASSED] 0x674C (CRESCENTISLAND)
[00:14:22] [PASSED] 0x674D (CRESCENTISLAND)
[00:14:22] [PASSED] 0x674E (CRESCENTISLAND)
[00:14:22] [PASSED] 0x674F (CRESCENTISLAND)
[00:14:22] [PASSED] 0x6750 (CRESCENTISLAND)
[00:14:22] [PASSED] 0xD750 (NOVALAKE_P)
[00:14:22] [PASSED] 0xD751 (NOVALAKE_P)
[00:14:22] [PASSED] 0xD752 (NOVALAKE_P)
[00:14:22] [PASSED] 0xD753 (NOVALAKE_P)
[00:14:22] [PASSED] 0xD754 (NOVALAKE_P)
[00:14:22] [PASSED] 0xD755 (NOVALAKE_P)
[00:14:22] [PASSED] 0xD756 (NOVALAKE_P)
[00:14:22] [PASSED] 0xD757 (NOVALAKE_P)
[00:14:22] [PASSED] 0xD75F (NOVALAKE_P)
[00:14:22] =============== [PASSED] check_platform_desc ===============
[00:14:22] ===================== [PASSED] xe_pci ======================
[00:14:22] ============= xe_rtp_tables_test (5 subtests) ==============
[00:14:22] ================== xe_rtp_table_gt_test ===================
[00:14:22] [PASSED] gt_was/14011060649
[00:14:22] [PASSED] gt_was/14011059788
[00:14:22] [PASSED] gt_was/14015795083
[00:14:22] [PASSED] gt_was/16021867713
[00:14:22] [PASSED] gt_was/14019449301
[00:14:22] [PASSED] gt_was/16028005424
[00:14:22] [PASSED] gt_was/14026578760
[00:14:22] [PASSED] gt_was/1409420604
[00:14:22] [PASSED] gt_was/1408615072
[00:14:22] [PASSED] gt_was/22010523718
[00:14:22] [PASSED] gt_was/14011006942
[00:14:22] [PASSED] gt_was/14014830051
[00:14:22] [PASSED] gt_was/18018781329
[00:14:22] [PASSED] gt_was/1509235366
[00:14:22] [PASSED] gt_was/18018781329
[00:14:22] [PASSED] gt_was/16016694945
[00:14:22] [PASSED] gt_was/14018575942
[00:14:22] [PASSED] gt_was/22016670082
[00:14:22] [PASSED] gt_was/22016670082
[00:14:22] [PASSED] gt_was/14017421178
[00:14:22] [PASSED] gt_was/16025250150
[00:14:22] [PASSED] gt_was/14021871409
[00:14:22] [PASSED] gt_was/16021865536
[00:14:22] [PASSED] gt_was/14021486841
[00:14:22] [PASSED] gt_was/14025160223
[00:14:22] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[00:14:22] [PASSED] gt_was/14025635424
[00:14:22] [PASSED] gt_was/16028005424
[00:14:22] ============== [PASSED] xe_rtp_table_gt_test ===============
[00:14:22] ================== xe_rtp_table_gt_test ===================
[00:14:22] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[00:14:22] [PASSED] gt_tunings/Tuning: 32B Access Enable
[00:14:22] [PASSED] gt_tunings/Tuning: L3 cache
[00:14:22] [PASSED] gt_tunings/Tuning: L3 cache - media
[00:14:22] [PASSED] gt_tunings/Tuning: Compression Overfetch
[00:14:22] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[00:14:22] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[00:14:22] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[00:14:22] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[00:14:22] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[00:14:22] [PASSED] gt_tunings/Tuning: Stateless compression control
[00:14:22] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[00:14:22] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[00:14:22] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[00:14:22] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[00:14:22] ============== [PASSED] xe_rtp_table_gt_test ===============
[00:14:22] ================== xe_rtp_table_oob_test ==================
[00:14:22] [PASSED] oob_was/1607983814
[00:14:22] [PASSED] oob_was/16010904313
[00:14:22] [PASSED] oob_was/18022495364
[00:14:22] [PASSED] oob_was/22012773006
[00:14:22] [PASSED] oob_was/14014475959
[00:14:22] [PASSED] oob_was/22011391025
[00:14:22] [PASSED] oob_was/22012727170
[00:14:22] [PASSED] oob_was/22012727685
[00:14:22] [PASSED] oob_was/22016596838
[00:14:22] [PASSED] oob_was/18020744125
[00:14:22] [PASSED] oob_was/1409600907
[00:14:22] [PASSED] oob_was/22014953428
[00:14:22] [PASSED] oob_was/16017236439
[00:14:22] [PASSED] oob_was/14019821291
[00:14:22] [PASSED] oob_was/14015076503
[00:14:22] [PASSED] oob_was/14018913170
[00:14:22] [PASSED] oob_was/14018094691
[00:14:22] [PASSED] oob_was/18024947630
[00:14:22] [PASSED] oob_was/16022287689
[00:14:22] [PASSED] oob_was/13011645652
[00:14:22] [PASSED] oob_was/14022293748
[00:14:22] [PASSED] oob_was/22019794406
[00:14:22] [PASSED] oob_was/22019338487
[00:14:22] [PASSED] oob_was/16023588340
[00:14:22] [PASSED] oob_was/14019789679
[00:14:22] [PASSED] oob_was/14022866841
[00:14:22] [PASSED] oob_was/16021333562
[00:14:22] [PASSED] oob_was/14016712196
[00:14:22] [PASSED] oob_was/14015568240
[00:14:22] [PASSED] oob_was/18013179988
[00:14:22] [PASSED] oob_was/1508761755
[00:14:22] [PASSED] oob_was/16023105232
[00:14:22] [PASSED] oob_was/16026508708
[00:14:22] [PASSED] oob_was/14020001231
[00:14:22] [PASSED] oob_was/16023683509
[00:14:23] [PASSED] oob_was/14025515070
[00:14:23] [PASSED] oob_was/15015404425_disable
[00:14:23] [PASSED] oob_was/16026007364
[00:14:23] [PASSED] oob_was/14020316580
[00:14:23] [PASSED] oob_was/14025883347
[00:14:23] [PASSED] oob_was/16029380221
[00:14:23] [PASSED] oob_was/22022079272
[00:14:23] [PASSED] oob_was/16029897822
[00:14:23] [PASSED] oob_was/14027054324
[00:14:23] ============== [PASSED] xe_rtp_table_oob_test ==============
[00:14:23] ================ xe_rtp_table_dev_oob_test ================
[00:14:23] [PASSED] device_oob_was/22010954014
[00:14:23] [PASSED] device_oob_was/15015404425
[00:14:23] [PASSED] device_oob_was/22019338487_display
[00:14:23] [PASSED] device_oob_was/14022085890
[00:14:23] [PASSED] device_oob_was/14026539277
[00:14:23] [PASSED] device_oob_was/14026633728
[00:14:23] [PASSED] device_oob_was/14026746987
[00:14:23] [PASSED] device_oob_was/14026779378
[00:14:23] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[00:14:23] ========== xe_rtp_table_missing_upper_bound_test ==========
[00:14:23] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[00:14:23] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[00:14:23] [PASSED] register_whitelist/1806527549
[00:14:23] [PASSED] register_whitelist/allow_read_ctx_timestamp
[00:14:23] [PASSED] register_whitelist/allow_read_queue_timestamp
[00:14:23] [PASSED] register_whitelist/16014440446
[00:14:23] [PASSED] register_whitelist/16017236439
[00:14:23] [PASSED] register_whitelist/16020183090
[00:14:23] [PASSED] register_whitelist/14024997852
[00:14:23] [PASSED] register_whitelist/14024997852
[00:14:23] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[00:14:23] =============== [PASSED] xe_rtp_tables_test ================
[00:14:23] =================== xe_rtp (3 subtests) ====================
[00:14:23] =================== xe_rtp_rules_tests ====================
[00:14:23] [PASSED] no
[00:14:23] [PASSED] yes
[00:14:23] [PASSED] no-and-no
[00:14:23] [PASSED] no-and-yes
[00:14:23] [PASSED] yes-and-no
[00:14:23] [PASSED] yes-and-yes
[00:14:23] [PASSED] no-or-no
[00:14:23] [PASSED] no-or-yes
[00:14:23] [PASSED] yes-or-no
[00:14:23] [PASSED] yes-or-yes
[00:14:23] [PASSED] no-yes-or-yes-no
[00:14:23] [PASSED] no-yes-or-yes-yes
[00:14:23] [PASSED] yes-yes-or-no-yes
[00:14:23] [PASSED] yes-yes-or-yes-yes
[00:14:23] [PASSED] no-no-or-yes-or-no
[00:14:23] [PASSED] or
[00:14:23] [PASSED] or-yes
[00:14:23] [PASSED] or-no
[00:14:23] [PASSED] yes-or
[00:14:23] [PASSED] no-or
[00:14:23] [PASSED] no-or-or-yes
[00:14:23] [PASSED] yes-or-or-no
[00:14:23] [PASSED] no-or-or-no
[00:14:23] [PASSED] missing-context-engine-class
[00:14:23] [PASSED] missing-context-engine-class-or-yes
[00:14:23] [PASSED] missing-context-engine-class-or-or-yes
[00:14:23] =============== [PASSED] xe_rtp_rules_tests ================
[00:14:23] =============== xe_rtp_process_to_sr_tests ================
[00:14:23] [PASSED] coalesce-same-reg
[00:14:23] [PASSED] coalesce-same-reg-literal-and-func
[00:14:23] [PASSED] no-match-no-add
[00:14:23] [PASSED] two-regs-two-entries
[00:14:23] [PASSED] clr-one-set-other
[00:14:23] [PASSED] set-field
[00:14:23] [PASSED] conflict-duplicate
[00:14:23] [PASSED] conflict-not-disjoint
[00:14:23] [PASSED] conflict-not-disjoint-literal-and-func
[00:14:23] [PASSED] conflict-reg-type
[00:14:23] [PASSED] bad-mcr-reg-forced-to-regular
[00:14:23] [PASSED] bad-regular-reg-forced-to-mcr
[00:14:23] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[00:14:23] ================== xe_rtp_process_tests ===================
[00:14:23] [PASSED] active1
[00:14:23] [PASSED] active2
[00:14:23] [PASSED] active-inactive
[00:14:23] [PASSED] inactive-active
[00:14:23] [PASSED] inactive-active-inactive
[00:14:23] [PASSED] inactive-inactive-inactive
[00:14:23] ============== [PASSED] xe_rtp_process_tests ===============
[00:14:23] ===================== [PASSED] xe_rtp ======================
[00:14:23] ==================== xe_wa (1 subtest) =====================
[00:14:23] ======================== xe_wa_gt =========================
[00:14:23] [PASSED] TIGERLAKE B0
[00:14:23] [PASSED] DG1 A0
[00:14:23] [PASSED] DG1 B0
[00:14:23] [PASSED] ALDERLAKE_S A0
[00:14:23] [PASSED] ALDERLAKE_S B0
[00:14:23] [PASSED] ALDERLAKE_S C0
[00:14:23] [PASSED] ALDERLAKE_S D0
[00:14:23] [PASSED] ALDERLAKE_P A0
[00:14:23] [PASSED] ALDERLAKE_P B0
[00:14:23] [PASSED] ALDERLAKE_P C0
[00:14:23] [PASSED] ALDERLAKE_S RPLS D0
[00:14:23] [PASSED] ALDERLAKE_P RPLU E0
[00:14:23] [PASSED] DG2 G10 C0
[00:14:23] [PASSED] DG2 G11 B1
[00:14:23] [PASSED] DG2 G12 A1
[00:14:23] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[00:14:23] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[00:14:23] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[00:14:23] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[00:14:23] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[00:14:23] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[00:14:23] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[00:14:23] ==================== [PASSED] xe_wa_gt =====================
[00:14:23] ====================== [PASSED] xe_wa ======================
[00:14:23] ============================================================
[00:14:23] Testing complete. Ran 742 tests: passed: 724, skipped: 18
[00:14:23] Elapsed time: 35.627s total, 1.725s configuring, 33.234s building, 0.646s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[00:14:23] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[00:14:24] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[00:14:49] Starting KUnit Kernel (1/1)...
[00:14:49] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[00:14:49] ============ drm_test_pick_cmdline (2 subtests) ============
[00:14:49] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[00:14:49] =============== drm_test_pick_cmdline_named ===============
[00:14:49] [PASSED] NTSC
[00:14:49] [PASSED] NTSC-J
[00:14:49] [PASSED] PAL
[00:14:49] [PASSED] PAL-M
[00:14:49] =========== [PASSED] drm_test_pick_cmdline_named ===========
[00:14:49] ============== [PASSED] drm_test_pick_cmdline ==============
[00:14:49] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[00:14:49] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[00:14:49] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[00:14:49] =========== drm_validate_clone_mode (2 subtests) ===========
[00:14:49] ============== drm_test_check_in_clone_mode ===============
[00:14:49] [PASSED] in_clone_mode
[00:14:49] [PASSED] not_in_clone_mode
[00:14:49] ========== [PASSED] drm_test_check_in_clone_mode ===========
[00:14:49] =============== drm_test_check_valid_clones ===============
[00:14:49] [PASSED] not_in_clone_mode
[00:14:49] [PASSED] valid_clone
[00:14:49] [PASSED] invalid_clone
[00:14:49] =========== [PASSED] drm_test_check_valid_clones ===========
[00:14:49] ============= [PASSED] drm_validate_clone_mode =============
[00:14:49] ============= drm_validate_modeset (1 subtest) =============
[00:14:49] [PASSED] drm_test_check_connector_changed_modeset
[00:14:49] ============== [PASSED] drm_validate_modeset ===============
[00:14:49] ====== drm_test_bridge_get_current_state (1 subtest) =======
[00:14:49] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[00:14:49] ======== [PASSED] drm_test_bridge_get_current_state ========
[00:14:49] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[00:14:49] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[00:14:49] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[00:14:49] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[00:14:49] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[00:14:49] ============== drm_bridge_alloc (2 subtests) ===============
[00:14:49] [PASSED] drm_test_drm_bridge_alloc_basic
[00:14:49] [PASSED] drm_test_drm_bridge_alloc_get_put
[00:14:49] ================ [PASSED] drm_bridge_alloc =================
[00:14:49] ============= drm_bridge_bus_fmt (5 subtests) ==============
[00:14:49] [PASSED] drm_test_bridge_rgb_yuv_rgb
[00:14:49] [PASSED] drm_test_bridge_must_convert_to_yuv444
[00:14:49] [PASSED] drm_test_bridge_hdmi_auto_rgb
[00:14:49] [PASSED] drm_test_bridge_auto_first
[00:14:49] [PASSED] drm_test_bridge_rgb_yuv_no_path
[00:14:49] =============== [PASSED] drm_bridge_bus_fmt ================
[00:14:49] ============= drm_cmdline_parser (40 subtests) =============
[00:14:49] [PASSED] drm_test_cmdline_force_d_only
[00:14:49] [PASSED] drm_test_cmdline_force_D_only_dvi
[00:14:49] [PASSED] drm_test_cmdline_force_D_only_hdmi
[00:14:49] [PASSED] drm_test_cmdline_force_D_only_not_digital
[00:14:49] [PASSED] drm_test_cmdline_force_e_only
[00:14:49] [PASSED] drm_test_cmdline_res
[00:14:49] [PASSED] drm_test_cmdline_res_vesa
[00:14:49] [PASSED] drm_test_cmdline_res_vesa_rblank
[00:14:49] [PASSED] drm_test_cmdline_res_rblank
[00:14:49] [PASSED] drm_test_cmdline_res_bpp
[00:14:49] [PASSED] drm_test_cmdline_res_refresh
[00:14:49] [PASSED] drm_test_cmdline_res_bpp_refresh
[00:14:49] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[00:14:49] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[00:14:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[00:14:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[00:14:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[00:14:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[00:14:49] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[00:14:49] [PASSED] drm_test_cmdline_res_margins_force_on
[00:14:49] [PASSED] drm_test_cmdline_res_vesa_margins
[00:14:49] [PASSED] drm_test_cmdline_name
[00:14:49] [PASSED] drm_test_cmdline_name_bpp
[00:14:49] [PASSED] drm_test_cmdline_name_option
[00:14:49] [PASSED] drm_test_cmdline_name_bpp_option
[00:14:49] [PASSED] drm_test_cmdline_rotate_0
[00:14:49] [PASSED] drm_test_cmdline_rotate_90
[00:14:49] [PASSED] drm_test_cmdline_rotate_180
[00:14:49] [PASSED] drm_test_cmdline_rotate_270
[00:14:49] [PASSED] drm_test_cmdline_hmirror
[00:14:49] [PASSED] drm_test_cmdline_vmirror
[00:14:49] [PASSED] drm_test_cmdline_margin_options
[00:14:49] [PASSED] drm_test_cmdline_multiple_options
[00:14:49] [PASSED] drm_test_cmdline_bpp_extra_and_option
[00:14:49] [PASSED] drm_test_cmdline_extra_and_option
[00:14:49] [PASSED] drm_test_cmdline_freestanding_options
[00:14:49] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[00:14:49] [PASSED] drm_test_cmdline_panel_orientation
[00:14:49] ================ drm_test_cmdline_invalid =================
[00:14:49] [PASSED] margin_only
[00:14:49] [PASSED] interlace_only
[00:14:49] [PASSED] res_missing_x
[00:14:49] [PASSED] res_missing_y
[00:14:49] [PASSED] res_bad_y
[00:14:49] [PASSED] res_missing_y_bpp
[00:14:49] [PASSED] res_bad_bpp
[00:14:49] [PASSED] res_bad_refresh
[00:14:49] [PASSED] res_bpp_refresh_force_on_off
[00:14:49] [PASSED] res_invalid_mode
[00:14:49] [PASSED] res_bpp_wrong_place_mode
[00:14:49] [PASSED] name_bpp_refresh
[00:14:49] [PASSED] name_refresh
[00:14:49] [PASSED] name_refresh_wrong_mode
[00:14:49] [PASSED] name_refresh_invalid_mode
[00:14:49] [PASSED] rotate_multiple
[00:14:49] [PASSED] rotate_invalid_val
[00:14:49] [PASSED] rotate_truncated
[00:14:49] [PASSED] invalid_option
[00:14:49] [PASSED] invalid_tv_option
[00:14:49] [PASSED] truncated_tv_option
[00:14:49] ============ [PASSED] drm_test_cmdline_invalid =============
[00:14:49] =============== drm_test_cmdline_tv_options ===============
[00:14:49] [PASSED] NTSC
[00:14:49] [PASSED] NTSC_443
[00:14:49] [PASSED] NTSC_J
[00:14:49] [PASSED] PAL
[00:14:49] [PASSED] PAL_M
[00:14:49] [PASSED] PAL_N
[00:14:49] [PASSED] SECAM
[00:14:49] [PASSED] MONO_525
[00:14:49] [PASSED] MONO_625
[00:14:49] =========== [PASSED] drm_test_cmdline_tv_options ===========
[00:14:49] =============== [PASSED] drm_cmdline_parser ================
[00:14:49] ========== drmm_connector_hdmi_init (20 subtests) ==========
[00:14:49] [PASSED] drm_test_connector_hdmi_init_valid
[00:14:49] [PASSED] drm_test_connector_hdmi_init_bpc_8
[00:14:49] [PASSED] drm_test_connector_hdmi_init_bpc_10
[00:14:49] [PASSED] drm_test_connector_hdmi_init_bpc_12
[00:14:49] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[00:14:49] [PASSED] drm_test_connector_hdmi_init_bpc_null
[00:14:49] [PASSED] drm_test_connector_hdmi_init_formats_empty
[00:14:49] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[00:14:49] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[00:14:49] [PASSED] supported_formats=0x9 yuv420_allowed=1
[00:14:49] [PASSED] supported_formats=0x9 yuv420_allowed=0
[00:14:49] [PASSED] supported_formats=0x5 yuv420_allowed=1
[00:14:49] [PASSED] supported_formats=0x5 yuv420_allowed=0
[00:14:49] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[00:14:49] [PASSED] drm_test_connector_hdmi_init_null_ddc
[00:14:49] [PASSED] drm_test_connector_hdmi_init_null_product
[00:14:49] [PASSED] drm_test_connector_hdmi_init_null_vendor
[00:14:49] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[00:14:49] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[00:14:49] [PASSED] drm_test_connector_hdmi_init_product_valid
[00:14:49] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[00:14:49] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[00:14:49] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[00:14:49] ========= drm_test_connector_hdmi_init_type_valid =========
[00:14:49] [PASSED] HDMI-A
[00:14:49] [PASSED] HDMI-B
[00:14:49] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[00:14:49] ======== drm_test_connector_hdmi_init_type_invalid ========
[00:14:49] [PASSED] Unknown
[00:14:49] [PASSED] VGA
[00:14:49] [PASSED] DVI-I
[00:14:49] [PASSED] DVI-D
[00:14:49] [PASSED] DVI-A
[00:14:49] [PASSED] Composite
[00:14:49] [PASSED] SVIDEO
[00:14:49] [PASSED] LVDS
[00:14:49] [PASSED] Component
[00:14:49] [PASSED] DIN
[00:14:49] [PASSED] DP
[00:14:49] [PASSED] TV
[00:14:49] [PASSED] eDP
[00:14:49] [PASSED] Virtual
[00:14:49] [PASSED] DSI
[00:14:49] [PASSED] DPI
[00:14:49] [PASSED] Writeback
[00:14:49] [PASSED] SPI
[00:14:49] [PASSED] USB
[00:14:49] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[00:14:49] ============ [PASSED] drmm_connector_hdmi_init =============
[00:14:49] ============= drmm_connector_init (3 subtests) =============
[00:14:49] [PASSED] drm_test_drmm_connector_init
[00:14:49] [PASSED] drm_test_drmm_connector_init_null_ddc
[00:14:49] ========= drm_test_drmm_connector_init_type_valid =========
[00:14:49] [PASSED] Unknown
[00:14:49] [PASSED] VGA
[00:14:49] [PASSED] DVI-I
[00:14:49] [PASSED] DVI-D
[00:14:49] [PASSED] DVI-A
[00:14:49] [PASSED] Composite
[00:14:49] [PASSED] SVIDEO
[00:14:49] [PASSED] LVDS
[00:14:49] [PASSED] Component
[00:14:49] [PASSED] DIN
[00:14:49] [PASSED] DP
[00:14:49] [PASSED] HDMI-A
[00:14:49] [PASSED] HDMI-B
[00:14:49] [PASSED] TV
[00:14:49] [PASSED] eDP
[00:14:49] [PASSED] Virtual
[00:14:49] [PASSED] DSI
[00:14:49] [PASSED] DPI
[00:14:49] [PASSED] Writeback
[00:14:49] [PASSED] SPI
[00:14:49] [PASSED] USB
[00:14:49] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[00:14:49] =============== [PASSED] drmm_connector_init ===============
[00:14:49] ========= drm_connector_dynamic_init (6 subtests) ==========
[00:14:49] [PASSED] drm_test_drm_connector_dynamic_init
[00:14:49] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[00:14:49] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[00:14:49] [PASSED] drm_test_drm_connector_dynamic_init_properties
[00:14:49] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[00:14:49] [PASSED] Unknown
[00:14:49] [PASSED] VGA
[00:14:49] [PASSED] DVI-I
[00:14:49] [PASSED] DVI-D
[00:14:49] [PASSED] DVI-A
[00:14:49] [PASSED] Composite
[00:14:49] [PASSED] SVIDEO
[00:14:49] [PASSED] LVDS
[00:14:49] [PASSED] Component
[00:14:49] [PASSED] DIN
[00:14:49] [PASSED] DP
[00:14:49] [PASSED] HDMI-A
[00:14:49] [PASSED] HDMI-B
[00:14:49] [PASSED] TV
[00:14:49] [PASSED] eDP
[00:14:49] [PASSED] Virtual
[00:14:49] [PASSED] DSI
[00:14:49] [PASSED] DPI
[00:14:49] [PASSED] Writeback
[00:14:49] [PASSED] SPI
[00:14:49] [PASSED] USB
[00:14:49] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[00:14:49] ======== drm_test_drm_connector_dynamic_init_name =========
[00:14:49] [PASSED] Unknown
[00:14:49] [PASSED] VGA
[00:14:49] [PASSED] DVI-I
[00:14:49] [PASSED] DVI-D
[00:14:49] [PASSED] DVI-A
[00:14:49] [PASSED] Composite
[00:14:49] [PASSED] SVIDEO
[00:14:49] [PASSED] LVDS
[00:14:49] [PASSED] Component
[00:14:49] [PASSED] DIN
[00:14:49] [PASSED] DP
[00:14:49] [PASSED] HDMI-A
[00:14:49] [PASSED] HDMI-B
[00:14:49] [PASSED] TV
[00:14:49] [PASSED] eDP
[00:14:49] [PASSED] Virtual
[00:14:49] [PASSED] DSI
[00:14:49] [PASSED] DPI
[00:14:49] [PASSED] Writeback
[00:14:49] [PASSED] SPI
[00:14:49] [PASSED] USB
[00:14:49] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[00:14:49] =========== [PASSED] drm_connector_dynamic_init ============
[00:14:49] ==== drm_connector_dynamic_register_early (4 subtests) =====
[00:14:49] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[00:14:49] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[00:14:49] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[00:14:49] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[00:14:49] ====== [PASSED] drm_connector_dynamic_register_early =======
[00:14:49] ======= drm_connector_dynamic_register (7 subtests) ========
[00:14:49] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[00:14:49] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[00:14:49] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[00:14:49] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[00:14:49] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[00:14:49] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[00:14:49] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[00:14:49] ========= [PASSED] drm_connector_dynamic_register ==========
[00:14:49] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[00:14:49] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[00:14:49] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[00:14:49] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[00:14:49] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[00:14:49] ========== drm_test_get_tv_mode_from_name_valid ===========
[00:14:49] [PASSED] NTSC
[00:14:49] [PASSED] NTSC-443
[00:14:49] [PASSED] NTSC-J
[00:14:49] [PASSED] PAL
[00:14:49] [PASSED] PAL-M
[00:14:49] [PASSED] PAL-N
[00:14:49] [PASSED] SECAM
[00:14:49] [PASSED] Mono
[00:14:49] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[00:14:49] [PASSED] drm_test_get_tv_mode_from_name_truncated
[00:14:49] ============ [PASSED] drm_get_tv_mode_from_name ============
[00:14:49] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[00:14:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[00:14:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[00:14:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[00:14:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[00:14:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[00:14:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[00:14:49] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[00:14:49] [PASSED] VIC 96
[00:14:49] [PASSED] VIC 97
[00:14:49] [PASSED] VIC 101
[00:14:49] [PASSED] VIC 102
[00:14:49] [PASSED] VIC 106
[00:14:49] [PASSED] VIC 107
[00:14:49] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[00:14:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[00:14:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[00:14:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[00:14:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[00:14:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[00:14:49] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[00:14:49] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[00:14:49] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[00:14:49] [PASSED] Automatic
[00:14:49] [PASSED] Full
[00:14:49] [PASSED] Limited 16:235
[00:14:49] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[00:14:49] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[00:14:49] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[00:14:49] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[00:14:49] === drm_test_drm_hdmi_connector_get_output_format_name ====
[00:14:49] [PASSED] RGB
[00:14:49] [PASSED] YUV 4:2:0
[00:14:49] [PASSED] YUV 4:2:2
[00:14:49] [PASSED] YUV 4:4:4
[00:14:49] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[00:14:49] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[00:14:49] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[00:14:49] ============= drm_damage_helper (21 subtests) ==============
[00:14:49] [PASSED] drm_test_damage_iter_no_damage
[00:14:49] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[00:14:49] [PASSED] drm_test_damage_iter_no_damage_src_moved
[00:14:49] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[00:14:49] [PASSED] drm_test_damage_iter_no_damage_not_visible
[00:14:49] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[00:14:49] [PASSED] drm_test_damage_iter_no_damage_no_fb
[00:14:49] [PASSED] drm_test_damage_iter_simple_damage
[00:14:49] [PASSED] drm_test_damage_iter_single_damage
[00:14:49] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[00:14:49] [PASSED] drm_test_damage_iter_single_damage_outside_src
[00:14:49] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[00:14:49] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[00:14:49] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[00:14:49] [PASSED] drm_test_damage_iter_single_damage_src_moved
[00:14:49] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[00:14:49] [PASSED] drm_test_damage_iter_damage
[00:14:49] [PASSED] drm_test_damage_iter_damage_one_intersect
[00:14:49] [PASSED] drm_test_damage_iter_damage_one_outside
[00:14:49] [PASSED] drm_test_damage_iter_damage_src_moved
[00:14:49] [PASSED] drm_test_damage_iter_damage_not_visible
[00:14:49] ================ [PASSED] drm_damage_helper ================
[00:14:49] ============== drm_dp_mst_helper (3 subtests) ==============
[00:14:49] ============== drm_test_dp_mst_calc_pbn_mode ==============
[00:14:49] [PASSED] Clock 154000 BPP 30 DSC disabled
[00:14:49] [PASSED] Clock 234000 BPP 30 DSC disabled
[00:14:49] [PASSED] Clock 297000 BPP 24 DSC disabled
[00:14:49] [PASSED] Clock 332880 BPP 24 DSC enabled
[00:14:49] [PASSED] Clock 324540 BPP 24 DSC enabled
[00:14:49] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[00:14:49] ============== drm_test_dp_mst_calc_pbn_div ===============
[00:14:49] [PASSED] Link rate 2000000 lane count 4
[00:14:49] [PASSED] Link rate 2000000 lane count 2
[00:14:49] [PASSED] Link rate 2000000 lane count 1
[00:14:49] [PASSED] Link rate 1350000 lane count 4
[00:14:49] [PASSED] Link rate 1350000 lane count 2
[00:14:49] [PASSED] Link rate 1350000 lane count 1
[00:14:49] [PASSED] Link rate 1000000 lane count 4
[00:14:49] [PASSED] Link rate 1000000 lane count 2
[00:14:49] [PASSED] Link rate 1000000 lane count 1
[00:14:49] [PASSED] Link rate 810000 lane count 4
[00:14:49] [PASSED] Link rate 810000 lane count 2
[00:14:49] [PASSED] Link rate 810000 lane count 1
[00:14:49] [PASSED] Link rate 540000 lane count 4
[00:14:49] [PASSED] Link rate 540000 lane count 2
[00:14:49] [PASSED] Link rate 540000 lane count 1
[00:14:49] [PASSED] Link rate 270000 lane count 4
[00:14:49] [PASSED] Link rate 270000 lane count 2
[00:14:49] [PASSED] Link rate 270000 lane count 1
[00:14:49] [PASSED] Link rate 162000 lane count 4
[00:14:49] [PASSED] Link rate 162000 lane count 2
[00:14:49] [PASSED] Link rate 162000 lane count 1
[00:14:49] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[00:14:49] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[00:14:49] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[00:14:49] [PASSED] DP_POWER_UP_PHY with port number
[00:14:49] [PASSED] DP_POWER_DOWN_PHY with port number
[00:14:49] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[00:14:49] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[00:14:49] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[00:14:49] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[00:14:49] [PASSED] DP_QUERY_PAYLOAD with port number
[00:14:49] [PASSED] DP_QUERY_PAYLOAD with VCPI
[00:14:49] [PASSED] DP_REMOTE_DPCD_READ with port number
[00:14:49] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[00:14:49] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[00:14:49] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[00:14:49] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[00:14:49] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[00:14:49] [PASSED] DP_REMOTE_I2C_READ with port number
[00:14:49] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[00:14:49] [PASSED] DP_REMOTE_I2C_READ with transactions array
[00:14:49] [PASSED] DP_REMOTE_I2C_WRITE with port number
[00:14:49] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[00:14:49] [PASSED] DP_REMOTE_I2C_WRITE with data array
[00:14:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[00:14:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[00:14:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[00:14:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[00:14:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[00:14:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[00:14:49] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[00:14:49] ================ [PASSED] drm_dp_mst_helper ================
[00:14:49] ================== drm_exec (7 subtests) ===================
[00:14:49] [PASSED] sanitycheck
[00:14:49] [PASSED] test_lock
[00:14:49] [PASSED] test_lock_unlock
[00:14:49] [PASSED] test_duplicates
[00:14:49] [PASSED] test_prepare
[00:14:49] [PASSED] test_prepare_array
[00:14:49] [PASSED] test_multiple_loops
[00:14:49] ==================== [PASSED] drm_exec =====================
[00:14:49] =========== drm_format_helper_test (17 subtests) ===========
[00:14:49] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[00:14:49] [PASSED] single_pixel_source_buffer
[00:14:49] [PASSED] single_pixel_clip_rectangle
[00:14:49] [PASSED] well_known_colors
[00:14:49] [PASSED] destination_pitch
[00:14:49] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[00:14:49] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[00:14:49] [PASSED] single_pixel_source_buffer
[00:14:49] [PASSED] single_pixel_clip_rectangle
[00:14:49] [PASSED] well_known_colors
[00:14:49] [PASSED] destination_pitch
[00:14:49] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[00:14:49] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[00:14:49] [PASSED] single_pixel_source_buffer
[00:14:49] [PASSED] single_pixel_clip_rectangle
[00:14:49] [PASSED] well_known_colors
[00:14:49] [PASSED] destination_pitch
[00:14:49] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[00:14:49] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[00:14:49] [PASSED] single_pixel_source_buffer
[00:14:49] [PASSED] single_pixel_clip_rectangle
[00:14:49] [PASSED] well_known_colors
[00:14:49] [PASSED] destination_pitch
[00:14:49] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[00:14:49] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[00:14:49] [PASSED] single_pixel_source_buffer
[00:14:49] [PASSED] single_pixel_clip_rectangle
[00:14:49] [PASSED] well_known_colors
[00:14:49] [PASSED] destination_pitch
[00:14:49] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[00:14:49] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[00:14:49] [PASSED] single_pixel_source_buffer
[00:14:49] [PASSED] single_pixel_clip_rectangle
[00:14:49] [PASSED] well_known_colors
[00:14:49] [PASSED] destination_pitch
[00:14:49] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[00:14:49] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[00:14:49] [PASSED] single_pixel_source_buffer
[00:14:49] [PASSED] single_pixel_clip_rectangle
[00:14:49] [PASSED] well_known_colors
[00:14:49] [PASSED] destination_pitch
[00:14:49] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[00:14:49] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[00:14:49] [PASSED] single_pixel_source_buffer
[00:14:49] [PASSED] single_pixel_clip_rectangle
[00:14:49] [PASSED] well_known_colors
[00:14:49] [PASSED] destination_pitch
[00:14:49] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[00:14:49] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[00:14:49] [PASSED] single_pixel_source_buffer
[00:14:49] [PASSED] single_pixel_clip_rectangle
[00:14:49] [PASSED] well_known_colors
[00:14:49] [PASSED] destination_pitch
[00:14:49] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[00:14:49] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[00:14:49] [PASSED] single_pixel_source_buffer
[00:14:49] [PASSED] single_pixel_clip_rectangle
[00:14:49] [PASSED] well_known_colors
[00:14:49] [PASSED] destination_pitch
[00:14:49] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[00:14:49] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[00:14:49] [PASSED] single_pixel_source_buffer
[00:14:49] [PASSED] single_pixel_clip_rectangle
[00:14:49] [PASSED] well_known_colors
[00:14:49] [PASSED] destination_pitch
[00:14:49] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[00:14:49] ============== drm_test_fb_xrgb8888_to_mono ===============
[00:14:49] [PASSED] single_pixel_source_buffer
[00:14:49] [PASSED] single_pixel_clip_rectangle
[00:14:49] [PASSED] well_known_colors
[00:14:49] [PASSED] destination_pitch
[00:14:49] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[00:14:49] ==================== drm_test_fb_swab =====================
[00:14:49] [PASSED] single_pixel_source_buffer
[00:14:49] [PASSED] single_pixel_clip_rectangle
[00:14:49] [PASSED] well_known_colors
[00:14:49] [PASSED] destination_pitch
[00:14:49] ================ [PASSED] drm_test_fb_swab =================
[00:14:49] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[00:14:49] [PASSED] single_pixel_source_buffer
[00:14:49] [PASSED] single_pixel_clip_rectangle
[00:14:49] [PASSED] well_known_colors
[00:14:49] [PASSED] destination_pitch
[00:14:49] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[00:14:49] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[00:14:49] [PASSED] single_pixel_source_buffer
[00:14:49] [PASSED] single_pixel_clip_rectangle
[00:14:49] [PASSED] well_known_colors
[00:14:49] [PASSED] destination_pitch
[00:14:49] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[00:14:49] ================= drm_test_fb_clip_offset =================
[00:14:49] [PASSED] pass through
[00:14:49] [PASSED] horizontal offset
[00:14:49] [PASSED] vertical offset
[00:14:49] [PASSED] horizontal and vertical offset
[00:14:49] [PASSED] horizontal offset (custom pitch)
[00:14:49] [PASSED] vertical offset (custom pitch)
[00:14:49] [PASSED] horizontal and vertical offset (custom pitch)
[00:14:49] ============= [PASSED] drm_test_fb_clip_offset =============
[00:14:49] =================== drm_test_fb_memcpy ====================
[00:14:49] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[00:14:49] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[00:14:49] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[00:14:49] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[00:14:49] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[00:14:49] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[00:14:49] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[00:14:49] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[00:14:49] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[00:14:49] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[00:14:49] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[00:14:49] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[00:14:49] =============== [PASSED] drm_test_fb_memcpy ================
[00:14:49] ============= [PASSED] drm_format_helper_test ==============
[00:14:49] ================= drm_format (18 subtests) =================
[00:14:49] [PASSED] drm_test_format_block_width_invalid
[00:14:49] [PASSED] drm_test_format_block_width_one_plane
[00:14:49] [PASSED] drm_test_format_block_width_two_plane
[00:14:49] [PASSED] drm_test_format_block_width_three_plane
[00:14:49] [PASSED] drm_test_format_block_width_tiled
[00:14:49] [PASSED] drm_test_format_block_height_invalid
[00:14:49] [PASSED] drm_test_format_block_height_one_plane
[00:14:49] [PASSED] drm_test_format_block_height_two_plane
[00:14:49] [PASSED] drm_test_format_block_height_three_plane
[00:14:49] [PASSED] drm_test_format_block_height_tiled
[00:14:49] [PASSED] drm_test_format_min_pitch_invalid
[00:14:49] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[00:14:49] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[00:14:49] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[00:14:49] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[00:14:49] [PASSED] drm_test_format_min_pitch_two_plane
[00:14:49] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[00:14:49] [PASSED] drm_test_format_min_pitch_tiled
[00:14:49] =================== [PASSED] drm_format ====================
[00:14:49] ============== drm_framebuffer (10 subtests) ===============
[00:14:49] ========== drm_test_framebuffer_check_src_coords ==========
[00:14:49] [PASSED] Success: source fits into fb
[00:14:49] [PASSED] Fail: overflowing fb with x-axis coordinate
[00:14:49] [PASSED] Fail: overflowing fb with y-axis coordinate
[00:14:49] [PASSED] Fail: overflowing fb with source width
[00:14:49] [PASSED] Fail: overflowing fb with source height
[00:14:49] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[00:14:49] [PASSED] drm_test_framebuffer_cleanup
[00:14:49] =============== drm_test_framebuffer_create ===============
[00:14:49] [PASSED] ABGR8888 normal sizes
[00:14:49] [PASSED] ABGR8888 max sizes
[00:14:49] [PASSED] ABGR8888 pitch greater than min required
[00:14:49] [PASSED] ABGR8888 pitch less than min required
[00:14:49] [PASSED] ABGR8888 Invalid width
[00:14:49] [PASSED] ABGR8888 Invalid buffer handle
[00:14:49] [PASSED] No pixel format
[00:14:49] [PASSED] ABGR8888 Width 0
[00:14:49] [PASSED] ABGR8888 Height 0
[00:14:49] [PASSED] ABGR8888 Out of bound height * pitch combination
[00:14:49] [PASSED] ABGR8888 Large buffer offset
[00:14:49] [PASSED] ABGR8888 Buffer offset for inexistent plane
[00:14:49] [PASSED] ABGR8888 Invalid flag
[00:14:49] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[00:14:49] [PASSED] ABGR8888 Valid buffer modifier
[00:14:49] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[00:14:49] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[00:14:49] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[00:14:49] [PASSED] NV12 Normal sizes
[00:14:49] [PASSED] NV12 Max sizes
[00:14:49] [PASSED] NV12 Invalid pitch
[00:14:49] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[00:14:49] [PASSED] NV12 different modifier per-plane
[00:14:49] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[00:14:49] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[00:14:49] [PASSED] NV12 Modifier for inexistent plane
[00:14:49] [PASSED] NV12 Handle for inexistent plane
[00:14:49] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[00:14:49] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[00:14:49] [PASSED] YVU420 Normal sizes
[00:14:49] [PASSED] YVU420 Max sizes
[00:14:49] [PASSED] YVU420 Invalid pitch
[00:14:49] [PASSED] YVU420 Different pitches
[00:14:49] [PASSED] YVU420 Different buffer offsets/pitches
[00:14:49] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[00:14:49] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[00:14:49] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[00:14:49] [PASSED] YVU420 Valid modifier
[00:14:49] [PASSED] YVU420 Different modifiers per plane
[00:14:49] [PASSED] YVU420 Modifier for inexistent plane
[00:14:49] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[00:14:49] [PASSED] X0L2 Normal sizes
[00:14:49] [PASSED] X0L2 Max sizes
[00:14:49] [PASSED] X0L2 Invalid pitch
[00:14:49] [PASSED] X0L2 Pitch greater than minimum required
[00:14:49] [PASSED] X0L2 Handle for inexistent plane
[00:14:49] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[00:14:49] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[00:14:49] [PASSED] X0L2 Valid modifier
[00:14:49] [PASSED] X0L2 Modifier for inexistent plane
[00:14:49] =========== [PASSED] drm_test_framebuffer_create ===========
[00:14:49] [PASSED] drm_test_framebuffer_free
[00:14:49] [PASSED] drm_test_framebuffer_init
[00:14:49] [PASSED] drm_test_framebuffer_init_bad_format
[00:14:49] [PASSED] drm_test_framebuffer_init_dev_mismatch
[00:14:49] [PASSED] drm_test_framebuffer_lookup
[00:14:49] [PASSED] drm_test_framebuffer_lookup_inexistent
[00:14:49] [PASSED] drm_test_framebuffer_modifiers_not_supported
[00:14:49] ================= [PASSED] drm_framebuffer =================
[00:14:49] ================ drm_gem_shmem (8 subtests) ================
[00:14:49] [PASSED] drm_gem_shmem_test_obj_create
[00:14:49] [PASSED] drm_gem_shmem_test_obj_create_private
[00:14:49] [PASSED] drm_gem_shmem_test_pin_pages
[00:14:49] [PASSED] drm_gem_shmem_test_vmap
[00:14:49] [PASSED] drm_gem_shmem_test_get_sg_table
[00:14:49] [PASSED] drm_gem_shmem_test_get_pages_sgt
[00:14:49] [PASSED] drm_gem_shmem_test_madvise
[00:14:49] [PASSED] drm_gem_shmem_test_purge
[00:14:49] ================== [PASSED] drm_gem_shmem ==================
[00:14:49] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[00:14:49] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[00:14:49] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[00:14:49] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[00:14:49] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[00:14:49] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[00:14:49] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[00:14:49] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[00:14:49] [PASSED] Automatic
[00:14:49] [PASSED] Full
[00:14:49] [PASSED] Limited 16:235
[00:14:49] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[00:14:49] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[00:14:49] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[00:14:49] [PASSED] drm_test_check_disable_connector
[00:14:49] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[00:14:49] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[00:14:49] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[00:14:49] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[00:14:49] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[00:14:49] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[00:14:49] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[00:14:49] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[00:14:49] [PASSED] drm_test_check_output_bpc_dvi
[00:14:49] [PASSED] drm_test_check_output_bpc_format_vic_1
[00:14:49] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[00:14:49] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[00:14:49] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[00:14:49] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[00:14:49] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[00:14:49] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[00:14:49] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[00:14:49] ============ drm_test_check_hdmi_color_format =============
[00:14:49] [PASSED] AUTO -> RGB
[00:14:49] [PASSED] YCBCR422 -> YUV422
[00:14:49] [PASSED] YCBCR420 -> YUV420
[00:14:49] [PASSED] YCBCR444 -> YUV444
[00:14:49] [PASSED] RGB -> RGB
[00:14:49] ======== [PASSED] drm_test_check_hdmi_color_format =========
[00:14:49] ======== drm_test_check_hdmi_color_format_420_only ========
[00:14:49] [PASSED] RGB should fail
[00:14:49] [PASSED] YUV444 should fail
[00:14:49] [PASSED] YUV422 should fail
[00:14:49] [PASSED] YUV420 should work
[00:14:49] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[00:14:49] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[00:14:49] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[00:14:49] [PASSED] drm_test_check_broadcast_rgb_value
[00:14:49] [PASSED] drm_test_check_bpc_8_value
[00:14:49] [PASSED] drm_test_check_bpc_10_value
[00:14:49] [PASSED] drm_test_check_bpc_12_value
[00:14:49] [PASSED] drm_test_check_format_value
[00:14:49] [PASSED] drm_test_check_tmds_char_value
[00:14:49] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[00:14:49] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[00:14:49] [PASSED] drm_test_check_mode_valid
[00:14:49] [PASSED] drm_test_check_mode_valid_reject
[00:14:49] [PASSED] drm_test_check_mode_valid_reject_rate
[00:14:49] [PASSED] drm_test_check_mode_valid_reject_max_clock
[00:14:49] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[00:14:49] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[00:14:49] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[00:14:49] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[00:14:49] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[00:14:49] [PASSED] drm_test_check_infoframes
[00:14:49] [PASSED] drm_test_check_reject_avi_infoframe
[00:14:49] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[00:14:49] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[00:14:49] [PASSED] drm_test_check_reject_audio_infoframe
[00:14:49] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[00:14:49] ================= drm_managed (2 subtests) =================
[00:14:49] [PASSED] drm_test_managed_release_action
[00:14:49] [PASSED] drm_test_managed_run_action
[00:14:49] =================== [PASSED] drm_managed ===================
[00:14:49] =================== drm_mm (6 subtests) ====================
[00:14:49] [PASSED] drm_test_mm_init
[00:14:49] [PASSED] drm_test_mm_debug
[00:14:49] [PASSED] drm_test_mm_align32
[00:14:49] [PASSED] drm_test_mm_align64
[00:14:49] [PASSED] drm_test_mm_lowest
[00:14:49] [PASSED] drm_test_mm_highest
[00:14:49] ===================== [PASSED] drm_mm ======================
[00:14:49] ============= drm_modes_analog_tv (5 subtests) =============
[00:14:49] [PASSED] drm_test_modes_analog_tv_mono_576i
[00:14:49] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[00:14:49] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[00:14:49] [PASSED] drm_test_modes_analog_tv_pal_576i
[00:14:49] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[00:14:49] =============== [PASSED] drm_modes_analog_tv ===============
[00:14:49] ============== drm_plane_helper (2 subtests) ===============
[00:14:49] =============== drm_test_check_plane_state ================
[00:14:49] [PASSED] clipping_simple
[00:14:49] [PASSED] clipping_rotate_reflect
[00:14:49] [PASSED] positioning_simple
[00:14:49] [PASSED] upscaling
[00:14:49] [PASSED] downscaling
[00:14:49] [PASSED] rounding1
[00:14:49] [PASSED] rounding2
[00:14:49] [PASSED] rounding3
[00:14:49] [PASSED] rounding4
[00:14:49] =========== [PASSED] drm_test_check_plane_state ============
[00:14:49] =========== drm_test_check_invalid_plane_state ============
[00:14:49] [PASSED] positioning_invalid
[00:14:49] [PASSED] upscaling_invalid
[00:14:49] [PASSED] downscaling_invalid
[00:14:49] ======= [PASSED] drm_test_check_invalid_plane_state ========
[00:14:49] ================ [PASSED] drm_plane_helper =================
[00:14:49] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[00:14:49] ====== drm_test_connector_helper_tv_get_modes_check =======
[00:14:49] [PASSED] None
[00:14:49] [PASSED] PAL
[00:14:49] [PASSED] NTSC
[00:14:49] [PASSED] Both, NTSC Default
[00:14:49] [PASSED] Both, PAL Default
[00:14:49] [PASSED] Both, NTSC Default, with PAL on command-line
[00:14:49] [PASSED] Both, PAL Default, with NTSC on command-line
[00:14:49] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[00:14:49] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[00:14:49] ================== drm_rect (9 subtests) ===================
[00:14:49] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[00:14:49] [PASSED] drm_test_rect_clip_scaled_not_clipped
[00:14:49] [PASSED] drm_test_rect_clip_scaled_clipped
[00:14:49] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[00:14:49] ================= drm_test_rect_intersect =================
[00:14:49] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[00:14:49] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[00:14:49] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[00:14:49] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[00:14:49] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[00:14:49] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[00:14:49] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[00:14:49] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[00:14:49] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[00:14:49] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[00:14:49] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[00:14:49] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[00:14:49] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[00:14:49] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[00:14:49] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[00:14:49] ============= [PASSED] drm_test_rect_intersect =============
[00:14:49] ================ drm_test_rect_calc_hscale ================
[00:14:49] [PASSED] normal use
[00:14:49] [PASSED] out of max range
[00:14:49] [PASSED] out of min range
[00:14:49] [PASSED] zero dst
[00:14:49] [PASSED] negative src
[00:14:49] [PASSED] negative dst
[00:14:49] ============ [PASSED] drm_test_rect_calc_hscale ============
[00:14:49] ================ drm_test_rect_calc_vscale ================
[00:14:49] [PASSED] normal use
[00:14:49] [PASSED] out of max range
[00:14:49] [PASSED] out of min range
[00:14:49] [PASSED] zero dst
[00:14:49] [PASSED] negative src
[00:14:49] [PASSED] negative dst
[00:14:49] ============ [PASSED] drm_test_rect_calc_vscale ============
[00:14:49] ================== drm_test_rect_rotate ===================
[00:14:49] [PASSED] reflect-x
[00:14:49] [PASSED] reflect-y
[00:14:49] [PASSED] rotate-0
[00:14:49] [PASSED] rotate-90
[00:14:49] [PASSED] rotate-180
[00:14:49] [PASSED] rotate-270
[00:14:49] ============== [PASSED] drm_test_rect_rotate ===============
[00:14:49] ================ drm_test_rect_rotate_inv =================
[00:14:49] [PASSED] reflect-x
[00:14:49] [PASSED] reflect-y
[00:14:49] [PASSED] rotate-0
[00:14:49] [PASSED] rotate-90
[00:14:49] [PASSED] rotate-180
[00:14:49] [PASSED] rotate-270
[00:14:49] ============ [PASSED] drm_test_rect_rotate_inv =============
[00:14:49] ==================== [PASSED] drm_rect =====================
[00:14:49] ============ drm_sysfb_modeset_test (1 subtest) ============
[00:14:49] ============ drm_test_sysfb_build_fourcc_list =============
[00:14:49] [PASSED] no native formats
[00:14:49] [PASSED] XRGB8888 as native format
[00:14:49] [PASSED] remove duplicates
[00:14:49] [PASSED] convert alpha formats
[00:14:49] [PASSED] random formats
[00:14:49] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[00:14:49] ============= [PASSED] drm_sysfb_modeset_test ==============
[00:14:49] ================== drm_fixp (2 subtests) ===================
[00:14:49] [PASSED] drm_test_int2fixp
[00:14:49] [PASSED] drm_test_sm2fixp
[00:14:49] ==================== [PASSED] drm_fixp =====================
[00:14:49] ============================================================
[00:14:49] Testing complete. Ran 637 tests: passed: 637
[00:14:49] Elapsed time: 26.633s total, 1.720s configuring, 24.748s building, 0.147s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[00:14:49] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[00:14:51] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[00:15:01] Starting KUnit Kernel (1/1)...
[00:15:01] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[00:15:01] ================= ttm_device (5 subtests) ==================
[00:15:01] [PASSED] ttm_device_init_basic
[00:15:01] [PASSED] ttm_device_init_multiple
[00:15:01] [PASSED] ttm_device_fini_basic
[00:15:01] [PASSED] ttm_device_init_no_vma_man
[00:15:01] ================== ttm_device_init_pools ==================
[00:15:01] [PASSED] No DMA allocations, no DMA32 required
[00:15:01] [PASSED] DMA allocations, DMA32 required
[00:15:01] [PASSED] No DMA allocations, DMA32 required
[00:15:01] [PASSED] DMA allocations, no DMA32 required
[00:15:01] ============== [PASSED] ttm_device_init_pools ==============
[00:15:01] =================== [PASSED] ttm_device ====================
[00:15:01] ================== ttm_pool (8 subtests) ===================
[00:15:01] ================== ttm_pool_alloc_basic ===================
[00:15:01] [PASSED] One page
[00:15:01] [PASSED] More than one page
[00:15:01] [PASSED] Above the allocation limit
[00:15:01] [PASSED] One page, with coherent DMA mappings enabled
[00:15:01] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[00:15:01] ============== [PASSED] ttm_pool_alloc_basic ===============
[00:15:01] ============== ttm_pool_alloc_basic_dma_addr ==============
[00:15:01] [PASSED] One page
[00:15:01] [PASSED] More than one page
[00:15:01] [PASSED] Above the allocation limit
[00:15:01] [PASSED] One page, with coherent DMA mappings enabled
[00:15:01] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[00:15:01] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[00:15:01] [PASSED] ttm_pool_alloc_order_caching_match
[00:15:01] [PASSED] ttm_pool_alloc_caching_mismatch
[00:15:01] [PASSED] ttm_pool_alloc_order_mismatch
[00:15:01] [PASSED] ttm_pool_free_dma_alloc
[00:15:01] [PASSED] ttm_pool_free_no_dma_alloc
[00:15:01] [PASSED] ttm_pool_fini_basic
[00:15:01] ==================== [PASSED] ttm_pool =====================
[00:15:01] ================ ttm_resource (8 subtests) =================
[00:15:01] ================= ttm_resource_init_basic =================
[00:15:01] [PASSED] Init resource in TTM_PL_SYSTEM
[00:15:01] [PASSED] Init resource in TTM_PL_VRAM
[00:15:01] [PASSED] Init resource in a private placement
[00:15:01] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[00:15:01] ============= [PASSED] ttm_resource_init_basic =============
[00:15:01] [PASSED] ttm_resource_init_pinned
[00:15:01] [PASSED] ttm_resource_fini_basic
[00:15:01] [PASSED] ttm_resource_manager_init_basic
[00:15:01] [PASSED] ttm_resource_manager_usage_basic
[00:15:01] [PASSED] ttm_resource_manager_set_used_basic
[00:15:01] [PASSED] ttm_sys_man_alloc_basic
[00:15:01] [PASSED] ttm_sys_man_free_basic
[00:15:01] ================== [PASSED] ttm_resource ===================
[00:15:01] =================== ttm_tt (15 subtests) ===================
[00:15:01] ==================== ttm_tt_init_basic ====================
[00:15:01] [PASSED] Page-aligned size
[00:15:01] [PASSED] Extra pages requested
[00:15:01] ================ [PASSED] ttm_tt_init_basic ================
[00:15:01] [PASSED] ttm_tt_init_misaligned
[00:15:01] [PASSED] ttm_tt_fini_basic
[00:15:01] [PASSED] ttm_tt_fini_sg
[00:15:01] [PASSED] ttm_tt_fini_shmem
[00:15:01] [PASSED] ttm_tt_create_basic
[00:15:01] [PASSED] ttm_tt_create_invalid_bo_type
[00:15:01] [PASSED] ttm_tt_create_ttm_exists
[00:15:01] [PASSED] ttm_tt_create_failed
[00:15:01] [PASSED] ttm_tt_destroy_basic
[00:15:01] [PASSED] ttm_tt_populate_null_ttm
[00:15:01] [PASSED] ttm_tt_populate_populated_ttm
[00:15:01] [PASSED] ttm_tt_unpopulate_basic
[00:15:01] [PASSED] ttm_tt_unpopulate_empty_ttm
[00:15:01] [PASSED] ttm_tt_swapin_basic
[00:15:01] ===================== [PASSED] ttm_tt ======================
[00:15:01] =================== ttm_bo (14 subtests) ===================
[00:15:01] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[00:15:01] [PASSED] Cannot be interrupted and sleeps
[00:15:01] [PASSED] Cannot be interrupted, locks straight away
[00:15:01] [PASSED] Can be interrupted, sleeps
[00:15:01] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[00:15:01] [PASSED] ttm_bo_reserve_locked_no_sleep
[00:15:01] [PASSED] ttm_bo_reserve_no_wait_ticket
[00:15:01] [PASSED] ttm_bo_reserve_double_resv
[00:15:01] [PASSED] ttm_bo_reserve_interrupted
[00:15:01] [PASSED] ttm_bo_reserve_deadlock
[00:15:01] [PASSED] ttm_bo_unreserve_basic
[00:15:01] [PASSED] ttm_bo_unreserve_pinned
[00:15:01] [PASSED] ttm_bo_unreserve_bulk
[00:15:01] [PASSED] ttm_bo_fini_basic
[00:15:01] [PASSED] ttm_bo_fini_shared_resv
[00:15:01] [PASSED] ttm_bo_pin_basic
[00:15:01] [PASSED] ttm_bo_pin_unpin_resource
[00:15:01] [PASSED] ttm_bo_multiple_pin_one_unpin
[00:15:01] ===================== [PASSED] ttm_bo ======================
[00:15:01] ============== ttm_bo_validate (22 subtests) ===============
[00:15:01] ============== ttm_bo_init_reserved_sys_man ===============
[00:15:01] [PASSED] Buffer object for userspace
[00:15:01] [PASSED] Kernel buffer object
[00:15:01] [PASSED] Shared buffer object
[00:15:01] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[00:15:01] ============== ttm_bo_init_reserved_mock_man ==============
[00:15:01] [PASSED] Buffer object for userspace
[00:15:01] [PASSED] Kernel buffer object
[00:15:01] [PASSED] Shared buffer object
[00:15:01] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[00:15:01] [PASSED] ttm_bo_init_reserved_resv
[00:15:01] ================== ttm_bo_validate_basic ==================
[00:15:01] [PASSED] Buffer object for userspace
[00:15:01] [PASSED] Kernel buffer object
[00:15:01] [PASSED] Shared buffer object
[00:15:01] ============== [PASSED] ttm_bo_validate_basic ==============
[00:15:01] [PASSED] ttm_bo_validate_invalid_placement
[00:15:01] ============= ttm_bo_validate_same_placement ==============
[00:15:01] [PASSED] System manager
[00:15:01] [PASSED] VRAM manager
[00:15:01] ========= [PASSED] ttm_bo_validate_same_placement ==========
[00:15:01] [PASSED] ttm_bo_validate_failed_alloc
[00:15:01] [PASSED] ttm_bo_validate_pinned
[00:15:01] [PASSED] ttm_bo_validate_busy_placement
[00:15:01] ================ ttm_bo_validate_multihop =================
[00:15:01] [PASSED] Buffer object for userspace
[00:15:01] [PASSED] Kernel buffer object
[00:15:01] [PASSED] Shared buffer object
[00:15:01] ============ [PASSED] ttm_bo_validate_multihop =============
[00:15:01] ========== ttm_bo_validate_no_placement_signaled ==========
[00:15:01] [PASSED] Buffer object in system domain, no page vector
[00:15:01] [PASSED] Buffer object in system domain with an existing page vector
[00:15:01] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[00:15:01] ======== ttm_bo_validate_no_placement_not_signaled ========
[00:15:01] [PASSED] Buffer object for userspace
[00:15:01] [PASSED] Kernel buffer object
[00:15:01] [PASSED] Shared buffer object
[00:15:01] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[00:15:01] [PASSED] ttm_bo_validate_move_fence_signaled
[00:15:01] ========= ttm_bo_validate_move_fence_not_signaled =========
[00:15:01] [PASSED] Waits for GPU
[00:15:01] [PASSED] Tries to lock straight away
[00:15:01] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[00:15:01] [PASSED] ttm_bo_validate_swapout
[00:15:01] [PASSED] ttm_bo_validate_happy_evict
[00:15:01] [PASSED] ttm_bo_validate_all_pinned_evict
[00:15:01] [PASSED] ttm_bo_validate_allowed_only_evict
[00:15:01] [PASSED] ttm_bo_validate_deleted_evict
[00:15:01] [PASSED] ttm_bo_validate_busy_domain_evict
[00:15:01] [PASSED] ttm_bo_validate_evict_gutting
[00:15:01] [PASSED] ttm_bo_validate_recrusive_evict
[00:15:01] ================= [PASSED] ttm_bo_validate =================
[00:15:01] ============================================================
[00:15:01] Testing complete. Ran 102 tests: passed: 102
[00:15:01] Elapsed time: 11.976s total, 1.800s configuring, 9.961s building, 0.168s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[00:15:02] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[00:15:03] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[00:15:12] Starting KUnit Kernel (1/1)...
[00:15:12] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[00:15:12] =============== dma-buf-fence (12 subtests) ================
[00:15:12] [PASSED] test_sanitycheck
[00:15:12] [PASSED] test_signaling
[00:15:12] [PASSED] test_add_callback
[00:15:12] [PASSED] test_late_add_callback
[00:15:12] [PASSED] test_rm_callback
[00:15:12] [PASSED] test_late_rm_callback
[00:15:12] [PASSED] test_status
[00:15:12] [PASSED] test_error
[00:15:12] [PASSED] test_wait
[00:15:12] [PASSED] test_wait_timeout
[00:15:12] [PASSED] test_stub
[00:15:12] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[00:15:12] ================== [PASSED] dma-buf-fence ==================
[00:15:12] ============ dma-buf-fence-chain (11 subtests) =============
[00:15:12] [PASSED] test_sanitycheck
[00:15:12] [PASSED] test_find_seqno
[00:15:12] [PASSED] test_find_signaled
[00:15:12] [PASSED] test_find_out_of_order
[00:15:17] [PASSED] test_find_gap
[00:15:17] [PASSED] test_find_race
[00:15:17] [PASSED] test_signal_forward
[00:15:17] [PASSED] test_signal_backward
[00:15:17] [PASSED] test_wait_forward
[00:15:17] [PASSED] test_wait_backward
[00:15:17] [PASSED] test_wait_random
[00:15:17] =============== [PASSED] dma-buf-fence-chain ===============
[00:15:17] ============ dma-buf-fence-unwrap (10 subtests) ============
[00:15:17] [PASSED] test_sanitycheck
[00:15:17] [PASSED] test_unwrap_array
[00:15:17] [PASSED] test_unwrap_chain
[00:15:17] [PASSED] test_unwrap_chain_array
[00:15:17] [PASSED] test_unwrap_merge
[00:15:17] [PASSED] test_unwrap_merge_duplicate
[00:15:17] [PASSED] test_unwrap_merge_seqno
[00:15:17] [PASSED] test_unwrap_merge_order
[00:15:17] [PASSED] test_unwrap_merge_complex
[00:15:17] [PASSED] test_unwrap_merge_complex_seqno
[00:15:17] ============== [PASSED] dma-buf-fence-unwrap ===============
[00:15:17] ================ dma-buf-resv (5 subtests) =================
[00:15:17] [PASSED] test_sanitycheck
[00:15:17] ===================== test_signaling ======================
[00:15:17] [PASSED] kernel
[00:15:17] [PASSED] write
[00:15:17] [PASSED] read
[00:15:17] [PASSED] bookkeep
[00:15:17] ================= [PASSED] test_signaling ==================
[00:15:17] ====================== test_for_each ======================
[00:15:17] [PASSED] kernel
[00:15:17] [PASSED] write
[00:15:17] [PASSED] read
[00:15:17] [PASSED] bookkeep
[00:15:17] ================== [PASSED] test_for_each ==================
[00:15:17] ================= test_for_each_unlocked ==================
[00:15:17] [PASSED] kernel
[00:15:17] [PASSED] write
[00:15:17] [PASSED] read
[00:15:17] [PASSED] bookkeep
[00:15:17] ============= [PASSED] test_for_each_unlocked ==============
[00:15:17] ===================== test_get_fences =====================
[00:15:17] [PASSED] kernel
[00:15:17] [PASSED] write
[00:15:17] [PASSED] read
[00:15:17] [PASSED] bookkeep
[00:15:17] ================= [PASSED] test_get_fences =================
[00:15:17] ================== [PASSED] dma-buf-resv ===================
[00:15:17] ============================================================
[00:15:17] Testing complete. Ran 50 tests: passed: 49, skipped: 1
[00:15:17] Elapsed time: 15.664s total, 1.774s configuring, 8.569s building, 5.280s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v5 4/4] drm/xe/forcewake: enable configurable delayed forcewake release
2026-08-13 0:06 ` [PATCH v5 4/4] drm/xe/forcewake: enable configurable delayed forcewake release Zongyao Bai
@ 2026-08-13 0:18 ` sashiko-bot
0 siblings, 0 replies; 34+ messages in thread
From: sashiko-bot @ 2026-08-13 0:18 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The function `query_engine_cycles` mixes goto-based error handling with scope-based cleanup macros.
--
--- Patch [4]: [PATCH v5 4/4] drm/xe/forcewake: enable configurable delayed forcewake release ---
commit 7d3e5746e331fb4da88407a96b40b25e06abf763
Author: Zongyao Bai <zongyao.bai@intel.com>
drm/xe/forcewake: enable configurable delayed forcewake release
This commit introduces a configurable delayed forcewake release for
engine-cycle queries to avoid repeated wake and ACK cycles during bursts.
It adds a configfs attribute to control the hold interval before releasing
an idle forcewake domain.
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -168,7 +168,7 @@ query_engine_cycles(struct xe_device *xe,
>
> fw_domain = xe_hw_engine_to_fw_domain(hwe);
>
> - xe_with_force_wake(fw_ref, gt_to_fw(gt), fw_domain) {
> + xe_with_force_wake_delay(fw_ref, gt_to_fw(gt), fw_domain) {
> if (!xe_force_wake_ref_has_domain(fw_ref.domains, fw_domain)) {
> err = -EIO;
> goto out;
[Severity: Low]
Does this code mix goto-based error handling with scope-based cleanup macros?
According to the cleanup subsystem guidelines, the expectation is that usage of
goto and cleanup helpers is never mixed in the same function.
The function query_engine_cycles() uses goto out; for manual drm_dev_exit()
cleanup while simultaneously using the xe_with_force_wake_delay() macro, which
internally uses the scope-based CLASS() cleanup macro. While jumping out of the
loop block correctly invokes the scope destructor here without causing a
double-free or resource leak, it violates the subsystem structural guidelines
against mixing these cleanup styles.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260813000654.2712317-1-zongyao.bai@intel.com?part=4
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v5 1/4] drm/xe/forcewake: synchronize engine-cycle access with unplug
2026-08-13 0:06 ` [PATCH v5 1/4] drm/xe/forcewake: synchronize engine-cycle access with unplug Zongyao Bai
@ 2026-08-13 0:21 ` sashiko-bot
0 siblings, 0 replies; 34+ messages in thread
From: sashiko-bot @ 2026-08-13 0:21 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
Pre-existing issues:
- [High] Incomplete device unplug synchronization in query ioctls leading to potential MMIO access after unplug.
- [Medium] Missing array_index_nospec() on user-provided indices creates Spectre v1 gadgets.
--
--- Patch [1]: [PATCH v5 1/4] drm/xe/forcewake: synchronize engine-cycle access with unplug ---
commit cd6f1d67df5ef0b65b3a0c38b2fc6c7bd6e42c60
Author: Zongyao Bai <zongyao.bai@intel.com>
drm/xe/forcewake: synchronize engine-cycle access with unplug
This patch adds drm_dev_enter() and drm_dev_exit() to query_engine_cycles()
to protect forcewake and MMIO accesses against device unplug operations. It
also updates the probe failure path to use drm_dev_unplug() to ensure proper
synchronization.
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 71111ad324658..81b31325e5817 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
[ ... ]
> @@ -1166,7 +1166,7 @@ int xe_device_probe(struct xe_device *xe)
>
> err_unregister_display:
> xe_display_unregister(xe);
> - drm_dev_unregister(&xe->drm);
> + drm_dev_unplug(&xe->drm);
>
> return err;
> }
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index dc975f5953683..3c356bc48e2ab 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
[ ... ]
> @@ -143,28 +145,44 @@ query_engine_cycles(struct xe_device *xe,
> return -EINVAL;
>
> eci = &resp.eci;
> + if (!drm_dev_enter(&xe->drm, &dev_idx))
> + return -ENODEV;
> +
[Severity: High]
This is a pre-existing issue, but since this patch introduces device unplug
synchronization for query_engine_cycles(), should similar protection be added
to other queries like query_pxp_status() and query_oa_units()?
In xe_query.c, query_pxp_status() accesses hardware status without SRCU
protection:
query_pxp_status()
xe_pxp_get_readiness_status(xe->pxp);
Similarly, query_oa_units() reads MMIO indirectly:
query_oa_units()
xe_oa_timestamp_frequency()
xe_mmio_read32()
Without drm_dev_enter() protection, can these queries cause page faults if a
userspace process calls DRM_IOCTL_XE_DEVICE_QUERY concurrently with a device
unplug event?
> gt = xe_device_get_gt(xe, eci->gt_id);
> - if (!gt)
> - return -EINVAL;
> + if (!gt) {
> + err = -EINVAL;
> + goto out;
> + }
>
> - if (eci->engine_class >= ARRAY_SIZE(user_to_xe_engine_class))
> - return -EINVAL;
> + if (eci->engine_class >= ARRAY_SIZE(user_to_xe_engine_class)) {
> + err = -EINVAL;
> + goto out;
> + }
>
> hwe = xe_gt_hw_engine(gt, user_to_xe_engine_class[eci->engine_class],
> eci->engine_instance, true);
[Severity: Medium]
This is a pre-existing issue, but does the engine_class array access need
mitigation against speculative execution?
The eci->engine_class index comes directly from userspace and is used
to access the user_to_xe_engine_class array after a bounds check.
Could this be used to bypass bounds checks speculatively and leak
information via cache side channels?
Additionally, earlier in this function xe_device_get_gt() is called with
eci->gt_id, which also originates from userspace:
xe_device_get_gt()
if (gt_id >= xe->info.tile_count * xe->info.max_gt_per_tile)
return NULL;
tile = &xe->tiles[gt_id / xe->info.max_gt_per_tile];
Should array_index_nospec() be used for these userspace-provided indices?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260813000654.2712317-1-zongyao.bai@intel.com?part=1
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v5 2/4] drm/xe/forcewake: add delayed-release state machine
2026-08-13 0:06 ` [PATCH v5 2/4] drm/xe/forcewake: add delayed-release state machine Zongyao Bai
@ 2026-08-13 0:23 ` sashiko-bot
0 siblings, 0 replies; 34+ messages in thread
From: sashiko-bot @ 2026-08-13 0:23 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Use-After-Free in delayed-release forcewake due to devm/drmm teardown asymmetry and timer re-arming
--
--- Patch [2]: [PATCH v5 2/4] drm/xe/forcewake: add delayed-release state machine ---
commit 7a90eb7b65ee38383fb6f1973ddea842f2c9c391
Author: Zongyao Bai <zongyao.bai@intel.com>
drm/xe/forcewake: add delayed-release state machine
Add an opt-in forcewake release path that keeps an idle domain awake
for a short hold interval. A subsequent get can reuse the domain
without issuing another wake request or waiting for its ACK.
> diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
> index 197e2197bd0a3..3f5013c7424c8 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake.c
> +++ b/drivers/gpu/drm/xe/xe_force_wake.c
[ ... ]
> +static void xe_force_wake_fini(void *arg)
> +{
> + struct xe_force_wake *fw = arg;
> + struct xe_force_wake_domain *domain;
> + unsigned int tmp;
> +
> + for_each_fw_domain(domain, fw, tmp)
> + hrtimer_cancel(&domain->sleep_timer);
> +}
> +
> -void xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
> +int xe_force_wake_init_gt(struct xe_gt *gt, struct xe_force_wake *fw)
> {
[ ... ]
> }
> +
> + return devm_add_action_or_reset(xe->drm.dev, xe_force_wake_fini, fw);
> }
[Severity: High]
Does registering this teardown via devm create a use-after-free window?
Since devm teardown (PCI unbind) happens before drmm teardown, background
tasks like gt->ordered_wq (which are destroyed during drmm teardown) can
still be running after xe_force_wake_fini() has executed.
Also, if a timer was pending here, canceling it without putting the domain
to sleep could leave the hardware permanently awake. Is there a need to
clear the state or issue domain_sleep() during teardown?
[ ... ]
> @@ -242,12 +330,24 @@ void xe_force_wake_put(struct xe_force_wake *fw, unsigned int fw_ref)
>
> spin_lock_irqsave(&fw->lock, flags);
> for_each_fw_domain_masked(domain, fw_ref, fw, tmp) {
> + assert_domain_state(fw, domain);
> xe_gt_assert(gt, domain->ref);
>
> if (!--domain->ref) {
> - sleep |= BIT(domain->id);
> - domain_sleep(gt, domain);
> + if (delayed_release || domain->delayed_release_requested) {
> + domain->delayed_release_requested = false;
> + fw->delayed_release_domains |= BIT(domain->id);
> + hrtimer_start(&domain->sleep_timer,
> + us_to_ktime(xe->forcewake_hold_delay_us),
> + HRTIMER_MODE_REL);
[Severity: High]
If a background task drops the last reference here after xe_force_wake_fini()
has already run, could this unconditionally re-arm the timer?
If the timer is re-armed during this devm/drmm teardown window, the timer
callback might fire after the struct xe_gt memory has been completely freed
by drmm, resulting in a use-after-free.
Would it be safer to use drmm_add_action_or_reset() for teardown, or add a
mechanism to ensure we don't start timers when the device is being destroyed?
> + } else {
> + sleep |= BIT(domain->id);
> + domain_sleep(gt, domain);
> + }
> + } else if (delayed_release) {
> + domain->delayed_release_requested = true;
> }
> + assert_domain_state(fw, domain);
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260813000654.2712317-1-zongyao.bai@intel.com?part=2
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v5 3/4] drm/xe/forcewake: flush delayed release at power boundaries
2026-08-13 0:06 ` [PATCH v5 3/4] drm/xe/forcewake: flush delayed release at power boundaries Zongyao Bai
@ 2026-08-13 0:23 ` sashiko-bot
0 siblings, 0 replies; 34+ messages in thread
From: sashiko-bot @ 2026-08-13 0:23 UTC (permalink / raw)
To: Zongyao Bai; +Cc: intel-xe
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] PMU events hold long-lived forcewake references that outlive device teardown and suspend boundaries, defeating the patch's attempt to quiesce forcewake accesses before power-off.
--
--- Patch [3]: [PATCH v5 3/4] drm/xe/forcewake: flush delayed release at power boundaries ---
commit 137d6a969747b4828385eae977e1c1ba6eb0b98d
Author: Zongyao Bai <zongyao.bai@intel.com>
drm/xe/forcewake: flush delayed release at power boundaries
Add a synchronous forcewake flush that cancels per-domain timers and
settles pending sleep acknowledgments. Provide a scoped cleanup class
so the final put is always followed by the flush before the caller
continues toward power-off.
> diff --git a/drivers/gpu/drm/xe/xe_force_wake.c b/drivers/gpu/drm/xe/xe_force_wake.c
> index 3f5013c7424c8..ef43899e1f7d3 100644
> --- a/drivers/gpu/drm/xe/xe_force_wake.c
> +++ b/drivers/gpu/drm/xe/xe_force_wake.c
> @@ -391,6 +391,55 @@ void xe_force_wake_put_delay(struct xe_force_wake *fw, unsigned int fw_ref)
> __xe_force_wake_put(fw, fw_ref, true);
> }
>
> +/**
> + * xe_force_wake_flush - Flush delayed forcewake releases
> + * @fw: Pointer to the force wake structure
> + *
> + * Synchronously cancels delayed-release timers and completes pending sleep
> + * requests and ACK waits. This must be called after the final forcewake put
> + * and before power-off because the timer callback accesses MMIO.
> + *
> + * The caller must ensure no forcewake reference outlives this call and
> + * serialize against new delayed releases or final puts that consume a
> + * recorded delayed-release request. Timers are canceled before taking
> + * fw->lock because their callbacks acquire the same lock.
> + */
> +void xe_force_wake_flush(struct xe_force_wake *fw)
> +{
> + struct xe_gt *gt = fw->gt;
> + struct xe_force_wake_domain *domain;
> + unsigned int tmp, sleep, ack_fail = 0;
> + unsigned long flags;
> +
> + for_each_fw_domain(domain, fw, tmp)
> + hrtimer_cancel(&domain->sleep_timer);
> +
> + spin_lock_irqsave(&fw->lock, flags);
> + sleep = fw->sleep_ack_pending_domains;
> + for_each_fw_domain(domain, fw, tmp) {
> + assert_domain_state(fw, domain);
> + domain->delayed_release_requested = false;
> + if ((fw->delayed_release_domains & BIT(domain->id)) &&
> + !domain->ref) {
[Severity: High]
This is a pre-existing issue, but does this flush mechanism fail to quiesce
active PMU references before power-off?
If a user opens a PMU event (e.g., engine-active-ticks) and acquires a
forcewake reference, it can outlive device teardown or suspend. When
xe_force_wake_flush() runs, it skips the domain because domain->ref > 0.
If the device is unplugged or suspended while the PMU event is open, the domain
is not put to sleep due to the active reference, and the hardware loses power.
On resume, software may incorrectly believe the domain is awake, failing to send
wake requests and causing hardware timeouts or hangs on subsequent accesses.
Furthermore, on unplug, mmio_fini sets regs = NULL. When the user finally
closes the PMU event fd, xe_pmu_event_destroy() releases forcewake:
drivers/gpu/drm/xe/xe_pmu.c:xe_pmu_event_destroy() {
...
xe_force_wake_put(gt_to_fw(gt), *fw_ref);
...
}
Will this cause a use-after-unmap logic hitting a WARN_ON_ONCE in
mmio_available when accessing the unmapped MMIO?
> + fw->delayed_release_domains &= ~BIT(domain->id);
> + sleep |= BIT(domain->id);
> + domain_sleep(gt, domain);
> + }
> + assert_domain_state(fw, domain);
> + }
> + for_each_fw_domain_masked(domain, sleep, fw, tmp) {
> + fw->sleep_ack_pending_domains &= ~BIT(domain->id);
> + if (domain_sleep_wait(gt, domain) == 0)
> + fw->awake_domains &= ~BIT(domain->id);
> + else
> + ack_fail |= BIT(domain->id);
> + }
> + spin_unlock_irqrestore(&fw->lock, flags);
> +
> + xe_gt_WARN(gt, ack_fail, "Forcewake domain%s %#x failed to acknowledge sleep request\n",
> + str_plural(hweight_long(ack_fail)), ack_fail);
> +}
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260813000654.2712317-1-zongyao.bai@intel.com?part=3
^ permalink raw reply [flat|nested] 34+ messages in thread
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-- links below jump to the message on this page --
2026-06-01 21:38 [PATCH] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
2026-06-01 22:37 ` ✓ CI.KUnit: success for " Patchwork
2026-06-01 23:15 ` ✓ Xe.CI.BAT: " Patchwork
2026-06-02 8:13 ` ✓ Xe.CI.FULL: " Patchwork
2026-06-11 1:03 ` [PATCH v2] " Zongyao Bai
2026-06-11 11:59 ` Maarten Lankhorst
2026-06-18 21:18 ` Bai, Zongyao
2026-06-11 1:13 ` ✓ CI.KUnit: success for drm/xe/forcewake: add delayed-release optimization (rev2) Patchwork
2026-06-11 1:58 ` ✓ Xe.CI.BAT: " Patchwork
2026-06-11 3:09 ` [PATCH] drm/xe/forcewake: add delayed-release optimization Matthew Brost
2026-06-11 3:15 ` Matthew Brost
2026-06-25 1:37 ` Bai, Zongyao
2026-06-11 11:29 ` ✓ Xe.CI.FULL: success for drm/xe/forcewake: add delayed-release optimization (rev2) Patchwork
2026-06-25 8:19 ` [PATCH v3] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
2026-06-25 8:51 ` ✓ CI.KUnit: success for drm/xe/forcewake: add delayed-release optimization (rev3) Patchwork
2026-06-25 9:26 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-06-25 10:55 ` ✗ Xe.CI.FULL: " Patchwork
2026-07-20 22:13 ` [PATCH v4] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
2026-07-21 22:43 ` Matthew Brost
2026-07-20 22:18 ` ✗ CI.checkpatch: warning for drm/xe/forcewake: add delayed-release optimization (rev4) Patchwork
2026-07-20 22:20 ` ✓ CI.KUnit: success " Patchwork
2026-07-20 22:54 ` ✓ Xe.CI.BAT: " Patchwork
2026-07-21 5:00 ` ✓ Xe.CI.FULL: " Patchwork
2026-08-13 0:06 ` [PATCH v5 0/4] drm/xe/forcewake: add delayed-release optimization Zongyao Bai
2026-08-13 0:06 ` [PATCH v5 1/4] drm/xe/forcewake: synchronize engine-cycle access with unplug Zongyao Bai
2026-08-13 0:21 ` sashiko-bot
2026-08-13 0:06 ` [PATCH v5 2/4] drm/xe/forcewake: add delayed-release state machine Zongyao Bai
2026-08-13 0:23 ` sashiko-bot
2026-08-13 0:06 ` [PATCH v5 3/4] drm/xe/forcewake: flush delayed release at power boundaries Zongyao Bai
2026-08-13 0:23 ` sashiko-bot
2026-08-13 0:06 ` [PATCH v5 4/4] drm/xe/forcewake: enable configurable delayed forcewake release Zongyao Bai
2026-08-13 0:18 ` sashiko-bot
2026-08-13 0:13 ` ✗ CI.checkpatch: warning for drm/xe/forcewake: add delayed-release optimization (rev5) Patchwork
2026-08-13 0:15 ` ✓ CI.KUnit: success " Patchwork
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