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From: Riana Tauro <riana.tauro@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: riana.tauro@intel.com, anshuman.gupta@intel.com,
	rodrigo.vivi@intel.com, aravind.iddamsetty@linux.intel.com,
	raag.jadav@intel.com, ravi.kishore.koppuravuri@intel.com,
	matthew.d.roper@intel.com
Subject: [PATCH 2/2] drm/xe/xe_guc: Skip GuC reset post SBR
Date: Fri, 28 Aug 2026 17:01:07 +0530	[thread overview]
Message-ID: <20260828113104.319843-6-riana.tauro@intel.com> (raw)
In-Reply-To: <20260828113104.319843-4-riana.tauro@intel.com>

Secondary Bus Reset causes all VRAM state to be lost along with hardware
state. The goal is to keep the device in reset till the teardown is
complete to avoid device accesses such as GuC reset in an unknown state.

Fixes: e46ee82f120f ("drm/xe: Skip device access during PCI error recovery")
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
 drivers/gpu/drm/xe/xe_device.h    | 5 -----
 drivers/gpu/drm/xe/xe_guc.c       | 5 +++++
 drivers/gpu/drm/xe/xe_pci_error.c | 1 -
 3 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 6c4cfaebc44a..a1127ab7d1a2 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -191,11 +191,6 @@ static inline void xe_device_set_in_reset(struct xe_device *xe)
 	atomic_set(&xe->in_reset, 1);
 }
 
-static inline void xe_device_clear_in_reset(struct xe_device *xe)
-{
-	atomic_set(&xe->in_reset, 0);
-}
-
 u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size);
 
 void xe_device_snapshot_print(struct xe_device *xe, struct drm_printer *p);
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index c7f8bbd4cb92..2c7f411b89a7 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -986,6 +986,11 @@ int xe_guc_reset(struct xe_guc *guc)
 	u32 guc_status, gdrst;
 	int ret;
 
+	if (xe_device_is_in_reset(gt_to_xe(gt))) {
+		xe_gt_dbg(gt, "Skipping GuC reset, device is in reset\n");
+		return 0;
+	}
+
 	xe_force_wake_assert_held(gt_to_fw(gt), XE_FW_GT);
 
 	if (IS_SRIOV_VF(gt_to_xe(gt)))
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 3e9c77f8483d..b7ac33965150 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -121,7 +121,6 @@ static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
 	 * TODO: optimize by re-initializing only the hardware state and re-creating
 	 * kernel BOs.
 	 */
-	xe_device_clear_in_reset(xe);
 	pdev->driver->remove(pdev);
 	devres_release_group(&pdev->dev, xe->devres_group);
 
-- 
2.47.1


  parent reply	other threads:[~2026-08-28 11:31 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-28 11:31 [PATCH 0/2] Xe Pci error handling fixes Riana Tauro
2026-08-28 11:31 ` [PATCH 1/2] drm/xe/xe_pci_error: Wait for pcode init post SBR Riana Tauro
2026-08-28 11:41   ` sashiko-bot
2026-08-28 14:06   ` Gupta, Anshuman
2026-08-29 14:00     ` Raag Jadav
2026-08-31 12:32     ` Aravind Iddamsetty
2026-09-03 12:53       ` Gupta, Anshuman
2026-08-28 11:31 ` Riana Tauro [this message]
2026-08-28 11:44   ` [PATCH 2/2] drm/xe/xe_guc: Skip GuC reset " sashiko-bot
2026-09-03 16:34   ` Teres Alexis, Alan Previn
2026-08-28 11:38 ` ✓ CI.KUnit: success for Xe Pci error handling fixes Patchwork
2026-08-28 12:21 ` ✓ Xe.CI.BAT: " Patchwork
2026-08-28 13:30 ` ✓ Xe.CI.FULL: " Patchwork

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