From: Riana Tauro <riana.tauro@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: riana.tauro@intel.com, anshuman.gupta@intel.com,
rodrigo.vivi@intel.com, raag.jadav@intel.com
Subject: [PATCH 3/3] drm/xe/xe_hw_error: Handle non-fatal errors routed via direct IRQ
Date: Sun, 30 Aug 2026 12:26:07 +0530 [thread overview]
Message-ID: <20260830065603.419055-8-riana.tauro@intel.com> (raw)
In-Reply-To: <20260830065603.419055-5-riana.tauro@intel.com>
Process, log and recover non-fatal errors routed via direct IRQ. For errors
that cannot be recovered locally, wedge the device with bus-reset as the
recovery action.
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
drivers/gpu/drm/xe/xe_hw_error.c | 37 ++++++++++++++++++++++++++++----
1 file changed, 33 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
index 5a57b7eaebc3..8435c74147ed 100644
--- a/drivers/gpu/drm/xe/xe_hw_error.c
+++ b/drivers/gpu/drm/xe/xe_hw_error.c
@@ -14,6 +14,7 @@
#include "xe_drm_ras.h"
#include "xe_hw_error.h"
#include "xe_mmio.h"
+#include "xe_ras.h"
#include "xe_survivability_mode.h"
#define GT_HW_ERROR_MAX_ERR_BITS 16
@@ -165,11 +166,38 @@ static_assert(ARRAY_SIZE(pvc_master_local_nonfatal_err_reg) == XE_RAS_REG_SIZE);
pvc_master_local_fatal_err_reg : \
pvc_master_local_nonfatal_err_reg)
+static const char *hw_err_to_str(const enum hardware_error hw_err)
+{
+ switch (hw_err) {
+ case HARDWARE_ERROR_CORRECTABLE:
+ return "Correctable";
+ case HARDWARE_ERROR_NONFATAL:
+ return "Non-Fatal";
+ case HARDWARE_ERROR_FATAL:
+ return "Fatal";
+ default:
+ return "Unknown";
+ }
+}
+
static void hw_error_work(struct work_struct *work)
{
struct xe_tile *tile = container_of(work, typeof(*tile), hw_error_work);
struct xe_device *xe = tile_to_xe(tile);
+ if (xe->info.has_sysctrl) {
+ int ret;
+
+ ret = xe_ras_process_errors(xe);
+ /* For any non-fatal errors that do not return recovered, declare wedged */
+ if (ret) {
+ xe_device_set_wedged_method(xe, DRM_WEDGE_RECOVERY_BUS_RESET);
+ xe_device_declare_wedged(xe);
+ }
+
+ return;
+ }
+
xe_survivability_mode_runtime_enable(xe);
}
@@ -431,12 +459,13 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er
return;
/*
- * Hardware errors are reported through System Controller on the platforms that
- * support it, and never routed as direct IRQ to SGUnit. So we should never be
- * here for those platforms.
+ * Non fatal errors are routed as a direct IRQ on platforms that support
+ * system controller.
*/
if (xe->info.has_sysctrl) {
- drm_err_ratelimited(&xe->drm, HW_ERR "Invalid error routing\n");
+ drm_err_ratelimited(&xe->drm, HW_ERR "%s %s reported\n", hw_err_to_str(hw_err),
+ severity_str);
+ schedule_work(&tile->hw_error_work);
return;
}
--
2.47.1
next prev parent reply other threads:[~2026-08-30 6:56 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-30 6:56 [PATCH 0/3] Handle non-fatal errors routed via IRQ Riana Tauro
2026-08-30 6:56 ` [PATCH 1/3] drm/xe/hw_error: Reuse CSC worker for generic error handling Riana Tauro
2026-08-30 6:56 ` [PATCH 2/3] drm/xe/hw_error: Initialize hw_error_work per tile Riana Tauro
2026-08-30 7:14 ` sashiko-bot
2026-08-30 6:56 ` Riana Tauro [this message]
2026-08-30 7:09 ` [PATCH 3/3] drm/xe/xe_hw_error: Handle non-fatal errors routed via direct IRQ sashiko-bot
2026-08-30 7:03 ` ✓ CI.KUnit: success for Handle non-fatal errors routed via IRQ Patchwork
2026-08-30 7:46 ` ✓ Xe.CI.BAT: " Patchwork
2026-08-30 8:58 ` ✓ Xe.CI.FULL: " Patchwork
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