[PATCH v4 0/3] Separate GGTT pools for submissions and VFs provisioning

[PATCH v4 0/3] Separate GGTT pools for submissions and VFs provisioning

[Piórkowski, Piotr]

From: Piotr Piórkowski <piotr.piorkowski@intel.com>

GGTT space is used both for driver-owned allocations and for provisioning
GGTT regions to VFs. These allocations currently share a single pool,
which does not allow their usable ranges or allocation policies to be
managed independently.

Introduce separate logical usable and shareable GGTT pools. The pools may
overlap, while each allocation remains constrained to its corresponding
range. When a shareable pool is present, usable allocations proceed from
the bottom and shareable allocations from the top.

v1 -> v2:
 - Rename ggtt->usable_size back to ggtt->size.
 - Remove the ggtt_insert_node_in_range() helper.
v2 -> v3:
 - Init ggtt.lock with mutex_init() in each test.
 - Introduce the hw_size struct field instead of the ggtt_accessible_size
   function.
v3 -> v4:
 - Set the shareable pool size only for SR-IOV PF,
 - Return -ENOSPC instead of asserting when a large BO no longer fits after
   end is clamped to ggtt->size.

Piotr Piórkowski (3):
  drm/xe/ggtt: Split GGTT into usable and shareable pools
  drm/xe/ggtt: Initialize GGTT pools by SR-IOV mode
  drm/xe/ggtt: Add KUnit tests for usable and shareable pools

 drivers/gpu/drm/xe/tests/xe_ggtt_test.c    | 336 +++++++++++++++++++++
 drivers/gpu/drm/xe/xe_ggtt.c               | 306 +++++++++++++++----
 drivers/gpu/drm/xe/xe_ggtt.h               |  14 +-
 drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c |  12 +-
 4 files changed, 606 insertions(+), 62 deletions(-)
 create mode 100644 drivers/gpu/drm/xe/tests/xe_ggtt_test.c

-- 
2.34.1

[PATCH v4 1/3] drm/xe/ggtt: Split GGTT into usable and shareable pools

[Piórkowski, Piotr]

From: Piotr Piórkowski <piotr.piorkowski@intel.com>

Driver-owned GGTT allocations and VF provisioning currently use a single
GGTT pool. Split it into a usable pool for driver-owned allocations and a
shareable pool for VF provisioning.

The pools are separate logical ranges and may overlap, but allocations are
limited to the configured size of their corresponding pool. Allocate from
the bottom of the usable pool and from the top of the shareable pool when a
shareable pool is present.

Add separate insertion APIs for the usable and shareable pools, together
with shareable hole-reporting helpers used by SR-IOV PF provisioning.

v2:
 - Rename ggtt->usable_size back to ggtt->size.
 - Remove the ggtt_insert_node_in_range() helper.
v3:
 - Introduce the hw_size struct field instead of the ggtt_accessible_size
   function.
v4:
 - Set the shareable pool size only for SR-IOV PF,
 - Return -ENOSPC instead of asserting when a large BO no longer fits after
   end is clamped to ggtt->size.

Assisted-by: Claude:claude-5-sonnet
Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/xe/xe_ggtt.c               | 184 +++++++++++++++++----
 drivers/gpu/drm/xe/xe_ggtt.h               |  14 +-
 drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c |  12 +-
 3 files changed, 176 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index 63e8bf193605..1f0bd876cb35 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -114,8 +114,10 @@ struct xe_ggtt {
 	struct xe_tile *tile;
 	/** @start: Start offset of GGTT */
 	u64 start;
-	/** @size: Total usable size of this GGTT */
+	/** @size: Size of the usable allocation range */
 	u64 size;
+	/** @hw_size: Size of the GGTT range assigned to device */
+	u64 hw_size;
 	/**
 	 * @flags: Flags for this GGTT.
 	 * Acceptable flags:
@@ -142,6 +144,15 @@ struct xe_ggtt {
 	unsigned int access_count;
 	/** @wq: Dedicated unordered work queue to process node removals */
 	struct workqueue_struct *wq;
+#ifdef CONFIG_PCI_IOV
+	/** @shareable: Shareable range within GGTT */
+	struct {
+		/** @start: Shareable range start relative to @mm start */
+		u64 start;
+		/** @size: Shareable range size */
+		u64 size;
+	} shareable;
+#endif
 };
 
 static u64 xelp_ggtt_pte_flags(struct xe_bo *bo, u16 pat_index)
@@ -239,7 +250,7 @@ u64 xe_ggtt_size(struct xe_ggtt *ggtt)
 static void xe_ggtt_set_pte(struct xe_ggtt *ggtt, u64 addr, u64 pte)
 {
 	xe_tile_assert(ggtt->tile, !(addr & XE_PTE_MASK));
-	xe_tile_assert(ggtt->tile, addr < ggtt->start + ggtt->size);
+	xe_tile_assert(ggtt->tile, addr < ggtt->start + ggtt->hw_size);
 
 	writeq(pte, &ggtt->gsm[addr >> XE_PTE_SHIFT]);
 }
@@ -253,7 +264,7 @@ static void xe_ggtt_set_pte_and_flush(struct xe_ggtt *ggtt, u64 addr, u64 pte)
 static u64 xe_ggtt_get_pte(struct xe_ggtt *ggtt, u64 addr)
 {
 	xe_tile_assert(ggtt->tile, !(addr & XE_PTE_MASK));
-	xe_tile_assert(ggtt->tile, addr < ggtt->start + ggtt->size);
+	xe_tile_assert(ggtt->tile, addr < ggtt->start + ggtt->hw_size);
 
 	return readq(&ggtt->gsm[addr >> XE_PTE_SHIFT]);
 }
@@ -355,16 +366,31 @@ static const struct xe_ggtt_pt_ops xelpg_pt_wa_ops = {
 	.ggtt_get_pte = xe_ggtt_get_pte,
 };
 
-static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u64 start, u64 size)
+static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u64 start, u64 usable_size,
+				 u64 shareable_size)
 {
+	struct xe_gt *gt = ggtt->tile->primary_gt;
+
+	xe_gt_assert(gt, usable_size);
+	xe_gt_assert(gt, usable_size <= ggtt->hw_size);
+	xe_gt_assert(gt, shareable_size <= ggtt->hw_size);
+
 	ggtt->start = start;
-	ggtt->size = size;
-	drm_mm_init(&ggtt->mm, 0, size);
+	ggtt->size = usable_size;
+
+#ifdef CONFIG_PCI_IOV
+	if (shareable_size) {
+		ggtt->shareable.start = ggtt->hw_size - shareable_size;
+		ggtt->shareable.size = shareable_size;
+	}
+#endif
+	drm_mm_init(&ggtt->mm, 0, ggtt->hw_size);
 }
 
 int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 start, u32 size)
 {
-	__xe_ggtt_init_early(ggtt, start, size);
+	ggtt->hw_size = size;
+	__xe_ggtt_init_early(ggtt, start, size, 0);
 	return 0;
 }
 EXPORT_SYMBOL_IF_KUNIT(xe_ggtt_init_kunit);
@@ -427,6 +453,8 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
 	if (ggtt_size + ggtt_start > GUC_GGTT_TOP)
 		ggtt_size = GUC_GGTT_TOP - ggtt_start;
 
+	ggtt->hw_size = ggtt_size;
+
 	if (GRAPHICS_VERx100(xe) >= 1270)
 		ggtt->pt_ops =
 			(ggtt->tile->media_gt && XE_GT_WA(ggtt->tile->media_gt, 22019338487)) ||
@@ -439,7 +467,8 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
 	if (!ggtt->wq)
 		return -ENOMEM;
 
-	__xe_ggtt_init_early(ggtt, ggtt_start, ggtt_size);
+	__xe_ggtt_init_early(ggtt, ggtt_start, ggtt_size,
+			     IS_SRIOV_PF(xe) ? ggtt_size : 0);
 
 	err = drmm_add_action_or_reset(&xe->drm, ggtt_fini_early, ggtt);
 	if (err)
@@ -652,16 +681,55 @@ void xe_ggtt_shift_nodes(struct xe_ggtt *ggtt, u64 new_start)
 
 	xe_tile_assert(ggtt->tile, new_start >= xe_wopcm_size(tile_to_xe(ggtt->tile)));
 	xe_tile_assert(ggtt->tile, new_start + ggtt->size <= GUC_GGTT_TOP);
+#ifdef CONFIG_PCI_IOV
+	xe_tile_assert(ggtt->tile, ggtt->shareable.size == 0);
+#endif
 
 	/* pairs with READ_ONCE in xe_ggtt_node_addr() */
 	WRITE_ONCE(ggtt->start, new_start);
 }
 
-static int xe_ggtt_insert_node_locked(struct xe_ggtt_node *node,
-				      u32 size, u32 align, u32 mm_flags)
+static int ggtt_insert_node_in_range_locked(struct xe_ggtt_node *node, u32 size,
+					    u32 align, u64 range_start,
+					    u64 range_size, u32 mm_flags)
 {
-	return drm_mm_insert_node_generic(&node->ggtt->mm, &node->base, size, align, 0,
-					  mm_flags);
+	struct xe_ggtt *ggtt = node->ggtt;
+	u64 range_end = range_start + range_size;
+
+	lockdep_assert_held(&ggtt->lock);
+
+	if (!range_size || range_end <= range_start)
+		return -EINVAL;
+
+	if (range_end > ggtt->hw_size)
+		return -ERANGE;
+
+	if (size > range_size)
+		return -ENOSPC;
+
+	return drm_mm_insert_node_in_range(&ggtt->mm, &node->base, size, align, 0,
+					  range_start, range_end, mm_flags);
+}
+
+/*
+ * When the shareable range is present, allocations start from the bottom
+ * to leave space at the top; otherwise they start from the top.
+ */
+static u32 ggtt_usable_insert_flags(struct xe_ggtt *ggtt)
+{
+#ifdef CONFIG_PCI_IOV
+	if (ggtt->shareable.size > 0)
+		return DRM_MM_INSERT_LOW;
+#endif
+	return DRM_MM_INSERT_HIGH;
+}
+
+static int xe_ggtt_insert_node_locked(struct xe_ggtt_node *node, u32 size, u32 align)
+{
+	struct xe_ggtt *ggtt = node->ggtt;
+
+	return ggtt_insert_node_in_range_locked(node, size, align, 0,
+						ggtt->size, ggtt_usable_insert_flags(ggtt));
 }
 
 static struct xe_ggtt_node *ggtt_node_init(struct xe_ggtt *ggtt)
@@ -683,7 +751,7 @@ static struct xe_ggtt_node *ggtt_node_init(struct xe_ggtt *ggtt)
  * @size: size of the node
  * @align: alignment constrain of the node
  *
- * Return: &xe_ggtt_node on success or a ERR_PTR on failure.
+ * Return: &xe_ggtt_node on success or an error on failure.
  */
 struct xe_ggtt_node *xe_ggtt_insert_node(struct xe_ggtt *ggtt, u32 size, u32 align)
 {
@@ -695,8 +763,46 @@ struct xe_ggtt_node *xe_ggtt_insert_node(struct xe_ggtt *ggtt, u32 size, u32 ali
 		return node;
 
 	guard(mutex)(&ggtt->lock);
-	ret = xe_ggtt_insert_node_locked(node, size, align,
-					 DRM_MM_INSERT_HIGH);
+
+	ret = xe_ggtt_insert_node_locked(node, size, align);
+	if (ret) {
+		ggtt_node_fini(node);
+		return ERR_PTR(ret);
+	}
+
+	return node;
+}
+
+#ifdef CONFIG_PCI_IOV
+/**
+ * xe_ggtt_insert_node_shareable - Insert a &xe_ggtt_node into shareable range
+ * @ggtt: the &xe_ggtt into which the node should be inserted.
+ * @size: size of the node
+ * @align: alignment constrain of the node
+ *
+ * Inserts a node into the shareable GGTT range.
+ * Allocations always start from the top (DRM_MM_INSERT_HIGH).
+ *
+ * Return: &xe_ggtt_node on success or an error on failure.
+ */
+struct xe_ggtt_node *xe_ggtt_insert_node_shareable(struct xe_ggtt *ggtt, u32 size, u32 align)
+{
+	struct xe_ggtt_node *node;
+	int ret;
+
+	if (!ggtt->shareable.size)
+		return ERR_PTR(-ENOSPC);
+
+	node = ggtt_node_init(ggtt);
+	if (IS_ERR(node))
+		return node;
+
+	guard(mutex)(&ggtt->lock);
+
+	ret = ggtt_insert_node_in_range_locked(node, size, align,
+					       ggtt->shareable.start,
+					       ggtt->shareable.size,
+					       DRM_MM_INSERT_HIGH);
 	if (ret) {
 		ggtt_node_fini(node);
 		return ERR_PTR(ret);
@@ -704,6 +810,7 @@ struct xe_ggtt_node *xe_ggtt_insert_node(struct xe_ggtt *ggtt, u32 size, u32 ali
 
 	return node;
 }
+#endif
 
 /**
  * xe_ggtt_node_pt_size() - Get the size of page table entries needed to map a GGTT node.
@@ -787,6 +894,7 @@ void xe_ggtt_map_bo_unlocked(struct xe_ggtt *ggtt, struct xe_bo *bo)
  *
  * This function allows inserting a GGTT node with a custom transformation function.
  * This is useful for display to allow inserting rotated framebuffers to GGTT.
+ * Allocates from the usable range only.
  *
  * Return: A pointer to %xe_ggtt_node struct on success. An ERR_PTR otherwise.
  */
@@ -807,7 +915,7 @@ struct xe_ggtt_node *xe_ggtt_insert_node_transform(struct xe_ggtt *ggtt,
 		goto err;
 	}
 
-	ret = xe_ggtt_insert_node_locked(node, size, align, 0);
+	ret = xe_ggtt_insert_node_locked(node, size, align);
 	if (ret)
 		goto err_unlock;
 
@@ -874,10 +982,19 @@ static int __xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
 	else
 		end = 0;
 
-	xe_tile_assert(ggtt->tile, end >= start + xe_bo_size(bo));
+	end = min(end, ggtt->size);
+
+	if (end < start + xe_bo_size(bo)) {
+		ggtt_node_fini(bo->ggtt_node[tile_id]);
+		bo->ggtt_node[tile_id] = NULL;
+		mutex_unlock(&ggtt->lock);
+		err = -ENOSPC;
+		goto out;
+	}
 
 	err = drm_mm_insert_node_in_range(&ggtt->mm, &bo->ggtt_node[tile_id]->base,
-					  xe_bo_size(bo), alignment, 0, start, end, 0);
+					  xe_bo_size(bo), alignment, 0, start, end,
+					  ggtt_usable_insert_flags(ggtt));
 	if (err) {
 		ggtt_node_fini(bo->ggtt_node[tile_id]);
 		bo->ggtt_node[tile_id] = NULL;
@@ -948,24 +1065,30 @@ void xe_ggtt_remove_bo(struct xe_ggtt *ggtt, struct xe_bo *bo)
 			    bo->flags & XE_BO_FLAG_GGTT_INVALIDATE);
 }
 
+#ifdef CONFIG_PCI_IOV
 /**
- * xe_ggtt_largest_hole - Largest GGTT hole
+ * xe_ggtt_largest_shareable_hole - Largest hole within the shareable range
  * @ggtt: the &xe_ggtt that will be inspected
  * @alignment: minimum alignment
  * @spare: If not NULL: in: desired memory size to be spared / out: Adjusted possible spare
  *
- * Return: size of the largest continuous GGTT region
+ * Only holes within the shareable range are considered.
+ *
+ * Return: size of the largest continuous shareable GGTT region
  */
-u64 xe_ggtt_largest_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare)
+u64 xe_ggtt_largest_shareable_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare)
 {
 	const struct drm_mm *mm = &ggtt->mm;
 	const struct drm_mm_node *entry;
 	u64 hole_start, hole_end, hole_size;
+	u64 shareable_start = ggtt->shareable.start;
+	u64 shareable_end = ggtt->shareable.start + ggtt->shareable.size;
 	u64 max_hole = 0;
 
 	mutex_lock(&ggtt->lock);
 	drm_mm_for_each_hole(entry, mm, hole_start, hole_end) {
-		hole_start = max(hole_start, ggtt->start);
+		hole_start = max(hole_start, shareable_start);
+		hole_end = min(hole_end, shareable_end);
 		hole_start = ALIGN(hole_start, alignment);
 		hole_end = ALIGN_DOWN(hole_end, alignment);
 		if (hole_start >= hole_end)
@@ -981,7 +1104,6 @@ u64 xe_ggtt_largest_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare)
 	return max_hole;
 }
 
-#ifdef CONFIG_PCI_IOV
 static u64 xe_encode_vfid_pte(u16 vfid)
 {
 	return FIELD_PREP(GGTT_PTE_VFID, vfid) | XE_PAGE_PRESENT;
@@ -1120,27 +1242,32 @@ int xe_ggtt_dump(struct xe_ggtt *ggtt, struct drm_printer *p)
 	return err;
 }
 
+#ifdef CONFIG_PCI_IOV
 /**
- * xe_ggtt_print_holes - Print holes
+ * xe_ggtt_print_shareable_holes - Print holes within the shareable range
  * @ggtt: the &xe_ggtt to be inspected
  * @alignment: min alignment
  * @p: the &drm_printer
  *
- * Print GGTT ranges that are available and return total size available.
+ * Print GGTT ranges that are available within the shareable range and return
+ * total size available.
  *
- * Return: Total available size.
+ * Return: Total available shareable size.
  */
-u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer *p)
+u64 xe_ggtt_print_shareable_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer *p)
 {
 	const struct drm_mm *mm = &ggtt->mm;
 	const struct drm_mm_node *entry;
 	u64 hole_start, hole_end, hole_size;
+	u64 shareable_start = ggtt->shareable.start;
+	u64 shareable_end = ggtt->shareable.start + ggtt->shareable.size;
 	u64 total = 0;
 	char buf[10];
 
 	mutex_lock(&ggtt->lock);
 	drm_mm_for_each_hole(entry, mm, hole_start, hole_end) {
-		hole_start = max(hole_start, ggtt->start);
+		hole_start = max(hole_start, shareable_start);
+		hole_end = min(hole_end, shareable_end);
 		hole_start = ALIGN(hole_start, alignment);
 		hole_end = ALIGN_DOWN(hole_end, alignment);
 		if (hole_start >= hole_end)
@@ -1157,6 +1284,7 @@ u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer
 
 	return total;
 }
+#endif
 
 /**
  * xe_ggtt_encode_pte_flags - Get PTE encoding flags for BO
diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
index c864cc975a69..c441e39fdd47 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.h
+++ b/drivers/gpu/drm/xe/xe_ggtt.h
@@ -24,6 +24,16 @@ u64 xe_ggtt_size(struct xe_ggtt *ggtt);
 
 struct xe_ggtt_node *
 xe_ggtt_insert_node(struct xe_ggtt *ggtt, u32 size, u32 align);
+#ifdef CONFIG_PCI_IOV
+struct xe_ggtt_node *
+xe_ggtt_insert_node_shareable(struct xe_ggtt *ggtt, u32 size, u32 align);
+#else
+static inline struct xe_ggtt_node *
+xe_ggtt_insert_node_shareable(struct xe_ggtt *ggtt, u32 size, u32 align)
+{
+	return ERR_PTR(-ENODEV);
+}
+#endif
 struct xe_ggtt_node *
 xe_ggtt_insert_node_transform(struct xe_ggtt *ggtt,
 			      struct xe_bo *bo, u64 pte,
@@ -36,12 +46,12 @@ int xe_ggtt_insert_bo(struct xe_ggtt *ggtt, struct xe_bo *bo, struct drm_exec *e
 int xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
 			 u64 start, u64 end, struct drm_exec *exec);
 void xe_ggtt_remove_bo(struct xe_ggtt *ggtt, struct xe_bo *bo);
-u64 xe_ggtt_largest_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare);
 
 int xe_ggtt_dump(struct xe_ggtt *ggtt, struct drm_printer *p);
-u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer *p);
 
 #ifdef CONFIG_PCI_IOV
+u64 xe_ggtt_largest_shareable_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare);
+u64 xe_ggtt_print_shareable_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer *p);
 void xe_ggtt_assign(const struct xe_ggtt_node *node, u16 vfid);
 int xe_ggtt_node_save(struct xe_ggtt_node *node, void *dst, size_t size, u16 vfid);
 int xe_ggtt_node_load(struct xe_ggtt_node *node, const void *src, size_t size, u16 vfid);
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
index be0a413ee17c..a5f4a3d27c3e 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
@@ -531,9 +531,13 @@ static int pf_provision_vf_ggtt(struct xe_gt *gt, unsigned int vfid, u64 size)
 	if (!size)
 		return 0;
 
-	node = xe_ggtt_insert_node(ggtt, size, alignment);
-	if (IS_ERR(node))
+	node = xe_ggtt_insert_node_shareable(ggtt, size, alignment);
+	if (IS_ERR(node)) {
+		xe_gt_sriov_dbg_verbose(gt,
+					"VF%u GGTT provisioning failed: no shareable range\n",
+					vfid);
 		return PTR_ERR(node);
+	}
 
 	xe_ggtt_assign(node, vfid);
 	xe_gt_sriov_dbg_verbose(gt, "VF%u assigned GGTT %llx-%llx\n",
@@ -729,7 +733,7 @@ static u64 pf_get_max_ggtt(struct xe_gt *gt)
 	u64 spare = pf_get_spare_ggtt(gt);
 	u64 max_hole;
 
-	max_hole = xe_ggtt_largest_hole(ggtt, alignment, &spare);
+	max_hole = xe_ggtt_largest_shareable_hole(ggtt, alignment, &spare);
 
 	xe_gt_sriov_dbg_verbose(gt, "HOLE max %lluK reserved %lluK\n",
 				max_hole / SZ_1K, spare / SZ_1K);
@@ -3549,7 +3553,7 @@ int xe_gt_sriov_pf_config_print_available_ggtt(struct xe_gt *gt, struct drm_prin
 	mutex_lock(xe_gt_sriov_pf_master_mutex(gt));
 
 	spare = pf_get_spare_ggtt(gt);
-	total = xe_ggtt_print_holes(ggtt, alignment, p);
+	total = xe_ggtt_print_shareable_holes(ggtt, alignment, p);
 
 	mutex_unlock(xe_gt_sriov_pf_master_mutex(gt));
 
-- 
2.34.1

Re: [PATCH v4 1/3] drm/xe/ggtt: Split GGTT into usable and shareable pools

[Michal Wajdeczko]

On 9/1/2026 6:44 PM, Piórkowski, Piotr wrote:
> From: Piotr Piórkowski <piotr.piorkowski@intel.com>
> 
> Driver-owned GGTT allocations and VF provisioning currently use a single
> GGTT pool. Split it into a usable pool for driver-owned allocations and a
> shareable pool for VF provisioning.
> 
> The pools are separate logical ranges and may overlap, but allocations are
> limited to the configured size of their corresponding pool. Allocate from
> the bottom of the usable pool and from the top of the shareable pool when a
> shareable pool is present.
> 
> Add separate insertion APIs for the usable and shareable pools, together
> with shareable hole-reporting helpers used by SR-IOV PF provisioning.
> 
> v2:
>  - Rename ggtt->usable_size back to ggtt->size.
>  - Remove the ggtt_insert_node_in_range() helper.
> v3:
>  - Introduce the hw_size struct field instead of the ggtt_accessible_size
>    function.
> v4:
>  - Set the shareable pool size only for SR-IOV PF,
>  - Return -ENOSPC instead of asserting when a large BO no longer fits after
>    end is clamped to ggtt->size.

nit: you may want to move change log under ---

> 
> Assisted-by: Claude:claude-5-sonnet
> Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Maarten Lankhorst <dev@lankhorst.se>
> ---
>  drivers/gpu/drm/xe/xe_ggtt.c               | 184 +++++++++++++++++----
>  drivers/gpu/drm/xe/xe_ggtt.h               |  14 +-
>  drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c |  12 +-
>  3 files changed, 176 insertions(+), 34 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> index 63e8bf193605..1f0bd876cb35 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.c
> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> @@ -114,8 +114,10 @@ struct xe_ggtt {
>  	struct xe_tile *tile;
>  	/** @start: Start offset of GGTT */
>  	u64 start;
> -	/** @size: Total usable size of this GGTT */
> +	/** @size: Size of the usable allocation range */
>  	u64 size;
> +	/** @hw_size: Size of the GGTT range assigned to device */
> +	u64 hw_size;

hmm, "hw_size" suggests it is a HW size and currently it's fixed 4G anyway
maybe to avoid confusion:

	/** @start: Start offset of the assigned GGTT range. */
	/** @full_size: Full size of the assigned GGTT range. */
then
	/** @size: Size of the GGTT range for the regular use. */
	/** @shareable.size: Size of the GGTT range reserved for sharing with VFs. */

btw, maybe introduction of "full_size" can be done as a separate step
to decrease size of the current patch ?

>  	/**
>  	 * @flags: Flags for this GGTT.
>  	 * Acceptable flags:
> @@ -142,6 +144,15 @@ struct xe_ggtt {
>  	unsigned int access_count;
>  	/** @wq: Dedicated unordered work queue to process node removals */
>  	struct workqueue_struct *wq;
> +#ifdef CONFIG_PCI_IOV
> +	/** @shareable: Shareable range within GGTT */
> +	struct {
> +		/** @start: Shareable range start relative to @mm start */
> +		u64 start;

do we need to cache it? likely:

	shareable.start = start + full_size - shareable.size;

> +		/** @size: Shareable range size */
> +		u64 size;
> +	} shareable;
> +#endif
>  };
>  
>  static u64 xelp_ggtt_pte_flags(struct xe_bo *bo, u16 pat_index)
> @@ -239,7 +250,7 @@ u64 xe_ggtt_size(struct xe_ggtt *ggtt)
>  static void xe_ggtt_set_pte(struct xe_ggtt *ggtt, u64 addr, u64 pte)
>  {
>  	xe_tile_assert(ggtt->tile, !(addr & XE_PTE_MASK));
> -	xe_tile_assert(ggtt->tile, addr < ggtt->start + ggtt->size);
> +	xe_tile_assert(ggtt->tile, addr < ggtt->start + ggtt->hw_size);
>  
>  	writeq(pte, &ggtt->gsm[addr >> XE_PTE_SHIFT]);
>  }
> @@ -253,7 +264,7 @@ static void xe_ggtt_set_pte_and_flush(struct xe_ggtt *ggtt, u64 addr, u64 pte)
>  static u64 xe_ggtt_get_pte(struct xe_ggtt *ggtt, u64 addr)
>  {
>  	xe_tile_assert(ggtt->tile, !(addr & XE_PTE_MASK));
> -	xe_tile_assert(ggtt->tile, addr < ggtt->start + ggtt->size);
> +	xe_tile_assert(ggtt->tile, addr < ggtt->start + ggtt->hw_size);
>  
>  	return readq(&ggtt->gsm[addr >> XE_PTE_SHIFT]);
>  }
> @@ -355,16 +366,31 @@ static const struct xe_ggtt_pt_ops xelpg_pt_wa_ops = {
>  	.ggtt_get_pte = xe_ggtt_get_pte,
>  };
>  
> -static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u64 start, u64 size)
> +static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u64 start, u64 usable_size,
> +				 u64 shareable_size)
>  {
> +	struct xe_gt *gt = ggtt->tile->primary_gt;
> +
> +	xe_gt_assert(gt, usable_size);
> +	xe_gt_assert(gt, usable_size <= ggtt->hw_size);
> +	xe_gt_assert(gt, shareable_size <= ggtt->hw_size);
> +
>  	ggtt->start = start;
> -	ggtt->size = size;
> -	drm_mm_init(&ggtt->mm, 0, size);
> +	ggtt->size = usable_size;
> +
> +#ifdef CONFIG_PCI_IOV
> +	if (shareable_size) {
> +		ggtt->shareable.start = ggtt->hw_size - shareable_size;
> +		ggtt->shareable.size = shareable_size;
> +	}
> +#endif
> +	drm_mm_init(&ggtt->mm, 0, ggtt->hw_size);
>  }
>  
>  int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 start, u32 size)
>  {
> -	__xe_ggtt_init_early(ggtt, start, size);
> +	ggtt->hw_size = size;

can we move "full_size" initialization to __early() ?

> +	__xe_ggtt_init_early(ggtt, start, size, 0);

kunit can also be a PF
do we care if it will have no shareable range at all?

>  	return 0;
>  }
>  EXPORT_SYMBOL_IF_KUNIT(xe_ggtt_init_kunit);
> @@ -427,6 +453,8 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
>  	if (ggtt_size + ggtt_start > GUC_GGTT_TOP)
>  		ggtt_size = GUC_GGTT_TOP - ggtt_start;
>  
> +	ggtt->hw_size = ggtt_size;

move to __early()

> +
>  	if (GRAPHICS_VERx100(xe) >= 1270)
>  		ggtt->pt_ops =
>  			(ggtt->tile->media_gt && XE_GT_WA(ggtt->tile->media_gt, 22019338487)) ||
> @@ -439,7 +467,8 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
>  	if (!ggtt->wq)
>  		return -ENOMEM;
>  
> -	__xe_ggtt_init_early(ggtt, ggtt_start, ggtt_size);
> +	__xe_ggtt_init_early(ggtt, ggtt_start, ggtt_size,
> +			     IS_SRIOV_PF(xe) ? ggtt_size : 0);
>  
>  	err = drmm_add_action_or_reset(&xe->drm, ggtt_fini_early, ggtt);
>  	if (err)
> @@ -652,16 +681,55 @@ void xe_ggtt_shift_nodes(struct xe_ggtt *ggtt, u64 new_start)
>  
>  	xe_tile_assert(ggtt->tile, new_start >= xe_wopcm_size(tile_to_xe(ggtt->tile)));

btw, maybe we should introduce:

	/** @bottom: Start offset of the GGTT derived frm WOPCM size. */
or	/** @hw_start: ... */
or	/** @real_start: ... */

or helper:

	u64 xe_ggtt_bottom(ggtt)
	{
		return xe_wopcm_size(ggtt->tile->xe);
	}

to avoid referring to WOPCM beyond the ggtt_init()

>  	xe_tile_assert(ggtt->tile, new_start + ggtt->size <= GUC_GGTT_TOP);
> +#ifdef CONFIG_PCI_IOV
> +	xe_tile_assert(ggtt->tile, ggtt->shareable.size == 0);
> +#endif
>  
>  	/* pairs with READ_ONCE in xe_ggtt_node_addr() */
>  	WRITE_ONCE(ggtt->start, new_start);
>  }
>  
> -static int xe_ggtt_insert_node_locked(struct xe_ggtt_node *node,
> -				      u32 size, u32 align, u32 mm_flags)
> +static int ggtt_insert_node_in_range_locked(struct xe_ggtt_node *node, u32 size,
> +					    u32 align, u64 range_start,
> +					    u64 range_size, u32 mm_flags)
>  {
> -	return drm_mm_insert_node_generic(&node->ggtt->mm, &node->base, size, align, 0,
> -					  mm_flags);
> +	struct xe_ggtt *ggtt = node->ggtt;
> +	u64 range_end = range_start + range_size;
> +
> +	lockdep_assert_held(&ggtt->lock);
> +
> +	if (!range_size || range_end <= range_start)
> +		return -EINVAL;
> +
> +	if (range_end > ggtt->hw_size)
> +		return -ERANGE;
> +
> +	if (size > range_size)
> +		return -ENOSPC;
> +
> +	return drm_mm_insert_node_in_range(&ggtt->mm, &node->base, size, align, 0,
> +					  range_start, range_end, mm_flags);
> +}
> +
> +/*
> + * When the shareable range is present, allocations start from the bottom
> + * to leave space at the top; otherwise they start from the top.
> + */
> +static u32 ggtt_usable_insert_flags(struct xe_ggtt *ggtt)
> +{
> +#ifdef CONFIG_PCI_IOV
> +	if (ggtt->shareable.size > 0)
> +		return DRM_MM_INSERT_LOW;
> +#endif
> +	return DRM_MM_INSERT_HIGH;
> +}
> +
> +static int xe_ggtt_insert_node_locked(struct xe_ggtt_node *node, u32 size, u32 align)
> +{
> +	struct xe_ggtt *ggtt = node->ggtt;
> +
> +	return ggtt_insert_node_in_range_locked(node, size, align, 0,
> +						ggtt->size, ggtt_usable_insert_flags(ggtt));
>  }
>  
>  static struct xe_ggtt_node *ggtt_node_init(struct xe_ggtt *ggtt)
> @@ -683,7 +751,7 @@ static struct xe_ggtt_node *ggtt_node_init(struct xe_ggtt *ggtt)
>   * @size: size of the node
>   * @align: alignment constrain of the node
>   *
> - * Return: &xe_ggtt_node on success or a ERR_PTR on failure.
> + * Return: &xe_ggtt_node on success or an error on failure.

we still return an ERR_PTR here, not an int

>   */
>  struct xe_ggtt_node *xe_ggtt_insert_node(struct xe_ggtt *ggtt, u32 size, u32 align)
>  {
> @@ -695,8 +763,46 @@ struct xe_ggtt_node *xe_ggtt_insert_node(struct xe_ggtt *ggtt, u32 size, u32 ali
>  		return node;
>  
>  	guard(mutex)(&ggtt->lock);
> -	ret = xe_ggtt_insert_node_locked(node, size, align,
> -					 DRM_MM_INSERT_HIGH);
> +
> +	ret = xe_ggtt_insert_node_locked(node, size, align);
> +	if (ret) {
> +		ggtt_node_fini(node);
> +		return ERR_PTR(ret);
> +	}
> +
> +	return node;
> +}
> +
> +#ifdef CONFIG_PCI_IOV
> +/**
> + * xe_ggtt_insert_node_shareable - Insert a &xe_ggtt_node into shareable range

nit: add () to the function name

nit: "Insert a new node in shareable GGTT range." ?

> + * @ggtt: the &xe_ggtt into which the node should be inserted.
> + * @size: size of the node
> + * @align: alignment constrain of the node
> + *
> + * Inserts a node into the shareable GGTT range.
> + * Allocations always start from the top (DRM_MM_INSERT_HIGH).
> + *
> + * Return: &xe_ggtt_node on success or an error on failure.

return ... an ERR_PTR on failure

> + */
> +struct xe_ggtt_node *xe_ggtt_insert_node_shareable(struct xe_ggtt *ggtt, u32 size, u32 align)
> +{
> +	struct xe_ggtt_node *node;
> +	int ret;
> +
> +	if (!ggtt->shareable.size)
> +		return ERR_PTR(-ENOSPC);
> +
> +	node = ggtt_node_init(ggtt);
> +	if (IS_ERR(node))
> +		return node;
> +
> +	guard(mutex)(&ggtt->lock);
> +
> +	ret = ggtt_insert_node_in_range_locked(node, size, align,
> +					       ggtt->shareable.start,
> +					       ggtt->shareable.size,
> +					       DRM_MM_INSERT_HIGH);
>  	if (ret) {
>  		ggtt_node_fini(node);
>  		return ERR_PTR(ret);
> @@ -704,6 +810,7 @@ struct xe_ggtt_node *xe_ggtt_insert_node(struct xe_ggtt *ggtt, u32 size, u32 ali
>  
>  	return node;
>  }
> +#endif
>  
>  /**
>   * xe_ggtt_node_pt_size() - Get the size of page table entries needed to map a GGTT node.
> @@ -787,6 +894,7 @@ void xe_ggtt_map_bo_unlocked(struct xe_ggtt *ggtt, struct xe_bo *bo)
>   *
>   * This function allows inserting a GGTT node with a custom transformation function.
>   * This is useful for display to allow inserting rotated framebuffers to GGTT.
> + * Allocates from the usable range only.
>   *
>   * Return: A pointer to %xe_ggtt_node struct on success. An ERR_PTR otherwise.
>   */
> @@ -807,7 +915,7 @@ struct xe_ggtt_node *xe_ggtt_insert_node_transform(struct xe_ggtt *ggtt,
>  		goto err;
>  	}
>  
> -	ret = xe_ggtt_insert_node_locked(node, size, align, 0);
> +	ret = xe_ggtt_insert_node_locked(node, size, align);
>  	if (ret)
>  		goto err_unlock;
>  
> @@ -874,10 +982,19 @@ static int __xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
>  	else
>  		end = 0;
>  
> -	xe_tile_assert(ggtt->tile, end >= start + xe_bo_size(bo));
> +	end = min(end, ggtt->size);
> +
> +	if (end < start + xe_bo_size(bo)) {
> +		ggtt_node_fini(bo->ggtt_node[tile_id]);
> +		bo->ggtt_node[tile_id] = NULL;
> +		mutex_unlock(&ggtt->lock);
> +		err = -ENOSPC;
> +		goto out;
> +	}

maybe as a preparation step, convert this function to use:

	guard(xe_pm_runtime_noresume)(xe);
and
	guard(mutex)(&ggtt->lock);

to minimize risk of mistakes?

>  
>  	err = drm_mm_insert_node_in_range(&ggtt->mm, &bo->ggtt_node[tile_id]->base,
> -					  xe_bo_size(bo), alignment, 0, start, end, 0);
> +					  xe_bo_size(bo), alignment, 0, start, end,
> +					  ggtt_usable_insert_flags(ggtt));
>  	if (err) {
>  		ggtt_node_fini(bo->ggtt_node[tile_id]);
>  		bo->ggtt_node[tile_id] = NULL;
> @@ -948,24 +1065,30 @@ void xe_ggtt_remove_bo(struct xe_ggtt *ggtt, struct xe_bo *bo)
>  			    bo->flags & XE_BO_FLAG_GGTT_INVALIDATE);
>  }
>  
> +#ifdef CONFIG_PCI_IOV
>  /**
> - * xe_ggtt_largest_hole - Largest GGTT hole
> + * xe_ggtt_largest_shareable_hole - Largest hole within the shareable range

as there is no 'usable' variant of this function, maybe it is
not worth to rename it?

nit: remember to add () to function name

nit: maybe move closer to print_holes() to keep them under single #ifdef

>   * @ggtt: the &xe_ggtt that will be inspected
>   * @alignment: minimum alignment
>   * @spare: If not NULL: in: desired memory size to be spared / out: Adjusted possible spare
>   *
> - * Return: size of the largest continuous GGTT region
> + * Only holes within the shareable range are considered.
> + *
> + * Return: size of the largest continuous shareable GGTT region
>   */
> -u64 xe_ggtt_largest_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare)
> +u64 xe_ggtt_largest_shareable_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare)
>  {
>  	const struct drm_mm *mm = &ggtt->mm;
>  	const struct drm_mm_node *entry;
>  	u64 hole_start, hole_end, hole_size;
> +	u64 shareable_start = ggtt->shareable.start;
> +	u64 shareable_end = ggtt->shareable.start + ggtt->shareable.size;
>  	u64 max_hole = 0;
>  
>  	mutex_lock(&ggtt->lock);
>  	drm_mm_for_each_hole(entry, mm, hole_start, hole_end) {
> -		hole_start = max(hole_start, ggtt->start);
> +		hole_start = max(hole_start, shareable_start);
> +		hole_end = min(hole_end, shareable_end);
>  		hole_start = ALIGN(hole_start, alignment);
>  		hole_end = ALIGN_DOWN(hole_end, alignment);
>  		if (hole_start >= hole_end)
> @@ -981,7 +1104,6 @@ u64 xe_ggtt_largest_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare)
>  	return max_hole;
>  }
>  
> -#ifdef CONFIG_PCI_IOV
>  static u64 xe_encode_vfid_pte(u16 vfid)
>  {
>  	return FIELD_PREP(GGTT_PTE_VFID, vfid) | XE_PAGE_PRESENT;
> @@ -1120,27 +1242,32 @@ int xe_ggtt_dump(struct xe_ggtt *ggtt, struct drm_printer *p)
>  	return err;
>  }
>  
> +#ifdef CONFIG_PCI_IOV
>  /**
> - * xe_ggtt_print_holes - Print holes
> + * xe_ggtt_print_shareable_holes - Print holes within the shareable range
>   * @ggtt: the &xe_ggtt to be inspected
>   * @alignment: min alignment
>   * @p: the &drm_printer
>   *
> - * Print GGTT ranges that are available and return total size available.
> + * Print GGTT ranges that are available within the shareable range and return
> + * total size available.
>   *
> - * Return: Total available size.
> + * Return: Total available shareable size.
>   */
> -u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer *p)
> +u64 xe_ggtt_print_shareable_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer *p)
>  {
>  	const struct drm_mm *mm = &ggtt->mm;
>  	const struct drm_mm_node *entry;
>  	u64 hole_start, hole_end, hole_size;
> +	u64 shareable_start = ggtt->shareable.start;
> +	u64 shareable_end = ggtt->shareable.start + ggtt->shareable.size;
>  	u64 total = 0;
>  	char buf[10];
>  
>  	mutex_lock(&ggtt->lock);
>  	drm_mm_for_each_hole(entry, mm, hole_start, hole_end) {
> -		hole_start = max(hole_start, ggtt->start);
> +		hole_start = max(hole_start, shareable_start);
> +		hole_end = min(hole_end, shareable_end);
>  		hole_start = ALIGN(hole_start, alignment);
>  		hole_end = ALIGN_DOWN(hole_end, alignment);
>  		if (hole_start >= hole_end)
> @@ -1157,6 +1284,7 @@ u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer
>  
>  	return total;
>  }
> +#endif
>  
>  /**
>   * xe_ggtt_encode_pte_flags - Get PTE encoding flags for BO
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
> index c864cc975a69..c441e39fdd47 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.h
> +++ b/drivers/gpu/drm/xe/xe_ggtt.h
> @@ -24,6 +24,16 @@ u64 xe_ggtt_size(struct xe_ggtt *ggtt);
>  
>  struct xe_ggtt_node *
>  xe_ggtt_insert_node(struct xe_ggtt *ggtt, u32 size, u32 align);
> +#ifdef CONFIG_PCI_IOV
> +struct xe_ggtt_node *
> +xe_ggtt_insert_node_shareable(struct xe_ggtt *ggtt, u32 size, u32 align);
> +#else
> +static inline struct xe_ggtt_node *
> +xe_ggtt_insert_node_shareable(struct xe_ggtt *ggtt, u32 size, u32 align)
> +{
> +	return ERR_PTR(-ENODEV);
> +}

are you sure we need a stub?
the PF code that uses this should be under PCI_IOV already

> +#endif
>  struct xe_ggtt_node *
>  xe_ggtt_insert_node_transform(struct xe_ggtt *ggtt,
>  			      struct xe_bo *bo, u64 pte,
> @@ -36,12 +46,12 @@ int xe_ggtt_insert_bo(struct xe_ggtt *ggtt, struct xe_bo *bo, struct drm_exec *e
>  int xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
>  			 u64 start, u64 end, struct drm_exec *exec);
>  void xe_ggtt_remove_bo(struct xe_ggtt *ggtt, struct xe_bo *bo);
> -u64 xe_ggtt_largest_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare);
>  
>  int xe_ggtt_dump(struct xe_ggtt *ggtt, struct drm_printer *p);
> -u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer *p);
>  
>  #ifdef CONFIG_PCI_IOV
> +u64 xe_ggtt_largest_shareable_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare);
> +u64 xe_ggtt_print_shareable_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer *p);
>  void xe_ggtt_assign(const struct xe_ggtt_node *node, u16 vfid);
>  int xe_ggtt_node_save(struct xe_ggtt_node *node, void *dst, size_t size, u16 vfid);
>  int xe_ggtt_node_load(struct xe_ggtt_node *node, const void *src, size_t size, u16 vfid);
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> index be0a413ee17c..a5f4a3d27c3e 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> @@ -531,9 +531,13 @@ static int pf_provision_vf_ggtt(struct xe_gt *gt, unsigned int vfid, u64 size)
>  	if (!size)
>  		return 0;
>  
> -	node = xe_ggtt_insert_node(ggtt, size, alignment);
> -	if (IS_ERR(node))
> +	node = xe_ggtt_insert_node_shareable(ggtt, size, alignment);
> +	if (IS_ERR(node)) {
> +		xe_gt_sriov_dbg_verbose(gt,
> +					"VF%u GGTT provisioning failed: no shareable range\n",
> +					vfid);

do we need this new dbg?
ERR_PTR might be different than -ENOSPC so above message could be misleading

and we already print %pe in case of GGTT provisioning failure, no?

>  		return PTR_ERR(node);
> +	}
>  
>  	xe_ggtt_assign(node, vfid);
>  	xe_gt_sriov_dbg_verbose(gt, "VF%u assigned GGTT %llx-%llx\n",
> @@ -729,7 +733,7 @@ static u64 pf_get_max_ggtt(struct xe_gt *gt)
>  	u64 spare = pf_get_spare_ggtt(gt);
>  	u64 max_hole;
>  
> -	max_hole = xe_ggtt_largest_hole(ggtt, alignment, &spare);
> +	max_hole = xe_ggtt_largest_shareable_hole(ggtt, alignment, &spare);
>  
>  	xe_gt_sriov_dbg_verbose(gt, "HOLE max %lluK reserved %lluK\n",
>  				max_hole / SZ_1K, spare / SZ_1K);
> @@ -3549,7 +3553,7 @@ int xe_gt_sriov_pf_config_print_available_ggtt(struct xe_gt *gt, struct drm_prin
>  	mutex_lock(xe_gt_sriov_pf_master_mutex(gt));
>  
>  	spare = pf_get_spare_ggtt(gt);
> -	total = xe_ggtt_print_holes(ggtt, alignment, p);
> +	total = xe_ggtt_print_shareable_holes(ggtt, alignment, p);
>  
>  	mutex_unlock(xe_gt_sriov_pf_master_mutex(gt));
>  

Re: [PATCH v4 1/3] drm/xe/ggtt: Split GGTT into usable and shareable pools

[Piotr Piórkowski]

Michal Wajdeczko <michal.wajdeczko@intel.com> wrote on śro [2026-wrz-02 19:59:35 +0200]:
> 
> 
> On 9/1/2026 6:44 PM, Piórkowski, Piotr wrote:
> > From: Piotr Piórkowski <piotr.piorkowski@intel.com>
> > 
> > Driver-owned GGTT allocations and VF provisioning currently use a single
> > GGTT pool. Split it into a usable pool for driver-owned allocations and a
> > shareable pool for VF provisioning.
> > 
> > The pools are separate logical ranges and may overlap, but allocations are
> > limited to the configured size of their corresponding pool. Allocate from
> > the bottom of the usable pool and from the top of the shareable pool when a
> > shareable pool is present.
> > 
> > Add separate insertion APIs for the usable and shareable pools, together
> > with shareable hole-reporting helpers used by SR-IOV PF provisioning.
> > 
> > v2:
> >  - Rename ggtt->usable_size back to ggtt->size.
> >  - Remove the ggtt_insert_node_in_range() helper.
> > v3:
> >  - Introduce the hw_size struct field instead of the ggtt_accessible_size
> >    function.
> > v4:
> >  - Set the shareable pool size only for SR-IOV PF,
> >  - Return -ENOSPC instead of asserting when a large BO no longer fits after
> >    end is clamped to ggtt->size.
> 
> nit: you may want to move change log under ---
> 
> > 
> > Assisted-by: Claude:claude-5-sonnet
> > Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
> > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Maarten Lankhorst <dev@lankhorst.se>
> > ---
> >  drivers/gpu/drm/xe/xe_ggtt.c               | 184 +++++++++++++++++----
> >  drivers/gpu/drm/xe/xe_ggtt.h               |  14 +-
> >  drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c |  12 +-
> >  3 files changed, 176 insertions(+), 34 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> > index 63e8bf193605..1f0bd876cb35 100644
> > --- a/drivers/gpu/drm/xe/xe_ggtt.c
> > +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> > @@ -114,8 +114,10 @@ struct xe_ggtt {
> >  	struct xe_tile *tile;
> >  	/** @start: Start offset of GGTT */
> >  	u64 start;
> > -	/** @size: Total usable size of this GGTT */
> > +	/** @size: Size of the usable allocation range */
> >  	u64 size;
> > +	/** @hw_size: Size of the GGTT range assigned to device */
> > +	u64 hw_size;
> 
> hmm, "hw_size" suggests it is a HW size and currently it's fixed 4G anyway
> maybe to avoid confusion:
> 
> 	/** @start: Start offset of the assigned GGTT range. */
> 	/** @full_size: Full size of the assigned GGTT range. */
> then
> 	/** @size: Size of the GGTT range for the regular use. */
> 	/** @shareable.size: Size of the GGTT range reserved for sharing with VFs. */
> 
> btw, maybe introduction of "full_size" can be done as a separate step
> to decrease size of the current patch ?
> 
> >  	/**
> >  	 * @flags: Flags for this GGTT.
> >  	 * Acceptable flags:
> > @@ -142,6 +144,15 @@ struct xe_ggtt {
> >  	unsigned int access_count;
> >  	/** @wq: Dedicated unordered work queue to process node removals */
> >  	struct workqueue_struct *wq;
> > +#ifdef CONFIG_PCI_IOV
> > +	/** @shareable: Shareable range within GGTT */
> > +	struct {
> > +		/** @start: Shareable range start relative to @mm start */
> > +		u64 start;
> 
> do we need to cache it? likely:
> 
> 	shareable.start = start + full_size - shareable.size;

> 
> > +		/** @size: Shareable range size */
> > +		u64 size;
> > +	} shareable;
> > +#endif
> >  };
> >  
> >  static u64 xelp_ggtt_pte_flags(struct xe_bo *bo, u16 pat_index)
> > @@ -239,7 +250,7 @@ u64 xe_ggtt_size(struct xe_ggtt *ggtt)
> >  static void xe_ggtt_set_pte(struct xe_ggtt *ggtt, u64 addr, u64 pte)
> >  {
> >  	xe_tile_assert(ggtt->tile, !(addr & XE_PTE_MASK));
> > -	xe_tile_assert(ggtt->tile, addr < ggtt->start + ggtt->size);
> > +	xe_tile_assert(ggtt->tile, addr < ggtt->start + ggtt->hw_size);
> >  
> >  	writeq(pte, &ggtt->gsm[addr >> XE_PTE_SHIFT]);
> >  }
> > @@ -253,7 +264,7 @@ static void xe_ggtt_set_pte_and_flush(struct xe_ggtt *ggtt, u64 addr, u64 pte)
> >  static u64 xe_ggtt_get_pte(struct xe_ggtt *ggtt, u64 addr)
> >  {
> >  	xe_tile_assert(ggtt->tile, !(addr & XE_PTE_MASK));
> > -	xe_tile_assert(ggtt->tile, addr < ggtt->start + ggtt->size);
> > +	xe_tile_assert(ggtt->tile, addr < ggtt->start + ggtt->hw_size);
> >  
> >  	return readq(&ggtt->gsm[addr >> XE_PTE_SHIFT]);
> >  }
> > @@ -355,16 +366,31 @@ static const struct xe_ggtt_pt_ops xelpg_pt_wa_ops = {
> >  	.ggtt_get_pte = xe_ggtt_get_pte,
> >  };
> >  
> > -static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u64 start, u64 size)
> > +static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u64 start, u64 usable_size,
> > +				 u64 shareable_size)
> >  {
> > +	struct xe_gt *gt = ggtt->tile->primary_gt;
> > +
> > +	xe_gt_assert(gt, usable_size);
> > +	xe_gt_assert(gt, usable_size <= ggtt->hw_size);
> > +	xe_gt_assert(gt, shareable_size <= ggtt->hw_size);
> > +
> >  	ggtt->start = start;
> > -	ggtt->size = size;
> > -	drm_mm_init(&ggtt->mm, 0, size);
> > +	ggtt->size = usable_size;
> > +
> > +#ifdef CONFIG_PCI_IOV
> > +	if (shareable_size) {
> > +		ggtt->shareable.start = ggtt->hw_size - shareable_size;
> > +		ggtt->shareable.size = shareable_size;
> > +	}
> > +#endif
> > +	drm_mm_init(&ggtt->mm, 0, ggtt->hw_size);
> >  }
> >  
> >  int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 start, u32 size)
> >  {
> > -	__xe_ggtt_init_early(ggtt, start, size);
> > +	ggtt->hw_size = size;
> 
> can we move "full_size" initialization to __early() ?
> 
> > +	__xe_ggtt_init_early(ggtt, start, size, 0);
> 
> kunit can also be a PF
> do we care if it will have no shareable range at all?
> 
> >  	return 0;
> >  }
> >  EXPORT_SYMBOL_IF_KUNIT(xe_ggtt_init_kunit);
> > @@ -427,6 +453,8 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
> >  	if (ggtt_size + ggtt_start > GUC_GGTT_TOP)
> >  		ggtt_size = GUC_GGTT_TOP - ggtt_start;
> >  
> > +	ggtt->hw_size = ggtt_size;
> 
> move to __early()
> 
> > +
> >  	if (GRAPHICS_VERx100(xe) >= 1270)
> >  		ggtt->pt_ops =
> >  			(ggtt->tile->media_gt && XE_GT_WA(ggtt->tile->media_gt, 22019338487)) ||
> > @@ -439,7 +467,8 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
> >  	if (!ggtt->wq)
> >  		return -ENOMEM;
> >  
> > -	__xe_ggtt_init_early(ggtt, ggtt_start, ggtt_size);
> > +	__xe_ggtt_init_early(ggtt, ggtt_start, ggtt_size,
> > +			     IS_SRIOV_PF(xe) ? ggtt_size : 0);
> >  
> >  	err = drmm_add_action_or_reset(&xe->drm, ggtt_fini_early, ggtt);
> >  	if (err)
> > @@ -652,16 +681,55 @@ void xe_ggtt_shift_nodes(struct xe_ggtt *ggtt, u64 new_start)
> >  
> >  	xe_tile_assert(ggtt->tile, new_start >= xe_wopcm_size(tile_to_xe(ggtt->tile)));
> 
> btw, maybe we should introduce:
> 
> 	/** @bottom: Start offset of the GGTT derived frm WOPCM size. */
> or	/** @hw_start: ... */
> or	/** @real_start: ... */
> 
> or helper:
> 
> 	u64 xe_ggtt_bottom(ggtt)
> 	{
> 		return xe_wopcm_size(ggtt->tile->xe);
> 	}
> 
> to avoid referring to WOPCM beyond the ggtt_init()
> 
> >  	xe_tile_assert(ggtt->tile, new_start + ggtt->size <= GUC_GGTT_TOP);
> > +#ifdef CONFIG_PCI_IOV
> > +	xe_tile_assert(ggtt->tile, ggtt->shareable.size == 0);
> > +#endif
> >  
> >  	/* pairs with READ_ONCE in xe_ggtt_node_addr() */
> >  	WRITE_ONCE(ggtt->start, new_start);
> >  }
> >  
> > -static int xe_ggtt_insert_node_locked(struct xe_ggtt_node *node,
> > -				      u32 size, u32 align, u32 mm_flags)
> > +static int ggtt_insert_node_in_range_locked(struct xe_ggtt_node *node, u32 size,
> > +					    u32 align, u64 range_start,
> > +					    u64 range_size, u32 mm_flags)
> >  {
> > -	return drm_mm_insert_node_generic(&node->ggtt->mm, &node->base, size, align, 0,
> > -					  mm_flags);
> > +	struct xe_ggtt *ggtt = node->ggtt;
> > +	u64 range_end = range_start + range_size;
> > +
> > +	lockdep_assert_held(&ggtt->lock);
> > +
> > +	if (!range_size || range_end <= range_start)
> > +		return -EINVAL;
> > +
> > +	if (range_end > ggtt->hw_size)
> > +		return -ERANGE;
> > +
> > +	if (size > range_size)
> > +		return -ENOSPC;
> > +
> > +	return drm_mm_insert_node_in_range(&ggtt->mm, &node->base, size, align, 0,
> > +					  range_start, range_end, mm_flags);
> > +}
> > +
> > +/*
> > + * When the shareable range is present, allocations start from the bottom
> > + * to leave space at the top; otherwise they start from the top.
> > + */
> > +static u32 ggtt_usable_insert_flags(struct xe_ggtt *ggtt)
> > +{
> > +#ifdef CONFIG_PCI_IOV
> > +	if (ggtt->shareable.size > 0)
> > +		return DRM_MM_INSERT_LOW;
> > +#endif
> > +	return DRM_MM_INSERT_HIGH;
> > +}
> > +
> > +static int xe_ggtt_insert_node_locked(struct xe_ggtt_node *node, u32 size, u32 align)
> > +{
> > +	struct xe_ggtt *ggtt = node->ggtt;
> > +
> > +	return ggtt_insert_node_in_range_locked(node, size, align, 0,
> > +						ggtt->size, ggtt_usable_insert_flags(ggtt));
> >  }
> >  
> >  static struct xe_ggtt_node *ggtt_node_init(struct xe_ggtt *ggtt)
> > @@ -683,7 +751,7 @@ static struct xe_ggtt_node *ggtt_node_init(struct xe_ggtt *ggtt)
> >   * @size: size of the node
> >   * @align: alignment constrain of the node
> >   *
> > - * Return: &xe_ggtt_node on success or a ERR_PTR on failure.
> > + * Return: &xe_ggtt_node on success or an error on failure.
> 
> we still return an ERR_PTR here, not an int
> 
> >   */
> >  struct xe_ggtt_node *xe_ggtt_insert_node(struct xe_ggtt *ggtt, u32 size, u32 align)
> >  {
> > @@ -695,8 +763,46 @@ struct xe_ggtt_node *xe_ggtt_insert_node(struct xe_ggtt *ggtt, u32 size, u32 ali
> >  		return node;
> >  
> >  	guard(mutex)(&ggtt->lock);
> > -	ret = xe_ggtt_insert_node_locked(node, size, align,
> > -					 DRM_MM_INSERT_HIGH);
> > +
> > +	ret = xe_ggtt_insert_node_locked(node, size, align);
> > +	if (ret) {
> > +		ggtt_node_fini(node);
> > +		return ERR_PTR(ret);
> > +	}
> > +
> > +	return node;
> > +}
> > +
> > +#ifdef CONFIG_PCI_IOV
> > +/**
> > + * xe_ggtt_insert_node_shareable - Insert a &xe_ggtt_node into shareable range
> 
> nit: add () to the function name
> 
> nit: "Insert a new node in shareable GGTT range." ?
> 
> > + * @ggtt: the &xe_ggtt into which the node should be inserted.
> > + * @size: size of the node
> > + * @align: alignment constrain of the node
> > + *
> > + * Inserts a node into the shareable GGTT range.
> > + * Allocations always start from the top (DRM_MM_INSERT_HIGH).
> > + *
> > + * Return: &xe_ggtt_node on success or an error on failure.
> 
> return ... an ERR_PTR on failure
> 
> > + */
> > +struct xe_ggtt_node *xe_ggtt_insert_node_shareable(struct xe_ggtt *ggtt, u32 size, u32 align)
> > +{
> > +	struct xe_ggtt_node *node;
> > +	int ret;
> > +
> > +	if (!ggtt->shareable.size)
> > +		return ERR_PTR(-ENOSPC);
> > +
> > +	node = ggtt_node_init(ggtt);
> > +	if (IS_ERR(node))
> > +		return node;
> > +
> > +	guard(mutex)(&ggtt->lock);
> > +
> > +	ret = ggtt_insert_node_in_range_locked(node, size, align,
> > +					       ggtt->shareable.start,
> > +					       ggtt->shareable.size,
> > +					       DRM_MM_INSERT_HIGH);
> >  	if (ret) {
> >  		ggtt_node_fini(node);
> >  		return ERR_PTR(ret);
> > @@ -704,6 +810,7 @@ struct xe_ggtt_node *xe_ggtt_insert_node(struct xe_ggtt *ggtt, u32 size, u32 ali
> >  
> >  	return node;
> >  }
> > +#endif
> >  
> >  /**
> >   * xe_ggtt_node_pt_size() - Get the size of page table entries needed to map a GGTT node.
> > @@ -787,6 +894,7 @@ void xe_ggtt_map_bo_unlocked(struct xe_ggtt *ggtt, struct xe_bo *bo)
> >   *
> >   * This function allows inserting a GGTT node with a custom transformation function.
> >   * This is useful for display to allow inserting rotated framebuffers to GGTT.
> > + * Allocates from the usable range only.
> >   *
> >   * Return: A pointer to %xe_ggtt_node struct on success. An ERR_PTR otherwise.
> >   */
> > @@ -807,7 +915,7 @@ struct xe_ggtt_node *xe_ggtt_insert_node_transform(struct xe_ggtt *ggtt,
> >  		goto err;
> >  	}
> >  
> > -	ret = xe_ggtt_insert_node_locked(node, size, align, 0);
> > +	ret = xe_ggtt_insert_node_locked(node, size, align);
> >  	if (ret)
> >  		goto err_unlock;
> >  
> > @@ -874,10 +982,19 @@ static int __xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
> >  	else
> >  		end = 0;
> >  
> > -	xe_tile_assert(ggtt->tile, end >= start + xe_bo_size(bo));
> > +	end = min(end, ggtt->size);
> > +
> > +	if (end < start + xe_bo_size(bo)) {
> > +		ggtt_node_fini(bo->ggtt_node[tile_id]);
> > +		bo->ggtt_node[tile_id] = NULL;
> > +		mutex_unlock(&ggtt->lock);
> > +		err = -ENOSPC;
> > +		goto out;
> > +	}
> 
> maybe as a preparation step, convert this function to use:
> 
> 	guard(xe_pm_runtime_noresume)(xe);
> and
> 	guard(mutex)(&ggtt->lock);
> 
> to minimize risk of mistakes?
> 
> >  
> >  	err = drm_mm_insert_node_in_range(&ggtt->mm, &bo->ggtt_node[tile_id]->base,
> > -					  xe_bo_size(bo), alignment, 0, start, end, 0);
> > +					  xe_bo_size(bo), alignment, 0, start, end,
> > +					  ggtt_usable_insert_flags(ggtt));
> >  	if (err) {
> >  		ggtt_node_fini(bo->ggtt_node[tile_id]);
> >  		bo->ggtt_node[tile_id] = NULL;
> > @@ -948,24 +1065,30 @@ void xe_ggtt_remove_bo(struct xe_ggtt *ggtt, struct xe_bo *bo)
> >  			    bo->flags & XE_BO_FLAG_GGTT_INVALIDATE);
> >  }
> >  
> > +#ifdef CONFIG_PCI_IOV
> >  /**
> > - * xe_ggtt_largest_hole - Largest GGTT hole
> > + * xe_ggtt_largest_shareable_hole - Largest hole within the shareable range
> 
> as there is no 'usable' variant of this function, maybe it is
> not worth to rename it?

I disagree with that — we have two logical pools, and I think we should
specify exactly what this function applies to — we're not looking for holes
in the entire GGTT, but only in the subset called "shareable" — and the name
indicates that.


> 
> nit: remember to add () to function name
> 
> nit: maybe move closer to print_holes() to keep them under single #ifdef
> 
> >   * @ggtt: the &xe_ggtt that will be inspected
> >   * @alignment: minimum alignment
> >   * @spare: If not NULL: in: desired memory size to be spared / out: Adjusted possible spare
> >   *
> > - * Return: size of the largest continuous GGTT region
> > + * Only holes within the shareable range are considered.
> > + *
> > + * Return: size of the largest continuous shareable GGTT region
> >   */
> > -u64 xe_ggtt_largest_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare)
> > +u64 xe_ggtt_largest_shareable_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare)
> >  {
> >  	const struct drm_mm *mm = &ggtt->mm;
> >  	const struct drm_mm_node *entry;
> >  	u64 hole_start, hole_end, hole_size;
> > +	u64 shareable_start = ggtt->shareable.start;
> > +	u64 shareable_end = ggtt->shareable.start + ggtt->shareable.size;
> >  	u64 max_hole = 0;
> >  
> >  	mutex_lock(&ggtt->lock);
> >  	drm_mm_for_each_hole(entry, mm, hole_start, hole_end) {
> > -		hole_start = max(hole_start, ggtt->start);
> > +		hole_start = max(hole_start, shareable_start);
> > +		hole_end = min(hole_end, shareable_end);
> >  		hole_start = ALIGN(hole_start, alignment);
> >  		hole_end = ALIGN_DOWN(hole_end, alignment);
> >  		if (hole_start >= hole_end)
> > @@ -981,7 +1104,6 @@ u64 xe_ggtt_largest_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare)
> >  	return max_hole;
> >  }
> >  
> > -#ifdef CONFIG_PCI_IOV
> >  static u64 xe_encode_vfid_pte(u16 vfid)
> >  {
> >  	return FIELD_PREP(GGTT_PTE_VFID, vfid) | XE_PAGE_PRESENT;
> > @@ -1120,27 +1242,32 @@ int xe_ggtt_dump(struct xe_ggtt *ggtt, struct drm_printer *p)
> >  	return err;
> >  }
> >  
> > +#ifdef CONFIG_PCI_IOV
> >  /**
> > - * xe_ggtt_print_holes - Print holes
> > + * xe_ggtt_print_shareable_holes - Print holes within the shareable range
> >   * @ggtt: the &xe_ggtt to be inspected
> >   * @alignment: min alignment
> >   * @p: the &drm_printer
> >   *
> > - * Print GGTT ranges that are available and return total size available.
> > + * Print GGTT ranges that are available within the shareable range and return
> > + * total size available.
> >   *
> > - * Return: Total available size.
> > + * Return: Total available shareable size.
> >   */
> > -u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer *p)
> > +u64 xe_ggtt_print_shareable_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer *p)
> >  {
> >  	const struct drm_mm *mm = &ggtt->mm;
> >  	const struct drm_mm_node *entry;
> >  	u64 hole_start, hole_end, hole_size;
> > +	u64 shareable_start = ggtt->shareable.start;
> > +	u64 shareable_end = ggtt->shareable.start + ggtt->shareable.size;
> >  	u64 total = 0;
> >  	char buf[10];
> >  
> >  	mutex_lock(&ggtt->lock);
> >  	drm_mm_for_each_hole(entry, mm, hole_start, hole_end) {
> > -		hole_start = max(hole_start, ggtt->start);
> > +		hole_start = max(hole_start, shareable_start);
> > +		hole_end = min(hole_end, shareable_end);
> >  		hole_start = ALIGN(hole_start, alignment);
> >  		hole_end = ALIGN_DOWN(hole_end, alignment);
> >  		if (hole_start >= hole_end)
> > @@ -1157,6 +1284,7 @@ u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer
> >  
> >  	return total;
> >  }
> > +#endif
> >  
> >  /**
> >   * xe_ggtt_encode_pte_flags - Get PTE encoding flags for BO
> > diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
> > index c864cc975a69..c441e39fdd47 100644
> > --- a/drivers/gpu/drm/xe/xe_ggtt.h
> > +++ b/drivers/gpu/drm/xe/xe_ggtt.h
> > @@ -24,6 +24,16 @@ u64 xe_ggtt_size(struct xe_ggtt *ggtt);
> >  
> >  struct xe_ggtt_node *
> >  xe_ggtt_insert_node(struct xe_ggtt *ggtt, u32 size, u32 align);
> > +#ifdef CONFIG_PCI_IOV
> > +struct xe_ggtt_node *
> > +xe_ggtt_insert_node_shareable(struct xe_ggtt *ggtt, u32 size, u32 align);
> > +#else
> > +static inline struct xe_ggtt_node *
> > +xe_ggtt_insert_node_shareable(struct xe_ggtt *ggtt, u32 size, u32 align)
> > +{
> > +	return ERR_PTR(-ENODEV);
> > +}
> 
> are you sure we need a stub?
> the PF code that uses this should be under PCI_IOV already
> 
> > +#endif
> >  struct xe_ggtt_node *
> >  xe_ggtt_insert_node_transform(struct xe_ggtt *ggtt,
> >  			      struct xe_bo *bo, u64 pte,
> > @@ -36,12 +46,12 @@ int xe_ggtt_insert_bo(struct xe_ggtt *ggtt, struct xe_bo *bo, struct drm_exec *e
> >  int xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
> >  			 u64 start, u64 end, struct drm_exec *exec);
> >  void xe_ggtt_remove_bo(struct xe_ggtt *ggtt, struct xe_bo *bo);
> > -u64 xe_ggtt_largest_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare);
> >  
> >  int xe_ggtt_dump(struct xe_ggtt *ggtt, struct drm_printer *p);
> > -u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer *p);
> >  
> >  #ifdef CONFIG_PCI_IOV
> > +u64 xe_ggtt_largest_shareable_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare);
> > +u64 xe_ggtt_print_shareable_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer *p);
> >  void xe_ggtt_assign(const struct xe_ggtt_node *node, u16 vfid);
> >  int xe_ggtt_node_save(struct xe_ggtt_node *node, void *dst, size_t size, u16 vfid);
> >  int xe_ggtt_node_load(struct xe_ggtt_node *node, const void *src, size_t size, u16 vfid);
> > diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> > index be0a413ee17c..a5f4a3d27c3e 100644
> > --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> > +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> > @@ -531,9 +531,13 @@ static int pf_provision_vf_ggtt(struct xe_gt *gt, unsigned int vfid, u64 size)
> >  	if (!size)
> >  		return 0;
> >  
> > -	node = xe_ggtt_insert_node(ggtt, size, alignment);
> > -	if (IS_ERR(node))
> > +	node = xe_ggtt_insert_node_shareable(ggtt, size, alignment);
> > +	if (IS_ERR(node)) {
> > +		xe_gt_sriov_dbg_verbose(gt,
> > +					"VF%u GGTT provisioning failed: no shareable range\n",
> > +					vfid);
> 
> do we need this new dbg?
> ERR_PTR might be different than -ENOSPC so above message could be misleading
> 
> and we already print %pe in case of GGTT provisioning failure, no?
> 
> >  		return PTR_ERR(node);
> > +	}
> >  
> >  	xe_ggtt_assign(node, vfid);
> >  	xe_gt_sriov_dbg_verbose(gt, "VF%u assigned GGTT %llx-%llx\n",
> > @@ -729,7 +733,7 @@ static u64 pf_get_max_ggtt(struct xe_gt *gt)
> >  	u64 spare = pf_get_spare_ggtt(gt);
> >  	u64 max_hole;
> >  
> > -	max_hole = xe_ggtt_largest_hole(ggtt, alignment, &spare);
> > +	max_hole = xe_ggtt_largest_shareable_hole(ggtt, alignment, &spare);
> >  
> >  	xe_gt_sriov_dbg_verbose(gt, "HOLE max %lluK reserved %lluK\n",
> >  				max_hole / SZ_1K, spare / SZ_1K);
> > @@ -3549,7 +3553,7 @@ int xe_gt_sriov_pf_config_print_available_ggtt(struct xe_gt *gt, struct drm_prin
> >  	mutex_lock(xe_gt_sriov_pf_master_mutex(gt));
> >  
> >  	spare = pf_get_spare_ggtt(gt);
> > -	total = xe_ggtt_print_holes(ggtt, alignment, p);
> > +	total = xe_ggtt_print_shareable_holes(ggtt, alignment, p);
> >  
> >  	mutex_unlock(xe_gt_sriov_pf_master_mutex(gt));
> >  
> 

Thanks for the review — I agree with most of your comments (though I have some doubts about
the cache start issue and the xe_ggtt_largest_shareable_hole name).

I'll take your comments into account and make changes in the next series.

Thanks,
Piotr


-- 

[PATCH v4 2/3] drm/xe/ggtt: Initialize GGTT pools by SR-IOV mode

[Piórkowski, Piotr]

From: Piotr Piórkowski <piotr.piorkowski@intel.com>

GGTT initialization currently uses the full available range for both the
usable and shareable pools, regardless of the SR-IOV mode. The range is
read from hardware on native and PF devices and assigned by GuC on VFs.

Let's separate range discovery from pool setup and initialize the pools
based on SR-IOV mode. Native and VF modes will use only the usable pool.
Shared PF mode will use both pools over the same full range, so they fully
overlap.

Assisted-by: Claude:claude-5-sonnet
Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/xe/xe_ggtt.c | 132 +++++++++++++++++++++++++----------
 1 file changed, 97 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index 1f0bd876cb35..7fcd686f9729 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -366,8 +366,8 @@ static const struct xe_ggtt_pt_ops xelpg_pt_wa_ops = {
 	.ggtt_get_pte = xe_ggtt_get_pte,
 };
 
-static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u64 start, u64 usable_size,
-				 u64 shareable_size)
+static void ggtt_init_ranges(struct xe_ggtt *ggtt, u64 start, u64 usable_size,
+			     u64 shareable_size)
 {
 	struct xe_gt *gt = ggtt->tile->primary_gt;
 
@@ -387,10 +387,87 @@ static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u64 start, u64 usable_siz
 	drm_mm_init(&ggtt->mm, 0, ggtt->hw_size);
 }
 
+static int ggtt_get_range_from_hw(struct xe_ggtt *ggtt, u64 *start, u64 *size)
+{
+	struct xe_device *xe = tile_to_xe(ggtt->tile);
+	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+	unsigned int gsm_size;
+
+	if (GRAPHICS_VERx100(xe) >= 1250)
+		gsm_size = SZ_8M; /* GGTT is expected to be 4GiB */
+	else
+		gsm_size = probe_gsm_size(pdev);
+
+	if (!gsm_size) {
+		xe_tile_err(ggtt->tile, "Hardware reported no preallocated GSM\n");
+		return -ENOMEM;
+	}
+
+	*start = xe_wopcm_size(xe);
+	*size = (gsm_size / 8) * (u64)XE_PAGE_SIZE - *start;
+
+	return 0;
+}
+
+static int ggtt_get_range_from_guc(struct xe_ggtt *ggtt, u64 *start, u64 *size)
+{
+	struct xe_device *xe = tile_to_xe(ggtt->tile);
+	u64 wopcm = xe_wopcm_size(xe);
+
+	*start = xe_tile_sriov_vf_ggtt_base(ggtt->tile);
+	*size = xe_tile_sriov_vf_ggtt(ggtt->tile);
+
+	if (*start < wopcm || *start + *size > GUC_GGTT_TOP) {
+		xe_tile_err(ggtt->tile, "Invalid GGTT configuration: %#llx-%#llx\n",
+			    *start, *start + *size - 1);
+		return -ERANGE;
+	}
+
+	return 0;
+}
+
+static int ggtt_read_available_range(struct xe_ggtt *ggtt, u64 *start, u64 *size)
+{
+	struct xe_device *xe = tile_to_xe(ggtt->tile);
+	int err;
+
+	if (IS_SRIOV_VF(xe))
+		err = ggtt_get_range_from_guc(ggtt, start, size);
+	else
+		err = ggtt_get_range_from_hw(ggtt, start, size);
+	if (err)
+		return err;
+
+	if (*start + *size > GUC_GGTT_TOP)
+		*size = GUC_GGTT_TOP - *start;
+
+	return 0;
+}
+
+static void ggtt_init_native(struct xe_ggtt *ggtt, u64 start, u64 size)
+{
+	ggtt_init_ranges(ggtt, start, size, 0);
+}
+
+static void ggtt_init_shared(struct xe_ggtt *ggtt, u64 start, u64 size)
+{
+	ggtt_init_ranges(ggtt, start, size, size);
+}
+
+static void ggtt_init_generic(struct xe_ggtt *ggtt, u64 start, u64 size)
+{
+	struct xe_device *xe = tile_to_xe(ggtt->tile);
+
+	if (!IS_SRIOV_PF(xe))
+		ggtt_init_native(ggtt, start, size);
+	else
+		ggtt_init_shared(ggtt, start, size);
+}
+
 int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 start, u32 size)
 {
 	ggtt->hw_size = size;
-	__xe_ggtt_init_early(ggtt, start, size, 0);
+	ggtt_init_ranges(ggtt, start, size, 0);
 	return 0;
 }
 EXPORT_SYMBOL_IF_KUNIT(xe_ggtt_init_kunit);
@@ -418,43 +495,19 @@ static void dev_fini_ggtt(void *arg)
 int xe_ggtt_init_early(struct xe_ggtt *ggtt)
 {
 	struct xe_device *xe = tile_to_xe(ggtt->tile);
-	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
-	unsigned int gsm_size;
-	u64 ggtt_start, wopcm = xe_wopcm_size(xe), ggtt_size;
+	u64 ggtt_start, ggtt_size;
 	int err;
 
-	if (!IS_SRIOV_VF(xe)) {
-		if (GRAPHICS_VERx100(xe) >= 1250)
-			gsm_size = SZ_8M; /* GGTT is expected to be 4GiB */
-		else
-			gsm_size = probe_gsm_size(pdev);
-		if (gsm_size == 0) {
-			xe_tile_err(ggtt->tile, "Hardware reported no preallocated GSM\n");
-			return -ENOMEM;
-		}
-		ggtt_start = wopcm;
-		ggtt_size = (gsm_size / 8) * (u64)XE_PAGE_SIZE - ggtt_start;
-	} else {
-		ggtt_start = xe_tile_sriov_vf_ggtt_base(ggtt->tile);
-		ggtt_size = xe_tile_sriov_vf_ggtt(ggtt->tile);
-
-		if (ggtt_start < wopcm ||
-		    ggtt_start + ggtt_size > GUC_GGTT_TOP) {
-			xe_tile_err(ggtt->tile, "Invalid GGTT configuration: %#llx-%#llx\n",
-				    ggtt_start, ggtt_start + ggtt_size - 1);
-			return -ERANGE;
-		}
-	}
+	err = ggtt_read_available_range(ggtt, &ggtt_start, &ggtt_size);
+	if (err)
+		return err;
+
+	ggtt->hw_size = ggtt_size;
 
 	ggtt->gsm = ggtt->tile->mmio.regs + SZ_8M;
 	if (IS_DGFX(xe) && xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K)
 		ggtt->flags |= XE_GGTT_FLAGS_64K;
 
-	if (ggtt_size + ggtt_start > GUC_GGTT_TOP)
-		ggtt_size = GUC_GGTT_TOP - ggtt_start;
-
-	ggtt->hw_size = ggtt_size;
-
 	if (GRAPHICS_VERx100(xe) >= 1270)
 		ggtt->pt_ops =
 			(ggtt->tile->media_gt && XE_GT_WA(ggtt->tile->media_gt, 22019338487)) ||
@@ -467,8 +520,17 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
 	if (!ggtt->wq)
 		return -ENOMEM;
 
-	__xe_ggtt_init_early(ggtt, ggtt_start, ggtt_size,
-			     IS_SRIOV_PF(xe) ? ggtt_size : 0);
+	ggtt_init_generic(ggtt, ggtt_start, ggtt_size);
+	xe_tile_info(ggtt->tile, "GGTT usable %#llx-%#llx = %lluK\n",
+		     ggtt->start, ggtt->start + ggtt->size - 1,
+		     ggtt->size / SZ_1K);
+#ifdef CONFIG_PCI_IOV
+	if (IS_SRIOV_PF(xe))
+		xe_tile_info(ggtt->tile, "GGTT shareable %#llx-%#llx = %lluK\n",
+			     ggtt->start + ggtt->shareable.start,
+			     ggtt->start + ggtt->shareable.start + ggtt->shareable.size - 1,
+			     ggtt->shareable.size / SZ_1K);
+#endif
 
 	err = drmm_add_action_or_reset(&xe->drm, ggtt_fini_early, ggtt);
 	if (err)
-- 
2.34.1

Re: [PATCH v4 2/3] drm/xe/ggtt: Initialize GGTT pools by SR-IOV mode

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] Integer overflow in GGTT bounds check enables out-of-bounds memory access.
--

commit f9f8d4706aa1161e82f40e54588776b342483570
Author: Piotr Piórkowski <piotr.piorkowski@intel.com>
drm/xe/ggtt: Initialize GGTT pools by SR-IOV mode

This commit separates GGTT range discovery from pool setup and initializes
the usable and shareable pools based on the SR-IOV mode.

> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> index fa77abbb3cd5a..7d22b0cbcaec6 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.c
> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
[ ... ]
> +static int ggtt_get_range_from_guc(struct xe_ggtt *ggtt, u64 *start, u64 *size)
> +{
> +	struct xe_device *xe = tile_to_xe(ggtt->tile);
> +	u64 wopcm = xe_wopcm_size(xe);
> +
> +	*start = xe_tile_sriov_vf_ggtt_base(ggtt->tile);
> +	*size = xe_tile_sriov_vf_ggtt(ggtt->tile);
> +
> +	if (*start < wopcm || *start + *size > GUC_GGTT_TOP) {

[Severity: High]
This isn't a bug introduced by this patch, but is there a risk of an integer
overflow occurring in this bounds check?

If a compromised PF or malicious GuC firmware provides extremely large values
for the start and size parameters via GUC_KLV_VF_CFG_GGTT_START_KEY, could
*start + *size wrap around to a small value? If this happens, the sum might
evaluate to less than GUC_GGTT_TOP, which would successfully bypass this
boundary check despite being invalid.

If bypassed, the overflowed start address would later be applied as an
offset during operations like xe_ggtt_insert_node(). This could result in
indexing out-of-bounds into the ggtt->gsm array, leading to kernel memory
corruption or a kernel panic. In Confidential Compute environments, this
might provide a host-to-guest escalation vector.

> +		xe_tile_err(ggtt->tile, "Invalid GGTT configuration: %#llx-%#llx\n",
> +			    *start, *start + *size - 1);
> +		return -ERANGE;
> +	}
> +
> +	return 0;
> +}
[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260901164435.1395260-1-piotr.piorkowski@intel.com?part=2

Re: [PATCH v4 2/3] drm/xe/ggtt: Initialize GGTT pools by SR-IOV mode

[Michal Wajdeczko]

On 9/1/2026 6:44 PM, Piórkowski, Piotr wrote:
> From: Piotr Piórkowski <piotr.piorkowski@intel.com>
> 
> GGTT initialization currently uses the full available range for both the
> usable and shareable pools, regardless of the SR-IOV mode. The range is
> read from hardware on native and PF devices and assigned by GuC on VFs.
> 
> Let's separate range discovery from pool setup and initialize the pools
> based on SR-IOV mode. Native and VF modes will use only the usable pool.
> Shared PF mode will use both pools over the same full range, so they fully
> overlap.
> 
> Assisted-by: Claude:claude-5-sonnet
> Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Maarten Lankhorst <dev@lankhorst.se>
> ---
>  drivers/gpu/drm/xe/xe_ggtt.c | 132 +++++++++++++++++++++++++----------
>  1 file changed, 97 insertions(+), 35 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> index 1f0bd876cb35..7fcd686f9729 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.c
> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> @@ -366,8 +366,8 @@ static const struct xe_ggtt_pt_ops xelpg_pt_wa_ops = {
>  	.ggtt_get_pte = xe_ggtt_get_pte,
>  };
>  
> -static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u64 start, u64 usable_size,
> -				 u64 shareable_size)
> +static void ggtt_init_ranges(struct xe_ggtt *ggtt, u64 start, u64 usable_size,
> +			     u64 shareable_size)

maybe this function rename could be done in patch 1/3 when we've changed its signature?

>  {
>  	struct xe_gt *gt = ggtt->tile->primary_gt;
>  
> @@ -387,10 +387,87 @@ static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u64 start, u64 usable_siz
>  	drm_mm_init(&ggtt->mm, 0, ggtt->hw_size);
>  }
>  
> +static int ggtt_get_range_from_hw(struct xe_ggtt *ggtt, u64 *start, u64 *size)

ggtt_probe() ?

> +{
> +	struct xe_device *xe = tile_to_xe(ggtt->tile);
> +	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
> +	unsigned int gsm_size;
> +
> +	if (GRAPHICS_VERx100(xe) >= 1250)
> +		gsm_size = SZ_8M; /* GGTT is expected to be 4GiB */
> +	else
> +		gsm_size = probe_gsm_size(pdev);
> +
> +	if (!gsm_size) {
> +		xe_tile_err(ggtt->tile, "Hardware reported no preallocated GSM\n");
> +		return -ENOMEM;
> +	}
> +
> +	*start = xe_wopcm_size(xe);
> +	*size = (gsm_size / 8) * (u64)XE_PAGE_SIZE - *start;
> +
> +	return 0;
> +}
> +
> +static int ggtt_get_range_from_guc(struct xe_ggtt *ggtt, u64 *start, u64 *size)
> +{
> +	struct xe_device *xe = tile_to_xe(ggtt->tile);
> +	u64 wopcm = xe_wopcm_size(xe);
> +
> +	*start = xe_tile_sriov_vf_ggtt_base(ggtt->tile);
> +	*size = xe_tile_sriov_vf_ggtt(ggtt->tile);
> +
> +	if (*start < wopcm || *start + *size > GUC_GGTT_TOP) {
> +		xe_tile_err(ggtt->tile, "Invalid GGTT configuration: %#llx-%#llx\n",
> +			    *start, *start + *size - 1);
> +		return -ERANGE;
> +	}
> +
> +	return 0;
> +}
> +
> +static int ggtt_read_available_range(struct xe_ggtt *ggtt, u64 *start, u64 *size)
> +{
> +	struct xe_device *xe = tile_to_xe(ggtt->tile);
> +	int err;
> +
> +	if (IS_SRIOV_VF(xe))
> +		err = ggtt_get_range_from_guc(ggtt, start, size);
> +	else
> +		err = ggtt_get_range_from_hw(ggtt, start, size);
> +	if (err)
> +		return err;
> +
> +	if (*start + *size > GUC_GGTT_TOP)
> +		*size = GUC_GGTT_TOP - *start;

we can make such adjustment only on native/PF

on VF, this should be treated as a fatal bug (like start < wopcm)
> +
> +	return 0;
> +}
> +
> +static void ggtt_init_native(struct xe_ggtt *ggtt, u64 start, u64 size)
> +{
> +	ggtt_init_ranges(ggtt, start, size, 0);
> +}
> +
> +static void ggtt_init_shared(struct xe_ggtt *ggtt, u64 start, u64 size)
> +{
> +	ggtt_init_ranges(ggtt, start, size, size);
> +}
> +
> +static void ggtt_init_generic(struct xe_ggtt *ggtt, u64 start, u64 size)
> +{
> +	struct xe_device *xe = tile_to_xe(ggtt->tile);
> +
> +	if (!IS_SRIOV_PF(xe))
> +		ggtt_init_native(ggtt, start, size);
> +	else
> +		ggtt_init_shared(ggtt, start, size);
> +}
> +
>  int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 start, u32 size)
>  {
>  	ggtt->hw_size = size;
> -	__xe_ggtt_init_early(ggtt, start, size, 0);
> +	ggtt_init_ranges(ggtt, start, size, 0);
>  	return 0;
>  }
>  EXPORT_SYMBOL_IF_KUNIT(xe_ggtt_init_kunit);
> @@ -418,43 +495,19 @@ static void dev_fini_ggtt(void *arg)
>  int xe_ggtt_init_early(struct xe_ggtt *ggtt)
>  {
>  	struct xe_device *xe = tile_to_xe(ggtt->tile);
> -	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
> -	unsigned int gsm_size;
> -	u64 ggtt_start, wopcm = xe_wopcm_size(xe), ggtt_size;
> +	u64 ggtt_start, ggtt_size;
>  	int err;
>  
> -	if (!IS_SRIOV_VF(xe)) {
> -		if (GRAPHICS_VERx100(xe) >= 1250)
> -			gsm_size = SZ_8M; /* GGTT is expected to be 4GiB */
> -		else
> -			gsm_size = probe_gsm_size(pdev);
> -		if (gsm_size == 0) {
> -			xe_tile_err(ggtt->tile, "Hardware reported no preallocated GSM\n");
> -			return -ENOMEM;
> -		}
> -		ggtt_start = wopcm;
> -		ggtt_size = (gsm_size / 8) * (u64)XE_PAGE_SIZE - ggtt_start;
> -	} else {
> -		ggtt_start = xe_tile_sriov_vf_ggtt_base(ggtt->tile);
> -		ggtt_size = xe_tile_sriov_vf_ggtt(ggtt->tile);
> -
> -		if (ggtt_start < wopcm ||
> -		    ggtt_start + ggtt_size > GUC_GGTT_TOP) {
> -			xe_tile_err(ggtt->tile, "Invalid GGTT configuration: %#llx-%#llx\n",
> -				    ggtt_start, ggtt_start + ggtt_size - 1);
> -			return -ERANGE;
> -		}
> -	}
> +	err = ggtt_read_available_range(ggtt, &ggtt_start, &ggtt_size);
> +	if (err)
> +		return err;
> +
> +	ggtt->hw_size = ggtt_size;
>  
>  	ggtt->gsm = ggtt->tile->mmio.regs + SZ_8M;
>  	if (IS_DGFX(xe) && xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K)
>  		ggtt->flags |= XE_GGTT_FLAGS_64K;
>  
> -	if (ggtt_size + ggtt_start > GUC_GGTT_TOP)
> -		ggtt_size = GUC_GGTT_TOP - ggtt_start;
> -
> -	ggtt->hw_size = ggtt_size;
> -
>  	if (GRAPHICS_VERx100(xe) >= 1270)
>  		ggtt->pt_ops =
>  			(ggtt->tile->media_gt && XE_GT_WA(ggtt->tile->media_gt, 22019338487)) ||
> @@ -467,8 +520,17 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
>  	if (!ggtt->wq)
>  		return -ENOMEM;
>  
> -	__xe_ggtt_init_early(ggtt, ggtt_start, ggtt_size,
> -			     IS_SRIOV_PF(xe) ? ggtt_size : 0);
> +	ggtt_init_generic(ggtt, ggtt_start, ggtt_size);
> +	xe_tile_info(ggtt->tile, "GGTT usable %#llx-%#llx = %lluK\n",
> +		     ggtt->start, ggtt->start + ggtt->size - 1,
> +		     ggtt->size / SZ_1K);

both info() could go to init_generic(), no?

> +#ifdef CONFIG_PCI_IOV
> +	if (IS_SRIOV_PF(xe))
> +		xe_tile_info(ggtt->tile, "GGTT shareable %#llx-%#llx = %lluK\n",
> +			     ggtt->start + ggtt->shareable.start,
> +			     ggtt->start + ggtt->shareable.start + ggtt->shareable.size - 1,
> +			     ggtt->shareable.size / SZ_1K);
> +#endif
>  
>  	err = drmm_add_action_or_reset(&xe->drm, ggtt_fini_early, ggtt);
>  	if (err)

[PATCH v4 3/3] drm/xe/ggtt: Add KUnit tests for usable and shareable pools

[Piórkowski, Piotr]

From: Piotr Piórkowski <piotr.piorkowski@intel.com>

Add GGTT KUnit tests focused on the newly introduced usable and
shareable pools.

Cover range initialization for native and PF modes, including partially
overlapping pools. Exercise allocation direction and conflicts between
the pools, as well as the unavailable shareable pool and requests
exceeding pool capacity.

v2:
 - Init ggtt.lock with mutex_init() in each test.

Assisted-by: Claude:claude-5-sonnet
Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/xe/tests/xe_ggtt_test.c | 336 ++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_ggtt.c            |   4 +
 2 files changed, 340 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/tests/xe_ggtt_test.c

diff --git a/drivers/gpu/drm/xe/tests/xe_ggtt_test.c b/drivers/gpu/drm/xe/tests/xe_ggtt_test.c
new file mode 100644
index 000000000000..7d28b97f8afe
--- /dev/null
+++ b/drivers/gpu/drm/xe/tests/xe_ggtt_test.c
@@ -0,0 +1,336 @@
+// SPDX-License-Identifier: GPL-2.0 AND MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include <kunit/test.h>
+
+#include "xe_device.h"
+#include "xe_kunit_helpers.h"
+
+#define GGTT_TEST_START		SZ_1M
+
+static int ggtt_test_init(struct kunit *test)
+{
+	xe_kunit_helper_xe_device_test_init(test);
+	return 0;
+}
+
+static void init_native(struct kunit *test)
+{
+	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
+	struct xe_ggtt ggtt = { .tile = tile };
+	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
+	u64 usable = min_t(u64, SZ_1G, accessible);
+
+	ggtt.hw_size = usable;
+	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, 0);
+
+	KUNIT_EXPECT_EQ(test, ggtt.start, GGTT_TEST_START);
+	KUNIT_EXPECT_EQ(test, ggtt.size, usable);
+	KUNIT_EXPECT_EQ(test, ggtt.hw_size, usable);
+
+	drm_mm_takedown(&ggtt.mm);
+}
+
+static void alloc_usable_pool_high(struct kunit *test)
+{
+	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
+	struct xe_ggtt ggtt = { .tile = tile };
+	struct xe_ggtt_node *usable_node;
+	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
+	u64 usable = (accessible * 3) / 4;
+
+	mutex_init(&ggtt.lock);
+	ggtt.hw_size = usable;
+	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, 0);
+
+	usable_node = xe_ggtt_insert_node(&ggtt, XE_PAGE_SIZE, XE_PAGE_SIZE);
+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, usable_node);
+	KUNIT_EXPECT_EQ(test, xe_ggtt_node_addr(usable_node),
+			GGTT_TEST_START + usable - XE_PAGE_SIZE);
+
+	ggtt_node_remove(usable_node);
+	drm_mm_takedown(&ggtt.mm);
+}
+
+static void alloc_usable_pool_oversized(struct kunit *test)
+{
+	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
+	struct xe_ggtt ggtt = { .tile = tile };
+	struct xe_ggtt_node *node;
+	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
+	u64 usable = (accessible * 3) / 4;
+
+	KUNIT_ASSERT_LE(test, usable + XE_PAGE_SIZE, (u64)U32_MAX);
+
+	mutex_init(&ggtt.lock);
+	ggtt.hw_size = usable;
+	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, 0);
+
+	node = xe_ggtt_insert_node(&ggtt, usable + XE_PAGE_SIZE, XE_PAGE_SIZE);
+	KUNIT_ASSERT_TRUE(test, IS_ERR(node));
+	KUNIT_EXPECT_EQ(test, PTR_ERR(node), -ENOSPC);
+
+	drm_mm_takedown(&ggtt.mm);
+}
+
+#if IS_ENABLED(CONFIG_PCI_IOV)
+static void init_shared_pf(struct kunit *test)
+{
+	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
+	struct xe_ggtt ggtt = { .tile = tile };
+	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
+
+	ggtt.hw_size = accessible;
+	ggtt_init_ranges(&ggtt, GGTT_TEST_START, accessible, accessible);
+
+	KUNIT_EXPECT_EQ(test, ggtt.size, accessible);
+	KUNIT_EXPECT_EQ(test, ggtt.shareable.start, 0);
+	KUNIT_EXPECT_EQ(test, ggtt.shareable.size, accessible);
+	KUNIT_EXPECT_EQ(test, ggtt.hw_size, accessible);
+
+	drm_mm_takedown(&ggtt.mm);
+}
+
+static void init_partial_overlap(struct kunit *test)
+{
+	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
+	struct xe_ggtt ggtt = { .tile = tile };
+	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
+	u64 usable = (accessible * 3) / 4;
+	u64 shareable = accessible / 2;
+
+	KUNIT_ASSERT_GT(test, accessible, 0ULL);
+	KUNIT_ASSERT_GT(test, usable, shareable);
+
+	ggtt.hw_size = accessible;
+	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, shareable);
+
+	KUNIT_EXPECT_EQ(test, ggtt.size, usable);
+	KUNIT_EXPECT_EQ(test, ggtt.shareable.start, accessible - shareable);
+	KUNIT_EXPECT_EQ(test, ggtt.shareable.size, shareable);
+	KUNIT_EXPECT_LT(test, ggtt.shareable.start, usable);
+	KUNIT_EXPECT_EQ(test, ggtt.hw_size, accessible);
+
+	drm_mm_takedown(&ggtt.mm);
+}
+
+static void alloc_usable_pool_low(struct kunit *test)
+{
+	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
+	struct xe_ggtt ggtt = { .tile = tile };
+	struct xe_ggtt_node *usable_node;
+	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
+	u64 usable = (accessible * 3) / 4;
+	u64 shareable = accessible / 2;
+
+	mutex_init(&ggtt.lock);
+	ggtt.hw_size = accessible;
+	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, shareable);
+
+	usable_node = xe_ggtt_insert_node(&ggtt, XE_PAGE_SIZE, XE_PAGE_SIZE);
+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, usable_node);
+	KUNIT_EXPECT_EQ(test, xe_ggtt_node_addr(usable_node), GGTT_TEST_START);
+	KUNIT_EXPECT_EQ(test, xe_ggtt_node_size(usable_node), (u64)XE_PAGE_SIZE);
+
+	ggtt_node_remove(usable_node);
+	drm_mm_takedown(&ggtt.mm);
+}
+
+static void alloc_shareable_pool_high(struct kunit *test)
+{
+	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
+	struct xe_ggtt ggtt = { .tile = tile };
+	struct xe_ggtt_node *shareable_node;
+	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
+	u64 usable = (accessible * 3) / 4;
+	u64 shareable = accessible / 2;
+
+	mutex_init(&ggtt.lock);
+	ggtt.hw_size = accessible;
+	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, shareable);
+
+	shareable_node = xe_ggtt_insert_node_shareable(&ggtt,
+						       XE_PAGE_SIZE,
+						       XE_PAGE_SIZE);
+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, shareable_node);
+	KUNIT_EXPECT_EQ(test, xe_ggtt_node_addr(shareable_node),
+			GGTT_TEST_START + accessible - XE_PAGE_SIZE);
+	KUNIT_EXPECT_EQ(test, xe_ggtt_node_size(shareable_node),
+			(u64)XE_PAGE_SIZE);
+
+	ggtt_node_remove(shareable_node);
+	drm_mm_takedown(&ggtt.mm);
+}
+
+static void alloc_partial_overlap(struct kunit *test)
+{
+	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
+	struct xe_ggtt ggtt = { .tile = tile };
+	struct xe_ggtt_node *usable_node, *shareable_node;
+	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
+	u64 usable = (accessible * 3) / 4;
+	u64 shareable = accessible / 2;
+
+	mutex_init(&ggtt.lock);
+	ggtt.hw_size = accessible;
+	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, shareable);
+
+	usable_node = xe_ggtt_insert_node(&ggtt, XE_PAGE_SIZE, XE_PAGE_SIZE);
+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, usable_node);
+	shareable_node = xe_ggtt_insert_node_shareable(&ggtt,
+						       XE_PAGE_SIZE,
+						       XE_PAGE_SIZE);
+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, shareable_node);
+
+	KUNIT_EXPECT_EQ(test, xe_ggtt_node_addr(usable_node), GGTT_TEST_START);
+	KUNIT_EXPECT_EQ(test, xe_ggtt_node_addr(shareable_node),
+			GGTT_TEST_START + accessible - XE_PAGE_SIZE);
+
+	ggtt_node_remove(shareable_node);
+	ggtt_node_remove(usable_node);
+	drm_mm_takedown(&ggtt.mm);
+}
+
+static void alloc_partial_overlap_usable_full(struct kunit *test)
+{
+	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
+	struct xe_ggtt ggtt = { .tile = tile };
+	struct xe_ggtt_node *usable_node, *shareable_node;
+	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
+	u64 usable = (accessible * 3) / 4;
+	u64 shareable = accessible / 2;
+
+	KUNIT_ASSERT_LE(test, usable, (u64)U32_MAX);
+	KUNIT_ASSERT_LE(test, shareable, (u64)U32_MAX);
+
+	mutex_init(&ggtt.lock);
+	ggtt.hw_size = accessible;
+	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, shareable);
+
+	usable_node = xe_ggtt_insert_node(&ggtt, usable, XE_PAGE_SIZE);
+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, usable_node);
+	shareable_node = xe_ggtt_insert_node_shareable(&ggtt,
+						       shareable,
+						       XE_PAGE_SIZE);
+	KUNIT_ASSERT_TRUE(test, IS_ERR(shareable_node));
+	KUNIT_EXPECT_EQ(test, PTR_ERR(shareable_node), -ENOSPC);
+
+	ggtt_node_remove(usable_node);
+	drm_mm_takedown(&ggtt.mm);
+}
+
+static void alloc_partial_overlap_shareable_full(struct kunit *test)
+{
+	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
+	struct xe_ggtt ggtt = { .tile = tile };
+	struct xe_ggtt_node *usable_node, *shareable_node;
+	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
+	u64 usable = (accessible * 3) / 4;
+	u64 shareable = accessible / 2;
+
+	KUNIT_ASSERT_LE(test, usable, (u64)U32_MAX);
+	KUNIT_ASSERT_LE(test, shareable, (u64)U32_MAX);
+
+	mutex_init(&ggtt.lock);
+	ggtt.hw_size = accessible;
+	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, shareable);
+
+	shareable_node = xe_ggtt_insert_node_shareable(&ggtt,
+						       shareable,
+						       XE_PAGE_SIZE);
+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, shareable_node);
+	usable_node = xe_ggtt_insert_node(&ggtt, usable, XE_PAGE_SIZE);
+	KUNIT_ASSERT_TRUE(test, IS_ERR(usable_node));
+	KUNIT_EXPECT_EQ(test, PTR_ERR(usable_node), -ENOSPC);
+
+	ggtt_node_remove(shareable_node);
+	drm_mm_takedown(&ggtt.mm);
+}
+
+static void alloc_shareable_pool_unavailable(struct kunit *test)
+{
+	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
+	struct xe_ggtt ggtt = { .tile = tile };
+	struct xe_ggtt_node *node;
+	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
+	u64 usable = (accessible * 3) / 4;
+
+	mutex_init(&ggtt.lock);
+	ggtt.hw_size = usable;
+	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, 0);
+
+	node = xe_ggtt_insert_node_shareable(&ggtt, XE_PAGE_SIZE, XE_PAGE_SIZE);
+	KUNIT_ASSERT_TRUE(test, IS_ERR(node));
+	KUNIT_EXPECT_EQ(test, PTR_ERR(node), -ENOSPC);
+
+	drm_mm_takedown(&ggtt.mm);
+}
+
+static void alloc_shareable_pool_oversized(struct kunit *test)
+{
+	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
+	struct xe_ggtt ggtt = { .tile = tile };
+	struct xe_ggtt_node *node;
+	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
+	u64 usable = (accessible * 3) / 4;
+	u64 shareable = accessible / 2;
+
+	KUNIT_ASSERT_LE(test, shareable + XE_PAGE_SIZE, (u64)U32_MAX);
+
+	mutex_init(&ggtt.lock);
+	ggtt.hw_size = accessible;
+	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, shareable);
+
+	node = xe_ggtt_insert_node_shareable(&ggtt,
+					     shareable + XE_PAGE_SIZE,
+					     XE_PAGE_SIZE);
+	KUNIT_ASSERT_TRUE(test, IS_ERR(node));
+	KUNIT_EXPECT_EQ(test, PTR_ERR(node), -ENOSPC);
+
+	drm_mm_takedown(&ggtt.mm);
+}
+#else
+#define GGTT_PCI_IOV_TEST_SKIP(_name) \
+	static void _name(struct kunit *test) \
+	{ \
+		kunit_skip(test, "requires CONFIG_PCI_IOV"); \
+	}
+
+GGTT_PCI_IOV_TEST_SKIP(init_shared_pf)
+GGTT_PCI_IOV_TEST_SKIP(init_partial_overlap)
+GGTT_PCI_IOV_TEST_SKIP(alloc_usable_pool_low)
+GGTT_PCI_IOV_TEST_SKIP(alloc_shareable_pool_high)
+GGTT_PCI_IOV_TEST_SKIP(alloc_partial_overlap)
+GGTT_PCI_IOV_TEST_SKIP(alloc_partial_overlap_usable_full)
+GGTT_PCI_IOV_TEST_SKIP(alloc_partial_overlap_shareable_full)
+GGTT_PCI_IOV_TEST_SKIP(alloc_shareable_pool_unavailable)
+GGTT_PCI_IOV_TEST_SKIP(alloc_shareable_pool_oversized)
+
+#undef GGTT_PCI_IOV_TEST_SKIP
+#endif /* CONFIG_PCI_IOV */
+
+static struct kunit_case ggtt_test_cases[] = {
+	KUNIT_CASE(init_native),
+	KUNIT_CASE(alloc_usable_pool_high),
+	KUNIT_CASE(alloc_usable_pool_oversized),
+	KUNIT_CASE(init_shared_pf),
+	KUNIT_CASE(init_partial_overlap),
+	KUNIT_CASE(alloc_usable_pool_low),
+	KUNIT_CASE(alloc_shareable_pool_high),
+	KUNIT_CASE(alloc_partial_overlap),
+	KUNIT_CASE(alloc_partial_overlap_usable_full),
+	KUNIT_CASE(alloc_partial_overlap_shareable_full),
+	KUNIT_CASE(alloc_shareable_pool_unavailable),
+	KUNIT_CASE(alloc_shareable_pool_oversized),
+	{}
+};
+
+static struct kunit_suite ggtt_suite = {
+	.name = "xe_ggtt",
+	.test_cases = ggtt_test_cases,
+	.init = ggtt_test_init,
+};
+
+kunit_test_suites(&ggtt_suite);
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index 7fcd686f9729..19f9c564030b 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -1397,3 +1397,7 @@ u64 xe_ggtt_node_size(const struct xe_ggtt_node *node)
 {
 	return node->base.size;
 }
+
+#if IS_BUILTIN(CONFIG_DRM_XE_KUNIT_TEST)
+#include "tests/xe_ggtt_test.c"
+#endif
-- 
2.34.1

Re: [PATCH v4 3/3] drm/xe/ggtt: Add KUnit tests for usable and shareable pools

[Michal Wajdeczko]

On 9/1/2026 6:44 PM, Piórkowski, Piotr wrote:
> From: Piotr Piórkowski <piotr.piorkowski@intel.com>
> 
> Add GGTT KUnit tests focused on the newly introduced usable and
> shareable pools.
> 
> Cover range initialization for native and PF modes, including partially
> overlapping pools. Exercise allocation direction and conflicts between
> the pools, as well as the unavailable shareable pool and requests
> exceeding pool capacity.
> 
> v2:
>  - Init ggtt.lock with mutex_init() in each test.

nit: keep change log under ---

> 
> Assisted-by: Claude:claude-5-sonnet
> Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Maarten Lankhorst <dev@lankhorst.se>
> ---
>  drivers/gpu/drm/xe/tests/xe_ggtt_test.c | 336 ++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_ggtt.c            |   4 +
>  2 files changed, 340 insertions(+)
>  create mode 100644 drivers/gpu/drm/xe/tests/xe_ggtt_test.c
> 
> diff --git a/drivers/gpu/drm/xe/tests/xe_ggtt_test.c b/drivers/gpu/drm/xe/tests/xe_ggtt_test.c
> new file mode 100644
> index 000000000000..7d28b97f8afe
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/tests/xe_ggtt_test.c

for pure kunit tests we should use _kunit.c suffix instead

[1] https://elixir.bootlin.com/linux/v7.2.2/source/Documentation/dev-tools/kunit/style.rst#L188

> @@ -0,0 +1,336 @@
> +// SPDX-License-Identifier: GPL-2.0 AND MIT
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#include <kunit/test.h>
> +
> +#include "xe_device.h"
> +#include "xe_kunit_helpers.h"
> +
> +#define GGTT_TEST_START		SZ_1M
> +
> +static int ggtt_test_init(struct kunit *test)
> +{
> +	xe_kunit_helper_xe_device_test_init(test);
> +	return 0;
> +}

nit: if you are not planning to add custom initialization steps,
just plugin the xe_kunit_helper_xe_device_test_init() directly

> +
> +static void init_native(struct kunit *test)
> +{
> +	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
> +	struct xe_ggtt ggtt = { .tile = tile };
> +	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
> +	u64 usable = min_t(u64, SZ_1G, accessible);
> +
> +	ggtt.hw_size = usable;
> +	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, 0);
> +
> +	KUNIT_EXPECT_EQ(test, ggtt.start, GGTT_TEST_START);
> +	KUNIT_EXPECT_EQ(test, ggtt.size, usable);
> +	KUNIT_EXPECT_EQ(test, ggtt.hw_size, usable);
> +
> +	drm_mm_takedown(&ggtt.mm);

but maybe this should be done in a cleanup action registered
in the custom ggtt_test_init() ?

> +}
> +
> +static void alloc_usable_pool_high(struct kunit *test)
> +{
> +	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
> +	struct xe_ggtt ggtt = { .tile = tile };
> +	struct xe_ggtt_node *usable_node;
> +	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
> +	u64 usable = (accessible * 3) / 4;
> +
> +	mutex_init(&ggtt.lock);

this too

> +	ggtt.hw_size = usable;
> +	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, 0);
> +
> +	usable_node = xe_ggtt_insert_node(&ggtt, XE_PAGE_SIZE, XE_PAGE_SIZE);

did you run kunit with --raw_output flag?

did you see

	xe_tile_WARN_ON_ONCE(mmio->tile, !mmio->tile->xe->mmio.regs);

as likely GGTT would try some TLB invalidation ...

> +	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, usable_node);
> +	KUNIT_EXPECT_EQ(test, xe_ggtt_node_addr(usable_node),
> +			GGTT_TEST_START + usable - XE_PAGE_SIZE);
> +
> +	ggtt_node_remove(usable_node);
> +	drm_mm_takedown(&ggtt.mm);
> +}
> +
> +static void alloc_usable_pool_oversized(struct kunit *test)
> +{
> +	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
> +	struct xe_ggtt ggtt = { .tile = tile };
> +	struct xe_ggtt_node *node;
> +	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
> +	u64 usable = (accessible * 3) / 4;
> +
> +	KUNIT_ASSERT_LE(test, usable + XE_PAGE_SIZE, (u64)U32_MAX);
> +
> +	mutex_init(&ggtt.lock);
> +	ggtt.hw_size = usable;
> +	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, 0);
> +
> +	node = xe_ggtt_insert_node(&ggtt, usable + XE_PAGE_SIZE, XE_PAGE_SIZE);
> +	KUNIT_ASSERT_TRUE(test, IS_ERR(node));
> +	KUNIT_EXPECT_EQ(test, PTR_ERR(node), -ENOSPC);
> +
> +	drm_mm_takedown(&ggtt.mm);
> +}
> +
> +#if IS_ENABLED(CONFIG_PCI_IOV)
> +static void init_shared_pf(struct kunit *test)
> +{
> +	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
> +	struct xe_ggtt ggtt = { .tile = tile };
> +	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
> +
> +	ggtt.hw_size = accessible;
> +	ggtt_init_ranges(&ggtt, GGTT_TEST_START, accessible, accessible);
> +
> +	KUNIT_EXPECT_EQ(test, ggtt.size, accessible);
> +	KUNIT_EXPECT_EQ(test, ggtt.shareable.start, 0);
> +	KUNIT_EXPECT_EQ(test, ggtt.shareable.size, accessible);
> +	KUNIT_EXPECT_EQ(test, ggtt.hw_size, accessible);
> +
> +	drm_mm_takedown(&ggtt.mm);
> +}
> +
> +static void init_partial_overlap(struct kunit *test)
> +{
> +	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
> +	struct xe_ggtt ggtt = { .tile = tile };
> +	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
> +	u64 usable = (accessible * 3) / 4;
> +	u64 shareable = accessible / 2;
> +
> +	KUNIT_ASSERT_GT(test, accessible, 0ULL);
> +	KUNIT_ASSERT_GT(test, usable, shareable);
> +
> +	ggtt.hw_size = accessible;
> +	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, shareable);
> +
> +	KUNIT_EXPECT_EQ(test, ggtt.size, usable);
> +	KUNIT_EXPECT_EQ(test, ggtt.shareable.start, accessible - shareable);
> +	KUNIT_EXPECT_EQ(test, ggtt.shareable.size, shareable);
> +	KUNIT_EXPECT_LT(test, ggtt.shareable.start, usable);
> +	KUNIT_EXPECT_EQ(test, ggtt.hw_size, accessible);
> +
> +	drm_mm_takedown(&ggtt.mm);
> +}
> +
> +static void alloc_usable_pool_low(struct kunit *test)
> +{
> +	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
> +	struct xe_ggtt ggtt = { .tile = tile };
> +	struct xe_ggtt_node *usable_node;
> +	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
> +	u64 usable = (accessible * 3) / 4;
> +	u64 shareable = accessible / 2;
> +
> +	mutex_init(&ggtt.lock);
> +	ggtt.hw_size = accessible;
> +	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, shareable);
> +
> +	usable_node = xe_ggtt_insert_node(&ggtt, XE_PAGE_SIZE, XE_PAGE_SIZE);
> +	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, usable_node);
> +	KUNIT_EXPECT_EQ(test, xe_ggtt_node_addr(usable_node), GGTT_TEST_START);
> +	KUNIT_EXPECT_EQ(test, xe_ggtt_node_size(usable_node), (u64)XE_PAGE_SIZE);
> +
> +	ggtt_node_remove(usable_node);
> +	drm_mm_takedown(&ggtt.mm);
> +}
> +
> +static void alloc_shareable_pool_high(struct kunit *test)
> +{
> +	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
> +	struct xe_ggtt ggtt = { .tile = tile };
> +	struct xe_ggtt_node *shareable_node;
> +	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
> +	u64 usable = (accessible * 3) / 4;
> +	u64 shareable = accessible / 2;
> +
> +	mutex_init(&ggtt.lock);
> +	ggtt.hw_size = accessible;
> +	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, shareable);
> +
> +	shareable_node = xe_ggtt_insert_node_shareable(&ggtt,
> +						       XE_PAGE_SIZE,
> +						       XE_PAGE_SIZE);
> +	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, shareable_node);
> +	KUNIT_EXPECT_EQ(test, xe_ggtt_node_addr(shareable_node),
> +			GGTT_TEST_START + accessible - XE_PAGE_SIZE);
> +	KUNIT_EXPECT_EQ(test, xe_ggtt_node_size(shareable_node),
> +			(u64)XE_PAGE_SIZE);
> +
> +	ggtt_node_remove(shareable_node);
> +	drm_mm_takedown(&ggtt.mm);
> +}
> +
> +static void alloc_partial_overlap(struct kunit *test)
> +{
> +	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
> +	struct xe_ggtt ggtt = { .tile = tile };
> +	struct xe_ggtt_node *usable_node, *shareable_node;
> +	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
> +	u64 usable = (accessible * 3) / 4;
> +	u64 shareable = accessible / 2;
> +
> +	mutex_init(&ggtt.lock);
> +	ggtt.hw_size = accessible;
> +	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, shareable);
> +
> +	usable_node = xe_ggtt_insert_node(&ggtt, XE_PAGE_SIZE, XE_PAGE_SIZE);
> +	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, usable_node);
> +	shareable_node = xe_ggtt_insert_node_shareable(&ggtt,
> +						       XE_PAGE_SIZE,
> +						       XE_PAGE_SIZE);
> +	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, shareable_node);
> +
> +	KUNIT_EXPECT_EQ(test, xe_ggtt_node_addr(usable_node), GGTT_TEST_START);
> +	KUNIT_EXPECT_EQ(test, xe_ggtt_node_addr(shareable_node),
> +			GGTT_TEST_START + accessible - XE_PAGE_SIZE);
> +
> +	ggtt_node_remove(shareable_node);
> +	ggtt_node_remove(usable_node);
> +	drm_mm_takedown(&ggtt.mm);
> +}
> +
> +static void alloc_partial_overlap_usable_full(struct kunit *test)
> +{
> +	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
> +	struct xe_ggtt ggtt = { .tile = tile };
> +	struct xe_ggtt_node *usable_node, *shareable_node;
> +	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
> +	u64 usable = (accessible * 3) / 4;
> +	u64 shareable = accessible / 2;
> +
> +	KUNIT_ASSERT_LE(test, usable, (u64)U32_MAX);
> +	KUNIT_ASSERT_LE(test, shareable, (u64)U32_MAX);
> +
> +	mutex_init(&ggtt.lock);
> +	ggtt.hw_size = accessible;
> +	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, shareable);
> +
> +	usable_node = xe_ggtt_insert_node(&ggtt, usable, XE_PAGE_SIZE);
> +	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, usable_node);
> +	shareable_node = xe_ggtt_insert_node_shareable(&ggtt,
> +						       shareable,
> +						       XE_PAGE_SIZE);
> +	KUNIT_ASSERT_TRUE(test, IS_ERR(shareable_node));
> +	KUNIT_EXPECT_EQ(test, PTR_ERR(shareable_node), -ENOSPC);
> +
> +	ggtt_node_remove(usable_node);
> +	drm_mm_takedown(&ggtt.mm);
> +}
> +
> +static void alloc_partial_overlap_shareable_full(struct kunit *test)
> +{
> +	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
> +	struct xe_ggtt ggtt = { .tile = tile };
> +	struct xe_ggtt_node *usable_node, *shareable_node;
> +	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
> +	u64 usable = (accessible * 3) / 4;
> +	u64 shareable = accessible / 2;
> +
> +	KUNIT_ASSERT_LE(test, usable, (u64)U32_MAX);
> +	KUNIT_ASSERT_LE(test, shareable, (u64)U32_MAX);
> +
> +	mutex_init(&ggtt.lock);
> +	ggtt.hw_size = accessible;
> +	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, shareable);
> +
> +	shareable_node = xe_ggtt_insert_node_shareable(&ggtt,
> +						       shareable,
> +						       XE_PAGE_SIZE);
> +	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, shareable_node);
> +	usable_node = xe_ggtt_insert_node(&ggtt, usable, XE_PAGE_SIZE);
> +	KUNIT_ASSERT_TRUE(test, IS_ERR(usable_node));
> +	KUNIT_EXPECT_EQ(test, PTR_ERR(usable_node), -ENOSPC);
> +
> +	ggtt_node_remove(shareable_node);
> +	drm_mm_takedown(&ggtt.mm);
> +}
> +
> +static void alloc_shareable_pool_unavailable(struct kunit *test)
> +{
> +	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
> +	struct xe_ggtt ggtt = { .tile = tile };
> +	struct xe_ggtt_node *node;
> +	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
> +	u64 usable = (accessible * 3) / 4;
> +
> +	mutex_init(&ggtt.lock);
> +	ggtt.hw_size = usable;
> +	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, 0);
> +
> +	node = xe_ggtt_insert_node_shareable(&ggtt, XE_PAGE_SIZE, XE_PAGE_SIZE);
> +	KUNIT_ASSERT_TRUE(test, IS_ERR(node));
> +	KUNIT_EXPECT_EQ(test, PTR_ERR(node), -ENOSPC);
> +
> +	drm_mm_takedown(&ggtt.mm);
> +}
> +
> +static void alloc_shareable_pool_oversized(struct kunit *test)
> +{
> +	struct xe_tile *tile = xe_device_get_root_tile(test->priv);
> +	struct xe_ggtt ggtt = { .tile = tile };
> +	struct xe_ggtt_node *node;
> +	u64 accessible = GUC_GGTT_TOP - xe_wopcm_size(tile_to_xe(tile));
> +	u64 usable = (accessible * 3) / 4;
> +	u64 shareable = accessible / 2;
> +
> +	KUNIT_ASSERT_LE(test, shareable + XE_PAGE_SIZE, (u64)U32_MAX);
> +
> +	mutex_init(&ggtt.lock);
> +	ggtt.hw_size = accessible;
> +	ggtt_init_ranges(&ggtt, GGTT_TEST_START, usable, shareable);
> +
> +	node = xe_ggtt_insert_node_shareable(&ggtt,
> +					     shareable + XE_PAGE_SIZE,
> +					     XE_PAGE_SIZE);
> +	KUNIT_ASSERT_TRUE(test, IS_ERR(node));
> +	KUNIT_EXPECT_EQ(test, PTR_ERR(node), -ENOSPC);
> +
> +	drm_mm_takedown(&ggtt.mm);
> +}
> +#else
> +#define GGTT_PCI_IOV_TEST_SKIP(_name) \
> +	static void _name(struct kunit *test) \
> +	{ \
> +		kunit_skip(test, "requires CONFIG_PCI_IOV"); \
> +	}
> +
> +GGTT_PCI_IOV_TEST_SKIP(init_shared_pf)
> +GGTT_PCI_IOV_TEST_SKIP(init_partial_overlap)
> +GGTT_PCI_IOV_TEST_SKIP(alloc_usable_pool_low)
> +GGTT_PCI_IOV_TEST_SKIP(alloc_shareable_pool_high)
> +GGTT_PCI_IOV_TEST_SKIP(alloc_partial_overlap)
> +GGTT_PCI_IOV_TEST_SKIP(alloc_partial_overlap_usable_full)
> +GGTT_PCI_IOV_TEST_SKIP(alloc_partial_overlap_shareable_full)
> +GGTT_PCI_IOV_TEST_SKIP(alloc_shareable_pool_unavailable)
> +GGTT_PCI_IOV_TEST_SKIP(alloc_shareable_pool_oversized)
> +
> +#undef GGTT_PCI_IOV_TEST_SKIP
> +#endif /* CONFIG_PCI_IOV */

instead of defining test stubs, just add separate suite

 +static struct kunit_suite ggtt_iov_suite = {
 +	.name = "xe_ggtt_iov",
 +	.test_cases = ggtt_iov_test_cases,
 +	.init = ggtt_test_init,

under the same if ENABLED(CONFIG_PCI_IOV)

> +
> +static struct kunit_case ggtt_test_cases[] = {
> +	KUNIT_CASE(init_native),
> +	KUNIT_CASE(alloc_usable_pool_high),
> +	KUNIT_CASE(alloc_usable_pool_oversized),
> +	KUNIT_CASE(init_shared_pf),> +	KUNIT_CASE(init_partial_overlap),
> +	KUNIT_CASE(alloc_usable_pool_low),
> +	KUNIT_CASE(alloc_shareable_pool_high),
> +	KUNIT_CASE(alloc_partial_overlap),
> +	KUNIT_CASE(alloc_partial_overlap_usable_full),
> +	KUNIT_CASE(alloc_partial_overlap_shareable_full),
> +	KUNIT_CASE(alloc_shareable_pool_unavailable),
> +	KUNIT_CASE(alloc_shareable_pool_oversized),
> +	{}
> +};
> +
> +static struct kunit_suite ggtt_suite = {
> +	.name = "xe_ggtt",
> +	.test_cases = ggtt_test_cases,
> +	.init = ggtt_test_init,
> +};
> +
> +kunit_test_suites(&ggtt_suite);
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> index 7fcd686f9729..19f9c564030b 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.c
> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> @@ -1397,3 +1397,7 @@ u64 xe_ggtt_node_size(const struct xe_ggtt_node *node)
>  {
>  	return node->base.size;
>  }
> +
> +#if IS_BUILTIN(CONFIG_DRM_XE_KUNIT_TEST)
> +#include "tests/xe_ggtt_test.c"
> +#endif

✗ CI.checkpatch: warning for Separate GGTT pools for submissions and VFs provisioning (rev4)

[Patchwork]

== Series Details ==

Series: Separate GGTT pools for submissions and VFs provisioning (rev4)
URL   : https://patchwork.freedesktop.org/series/171735/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 9e7a886d99e4537763c2d3675c3cbfda0f699eee
Author: Piotr Piórkowski <piotr.piorkowski@intel.com>
Date:   Tue Sep 1 18:44:35 2026 +0200

    drm/xe/ggtt: Add KUnit tests for usable and shareable pools
    
    Add GGTT KUnit tests focused on the newly introduced usable and
    shareable pools.
    
    Cover range initialization for native and PF modes, including partially
    overlapping pools. Exercise allocation direction and conflicts between
    the pools, as well as the unavailable shareable pool and requests
    exceeding pool capacity.
    
    v2:
     - Init ggtt.lock with mutex_init() in each test.
    
    Assisted-by: Claude:claude-5-sonnet
    Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
    Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
    Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Cc: Maarten Lankhorst <dev@lankhorst.se>
+ /mt/dim checkpatch b8f17b16c0f8638b9df4f090511e3ae97210eb77 drm-intel
a160716c9cc9 drm/xe/ggtt: Split GGTT into usable and shareable pools
86d155ee0b26 drm/xe/ggtt: Initialize GGTT pools by SR-IOV mode
9e7a886d99e4 drm/xe/ggtt: Add KUnit tests for usable and shareable pools
-:27: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#27: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 343 lines checked

✓ CI.KUnit: success for Separate GGTT pools for submissions and VFs provisioning (rev4)

[Patchwork]

== Series Details ==

Series: Separate GGTT pools for submissions and VFs provisioning (rev4)
URL   : https://patchwork.freedesktop.org/series/171735/
State : success

== Summary ==

+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[16:51:53] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:51:58] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:52:18] Starting KUnit Kernel (1/1)...
[16:52:18] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:52:18] ============= refcount_interrupt (4 subtests) ==============
[16:52:18] [PASSED] test_single_irq_change
[16:52:18] [PASSED] test_nested_irq_change
[16:52:18] [PASSED] test_multiple_irq_change
[16:52:18] [PASSED] test_irq_save
[16:52:18] =============== [PASSED] refcount_interrupt ================
[16:52:18] ================= gpu_buddy (14 subtests) ==================
[16:52:18] [PASSED] gpu_test_buddy_alloc_limit
[16:52:18] [PASSED] gpu_test_buddy_alloc_optimistic
[16:52:18] [PASSED] gpu_test_buddy_alloc_pessimistic
[16:52:18] [PASSED] gpu_test_buddy_alloc_pathological
[16:52:18] [PASSED] gpu_test_buddy_alloc_contiguous
[16:52:18] [PASSED] gpu_test_buddy_alloc_clear
[16:52:18] [PASSED] gpu_test_buddy_alloc_range
[16:52:18] [PASSED] gpu_test_buddy_alloc_range_bias
[16:52:19] [PASSED] gpu_test_buddy_fragmentation_performance
[16:52:20] [PASSED] gpu_test_buddy_dirty_tracker_performance
[16:52:20] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[16:52:20] [PASSED] gpu_test_buddy_offset_aligned_allocation
[16:52:20] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[16:52:20] [PASSED] gpu_test_buddy_addr_to_block
[16:52:20] ==================== [PASSED] gpu_buddy ====================
[16:52:20] ============================================================
[16:52:20] Testing complete. Ran 18 tests: passed: 18
[16:52:20] Elapsed time: 26.491s total, 4.261s configuring, 20.312s building, 1.858s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[16:52:20] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:52:22] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:52:55] Starting KUnit Kernel (1/1)...
[16:52:55] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:52:56] ============= refcount_interrupt (4 subtests) ==============
[16:52:56] [PASSED] test_single_irq_change
[16:52:56] [PASSED] test_nested_irq_change
[16:52:56] [PASSED] test_multiple_irq_change
[16:52:56] [PASSED] test_irq_save
[16:52:56] =============== [PASSED] refcount_interrupt ================
[16:52:56] ================== xe_ggtt (12 subtests) ===================
[16:52:56] [PASSED] init_native
[16:52:56] [PASSED] alloc_usable_pool_high
[16:52:56] [PASSED] alloc_usable_pool_oversized
[16:52:56] [PASSED] init_shared_pf
[16:52:56] [PASSED] init_partial_overlap
[16:52:56] [PASSED] alloc_usable_pool_low
[16:52:56] [PASSED] alloc_shareable_pool_high
[16:52:56] [PASSED] alloc_partial_overlap
[16:52:56] [PASSED] alloc_partial_overlap_usable_full
[16:52:56] [PASSED] alloc_partial_overlap_shareable_full
[16:52:56] [PASSED] alloc_shareable_pool_unavailable
[16:52:56] [PASSED] alloc_shareable_pool_oversized
[16:52:56] ===================== [PASSED] xe_ggtt =====================
[16:52:56] ================== guc_buf (11 subtests) ===================
[16:52:56] [PASSED] test_smallest
[16:52:56] [PASSED] test_largest
[16:52:56] [PASSED] test_granular
[16:52:56] [PASSED] test_unique
[16:52:56] [PASSED] test_overlap
[16:52:56] [PASSED] test_reusable
[16:52:56] [PASSED] test_too_big
[16:52:56] [PASSED] test_flush
[16:52:56] [PASSED] test_lookup
[16:52:56] [PASSED] test_data
[16:52:56] [PASSED] test_class
[16:52:56] ===================== [PASSED] guc_buf =====================
[16:52:56] =================== guc_dbm (7 subtests) ===================
[16:52:56] [PASSED] test_empty
[16:52:56] [PASSED] test_default
[16:52:56] ======================== test_size  ========================
[16:52:56] [PASSED] 4
[16:52:56] [PASSED] 8
[16:52:56] [PASSED] 32
[16:52:56] [PASSED] 256
[16:52:56] ==================== [PASSED] test_size ====================
[16:52:56] ======================= test_reuse  ========================
[16:52:56] [PASSED] 4
[16:52:56] [PASSED] 8
[16:52:56] [PASSED] 32
[16:52:56] [PASSED] 256
[16:52:56] =================== [PASSED] test_reuse ====================
[16:52:56] =================== test_range_overlap  ====================
[16:52:56] [PASSED] 4
[16:52:56] [PASSED] 8
[16:52:56] [PASSED] 32
[16:52:56] [PASSED] 256
[16:52:56] =============== [PASSED] test_range_overlap ================
[16:52:56] =================== test_range_compact  ====================
[16:52:56] [PASSED] 4
[16:52:56] [PASSED] 8
[16:52:56] [PASSED] 32
[16:52:56] [PASSED] 256
[16:52:56] =============== [PASSED] test_range_compact ================
[16:52:56] ==================== test_range_spare  =====================
[16:52:56] [PASSED] 4
[16:52:56] [PASSED] 8
[16:52:56] [PASSED] 32
[16:52:56] [PASSED] 256
[16:52:56] ================ [PASSED] test_range_spare =================
[16:52:56] ===================== [PASSED] guc_dbm =====================
[16:52:56] =================== guc_idm (6 subtests) ===================
[16:52:56] [PASSED] bad_init
[16:52:56] [PASSED] no_init
[16:52:56] [PASSED] init_fini
[16:52:56] [PASSED] check_used
[16:52:56] [PASSED] check_quota
[16:52:56] [PASSED] check_all
[16:52:56] ===================== [PASSED] guc_idm =====================
[16:52:56] =============== guc_klv_helpers (9 subtests) ===============
[16:52:56] [PASSED] test_count
[16:52:56] [PASSED] test_encode_u32
[16:52:56] [PASSED] test_encode_u64
[16:52:56] [PASSED] test_encode_string
[16:52:56] [PASSED] test_encode_object_raw
[16:52:56] [PASSED] test_encode_object_klv
[16:52:56] [PASSED] test_encode_object_nested
[16:52:56] [PASSED] test_encode_object_basic
[16:52:56] [PASSED] test_print
[16:52:56] ================= [PASSED] guc_klv_helpers =================
[16:52:56] =================== xe_log (4 subtests) ====================
[16:52:56] [PASSED] demo_cper
[16:52:56] [PASSED] demo_dmesg
[16:52:56] ======================= test_dmesg  ========================
[16:52:56] [PASSED] test_fatal
[16:52:56] [PASSED] test_fatal_tile
[16:52:56] [PASSED] test_fatal_gt
[16:52:56] [PASSED] test_fatal_comp
[16:52:56] [PASSED] test_fatal_comp_tile
[16:52:56] [PASSED] test_fatal_comp_gt
[16:52:56] [PASSED] test_fatal_all
[16:52:56] [PASSED] test_recoverable
[16:52:56] [PASSED] test_recoverable_tile
[16:52:56] [PASSED] test_recoverable_gt
[16:52:56] [PASSED] test_recoverable_comp
[16:52:56] [PASSED] test_recoverable_comp_tile
[16:52:56] [PASSED] test_recoverable_comp_gt
[16:52:56] [PASSED] test_recoverable_all
[16:52:56] [PASSED] test_info
[16:52:56] [PASSED] test_info_tile
[16:52:56] [PASSED] test_info_gt
[16:52:56] [PASSED] test_info_err
[16:52:56] [PASSED] test_info_comp
[16:52:56] [PASSED] test_info_comp_tile
[16:52:56] [PASSED] test_info_comp_gt
[16:52:56] [PASSED] test_info_all
[16:52:56] [PASSED] test_hw_fatal
[16:52:56] [PASSED] test_hw_recoverable
[16:52:56] [PASSED] test_hw_corrected
[16:52:56] [PASSED] test_hw_informational
[16:52:56] =================== [PASSED] test_dmesg ====================
[16:52:56] ====================== test_invalid  =======================
[16:52:56] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[16:52:56] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[16:52:56] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[16:52:56] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[16:52:56] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[16:52:56] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[16:52:56] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[16:52:56] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[16:52:56] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[16:52:56] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[16:52:56] ================== [SKIPPED] test_invalid ==================
[16:52:56] ===================== [PASSED] xe_log ======================
[16:52:56] ================== no_relay (3 subtests) ===================
[16:52:56] [PASSED] xe_drops_guc2pf_if_not_ready
[16:52:56] [PASSED] xe_drops_guc2vf_if_not_ready
[16:52:56] [PASSED] xe_rejects_send_if_not_ready
[16:52:56] ==================== [PASSED] no_relay =====================
[16:52:56] ================== pf_relay (14 subtests) ==================
[16:52:56] [PASSED] pf_rejects_guc2pf_too_short
[16:52:56] [PASSED] pf_rejects_guc2pf_too_long
[16:52:56] [PASSED] pf_rejects_guc2pf_no_payload
[16:52:56] [PASSED] pf_fails_no_payload
[16:52:56] [PASSED] pf_fails_bad_origin
[16:52:56] [PASSED] pf_fails_bad_type
[16:52:56] [PASSED] pf_txn_reports_error
[16:52:56] [PASSED] pf_txn_sends_pf2guc
[16:52:56] [PASSED] pf_sends_pf2guc
[16:52:56] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[16:52:56] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[16:52:56] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[16:52:56] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[16:52:56] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[16:52:56] ==================== [PASSED] pf_relay =====================
[16:52:56] ================== vf_relay (3 subtests) ===================
[16:52:56] [PASSED] vf_rejects_guc2vf_too_short
[16:52:56] [PASSED] vf_rejects_guc2vf_too_long
[16:52:56] [PASSED] vf_rejects_guc2vf_no_payload
[16:52:56] ==================== [PASSED] vf_relay =====================
[16:52:56] ================ pf_gt_config (9 subtests) =================
[16:52:56] [PASSED] fair_contexts_1vf
[16:52:56] [PASSED] fair_doorbells_1vf
[16:52:56] [PASSED] fair_ggtt_1vf
[16:52:56] ====================== fair_vram_1vf  ======================
[16:52:56] [PASSED] 3.50 GiB
[16:52:56] [PASSED] 11.5 GiB
[16:52:56] [PASSED] 15.5 GiB
[16:52:56] [PASSED] 31.5 GiB
[16:52:56] [PASSED] 63.5 GiB
[16:52:56] [PASSED] 1.91 GiB
[16:52:56] ================== [PASSED] fair_vram_1vf ==================
[16:52:56] ================ fair_vram_1vf_admin_only  =================
[16:52:56] [PASSED] 3.50 GiB
[16:52:56] [PASSED] 11.5 GiB
[16:52:56] [PASSED] 15.5 GiB
[16:52:56] [PASSED] 31.5 GiB
[16:52:56] [PASSED] 63.5 GiB
[16:52:56] [PASSED] 1.91 GiB
[16:52:56] ============ [PASSED] fair_vram_1vf_admin_only =============
[16:52:56] ====================== fair_contexts  ======================
[16:52:56] [PASSED] 1 VF
[16:52:56] [PASSED] 2 VFs
[16:52:56] [PASSED] 3 VFs
[16:52:56] [PASSED] 4 VFs
[16:52:56] [PASSED] 5 VFs
[16:52:56] [PASSED] 6 VFs
[16:52:56] [PASSED] 7 VFs
[16:52:56] [PASSED] 8 VFs
[16:52:56] [PASSED] 9 VFs
[16:52:56] [PASSED] 10 VFs
[16:52:56] [PASSED] 11 VFs
[16:52:56] [PASSED] 12 VFs
[16:52:56] [PASSED] 13 VFs
[16:52:56] [PASSED] 14 VFs
[16:52:56] [PASSED] 15 VFs
[16:52:56] [PASSED] 16 VFs
[16:52:56] [PASSED] 17 VFs
[16:52:56] [PASSED] 18 VFs
[16:52:56] [PASSED] 19 VFs
[16:52:56] [PASSED] 20 VFs
[16:52:56] [PASSED] 21 VFs
[16:52:56] [PASSED] 22 VFs
[16:52:56] [PASSED] 23 VFs
[16:52:56] [PASSED] 24 VFs
[16:52:56] [PASSED] 25 VFs
[16:52:56] [PASSED] 26 VFs
[16:52:56] [PASSED] 27 VFs
[16:52:56] [PASSED] 28 VFs
[16:52:56] [PASSED] 29 VFs
[16:52:56] [PASSED] 30 VFs
[16:52:56] [PASSED] 31 VFs
[16:52:56] [PASSED] 32 VFs
[16:52:56] [PASSED] 33 VFs
[16:52:56] [PASSED] 34 VFs
[16:52:56] [PASSED] 35 VFs
[16:52:56] [PASSED] 36 VFs
[16:52:56] [PASSED] 37 VFs
[16:52:56] [PASSED] 38 VFs
[16:52:56] [PASSED] 39 VFs
[16:52:56] [PASSED] 40 VFs
[16:52:56] [PASSED] 41 VFs
[16:52:56] [PASSED] 42 VFs
[16:52:56] [PASSED] 43 VFs
[16:52:56] [PASSED] 44 VFs
[16:52:56] [PASSED] 45 VFs
[16:52:56] [PASSED] 46 VFs
[16:52:56] [PASSED] 47 VFs
[16:52:56] [PASSED] 48 VFs
[16:52:56] [PASSED] 49 VFs
[16:52:56] [PASSED] 50 VFs
[16:52:56] [PASSED] 51 VFs
[16:52:56] [PASSED] 52 VFs
[16:52:56] [PASSED] 53 VFs
[16:52:56] [PASSED] 54 VFs
[16:52:56] [PASSED] 55 VFs
[16:52:56] [PASSED] 56 VFs
[16:52:56] [PASSED] 57 VFs
[16:52:56] [PASSED] 58 VFs
[16:52:56] [PASSED] 59 VFs
[16:52:56] [PASSED] 60 VFs
[16:52:56] [PASSED] 61 VFs
[16:52:56] [PASSED] 62 VFs
[16:52:56] [PASSED] 63 VFs
[16:52:56] ================== [PASSED] fair_contexts ==================
[16:52:56] ===================== fair_doorbells  ======================
[16:52:56] [PASSED] 1 VF
[16:52:56] [PASSED] 2 VFs
[16:52:56] [PASSED] 3 VFs
[16:52:56] [PASSED] 4 VFs
[16:52:56] [PASSED] 5 VFs
[16:52:56] [PASSED] 6 VFs
[16:52:56] [PASSED] 7 VFs
[16:52:56] [PASSED] 8 VFs
[16:52:56] [PASSED] 9 VFs
[16:52:56] [PASSED] 10 VFs
[16:52:56] [PASSED] 11 VFs
[16:52:56] [PASSED] 12 VFs
[16:52:56] [PASSED] 13 VFs
[16:52:56] [PASSED] 14 VFs
[16:52:56] [PASSED] 15 VFs
[16:52:56] [PASSED] 16 VFs
[16:52:56] [PASSED] 17 VFs
[16:52:56] [PASSED] 18 VFs
[16:52:56] [PASSED] 19 VFs
[16:52:56] [PASSED] 20 VFs
[16:52:56] [PASSED] 21 VFs
[16:52:56] [PASSED] 22 VFs
[16:52:56] [PASSED] 23 VFs
[16:52:56] [PASSED] 24 VFs
[16:52:56] [PASSED] 25 VFs
[16:52:56] [PASSED] 26 VFs
[16:52:56] [PASSED] 27 VFs
[16:52:56] [PASSED] 28 VFs
[16:52:56] [PASSED] 29 VFs
[16:52:56] [PASSED] 30 VFs
[16:52:56] [PASSED] 31 VFs
[16:52:56] [PASSED] 32 VFs
[16:52:56] [PASSED] 33 VFs
[16:52:56] [PASSED] 34 VFs
[16:52:56] [PASSED] 35 VFs
[16:52:56] [PASSED] 36 VFs
[16:52:56] [PASSED] 37 VFs
[16:52:56] [PASSED] 38 VFs
[16:52:56] [PASSED] 39 VFs
[16:52:56] [PASSED] 40 VFs
[16:52:56] [PASSED] 41 VFs
[16:52:56] [PASSED] 42 VFs
[16:52:56] [PASSED] 43 VFs
[16:52:56] [PASSED] 44 VFs
[16:52:56] [PASSED] 45 VFs
[16:52:56] [PASSED] 46 VFs
[16:52:56] [PASSED] 47 VFs
[16:52:56] [PASSED] 48 VFs
[16:52:56] [PASSED] 49 VFs
[16:52:56] [PASSED] 50 VFs
[16:52:56] [PASSED] 51 VFs
[16:52:56] [PASSED] 52 VFs
[16:52:56] [PASSED] 53 VFs
[16:52:56] [PASSED] 54 VFs
[16:52:56] [PASSED] 55 VFs
[16:52:56] [PASSED] 56 VFs
[16:52:56] [PASSED] 57 VFs
[16:52:56] [PASSED] 58 VFs
[16:52:56] [PASSED] 59 VFs
[16:52:56] [PASSED] 60 VFs
[16:52:56] [PASSED] 61 VFs
[16:52:56] [PASSED] 62 VFs
[16:52:56] [PASSED] 63 VFs
[16:52:56] ================= [PASSED] fair_doorbells ==================
[16:52:56] ======================== fair_ggtt  ========================
[16:52:56] [PASSED] 1 VF
[16:52:56] [PASSED] 2 VFs
[16:52:56] [PASSED] 3 VFs
[16:52:56] [PASSED] 4 VFs
[16:52:56] [PASSED] 5 VFs
[16:52:56] [PASSED] 6 VFs
[16:52:56] [PASSED] 7 VFs
[16:52:56] [PASSED] 8 VFs
[16:52:56] [PASSED] 9 VFs
[16:52:56] [PASSED] 10 VFs
[16:52:56] [PASSED] 11 VFs
[16:52:56] [PASSED] 12 VFs
[16:52:56] [PASSED] 13 VFs
[16:52:56] [PASSED] 14 VFs
[16:52:56] [PASSED] 15 VFs
[16:52:56] [PASSED] 16 VFs
[16:52:56] [PASSED] 17 VFs
[16:52:56] [PASSED] 18 VFs
[16:52:56] [PASSED] 19 VFs
[16:52:56] [PASSED] 20 VFs
[16:52:56] [PASSED] 21 VFs
[16:52:56] [PASSED] 22 VFs
[16:52:56] [PASSED] 23 VFs
[16:52:56] [PASSED] 24 VFs
[16:52:56] [PASSED] 25 VFs
[16:52:56] [PASSED] 26 VFs
[16:52:56] [PASSED] 27 VFs
[16:52:56] [PASSED] 28 VFs
[16:52:56] [PASSED] 29 VFs
[16:52:56] [PASSED] 30 VFs
[16:52:56] [PASSED] 31 VFs
[16:52:56] [PASSED] 32 VFs
[16:52:56] [PASSED] 33 VFs
[16:52:56] [PASSED] 34 VFs
[16:52:56] [PASSED] 35 VFs
[16:52:56] [PASSED] 36 VFs
[16:52:56] [PASSED] 37 VFs
[16:52:56] [PASSED] 38 VFs
[16:52:56] [PASSED] 39 VFs
[16:52:56] [PASSED] 40 VFs
[16:52:56] [PASSED] 41 VFs
[16:52:56] [PASSED] 42 VFs
[16:52:56] [PASSED] 43 VFs
[16:52:56] [PASSED] 44 VFs
[16:52:56] [PASSED] 45 VFs
[16:52:56] [PASSED] 46 VFs
[16:52:56] [PASSED] 47 VFs
[16:52:56] [PASSED] 48 VFs
[16:52:56] [PASSED] 49 VFs
[16:52:56] [PASSED] 50 VFs
[16:52:56] [PASSED] 51 VFs
[16:52:56] [PASSED] 52 VFs
[16:52:56] [PASSED] 53 VFs
[16:52:56] [PASSED] 54 VFs
[16:52:56] [PASSED] 55 VFs
[16:52:56] [PASSED] 56 VFs
[16:52:56] [PASSED] 57 VFs
[16:52:56] [PASSED] 58 VFs
[16:52:56] [PASSED] 59 VFs
[16:52:56] [PASSED] 60 VFs
[16:52:56] [PASSED] 61 VFs
[16:52:56] [PASSED] 62 VFs
[16:52:56] [PASSED] 63 VFs
[16:52:56] ==================== [PASSED] fair_ggtt ====================
[16:52:56] ======================== fair_vram  ========================
[16:52:56] [PASSED] 1 VF
[16:52:56] [PASSED] 2 VFs
[16:52:56] [PASSED] 3 VFs
[16:52:56] [PASSED] 4 VFs
[16:52:56] [PASSED] 5 VFs
[16:52:56] [PASSED] 6 VFs
[16:52:56] [PASSED] 7 VFs
[16:52:56] [PASSED] 8 VFs
[16:52:56] [PASSED] 9 VFs
[16:52:56] [PASSED] 10 VFs
[16:52:56] [PASSED] 11 VFs
[16:52:56] [PASSED] 12 VFs
[16:52:56] [PASSED] 13 VFs
[16:52:56] [PASSED] 14 VFs
[16:52:56] [PASSED] 15 VFs
[16:52:56] [PASSED] 16 VFs
[16:52:56] [PASSED] 17 VFs
[16:52:56] [PASSED] 18 VFs
[16:52:56] [PASSED] 19 VFs
[16:52:56] [PASSED] 20 VFs
[16:52:56] [PASSED] 21 VFs
[16:52:56] [PASSED] 22 VFs
[16:52:56] [PASSED] 23 VFs
[16:52:56] [PASSED] 24 VFs
[16:52:56] [PASSED] 25 VFs
[16:52:56] [PASSED] 26 VFs
[16:52:56] [PASSED] 27 VFs
[16:52:56] [PASSED] 28 VFs
[16:52:56] [PASSED] 29 VFs
[16:52:56] [PASSED] 30 VFs
[16:52:56] [PASSED] 31 VFs
[16:52:56] [PASSED] 32 VFs
[16:52:56] [PASSED] 33 VFs
[16:52:56] [PASSED] 34 VFs
[16:52:56] [PASSED] 35 VFs
[16:52:56] [PASSED] 36 VFs
[16:52:56] [PASSED] 37 VFs
[16:52:56] [PASSED] 38 VFs
[16:52:56] [PASSED] 39 VFs
[16:52:56] [PASSED] 40 VFs
[16:52:56] [PASSED] 41 VFs
[16:52:56] [PASSED] 42 VFs
[16:52:56] [PASSED] 43 VFs
[16:52:56] [PASSED] 44 VFs
[16:52:56] [PASSED] 45 VFs
[16:52:56] [PASSED] 46 VFs
[16:52:56] [PASSED] 47 VFs
[16:52:56] [PASSED] 48 VFs
[16:52:56] [PASSED] 49 VFs
[16:52:56] [PASSED] 50 VFs
[16:52:56] [PASSED] 51 VFs
[16:52:56] [PASSED] 52 VFs
[16:52:56] [PASSED] 53 VFs
[16:52:56] [PASSED] 54 VFs
[16:52:56] [PASSED] 55 VFs
[16:52:56] [PASSED] 56 VFs
[16:52:56] [PASSED] 57 VFs
[16:52:56] [PASSED] 58 VFs
[16:52:56] [PASSED] 59 VFs
[16:52:56] [PASSED] 60 VFs
[16:52:56] [PASSED] 61 VFs
[16:52:56] [PASSED] 62 VFs
[16:52:56] [PASSED] 63 VFs
[16:52:56] ==================== [PASSED] fair_vram ====================
[16:52:56] ================== [PASSED] pf_gt_config ===================
[16:52:56] ===================== lmtt (1 subtest) =====================
[16:52:56] ======================== test_ops  =========================
[16:52:56] [PASSED] 2-level
[16:52:56] [PASSED] multi-level
[16:52:56] ==================== [PASSED] test_ops =====================
[16:52:56] ====================== [PASSED] lmtt =======================
[16:52:56] ================= sriov_packet (1 subtest) =================
[16:52:56] [PASSED] test_descriptor_init
[16:52:56] ================== [PASSED] sriov_packet ===================
[16:52:56] ================= pf_service (11 subtests) =================
[16:52:56] [PASSED] pf_negotiate_any
[16:52:56] [PASSED] pf_negotiate_base_match
[16:52:56] [PASSED] pf_negotiate_base_newer
[16:52:56] [PASSED] pf_negotiate_base_next
[16:52:56] [SKIPPED] pf_negotiate_base_older (no older minor)
[16:52:56] [PASSED] pf_negotiate_base_prev
[16:52:56] [PASSED] pf_negotiate_latest_match
[16:52:56] [PASSED] pf_negotiate_latest_newer
[16:52:56] [PASSED] pf_negotiate_latest_next
[16:52:56] [SKIPPED] pf_negotiate_latest_older (no older minor)
[16:52:56] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[16:52:56] =================== [PASSED] pf_service ====================
[16:52:56] ================= xe_guc_g2g (2 subtests) ==================
[16:52:56] ============== xe_live_guc_g2g_kunit_default  ==============
[16:52:56] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[16:52:56] ============== xe_live_guc_g2g_kunit_allmem  ===============
[16:52:56] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[16:52:56] =================== [SKIPPED] xe_guc_g2g ===================
[16:52:56] =================== xe_mocs (2 subtests) ===================
[16:52:56] ================ xe_live_mocs_kernel_kunit  ================
[16:52:56] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[16:52:56] ================ xe_live_mocs_reset_kunit  =================
[16:52:56] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[16:52:56] ==================== [SKIPPED] xe_mocs =====================
[16:52:56] ================= xe_migrate (2 subtests) ==================
[16:52:56] ================= xe_migrate_sanity_kunit  =================
[16:52:56] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[16:52:56] ================== xe_validate_ccs_kunit  ==================
[16:52:56] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[16:52:56] =================== [SKIPPED] xe_migrate ===================
[16:52:56] ================== xe_dma_buf (1 subtest) ==================
[16:52:56] ==================== xe_dma_buf_kunit  =====================
[16:52:56] ================ [SKIPPED] xe_dma_buf_kunit ================
[16:52:56] =================== [SKIPPED] xe_dma_buf ===================
[16:52:56] ================= xe_bo_shrink (1 subtest) =================
[16:52:56] =================== xe_bo_shrink_kunit  ====================
[16:52:56] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[16:52:56] ================== [SKIPPED] xe_bo_shrink ==================
[16:52:56] ==================== xe_bo (2 subtests) ====================
[16:52:56] ================== xe_ccs_migrate_kunit  ===================
[16:52:56] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[16:52:56] ==================== xe_bo_evict_kunit  ====================
[16:52:56] =============== [SKIPPED] xe_bo_evict_kunit ================
[16:52:56] ===================== [SKIPPED] xe_bo ======================
[16:52:56] =================== xe_any (9 subtests) ====================
[16:52:56] [PASSED] test_to_xe
[16:52:56] [PASSED] test_to_dev
[16:52:56] [PASSED] test_to_pdev
[16:52:56] [PASSED] test_to_drm
[16:52:56] [PASSED] test_if_pdev
[16:52:56] [PASSED] test_if_xe
[16:52:56] [PASSED] test_if_tile
[16:52:56] [PASSED] test_if_gt
[16:52:56] [PASSED] test_to_id
[16:52:56] ===================== [PASSED] xe_any ======================
[16:52:56] ==================== args (13 subtests) ====================
[16:52:56] [PASSED] count_args_test
[16:52:56] [PASSED] call_args_example
[16:52:56] [PASSED] call_args_test
[16:52:56] [PASSED] drop_first_arg_example
[16:52:56] [PASSED] drop_first_arg_test
[16:52:56] [PASSED] first_arg_example
[16:52:56] [PASSED] first_arg_test
[16:52:56] [PASSED] last_arg_example
[16:52:56] [PASSED] last_arg_test
[16:52:56] [PASSED] pick_arg_example
[16:52:56] [PASSED] if_args_example
[16:52:56] [PASSED] if_args_test
[16:52:56] [PASSED] sep_comma_example
[16:52:56] ====================== [PASSED] args =======================
[16:52:56] =================== xe_pci (3 subtests) ====================
[16:52:56] ==================== check_graphics_ip  ====================
[16:52:56] [PASSED] 12.00 Xe_LP
[16:52:56] [PASSED] 12.10 Xe_LP+
[16:52:56] [PASSED] 12.55 Xe_HPG
[16:52:56] [PASSED] 12.60 Xe_HPC
[16:52:56] [PASSED] 12.70 Xe_LPG
[16:52:56] [PASSED] 12.71 Xe_LPG
[16:52:56] [PASSED] 12.74 Xe_LPG+
[16:52:56] [PASSED] 20.01 Xe2_HPG
[16:52:56] [PASSED] 20.02 Xe2_HPG
[16:52:56] [PASSED] 20.04 Xe2_LPG
[16:52:56] [PASSED] 30.00 Xe3_LPG
[16:52:56] [PASSED] 30.01 Xe3_LPG
[16:52:56] [PASSED] 30.03 Xe3_LPG
[16:52:56] [PASSED] 30.04 Xe3_LPG
[16:52:56] [PASSED] 30.05 Xe3_LPG
[16:52:56] [PASSED] 35.10 Xe3p_LPG
[16:52:56] [PASSED] 35.11 Xe3p_XPC
[16:52:56] ================ [PASSED] check_graphics_ip ================
[16:52:56] ===================== check_media_ip  ======================
[16:52:56] [PASSED] 12.00 Xe_M
[16:52:56] [PASSED] 12.55 Xe_HPM
[16:52:56] [PASSED] 13.00 Xe_LPM+
[16:52:56] [PASSED] 13.01 Xe2_HPM
[16:52:56] [PASSED] 20.00 Xe2_LPM
[16:52:56] [PASSED] 30.00 Xe3_LPM
[16:52:56] [PASSED] 30.02 Xe3_LPM
[16:52:56] [PASSED] 35.00 Xe3p_LPM
[16:52:56] [PASSED] 35.03 Xe3p_HPM
[16:52:56] ================= [PASSED] check_media_ip ==================
[16:52:56] =================== check_platform_desc  ===================
[16:52:56] [PASSED] 0x9A60 (TIGERLAKE)
[16:52:56] [PASSED] 0x9A68 (TIGERLAKE)
[16:52:56] [PASSED] 0x9A70 (TIGERLAKE)
[16:52:56] [PASSED] 0x9A40 (TIGERLAKE)
[16:52:56] [PASSED] 0x9A49 (TIGERLAKE)
[16:52:56] [PASSED] 0x9A59 (TIGERLAKE)
[16:52:56] [PASSED] 0x9A78 (TIGERLAKE)
[16:52:56] [PASSED] 0x9AC0 (TIGERLAKE)
[16:52:56] [PASSED] 0x9AC9 (TIGERLAKE)
[16:52:56] [PASSED] 0x9AD9 (TIGERLAKE)
[16:52:56] [PASSED] 0x9AF8 (TIGERLAKE)
[16:52:56] [PASSED] 0x4C80 (ROCKETLAKE)
[16:52:56] [PASSED] 0x4C8A (ROCKETLAKE)
[16:52:56] [PASSED] 0x4C8B (ROCKETLAKE)
[16:52:56] [PASSED] 0x4C8C (ROCKETLAKE)
[16:52:56] [PASSED] 0x4C90 (ROCKETLAKE)
[16:52:56] [PASSED] 0x4C9A (ROCKETLAKE)
[16:52:56] [PASSED] 0x4680 (ALDERLAKE_S)
[16:52:56] [PASSED] 0x4682 (ALDERLAKE_S)
[16:52:56] [PASSED] 0x4688 (ALDERLAKE_S)
[16:52:56] [PASSED] 0x468A (ALDERLAKE_S)
[16:52:56] [PASSED] 0x468B (ALDERLAKE_S)
[16:52:56] [PASSED] 0x4690 (ALDERLAKE_S)
[16:52:56] [PASSED] 0x4692 (ALDERLAKE_S)
[16:52:56] [PASSED] 0x4693 (ALDERLAKE_S)
[16:52:56] [PASSED] 0x46A0 (ALDERLAKE_P)
[16:52:56] [PASSED] 0x46A1 (ALDERLAKE_P)
[16:52:56] [PASSED] 0x46A2 (ALDERLAKE_P)
[16:52:56] [PASSED] 0x46A3 (ALDERLAKE_P)
[16:52:56] [PASSED] 0x46A6 (ALDERLAKE_P)
[16:52:56] [PASSED] 0x46A8 (ALDERLAKE_P)
[16:52:56] [PASSED] 0x46AA (ALDERLAKE_P)
[16:52:56] [PASSED] 0x462A (ALDERLAKE_P)
[16:52:56] [PASSED] 0x4626 (ALDERLAKE_P)
[16:52:56] [PASSED] 0x4628 (ALDERLAKE_P)
[16:52:56] [PASSED] 0x46B0 (ALDERLAKE_P)
[16:52:56] [PASSED] 0x46B1 (ALDERLAKE_P)
[16:52:56] [PASSED] 0x46B2 (ALDERLAKE_P)
[16:52:56] [PASSED] 0x46B3 (ALDERLAKE_P)
[16:52:56] [PASSED] 0x46C0 (ALDERLAKE_P)
[16:52:56] [PASSED] 0x46C1 (ALDERLAKE_P)
[16:52:56] [PASSED] 0x46C2 (ALDERLAKE_P)
[16:52:56] [PASSED] 0x46C3 (ALDERLAKE_P)
[16:52:56] [PASSED] 0x46D0 (ALDERLAKE_N)
[16:52:56] [PASSED] 0x46D1 (ALDERLAKE_N)
[16:52:56] [PASSED] 0x46D2 (ALDERLAKE_N)
[16:52:56] [PASSED] 0x46D3 (ALDERLAKE_N)
[16:52:56] [PASSED] 0x46D4 (ALDERLAKE_N)
[16:52:56] [PASSED] 0xA721 (ALDERLAKE_P)
[16:52:56] [PASSED] 0xA7A1 (ALDERLAKE_P)
[16:52:56] [PASSED] 0xA7A9 (ALDERLAKE_P)
[16:52:56] [PASSED] 0xA7AC (ALDERLAKE_P)
[16:52:56] [PASSED] 0xA7AD (ALDERLAKE_P)
[16:52:56] [PASSED] 0xA720 (ALDERLAKE_P)
[16:52:56] [PASSED] 0xA7A0 (ALDERLAKE_P)
[16:52:56] [PASSED] 0xA7A8 (ALDERLAKE_P)
[16:52:56] [PASSED] 0xA7AA (ALDERLAKE_P)
[16:52:56] [PASSED] 0xA7AB (ALDERLAKE_P)
[16:52:56] [PASSED] 0xA780 (ALDERLAKE_S)
[16:52:56] [PASSED] 0xA781 (ALDERLAKE_S)
[16:52:56] [PASSED] 0xA782 (ALDERLAKE_S)
[16:52:56] [PASSED] 0xA783 (ALDERLAKE_S)
[16:52:56] [PASSED] 0xA788 (ALDERLAKE_S)
[16:52:56] [PASSED] 0xA789 (ALDERLAKE_S)
[16:52:56] [PASSED] 0xA78A (ALDERLAKE_S)
[16:52:56] [PASSED] 0xA78B (ALDERLAKE_S)
[16:52:56] [PASSED] 0x4905 (DG1)
[16:52:56] [PASSED] 0x4906 (DG1)
[16:52:56] [PASSED] 0x4907 (DG1)
[16:52:56] [PASSED] 0x4908 (DG1)
[16:52:56] [PASSED] 0x4909 (DG1)
[16:52:56] [PASSED] 0x56C0 (DG2)
[16:52:56] [PASSED] 0x56C2 (DG2)
[16:52:56] [PASSED] 0x56C1 (DG2)
[16:52:56] [PASSED] 0x7D51 (METEORLAKE)
[16:52:56] [PASSED] 0x7DD1 (METEORLAKE)
[16:52:56] [PASSED] 0x7D41 (METEORLAKE)
[16:52:56] [PASSED] 0x7D67 (METEORLAKE)
[16:52:56] [PASSED] 0xB640 (METEORLAKE)
[16:52:56] [PASSED] 0x56A0 (DG2)
[16:52:56] [PASSED] 0x56A1 (DG2)
[16:52:56] [PASSED] 0x56A2 (DG2)
[16:52:56] [PASSED] 0x56BE (DG2)
[16:52:56] [PASSED] 0x56BF (DG2)
[16:52:56] [PASSED] 0x5690 (DG2)
[16:52:56] [PASSED] 0x5691 (DG2)
[16:52:56] [PASSED] 0x5692 (DG2)
[16:52:56] [PASSED] 0x56A5 (DG2)
[16:52:56] [PASSED] 0x56A6 (DG2)
[16:52:56] [PASSED] 0x56B0 (DG2)
[16:52:56] [PASSED] 0x56B1 (DG2)
[16:52:56] [PASSED] 0x56BA (DG2)
[16:52:56] [PASSED] 0x56BB (DG2)
[16:52:56] [PASSED] 0x56BC (DG2)
[16:52:56] [PASSED] 0x56BD (DG2)
[16:52:56] [PASSED] 0x5693 (DG2)
[16:52:56] [PASSED] 0x5694 (DG2)
[16:52:56] [PASSED] 0x5695 (DG2)
[16:52:56] [PASSED] 0x56A3 (DG2)
[16:52:56] [PASSED] 0x56A4 (DG2)
[16:52:56] [PASSED] 0x56B2 (DG2)
[16:52:56] [PASSED] 0x56B3 (DG2)
[16:52:56] [PASSED] 0x5696 (DG2)
[16:52:56] [PASSED] 0x5697 (DG2)
[16:52:56] [PASSED] 0xB69 (PVC)
[16:52:56] [PASSED] 0xB6E (PVC)
[16:52:56] [PASSED] 0xBD4 (PVC)
[16:52:56] [PASSED] 0xBD5 (PVC)
[16:52:56] [PASSED] 0xBD6 (PVC)
[16:52:56] [PASSED] 0xBD7 (PVC)
[16:52:56] [PASSED] 0xBD8 (PVC)
[16:52:56] [PASSED] 0xBD9 (PVC)
[16:52:56] [PASSED] 0xBDA (PVC)
[16:52:56] [PASSED] 0xBDB (PVC)
[16:52:56] [PASSED] 0xBE0 (PVC)
[16:52:56] [PASSED] 0xBE1 (PVC)
[16:52:56] [PASSED] 0xBE5 (PVC)
[16:52:56] [PASSED] 0x7D40 (METEORLAKE)
[16:52:56] [PASSED] 0x7D45 (METEORLAKE)
[16:52:56] [PASSED] 0x7D55 (METEORLAKE)
[16:52:56] [PASSED] 0x7D60 (METEORLAKE)
[16:52:56] [PASSED] 0x7DD5 (METEORLAKE)
[16:52:56] [PASSED] 0x6420 (LUNARLAKE)
[16:52:56] [PASSED] 0x64A0 (LUNARLAKE)
[16:52:56] [PASSED] 0x64B0 (LUNARLAKE)
[16:52:56] [PASSED] 0xE202 (BATTLEMAGE)
[16:52:56] [PASSED] 0xE209 (BATTLEMAGE)
[16:52:56] [PASSED] 0xE20B (BATTLEMAGE)
[16:52:56] [PASSED] 0xE20C (BATTLEMAGE)
[16:52:56] [PASSED] 0xE20D (BATTLEMAGE)
[16:52:56] [PASSED] 0xE210 (BATTLEMAGE)
[16:52:56] [PASSED] 0xE211 (BATTLEMAGE)
[16:52:56] [PASSED] 0xE212 (BATTLEMAGE)
[16:52:56] [PASSED] 0xE216 (BATTLEMAGE)
[16:52:56] [PASSED] 0xE220 (BATTLEMAGE)
[16:52:56] [PASSED] 0xE221 (BATTLEMAGE)
[16:52:56] [PASSED] 0xE222 (BATTLEMAGE)
[16:52:56] [PASSED] 0xE223 (BATTLEMAGE)
[16:52:56] [PASSED] 0xB080 (PANTHERLAKE)
[16:52:56] [PASSED] 0xB081 (PANTHERLAKE)
[16:52:56] [PASSED] 0xB082 (PANTHERLAKE)
[16:52:56] [PASSED] 0xB083 (PANTHERLAKE)
[16:52:56] [PASSED] 0xB084 (PANTHERLAKE)
[16:52:56] [PASSED] 0xB085 (PANTHERLAKE)
[16:52:56] [PASSED] 0xB086 (PANTHERLAKE)
[16:52:56] [PASSED] 0xB087 (PANTHERLAKE)
[16:52:56] [PASSED] 0xB08F (PANTHERLAKE)
[16:52:56] [PASSED] 0xB090 (PANTHERLAKE)
[16:52:56] [PASSED] 0xB0A0 (PANTHERLAKE)
[16:52:56] [PASSED] 0xB0B0 (PANTHERLAKE)
[16:52:56] [PASSED] 0xFD80 (PANTHERLAKE)
[16:52:56] [PASSED] 0xFD81 (PANTHERLAKE)
[16:52:56] [PASSED] 0xD740 (NOVALAKE_S)
[16:52:56] [PASSED] 0xD741 (NOVALAKE_S)
[16:52:56] [PASSED] 0xD742 (NOVALAKE_S)
[16:52:56] [PASSED] 0xD743 (NOVALAKE_S)
[16:52:56] [PASSED] 0xD745 (NOVALAKE_S)
[16:52:56] [PASSED] 0xD74A (NOVALAKE_S)
[16:52:56] [PASSED] 0xD74B (NOVALAKE_S)
[16:52:56] [PASSED] 0x674C (CRESCENTISLAND)
[16:52:56] [PASSED] 0x674D (CRESCENTISLAND)
[16:52:56] [PASSED] 0x674E (CRESCENTISLAND)
[16:52:56] [PASSED] 0x674F (CRESCENTISLAND)
[16:52:56] [PASSED] 0x6750 (CRESCENTISLAND)
[16:52:56] [PASSED] 0xD750 (NOVALAKE_P)
[16:52:56] [PASSED] 0xD751 (NOVALAKE_P)
[16:52:56] [PASSED] 0xD752 (NOVALAKE_P)
[16:52:56] [PASSED] 0xD753 (NOVALAKE_P)
[16:52:56] [PASSED] 0xD754 (NOVALAKE_P)
[16:52:56] [PASSED] 0xD755 (NOVALAKE_P)
[16:52:56] [PASSED] 0xD756 (NOVALAKE_P)
[16:52:56] [PASSED] 0xD757 (NOVALAKE_P)
[16:52:56] [PASSED] 0xD75F (NOVALAKE_P)
[16:52:56] =============== [PASSED] check_platform_desc ===============
[16:52:56] ===================== [PASSED] xe_pci ======================
[16:52:56] ============= xe_rtp_tables_test (5 subtests) ==============
[16:52:56] ================== xe_rtp_table_gt_test  ===================
[16:52:56] [PASSED] gt_was/14011060649
[16:52:56] [PASSED] gt_was/14011059788
[16:52:56] [PASSED] gt_was/14015795083
[16:52:56] [PASSED] gt_was/16021867713
[16:52:56] [PASSED] gt_was/14019449301
[16:52:56] [PASSED] gt_was/16028005424
[16:52:56] [PASSED] gt_was/14026578760
[16:52:56] [PASSED] gt_was/1409420604
[16:52:56] [PASSED] gt_was/1408615072
[16:52:56] [PASSED] gt_was/22010523718
[16:52:56] [PASSED] gt_was/14011006942
[16:52:56] [PASSED] gt_was/14014830051
[16:52:56] [PASSED] gt_was/18018781329
[16:52:56] [PASSED] gt_was/1509235366
[16:52:56] [PASSED] gt_was/18018781329
[16:52:56] [PASSED] gt_was/16016694945
[16:52:56] [PASSED] gt_was/14018575942
[16:52:56] [PASSED] gt_was/22016670082
[16:52:56] [PASSED] gt_was/22016670082
[16:52:56] [PASSED] gt_was/14017421178
[16:52:56] [PASSED] gt_was/16025250150
[16:52:56] [PASSED] gt_was/14021871409
[16:52:56] [PASSED] gt_was/16021865536
[16:52:56] [PASSED] gt_was/14021486841
[16:52:56] [PASSED] gt_was/14025160223
[16:52:56] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[16:52:56] [PASSED] gt_was/14025635424
[16:52:56] [PASSED] gt_was/16028005424
[16:52:56] ============== [PASSED] xe_rtp_table_gt_test ===============
[16:52:56] ================== xe_rtp_table_gt_test  ===================
[16:52:56] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[16:52:56] [PASSED] gt_tunings/Tuning: 32B Access Enable
[16:52:56] [PASSED] gt_tunings/Tuning: L3 cache
[16:52:56] [PASSED] gt_tunings/Tuning: L3 cache - media
[16:52:56] [PASSED] gt_tunings/Tuning: Compression Overfetch
[16:52:56] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[16:52:56] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[16:52:56] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[16:52:56] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[16:52:56] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[16:52:56] [PASSED] gt_tunings/Tuning: Stateless compression control
[16:52:56] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[16:52:56] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[16:52:56] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[16:52:56] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[16:52:56] ============== [PASSED] xe_rtp_table_gt_test ===============
[16:52:56] ================== xe_rtp_table_oob_test  ==================
[16:52:56] [PASSED] oob_was/1607983814
[16:52:56] [PASSED] oob_was/16010904313
[16:52:56] [PASSED] oob_was/18022495364
[16:52:56] [PASSED] oob_was/22012773006
[16:52:56] [PASSED] oob_was/14014475959
[16:52:56] [PASSED] oob_was/22011391025
[16:52:56] [PASSED] oob_was/22012727170
[16:52:56] [PASSED] oob_was/22012727685
[16:52:56] [PASSED] oob_was/22016596838
[16:52:56] [PASSED] oob_was/18020744125
[16:52:56] [PASSED] oob_was/1409600907
[16:52:56] [PASSED] oob_was/22014953428
[16:52:56] [PASSED] oob_was/16017236439
[16:52:56] [PASSED] oob_was/14019821291
[16:52:56] [PASSED] oob_was/14015076503
[16:52:56] [PASSED] oob_was/14018913170
[16:52:56] [PASSED] oob_was/14018094691
[16:52:56] [PASSED] oob_was/18024947630
[16:52:56] [PASSED] oob_was/16022287689
[16:52:56] [PASSED] oob_was/13011645652
[16:52:56] [PASSED] oob_was/14022293748
[16:52:56] [PASSED] oob_was/22019794406
[16:52:56] [PASSED] oob_was/22019338487
[16:52:56] [PASSED] oob_was/16023588340
[16:52:56] [PASSED] oob_was/14019789679
[16:52:56] [PASSED] oob_was/14022866841
[16:52:56] [PASSED] oob_was/16021333562
[16:52:56] [PASSED] oob_was/14016712196
[16:52:56] [PASSED] oob_was/14015568240
[16:52:56] [PASSED] oob_was/18013179988
[16:52:56] [PASSED] oob_was/1508761755
[16:52:56] [PASSED] oob_was/16023105232
[16:52:56] [PASSED] oob_was/16026508708
[16:52:56] [PASSED] oob_was/14020001231
[16:52:56] [PASSED] oob_was/16023683509
[16:52:56] [PASSED] oob_was/14025515070
[16:52:56] [PASSED] oob_was/15015404425_disable
[16:52:56] [PASSED] oob_was/16026007364
[16:52:56] [PASSED] oob_was/14020316580
[16:52:56] [PASSED] oob_was/14025883347
[16:52:56] [PASSED] oob_was/16029380221
[16:52:56] [PASSED] oob_was/22022079272
[16:52:56] [PASSED] oob_was/16029897822
[16:52:56] [PASSED] oob_was/14027054324
[16:52:56] ============== [PASSED] xe_rtp_table_oob_test ==============
[16:52:56] ================ xe_rtp_table_dev_oob_test  ================
[16:52:56] [PASSED] device_oob_was/22010954014
[16:52:56] [PASSED] device_oob_was/15015404425
[16:52:56] [PASSED] device_oob_was/22019338487_display
[16:52:56] [PASSED] device_oob_was/14022085890
[16:52:56] [PASSED] device_oob_was/14026539277
[16:52:56] [PASSED] device_oob_was/14026633728
[16:52:56] [PASSED] device_oob_was/14026746987
[16:52:56] [PASSED] device_oob_was/14026779378
[16:52:56] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[16:52:56] ========== xe_rtp_table_missing_upper_bound_test  ==========
[16:52:56] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[16:52:56] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[16:52:56] [PASSED] register_whitelist/1806527549
[16:52:56] [PASSED] register_whitelist/allow_read_ctx_timestamp
[16:52:56] [PASSED] register_whitelist/allow_read_queue_timestamp
[16:52:56] [PASSED] register_whitelist/16014440446
[16:52:56] [PASSED] register_whitelist/16017236439
[16:52:56] [PASSED] register_whitelist/16020183090
[16:52:56] [PASSED] register_whitelist/14024997852
[16:52:56] [PASSED] register_whitelist/14024997852
[16:52:56] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[16:52:56] =============== [PASSED] xe_rtp_tables_test ================
[16:52:56] =================== xe_rtp (3 subtests) ====================
[16:52:56] =================== xe_rtp_rules_tests  ====================
[16:52:56] [PASSED] no
[16:52:56] [PASSED] yes
[16:52:56] [PASSED] no-and-no
[16:52:56] [PASSED] no-and-yes
[16:52:56] [PASSED] yes-and-no
[16:52:56] [PASSED] yes-and-yes
[16:52:56] [PASSED] no-or-no
[16:52:56] [PASSED] no-or-yes
[16:52:56] [PASSED] yes-or-no
[16:52:56] [PASSED] yes-or-yes
[16:52:56] [PASSED] no-yes-or-yes-no
[16:52:56] [PASSED] no-yes-or-yes-yes
[16:52:56] [PASSED] yes-yes-or-no-yes
[16:52:56] [PASSED] yes-yes-or-yes-yes
[16:52:56] [PASSED] no-no-or-yes-or-no
[16:52:56] [PASSED] or
[16:52:56] [PASSED] or-yes
[16:52:56] [PASSED] or-no
[16:52:56] [PASSED] yes-or
[16:52:56] [PASSED] no-or
[16:52:56] [PASSED] no-or-or-yes
[16:52:56] [PASSED] yes-or-or-no
[16:52:56] [PASSED] no-or-or-no
[16:52:56] [PASSED] missing-context-engine-class
[16:52:56] [PASSED] missing-context-engine-class-or-yes
[16:52:56] [PASSED] missing-context-engine-class-or-or-yes
[16:52:56] =============== [PASSED] xe_rtp_rules_tests ================
[16:52:56] =============== xe_rtp_process_to_sr_tests  ================
[16:52:56] [PASSED] coalesce-same-reg
[16:52:56] [PASSED] coalesce-same-reg-literal-and-func
[16:52:56] [PASSED] no-match-no-add
[16:52:56] [PASSED] two-regs-two-entries
[16:52:56] [PASSED] clr-one-set-other
[16:52:56] [PASSED] set-field
[16:52:56] [PASSED] conflict-duplicate
[16:52:56] [PASSED] conflict-not-disjoint
[16:52:56] [PASSED] conflict-not-disjoint-literal-and-func
[16:52:56] [PASSED] conflict-reg-type
[16:52:56] [PASSED] bad-mcr-reg-forced-to-regular
[16:52:56] [PASSED] bad-regular-reg-forced-to-mcr
[16:52:56] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[16:52:56] ================== xe_rtp_process_tests  ===================
[16:52:56] [PASSED] active1
[16:52:56] [PASSED] active2
[16:52:56] [PASSED] active-inactive
[16:52:56] [PASSED] inactive-active
[16:52:56] [PASSED] inactive-active-inactive
[16:52:56] [PASSED] inactive-inactive-inactive
[16:52:56] ============== [PASSED] xe_rtp_process_tests ===============
[16:52:56] ===================== [PASSED] xe_rtp ======================
[16:52:56] ==================== xe_wa (1 subtest) =====================
[16:52:56] ======================== xe_wa_gt  =========================
[16:52:56] [PASSED] TIGERLAKE B0
[16:52:56] [PASSED] DG1 A0
[16:52:56] [PASSED] DG1 B0
[16:52:56] [PASSED] ALDERLAKE_S A0
[16:52:56] [PASSED] ALDERLAKE_S B0
[16:52:56] [PASSED] ALDERLAKE_S C0
[16:52:56] [PASSED] ALDERLAKE_S D0
[16:52:56] [PASSED] ALDERLAKE_P A0
[16:52:56] [PASSED] ALDERLAKE_P B0
[16:52:56] [PASSED] ALDERLAKE_P C0
[16:52:56] [PASSED] ALDERLAKE_S RPLS D0
[16:52:56] [PASSED] ALDERLAKE_P RPLU E0
[16:52:56] [PASSED] DG2 G10 C0
[16:52:56] [PASSED] DG2 G11 B1
[16:52:56] [PASSED] DG2 G12 A1
[16:52:56] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[16:52:56] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[16:52:56] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[16:52:56] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[16:52:56] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[16:52:56] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[16:52:56] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[16:52:56] ==================== [PASSED] xe_wa_gt =====================
[16:52:56] ====================== [PASSED] xe_wa ======================
[16:52:56] ============================================================
[16:52:56] Testing complete. Ran 805 tests: passed: 777, skipped: 28
[16:52:56] Elapsed time: 36.067s total, 1.803s configuring, 33.549s building, 0.702s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[16:52:56] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:52:58] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:53:23] Starting KUnit Kernel (1/1)...
[16:53:23] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:53:23] ============= refcount_interrupt (4 subtests) ==============
[16:53:23] [PASSED] test_single_irq_change
[16:53:23] [PASSED] test_nested_irq_change
[16:53:23] [PASSED] test_multiple_irq_change
[16:53:23] [PASSED] test_irq_save
[16:53:23] =============== [PASSED] refcount_interrupt ================
[16:53:23] ============ drm_test_pick_cmdline (2 subtests) ============
[16:53:23] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[16:53:23] =============== drm_test_pick_cmdline_named  ===============
[16:53:23] [PASSED] NTSC
[16:53:23] [PASSED] NTSC-J
[16:53:23] [PASSED] PAL
[16:53:23] [PASSED] PAL-M
[16:53:23] =========== [PASSED] drm_test_pick_cmdline_named ===========
[16:53:23] ============== [PASSED] drm_test_pick_cmdline ==============
[16:53:23] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[16:53:23] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[16:53:23] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[16:53:23] =========== drm_validate_clone_mode (2 subtests) ===========
[16:53:23] ============== drm_test_check_in_clone_mode  ===============
[16:53:23] [PASSED] in_clone_mode
[16:53:23] [PASSED] not_in_clone_mode
[16:53:23] ========== [PASSED] drm_test_check_in_clone_mode ===========
[16:53:23] =============== drm_test_check_valid_clones  ===============
[16:53:23] [PASSED] not_in_clone_mode
[16:53:23] [PASSED] valid_clone
[16:53:23] [PASSED] invalid_clone
[16:53:23] =========== [PASSED] drm_test_check_valid_clones ===========
[16:53:23] ============= [PASSED] drm_validate_clone_mode =============
[16:53:23] ============= drm_validate_modeset (1 subtest) =============
[16:53:23] [PASSED] drm_test_check_connector_changed_modeset
[16:53:23] ============== [PASSED] drm_validate_modeset ===============
[16:53:23] ====== drm_test_bridge_get_current_state (1 subtest) =======
[16:53:23] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[16:53:23] ======== [PASSED] drm_test_bridge_get_current_state ========
[16:53:23] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[16:53:23] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[16:53:23] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[16:53:23] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[16:53:23] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[16:53:23] ============== drm_bridge_alloc (2 subtests) ===============
[16:53:23] [PASSED] drm_test_drm_bridge_alloc_basic
[16:53:23] [PASSED] drm_test_drm_bridge_alloc_get_put
[16:53:23] ================ [PASSED] drm_bridge_alloc =================
[16:53:23] ============= drm_bridge_bus_fmt (5 subtests) ==============
[16:53:23] [PASSED] drm_test_bridge_rgb_yuv_rgb
[16:53:23] [PASSED] drm_test_bridge_must_convert_to_yuv444
[16:53:23] [PASSED] drm_test_bridge_hdmi_auto_rgb
[16:53:23] [PASSED] drm_test_bridge_auto_first
[16:53:23] [PASSED] drm_test_bridge_rgb_yuv_no_path
[16:53:23] =============== [PASSED] drm_bridge_bus_fmt ================
[16:53:23] ============= drm_cmdline_parser (40 subtests) =============
[16:53:23] [PASSED] drm_test_cmdline_force_d_only
[16:53:23] [PASSED] drm_test_cmdline_force_D_only_dvi
[16:53:23] [PASSED] drm_test_cmdline_force_D_only_hdmi
[16:53:23] [PASSED] drm_test_cmdline_force_D_only_not_digital
[16:53:23] [PASSED] drm_test_cmdline_force_e_only
[16:53:23] [PASSED] drm_test_cmdline_res
[16:53:23] [PASSED] drm_test_cmdline_res_vesa
[16:53:23] [PASSED] drm_test_cmdline_res_vesa_rblank
[16:53:23] [PASSED] drm_test_cmdline_res_rblank
[16:53:23] [PASSED] drm_test_cmdline_res_bpp
[16:53:23] [PASSED] drm_test_cmdline_res_refresh
[16:53:23] [PASSED] drm_test_cmdline_res_bpp_refresh
[16:53:23] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[16:53:23] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[16:53:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[16:53:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[16:53:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[16:53:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[16:53:23] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[16:53:23] [PASSED] drm_test_cmdline_res_margins_force_on
[16:53:23] [PASSED] drm_test_cmdline_res_vesa_margins
[16:53:23] [PASSED] drm_test_cmdline_name
[16:53:23] [PASSED] drm_test_cmdline_name_bpp
[16:53:23] [PASSED] drm_test_cmdline_name_option
[16:53:23] [PASSED] drm_test_cmdline_name_bpp_option
[16:53:23] [PASSED] drm_test_cmdline_rotate_0
[16:53:23] [PASSED] drm_test_cmdline_rotate_90
[16:53:23] [PASSED] drm_test_cmdline_rotate_180
[16:53:23] [PASSED] drm_test_cmdline_rotate_270
[16:53:23] [PASSED] drm_test_cmdline_hmirror
[16:53:23] [PASSED] drm_test_cmdline_vmirror
[16:53:23] [PASSED] drm_test_cmdline_margin_options
[16:53:23] [PASSED] drm_test_cmdline_multiple_options
[16:53:23] [PASSED] drm_test_cmdline_bpp_extra_and_option
[16:53:23] [PASSED] drm_test_cmdline_extra_and_option
[16:53:23] [PASSED] drm_test_cmdline_freestanding_options
[16:53:23] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[16:53:23] [PASSED] drm_test_cmdline_panel_orientation
[16:53:23] ================ drm_test_cmdline_invalid  =================
[16:53:23] [PASSED] margin_only
[16:53:23] [PASSED] interlace_only
[16:53:23] [PASSED] res_missing_x
[16:53:23] [PASSED] res_missing_y
[16:53:23] [PASSED] res_bad_y
[16:53:23] [PASSED] res_missing_y_bpp
[16:53:23] [PASSED] res_bad_bpp
[16:53:23] [PASSED] res_bad_refresh
[16:53:23] [PASSED] res_bpp_refresh_force_on_off
[16:53:23] [PASSED] res_invalid_mode
[16:53:23] [PASSED] res_bpp_wrong_place_mode
[16:53:23] [PASSED] name_bpp_refresh
[16:53:23] [PASSED] name_refresh
[16:53:23] [PASSED] name_refresh_wrong_mode
[16:53:23] [PASSED] name_refresh_invalid_mode
[16:53:23] [PASSED] rotate_multiple
[16:53:23] [PASSED] rotate_invalid_val
[16:53:23] [PASSED] rotate_truncated
[16:53:23] [PASSED] invalid_option
[16:53:23] [PASSED] invalid_tv_option
[16:53:23] [PASSED] truncated_tv_option
[16:53:23] ============ [PASSED] drm_test_cmdline_invalid =============
[16:53:23] =============== drm_test_cmdline_tv_options  ===============
[16:53:23] [PASSED] NTSC
[16:53:23] [PASSED] NTSC_443
[16:53:23] [PASSED] NTSC_J
[16:53:23] [PASSED] PAL
[16:53:23] [PASSED] PAL_M
[16:53:23] [PASSED] PAL_N
[16:53:23] [PASSED] SECAM
[16:53:23] [PASSED] MONO_525
[16:53:23] [PASSED] MONO_625
[16:53:23] =========== [PASSED] drm_test_cmdline_tv_options ===========
[16:53:23] =============== [PASSED] drm_cmdline_parser ================
[16:53:23] ========== drmm_connector_hdmi_init (20 subtests) ==========
[16:53:23] [PASSED] drm_test_connector_hdmi_init_valid
[16:53:23] [PASSED] drm_test_connector_hdmi_init_bpc_8
[16:53:23] [PASSED] drm_test_connector_hdmi_init_bpc_10
[16:53:23] [PASSED] drm_test_connector_hdmi_init_bpc_12
[16:53:23] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[16:53:23] [PASSED] drm_test_connector_hdmi_init_bpc_null
[16:53:23] [PASSED] drm_test_connector_hdmi_init_formats_empty
[16:53:23] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[16:53:23] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[16:53:23] [PASSED] supported_formats=0x9 yuv420_allowed=1
[16:53:23] [PASSED] supported_formats=0x9 yuv420_allowed=0
[16:53:23] [PASSED] supported_formats=0x5 yuv420_allowed=1
[16:53:23] [PASSED] supported_formats=0x5 yuv420_allowed=0
[16:53:23] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[16:53:23] [PASSED] drm_test_connector_hdmi_init_null_ddc
[16:53:23] [PASSED] drm_test_connector_hdmi_init_null_product
[16:53:23] [PASSED] drm_test_connector_hdmi_init_null_vendor
[16:53:23] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[16:53:23] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[16:53:23] [PASSED] drm_test_connector_hdmi_init_product_valid
[16:53:23] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[16:53:23] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[16:53:23] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[16:53:23] ========= drm_test_connector_hdmi_init_type_valid  =========
[16:53:23] [PASSED] HDMI-A
[16:53:23] [PASSED] HDMI-B
[16:53:23] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[16:53:23] ======== drm_test_connector_hdmi_init_type_invalid  ========
[16:53:23] [PASSED] Unknown
[16:53:23] [PASSED] VGA
[16:53:23] [PASSED] DVI-I
[16:53:23] [PASSED] DVI-D
[16:53:23] [PASSED] DVI-A
[16:53:23] [PASSED] Composite
[16:53:23] [PASSED] SVIDEO
[16:53:23] [PASSED] LVDS
[16:53:23] [PASSED] Component
[16:53:23] [PASSED] DIN
[16:53:23] [PASSED] DP
[16:53:23] [PASSED] TV
[16:53:23] [PASSED] eDP
[16:53:23] [PASSED] Virtual
[16:53:23] [PASSED] DSI
[16:53:23] [PASSED] DPI
[16:53:23] [PASSED] Writeback
[16:53:23] [PASSED] SPI
[16:53:23] [PASSED] USB
[16:53:23] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[16:53:23] ============ [PASSED] drmm_connector_hdmi_init =============
[16:53:23] ============= drmm_connector_init (3 subtests) =============
[16:53:23] [PASSED] drm_test_drmm_connector_init
[16:53:23] [PASSED] drm_test_drmm_connector_init_null_ddc
[16:53:23] ========= drm_test_drmm_connector_init_type_valid  =========
[16:53:23] [PASSED] Unknown
[16:53:23] [PASSED] VGA
[16:53:23] [PASSED] DVI-I
[16:53:23] [PASSED] DVI-D
[16:53:23] [PASSED] DVI-A
[16:53:23] [PASSED] Composite
[16:53:23] [PASSED] SVIDEO
[16:53:23] [PASSED] LVDS
[16:53:23] [PASSED] Component
[16:53:23] [PASSED] DIN
[16:53:23] [PASSED] DP
[16:53:23] [PASSED] HDMI-A
[16:53:23] [PASSED] HDMI-B
[16:53:23] [PASSED] TV
[16:53:23] [PASSED] eDP
[16:53:23] [PASSED] Virtual
[16:53:23] [PASSED] DSI
[16:53:23] [PASSED] DPI
[16:53:23] [PASSED] Writeback
[16:53:23] [PASSED] SPI
[16:53:23] [PASSED] USB
[16:53:23] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[16:53:23] =============== [PASSED] drmm_connector_init ===============
[16:53:23] ========= drm_connector_dynamic_init (6 subtests) ==========
[16:53:23] [PASSED] drm_test_drm_connector_dynamic_init
[16:53:23] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[16:53:23] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[16:53:23] [PASSED] drm_test_drm_connector_dynamic_init_properties
[16:53:23] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[16:53:23] [PASSED] Unknown
[16:53:23] [PASSED] VGA
[16:53:23] [PASSED] DVI-I
[16:53:23] [PASSED] DVI-D
[16:53:23] [PASSED] DVI-A
[16:53:23] [PASSED] Composite
[16:53:23] [PASSED] SVIDEO
[16:53:23] [PASSED] LVDS
[16:53:23] [PASSED] Component
[16:53:23] [PASSED] DIN
[16:53:23] [PASSED] DP
[16:53:23] [PASSED] HDMI-A
[16:53:23] [PASSED] HDMI-B
[16:53:23] [PASSED] TV
[16:53:23] [PASSED] eDP
[16:53:23] [PASSED] Virtual
[16:53:23] [PASSED] DSI
[16:53:23] [PASSED] DPI
[16:53:23] [PASSED] Writeback
[16:53:23] [PASSED] SPI
[16:53:23] [PASSED] USB
[16:53:23] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[16:53:23] ======== drm_test_drm_connector_dynamic_init_name  =========
[16:53:23] [PASSED] Unknown
[16:53:23] [PASSED] VGA
[16:53:23] [PASSED] DVI-I
[16:53:23] [PASSED] DVI-D
[16:53:23] [PASSED] DVI-A
[16:53:23] [PASSED] Composite
[16:53:23] [PASSED] SVIDEO
[16:53:23] [PASSED] LVDS
[16:53:23] [PASSED] Component
[16:53:23] [PASSED] DIN
[16:53:23] [PASSED] DP
[16:53:23] [PASSED] HDMI-A
[16:53:23] [PASSED] HDMI-B
[16:53:23] [PASSED] TV
[16:53:23] [PASSED] eDP
[16:53:23] [PASSED] Virtual
[16:53:23] [PASSED] DSI
[16:53:23] [PASSED] DPI
[16:53:23] [PASSED] Writeback
[16:53:23] [PASSED] SPI
[16:53:23] [PASSED] USB
[16:53:23] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[16:53:23] =========== [PASSED] drm_connector_dynamic_init ============
[16:53:23] ==== drm_connector_dynamic_register_early (4 subtests) =====
[16:53:23] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[16:53:23] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[16:53:23] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[16:53:23] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[16:53:23] ====== [PASSED] drm_connector_dynamic_register_early =======
[16:53:23] ======= drm_connector_dynamic_register (7 subtests) ========
[16:53:23] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[16:53:23] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[16:53:23] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[16:53:23] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[16:53:23] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[16:53:23] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[16:53:23] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[16:53:23] ========= [PASSED] drm_connector_dynamic_register ==========
[16:53:23] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[16:53:23] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[16:53:23] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[16:53:23] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[16:53:23] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[16:53:23] ========== drm_test_get_tv_mode_from_name_valid  ===========
[16:53:23] [PASSED] NTSC
[16:53:23] [PASSED] NTSC-443
[16:53:23] [PASSED] NTSC-J
[16:53:23] [PASSED] PAL
[16:53:23] [PASSED] PAL-M
[16:53:23] [PASSED] PAL-N
[16:53:23] [PASSED] SECAM
[16:53:23] [PASSED] Mono
[16:53:23] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[16:53:23] [PASSED] drm_test_get_tv_mode_from_name_truncated
[16:53:23] ============ [PASSED] drm_get_tv_mode_from_name ============
[16:53:23] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[16:53:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[16:53:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[16:53:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[16:53:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[16:53:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[16:53:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[16:53:23] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[16:53:23] [PASSED] VIC 96
[16:53:23] [PASSED] VIC 97
[16:53:23] [PASSED] VIC 101
[16:53:23] [PASSED] VIC 102
[16:53:23] [PASSED] VIC 106
[16:53:23] [PASSED] VIC 107
[16:53:23] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[16:53:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[16:53:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[16:53:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[16:53:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[16:53:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[16:53:23] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[16:53:23] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[16:53:23] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[16:53:23] [PASSED] Automatic
[16:53:23] [PASSED] Full
[16:53:23] [PASSED] Limited 16:235
[16:53:23] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[16:53:23] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[16:53:23] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[16:53:23] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[16:53:23] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[16:53:23] [PASSED] RGB
[16:53:23] [PASSED] YUV 4:2:0
[16:53:23] [PASSED] YUV 4:2:2
[16:53:23] [PASSED] YUV 4:4:4
[16:53:23] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[16:53:23] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[16:53:23] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[16:53:23] ============= drm_damage_helper (21 subtests) ==============
[16:53:23] [PASSED] drm_test_damage_iter_no_damage
[16:53:23] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[16:53:23] [PASSED] drm_test_damage_iter_no_damage_src_moved
[16:53:23] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[16:53:23] [PASSED] drm_test_damage_iter_no_damage_not_visible
[16:53:23] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[16:53:23] [PASSED] drm_test_damage_iter_no_damage_no_fb
[16:53:23] [PASSED] drm_test_damage_iter_simple_damage
[16:53:23] [PASSED] drm_test_damage_iter_single_damage
[16:53:23] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[16:53:23] [PASSED] drm_test_damage_iter_single_damage_outside_src
[16:53:23] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[16:53:23] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[16:53:23] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[16:53:23] [PASSED] drm_test_damage_iter_single_damage_src_moved
[16:53:23] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[16:53:23] [PASSED] drm_test_damage_iter_damage
[16:53:23] [PASSED] drm_test_damage_iter_damage_one_intersect
[16:53:23] [PASSED] drm_test_damage_iter_damage_one_outside
[16:53:23] [PASSED] drm_test_damage_iter_damage_src_moved
[16:53:23] [PASSED] drm_test_damage_iter_damage_not_visible
[16:53:23] ================ [PASSED] drm_damage_helper ================
[16:53:23] ============== drm_dp_mst_helper (3 subtests) ==============
[16:53:23] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[16:53:23] [PASSED] Clock 154000 BPP 30 DSC disabled
[16:53:23] [PASSED] Clock 234000 BPP 30 DSC disabled
[16:53:23] [PASSED] Clock 297000 BPP 24 DSC disabled
[16:53:23] [PASSED] Clock 332880 BPP 24 DSC enabled
[16:53:23] [PASSED] Clock 324540 BPP 24 DSC enabled
[16:53:23] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[16:53:23] ============== drm_test_dp_mst_calc_pbn_div  ===============
[16:53:23] [PASSED] Link rate 2000000 lane count 4
[16:53:23] [PASSED] Link rate 2000000 lane count 2
[16:53:23] [PASSED] Link rate 2000000 lane count 1
[16:53:23] [PASSED] Link rate 1350000 lane count 4
[16:53:23] [PASSED] Link rate 1350000 lane count 2
[16:53:23] [PASSED] Link rate 1350000 lane count 1
[16:53:23] [PASSED] Link rate 1000000 lane count 4
[16:53:23] [PASSED] Link rate 1000000 lane count 2
[16:53:23] [PASSED] Link rate 1000000 lane count 1
[16:53:23] [PASSED] Link rate 810000 lane count 4
[16:53:23] [PASSED] Link rate 810000 lane count 2
[16:53:23] [PASSED] Link rate 810000 lane count 1
[16:53:23] [PASSED] Link rate 540000 lane count 4
[16:53:23] [PASSED] Link rate 540000 lane count 2
[16:53:23] [PASSED] Link rate 540000 lane count 1
[16:53:23] [PASSED] Link rate 270000 lane count 4
[16:53:23] [PASSED] Link rate 270000 lane count 2
[16:53:23] [PASSED] Link rate 270000 lane count 1
[16:53:23] [PASSED] Link rate 162000 lane count 4
[16:53:23] [PASSED] Link rate 162000 lane count 2
[16:53:23] [PASSED] Link rate 162000 lane count 1
[16:53:23] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[16:53:23] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[16:53:23] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[16:53:23] [PASSED] DP_POWER_UP_PHY with port number
[16:53:23] [PASSED] DP_POWER_DOWN_PHY with port number
[16:53:23] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[16:53:23] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[16:53:23] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[16:53:23] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[16:53:23] [PASSED] DP_QUERY_PAYLOAD with port number
[16:53:23] [PASSED] DP_QUERY_PAYLOAD with VCPI
[16:53:23] [PASSED] DP_REMOTE_DPCD_READ with port number
[16:53:23] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[16:53:23] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[16:53:23] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[16:53:23] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[16:53:23] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[16:53:23] [PASSED] DP_REMOTE_I2C_READ with port number
[16:53:23] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[16:53:23] [PASSED] DP_REMOTE_I2C_READ with transactions array
[16:53:23] [PASSED] DP_REMOTE_I2C_WRITE with port number
[16:53:23] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[16:53:23] [PASSED] DP_REMOTE_I2C_WRITE with data array
[16:53:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[16:53:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[16:53:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[16:53:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[16:53:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[16:53:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[16:53:23] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[16:53:23] ================ [PASSED] drm_dp_mst_helper ================
[16:53:23] ================== drm_exec (7 subtests) ===================
[16:53:23] [PASSED] sanitycheck
[16:53:23] [PASSED] test_lock
[16:53:23] [PASSED] test_lock_unlock
[16:53:23] [PASSED] test_duplicates
[16:53:23] [PASSED] test_prepare
[16:53:23] [PASSED] test_prepare_array
[16:53:23] [PASSED] test_multiple_loops
[16:53:23] ==================== [PASSED] drm_exec =====================
[16:53:23] =========== drm_format_helper_test (17 subtests) ===========
[16:53:23] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[16:53:23] [PASSED] single_pixel_source_buffer
[16:53:23] [PASSED] single_pixel_clip_rectangle
[16:53:23] [PASSED] well_known_colors
[16:53:23] [PASSED] destination_pitch
[16:53:23] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[16:53:23] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[16:53:23] [PASSED] single_pixel_source_buffer
[16:53:23] [PASSED] single_pixel_clip_rectangle
[16:53:23] [PASSED] well_known_colors
[16:53:23] [PASSED] destination_pitch
[16:53:23] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[16:53:23] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[16:53:23] [PASSED] single_pixel_source_buffer
[16:53:23] [PASSED] single_pixel_clip_rectangle
[16:53:23] [PASSED] well_known_colors
[16:53:23] [PASSED] destination_pitch
[16:53:23] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[16:53:23] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[16:53:23] [PASSED] single_pixel_source_buffer
[16:53:23] [PASSED] single_pixel_clip_rectangle
[16:53:23] [PASSED] well_known_colors
[16:53:23] [PASSED] destination_pitch
[16:53:23] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[16:53:23] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[16:53:23] [PASSED] single_pixel_source_buffer
[16:53:23] [PASSED] single_pixel_clip_rectangle
[16:53:23] [PASSED] well_known_colors
[16:53:23] [PASSED] destination_pitch
[16:53:23] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[16:53:23] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[16:53:23] [PASSED] single_pixel_source_buffer
[16:53:23] [PASSED] single_pixel_clip_rectangle
[16:53:23] [PASSED] well_known_colors
[16:53:23] [PASSED] destination_pitch
[16:53:23] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[16:53:23] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[16:53:23] [PASSED] single_pixel_source_buffer
[16:53:23] [PASSED] single_pixel_clip_rectangle
[16:53:23] [PASSED] well_known_colors
[16:53:23] [PASSED] destination_pitch
[16:53:23] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[16:53:23] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[16:53:23] [PASSED] single_pixel_source_buffer
[16:53:23] [PASSED] single_pixel_clip_rectangle
[16:53:23] [PASSED] well_known_colors
[16:53:23] [PASSED] destination_pitch
[16:53:23] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[16:53:23] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[16:53:23] [PASSED] single_pixel_source_buffer
[16:53:23] [PASSED] single_pixel_clip_rectangle
[16:53:23] [PASSED] well_known_colors
[16:53:23] [PASSED] destination_pitch
[16:53:23] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[16:53:23] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[16:53:23] [PASSED] single_pixel_source_buffer
[16:53:23] [PASSED] single_pixel_clip_rectangle
[16:53:23] [PASSED] well_known_colors
[16:53:23] [PASSED] destination_pitch
[16:53:23] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[16:53:23] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[16:53:23] [PASSED] single_pixel_source_buffer
[16:53:23] [PASSED] single_pixel_clip_rectangle
[16:53:23] [PASSED] well_known_colors
[16:53:23] [PASSED] destination_pitch
[16:53:23] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[16:53:23] ============== drm_test_fb_xrgb8888_to_mono  ===============
[16:53:23] [PASSED] single_pixel_source_buffer
[16:53:23] [PASSED] single_pixel_clip_rectangle
[16:53:23] [PASSED] well_known_colors
[16:53:23] [PASSED] destination_pitch
[16:53:23] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[16:53:23] ==================== drm_test_fb_swab  =====================
[16:53:23] [PASSED] single_pixel_source_buffer
[16:53:23] [PASSED] single_pixel_clip_rectangle
[16:53:23] [PASSED] well_known_colors
[16:53:23] [PASSED] destination_pitch
[16:53:23] ================ [PASSED] drm_test_fb_swab =================
[16:53:23] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[16:53:23] [PASSED] single_pixel_source_buffer
[16:53:23] [PASSED] single_pixel_clip_rectangle
[16:53:23] [PASSED] well_known_colors
[16:53:23] [PASSED] destination_pitch
[16:53:23] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[16:53:23] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[16:53:23] [PASSED] single_pixel_source_buffer
[16:53:23] [PASSED] single_pixel_clip_rectangle
[16:53:23] [PASSED] well_known_colors
[16:53:23] [PASSED] destination_pitch
[16:53:23] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[16:53:23] ================= drm_test_fb_clip_offset  =================
[16:53:23] [PASSED] pass through
[16:53:23] [PASSED] horizontal offset
[16:53:23] [PASSED] vertical offset
[16:53:23] [PASSED] horizontal and vertical offset
[16:53:23] [PASSED] horizontal offset (custom pitch)
[16:53:23] [PASSED] vertical offset (custom pitch)
[16:53:23] [PASSED] horizontal and vertical offset (custom pitch)
[16:53:23] ============= [PASSED] drm_test_fb_clip_offset =============
[16:53:23] =================== drm_test_fb_memcpy  ====================
[16:53:23] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[16:53:23] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[16:53:23] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[16:53:23] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[16:53:23] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[16:53:23] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[16:53:23] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[16:53:23] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[16:53:23] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[16:53:23] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[16:53:23] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[16:53:23] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[16:53:23] =============== [PASSED] drm_test_fb_memcpy ================
[16:53:23] ============= [PASSED] drm_format_helper_test ==============
[16:53:23] ================= drm_format (18 subtests) =================
[16:53:23] [PASSED] drm_test_format_block_width_invalid
[16:53:23] [PASSED] drm_test_format_block_width_one_plane
[16:53:23] [PASSED] drm_test_format_block_width_two_plane
[16:53:23] [PASSED] drm_test_format_block_width_three_plane
[16:53:23] [PASSED] drm_test_format_block_width_tiled
[16:53:23] [PASSED] drm_test_format_block_height_invalid
[16:53:23] [PASSED] drm_test_format_block_height_one_plane
[16:53:23] [PASSED] drm_test_format_block_height_two_plane
[16:53:23] [PASSED] drm_test_format_block_height_three_plane
[16:53:23] [PASSED] drm_test_format_block_height_tiled
[16:53:23] [PASSED] drm_test_format_min_pitch_invalid
[16:53:23] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[16:53:23] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[16:53:23] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[16:53:23] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[16:53:23] [PASSED] drm_test_format_min_pitch_two_plane
[16:53:23] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[16:53:23] [PASSED] drm_test_format_min_pitch_tiled
[16:53:23] =================== [PASSED] drm_format ====================
[16:53:23] ============== drm_framebuffer (10 subtests) ===============
[16:53:23] ========== drm_test_framebuffer_check_src_coords  ==========
[16:53:23] [PASSED] Success: source fits into fb
[16:53:23] [PASSED] Fail: overflowing fb with x-axis coordinate
[16:53:23] [PASSED] Fail: overflowing fb with y-axis coordinate
[16:53:23] [PASSED] Fail: overflowing fb with source width
[16:53:23] [PASSED] Fail: overflowing fb with source height
[16:53:23] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[16:53:23] [PASSED] drm_test_framebuffer_cleanup
[16:53:23] =============== drm_test_framebuffer_create  ===============
[16:53:23] [PASSED] ABGR8888 normal sizes
[16:53:23] [PASSED] ABGR8888 max sizes
[16:53:23] [PASSED] ABGR8888 pitch greater than min required
[16:53:23] [PASSED] ABGR8888 pitch less than min required
[16:53:23] [PASSED] ABGR8888 Invalid width
[16:53:23] [PASSED] ABGR8888 Invalid buffer handle
[16:53:23] [PASSED] No pixel format
[16:53:23] [PASSED] ABGR8888 Width 0
[16:53:23] [PASSED] ABGR8888 Height 0
[16:53:23] [PASSED] ABGR8888 Out of bound height * pitch combination
[16:53:23] [PASSED] ABGR8888 Large buffer offset
[16:53:23] [PASSED] ABGR8888 Buffer offset for inexistent plane
[16:53:23] [PASSED] ABGR8888 Invalid flag
[16:53:23] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[16:53:23] [PASSED] ABGR8888 Valid buffer modifier
[16:53:23] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[16:53:23] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[16:53:23] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[16:53:23] [PASSED] NV12 Normal sizes
[16:53:23] [PASSED] NV12 Max sizes
[16:53:23] [PASSED] NV12 Invalid pitch
[16:53:23] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[16:53:23] [PASSED] NV12 different  modifier per-plane
[16:53:23] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[16:53:23] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[16:53:23] [PASSED] NV12 Modifier for inexistent plane
[16:53:23] [PASSED] NV12 Handle for inexistent plane
[16:53:23] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[16:53:23] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[16:53:23] [PASSED] YVU420 Normal sizes
[16:53:23] [PASSED] YVU420 Max sizes
[16:53:23] [PASSED] YVU420 Invalid pitch
[16:53:23] [PASSED] YVU420 Different pitches
[16:53:23] [PASSED] YVU420 Different buffer offsets/pitches
[16:53:23] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[16:53:23] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[16:53:23] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[16:53:23] [PASSED] YVU420 Valid modifier
[16:53:23] [PASSED] YVU420 Different modifiers per plane
[16:53:23] [PASSED] YVU420 Modifier for inexistent plane
[16:53:23] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[16:53:23] [PASSED] X0L2 Normal sizes
[16:53:23] [PASSED] X0L2 Max sizes
[16:53:23] [PASSED] X0L2 Invalid pitch
[16:53:23] [PASSED] X0L2 Pitch greater than minimum required
[16:53:23] [PASSED] X0L2 Handle for inexistent plane
[16:53:23] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[16:53:23] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[16:53:23] [PASSED] X0L2 Valid modifier
[16:53:23] [PASSED] X0L2 Modifier for inexistent plane
[16:53:23] =========== [PASSED] drm_test_framebuffer_create ===========
[16:53:23] [PASSED] drm_test_framebuffer_free
[16:53:23] [PASSED] drm_test_framebuffer_init
[16:53:23] [PASSED] drm_test_framebuffer_init_bad_format
[16:53:23] [PASSED] drm_test_framebuffer_init_dev_mismatch
[16:53:23] [PASSED] drm_test_framebuffer_lookup
[16:53:23] [PASSED] drm_test_framebuffer_lookup_inexistent
[16:53:23] [PASSED] drm_test_framebuffer_modifiers_not_supported
[16:53:23] ================= [PASSED] drm_framebuffer =================
[16:53:23] ================ drm_gem_shmem (8 subtests) ================
[16:53:23] [PASSED] drm_gem_shmem_test_obj_create
[16:53:23] [PASSED] drm_gem_shmem_test_obj_create_private
[16:53:23] [PASSED] drm_gem_shmem_test_pin_pages
[16:53:23] [PASSED] drm_gem_shmem_test_vmap
[16:53:23] [PASSED] drm_gem_shmem_test_get_sg_table
[16:53:23] [PASSED] drm_gem_shmem_test_get_pages_sgt
[16:53:23] [PASSED] drm_gem_shmem_test_madvise
[16:53:23] [PASSED] drm_gem_shmem_test_purge
[16:53:23] ================== [PASSED] drm_gem_shmem ==================
[16:53:23] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[16:53:23] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[16:53:23] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[16:53:23] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[16:53:23] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[16:53:23] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[16:53:23] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[16:53:23] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[16:53:23] [PASSED] Automatic
[16:53:23] [PASSED] Full
[16:53:23] [PASSED] Limited 16:235
[16:53:23] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[16:53:23] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[16:53:23] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[16:53:23] [PASSED] drm_test_check_disable_connector
[16:53:23] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[16:53:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[16:53:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[16:53:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[16:53:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[16:53:23] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[16:53:23] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[16:53:23] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[16:53:23] [PASSED] drm_test_check_output_bpc_dvi
[16:53:23] [PASSED] drm_test_check_output_bpc_format_vic_1
[16:53:23] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[16:53:23] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[16:53:23] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[16:53:23] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[16:53:23] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[16:53:23] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[16:53:23] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[16:53:23] ============ drm_test_check_hdmi_color_format  =============
[16:53:23] [PASSED] AUTO -> RGB
[16:53:23] [PASSED] YCBCR422 -> YUV422
[16:53:23] [PASSED] YCBCR420 -> YUV420
[16:53:23] [PASSED] YCBCR444 -> YUV444
[16:53:23] [PASSED] RGB -> RGB
[16:53:23] ======== [PASSED] drm_test_check_hdmi_color_format =========
[16:53:23] ======== drm_test_check_hdmi_color_format_420_only  ========
[16:53:23] [PASSED] RGB should fail
[16:53:23] [PASSED] YUV444 should fail
[16:53:23] [PASSED] YUV422 should fail
[16:53:23] [PASSED] YUV420 should work
[16:53:23] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[16:53:23] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[16:53:23] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[16:53:23] [PASSED] drm_test_check_broadcast_rgb_value
[16:53:23] [PASSED] drm_test_check_bpc_8_value
[16:53:23] [PASSED] drm_test_check_bpc_10_value
[16:53:23] [PASSED] drm_test_check_bpc_12_value
[16:53:23] [PASSED] drm_test_check_format_value
[16:53:23] [PASSED] drm_test_check_tmds_char_value
[16:53:23] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[16:53:23] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[16:53:23] [PASSED] drm_test_check_mode_valid
[16:53:23] [PASSED] drm_test_check_mode_valid_reject
[16:53:23] [PASSED] drm_test_check_mode_valid_reject_rate
[16:53:23] [PASSED] drm_test_check_mode_valid_reject_max_clock
[16:53:23] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[16:53:23] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[16:53:23] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[16:53:23] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[16:53:23] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[16:53:23] [PASSED] drm_test_check_infoframes
[16:53:23] [PASSED] drm_test_check_reject_avi_infoframe
[16:53:23] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[16:53:23] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[16:53:23] [PASSED] drm_test_check_reject_audio_infoframe
[16:53:23] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[16:53:23] ================= drm_managed (2 subtests) =================
[16:53:23] [PASSED] drm_test_managed_release_action
[16:53:23] [PASSED] drm_test_managed_run_action
[16:53:23] =================== [PASSED] drm_managed ===================
[16:53:23] =================== drm_mm (6 subtests) ====================
[16:53:23] [PASSED] drm_test_mm_init
[16:53:23] [PASSED] drm_test_mm_debug
[16:53:23] [PASSED] drm_test_mm_align32
[16:53:23] [PASSED] drm_test_mm_align64
[16:53:23] [PASSED] drm_test_mm_lowest
[16:53:23] [PASSED] drm_test_mm_highest
[16:53:23] ===================== [PASSED] drm_mm ======================
[16:53:23] ============= drm_modes_analog_tv (5 subtests) =============
[16:53:23] [PASSED] drm_test_modes_analog_tv_mono_576i
[16:53:23] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[16:53:23] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[16:53:23] [PASSED] drm_test_modes_analog_tv_pal_576i
[16:53:23] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[16:53:23] =============== [PASSED] drm_modes_analog_tv ===============
[16:53:23] ============== drm_plane_helper (2 subtests) ===============
[16:53:23] =============== drm_test_check_plane_state  ================
[16:53:23] [PASSED] clipping_simple
[16:53:23] [PASSED] clipping_rotate_reflect
[16:53:23] [PASSED] positioning_simple
[16:53:23] [PASSED] upscaling
[16:53:23] [PASSED] downscaling
[16:53:23] [PASSED] rounding1
[16:53:23] [PASSED] rounding2
[16:53:23] [PASSED] rounding3
[16:53:23] [PASSED] rounding4
[16:53:23] =========== [PASSED] drm_test_check_plane_state ============
[16:53:23] =========== drm_test_check_invalid_plane_state  ============
[16:53:23] [PASSED] positioning_invalid
[16:53:23] [PASSED] upscaling_invalid
[16:53:23] [PASSED] downscaling_invalid
[16:53:23] ======= [PASSED] drm_test_check_invalid_plane_state ========
[16:53:23] ================ [PASSED] drm_plane_helper =================
[16:53:23] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[16:53:23] ====== drm_test_connector_helper_tv_get_modes_check  =======
[16:53:23] [PASSED] None
[16:53:23] [PASSED] PAL
[16:53:23] [PASSED] NTSC
[16:53:23] [PASSED] Both, NTSC Default
[16:53:23] [PASSED] Both, PAL Default
[16:53:23] [PASSED] Both, NTSC Default, with PAL on command-line
[16:53:23] [PASSED] Both, PAL Default, with NTSC on command-line
[16:53:23] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[16:53:23] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[16:53:23] ================== drm_rect (9 subtests) ===================
[16:53:23] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[16:53:23] [PASSED] drm_test_rect_clip_scaled_not_clipped
[16:53:23] [PASSED] drm_test_rect_clip_scaled_clipped
[16:53:23] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[16:53:23] ================= drm_test_rect_intersect  =================
[16:53:23] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[16:53:23] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[16:53:23] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[16:53:23] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[16:53:23] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[16:53:23] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[16:53:23] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[16:53:23] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[16:53:23] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[16:53:23] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[16:53:23] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[16:53:23] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[16:53:23] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[16:53:23] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[16:53:23] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[16:53:23] ============= [PASSED] drm_test_rect_intersect =============
[16:53:23] ================ drm_test_rect_calc_hscale  ================
[16:53:23] [PASSED] normal use
[16:53:23] [PASSED] out of max range
[16:53:23] [PASSED] out of min range
[16:53:23] [PASSED] zero dst
[16:53:23] [PASSED] negative src
[16:53:23] [PASSED] negative dst
[16:53:23] ============ [PASSED] drm_test_rect_calc_hscale ============
[16:53:23] ================ drm_test_rect_calc_vscale  ================
[16:53:23] [PASSED] normal use
[16:53:23] [PASSED] out of max range
[16:53:23] [PASSED] out of min range
[16:53:23] [PASSED] zero dst
[16:53:23] [PASSED] negative src
[16:53:23] [PASSED] negative dst
[16:53:23] ============ [PASSED] drm_test_rect_calc_vscale ============
[16:53:23] ================== drm_test_rect_rotate  ===================
[16:53:23] [PASSED] reflect-x
[16:53:23] [PASSED] reflect-y
[16:53:23] [PASSED] rotate-0
[16:53:23] [PASSED] rotate-90
[16:53:23] [PASSED] rotate-180
[16:53:23] [PASSED] rotate-270
[16:53:23] ============== [PASSED] drm_test_rect_rotate ===============
[16:53:23] ================ drm_test_rect_rotate_inv  =================
[16:53:23] [PASSED] reflect-x
[16:53:23] [PASSED] reflect-y
[16:53:23] [PASSED] rotate-0
[16:53:23] [PASSED] rotate-90
[16:53:23] [PASSED] rotate-180
[16:53:23] [PASSED] rotate-270
[16:53:23] ============ [PASSED] drm_test_rect_rotate_inv =============
[16:53:23] ==================== [PASSED] drm_rect =====================
[16:53:23] ============ drm_sysfb_modeset_test (1 subtest) ============
[16:53:23] ============ drm_test_sysfb_build_fourcc_list  =============
[16:53:23] [PASSED] no native formats
[16:53:23] [PASSED] XRGB8888 as native format
[16:53:23] [PASSED] remove duplicates
[16:53:23] [PASSED] convert alpha formats
[16:53:23] [PASSED] random formats
[16:53:23] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[16:53:23] ============= [PASSED] drm_sysfb_modeset_test ==============
[16:53:23] ================== drm_fixp (2 subtests) ===================
[16:53:23] [PASSED] drm_test_int2fixp
[16:53:23] [PASSED] drm_test_sm2fixp
[16:53:23] ==================== [PASSED] drm_fixp =====================
[16:53:23] ============================================================
[16:53:23] Testing complete. Ran 641 tests: passed: 641
[16:53:23] Elapsed time: 26.643s total, 1.784s configuring, 24.694s building, 0.150s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[16:53:23] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:53:25] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:53:35] Starting KUnit Kernel (1/1)...
[16:53:35] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:53:35] ============= refcount_interrupt (4 subtests) ==============
[16:53:35] [PASSED] test_single_irq_change
[16:53:35] [PASSED] test_nested_irq_change
[16:53:35] [PASSED] test_multiple_irq_change
[16:53:35] [PASSED] test_irq_save
[16:53:35] =============== [PASSED] refcount_interrupt ================
[16:53:35] ================= ttm_device (5 subtests) ==================
[16:53:35] [PASSED] ttm_device_init_basic
[16:53:35] [PASSED] ttm_device_init_multiple
[16:53:35] [PASSED] ttm_device_fini_basic
[16:53:35] [PASSED] ttm_device_init_no_vma_man
[16:53:35] ================== ttm_device_init_pools  ==================
[16:53:35] [PASSED] No DMA allocations, no DMA32 required
[16:53:35] [PASSED] DMA allocations, DMA32 required
[16:53:35] [PASSED] No DMA allocations, DMA32 required
[16:53:35] [PASSED] DMA allocations, no DMA32 required
[16:53:35] ============== [PASSED] ttm_device_init_pools ==============
[16:53:35] =================== [PASSED] ttm_device ====================
[16:53:35] ================== ttm_pool (8 subtests) ===================
[16:53:35] ================== ttm_pool_alloc_basic  ===================
[16:53:35] [PASSED] One page
[16:53:35] [PASSED] More than one page
[16:53:35] [PASSED] Above the allocation limit
[16:53:35] [PASSED] One page, with coherent DMA mappings enabled
[16:53:35] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:53:35] ============== [PASSED] ttm_pool_alloc_basic ===============
[16:53:35] ============== ttm_pool_alloc_basic_dma_addr  ==============
[16:53:35] [PASSED] One page
[16:53:35] [PASSED] More than one page
[16:53:35] [PASSED] Above the allocation limit
[16:53:35] [PASSED] One page, with coherent DMA mappings enabled
[16:53:35] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:53:35] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[16:53:35] [PASSED] ttm_pool_alloc_order_caching_match
[16:53:35] [PASSED] ttm_pool_alloc_caching_mismatch
[16:53:35] [PASSED] ttm_pool_alloc_order_mismatch
[16:53:35] [PASSED] ttm_pool_free_dma_alloc
[16:53:35] [PASSED] ttm_pool_free_no_dma_alloc
[16:53:35] [PASSED] ttm_pool_fini_basic
[16:53:35] ==================== [PASSED] ttm_pool =====================
[16:53:35] ================ ttm_resource (8 subtests) =================
[16:53:35] ================= ttm_resource_init_basic  =================
[16:53:35] [PASSED] Init resource in TTM_PL_SYSTEM
[16:53:35] [PASSED] Init resource in TTM_PL_VRAM
[16:53:35] [PASSED] Init resource in a private placement
[16:53:35] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[16:53:35] ============= [PASSED] ttm_resource_init_basic =============
[16:53:35] [PASSED] ttm_resource_init_pinned
[16:53:35] [PASSED] ttm_resource_fini_basic
[16:53:35] [PASSED] ttm_resource_manager_init_basic
[16:53:35] [PASSED] ttm_resource_manager_usage_basic
[16:53:35] [PASSED] ttm_resource_manager_set_used_basic
[16:53:35] [PASSED] ttm_sys_man_alloc_basic
[16:53:35] [PASSED] ttm_sys_man_free_basic
[16:53:35] ================== [PASSED] ttm_resource ===================
[16:53:35] =================== ttm_tt (15 subtests) ===================
[16:53:35] ==================== ttm_tt_init_basic  ====================
[16:53:35] [PASSED] Page-aligned size
[16:53:35] [PASSED] Extra pages requested
[16:53:35] ================ [PASSED] ttm_tt_init_basic ================
[16:53:35] [PASSED] ttm_tt_init_misaligned
[16:53:35] [PASSED] ttm_tt_fini_basic
[16:53:35] [PASSED] ttm_tt_fini_sg
[16:53:35] [PASSED] ttm_tt_fini_shmem
[16:53:35] [PASSED] ttm_tt_create_basic
[16:53:35] [PASSED] ttm_tt_create_invalid_bo_type
[16:53:35] [PASSED] ttm_tt_create_ttm_exists
[16:53:35] [PASSED] ttm_tt_create_failed
[16:53:35] [PASSED] ttm_tt_destroy_basic
[16:53:35] [PASSED] ttm_tt_populate_null_ttm
[16:53:35] [PASSED] ttm_tt_populate_populated_ttm
[16:53:35] [PASSED] ttm_tt_unpopulate_basic
[16:53:35] [PASSED] ttm_tt_unpopulate_empty_ttm
[16:53:35] [PASSED] ttm_tt_swapin_basic
[16:53:35] ===================== [PASSED] ttm_tt ======================
[16:53:35] =================== ttm_bo (14 subtests) ===================
[16:53:35] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[16:53:35] [PASSED] Cannot be interrupted and sleeps
[16:53:35] [PASSED] Cannot be interrupted, locks straight away
[16:53:35] [PASSED] Can be interrupted, sleeps
[16:53:35] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[16:53:35] [PASSED] ttm_bo_reserve_locked_no_sleep
[16:53:35] [PASSED] ttm_bo_reserve_no_wait_ticket
[16:53:35] [PASSED] ttm_bo_reserve_double_resv
[16:53:35] [PASSED] ttm_bo_reserve_interrupted
[16:53:35] [PASSED] ttm_bo_reserve_deadlock
[16:53:35] [PASSED] ttm_bo_unreserve_basic
[16:53:35] [PASSED] ttm_bo_unreserve_pinned
[16:53:35] [PASSED] ttm_bo_unreserve_bulk
[16:53:35] [PASSED] ttm_bo_fini_basic
[16:53:35] [PASSED] ttm_bo_fini_shared_resv
[16:53:35] [PASSED] ttm_bo_pin_basic
[16:53:35] [PASSED] ttm_bo_pin_unpin_resource
[16:53:35] [PASSED] ttm_bo_multiple_pin_one_unpin
[16:53:35] ===================== [PASSED] ttm_bo ======================
[16:53:35] ============== ttm_bo_validate (22 subtests) ===============
[16:53:35] ============== ttm_bo_init_reserved_sys_man  ===============
[16:53:35] [PASSED] Buffer object for userspace
[16:53:35] [PASSED] Kernel buffer object
[16:53:35] [PASSED] Shared buffer object
[16:53:35] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[16:53:35] ============== ttm_bo_init_reserved_mock_man  ==============
[16:53:35] [PASSED] Buffer object for userspace
[16:53:35] [PASSED] Kernel buffer object
[16:53:35] [PASSED] Shared buffer object
[16:53:35] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[16:53:35] [PASSED] ttm_bo_init_reserved_resv
[16:53:35] ================== ttm_bo_validate_basic  ==================
[16:53:35] [PASSED] Buffer object for userspace
[16:53:35] [PASSED] Kernel buffer object
[16:53:35] [PASSED] Shared buffer object
[16:53:35] ============== [PASSED] ttm_bo_validate_basic ==============
[16:53:35] [PASSED] ttm_bo_validate_invalid_placement
[16:53:35] ============= ttm_bo_validate_same_placement  ==============
[16:53:35] [PASSED] System manager
[16:53:35] [PASSED] VRAM manager
[16:53:35] ========= [PASSED] ttm_bo_validate_same_placement ==========
[16:53:35] [PASSED] ttm_bo_validate_failed_alloc
[16:53:35] [PASSED] ttm_bo_validate_pinned
[16:53:35] [PASSED] ttm_bo_validate_busy_placement
[16:53:35] ================ ttm_bo_validate_multihop  =================
[16:53:35] [PASSED] Buffer object for userspace
[16:53:35] [PASSED] Kernel buffer object
[16:53:35] [PASSED] Shared buffer object
[16:53:35] ============ [PASSED] ttm_bo_validate_multihop =============
[16:53:35] ========== ttm_bo_validate_no_placement_signaled  ==========
[16:53:35] [PASSED] Buffer object in system domain, no page vector
[16:53:35] [PASSED] Buffer object in system domain with an existing page vector
[16:53:35] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[16:53:35] ======== ttm_bo_validate_no_placement_not_signaled  ========
[16:53:35] [PASSED] Buffer object for userspace
[16:53:35] [PASSED] Kernel buffer object
[16:53:35] [PASSED] Shared buffer object
[16:53:35] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[16:53:35] [PASSED] ttm_bo_validate_move_fence_signaled
[16:53:35] ========= ttm_bo_validate_move_fence_not_signaled  =========
[16:53:35] [PASSED] Waits for GPU
[16:53:35] [PASSED] Tries to lock straight away
[16:53:35] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[16:53:35] [PASSED] ttm_bo_validate_swapout
[16:53:35] [PASSED] ttm_bo_validate_happy_evict
[16:53:35] [PASSED] ttm_bo_validate_all_pinned_evict
[16:53:35] [PASSED] ttm_bo_validate_allowed_only_evict
[16:53:35] [PASSED] ttm_bo_validate_deleted_evict
[16:53:35] [PASSED] ttm_bo_validate_busy_domain_evict
[16:53:35] [PASSED] ttm_bo_validate_evict_gutting
[16:53:35] [PASSED] ttm_bo_validate_recrusive_evict
[16:53:35] ================= [PASSED] ttm_bo_validate =================
[16:53:35] ============================================================
[16:53:35] Testing complete. Ran 106 tests: passed: 106
[16:53:35] Elapsed time: 12.133s total, 1.828s configuring, 10.090s building, 0.185s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[16:53:35] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:53:37] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:53:46] Starting KUnit Kernel (1/1)...
[16:53:46] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:53:46] ============= refcount_interrupt (4 subtests) ==============
[16:53:46] [PASSED] test_single_irq_change
[16:53:46] [PASSED] test_nested_irq_change
[16:53:46] [PASSED] test_multiple_irq_change
[16:53:46] [PASSED] test_irq_save
[16:53:46] =============== [PASSED] refcount_interrupt ================
[16:53:46] =============== dma-buf-fence (12 subtests) ================
[16:53:46] [PASSED] test_sanitycheck
[16:53:46] [PASSED] test_signaling
[16:53:46] [PASSED] test_add_callback
[16:53:46] [PASSED] test_late_add_callback
[16:53:46] [PASSED] test_rm_callback
[16:53:46] [PASSED] test_late_rm_callback
[16:53:46] [PASSED] test_status
[16:53:46] [PASSED] test_error
[16:53:46] [PASSED] test_wait
[16:53:46] [PASSED] test_wait_timeout
[16:53:46] [PASSED] test_stub
[16:53:46] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[16:53:46] ================== [PASSED] dma-buf-fence ==================
[16:53:46] ============ dma-buf-fence-chain (11 subtests) =============
[16:53:46] [PASSED] test_sanitycheck
[16:53:46] [PASSED] test_find_seqno
[16:53:46] [PASSED] test_find_signaled
[16:53:46] [PASSED] test_find_out_of_order
[16:53:51] [PASSED] test_find_gap
[16:53:51] [PASSED] test_find_race
[16:53:51] [PASSED] test_signal_forward
[16:53:51] [PASSED] test_signal_backward
[16:53:51] [PASSED] test_wait_forward
[16:53:51] [PASSED] test_wait_backward
[16:53:51] [PASSED] test_wait_random
[16:53:51] =============== [PASSED] dma-buf-fence-chain ===============
[16:53:51] ============ dma-buf-fence-unwrap (10 subtests) ============
[16:53:51] [PASSED] test_sanitycheck
[16:53:51] [PASSED] test_unwrap_array
[16:53:51] [PASSED] test_unwrap_chain
[16:53:51] [PASSED] test_unwrap_chain_array
[16:53:51] [PASSED] test_unwrap_merge
[16:53:51] [PASSED] test_unwrap_merge_duplicate
[16:53:51] [PASSED] test_unwrap_merge_seqno
[16:53:51] [PASSED] test_unwrap_merge_order
[16:53:51] [PASSED] test_unwrap_merge_complex
[16:53:51] [PASSED] test_unwrap_merge_complex_seqno
[16:53:51] ============== [PASSED] dma-buf-fence-unwrap ===============
[16:53:51] ================ dma-buf-resv (5 subtests) =================
[16:53:51] [PASSED] test_sanitycheck
[16:53:51] ===================== test_signaling  ======================
[16:53:51] [PASSED] kernel
[16:53:51] [PASSED] write
[16:53:51] [PASSED] read
[16:53:51] [PASSED] bookkeep
[16:53:51] ================= [PASSED] test_signaling ==================
[16:53:51] ====================== test_for_each  ======================
[16:53:51] [PASSED] kernel
[16:53:51] [PASSED] write
[16:53:51] [PASSED] read
[16:53:51] [PASSED] bookkeep
[16:53:51] ================== [PASSED] test_for_each ==================
[16:53:51] ================= test_for_each_unlocked  ==================
[16:53:51] [PASSED] kernel
[16:53:51] [PASSED] write
[16:53:51] [PASSED] read
[16:53:51] [PASSED] bookkeep
[16:53:51] ============= [PASSED] test_for_each_unlocked ==============
[16:53:51] ===================== test_get_fences  =====================
[16:53:51] [PASSED] kernel
[16:53:51] [PASSED] write
[16:53:51] [PASSED] read
[16:53:51] [PASSED] bookkeep
[16:53:51] ================= [PASSED] test_get_fences =================
[16:53:51] ================== [PASSED] dma-buf-resv ===================
[16:53:51] ============================================================
[16:53:51] Testing complete. Ran 54 tests: passed: 53, skipped: 1
[16:53:51] Elapsed time: 15.834s total, 1.830s configuring, 8.633s building, 5.343s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Separate GGTT pools for submissions and VFs provisioning (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 886 bytes --]

== Series Details ==

Series: Separate GGTT pools for submissions and VFs provisioning (rev4)
URL   : https://patchwork.freedesktop.org/series/171735/
State : success

== Summary ==

CI Bug Log - changes from xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77_BAT -> xe-pw-171735v4_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77 -> xe-pw-171735v4

  IGT_9078: 9078
  xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77: b8f17b16c0f8638b9df4f090511e3ae97210eb77
  xe-pw-171735v4: 171735v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/index.html

[-- Attachment #2: Type: text/html, Size: 1434 bytes --]

✓ Xe.CI.FULL: success for Separate GGTT pools for submissions and VFs provisioning (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 73455 bytes --]

== Series Details ==

Series: Separate GGTT pools for submissions and VFs provisioning (rev4)
URL   : https://patchwork.freedesktop.org/series/171735/
State : success

== Summary ==

CI Bug Log - changes from xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77_FULL -> xe-pw-171735v4_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-171735v4_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@intel_hwmon@hwmon-read:
    - shard-lnl:          NOTRUN -> [SKIP][1] ([Intel XE#1125] / [Intel XE#7312])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@intel_hwmon@hwmon-read.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][2] ([Intel XE#2327]) +4 other tests skip
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_big_fb@4-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-lnl:          NOTRUN -> [SKIP][3] ([Intel XE#3658] / [Intel XE#7360])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-270:
    - shard-lnl:          NOTRUN -> [SKIP][4] ([Intel XE#1407]) +6 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-180:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#1124]) +10 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html

  * igt@kms_big_fb@y-tiled-32bpp-rotate-0:
    - shard-lnl:          NOTRUN -> [SKIP][6] ([Intel XE#1124]) +10 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-lnl:          NOTRUN -> [SKIP][7] ([Intel XE#1477] / [Intel XE#7361]) +1 other test skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_bw@connected-linear-tiling-2-displays-target-3840x2160p:
    - shard-lnl:          NOTRUN -> [SKIP][8] ([Intel XE#7679]) +1 other test skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@kms_bw@connected-linear-tiling-2-displays-target-3840x2160p.html

  * igt@kms_bw@connected-linear-tiling-3-displays-target-1920x1080p:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#7679])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_bw@connected-linear-tiling-3-displays-target-1920x1080p.html

  * igt@kms_bw@connected-linear-tiling-4-displays-target-3840x2160p:
    - shard-lnl:          NOTRUN -> [SKIP][10] ([Intel XE#8365])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@kms_bw@connected-linear-tiling-4-displays-target-3840x2160p.html

  * igt@kms_bw@linear-tiling-2-displays-target-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#367]) +1 other test skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_bw@linear-tiling-2-displays-target-2160x1440p.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][12] ([Intel XE#2887]) +17 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][13] ([Intel XE#3432]) +2 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][14] ([Intel XE#2669] / [Intel XE#7389]) +3 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-edp-1.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#2887]) +14 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-d-hdmi-a-3:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#2652]) +17 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-lnl:          NOTRUN -> [SKIP][17] ([Intel XE#7008])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_chamelium_audio@dp-audio-after-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#2252]) +7 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_chamelium_audio@dp-audio-after-suspend.html
    - shard-lnl:          NOTRUN -> [SKIP][19] ([Intel XE#2252])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@kms_chamelium_audio@dp-audio-after-suspend.html

  * igt@kms_chamelium_color@ctm-0-75:
    - shard-lnl:          NOTRUN -> [SKIP][20] ([Intel XE#306] / [Intel XE#7358]) +1 other test skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_chamelium_color@ctm-0-75.html

  * igt@kms_chamelium_color@ctm-negative:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#2325] / [Intel XE#7358]) +1 other test skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-8/igt@kms_chamelium_color@ctm-negative.html

  * igt@kms_chamelium_color_pipeline@plane-lut1d-lut1d:
    - shard-lnl:          NOTRUN -> [SKIP][22] ([Intel XE#7358]) +2 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@kms_chamelium_color_pipeline@plane-lut1d-lut1d.html

  * igt@kms_chamelium_color_pipeline@plane-lut1d-pre-ctm3x4:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#7358]) +1 other test skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_chamelium_color_pipeline@plane-lut1d-pre-ctm3x4.html

  * igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
    - shard-lnl:          NOTRUN -> [SKIP][24] ([Intel XE#373]) +8 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html

  * igt@kms_color_pipeline@plane-lut3d-green-only:
    - shard-lnl:          NOTRUN -> [SKIP][25] ([Intel XE#6969] / [Intel XE#7006]) +1 other test skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@kms_color_pipeline@plane-lut3d-green-only.html

  * igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-0:
    - shard-lnl:          NOTRUN -> [SKIP][26] ([Intel XE#6969]) +7 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@kms_color_pipeline@plane-lut3d-green-only@pipe-c-plane-0.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-lnl:          NOTRUN -> [SKIP][27] ([Intel XE#307] / [Intel XE#6974]) +1 other test skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@kms_content_protection@dp-mst-lic-type-0.html
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#2390] / [Intel XE#6974])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@dp-mst-lic-type-0-hdcp14:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#6974])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_content_protection@dp-mst-lic-type-0-hdcp14.html

  * igt@kms_content_protection@dp-mst-type-1-suspend-resume:
    - shard-lnl:          NOTRUN -> [SKIP][30] ([Intel XE#6974])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@kms_content_protection@dp-mst-type-1-suspend-resume.html

  * igt@kms_content_protection@legacy-hdcp14@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][31] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +3 other tests fail
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-8/igt@kms_content_protection@legacy-hdcp14@pipe-a-dp-2.html

  * igt@kms_content_protection@lic-type-0:
    - shard-lnl:          NOTRUN -> [SKIP][32] ([Intel XE#7642]) +1 other test skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_content_protection@lic-type-0.html

  * igt@kms_content_protection@type1:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#7642])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_content_protection@type1.html

  * igt@kms_content_protection@uevent:
    - shard-bmg:          NOTRUN -> [FAIL][34] ([Intel XE#6707] / [Intel XE#7439]) +1 other test fail
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-5/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-offscreen-128x42:
    - shard-lnl:          NOTRUN -> [SKIP][35] ([Intel XE#1424]) +3 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_cursor_crc@cursor-offscreen-128x42.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#2321] / [Intel XE#7355])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_crc@cursor-offscreen-512x512:
    - shard-lnl:          NOTRUN -> [SKIP][37] ([Intel XE#2321] / [Intel XE#7355]) +3 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_cursor_crc@cursor-offscreen-512x512.html

  * igt@kms_cursor_crc@cursor-sliding-256x85:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#2320]) +4 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_cursor_crc@cursor-sliding-256x85.html

  * igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy:
    - shard-lnl:          NOTRUN -> [SKIP][39] ([Intel XE#309] / [Intel XE#7343]) +4 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [PASS][40] -> [FAIL][41] ([Intel XE#7809])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-10/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-9/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-lnl:          NOTRUN -> [SKIP][42] ([Intel XE#4354] / [Intel XE#5882])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_dp_link_training@uhbr-mst:
    - shard-lnl:          NOTRUN -> [SKIP][43] ([Intel XE#4354] / [Intel XE#7386])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@kms_dp_link_training@uhbr-mst.html

  * igt@kms_dsc@dsc-fractional-bpp-bigjoiner:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#8265]) +4 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_dsc@dsc-fractional-bpp-bigjoiner.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc-bigjoiner:
    - shard-lnl:          NOTRUN -> [SKIP][45] ([Intel XE#8265]) +4 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@kms_dsc@dsc-with-output-formats-with-bpc-bigjoiner.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#4422] / [Intel XE#7442])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html

  * igt@kms_feature_discovery@chamelium:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#2372] / [Intel XE#7359])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_feature_discovery@chamelium.html

  * igt@kms_feature_discovery@display-3x:
    - shard-lnl:          NOTRUN -> [SKIP][48] ([Intel XE#703] / [Intel XE#7448])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_feature_discovery@display-3x.html

  * igt@kms_feature_discovery@display-4x:
    - shard-lnl:          NOTRUN -> [SKIP][49] ([Intel XE#1138] / [Intel XE#7344])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@kms_feature_discovery@display-4x.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible:
    - shard-lnl:          NOTRUN -> [SKIP][50] ([Intel XE#1421]) +7 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_flip@2x-flip-vs-suspend-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#7178] / [Intel XE#7349]) +2 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][52] ([Intel XE#7178] / [Intel XE#7349])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][53] ([Intel XE#1397] / [Intel XE#1745] / [Intel XE#7385])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling@pipe-a-default-mode:
    - shard-lnl:          NOTRUN -> [SKIP][54] ([Intel XE#1397] / [Intel XE#7385])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#7178] / [Intel XE#7351]) +5 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][56] ([Intel XE#7178] / [Intel XE#7351]) +4 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-nv12-linear-to-nv12-linear-reflect-x:
    - shard-lnl:          NOTRUN -> [SKIP][57] ([Intel XE#7179])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@kms_flip_scaled_crc@flip-nv12-linear-to-nv12-linear-reflect-x.html

  * igt@kms_force_connector_basic@prune-stale-modes:
    - shard-lnl:          NOTRUN -> [SKIP][58] ([Intel XE#352]) +1 other test skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@kms_force_connector_basic@prune-stale-modes.html

  * igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#7061] / [Intel XE#7356]) +6 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][60] ([Intel XE#7061] / [Intel XE#7356]) +3 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#2311]) +59 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render.html

  * igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-pri-indfb-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][62] ([Intel XE#6312]) +21 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@drrshdr-argb161616f-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][63] ([Intel XE#7061]) +5 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@kms_frontbuffer_tracking@drrshdr-argb161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#4141]) +14 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-onoff:
    - shard-lnl:          NOTRUN -> [SKIP][65] ([Intel XE#6312] / [Intel XE#651]) +16 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
    - shard-lnl:          NOTRUN -> [SKIP][66] ([Intel XE#1469] / [Intel XE#7399])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-cur-indfb-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][67] ([Intel XE#7905]) +55 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][68] ([Intel XE#7399])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrshdr-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][69] ([Intel XE#7865]) +33 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-y:
    - shard-lnl:          NOTRUN -> [SKIP][70] ([Intel XE#7399])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-y.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][71] ([Intel XE#656] / [Intel XE#7905]) +45 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-pri-shrfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][72] ([Intel XE#2313]) +60 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#7061]) +5 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-mmap-wc.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-lnl:          NOTRUN -> [SKIP][74] ([Intel XE#1470] / [Intel XE#2853])
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@kms_hdmi_inject@inject-audio.html
    - shard-bmg:          NOTRUN -> [SKIP][75] ([Intel XE#7308])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_hdr@static-toggle-dpms:
    - shard-lnl:          NOTRUN -> [SKIP][76] ([Intel XE#1503]) +1 other test skip
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@kms_hdr@static-toggle-dpms.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-lnl:          NOTRUN -> [SKIP][77] ([Intel XE#6901])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_joiner@basic-force-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][78] ([Intel XE#6911] / [Intel XE#7466])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_joiner@basic-force-ultra-joiner.html
    - shard-lnl:          NOTRUN -> [SKIP][79] ([Intel XE#6900] / [Intel XE#7362])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@kms_joiner@basic-force-ultra-joiner.html

  * igt@kms_joiner@basic-max-non-joiner:
    - shard-lnl:          NOTRUN -> [SKIP][80] ([Intel XE#4298] / [Intel XE#5873])
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@kms_joiner@basic-max-non-joiner.html

  * igt@kms_joiner@basic-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][81] ([Intel XE#6911] / [Intel XE#7378])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_joiner@basic-ultra-joiner.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][82] ([Intel XE#6901])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-bmg:          NOTRUN -> [SKIP][83] ([Intel XE#2486])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_pipe_stress@stress-xrgb8888-ytiled:
    - shard-bmg:          NOTRUN -> [SKIP][84] ([Intel XE#4329] / [Intel XE#6912] / [Intel XE#7375])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping:
    - shard-lnl:          NOTRUN -> [SKIP][85] ([Intel XE#7283]) +6 other tests skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping:
    - shard-bmg:          NOTRUN -> [SKIP][86] ([Intel XE#7283]) +5 other tests skip
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping.html

  * igt@kms_plane@planar-pixel-format-settings@nv12-tile4-src-y:
    - shard-bmg:          NOTRUN -> [SKIP][87] ([Intel XE#8076])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_plane@planar-pixel-format-settings@nv12-tile4-src-y.html

  * igt@kms_plane_lowres@tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][88] ([Intel XE#2393])
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-8/igt@kms_plane_lowres@tiling-y.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-factor-0-25:
    - shard-lnl:          NOTRUN -> [SKIP][89] ([Intel XE#2763] / [Intel XE#6886]) +19 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-factor-0-25.html

  * igt@kms_pm_backlight@brightness-with-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][90] ([Intel XE#2938] / [Intel XE#7376] / [Intel XE#7760])
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_pm_backlight@brightness-with-dpms.html

  * igt@kms_pm_backlight@fade:
    - shard-bmg:          NOTRUN -> [SKIP][91] ([Intel XE#7376] / [Intel XE#7760] / [Intel XE#870])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_pm_backlight@fade.html

  * igt@kms_pm_dc@dc3co-vpb-framegap@pr-xrgb8888:
    - shard-lnl:          NOTRUN -> [SKIP][92] ([Intel XE#8395] / [Intel XE#8396]) +3 other tests skip
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_pm_dc@dc3co-vpb-framegap@pr-xrgb8888.html

  * igt@kms_pm_dc@dc3co-vpb-framegap@psr2-xrgb8888:
    - shard-lnl:          NOTRUN -> [SKIP][93] ([Intel XE#8396]) +3 other tests skip
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_pm_dc@dc3co-vpb-framegap@psr2-xrgb8888.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-bmg:          NOTRUN -> [SKIP][94] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-8/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@dc3co-vpb-simulation@psr2-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][95] ([Intel XE#8396]) +1 other test skip
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-8/igt@kms_pm_dc@dc3co-vpb-simulation@psr2-xrgb8888.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][96] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836])
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_pm_rpm@modeset-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp:
    - shard-lnl:          NOTRUN -> [SKIP][97] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383]) +1 other test skip
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@kms_pm_rpm@modeset-non-lpsp.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
    - shard-lnl:          NOTRUN -> [SKIP][98] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304]) +3 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][99] ([Intel XE#4608]) +3 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-a-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf@pipe-b-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][100] ([Intel XE#4608] / [Intel XE#7304]) +3 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf@pipe-b-edp-1.html

  * igt@kms_psr2_sf@pr-plane-move-sf-dmg-area:
    - shard-lnl:          NOTRUN -> [SKIP][101] ([Intel XE#2893] / [Intel XE#7304]) +1 other test skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf:
    - shard-bmg:          NOTRUN -> [SKIP][102] ([Intel XE#1489]) +5 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-8/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-bmg:          NOTRUN -> [SKIP][103] ([Intel XE#2387] / [Intel XE#7429])
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_psr2_su@page_flip-p010.html
    - shard-lnl:          NOTRUN -> [SKIP][104] ([Intel XE#1128] / [Intel XE#7413])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr@fbc-psr2-sprite-plane-move:
    - shard-lnl:          NOTRUN -> [SKIP][105] ([Intel XE#1406] / [Intel XE#7345])
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_psr@fbc-psr2-sprite-plane-move.html

  * igt@kms_psr@fbc-psr2-sprite-plane-move@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][106] ([Intel XE#1406] / [Intel XE#4609] / [Intel XE#7345])
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_psr@fbc-psr2-sprite-plane-move@edp-1.html

  * igt@kms_psr@pr-basic:
    - shard-lnl:          NOTRUN -> [SKIP][107] ([Intel XE#1406]) +5 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@kms_psr@pr-basic.html

  * igt@kms_psr@psr-primary-page-flip:
    - shard-bmg:          NOTRUN -> [SKIP][108] ([Intel XE#2234] / [Intel XE#2850]) +10 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_psr@psr-primary-page-flip.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-bmg:          NOTRUN -> [SKIP][109] ([Intel XE#7795])
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-8/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-0:
    - shard-lnl:          NOTRUN -> [SKIP][110] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342]) +5 other tests skip
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
    - shard-lnl:          NOTRUN -> [SKIP][111] ([Intel XE#1127] / [Intel XE#5813])
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-bmg:          NOTRUN -> [SKIP][112] ([Intel XE#2330] / [Intel XE#5813])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
    - shard-bmg:          NOTRUN -> [SKIP][113] ([Intel XE#3904] / [Intel XE#7342]) +3 other tests skip
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html

  * igt@kms_scaling_modes@scaling-mode-center:
    - shard-bmg:          NOTRUN -> [SKIP][114] ([Intel XE#2413]) +1 other test skip
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@kms_scaling_modes@scaling-mode-center.html

  * igt@kms_sharpness_filter@invalid-plane-with-filter:
    - shard-bmg:          NOTRUN -> [SKIP][115] ([Intel XE#6503]) +1 other test skip
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_sharpness_filter@invalid-plane-with-filter.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          NOTRUN -> [SKIP][116] ([Intel XE#2426] / [Intel XE#5848])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
    - shard-lnl:          NOTRUN -> [SKIP][117] ([Intel XE#362] / [Intel XE#5848])
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_vrr@flip-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][118] ([Intel XE#1499])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@kms_vrr@flip-suspend.html

  * igt@sriov_basic@pf-unbind-with-vf-probed:
    - shard-bmg:          NOTRUN -> [ABORT][119] ([Intel XE#8868])
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@sriov_basic@pf-unbind-with-vf-probed.html

  * igt@xe_ccs@vm-bind-fault-mode-decompress:
    - shard-lnl:          NOTRUN -> [SKIP][120] ([Intel XE#7644])
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@xe_ccs@vm-bind-fault-mode-decompress.html

  * igt@xe_compute@eu-busy-10s:
    - shard-bmg:          NOTRUN -> [SKIP][121] ([Intel XE#6599])
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@xe_compute@eu-busy-10s.html

  * igt@xe_create@multigpu-create-massive-size:
    - shard-lnl:          NOTRUN -> [SKIP][122] ([Intel XE#7319] / [Intel XE#7350] / [Intel XE#944])
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@xe_create@multigpu-create-massive-size.html

  * igt@xe_evict@evict-beng-mixed-threads-large-multi-vm:
    - shard-lnl:          NOTRUN -> [SKIP][123] ([Intel XE#6540] / [Intel XE#688]) +15 other tests skip
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@xe_evict@evict-beng-mixed-threads-large-multi-vm.html

  * igt@xe_evict@evict-small-multi-queue-cm:
    - shard-bmg:          NOTRUN -> [SKIP][124] ([Intel XE#8370]) +2 other tests skip
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@xe_evict@evict-small-multi-queue-cm.html

  * igt@xe_exec_balancer@many-parallel-userptr-invalidate-race:
    - shard-lnl:          NOTRUN -> [SKIP][125] ([Intel XE#7482]) +25 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@xe_exec_balancer@many-parallel-userptr-invalidate-race.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-bind:
    - shard-bmg:          NOTRUN -> [SKIP][126] ([Intel XE#2322] / [Intel XE#7372]) +7 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-bind.html

  * igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate:
    - shard-lnl:          NOTRUN -> [SKIP][127] ([Intel XE#1392]) +10 other tests skip
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-rebind-imm:
    - shard-lnl:          NOTRUN -> [SKIP][128] ([Intel XE#8374]) +14 other tests skip
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr-rebind-imm.html

  * igt@xe_exec_fault_mode@twice-multi-queue-imm:
    - shard-bmg:          NOTRUN -> [SKIP][129] ([Intel XE#8374]) +12 other tests skip
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@xe_exec_fault_mode@twice-multi-queue-imm.html

  * igt@xe_exec_multi_queue@many-queues-preempt-mode-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][130] ([Intel XE#8364]) +35 other tests skip
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@xe_exec_multi_queue@many-queues-preempt-mode-userptr.html

  * igt@xe_exec_multi_queue@two-queues-priority:
    - shard-bmg:          NOTRUN -> [SKIP][131] ([Intel XE#8364]) +27 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@xe_exec_multi_queue@two-queues-priority.html

  * igt@xe_exec_reset@cm-multi-queue-close-fd:
    - shard-lnl:          NOTRUN -> [SKIP][132] ([Intel XE#8369]) +2 other tests skip
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@xe_exec_reset@cm-multi-queue-close-fd.html

  * igt@xe_exec_reset@multi-queue-cat-error:
    - shard-bmg:          NOTRUN -> [SKIP][133] ([Intel XE#8369])
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@xe_exec_reset@multi-queue-cat-error.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][134] ([Intel XE#8378]) +9 other tests skip
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind.html

  * igt@xe_exec_threads@threads-multi-queue-cm-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][135] ([Intel XE#8378]) +10 other tests skip
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@xe_exec_threads@threads-multi-queue-cm-userptr.html

  * igt@xe_live_ktest@xe_eudebug:
    - shard-bmg:          NOTRUN -> [SKIP][136] ([Intel XE#2833])
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@xe_live_ktest@xe_eudebug.html

  * igt@xe_media_fill@media-fill:
    - shard-bmg:          NOTRUN -> [SKIP][137] ([Intel XE#2459] / [Intel XE#2596] / [Intel XE#7321] / [Intel XE#7453])
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@xe_media_fill@media-fill.html

  * igt@xe_mmap@pci-membarrier-bad-pagesize:
    - shard-lnl:          NOTRUN -> [SKIP][138] ([Intel XE#5100] / [Intel XE#7322] / [Intel XE#7408])
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@xe_mmap@pci-membarrier-bad-pagesize.html

  * igt@xe_module_load@load:
    - shard-lnl:          ([PASS][139], [PASS][140], [PASS][141], [PASS][142], [PASS][143], [PASS][144], [PASS][145], [PASS][146], [PASS][147], [PASS][148], [PASS][149], [PASS][150], [PASS][151], [PASS][152], [PASS][153], [PASS][154], [PASS][155], [PASS][156], [PASS][157], [PASS][158]) -> ([SKIP][159], [PASS][160], [PASS][161], [PASS][162], [PASS][163], [PASS][164], [PASS][165], [PASS][166], [PASS][167], [PASS][168], [PASS][169], [PASS][170], [PASS][171], [PASS][172], [PASS][173], [PASS][174], [PASS][175], [PASS][176], [PASS][177], [PASS][178], [PASS][179], [PASS][180]) ([Intel XE#378] / [Intel XE#7405])
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-7/igt@xe_module_load@load.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-1/igt@xe_module_load@load.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-1/igt@xe_module_load@load.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-1/igt@xe_module_load@load.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-8/igt@xe_module_load@load.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-8/igt@xe_module_load@load.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-7/igt@xe_module_load@load.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-5/igt@xe_module_load@load.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-5/igt@xe_module_load@load.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-2/igt@xe_module_load@load.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-6/igt@xe_module_load@load.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-2/igt@xe_module_load@load.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-7/igt@xe_module_load@load.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-6/igt@xe_module_load@load.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-6/igt@xe_module_load@load.html
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-2/igt@xe_module_load@load.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-8/igt@xe_module_load@load.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-4/igt@xe_module_load@load.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-4/igt@xe_module_load@load.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-4/igt@xe_module_load@load.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@xe_module_load@load.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@xe_module_load@load.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@xe_module_load@load.html
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@xe_module_load@load.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-1/igt@xe_module_load@load.html
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-4/igt@xe_module_load@load.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-1/igt@xe_module_load@load.html
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@xe_module_load@load.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-2/igt@xe_module_load@load.html
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-2/igt@xe_module_load@load.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@xe_module_load@load.html
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@xe_module_load@load.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@xe_module_load@load.html
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-1/igt@xe_module_load@load.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@xe_module_load@load.html
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@xe_module_load@load.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-4/igt@xe_module_load@load.html
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-2/igt@xe_module_load@load.html
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@xe_module_load@load.html
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@xe_module_load@load.html
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@xe_module_load@load.html
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-4/igt@xe_module_load@load.html

  * igt@xe_multigpu_svm@mgpu-pagefault-basic:
    - shard-bmg:          NOTRUN -> [SKIP][181] ([Intel XE#6964]) +5 other tests skip
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@xe_multigpu_svm@mgpu-pagefault-basic.html

  * igt@xe_multigpu_svm@mgpu-xgpu-access-prefetch:
    - shard-lnl:          NOTRUN -> [SKIP][182] ([Intel XE#6964]) +4 other tests skip
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@xe_multigpu_svm@mgpu-xgpu-access-prefetch.html

  * igt@xe_oa@oa-tlb-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][183] ([Intel XE#2248] / [Intel XE#7325] / [Intel XE#7393])
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@xe_oa@oa-tlb-invalidate.html

  * igt@xe_page_reclaim@boundary-split:
    - shard-lnl:          NOTRUN -> [SKIP][184] ([Intel XE#7793]) +2 other tests skip
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@xe_page_reclaim@boundary-split.html

  * igt@xe_page_reclaim@invalid-1g:
    - shard-bmg:          NOTRUN -> [SKIP][185] ([Intel XE#7793])
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@xe_page_reclaim@invalid-1g.html

  * igt@xe_pat@pat-index-xehpc:
    - shard-bmg:          NOTRUN -> [SKIP][186] ([Intel XE#1420] / [Intel XE#7590])
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-8/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_pat@xa-app-transient-media-on:
    - shard-bmg:          NOTRUN -> [SKIP][187] ([Intel XE#7590]) +1 other test skip
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@xe_pat@xa-app-transient-media-on.html
    - shard-lnl:          NOTRUN -> [SKIP][188] ([Intel XE#7590] / [Intel XE#7772])
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@xe_pat@xa-app-transient-media-on.html

  * igt@xe_pm@d3hot-mmap-vram:
    - shard-lnl:          NOTRUN -> [SKIP][189] ([Intel XE#1948])
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@xe_pm@d3hot-mmap-vram.html

  * igt@xe_pm@s2idle-d3cold-basic-exec:
    - shard-bmg:          NOTRUN -> [SKIP][190] ([Intel XE#2284] / [Intel XE#7370]) +1 other test skip
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@xe_pm@s2idle-d3cold-basic-exec.html

  * igt@xe_pm@s3-d3cold-basic-exec:
    - shard-lnl:          NOTRUN -> [SKIP][191] ([Intel XE#2284] / [Intel XE#366] / [Intel XE#7370])
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@xe_pm@s3-d3cold-basic-exec.html

  * igt@xe_pm@s3-vm-bind-prefetch:
    - shard-lnl:          NOTRUN -> [SKIP][192] ([Intel XE#584] / [Intel XE#7369])
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@xe_pm@s3-vm-bind-prefetch.html

  * igt@xe_pmu@all-fn-engine-activity-load:
    - shard-lnl:          NOTRUN -> [SKIP][193] ([Intel XE#4650] / [Intel XE#7347])
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@xe_pmu@all-fn-engine-activity-load.html

  * igt@xe_prefetch_fault@l2-prefetch-fault:
    - shard-lnl:          NOTRUN -> [SKIP][194] ([Intel XE#8815])
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@xe_prefetch_fault@l2-prefetch-fault.html

  * igt@xe_prefetch_fault@prefetch-fault-svm:
    - shard-bmg:          NOTRUN -> [SKIP][195] ([Intel XE#7599])
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-5/igt@xe_prefetch_fault@prefetch-fault-svm.html

  * igt@xe_pxp@pxp-termination-key-update-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][196] ([Intel XE#4733] / [Intel XE#7417]) +4 other tests skip
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-8/igt@xe_pxp@pxp-termination-key-update-post-suspend.html

  * igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz:
    - shard-bmg:          NOTRUN -> [SKIP][197] ([Intel XE#944]) +1 other test skip
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html

  * igt@xe_query@multigpu-query-uc-fw-version-huc:
    - shard-lnl:          NOTRUN -> [SKIP][198] ([Intel XE#944]) +2 other tests skip
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@xe_query@multigpu-query-uc-fw-version-huc.html

  * igt@xe_sriov_admin@bulk-preempt-timeout-vfs-disabled:
    - shard-lnl:          NOTRUN -> [SKIP][199] ([Intel XE#7174]) +1 other test skip
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@xe_sriov_admin@bulk-preempt-timeout-vfs-disabled.html

  * igt@xe_sriov_auto_provisioning@exclusive-ranges:
    - shard-lnl:          NOTRUN -> [SKIP][200] ([Intel XE#4130] / [Intel XE#7366])
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-5/igt@xe_sriov_auto_provisioning@exclusive-ranges.html

  * igt@xe_sriov_vfio@bind-unbind-vfs:
    - shard-lnl:          NOTRUN -> [SKIP][201] ([Intel XE#7724]) +1 other test skip
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@xe_sriov_vfio@bind-unbind-vfs.html

  * igt@xe_sriov_vram@vf-access-beyond:
    - shard-lnl:          NOTRUN -> [SKIP][202] ([Intel XE#6376] / [Intel XE#7330] / [Intel XE#7422])
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-6/igt@xe_sriov_vram@vf-access-beyond.html

  * igt@xe_survivability@runtime-survivability:
    - shard-lnl:          NOTRUN -> [SKIP][203] ([Intel XE#8415])
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@xe_survivability@runtime-survivability.html

  * igt@xe_vm@out-of-memory:
    - shard-lnl:          NOTRUN -> [SKIP][204] ([Intel XE#5745] / [Intel XE#7892])
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@xe_vm@out-of-memory.html

  * igt@xe_wedged@wedged-at-any-timeout:
    - shard-lnl:          NOTRUN -> [DMESG-WARN][205] ([Intel XE#8963])
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-7/igt@xe_wedged@wedged-at-any-timeout.html

  
#### Possible fixes ####

  * igt@device_reset@unbind-reset-rebind:
    - shard-bmg:          [ABORT][206] ([Intel XE#8007]) -> [PASS][207]
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-6/igt@device_reset@unbind-reset-rebind.html
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@device_reset@unbind-reset-rebind.html

  * igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ab-dp2-hdmi-a3:
    - shard-bmg:          [FAIL][208] ([Intel XE#3098]) -> [PASS][209] +1 other test pass
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-10/igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ab-dp2-hdmi-a3.html
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-9/igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ab-dp2-hdmi-a3.html

  * igt@xe_exec_fault_mode@atomic-many:
    - shard-bmg:          [FAIL][210] ([Intel XE#8578]) -> [PASS][211]
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-5/igt@xe_exec_fault_mode@atomic-many.html
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-10/igt@xe_exec_fault_mode@atomic-many.html

  * igt@xe_module_load@load:
    - shard-bmg:          ([PASS][212], [PASS][213], [PASS][214], [PASS][215], [PASS][216], [PASS][217], [PASS][218], [PASS][219], [PASS][220], [PASS][221], [PASS][222], [PASS][223], [PASS][224], [PASS][225], [PASS][226], [SKIP][227], [PASS][228], [PASS][229], [PASS][230], [PASS][231], [PASS][232], [PASS][233]) ([Intel XE#2457] / [Intel XE#7405]) -> ([PASS][234], [PASS][235], [PASS][236], [PASS][237], [PASS][238], [PASS][239], [PASS][240], [PASS][241], [PASS][242], [PASS][243], [PASS][244], [PASS][245], [PASS][246], [PASS][247], [PASS][248], [PASS][249], [PASS][250], [PASS][251], [PASS][252], [PASS][253])
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-2/igt@xe_module_load@load.html
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-9/igt@xe_module_load@load.html
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-1/igt@xe_module_load@load.html
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-10/igt@xe_module_load@load.html
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-2/igt@xe_module_load@load.html
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-3/igt@xe_module_load@load.html
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-8/igt@xe_module_load@load.html
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-8/igt@xe_module_load@load.html
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-8/igt@xe_module_load@load.html
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-10/igt@xe_module_load@load.html
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-10/igt@xe_module_load@load.html
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-7/igt@xe_module_load@load.html
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-6/igt@xe_module_load@load.html
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-5/igt@xe_module_load@load.html
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-5/igt@xe_module_load@load.html
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-2/igt@xe_module_load@load.html
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-3/igt@xe_module_load@load.html
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-2/igt@xe_module_load@load.html
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-6/igt@xe_module_load@load.html
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-5/igt@xe_module_load@load.html
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-9/igt@xe_module_load@load.html
   [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-9/igt@xe_module_load@load.html
   [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-8/igt@xe_module_load@load.html
   [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-8/igt@xe_module_load@load.html
   [236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-7/igt@xe_module_load@load.html
   [237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-7/igt@xe_module_load@load.html
   [238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-7/igt@xe_module_load@load.html
   [239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@xe_module_load@load.html
   [240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-10/igt@xe_module_load@load.html
   [241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@xe_module_load@load.html
   [242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-5/igt@xe_module_load@load.html
   [243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-1/igt@xe_module_load@load.html
   [244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-2/igt@xe_module_load@load.html
   [245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-9/igt@xe_module_load@load.html
   [246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-10/igt@xe_module_load@load.html
   [247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-9/igt@xe_module_load@load.html
   [248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@xe_module_load@load.html
   [249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-3/igt@xe_module_load@load.html
   [250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-6/igt@xe_module_load@load.html
   [251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-10/igt@xe_module_load@load.html
   [252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-1/igt@xe_module_load@load.html
   [253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-5/igt@xe_module_load@load.html

  
#### Warnings ####

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
    - shard-lnl:          [SKIP][254] ([Intel XE#309] / [Intel XE#7343]) -> [SKIP][255] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935])
   [254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-lnl-5/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
   [255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html

  * igt@xe_wedged@basic-wedged:
    - shard-bmg:          [ABORT][256] ([Intel XE#8591] / [Intel XE#8963]) -> [DMESG-WARN][257] ([Intel XE#8963])
   [256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77/shard-bmg-10/igt@xe_wedged@basic-wedged.html
   [257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/shard-bmg-8/igt@xe_wedged@basic-wedged.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1125
  [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
  [Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
  [Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1469]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1469
  [Intel XE#1470]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1470
  [Intel XE#1477]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1477
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
  [Intel XE#1948]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1948
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2372
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
  [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2459
  [Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
  [Intel XE#2596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2596
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2833]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2833
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2853]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2853
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/352
  [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
  [Intel XE#3658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3658
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298
  [Intel XE#4329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4329
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
  [Intel XE#5745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5745
  [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
  [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#5873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5873
  [Intel XE#5882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5882
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6376
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
  [Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6900
  [Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
  [Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
  [Intel XE#6912]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6912
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7006]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7006
  [Intel XE#7008]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7008
  [Intel XE#703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/703
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7174]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7174
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7308
  [Intel XE#7312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7312
  [Intel XE#7319]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7319
  [Intel XE#7321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7321
  [Intel XE#7322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7322
  [Intel XE#7325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7325
  [Intel XE#7330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7330
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7344]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7344
  [Intel XE#7345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7345
  [Intel XE#7347]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7347
  [Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
  [Intel XE#7350]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7350
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7359]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7359
  [Intel XE#7360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7360
  [Intel XE#7361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7361
  [Intel XE#7362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7362
  [Intel XE#7366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7366
  [Intel XE#7369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7369
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7375
  [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
  [Intel XE#7378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7378
  [Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
  [Intel XE#7385]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7385
  [Intel XE#7386]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7386
  [Intel XE#7389]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7389
  [Intel XE#7393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7393
  [Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
  [Intel XE#7405]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7405
  [Intel XE#7408]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7408
  [Intel XE#7413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7413
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7422
  [Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
  [Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
  [Intel XE#7442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7442
  [Intel XE#7448]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7448
  [Intel XE#7453]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7453
  [Intel XE#7466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7466
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7644]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7644
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7724
  [Intel XE#7760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7760
  [Intel XE#7772]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7772
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7795]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7795
  [Intel XE#7809]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7809
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7892]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7892
  [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
  [Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
  [Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
  [Intel XE#8076]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8076
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8365]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8365
  [Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
  [Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
  [Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
  [Intel XE#8415]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8415
  [Intel XE#8578]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8578
  [Intel XE#8591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8591
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#8815]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8815
  [Intel XE#8868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8868
  [Intel XE#8963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8963
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77 -> xe-pw-171735v4

  IGT_9078: 9078
  xe-5668-b8f17b16c0f8638b9df4f090511e3ae97210eb77: b8f17b16c0f8638b9df4f090511e3ae97210eb77
  xe-pw-171735v4: 171735v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171735v4/index.html

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