Re: [RFC v2 17/21] drm/xe/pt: Set NC PTE bit for VMAs ineligible for access counting

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Compilation fails when `CONFIG_DRM_XE_GPUSVM` is disabled due to missing `flags` member in the fallback definition of `struct xe_svm_range`.
--

commit a329d005c363a2e1052a0d0ac8ba4b191802a6e5
Author: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>

drm/xe/pt: Set NC PTE bit for VMAs ineligible for access counting

This commit sets the XE_PPGTT_PTE_NC flag on PTEs for VMAs that are ineligible
for access counter migration hints to avoid wasteful slot allocation.

> diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
> --- a/drivers/gpu/drm/xe/xe_pt.c
> +++ b/drivers/gpu/drm/xe/xe_pt.c
> @@ -800,6 +800,7 @@ xe_pt_stage_bind(struct xe_tile *tile, struct xe_vma *vma,
>  		.clear_pt = clear_pt,
>  	};
>  	struct xe_pt *pt = vm->pt_root[tile->id];
> +	struct drm_gpusvm_range_flags range_flags;

[ ... ]

> @@ -862,6 +863,18 @@ xe_pt_stage_bind(struct xe_tile *tile, struct xe_vma *vma,
>  			XE_USM_PPGTT_PTE_AE : 0;
>  	}
>  
> +	if (!xe_vma_supports_access_ctr(xe, vma, tile)) {
> +		xe_walk.default_vram_pte |= XE_PPGTT_PTE_NC;
> +		xe_walk.default_system_pte |= XE_PPGTT_PTE_NC;
> +	}
> +
> +	if (range) {
> +		xe_walk.default_vram_pte |= XE_PPGTT_PTE_NC;
> +		range_flags.__flags = READ_ONCE(range->base.flags.__flags);

[Severity: Low]
Does this cause a compilation failure when CONFIG_DRM_XE_GPUSVM is disabled?

Looking at the fallback definition of struct xe_svm_range in xe_svm.h used
when GPUSVM is disabled:

struct xe_svm_range {
	struct {
		struct interval_tree_node itree;
	} base;
	struct {
		const struct drm_pagemap_addr *dma_addr;
	} pages;
	struct mutex lock;
	u32 tile_present;
	u32 tile_invalidated;
};

The base struct does not contain a flags member in this configuration.
Additionally, the struct drm_gpusvm_range_flags type used for range_flags
above is undefined when the kernel is compiled without GPUSVM support, as
the gpusvm header is not included.

> +		if (!range_flags.migrate_devmem)
> +			xe_walk.default_system_pte |= XE_PPGTT_PTE_NC;
> +	}
> +
>  	xe_walk.default_vram_pte |= XE_PPGTT_PTE_DM;
>  	xe_walk.dma_offset = (bo && !is_purged) ? vram_region_gpu_offset(bo->ttm.resource) : 0;
>  	if (!range)

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260909124457.1610890-23-himal.prasad.ghimiray@intel.com?part=17