Re: [PATCH 1/2] drm/xe/gsc: Define GSC for NVL-P

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] xe: GSC firmware loading fails for NOVALAKE_P due to array ordering
--

commit 55a4dc15ed4d02aed4f0f84954a6722b7a2f2ace
Author: Alan Previn <alan.previn.teres.alexis@intel.com>

drm/xe/gsc: Define GSC for NVL-P

This commit defines the GSC firmware compatibility version for the
NOVALAKE_P platform, matching major version 108 and compatibility
version 0.0.

> diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
> index a8e6f18cc9b4a..fdffd6707e4d2 100644
> --- a/drivers/gpu/drm/xe/xe_uc_fw.c
> +++ b/drivers/gpu/drm/xe/xe_uc_fw.c
> @@ -142,6 +142,7 @@ struct fw_blobs_by_type {
>  /* for the GSC FW we match the compatibility version and not the release one */
>  #define XE_GSC_FIRMWARE_DEFS(fw_def, major_ver)		\
>  	fw_def(PANTHERLAKE,	GT_TYPE_ANY,	major_ver(xe,	gsc,	ptl,	105, 1, 0))	\
> +	fw_def(NOVALAKE_P,	GT_TYPE_ANY,	major_ver(xe,	gsc,	nvl,	108, 0, 0))	\

[Severity: High]
Will inserting NOVALAKE_P here cause the firmware selection loop to fail?

Looking at uc_fw_auto_select() in drivers/gpu/drm/xe/xe_uc_fw.c, the loop
termination condition expects the entries array to be sorted strictly
descending by platform enum:

	for (i = 0; i < count && p <= entries[i].platform; i++) {
		...
	}

Since XE_NOVALAKE_P (enum value 15) is greater than the first entry
XE_PANTHERLAKE (enum value 12), the condition (15 <= 12) evaluates to false
on the very first iteration when trying to load firmware for NOVALAKE_P.

This aborts the search immediately, leaving uc_fw->path as NULL and failing
to load the GSC firmware.

>  	fw_def(LUNARLAKE,	GT_TYPE_ANY,	major_ver(xe,	gsc,	lnl,	104, 1, 0))	\
>  	fw_def(METEORLAKE,	GT_TYPE_ANY,	major_ver(i915,	gsc,	mtl,	102, 1, 0))

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260917223042.715286-4-alan.previn.teres.alexis@intel.com?part=1