* [PATCH v5 1/3] drm/xe: Capture devcoredump on TLB invalidation timeout
2026-09-21 18:21 [PATCH v5 0/3] drm/xe: fix GuC TLB invalidation ack stalls on ARL (Wa_22016122933) Tales A. Mendonça
@ 2026-09-21 18:21 ` Tales A. Mendonça
2026-09-21 18:33 ` sashiko-bot
2026-09-21 18:21 ` [PATCH v5 2/3] drm/xe: Log when a timed out TLB invalidation ack finally arrives Tales A. Mendonça
` (5 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: Tales A. Mendonça @ 2026-09-21 18:21 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, daniele.ceraolospurio, stuart.summers,
julia.filipchuk, thomas.hellstrom, rodrigo.vivi, jani.nikula,
navonjohnlukose, dri-devel, Tales A. Mendonça
TLB invalidation timeouts currently leave no record of the firmware
state behind: there is no exec queue or job to blame, so nothing calls
xe_devcoredump() and the GuC log content at the time of the hang is
lost.
Add xe_devcoredump_gt(), a variant of xe_devcoredump() for hangs that
are not tied to an exec queue or job. It captures the GuC log and CT
state of the affected GT, reusing the existing snapshot machinery and
the "only first snapshot" policy, and hook it up to the TLB invalidation
timeout path.
This was instrumental in diagnosing GuC TLB invalidation ack stalls on
ARL (see Link), where the invalidation request is consumed from the H2G
CTB immediately but the ack G2H only arrives ~2.3s later, after the
timeout has already fired.
Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8678
Signed-off-by: Tales A. Mendonça <talesam@gmail.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_devcoredump.c | 46 ++++++++++++++++-------------
drivers/gpu/drm/xe/xe_devcoredump.h | 15 +++++++---
drivers/gpu/drm/xe/xe_tlb_inval.c | 22 ++++++++++++++
3 files changed, 58 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
index b918f046ae1..ab681b14886 100644
--- a/drivers/gpu/drm/xe/xe_devcoredump.c
+++ b/drivers/gpu/drm/xe/xe_devcoredump.c
@@ -74,11 +74,6 @@ static struct xe_device *coredump_to_xe(const struct xe_devcoredump *coredump)
return container_of(coredump, struct xe_device, devcoredump);
}
-static struct xe_guc *exec_queue_to_guc(struct xe_exec_queue *q)
-{
- return &q->gt->uc.guc;
-}
-
static ssize_t __xe_devcoredump_read(char *buffer, ssize_t count,
ssize_t start,
struct xe_devcoredump *coredump)
@@ -325,40 +320,44 @@ static void xe_devcoredump_deferred_snap_work(struct work_struct *work)
}
static void devcoredump_snapshot(struct xe_devcoredump *coredump,
+ struct xe_gt *gt,
struct xe_exec_queue *q,
struct xe_sched_job *job)
{
struct xe_devcoredump_snapshot *ss = &coredump->snapshot;
- struct xe_guc *guc = exec_queue_to_guc(q);
+ struct xe_guc *guc = >->uc.guc;
const char *process_name = "no process";
bool cookie;
ss->snapshot_time = ktime_get_real();
ss->boot_time = ktime_get_boottime();
- if (q->vm && q->vm->xef) {
+ if (q && q->vm && q->vm->xef) {
process_name = q->vm->xef->process_name;
ss->pid = q->vm->xef->pid;
}
strscpy(ss->process_name, process_name);
- ss->gt = q->gt;
+ ss->gt = gt;
INIT_WORK(&ss->work, xe_devcoredump_deferred_snap_work);
/* keep going if fw fails as we still want to save the memory and SW data */
- CLASS(xe_force_wake, fw_ref)(gt_to_fw(q->gt), XE_FORCEWAKE_ALL);
+ CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
cookie = dma_fence_begin_signalling();
ss->guc.log = xe_guc_log_snapshot_capture(&guc->log, true);
ss->guc.ct = xe_guc_ct_snapshot_capture(&guc->ct);
- ss->ge = xe_guc_exec_queue_snapshot_capture(q);
- if (job)
- ss->job = xe_sched_job_snapshot_capture(job);
- ss->vm = xe_vm_snapshot_capture(q->vm);
- xe_engine_snapshot_capture_for_queue(q);
+ if (q) {
+ ss->ge = xe_guc_exec_queue_snapshot_capture(q);
+ if (job)
+ ss->job = xe_sched_job_snapshot_capture(job);
+ ss->vm = xe_vm_snapshot_capture(q->vm);
+
+ xe_engine_snapshot_capture_for_queue(q);
+ }
queue_work(system_dfl_wq, &ss->work);
@@ -366,19 +365,24 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
}
/**
- * xe_devcoredump - Take the required snapshots and initialize coredump device.
- * @q: The faulty xe_exec_queue, where the issue was detected.
- * @job: The faulty xe_sched_job, where the issue was detected.
+ * __xe_devcoredump - Take the required snapshots and initialize coredump device.
+ * @gt: The GT where the issue was detected.
+ * @q: The faulty xe_exec_queue, where the issue was detected, may be NULL for
+ * hangs that are not tied to an exec queue (e.g. TLB invalidation
+ * timeouts); in that case only the GT-level state (GuC log and CT state)
+ * is captured.
+ * @job: The faulty xe_sched_job, where the issue was detected, may be NULL.
* @fmt: Printf format + args to describe the reason for the core dump
*
* This function should be called at the crash time within the serialized
* gt_reset. It is skipped if we still have the core dump device available
* with the information of the 'first' snapshot.
*/
-__printf(3, 4)
-void xe_devcoredump(struct xe_exec_queue *q, struct xe_sched_job *job, const char *fmt, ...)
+__printf(4, 5)
+void __xe_devcoredump(struct xe_gt *gt, struct xe_exec_queue *q,
+ struct xe_sched_job *job, const char *fmt, ...)
{
- struct xe_device *xe = gt_to_xe(q->gt);
+ struct xe_device *xe = gt_to_xe(gt);
struct xe_devcoredump *coredump = &xe->devcoredump;
va_list varg;
@@ -396,7 +400,7 @@ void xe_devcoredump(struct xe_exec_queue *q, struct xe_sched_job *job, const cha
coredump->snapshot.reason = kvasprintf(GFP_ATOMIC, fmt, varg);
va_end(varg);
- devcoredump_snapshot(coredump, q, job);
+ devcoredump_snapshot(coredump, gt, q, job);
drm_info(&xe->drm, "Xe device coredump has been created\n");
drm_info(&xe->drm, "Check your /sys/class/drm/card%d/device/devcoredump/data\n",
diff --git a/drivers/gpu/drm/xe/xe_devcoredump.h b/drivers/gpu/drm/xe/xe_devcoredump.h
index 5391a80a4d1..bc4800b3a3f 100644
--- a/drivers/gpu/drm/xe/xe_devcoredump.h
+++ b/drivers/gpu/drm/xe/xe_devcoredump.h
@@ -11,15 +11,17 @@
struct drm_printer;
struct xe_device;
struct xe_exec_queue;
+struct xe_gt;
struct xe_sched_job;
#ifdef CONFIG_DEV_COREDUMP
-void xe_devcoredump(struct xe_exec_queue *q, struct xe_sched_job *job, const char *fmt, ...);
+void __xe_devcoredump(struct xe_gt *gt, struct xe_exec_queue *q,
+ struct xe_sched_job *job, const char *fmt, ...);
int xe_devcoredump_init(struct xe_device *xe);
#else
-static inline void xe_devcoredump(struct xe_exec_queue *q,
- struct xe_sched_job *job,
- const char *fmt, ...)
+static inline void __xe_devcoredump(struct xe_gt *gt, struct xe_exec_queue *q,
+ struct xe_sched_job *job,
+ const char *fmt, ...)
{
}
@@ -29,6 +31,11 @@ static inline int xe_devcoredump_init(struct xe_device *xe)
}
#endif
+#define xe_devcoredump(_q, _job, _fmt, ...) \
+ __xe_devcoredump((_q)->gt, _q, _job, _fmt, ##__VA_ARGS__)
+#define xe_devcoredump_gt(_gt, _fmt, ...) \
+ __xe_devcoredump(_gt, NULL, NULL, _fmt, ##__VA_ARGS__)
+
void xe_print_blob_ascii85(struct drm_printer *p, const char *prefix, char suffix,
const void *blob, size_t offset, size_t size);
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
index dd1030de9ab..737cff3664f 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
@@ -5,6 +5,7 @@
#include <drm/drm_managed.h>
+#include "xe_devcoredump.h"
#include "xe_device_types.h"
#include "xe_force_wake.h"
#include "xe_gt_stats.h"
@@ -29,6 +30,12 @@
#define FENCE_STACK_BIT DMA_FENCE_FLAG_USER_BITS
+/* The frontend is only ever embedded in a GT */
+static struct xe_gt *tlb_inval_to_gt(struct xe_tlb_inval *tlb_inval)
+{
+ return container_of(tlb_inval, struct xe_gt, tlb_inval);
+}
+
static void xe_tlb_inval_fence_fini(struct xe_tlb_inval_fence *fence)
{
if (WARN_ON_ONCE(!fence->tlb_inval))
@@ -73,6 +80,7 @@ static void xe_tlb_inval_fence_timeout(struct work_struct *work)
struct xe_device *xe = tlb_inval->xe;
struct xe_tlb_inval_fence *fence, *next;
long timeout_delay = tlb_inval->ops->timeout_delay(tlb_inval);
+ int timedout_seqno = 0, seqno_recv = 0;
tlb_inval->ops->flush(tlb_inval);
@@ -90,13 +98,27 @@ static void xe_tlb_inval_fence_timeout(struct work_struct *work)
"TLB invalidation fence timeout, seqno=%d recv=%d",
fence->seqno, tlb_inval->seqno_recv);
+ timedout_seqno = fence->seqno;
+
fence->base.error = -ETIME;
xe_tlb_inval_fence_signal(fence);
}
if (!list_empty(&tlb_inval->pending_fences))
queue_delayed_work(tlb_inval->timeout_wq, &tlb_inval->fence_tdr,
timeout_delay);
+ seqno_recv = tlb_inval->seqno_recv;
spin_unlock_irq(&tlb_inval->pending_lock);
+
+ /*
+ * Capture the GuC log and CT state so the firmware side of the hang
+ * can be inspected; there is no queue or job to blame here. Must be
+ * outside pending_lock as the capture takes sleeping locks, hence
+ * @seqno_recv is sampled above while the lock is still held.
+ */
+ if (timedout_seqno)
+ xe_devcoredump_gt(tlb_inval_to_gt(tlb_inval),
+ "TLB invalidation fence timeout, seqno=%d recv=%d",
+ timedout_seqno, seqno_recv);
}
/**
--
2.55.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v5 1/3] drm/xe: Capture devcoredump on TLB invalidation timeout
2026-09-21 18:21 ` [PATCH v5 1/3] drm/xe: Capture devcoredump on TLB invalidation timeout Tales A. Mendonça
@ 2026-09-21 18:33 ` sashiko-bot
2026-09-21 20:28 ` Tales A. Mendonça
0 siblings, 1 reply; 14+ messages in thread
From: sashiko-bot @ 2026-09-21 18:33 UTC (permalink / raw)
To: Tales A. Mendonça; +Cc: dri-devel, intel-xe
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] drm/xe: MMIO access without PM reference in devcoredump on TLB timeout
--
commit a463de937c804fe9be7ed86bfbfa297e4f35c466
Author: Tales A. Mendonça <talesam@gmail.com>
drm/xe: Capture devcoredump on TLB invalidation timeout
This commit adds xe_devcoredump_gt() to capture the GuC log and CT state
for GT-level hangs that are not tied to a specific queue or job. It then
hooks this capture mechanism into the TLB invalidation timeout path. This
helps in diagnosing firmware stalls where the invalidation request was
consumed but the ack was delayed.
Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8678
> diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
> --- a/drivers/gpu/drm/xe/xe_devcoredump.c
> +++ b/drivers/gpu/drm/xe/xe_devcoredump.c
[ ... ]
> @@ -323,40 +318,44 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
> struct xe_gt *gt,
> struct xe_exec_queue *q,
> struct xe_sched_job *job)
> {
[ ... ]
> /* keep going if fw fails as we still want to save the memory and SW data */
> - CLASS(xe_force_wake, fw_ref)(gt_to_fw(q->gt), XE_FORCEWAKE_ALL);
> + CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
[Severity: High]
If this capture path is reached without holding a PM runtime reference, does
acquiring the forcewake here attempt MMIO accesses while the device is in a
low-power state? Accessing MMIO registers when the device has entered
autosuspend (D3cold) typically causes unhandled PCIe errors or system
crashes.
[ ... ]
> diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
> --- a/drivers/gpu/drm/xe/xe_tlb_inval.c
> +++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
[ ... ]
> @@ -90,13 +98,27 @@ static void xe_tlb_inval_fence_timeout(struct work_struct *work)
> "TLB invalidation fence timeout, seqno=%d recv=%d",
> fence->seqno, tlb_inval->seqno_recv);
>
> + timedout_seqno = fence->seqno;
> +
> fence->base.error = -ETIME;
> xe_tlb_inval_fence_signal(fence);
[Severity: High]
Can this sequence drop the last PM runtime reference before the devcoredump
is captured?
Looking at xe_tlb_inval_fence_signal(), it calls xe_tlb_inval_fence_fini()
which drops the PM runtime reference (xe_pm_runtime_put). If this was the
last active reference, the device could begin autosuspending.
> }
> if (!list_empty(&tlb_inval->pending_fences))
> queue_delayed_work(tlb_inval->timeout_wq, &tlb_inval->fence_tdr,
> timeout_delay);
> + seqno_recv = tlb_inval->seqno_recv;
> spin_unlock_irq(&tlb_inval->pending_lock);
> +
> + /*
> + * Capture the GuC log and CT state so the firmware side of the hang
> + * can be inspected; there is no queue or job to blame here. Must be
> + * outside pending_lock as the capture takes sleeping locks, hence
> + * @seqno_recv is sampled above while the lock is still held.
> + */
> + if (timedout_seqno)
> + xe_devcoredump_gt(tlb_inval_to_gt(tlb_inval),
> + "TLB invalidation fence timeout, seqno=%d recv=%d",
> + timedout_seqno, seqno_recv);
Since the PM reference was dropped earlier in the loop, would this call to
xe_devcoredump_gt() proceed without holding one? If the thread gets
preempted long enough for the autosuspend delay to expire, the forcewake
operation inside devcoredump_snapshot() might hit the hardware while it is
unpowered.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260921182121.308217-1-talesam@gmail.com?part=1
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v5 1/3] drm/xe: Capture devcoredump on TLB invalidation timeout
2026-09-21 18:33 ` sashiko-bot
@ 2026-09-21 20:28 ` Tales A. Mendonça
2026-09-22 2:19 ` Matthew Brost
0 siblings, 1 reply; 14+ messages in thread
From: Tales A. Mendonça @ 2026-09-21 20:28 UTC (permalink / raw)
To: sashiko-reviews; +Cc: dri-devel, intel-xe, Matthew Brost
On Mon, Sep 21, 2026 at 03:33:00PM -0300, sashiko-bot@kernel.org wrote:
> [High] drm/xe: MMIO access without PM reference in devcoredump on TLB timeout
Correct on both counts, and it is my patch that introduces it.
Tracing it: every pending invalidation fence holds a runtime PM
reference, taken by xe_pm_runtime_get_noresume() in
xe_tlb_inval_fence_init(). xe_tlb_inval_fence_signal() calls
xe_tlb_inval_fence_fini(), which drops it. The timeout loop signals all
the expired fences and only then, after dropping pending_lock, calls
xe_devcoredump_gt(). devcoredump_snapshot() acquires forcewake without
taking a PM reference of its own - it has always relied on the caller
holding one, which the existing job-timeout caller does. The new
GT-level caller may have just released the last one, so the device can
begin autosuspending before the snapshot touches the hardware.
Fixed for v6 by holding a reference across the capture, taken while the
pending fences still guarantee the device is awake:
if (!timedout_seqno) {
/*
* Hold a PM reference across the capture below. Every
* pending fence holds one, so the device is awake
* here, but signalling them may drop the last
* reference and let it autosuspend before the
* snapshot touches the hardware.
*/
xe_pm_runtime_get_noresume(xe);
}
and released after xe_devcoredump_gt() returns.
Taking it inside pending_lock is safe: xe_pm_runtime_get_noresume() goes
through pm_runtime_get_if_in_use(), and its "Missing outer runtime PM
protection" warning cannot fire here, because the fence reference is
still held at that point.
Tales
Em seg., 21 de set. de 2026 às 15:33, <sashiko-bot@kernel.org> escreveu:
>
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [High] drm/xe: MMIO access without PM reference in devcoredump on TLB timeout
> --
>
> commit a463de937c804fe9be7ed86bfbfa297e4f35c466
> Author: Tales A. Mendonça <talesam@gmail.com>
>
> drm/xe: Capture devcoredump on TLB invalidation timeout
>
> This commit adds xe_devcoredump_gt() to capture the GuC log and CT state
> for GT-level hangs that are not tied to a specific queue or job. It then
> hooks this capture mechanism into the TLB invalidation timeout path. This
> helps in diagnosing firmware stalls where the invalidation request was
> consumed but the ack was delayed.
>
> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8678
>
> > diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
> > --- a/drivers/gpu/drm/xe/xe_devcoredump.c
> > +++ b/drivers/gpu/drm/xe/xe_devcoredump.c
> [ ... ]
> > @@ -323,40 +318,44 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
> > struct xe_gt *gt,
> > struct xe_exec_queue *q,
> > struct xe_sched_job *job)
> > {
> [ ... ]
> > /* keep going if fw fails as we still want to save the memory and SW data */
> > - CLASS(xe_force_wake, fw_ref)(gt_to_fw(q->gt), XE_FORCEWAKE_ALL);
> > + CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
>
> [Severity: High]
> If this capture path is reached without holding a PM runtime reference, does
> acquiring the forcewake here attempt MMIO accesses while the device is in a
> low-power state? Accessing MMIO registers when the device has entered
> autosuspend (D3cold) typically causes unhandled PCIe errors or system
> crashes.
>
> [ ... ]
> > diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
> > --- a/drivers/gpu/drm/xe/xe_tlb_inval.c
> > +++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
> [ ... ]
> > @@ -90,13 +98,27 @@ static void xe_tlb_inval_fence_timeout(struct work_struct *work)
> > "TLB invalidation fence timeout, seqno=%d recv=%d",
> > fence->seqno, tlb_inval->seqno_recv);
> >
> > + timedout_seqno = fence->seqno;
> > +
> > fence->base.error = -ETIME;
> > xe_tlb_inval_fence_signal(fence);
>
> [Severity: High]
> Can this sequence drop the last PM runtime reference before the devcoredump
> is captured?
>
> Looking at xe_tlb_inval_fence_signal(), it calls xe_tlb_inval_fence_fini()
> which drops the PM runtime reference (xe_pm_runtime_put). If this was the
> last active reference, the device could begin autosuspending.
>
> > }
> > if (!list_empty(&tlb_inval->pending_fences))
> > queue_delayed_work(tlb_inval->timeout_wq, &tlb_inval->fence_tdr,
> > timeout_delay);
> > + seqno_recv = tlb_inval->seqno_recv;
> > spin_unlock_irq(&tlb_inval->pending_lock);
> > +
> > + /*
> > + * Capture the GuC log and CT state so the firmware side of the hang
> > + * can be inspected; there is no queue or job to blame here. Must be
> > + * outside pending_lock as the capture takes sleeping locks, hence
> > + * @seqno_recv is sampled above while the lock is still held.
> > + */
> > + if (timedout_seqno)
> > + xe_devcoredump_gt(tlb_inval_to_gt(tlb_inval),
> > + "TLB invalidation fence timeout, seqno=%d recv=%d",
> > + timedout_seqno, seqno_recv);
>
> Since the PM reference was dropped earlier in the loop, would this call to
> xe_devcoredump_gt() proceed without holding one? If the thread gets
> preempted long enough for the autosuspend delay to expire, the forcewake
> operation inside devcoredump_snapshot() might hit the hardware while it is
> unpowered.
>
> --
> Sashiko AI review · https://sashiko.dev/#/patchset/20260921182121.308217-1-talesam@gmail.com?part=1
--
Com os cumprimentos,
Tales A. Mendonça
talesam.org
communitybig.org
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v5 1/3] drm/xe: Capture devcoredump on TLB invalidation timeout
2026-09-21 20:28 ` Tales A. Mendonça
@ 2026-09-22 2:19 ` Matthew Brost
0 siblings, 0 replies; 14+ messages in thread
From: Matthew Brost @ 2026-09-22 2:19 UTC (permalink / raw)
To: Tales A. Mendonça; +Cc: sashiko-reviews, dri-devel, intel-xe
On Mon, Sep 21, 2026 at 05:28:22PM -0300, Tales A. Mendonça wrote:
> On Mon, Sep 21, 2026 at 03:33:00PM -0300, sashiko-bot@kernel.org wrote:
> > [High] drm/xe: MMIO access without PM reference in devcoredump on TLB timeout
>
> Correct on both counts, and it is my patch that introduces it.
>
> Tracing it: every pending invalidation fence holds a runtime PM
> reference, taken by xe_pm_runtime_get_noresume() in
> xe_tlb_inval_fence_init(). xe_tlb_inval_fence_signal() calls
> xe_tlb_inval_fence_fini(), which drops it. The timeout loop signals all
> the expired fences and only then, after dropping pending_lock, calls
> xe_devcoredump_gt(). devcoredump_snapshot() acquires forcewake without
> taking a PM reference of its own - it has always relied on the caller
> holding one, which the existing job-timeout caller does. The new
> GT-level caller may have just released the last one, so the device can
> begin autosuspending before the snapshot touches the hardware.
>
> Fixed for v6 by holding a reference across the capture, taken while the
> pending fences still guarantee the device is awake:
>
> if (!timedout_seqno) {
> /*
> * Hold a PM reference across the capture below. Every
> * pending fence holds one, so the device is awake
> * here, but signalling them may drop the last
> * reference and let it autosuspend before the
> * snapshot touches the hardware.
> */
> xe_pm_runtime_get_noresume(xe);
> }
>
> and released after xe_devcoredump_gt() returns.
>
> Taking it inside pending_lock is safe: xe_pm_runtime_get_noresume() goes
> through pm_runtime_get_if_in_use(), and its "Missing outer runtime PM
> protection" warning cannot fire here, because the fence reference is
> still held at that point.
>
This is correct.
Matt
> Tales
>
> Em seg., 21 de set. de 2026 às 15:33, <sashiko-bot@kernel.org> escreveu:
> >
> > Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> > - [High] drm/xe: MMIO access without PM reference in devcoredump on TLB timeout
> > --
> >
> > commit a463de937c804fe9be7ed86bfbfa297e4f35c466
> > Author: Tales A. Mendonça <talesam@gmail.com>
> >
> > drm/xe: Capture devcoredump on TLB invalidation timeout
> >
> > This commit adds xe_devcoredump_gt() to capture the GuC log and CT state
> > for GT-level hangs that are not tied to a specific queue or job. It then
> > hooks this capture mechanism into the TLB invalidation timeout path. This
> > helps in diagnosing firmware stalls where the invalidation request was
> > consumed but the ack was delayed.
> >
> > Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8678
> >
> > > diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
> > > --- a/drivers/gpu/drm/xe/xe_devcoredump.c
> > > +++ b/drivers/gpu/drm/xe/xe_devcoredump.c
> > [ ... ]
> > > @@ -323,40 +318,44 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
> > > struct xe_gt *gt,
> > > struct xe_exec_queue *q,
> > > struct xe_sched_job *job)
> > > {
> > [ ... ]
> > > /* keep going if fw fails as we still want to save the memory and SW data */
> > > - CLASS(xe_force_wake, fw_ref)(gt_to_fw(q->gt), XE_FORCEWAKE_ALL);
> > > + CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
> >
> > [Severity: High]
> > If this capture path is reached without holding a PM runtime reference, does
> > acquiring the forcewake here attempt MMIO accesses while the device is in a
> > low-power state? Accessing MMIO registers when the device has entered
> > autosuspend (D3cold) typically causes unhandled PCIe errors or system
> > crashes.
> >
> > [ ... ]
> > > diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
> > > --- a/drivers/gpu/drm/xe/xe_tlb_inval.c
> > > +++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
> > [ ... ]
> > > @@ -90,13 +98,27 @@ static void xe_tlb_inval_fence_timeout(struct work_struct *work)
> > > "TLB invalidation fence timeout, seqno=%d recv=%d",
> > > fence->seqno, tlb_inval->seqno_recv);
> > >
> > > + timedout_seqno = fence->seqno;
> > > +
> > > fence->base.error = -ETIME;
> > > xe_tlb_inval_fence_signal(fence);
> >
> > [Severity: High]
> > Can this sequence drop the last PM runtime reference before the devcoredump
> > is captured?
> >
> > Looking at xe_tlb_inval_fence_signal(), it calls xe_tlb_inval_fence_fini()
> > which drops the PM runtime reference (xe_pm_runtime_put). If this was the
> > last active reference, the device could begin autosuspending.
> >
> > > }
> > > if (!list_empty(&tlb_inval->pending_fences))
> > > queue_delayed_work(tlb_inval->timeout_wq, &tlb_inval->fence_tdr,
> > > timeout_delay);
> > > + seqno_recv = tlb_inval->seqno_recv;
> > > spin_unlock_irq(&tlb_inval->pending_lock);
> > > +
> > > + /*
> > > + * Capture the GuC log and CT state so the firmware side of the hang
> > > + * can be inspected; there is no queue or job to blame here. Must be
> > > + * outside pending_lock as the capture takes sleeping locks, hence
> > > + * @seqno_recv is sampled above while the lock is still held.
> > > + */
> > > + if (timedout_seqno)
> > > + xe_devcoredump_gt(tlb_inval_to_gt(tlb_inval),
> > > + "TLB invalidation fence timeout, seqno=%d recv=%d",
> > > + timedout_seqno, seqno_recv);
> >
> > Since the PM reference was dropped earlier in the loop, would this call to
> > xe_devcoredump_gt() proceed without holding one? If the thread gets
> > preempted long enough for the autosuspend delay to expire, the forcewake
> > operation inside devcoredump_snapshot() might hit the hardware while it is
> > unpowered.
> >
> > --
> > Sashiko AI review · https://sashiko.dev/#/patchset/20260921182121.308217-1-talesam@gmail.com?part=1
>
>
>
> --
> Com os cumprimentos,
>
> Tales A. Mendonça
> talesam.org
> communitybig.org
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v5 2/3] drm/xe: Log when a timed out TLB invalidation ack finally arrives
2026-09-21 18:21 [PATCH v5 0/3] drm/xe: fix GuC TLB invalidation ack stalls on ARL (Wa_22016122933) Tales A. Mendonça
2026-09-21 18:21 ` [PATCH v5 1/3] drm/xe: Capture devcoredump on TLB invalidation timeout Tales A. Mendonça
@ 2026-09-21 18:21 ` Tales A. Mendonça
2026-09-21 18:21 ` [PATCH v5 3/3] drm/xe: Implement Wa_22016122933 Tales A. Mendonça
` (4 subsequent siblings)
6 siblings, 0 replies; 14+ messages in thread
From: Tales A. Mendonça @ 2026-09-21 18:21 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, daniele.ceraolospurio, stuart.summers,
julia.filipchuk, thomas.hellstrom, rodrigo.vivi, jani.nikula,
navonjohnlukose, dri-devel, Tales A. Mendonça
When a TLB invalidation fence times out we log the timeout, but if the
ack for that seqno later shows up there is no record of it, making it
impossible to tell from logs whether the ack was lost forever or merely
(very) late.
Track the most recent timed out seqno and log how late its ack arrives,
relative to both the original request and the moment the fence was
signaled with -ETIME.
On ARL with GuC 70.53.0 this shows the acks are never lost: they
consistently arrive ~2.3s after the request, tens of milliseconds after
the TDR has already signaled the fence:
TLB invalidation fence timeout, seqno=10992 recv=10991
TLB invalidation late ack: seqno=10992 recv=10992,
request-to-ack=2314ms, timeout-to-ack=45ms
Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8678
Signed-off-by: Tales A. Mendonça <talesam@gmail.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_tlb_inval.c | 19 +++++++++++++++++++
drivers/gpu/drm/xe/xe_tlb_inval_types.h | 17 +++++++++++++++++
2 files changed, 36 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval.c b/drivers/gpu/drm/xe/xe_tlb_inval.c
index 737cff3664f..d865265c743 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval.c
+++ b/drivers/gpu/drm/xe/xe_tlb_inval.c
@@ -14,6 +14,7 @@
#include "xe_guc_tlb_inval.h"
#include "xe_mmio.h"
#include "xe_pm.h"
+#include "xe_printk.h"
#include "xe_tlb_inval.h"
#include "xe_trace.h"
@@ -99,6 +100,11 @@ static void xe_tlb_inval_fence_timeout(struct work_struct *work)
fence->seqno, tlb_inval->seqno_recv);
timedout_seqno = fence->seqno;
+ if (!tlb_inval->timedout_seqno) {
+ tlb_inval->timedout_seqno = fence->seqno;
+ tlb_inval->timedout_inval_time = fence->inval_time;
+ tlb_inval->timedout_time = ktime_get();
+ }
fence->base.error = -ETIME;
xe_tlb_inval_fence_signal(fence);
@@ -229,6 +235,7 @@ void xe_tlb_inval_reset(struct xe_tlb_inval *tlb_inval)
else
pending_seqno = tlb_inval->seqno - 1;
WRITE_ONCE(tlb_inval->seqno_recv, pending_seqno);
+ tlb_inval->timedout_seqno = 0;
list_for_each_entry_safe(fence, next,
&tlb_inval->pending_fences, link)
@@ -457,6 +464,18 @@ void xe_tlb_inval_done_handler(struct xe_tlb_inval *tlb_inval, int seqno)
WRITE_ONCE(tlb_inval->seqno_recv, seqno);
+ if (tlb_inval->timedout_seqno &&
+ xe_tlb_inval_seqno_past(tlb_inval, tlb_inval->timedout_seqno)) {
+ ktime_t now = ktime_get();
+
+ xe_warn(xe,
+ "TLB invalidation late ack: seqno=%d recv=%d, request-to-ack=%lldms, timeout-to-ack=%lldms",
+ tlb_inval->timedout_seqno, seqno,
+ ktime_ms_delta(now, tlb_inval->timedout_inval_time),
+ ktime_ms_delta(now, tlb_inval->timedout_time));
+ tlb_inval->timedout_seqno = 0;
+ }
+
list_for_each_entry_safe(fence, next,
&tlb_inval->pending_fences, link) {
trace_xe_tlb_inval_fence_recv(xe, fence);
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_types.h b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
index d77be1aedc9..80d2019fa20 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval_types.h
+++ b/drivers/gpu/drm/xe/xe_tlb_inval_types.h
@@ -112,6 +112,23 @@ struct xe_tlb_inval {
* @pending_lock: protects @pending_fences and updating @seqno_recv.
*/
spinlock_t pending_lock;
+ /**
+ * @timedout_seqno: seqno of the most recent timed out TLB
+ * invalidation, 0 if none. Used to measure how late the ack for a
+ * timed out invalidation actually arrives. Protected by
+ * @pending_lock.
+ */
+ int timedout_seqno;
+ /**
+ * @timedout_inval_time: request time of @timedout_seqno. Protected by
+ * @pending_lock.
+ */
+ ktime_t timedout_inval_time;
+ /**
+ * @timedout_time: time @timedout_seqno was signaled with -ETIME.
+ * Protected by @pending_lock.
+ */
+ ktime_t timedout_time;
/**
* @fence_tdr: schedules a delayed call to xe_tlb_fence_timeout after
* the timeout interval is over.
--
2.55.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH v5 3/3] drm/xe: Implement Wa_22016122933
2026-09-21 18:21 [PATCH v5 0/3] drm/xe: fix GuC TLB invalidation ack stalls on ARL (Wa_22016122933) Tales A. Mendonça
2026-09-21 18:21 ` [PATCH v5 1/3] drm/xe: Capture devcoredump on TLB invalidation timeout Tales A. Mendonça
2026-09-21 18:21 ` [PATCH v5 2/3] drm/xe: Log when a timed out TLB invalidation ack finally arrives Tales A. Mendonça
@ 2026-09-21 18:21 ` Tales A. Mendonça
2026-09-21 18:48 ` Matthew Brost
2026-09-21 18:27 ` ✗ CI.checkpatch: warning for drm/xe: fix GuC TLB invalidation ack stalls on ARL (Wa_22016122933) (rev4) Patchwork
` (3 subsequent siblings)
6 siblings, 1 reply; 14+ messages in thread
From: Tales A. Mendonça @ 2026-09-21 18:21 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, daniele.ceraolospurio, stuart.summers,
julia.filipchuk, thomas.hellstrom, rodrigo.vivi, jani.nikula,
navonjohnlukose, dri-devel, Tales A. Mendonça
On platforms with a standalone media GT and media version 13.00
(MTL/ARL), memory shared between the CPU and the media GT's GuC must
not be mapped cached on the CPU side: the CPU can otherwise read stale
cache lines for data the GuC has already written.
i915 implements this as Wa_22016122933 (see
intel_gt_needs_wa_22016122933(), used by intel_guc_allocate_vma() and
intel_gt_coherent_map_type()); xe never inherited it.
The visible symptom on ARL is TLB invalidation acks stalling for a
near-constant ~2.3s: the GuC writes the G2H ack in time, but the CPU
keeps reading a stale (empty) view of the G2H CTB until the line is
naturally evicted, so the fence timeout at 2.25s fires first. GuC log
decode confirmed all invalidations were handled promptly by the
firmware, and only the media GT was affected. See Link for the full
investigation (three machines affected: 7d51, 7dd1, Arc Pro 130T).
Making the mapping coherent instead of uncached does not help: with a
GGTT PAT entry repurposed to WB|COH_2WAY the driver comes up and the
media GT GuC runs, but the stalls remain (request-to-ack 2290ms).
Uncached really is required here. Note that 2-way coherency is not
normally reachable from a GGTT PTE (only 2 PAT bits), so that
experiment needed a modified PAT table and may not reflect a supported
configuration.
Add the OOB workaround scoped like i915 (media version 13.00, media GT
only - MEDIA_VERSION() OOB rules only match the media GT on standalone
media platforms) and apply XE_BO_FLAG_NEEDS_UC to the GuC-shared
allocations the CPU reads from: the CTBs, the GuC log, ADS, the SLPC
shared data and the engine activity buffers. hwconfig and the G2G
buffer are allocated on the primary GT only, where the workaround does
not apply.
Note that XE_BO_FLAG_NEEDS_UC drives both the CPU mapping (uncached)
and the GGTT cache mode (XE_CACHE_NONE instead of XE_CACHE_WB), which is
stricter than i915: i915 documents the workaround as WC on the CPU side
and UC on the GPU side. A CPU-WC variant with the GGTT side kept at
XE_CACHE_NONE was measured to be equally effective, but expressing it
would require either a new BO flag or decoupling the GGTT cache-mode
selection from XE_BO_FLAG_NEEDS_UC - simply swapping in
XE_BO_FLAG_FORCE_WC silently relaxes the GPU side back to WB and the
stalls return. The stricter mapping is kept here since it is the tested
configuration and no throughput difference between the two was
measurable; the extra plumbing can be added later if parity with i915 is
preferred.
Scope is limited to the GuC-shared allocations, which is where the
failures were observed. i915 additionally covers media-GT LRC/ring
state; extending xe to match can be done as a follow-up if wanted.
Validation on two ARL machines (7d51 and 7dd1): before, 20-60 TLB
invalidation ack stalls per day, every day, for weeks, on every kernel
and on two GuC firmware versions (70.53.0 and 70.72.1). After: zero
stalls in six weeks of combined runtime, over 10M TLB invalidations
processed under the same workloads, across kernels 7.1.6, 7.1.8 and
7.2. The 7dd1 machine, which could not survive a day of media
workloads on xe without a platform freeze, has been running xe full
time since 11 August, including days with heavy video transcoding,
with zero stalls and zero freezes.
The coherency experiment, the CPU-WC measurements and the engine
activity coverage gap were found by Navon John Lukose while A/B
testing v2 on an ARL 7d51.
Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8678
Suggested-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Tales A. Mendonça <talesam@gmail.com>
Tested-by: Navon John Lukose <navonjohnlukose@gmail.com>
---
drivers/gpu/drm/xe/xe_guc.c | 16 ++++++++++++++++
drivers/gpu/drm/xe/xe_guc.h | 2 ++
drivers/gpu/drm/xe/xe_guc_ads.c | 3 ++-
drivers/gpu/drm/xe/xe_guc_ct.c | 6 ++++--
drivers/gpu/drm/xe/xe_guc_engine_activity.c | 6 ++++--
drivers/gpu/drm/xe/xe_guc_log.c | 7 +++++--
drivers/gpu/drm/xe/xe_guc_pc.c | 3 ++-
drivers/gpu/drm/xe/xe_wa_oob.rules | 1 +
8 files changed, 36 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index c7f8bbd4cb9..3ab4cb9e496 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -1469,6 +1469,22 @@ int xe_guc_suspend(struct xe_guc *guc)
return 0;
}
+/**
+ * xe_guc_bo_wa_flags - Extra BO flags for memory shared with the GuC
+ * @gt: the &xe_gt whose GuC the buffer will be shared with
+ *
+ * Wa_22016122933: on the standalone media GT, memory shared between the
+ * CPU and the GuC must not be mapped cached on the CPU side, otherwise
+ * the CPU can read stale data written by the GuC (e.g. G2H CTB writes)
+ * for multiple seconds.
+ *
+ * Return: additional XE_BO_FLAG_* to use when allocating GuC-shared memory
+ */
+u32 xe_guc_bo_wa_flags(struct xe_gt *gt)
+{
+ return XE_GT_WA(gt, 22016122933) ? XE_BO_FLAG_NEEDS_UC : 0;
+}
+
void xe_guc_notify(struct xe_guc *guc)
{
struct xe_gt *gt = guc_to_gt(guc);
diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
index 61e3ee19a59..c4eca40d69c 100644
--- a/drivers/gpu/drm/xe/xe_guc.h
+++ b/drivers/gpu/drm/xe/xe_guc.h
@@ -30,6 +30,7 @@
xe_guc_fw_version_at_least((guc), MAKE_GUC_VER_ARGS(ver))
struct drm_printer;
+struct xe_gt;
void xe_guc_comm_init_early(struct xe_guc *guc);
int xe_guc_init_noalloc(struct xe_guc *guc);
@@ -45,6 +46,7 @@ void xe_guc_runtime_suspend(struct xe_guc *guc);
void xe_guc_runtime_resume(struct xe_guc *guc);
int xe_guc_suspend(struct xe_guc *guc);
int xe_guc_softreset(struct xe_guc *guc);
+u32 xe_guc_bo_wa_flags(struct xe_gt *gt);
void xe_guc_notify(struct xe_guc *guc);
int xe_guc_auth_huc(struct xe_guc *guc, u32 rsa_addr);
int xe_guc_mmio_send(struct xe_guc *guc, const u32 *request, u32 len);
diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index ff8eee3831a..abc7266fc6f 100644
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -435,7 +435,8 @@ int xe_guc_ads_init(struct xe_guc_ads *ads)
XE_BO_FLAG_SYSTEM |
XE_BO_FLAG_GGTT |
XE_BO_FLAG_GGTT_INVALIDATE |
- XE_BO_FLAG_PINNED_NORESTORE);
+ XE_BO_FLAG_PINNED_NORESTORE |
+ xe_guc_bo_wa_flags(gt));
if (IS_ERR(bo))
return PTR_ERR(bo);
diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
index 5c4733da385..5c393aa29de 100644
--- a/drivers/gpu/drm/xe/xe_guc_ct.c
+++ b/drivers/gpu/drm/xe/xe_guc_ct.c
@@ -376,7 +376,8 @@ int xe_guc_ct_init(struct xe_guc_ct *ct)
XE_BO_FLAG_SYSTEM |
XE_BO_FLAG_GGTT |
XE_BO_FLAG_GGTT_INVALIDATE |
- XE_BO_FLAG_PINNED_NORESTORE);
+ XE_BO_FLAG_PINNED_NORESTORE |
+ xe_guc_bo_wa_flags(gt));
if (IS_ERR(bo))
return PTR_ERR(bo);
@@ -386,7 +387,8 @@ int xe_guc_ct_init(struct xe_guc_ct *ct)
XE_BO_FLAG_SYSTEM |
XE_BO_FLAG_GGTT |
XE_BO_FLAG_GGTT_INVALIDATE |
- XE_BO_FLAG_PINNED_NORESTORE);
+ XE_BO_FLAG_PINNED_NORESTORE |
+ xe_guc_bo_wa_flags(gt));
if (IS_ERR(bo))
return PTR_ERR(bo);
diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.c b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
index a782be57caa..729ce8ac140 100644
--- a/drivers/gpu/drm/xe/xe_guc_engine_activity.c
+++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
@@ -97,7 +97,8 @@ static int allocate_engine_activity_buffers(struct xe_guc *guc,
metadata_bo = xe_bo_create_pin_map_novm(gt_to_xe(gt), tile, PAGE_ALIGN(metadata_size),
ttm_bo_type_kernel, XE_BO_FLAG_SYSTEM |
- XE_BO_FLAG_GGTT | XE_BO_FLAG_GGTT_INVALIDATE,
+ XE_BO_FLAG_GGTT | XE_BO_FLAG_GGTT_INVALIDATE |
+ xe_guc_bo_wa_flags(gt),
false);
if (IS_ERR(metadata_bo))
@@ -105,7 +106,8 @@ static int allocate_engine_activity_buffers(struct xe_guc *guc,
bo = xe_bo_create_pin_map_novm(gt_to_xe(gt), tile, PAGE_ALIGN(size),
ttm_bo_type_kernel, XE_BO_FLAG_VRAM_IF_DGFX(tile) |
- XE_BO_FLAG_GGTT | XE_BO_FLAG_GGTT_INVALIDATE, false);
+ XE_BO_FLAG_GGTT | XE_BO_FLAG_GGTT_INVALIDATE |
+ xe_guc_bo_wa_flags(gt), false);
if (IS_ERR(bo)) {
xe_bo_unpin_map_no_vm(metadata_bo);
diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c
index 538d4df0f7a..7d006268ce9 100644
--- a/drivers/gpu/drm/xe/xe_guc_log.c
+++ b/drivers/gpu/drm/xe/xe_guc_log.c
@@ -17,6 +17,7 @@
#include "xe_force_wake.h"
#include "xe_gt_printk.h"
#include "xe_gt_types.h"
+#include "xe_guc.h"
#include "xe_map.h"
#include "xe_mmio.h"
#include "xe_module.h"
@@ -624,14 +625,16 @@ void xe_guc_log_print_lfd(struct xe_guc_log *log, struct drm_printer *p)
int xe_guc_log_init(struct xe_guc_log *log)
{
struct xe_device *xe = log_to_xe(log);
- struct xe_tile *tile = gt_to_tile(log_to_gt(log));
+ struct xe_gt *gt = log_to_gt(log);
+ struct xe_tile *tile = gt_to_tile(gt);
struct xe_bo *bo;
bo = xe_managed_bo_create_pin_map(xe, tile, GUC_LOG_SIZE,
XE_BO_FLAG_SYSTEM |
XE_BO_FLAG_GGTT |
XE_BO_FLAG_GGTT_INVALIDATE |
- XE_BO_FLAG_PINNED_NORESTORE);
+ XE_BO_FLAG_PINNED_NORESTORE |
+ xe_guc_bo_wa_flags(gt));
if (IS_ERR(bo))
return PTR_ERR(bo);
diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
index 097b075bd89..e0105222a2c 100644
--- a/drivers/gpu/drm/xe/xe_guc_pc.c
+++ b/drivers/gpu/drm/xe/xe_guc_pc.c
@@ -1391,7 +1391,8 @@ int xe_guc_pc_init(struct xe_guc_pc *pc)
XE_BO_FLAG_VRAM_IF_DGFX(tile) |
XE_BO_FLAG_GGTT |
XE_BO_FLAG_GGTT_INVALIDATE |
- XE_BO_FLAG_PINNED_NORESTORE);
+ XE_BO_FLAG_PINNED_NORESTORE |
+ xe_guc_bo_wa_flags(gt));
if (IS_ERR(bo))
return PTR_ERR(bo);
diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index dd69ad07f7a..30958b26a1d 100644
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -14,6 +14,7 @@
16017236439 PLATFORM(PVC)
14019821291 MEDIA_VERSION_RANGE(1300, 2000)
14015076503 MEDIA_VERSION(1300)
+22016122933 MEDIA_VERSION(1300)
14018913170 GRAPHICS_VERSION_RANGE(1270, 1274)
MEDIA_VERSION(1300)
PLATFORM(DG2)
--
2.55.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v5 3/3] drm/xe: Implement Wa_22016122933
2026-09-21 18:21 ` [PATCH v5 3/3] drm/xe: Implement Wa_22016122933 Tales A. Mendonça
@ 2026-09-21 18:48 ` Matthew Brost
2026-09-21 20:18 ` Tales A. Mendonça
0 siblings, 1 reply; 14+ messages in thread
From: Matthew Brost @ 2026-09-21 18:48 UTC (permalink / raw)
To: Tales A. Mendonça
Cc: intel-xe, daniele.ceraolospurio, stuart.summers, julia.filipchuk,
thomas.hellstrom, rodrigo.vivi, jani.nikula, navonjohnlukose,
dri-devel
On Mon, Sep 21, 2026 at 03:21:21PM -0300, Tales A. Mendonça wrote:
> On platforms with a standalone media GT and media version 13.00
> (MTL/ARL), memory shared between the CPU and the media GT's GuC must
> not be mapped cached on the CPU side: the CPU can otherwise read stale
> cache lines for data the GuC has already written.
>
> i915 implements this as Wa_22016122933 (see
> intel_gt_needs_wa_22016122933(), used by intel_guc_allocate_vma() and
> intel_gt_coherent_map_type()); xe never inherited it.
>
> The visible symptom on ARL is TLB invalidation acks stalling for a
> near-constant ~2.3s: the GuC writes the G2H ack in time, but the CPU
> keeps reading a stale (empty) view of the G2H CTB until the line is
> naturally evicted, so the fence timeout at 2.25s fires first. GuC log
> decode confirmed all invalidations were handled promptly by the
> firmware, and only the media GT was affected. See Link for the full
> investigation (three machines affected: 7d51, 7dd1, Arc Pro 130T).
>
> Making the mapping coherent instead of uncached does not help: with a
> GGTT PAT entry repurposed to WB|COH_2WAY the driver comes up and the
> media GT GuC runs, but the stalls remain (request-to-ack 2290ms).
> Uncached really is required here. Note that 2-way coherency is not
> normally reachable from a GGTT PTE (only 2 PAT bits), so that
> experiment needed a modified PAT table and may not reflect a supported
> configuration.
>
> Add the OOB workaround scoped like i915 (media version 13.00, media GT
> only - MEDIA_VERSION() OOB rules only match the media GT on standalone
> media platforms) and apply XE_BO_FLAG_NEEDS_UC to the GuC-shared
> allocations the CPU reads from: the CTBs, the GuC log, ADS, the SLPC
> shared data and the engine activity buffers. hwconfig and the G2G
> buffer are allocated on the primary GT only, where the workaround does
> not apply.
>
> Note that XE_BO_FLAG_NEEDS_UC drives both the CPU mapping (uncached)
> and the GGTT cache mode (XE_CACHE_NONE instead of XE_CACHE_WB), which is
> stricter than i915: i915 documents the workaround as WC on the CPU side
> and UC on the GPU side. A CPU-WC variant with the GGTT side kept at
> XE_CACHE_NONE was measured to be equally effective, but expressing it
> would require either a new BO flag or decoupling the GGTT cache-mode
> selection from XE_BO_FLAG_NEEDS_UC - simply swapping in
> XE_BO_FLAG_FORCE_WC silently relaxes the GPU side back to WB and the
> stalls return. The stricter mapping is kept here since it is the tested
> configuration and no throughput difference between the two was
> measurable; the extra plumbing can be added later if parity with i915 is
> preferred.
>
> Scope is limited to the GuC-shared allocations, which is where the
> failures were observed. i915 additionally covers media-GT LRC/ring
> state; extending xe to match can be done as a follow-up if wanted.
>
> Validation on two ARL machines (7d51 and 7dd1): before, 20-60 TLB
> invalidation ack stalls per day, every day, for weeks, on every kernel
> and on two GuC firmware versions (70.53.0 and 70.72.1). After: zero
> stalls in six weeks of combined runtime, over 10M TLB invalidations
> processed under the same workloads, across kernels 7.1.6, 7.1.8 and
> 7.2. The 7dd1 machine, which could not survive a day of media
> workloads on xe without a platform freeze, has been running xe full
> time since 11 August, including days with heavy video transcoding,
> with zero stalls and zero freezes.
>
> The coherency experiment, the CPU-WC measurements and the engine
> activity coverage gap were found by Navon John Lukose while A/B
> testing v2 on an ARL 7d51.
>
> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8678
> Suggested-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Tales A. Mendonça <talesam@gmail.com>
> Tested-by: Navon John Lukose <navonjohnlukose@gmail.com>
> ---
> drivers/gpu/drm/xe/xe_guc.c | 16 ++++++++++++++++
> drivers/gpu/drm/xe/xe_guc.h | 2 ++
> drivers/gpu/drm/xe/xe_guc_ads.c | 3 ++-
> drivers/gpu/drm/xe/xe_guc_ct.c | 6 ++++--
> drivers/gpu/drm/xe/xe_guc_engine_activity.c | 6 ++++--
> drivers/gpu/drm/xe/xe_guc_log.c | 7 +++++--
> drivers/gpu/drm/xe/xe_guc_pc.c | 3 ++-
> drivers/gpu/drm/xe/xe_wa_oob.rules | 1 +
One thing the i915 WA does that isn't present here is if non-dGPU the
LRC is marked UC - see __lrc_alloc_state in the i915.
Is that needed? AFIAK the GuC only reads the LRC though and all LRC
write are issued from hardware, so maybe the i915 application of this
W/A isn't correct? The fact you are not seeing hangs with this suggests
this part of thw W/A isn't needed.
Matt
> 8 files changed, 36 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index c7f8bbd4cb9..3ab4cb9e496 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -1469,6 +1469,22 @@ int xe_guc_suspend(struct xe_guc *guc)
> return 0;
> }
>
> +/**
> + * xe_guc_bo_wa_flags - Extra BO flags for memory shared with the GuC
> + * @gt: the &xe_gt whose GuC the buffer will be shared with
> + *
> + * Wa_22016122933: on the standalone media GT, memory shared between the
> + * CPU and the GuC must not be mapped cached on the CPU side, otherwise
> + * the CPU can read stale data written by the GuC (e.g. G2H CTB writes)
> + * for multiple seconds.
> + *
> + * Return: additional XE_BO_FLAG_* to use when allocating GuC-shared memory
> + */
> +u32 xe_guc_bo_wa_flags(struct xe_gt *gt)
> +{
> + return XE_GT_WA(gt, 22016122933) ? XE_BO_FLAG_NEEDS_UC : 0;
> +}
> +
> void xe_guc_notify(struct xe_guc *guc)
> {
> struct xe_gt *gt = guc_to_gt(guc);
> diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
> index 61e3ee19a59..c4eca40d69c 100644
> --- a/drivers/gpu/drm/xe/xe_guc.h
> +++ b/drivers/gpu/drm/xe/xe_guc.h
> @@ -30,6 +30,7 @@
> xe_guc_fw_version_at_least((guc), MAKE_GUC_VER_ARGS(ver))
>
> struct drm_printer;
> +struct xe_gt;
>
> void xe_guc_comm_init_early(struct xe_guc *guc);
> int xe_guc_init_noalloc(struct xe_guc *guc);
> @@ -45,6 +46,7 @@ void xe_guc_runtime_suspend(struct xe_guc *guc);
> void xe_guc_runtime_resume(struct xe_guc *guc);
> int xe_guc_suspend(struct xe_guc *guc);
> int xe_guc_softreset(struct xe_guc *guc);
> +u32 xe_guc_bo_wa_flags(struct xe_gt *gt);
> void xe_guc_notify(struct xe_guc *guc);
> int xe_guc_auth_huc(struct xe_guc *guc, u32 rsa_addr);
> int xe_guc_mmio_send(struct xe_guc *guc, const u32 *request, u32 len);
> diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
> index ff8eee3831a..abc7266fc6f 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ads.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ads.c
> @@ -435,7 +435,8 @@ int xe_guc_ads_init(struct xe_guc_ads *ads)
> XE_BO_FLAG_SYSTEM |
> XE_BO_FLAG_GGTT |
> XE_BO_FLAG_GGTT_INVALIDATE |
> - XE_BO_FLAG_PINNED_NORESTORE);
> + XE_BO_FLAG_PINNED_NORESTORE |
> + xe_guc_bo_wa_flags(gt));
> if (IS_ERR(bo))
> return PTR_ERR(bo);
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
> index 5c4733da385..5c393aa29de 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ct.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ct.c
> @@ -376,7 +376,8 @@ int xe_guc_ct_init(struct xe_guc_ct *ct)
> XE_BO_FLAG_SYSTEM |
> XE_BO_FLAG_GGTT |
> XE_BO_FLAG_GGTT_INVALIDATE |
> - XE_BO_FLAG_PINNED_NORESTORE);
> + XE_BO_FLAG_PINNED_NORESTORE |
> + xe_guc_bo_wa_flags(gt));
> if (IS_ERR(bo))
> return PTR_ERR(bo);
>
> @@ -386,7 +387,8 @@ int xe_guc_ct_init(struct xe_guc_ct *ct)
> XE_BO_FLAG_SYSTEM |
> XE_BO_FLAG_GGTT |
> XE_BO_FLAG_GGTT_INVALIDATE |
> - XE_BO_FLAG_PINNED_NORESTORE);
> + XE_BO_FLAG_PINNED_NORESTORE |
> + xe_guc_bo_wa_flags(gt));
> if (IS_ERR(bo))
> return PTR_ERR(bo);
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.c b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
> index a782be57caa..729ce8ac140 100644
> --- a/drivers/gpu/drm/xe/xe_guc_engine_activity.c
> +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
> @@ -97,7 +97,8 @@ static int allocate_engine_activity_buffers(struct xe_guc *guc,
>
> metadata_bo = xe_bo_create_pin_map_novm(gt_to_xe(gt), tile, PAGE_ALIGN(metadata_size),
> ttm_bo_type_kernel, XE_BO_FLAG_SYSTEM |
> - XE_BO_FLAG_GGTT | XE_BO_FLAG_GGTT_INVALIDATE,
> + XE_BO_FLAG_GGTT | XE_BO_FLAG_GGTT_INVALIDATE |
> + xe_guc_bo_wa_flags(gt),
> false);
>
> if (IS_ERR(metadata_bo))
> @@ -105,7 +106,8 @@ static int allocate_engine_activity_buffers(struct xe_guc *guc,
>
> bo = xe_bo_create_pin_map_novm(gt_to_xe(gt), tile, PAGE_ALIGN(size),
> ttm_bo_type_kernel, XE_BO_FLAG_VRAM_IF_DGFX(tile) |
> - XE_BO_FLAG_GGTT | XE_BO_FLAG_GGTT_INVALIDATE, false);
> + XE_BO_FLAG_GGTT | XE_BO_FLAG_GGTT_INVALIDATE |
> + xe_guc_bo_wa_flags(gt), false);
>
> if (IS_ERR(bo)) {
> xe_bo_unpin_map_no_vm(metadata_bo);
> diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c
> index 538d4df0f7a..7d006268ce9 100644
> --- a/drivers/gpu/drm/xe/xe_guc_log.c
> +++ b/drivers/gpu/drm/xe/xe_guc_log.c
> @@ -17,6 +17,7 @@
> #include "xe_force_wake.h"
> #include "xe_gt_printk.h"
> #include "xe_gt_types.h"
> +#include "xe_guc.h"
> #include "xe_map.h"
> #include "xe_mmio.h"
> #include "xe_module.h"
> @@ -624,14 +625,16 @@ void xe_guc_log_print_lfd(struct xe_guc_log *log, struct drm_printer *p)
> int xe_guc_log_init(struct xe_guc_log *log)
> {
> struct xe_device *xe = log_to_xe(log);
> - struct xe_tile *tile = gt_to_tile(log_to_gt(log));
> + struct xe_gt *gt = log_to_gt(log);
> + struct xe_tile *tile = gt_to_tile(gt);
> struct xe_bo *bo;
>
> bo = xe_managed_bo_create_pin_map(xe, tile, GUC_LOG_SIZE,
> XE_BO_FLAG_SYSTEM |
> XE_BO_FLAG_GGTT |
> XE_BO_FLAG_GGTT_INVALIDATE |
> - XE_BO_FLAG_PINNED_NORESTORE);
> + XE_BO_FLAG_PINNED_NORESTORE |
> + xe_guc_bo_wa_flags(gt));
> if (IS_ERR(bo))
> return PTR_ERR(bo);
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
> index 097b075bd89..e0105222a2c 100644
> --- a/drivers/gpu/drm/xe/xe_guc_pc.c
> +++ b/drivers/gpu/drm/xe/xe_guc_pc.c
> @@ -1391,7 +1391,8 @@ int xe_guc_pc_init(struct xe_guc_pc *pc)
> XE_BO_FLAG_VRAM_IF_DGFX(tile) |
> XE_BO_FLAG_GGTT |
> XE_BO_FLAG_GGTT_INVALIDATE |
> - XE_BO_FLAG_PINNED_NORESTORE);
> + XE_BO_FLAG_PINNED_NORESTORE |
> + xe_guc_bo_wa_flags(gt));
> if (IS_ERR(bo))
> return PTR_ERR(bo);
>
> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> index dd69ad07f7a..30958b26a1d 100644
> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> @@ -14,6 +14,7 @@
> 16017236439 PLATFORM(PVC)
> 14019821291 MEDIA_VERSION_RANGE(1300, 2000)
> 14015076503 MEDIA_VERSION(1300)
> +22016122933 MEDIA_VERSION(1300)
> 14018913170 GRAPHICS_VERSION_RANGE(1270, 1274)
> MEDIA_VERSION(1300)
> PLATFORM(DG2)
> --
> 2.55.0
>
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v5 3/3] drm/xe: Implement Wa_22016122933
2026-09-21 18:48 ` Matthew Brost
@ 2026-09-21 20:18 ` Tales A. Mendonça
2026-09-22 2:22 ` Matthew Brost
0 siblings, 1 reply; 14+ messages in thread
From: Tales A. Mendonça @ 2026-09-21 20:18 UTC (permalink / raw)
To: Matthew Brost
Cc: intel-xe, daniele.ceraolospurio, stuart.summers, julia.filipchuk,
thomas.hellstrom, rodrigo.vivi, jani.nikula, navonjohnlukose,
dri-devel
On Mon, Sep 21, 2026 at 11:48:00AM -0700, Matthew Brost wrote:
> One thing the i915 WA does that isn't present here is if non-dGPU the
> LRC is marked UC - see __lrc_alloc_state in the i915.
>
> Is that needed? AFAIK the GuC only reads the LRC though and all LRC
> write are issued from hardware, so maybe the i915 application of this
> W/A isn't correct? The fact you are not seeing hangs with this suggests
> this part of thw W/A isn't needed.
I left it out deliberately, and I think your reading is right.
For the record on the i915 side: that marking only happens in the shmem
fallback in __lrc_alloc_state(), after i915_gem_object_create_lmem()
fails. On MTL/ARL there is no lmem, so it is the path always taken and
the WA is effectively unconditional there.
What the erratum produces is the CPU reading a stale cache line for
memory the GuC has written. That is exactly the pattern for the CTBs,
the GuC log, ADS, SLPC and the engine activity buffers - GuC writes,
CPU reads - and those are what this patch covers. The LRC does not fit
it: the writes come from hardware context save and the GuC reads it.
One caveat on my own evidence, though: six weeks with no stalls only
shows that leaving the LRC cached does not produce the TLB ack stall.
If stale LRC content were a real problem it would presumably show up as
bad context state rather than a delayed ack, and I have not been looking
for that. So I would call it supported rather than proven.
If you would rather have parity with i915 anyway, I am happy to add it,
but as a separate patch, so it can be dropped on its own if it turns
out to be unnecessary.
On how the current scope was chosen: the engine activity buffers were
not in v2. Navon found that gap by A/B testing on his own ARL and
measuring stale busyness stats, and they went in for v3. So the list is
what the hardware demonstrated it needs rather than a port of the i915
list.
Tales
Em seg., 21 de set. de 2026 às 15:48, Matthew Brost
<matthew.brost@intel.com> escreveu:
>
> On Mon, Sep 21, 2026 at 03:21:21PM -0300, Tales A. Mendonça wrote:
> > On platforms with a standalone media GT and media version 13.00
> > (MTL/ARL), memory shared between the CPU and the media GT's GuC must
> > not be mapped cached on the CPU side: the CPU can otherwise read stale
> > cache lines for data the GuC has already written.
> >
> > i915 implements this as Wa_22016122933 (see
> > intel_gt_needs_wa_22016122933(), used by intel_guc_allocate_vma() and
> > intel_gt_coherent_map_type()); xe never inherited it.
> >
> > The visible symptom on ARL is TLB invalidation acks stalling for a
> > near-constant ~2.3s: the GuC writes the G2H ack in time, but the CPU
> > keeps reading a stale (empty) view of the G2H CTB until the line is
> > naturally evicted, so the fence timeout at 2.25s fires first. GuC log
> > decode confirmed all invalidations were handled promptly by the
> > firmware, and only the media GT was affected. See Link for the full
> > investigation (three machines affected: 7d51, 7dd1, Arc Pro 130T).
> >
> > Making the mapping coherent instead of uncached does not help: with a
> > GGTT PAT entry repurposed to WB|COH_2WAY the driver comes up and the
> > media GT GuC runs, but the stalls remain (request-to-ack 2290ms).
> > Uncached really is required here. Note that 2-way coherency is not
> > normally reachable from a GGTT PTE (only 2 PAT bits), so that
> > experiment needed a modified PAT table and may not reflect a supported
> > configuration.
> >
> > Add the OOB workaround scoped like i915 (media version 13.00, media GT
> > only - MEDIA_VERSION() OOB rules only match the media GT on standalone
> > media platforms) and apply XE_BO_FLAG_NEEDS_UC to the GuC-shared
> > allocations the CPU reads from: the CTBs, the GuC log, ADS, the SLPC
> > shared data and the engine activity buffers. hwconfig and the G2G
> > buffer are allocated on the primary GT only, where the workaround does
> > not apply.
> >
> > Note that XE_BO_FLAG_NEEDS_UC drives both the CPU mapping (uncached)
> > and the GGTT cache mode (XE_CACHE_NONE instead of XE_CACHE_WB), which is
> > stricter than i915: i915 documents the workaround as WC on the CPU side
> > and UC on the GPU side. A CPU-WC variant with the GGTT side kept at
> > XE_CACHE_NONE was measured to be equally effective, but expressing it
> > would require either a new BO flag or decoupling the GGTT cache-mode
> > selection from XE_BO_FLAG_NEEDS_UC - simply swapping in
> > XE_BO_FLAG_FORCE_WC silently relaxes the GPU side back to WB and the
> > stalls return. The stricter mapping is kept here since it is the tested
> > configuration and no throughput difference between the two was
> > measurable; the extra plumbing can be added later if parity with i915 is
> > preferred.
> >
> > Scope is limited to the GuC-shared allocations, which is where the
> > failures were observed. i915 additionally covers media-GT LRC/ring
> > state; extending xe to match can be done as a follow-up if wanted.
> >
> > Validation on two ARL machines (7d51 and 7dd1): before, 20-60 TLB
> > invalidation ack stalls per day, every day, for weeks, on every kernel
> > and on two GuC firmware versions (70.53.0 and 70.72.1). After: zero
> > stalls in six weeks of combined runtime, over 10M TLB invalidations
> > processed under the same workloads, across kernels 7.1.6, 7.1.8 and
> > 7.2. The 7dd1 machine, which could not survive a day of media
> > workloads on xe without a platform freeze, has been running xe full
> > time since 11 August, including days with heavy video transcoding,
> > with zero stalls and zero freezes.
> >
> > The coherency experiment, the CPU-WC measurements and the engine
> > activity coverage gap were found by Navon John Lukose while A/B
> > testing v2 on an ARL 7d51.
> >
> > Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8678
> > Suggested-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > Signed-off-by: Tales A. Mendonça <talesam@gmail.com>
> > Tested-by: Navon John Lukose <navonjohnlukose@gmail.com>
> > ---
> > drivers/gpu/drm/xe/xe_guc.c | 16 ++++++++++++++++
> > drivers/gpu/drm/xe/xe_guc.h | 2 ++
> > drivers/gpu/drm/xe/xe_guc_ads.c | 3 ++-
> > drivers/gpu/drm/xe/xe_guc_ct.c | 6 ++++--
> > drivers/gpu/drm/xe/xe_guc_engine_activity.c | 6 ++++--
> > drivers/gpu/drm/xe/xe_guc_log.c | 7 +++++--
> > drivers/gpu/drm/xe/xe_guc_pc.c | 3 ++-
> > drivers/gpu/drm/xe/xe_wa_oob.rules | 1 +
>
> One thing the i915 WA does that isn't present here is if non-dGPU the
> LRC is marked UC - see __lrc_alloc_state in the i915.
>
> Is that needed? AFIAK the GuC only reads the LRC though and all LRC
> write are issued from hardware, so maybe the i915 application of this
> W/A isn't correct? The fact you are not seeing hangs with this suggests
> this part of thw W/A isn't needed.
>
> Matt
>
> > 8 files changed, 36 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> > index c7f8bbd4cb9..3ab4cb9e496 100644
> > --- a/drivers/gpu/drm/xe/xe_guc.c
> > +++ b/drivers/gpu/drm/xe/xe_guc.c
> > @@ -1469,6 +1469,22 @@ int xe_guc_suspend(struct xe_guc *guc)
> > return 0;
> > }
> >
> > +/**
> > + * xe_guc_bo_wa_flags - Extra BO flags for memory shared with the GuC
> > + * @gt: the &xe_gt whose GuC the buffer will be shared with
> > + *
> > + * Wa_22016122933: on the standalone media GT, memory shared between the
> > + * CPU and the GuC must not be mapped cached on the CPU side, otherwise
> > + * the CPU can read stale data written by the GuC (e.g. G2H CTB writes)
> > + * for multiple seconds.
> > + *
> > + * Return: additional XE_BO_FLAG_* to use when allocating GuC-shared memory
> > + */
> > +u32 xe_guc_bo_wa_flags(struct xe_gt *gt)
> > +{
> > + return XE_GT_WA(gt, 22016122933) ? XE_BO_FLAG_NEEDS_UC : 0;
> > +}
> > +
> > void xe_guc_notify(struct xe_guc *guc)
> > {
> > struct xe_gt *gt = guc_to_gt(guc);
> > diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
> > index 61e3ee19a59..c4eca40d69c 100644
> > --- a/drivers/gpu/drm/xe/xe_guc.h
> > +++ b/drivers/gpu/drm/xe/xe_guc.h
> > @@ -30,6 +30,7 @@
> > xe_guc_fw_version_at_least((guc), MAKE_GUC_VER_ARGS(ver))
> >
> > struct drm_printer;
> > +struct xe_gt;
> >
> > void xe_guc_comm_init_early(struct xe_guc *guc);
> > int xe_guc_init_noalloc(struct xe_guc *guc);
> > @@ -45,6 +46,7 @@ void xe_guc_runtime_suspend(struct xe_guc *guc);
> > void xe_guc_runtime_resume(struct xe_guc *guc);
> > int xe_guc_suspend(struct xe_guc *guc);
> > int xe_guc_softreset(struct xe_guc *guc);
> > +u32 xe_guc_bo_wa_flags(struct xe_gt *gt);
> > void xe_guc_notify(struct xe_guc *guc);
> > int xe_guc_auth_huc(struct xe_guc *guc, u32 rsa_addr);
> > int xe_guc_mmio_send(struct xe_guc *guc, const u32 *request, u32 len);
> > diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
> > index ff8eee3831a..abc7266fc6f 100644
> > --- a/drivers/gpu/drm/xe/xe_guc_ads.c
> > +++ b/drivers/gpu/drm/xe/xe_guc_ads.c
> > @@ -435,7 +435,8 @@ int xe_guc_ads_init(struct xe_guc_ads *ads)
> > XE_BO_FLAG_SYSTEM |
> > XE_BO_FLAG_GGTT |
> > XE_BO_FLAG_GGTT_INVALIDATE |
> > - XE_BO_FLAG_PINNED_NORESTORE);
> > + XE_BO_FLAG_PINNED_NORESTORE |
> > + xe_guc_bo_wa_flags(gt));
> > if (IS_ERR(bo))
> > return PTR_ERR(bo);
> >
> > diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
> > index 5c4733da385..5c393aa29de 100644
> > --- a/drivers/gpu/drm/xe/xe_guc_ct.c
> > +++ b/drivers/gpu/drm/xe/xe_guc_ct.c
> > @@ -376,7 +376,8 @@ int xe_guc_ct_init(struct xe_guc_ct *ct)
> > XE_BO_FLAG_SYSTEM |
> > XE_BO_FLAG_GGTT |
> > XE_BO_FLAG_GGTT_INVALIDATE |
> > - XE_BO_FLAG_PINNED_NORESTORE);
> > + XE_BO_FLAG_PINNED_NORESTORE |
> > + xe_guc_bo_wa_flags(gt));
> > if (IS_ERR(bo))
> > return PTR_ERR(bo);
> >
> > @@ -386,7 +387,8 @@ int xe_guc_ct_init(struct xe_guc_ct *ct)
> > XE_BO_FLAG_SYSTEM |
> > XE_BO_FLAG_GGTT |
> > XE_BO_FLAG_GGTT_INVALIDATE |
> > - XE_BO_FLAG_PINNED_NORESTORE);
> > + XE_BO_FLAG_PINNED_NORESTORE |
> > + xe_guc_bo_wa_flags(gt));
> > if (IS_ERR(bo))
> > return PTR_ERR(bo);
> >
> > diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.c b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
> > index a782be57caa..729ce8ac140 100644
> > --- a/drivers/gpu/drm/xe/xe_guc_engine_activity.c
> > +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
> > @@ -97,7 +97,8 @@ static int allocate_engine_activity_buffers(struct xe_guc *guc,
> >
> > metadata_bo = xe_bo_create_pin_map_novm(gt_to_xe(gt), tile, PAGE_ALIGN(metadata_size),
> > ttm_bo_type_kernel, XE_BO_FLAG_SYSTEM |
> > - XE_BO_FLAG_GGTT | XE_BO_FLAG_GGTT_INVALIDATE,
> > + XE_BO_FLAG_GGTT | XE_BO_FLAG_GGTT_INVALIDATE |
> > + xe_guc_bo_wa_flags(gt),
> > false);
> >
> > if (IS_ERR(metadata_bo))
> > @@ -105,7 +106,8 @@ static int allocate_engine_activity_buffers(struct xe_guc *guc,
> >
> > bo = xe_bo_create_pin_map_novm(gt_to_xe(gt), tile, PAGE_ALIGN(size),
> > ttm_bo_type_kernel, XE_BO_FLAG_VRAM_IF_DGFX(tile) |
> > - XE_BO_FLAG_GGTT | XE_BO_FLAG_GGTT_INVALIDATE, false);
> > + XE_BO_FLAG_GGTT | XE_BO_FLAG_GGTT_INVALIDATE |
> > + xe_guc_bo_wa_flags(gt), false);
> >
> > if (IS_ERR(bo)) {
> > xe_bo_unpin_map_no_vm(metadata_bo);
> > diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c
> > index 538d4df0f7a..7d006268ce9 100644
> > --- a/drivers/gpu/drm/xe/xe_guc_log.c
> > +++ b/drivers/gpu/drm/xe/xe_guc_log.c
> > @@ -17,6 +17,7 @@
> > #include "xe_force_wake.h"
> > #include "xe_gt_printk.h"
> > #include "xe_gt_types.h"
> > +#include "xe_guc.h"
> > #include "xe_map.h"
> > #include "xe_mmio.h"
> > #include "xe_module.h"
> > @@ -624,14 +625,16 @@ void xe_guc_log_print_lfd(struct xe_guc_log *log, struct drm_printer *p)
> > int xe_guc_log_init(struct xe_guc_log *log)
> > {
> > struct xe_device *xe = log_to_xe(log);
> > - struct xe_tile *tile = gt_to_tile(log_to_gt(log));
> > + struct xe_gt *gt = log_to_gt(log);
> > + struct xe_tile *tile = gt_to_tile(gt);
> > struct xe_bo *bo;
> >
> > bo = xe_managed_bo_create_pin_map(xe, tile, GUC_LOG_SIZE,
> > XE_BO_FLAG_SYSTEM |
> > XE_BO_FLAG_GGTT |
> > XE_BO_FLAG_GGTT_INVALIDATE |
> > - XE_BO_FLAG_PINNED_NORESTORE);
> > + XE_BO_FLAG_PINNED_NORESTORE |
> > + xe_guc_bo_wa_flags(gt));
> > if (IS_ERR(bo))
> > return PTR_ERR(bo);
> >
> > diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
> > index 097b075bd89..e0105222a2c 100644
> > --- a/drivers/gpu/drm/xe/xe_guc_pc.c
> > +++ b/drivers/gpu/drm/xe/xe_guc_pc.c
> > @@ -1391,7 +1391,8 @@ int xe_guc_pc_init(struct xe_guc_pc *pc)
> > XE_BO_FLAG_VRAM_IF_DGFX(tile) |
> > XE_BO_FLAG_GGTT |
> > XE_BO_FLAG_GGTT_INVALIDATE |
> > - XE_BO_FLAG_PINNED_NORESTORE);
> > + XE_BO_FLAG_PINNED_NORESTORE |
> > + xe_guc_bo_wa_flags(gt));
> > if (IS_ERR(bo))
> > return PTR_ERR(bo);
> >
> > diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> > index dd69ad07f7a..30958b26a1d 100644
> > --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> > +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> > @@ -14,6 +14,7 @@
> > 16017236439 PLATFORM(PVC)
> > 14019821291 MEDIA_VERSION_RANGE(1300, 2000)
> > 14015076503 MEDIA_VERSION(1300)
> > +22016122933 MEDIA_VERSION(1300)
> > 14018913170 GRAPHICS_VERSION_RANGE(1270, 1274)
> > MEDIA_VERSION(1300)
> > PLATFORM(DG2)
> > --
> > 2.55.0
> >
--
Com os cumprimentos,
Tales A. Mendonça
talesam.org
communitybig.org
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v5 3/3] drm/xe: Implement Wa_22016122933
2026-09-21 20:18 ` Tales A. Mendonça
@ 2026-09-22 2:22 ` Matthew Brost
0 siblings, 0 replies; 14+ messages in thread
From: Matthew Brost @ 2026-09-22 2:22 UTC (permalink / raw)
To: Tales A. Mendonça
Cc: intel-xe, daniele.ceraolospurio, stuart.summers, julia.filipchuk,
thomas.hellstrom, rodrigo.vivi, jani.nikula, navonjohnlukose,
dri-devel
On Mon, Sep 21, 2026 at 05:18:46PM -0300, Tales A. Mendonça wrote:
> On Mon, Sep 21, 2026 at 11:48:00AM -0700, Matthew Brost wrote:
> > One thing the i915 WA does that isn't present here is if non-dGPU the
> > LRC is marked UC - see __lrc_alloc_state in the i915.
> >
> > Is that needed? AFAIK the GuC only reads the LRC though and all LRC
> > write are issued from hardware, so maybe the i915 application of this
> > W/A isn't correct? The fact you are not seeing hangs with this suggests
> > this part of thw W/A isn't needed.
>
> I left it out deliberately, and I think your reading is right.
>
> For the record on the i915 side: that marking only happens in the shmem
> fallback in __lrc_alloc_state(), after i915_gem_object_create_lmem()
> fails. On MTL/ARL there is no lmem, so it is the path always taken and
> the WA is effectively unconditional there.
>
> What the erratum produces is the CPU reading a stale cache line for
> memory the GuC has written. That is exactly the pattern for the CTBs,
> the GuC log, ADS, SLPC and the engine activity buffers - GuC writes,
> CPU reads - and those are what this patch covers. The LRC does not fit
> it: the writes come from hardware context save and the GuC reads it.
>
> One caveat on my own evidence, though: six weeks with no stalls only
> shows that leaving the LRC cached does not produce the TLB ack stall.
> If stale LRC content were a real problem it would presumably show up as
> bad context state rather than a delayed ack, and I have not been looking
> for that. So I would call it supported rather than proven.
>
> If you would rather have parity with i915 anyway, I am happy to add it,
That is up to i915 maintainers, but in general I'd say if not broken in
i915, don't touch it. Feel free to post a post there though but out of
scope for an Xe change.
> but as a separate patch, so it can be dropped on its own if it turns
> out to be unnecessary.
>
> On how the current scope was chosen: the engine activity buffers were
> not in v2. Navon found that gap by A/B testing on his own ARL and
> measuring stale busyness stats, and they went in for v3. So the list is
> what the hardware demonstrated it needs rather than a port of the i915
> list.
>
For this patch:
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> Tales
>
> Em seg., 21 de set. de 2026 às 15:48, Matthew Brost
> <matthew.brost@intel.com> escreveu:
> >
> > On Mon, Sep 21, 2026 at 03:21:21PM -0300, Tales A. Mendonça wrote:
> > > On platforms with a standalone media GT and media version 13.00
> > > (MTL/ARL), memory shared between the CPU and the media GT's GuC must
> > > not be mapped cached on the CPU side: the CPU can otherwise read stale
> > > cache lines for data the GuC has already written.
> > >
> > > i915 implements this as Wa_22016122933 (see
> > > intel_gt_needs_wa_22016122933(), used by intel_guc_allocate_vma() and
> > > intel_gt_coherent_map_type()); xe never inherited it.
> > >
> > > The visible symptom on ARL is TLB invalidation acks stalling for a
> > > near-constant ~2.3s: the GuC writes the G2H ack in time, but the CPU
> > > keeps reading a stale (empty) view of the G2H CTB until the line is
> > > naturally evicted, so the fence timeout at 2.25s fires first. GuC log
> > > decode confirmed all invalidations were handled promptly by the
> > > firmware, and only the media GT was affected. See Link for the full
> > > investigation (three machines affected: 7d51, 7dd1, Arc Pro 130T).
> > >
> > > Making the mapping coherent instead of uncached does not help: with a
> > > GGTT PAT entry repurposed to WB|COH_2WAY the driver comes up and the
> > > media GT GuC runs, but the stalls remain (request-to-ack 2290ms).
> > > Uncached really is required here. Note that 2-way coherency is not
> > > normally reachable from a GGTT PTE (only 2 PAT bits), so that
> > > experiment needed a modified PAT table and may not reflect a supported
> > > configuration.
> > >
> > > Add the OOB workaround scoped like i915 (media version 13.00, media GT
> > > only - MEDIA_VERSION() OOB rules only match the media GT on standalone
> > > media platforms) and apply XE_BO_FLAG_NEEDS_UC to the GuC-shared
> > > allocations the CPU reads from: the CTBs, the GuC log, ADS, the SLPC
> > > shared data and the engine activity buffers. hwconfig and the G2G
> > > buffer are allocated on the primary GT only, where the workaround does
> > > not apply.
> > >
> > > Note that XE_BO_FLAG_NEEDS_UC drives both the CPU mapping (uncached)
> > > and the GGTT cache mode (XE_CACHE_NONE instead of XE_CACHE_WB), which is
> > > stricter than i915: i915 documents the workaround as WC on the CPU side
> > > and UC on the GPU side. A CPU-WC variant with the GGTT side kept at
> > > XE_CACHE_NONE was measured to be equally effective, but expressing it
> > > would require either a new BO flag or decoupling the GGTT cache-mode
> > > selection from XE_BO_FLAG_NEEDS_UC - simply swapping in
> > > XE_BO_FLAG_FORCE_WC silently relaxes the GPU side back to WB and the
> > > stalls return. The stricter mapping is kept here since it is the tested
> > > configuration and no throughput difference between the two was
> > > measurable; the extra plumbing can be added later if parity with i915 is
> > > preferred.
> > >
> > > Scope is limited to the GuC-shared allocations, which is where the
> > > failures were observed. i915 additionally covers media-GT LRC/ring
> > > state; extending xe to match can be done as a follow-up if wanted.
> > >
> > > Validation on two ARL machines (7d51 and 7dd1): before, 20-60 TLB
> > > invalidation ack stalls per day, every day, for weeks, on every kernel
> > > and on two GuC firmware versions (70.53.0 and 70.72.1). After: zero
> > > stalls in six weeks of combined runtime, over 10M TLB invalidations
> > > processed under the same workloads, across kernels 7.1.6, 7.1.8 and
> > > 7.2. The 7dd1 machine, which could not survive a day of media
> > > workloads on xe without a platform freeze, has been running xe full
> > > time since 11 August, including days with heavy video transcoding,
> > > with zero stalls and zero freezes.
> > >
> > > The coherency experiment, the CPU-WC measurements and the engine
> > > activity coverage gap were found by Navon John Lukose while A/B
> > > testing v2 on an ARL 7d51.
> > >
> > > Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8678
> > > Suggested-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > > Signed-off-by: Tales A. Mendonça <talesam@gmail.com>
> > > Tested-by: Navon John Lukose <navonjohnlukose@gmail.com>
> > > ---
> > > drivers/gpu/drm/xe/xe_guc.c | 16 ++++++++++++++++
> > > drivers/gpu/drm/xe/xe_guc.h | 2 ++
> > > drivers/gpu/drm/xe/xe_guc_ads.c | 3 ++-
> > > drivers/gpu/drm/xe/xe_guc_ct.c | 6 ++++--
> > > drivers/gpu/drm/xe/xe_guc_engine_activity.c | 6 ++++--
> > > drivers/gpu/drm/xe/xe_guc_log.c | 7 +++++--
> > > drivers/gpu/drm/xe/xe_guc_pc.c | 3 ++-
> > > drivers/gpu/drm/xe/xe_wa_oob.rules | 1 +
> >
> > One thing the i915 WA does that isn't present here is if non-dGPU the
> > LRC is marked UC - see __lrc_alloc_state in the i915.
> >
> > Is that needed? AFIAK the GuC only reads the LRC though and all LRC
> > write are issued from hardware, so maybe the i915 application of this
> > W/A isn't correct? The fact you are not seeing hangs with this suggests
> > this part of thw W/A isn't needed.
> >
> > Matt
> >
> > > 8 files changed, 36 insertions(+), 8 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> > > index c7f8bbd4cb9..3ab4cb9e496 100644
> > > --- a/drivers/gpu/drm/xe/xe_guc.c
> > > +++ b/drivers/gpu/drm/xe/xe_guc.c
> > > @@ -1469,6 +1469,22 @@ int xe_guc_suspend(struct xe_guc *guc)
> > > return 0;
> > > }
> > >
> > > +/**
> > > + * xe_guc_bo_wa_flags - Extra BO flags for memory shared with the GuC
> > > + * @gt: the &xe_gt whose GuC the buffer will be shared with
> > > + *
> > > + * Wa_22016122933: on the standalone media GT, memory shared between the
> > > + * CPU and the GuC must not be mapped cached on the CPU side, otherwise
> > > + * the CPU can read stale data written by the GuC (e.g. G2H CTB writes)
> > > + * for multiple seconds.
> > > + *
> > > + * Return: additional XE_BO_FLAG_* to use when allocating GuC-shared memory
> > > + */
> > > +u32 xe_guc_bo_wa_flags(struct xe_gt *gt)
> > > +{
> > > + return XE_GT_WA(gt, 22016122933) ? XE_BO_FLAG_NEEDS_UC : 0;
> > > +}
> > > +
> > > void xe_guc_notify(struct xe_guc *guc)
> > > {
> > > struct xe_gt *gt = guc_to_gt(guc);
> > > diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
> > > index 61e3ee19a59..c4eca40d69c 100644
> > > --- a/drivers/gpu/drm/xe/xe_guc.h
> > > +++ b/drivers/gpu/drm/xe/xe_guc.h
> > > @@ -30,6 +30,7 @@
> > > xe_guc_fw_version_at_least((guc), MAKE_GUC_VER_ARGS(ver))
> > >
> > > struct drm_printer;
> > > +struct xe_gt;
> > >
> > > void xe_guc_comm_init_early(struct xe_guc *guc);
> > > int xe_guc_init_noalloc(struct xe_guc *guc);
> > > @@ -45,6 +46,7 @@ void xe_guc_runtime_suspend(struct xe_guc *guc);
> > > void xe_guc_runtime_resume(struct xe_guc *guc);
> > > int xe_guc_suspend(struct xe_guc *guc);
> > > int xe_guc_softreset(struct xe_guc *guc);
> > > +u32 xe_guc_bo_wa_flags(struct xe_gt *gt);
> > > void xe_guc_notify(struct xe_guc *guc);
> > > int xe_guc_auth_huc(struct xe_guc *guc, u32 rsa_addr);
> > > int xe_guc_mmio_send(struct xe_guc *guc, const u32 *request, u32 len);
> > > diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
> > > index ff8eee3831a..abc7266fc6f 100644
> > > --- a/drivers/gpu/drm/xe/xe_guc_ads.c
> > > +++ b/drivers/gpu/drm/xe/xe_guc_ads.c
> > > @@ -435,7 +435,8 @@ int xe_guc_ads_init(struct xe_guc_ads *ads)
> > > XE_BO_FLAG_SYSTEM |
> > > XE_BO_FLAG_GGTT |
> > > XE_BO_FLAG_GGTT_INVALIDATE |
> > > - XE_BO_FLAG_PINNED_NORESTORE);
> > > + XE_BO_FLAG_PINNED_NORESTORE |
> > > + xe_guc_bo_wa_flags(gt));
> > > if (IS_ERR(bo))
> > > return PTR_ERR(bo);
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
> > > index 5c4733da385..5c393aa29de 100644
> > > --- a/drivers/gpu/drm/xe/xe_guc_ct.c
> > > +++ b/drivers/gpu/drm/xe/xe_guc_ct.c
> > > @@ -376,7 +376,8 @@ int xe_guc_ct_init(struct xe_guc_ct *ct)
> > > XE_BO_FLAG_SYSTEM |
> > > XE_BO_FLAG_GGTT |
> > > XE_BO_FLAG_GGTT_INVALIDATE |
> > > - XE_BO_FLAG_PINNED_NORESTORE);
> > > + XE_BO_FLAG_PINNED_NORESTORE |
> > > + xe_guc_bo_wa_flags(gt));
> > > if (IS_ERR(bo))
> > > return PTR_ERR(bo);
> > >
> > > @@ -386,7 +387,8 @@ int xe_guc_ct_init(struct xe_guc_ct *ct)
> > > XE_BO_FLAG_SYSTEM |
> > > XE_BO_FLAG_GGTT |
> > > XE_BO_FLAG_GGTT_INVALIDATE |
> > > - XE_BO_FLAG_PINNED_NORESTORE);
> > > + XE_BO_FLAG_PINNED_NORESTORE |
> > > + xe_guc_bo_wa_flags(gt));
> > > if (IS_ERR(bo))
> > > return PTR_ERR(bo);
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_guc_engine_activity.c b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
> > > index a782be57caa..729ce8ac140 100644
> > > --- a/drivers/gpu/drm/xe/xe_guc_engine_activity.c
> > > +++ b/drivers/gpu/drm/xe/xe_guc_engine_activity.c
> > > @@ -97,7 +97,8 @@ static int allocate_engine_activity_buffers(struct xe_guc *guc,
> > >
> > > metadata_bo = xe_bo_create_pin_map_novm(gt_to_xe(gt), tile, PAGE_ALIGN(metadata_size),
> > > ttm_bo_type_kernel, XE_BO_FLAG_SYSTEM |
> > > - XE_BO_FLAG_GGTT | XE_BO_FLAG_GGTT_INVALIDATE,
> > > + XE_BO_FLAG_GGTT | XE_BO_FLAG_GGTT_INVALIDATE |
> > > + xe_guc_bo_wa_flags(gt),
> > > false);
> > >
> > > if (IS_ERR(metadata_bo))
> > > @@ -105,7 +106,8 @@ static int allocate_engine_activity_buffers(struct xe_guc *guc,
> > >
> > > bo = xe_bo_create_pin_map_novm(gt_to_xe(gt), tile, PAGE_ALIGN(size),
> > > ttm_bo_type_kernel, XE_BO_FLAG_VRAM_IF_DGFX(tile) |
> > > - XE_BO_FLAG_GGTT | XE_BO_FLAG_GGTT_INVALIDATE, false);
> > > + XE_BO_FLAG_GGTT | XE_BO_FLAG_GGTT_INVALIDATE |
> > > + xe_guc_bo_wa_flags(gt), false);
> > >
> > > if (IS_ERR(bo)) {
> > > xe_bo_unpin_map_no_vm(metadata_bo);
> > > diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c
> > > index 538d4df0f7a..7d006268ce9 100644
> > > --- a/drivers/gpu/drm/xe/xe_guc_log.c
> > > +++ b/drivers/gpu/drm/xe/xe_guc_log.c
> > > @@ -17,6 +17,7 @@
> > > #include "xe_force_wake.h"
> > > #include "xe_gt_printk.h"
> > > #include "xe_gt_types.h"
> > > +#include "xe_guc.h"
> > > #include "xe_map.h"
> > > #include "xe_mmio.h"
> > > #include "xe_module.h"
> > > @@ -624,14 +625,16 @@ void xe_guc_log_print_lfd(struct xe_guc_log *log, struct drm_printer *p)
> > > int xe_guc_log_init(struct xe_guc_log *log)
> > > {
> > > struct xe_device *xe = log_to_xe(log);
> > > - struct xe_tile *tile = gt_to_tile(log_to_gt(log));
> > > + struct xe_gt *gt = log_to_gt(log);
> > > + struct xe_tile *tile = gt_to_tile(gt);
> > > struct xe_bo *bo;
> > >
> > > bo = xe_managed_bo_create_pin_map(xe, tile, GUC_LOG_SIZE,
> > > XE_BO_FLAG_SYSTEM |
> > > XE_BO_FLAG_GGTT |
> > > XE_BO_FLAG_GGTT_INVALIDATE |
> > > - XE_BO_FLAG_PINNED_NORESTORE);
> > > + XE_BO_FLAG_PINNED_NORESTORE |
> > > + xe_guc_bo_wa_flags(gt));
> > > if (IS_ERR(bo))
> > > return PTR_ERR(bo);
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
> > > index 097b075bd89..e0105222a2c 100644
> > > --- a/drivers/gpu/drm/xe/xe_guc_pc.c
> > > +++ b/drivers/gpu/drm/xe/xe_guc_pc.c
> > > @@ -1391,7 +1391,8 @@ int xe_guc_pc_init(struct xe_guc_pc *pc)
> > > XE_BO_FLAG_VRAM_IF_DGFX(tile) |
> > > XE_BO_FLAG_GGTT |
> > > XE_BO_FLAG_GGTT_INVALIDATE |
> > > - XE_BO_FLAG_PINNED_NORESTORE);
> > > + XE_BO_FLAG_PINNED_NORESTORE |
> > > + xe_guc_bo_wa_flags(gt));
> > > if (IS_ERR(bo))
> > > return PTR_ERR(bo);
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> > > index dd69ad07f7a..30958b26a1d 100644
> > > --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> > > +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> > > @@ -14,6 +14,7 @@
> > > 16017236439 PLATFORM(PVC)
> > > 14019821291 MEDIA_VERSION_RANGE(1300, 2000)
> > > 14015076503 MEDIA_VERSION(1300)
> > > +22016122933 MEDIA_VERSION(1300)
> > > 14018913170 GRAPHICS_VERSION_RANGE(1270, 1274)
> > > MEDIA_VERSION(1300)
> > > PLATFORM(DG2)
> > > --
> > > 2.55.0
> > >
>
>
>
> --
> Com os cumprimentos,
>
> Tales A. Mendonça
> talesam.org
> communitybig.org
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✗ CI.checkpatch: warning for drm/xe: fix GuC TLB invalidation ack stalls on ARL (Wa_22016122933) (rev4)
2026-09-21 18:21 [PATCH v5 0/3] drm/xe: fix GuC TLB invalidation ack stalls on ARL (Wa_22016122933) Tales A. Mendonça
` (2 preceding siblings ...)
2026-09-21 18:21 ` [PATCH v5 3/3] drm/xe: Implement Wa_22016122933 Tales A. Mendonça
@ 2026-09-21 18:27 ` Patchwork
2026-09-21 18:29 ` ✓ CI.KUnit: success " Patchwork
` (2 subsequent siblings)
6 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2026-09-21 18:27 UTC (permalink / raw)
To: Tales A. Mendonça; +Cc: intel-xe
== Series Details ==
Series: drm/xe: fix GuC TLB invalidation ack stalls on ARL (Wa_22016122933) (rev4)
URL : https://patchwork.freedesktop.org/series/172110/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
6bef5ce5c74dc76b4ee69ab2832c0d1fd63c91c7
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 40bacff47ae199d83f4e7a07f7a5ab17fa19e4d4
Author: Tales A. Mendonça <talesam@gmail.com>
Date: Mon Sep 21 15:21:21 2026 -0300
drm/xe: Implement Wa_22016122933
On platforms with a standalone media GT and media version 13.00
(MTL/ARL), memory shared between the CPU and the media GT's GuC must
not be mapped cached on the CPU side: the CPU can otherwise read stale
cache lines for data the GuC has already written.
i915 implements this as Wa_22016122933 (see
intel_gt_needs_wa_22016122933(), used by intel_guc_allocate_vma() and
intel_gt_coherent_map_type()); xe never inherited it.
The visible symptom on ARL is TLB invalidation acks stalling for a
near-constant ~2.3s: the GuC writes the G2H ack in time, but the CPU
keeps reading a stale (empty) view of the G2H CTB until the line is
naturally evicted, so the fence timeout at 2.25s fires first. GuC log
decode confirmed all invalidations were handled promptly by the
firmware, and only the media GT was affected. See Link for the full
investigation (three machines affected: 7d51, 7dd1, Arc Pro 130T).
Making the mapping coherent instead of uncached does not help: with a
GGTT PAT entry repurposed to WB|COH_2WAY the driver comes up and the
media GT GuC runs, but the stalls remain (request-to-ack 2290ms).
Uncached really is required here. Note that 2-way coherency is not
normally reachable from a GGTT PTE (only 2 PAT bits), so that
experiment needed a modified PAT table and may not reflect a supported
configuration.
Add the OOB workaround scoped like i915 (media version 13.00, media GT
only - MEDIA_VERSION() OOB rules only match the media GT on standalone
media platforms) and apply XE_BO_FLAG_NEEDS_UC to the GuC-shared
allocations the CPU reads from: the CTBs, the GuC log, ADS, the SLPC
shared data and the engine activity buffers. hwconfig and the G2G
buffer are allocated on the primary GT only, where the workaround does
not apply.
Note that XE_BO_FLAG_NEEDS_UC drives both the CPU mapping (uncached)
and the GGTT cache mode (XE_CACHE_NONE instead of XE_CACHE_WB), which is
stricter than i915: i915 documents the workaround as WC on the CPU side
and UC on the GPU side. A CPU-WC variant with the GGTT side kept at
XE_CACHE_NONE was measured to be equally effective, but expressing it
would require either a new BO flag or decoupling the GGTT cache-mode
selection from XE_BO_FLAG_NEEDS_UC - simply swapping in
XE_BO_FLAG_FORCE_WC silently relaxes the GPU side back to WB and the
stalls return. The stricter mapping is kept here since it is the tested
configuration and no throughput difference between the two was
measurable; the extra plumbing can be added later if parity with i915 is
preferred.
Scope is limited to the GuC-shared allocations, which is where the
failures were observed. i915 additionally covers media-GT LRC/ring
state; extending xe to match can be done as a follow-up if wanted.
Validation on two ARL machines (7d51 and 7dd1): before, 20-60 TLB
invalidation ack stalls per day, every day, for weeks, on every kernel
and on two GuC firmware versions (70.53.0 and 70.72.1). After: zero
stalls in six weeks of combined runtime, over 10M TLB invalidations
processed under the same workloads, across kernels 7.1.6, 7.1.8 and
7.2. The 7dd1 machine, which could not survive a day of media
workloads on xe without a platform freeze, has been running xe full
time since 11 August, including days with heavy video transcoding,
with zero stalls and zero freezes.
The coherency experiment, the CPU-WC measurements and the engine
activity coverage gap were found by Navon John Lukose while A/B
testing v2 on an ARL 7d51.
Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8678
Suggested-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Tales A. Mendonça <talesam@gmail.com>
Tested-by: Navon John Lukose <navonjohnlukose@gmail.com>
+ /mt/dim checkpatch 42735b6937d60963dd302128231fb74a18164a60 drm-intel
2aefd4be8004 drm/xe: Capture devcoredump on TLB invalidation timeout
-:169: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_q' - possible side-effects?
#169: FILE: drivers/gpu/drm/xe/xe_devcoredump.h:34:
+#define xe_devcoredump(_q, _job, _fmt, ...) \
+ __xe_devcoredump((_q)->gt, _q, _job, _fmt, ##__VA_ARGS__)
total: 0 errors, 0 warnings, 1 checks, 187 lines checked
30ace16f4cca drm/xe: Log when a timed out TLB invalidation ack finally arrives
40bacff47ae1 drm/xe: Implement Wa_22016122933
^ permalink raw reply [flat|nested] 14+ messages in thread* ✓ CI.KUnit: success for drm/xe: fix GuC TLB invalidation ack stalls on ARL (Wa_22016122933) (rev4)
2026-09-21 18:21 [PATCH v5 0/3] drm/xe: fix GuC TLB invalidation ack stalls on ARL (Wa_22016122933) Tales A. Mendonça
` (3 preceding siblings ...)
2026-09-21 18:27 ` ✗ CI.checkpatch: warning for drm/xe: fix GuC TLB invalidation ack stalls on ARL (Wa_22016122933) (rev4) Patchwork
@ 2026-09-21 18:29 ` Patchwork
2026-09-21 19:28 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-09-22 4:38 ` ✗ Xe.CI.FULL: " Patchwork
6 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2026-09-21 18:29 UTC (permalink / raw)
To: Tales A. Mendonça; +Cc: intel-xe
== Series Details ==
Series: drm/xe: fix GuC TLB invalidation ack stalls on ARL (Wa_22016122933) (rev4)
URL : https://patchwork.freedesktop.org/series/172110/
State : success
== Summary ==
+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[18:27:44] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:27:49] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:28:09] Starting KUnit Kernel (1/1)...
[18:28:09] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:28:09] ============= refcount_interrupt (4 subtests) ==============
[18:28:09] [PASSED] test_single_irq_change
[18:28:09] [PASSED] test_nested_irq_change
[18:28:09] [PASSED] test_multiple_irq_change
[18:28:09] [PASSED] test_irq_save
[18:28:09] =============== [PASSED] refcount_interrupt ================
[18:28:09] ================= gpu_buddy (14 subtests) ==================
[18:28:09] [PASSED] gpu_test_buddy_alloc_limit
[18:28:09] [PASSED] gpu_test_buddy_alloc_optimistic
[18:28:09] [PASSED] gpu_test_buddy_alloc_pessimistic
[18:28:09] [PASSED] gpu_test_buddy_alloc_pathological
[18:28:09] [PASSED] gpu_test_buddy_alloc_contiguous
[18:28:09] [PASSED] gpu_test_buddy_alloc_clear
[18:28:09] [PASSED] gpu_test_buddy_alloc_range
[18:28:09] [PASSED] gpu_test_buddy_alloc_range_bias
[18:28:10] [PASSED] gpu_test_buddy_fragmentation_performance
[18:28:11] [PASSED] gpu_test_buddy_dirty_tracker_performance
[18:28:11] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[18:28:11] [PASSED] gpu_test_buddy_offset_aligned_allocation
[18:28:11] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[18:28:11] [PASSED] gpu_test_buddy_addr_to_block
[18:28:11] ==================== [PASSED] gpu_buddy ====================
[18:28:11] ============================================================
[18:28:11] Testing complete. Ran 18 tests: passed: 18
[18:28:11] Elapsed time: 26.551s total, 4.414s configuring, 20.219s building, 1.843s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[18:28:11] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:28:13] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:28:46] Starting KUnit Kernel (1/1)...
[18:28:46] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:28:46] ============= refcount_interrupt (4 subtests) ==============
[18:28:46] [PASSED] test_single_irq_change
[18:28:46] [PASSED] test_nested_irq_change
[18:28:46] [PASSED] test_multiple_irq_change
[18:28:46] [PASSED] test_irq_save
[18:28:46] =============== [PASSED] refcount_interrupt ================
[18:28:46] ================== guc_buf (11 subtests) ===================
[18:28:46] [PASSED] test_smallest
[18:28:46] [PASSED] test_largest
[18:28:46] [PASSED] test_granular
[18:28:46] [PASSED] test_unique
[18:28:46] [PASSED] test_overlap
[18:28:46] [PASSED] test_reusable
[18:28:46] [PASSED] test_too_big
[18:28:46] [PASSED] test_flush
[18:28:46] [PASSED] test_lookup
[18:28:46] [PASSED] test_data
[18:28:46] [PASSED] test_class
[18:28:46] ===================== [PASSED] guc_buf =====================
[18:28:46] =================== guc_dbm (7 subtests) ===================
[18:28:46] [PASSED] test_empty
[18:28:46] [PASSED] test_default
[18:28:46] ======================== test_size ========================
[18:28:46] [PASSED] 4
[18:28:46] [PASSED] 8
[18:28:46] [PASSED] 32
[18:28:46] [PASSED] 256
[18:28:46] ==================== [PASSED] test_size ====================
[18:28:46] ======================= test_reuse ========================
[18:28:46] [PASSED] 4
[18:28:46] [PASSED] 8
[18:28:46] [PASSED] 32
[18:28:46] [PASSED] 256
[18:28:46] =================== [PASSED] test_reuse ====================
[18:28:46] =================== test_range_overlap ====================
[18:28:46] [PASSED] 4
[18:28:46] [PASSED] 8
[18:28:46] [PASSED] 32
[18:28:46] [PASSED] 256
[18:28:46] =============== [PASSED] test_range_overlap ================
[18:28:46] =================== test_range_compact ====================
[18:28:46] [PASSED] 4
[18:28:46] [PASSED] 8
[18:28:46] [PASSED] 32
[18:28:46] [PASSED] 256
[18:28:46] =============== [PASSED] test_range_compact ================
[18:28:46] ==================== test_range_spare =====================
[18:28:46] [PASSED] 4
[18:28:46] [PASSED] 8
[18:28:46] [PASSED] 32
[18:28:46] [PASSED] 256
[18:28:46] ================ [PASSED] test_range_spare =================
[18:28:46] ===================== [PASSED] guc_dbm =====================
[18:28:46] =================== guc_idm (6 subtests) ===================
[18:28:46] [PASSED] bad_init
[18:28:46] [PASSED] no_init
[18:28:46] [PASSED] init_fini
[18:28:46] [PASSED] check_used
[18:28:46] [PASSED] check_quota
[18:28:46] [PASSED] check_all
[18:28:46] ===================== [PASSED] guc_idm =====================
[18:28:46] ============== guc_klv_helpers (13 subtests) ===============
[18:28:46] [PASSED] test_count
[18:28:46] [PASSED] test_encode_u32
[18:28:46] [PASSED] test_encode_u64
[18:28:46] [PASSED] test_encode_string
[18:28:46] [PASSED] test_encode_object_raw
[18:28:46] [PASSED] test_encode_object_klv
[18:28:46] [PASSED] test_encode_object_nested
[18:28:46] [PASSED] test_encode_object_basic
[18:28:46] ===================== test_decode_u16 =====================
[18:28:46] [PASSED] empty
[18:28:46] [PASSED] valid
[18:28:46] [PASSED] max
[18:28:46] [PASSED] big
[18:28:46] [PASSED] long
[18:28:46] ================= [PASSED] test_decode_u16 =================
[18:28:46] ===================== test_decode_u32 =====================
[18:28:46] [PASSED] empty
[18:28:46] [PASSED] valid
[18:28:46] [PASSED] max
[18:28:46] [PASSED] long
[18:28:46] ================= [PASSED] test_decode_u32 =================
[18:28:46] ===================== test_decode_u64 =====================
[18:28:46] [PASSED] empty
[18:28:46] [PASSED] short
[18:28:46] [PASSED] valid
[18:28:46] [PASSED] max
[18:28:46] [PASSED] long
[18:28:46] ================= [PASSED] test_decode_u64 =================
[18:28:46] ===================== test_decode_str =====================
[18:28:46] [PASSED] empty
[18:28:46] [PASSED] one
[18:28:46] [PASSED] one_trash
[18:28:46] [PASSED] two
[18:28:46] [PASSED] two_trash
[18:28:46] [PASSED] three
[18:28:46] [PASSED] dword
[18:28:46] [PASSED] four
[18:28:46] [PASSED] five
[18:28:46] [PASSED] six
[18:28:46] [PASSED] seven
[18:28:46] [PASSED] qword
[18:28:46] ================= [PASSED] test_decode_str =================
[18:28:46] [PASSED] test_print
[18:28:46] ================= [PASSED] guc_klv_helpers =================
[18:28:46] =================== xe_log (4 subtests) ====================
[18:28:46] [PASSED] demo_cper
[18:28:46] [PASSED] demo_dmesg
[18:28:46] ======================= test_dmesg ========================
[18:28:46] [PASSED] test_fatal
[18:28:46] [PASSED] test_fatal_tile
[18:28:46] [PASSED] test_fatal_gt
[18:28:46] [PASSED] test_fatal_comp
[18:28:46] [PASSED] test_fatal_comp_tile
[18:28:46] [PASSED] test_fatal_comp_gt
[18:28:46] [PASSED] test_fatal_all
[18:28:46] [PASSED] test_recoverable
[18:28:46] [PASSED] test_recoverable_tile
[18:28:46] [PASSED] test_recoverable_gt
[18:28:46] [PASSED] test_recoverable_comp
[18:28:46] [PASSED] test_recoverable_comp_tile
[18:28:46] [PASSED] test_recoverable_comp_gt
[18:28:46] [PASSED] test_recoverable_all
[18:28:46] [PASSED] test_info
[18:28:46] [PASSED] test_info_tile
[18:28:46] [PASSED] test_info_gt
[18:28:46] [PASSED] test_info_err
[18:28:46] [PASSED] test_info_comp
[18:28:46] [PASSED] test_info_comp_tile
[18:28:46] [PASSED] test_info_comp_gt
[18:28:46] [PASSED] test_info_all
[18:28:46] [PASSED] test_hw_fatal
[18:28:46] [PASSED] test_hw_recoverable
[18:28:46] [PASSED] test_hw_corrected
[18:28:46] [PASSED] test_hw_informational
[18:28:46] =================== [PASSED] test_dmesg ====================
[18:28:46] ====================== test_invalid =======================
[18:28:46] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[18:28:46] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[18:28:46] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[18:28:46] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[18:28:46] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[18:28:46] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[18:28:46] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[18:28:46] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[18:28:46] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[18:28:46] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[18:28:46] ================== [SKIPPED] test_invalid ==================
[18:28:46] ===================== [PASSED] xe_log ======================
[18:28:46] ================== no_relay (3 subtests) ===================
[18:28:46] [PASSED] xe_drops_guc2pf_if_not_ready
[18:28:46] [PASSED] xe_drops_guc2vf_if_not_ready
[18:28:46] [PASSED] xe_rejects_send_if_not_ready
[18:28:46] ==================== [PASSED] no_relay =====================
[18:28:46] ================== pf_relay (14 subtests) ==================
[18:28:46] [PASSED] pf_rejects_guc2pf_too_short
[18:28:46] [PASSED] pf_rejects_guc2pf_too_long
[18:28:46] [PASSED] pf_rejects_guc2pf_no_payload
[18:28:46] [PASSED] pf_fails_no_payload
[18:28:46] [PASSED] pf_fails_bad_origin
[18:28:46] [PASSED] pf_fails_bad_type
[18:28:46] [PASSED] pf_txn_reports_error
[18:28:46] [PASSED] pf_txn_sends_pf2guc
[18:28:46] [PASSED] pf_sends_pf2guc
[18:28:46] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[18:28:46] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[18:28:46] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[18:28:46] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[18:28:47] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[18:28:47] ==================== [PASSED] pf_relay =====================
[18:28:47] ================== vf_relay (3 subtests) ===================
[18:28:47] [PASSED] vf_rejects_guc2vf_too_short
[18:28:47] [PASSED] vf_rejects_guc2vf_too_long
[18:28:47] [PASSED] vf_rejects_guc2vf_no_payload
[18:28:47] ==================== [PASSED] vf_relay =====================
[18:28:47] ================ pf_gt_config (9 subtests) =================
[18:28:47] [PASSED] fair_contexts_1vf
[18:28:47] [PASSED] fair_doorbells_1vf
[18:28:47] [PASSED] fair_ggtt_1vf
[18:28:47] ====================== fair_vram_1vf ======================
[18:28:47] [PASSED] 3.50 GiB
[18:28:47] [PASSED] 11.5 GiB
[18:28:47] [PASSED] 15.5 GiB
[18:28:47] [PASSED] 31.5 GiB
[18:28:47] [PASSED] 63.5 GiB
[18:28:47] [PASSED] 1.91 GiB
[18:28:47] ================== [PASSED] fair_vram_1vf ==================
[18:28:47] ================ fair_vram_1vf_admin_only =================
[18:28:47] [PASSED] 3.50 GiB
[18:28:47] [PASSED] 11.5 GiB
[18:28:47] [PASSED] 15.5 GiB
[18:28:47] [PASSED] 31.5 GiB
[18:28:47] [PASSED] 63.5 GiB
[18:28:47] [PASSED] 1.91 GiB
[18:28:47] ============ [PASSED] fair_vram_1vf_admin_only =============
[18:28:47] ====================== fair_contexts ======================
[18:28:47] [PASSED] 1 VF
[18:28:47] [PASSED] 2 VFs
[18:28:47] [PASSED] 3 VFs
[18:28:47] [PASSED] 4 VFs
[18:28:47] [PASSED] 5 VFs
[18:28:47] [PASSED] 6 VFs
[18:28:47] [PASSED] 7 VFs
[18:28:47] [PASSED] 8 VFs
[18:28:47] [PASSED] 9 VFs
[18:28:47] [PASSED] 10 VFs
[18:28:47] [PASSED] 11 VFs
[18:28:47] [PASSED] 12 VFs
[18:28:47] [PASSED] 13 VFs
[18:28:47] [PASSED] 14 VFs
[18:28:47] [PASSED] 15 VFs
[18:28:47] [PASSED] 16 VFs
[18:28:47] [PASSED] 17 VFs
[18:28:47] [PASSED] 18 VFs
[18:28:47] [PASSED] 19 VFs
[18:28:47] [PASSED] 20 VFs
[18:28:47] [PASSED] 21 VFs
[18:28:47] [PASSED] 22 VFs
[18:28:47] [PASSED] 23 VFs
[18:28:47] [PASSED] 24 VFs
[18:28:47] [PASSED] 25 VFs
[18:28:47] [PASSED] 26 VFs
[18:28:47] [PASSED] 27 VFs
[18:28:47] [PASSED] 28 VFs
[18:28:47] [PASSED] 29 VFs
[18:28:47] [PASSED] 30 VFs
[18:28:47] [PASSED] 31 VFs
[18:28:47] [PASSED] 32 VFs
[18:28:47] [PASSED] 33 VFs
[18:28:47] [PASSED] 34 VFs
[18:28:47] [PASSED] 35 VFs
[18:28:47] [PASSED] 36 VFs
[18:28:47] [PASSED] 37 VFs
[18:28:47] [PASSED] 38 VFs
[18:28:47] [PASSED] 39 VFs
[18:28:47] [PASSED] 40 VFs
[18:28:47] [PASSED] 41 VFs
[18:28:47] [PASSED] 42 VFs
[18:28:47] [PASSED] 43 VFs
[18:28:47] [PASSED] 44 VFs
[18:28:47] [PASSED] 45 VFs
[18:28:47] [PASSED] 46 VFs
[18:28:47] [PASSED] 47 VFs
[18:28:47] [PASSED] 48 VFs
[18:28:47] [PASSED] 49 VFs
[18:28:47] [PASSED] 50 VFs
[18:28:47] [PASSED] 51 VFs
[18:28:47] [PASSED] 52 VFs
[18:28:47] [PASSED] 53 VFs
[18:28:47] [PASSED] 54 VFs
[18:28:47] [PASSED] 55 VFs
[18:28:47] [PASSED] 56 VFs
[18:28:47] [PASSED] 57 VFs
[18:28:47] [PASSED] 58 VFs
[18:28:47] [PASSED] 59 VFs
[18:28:47] [PASSED] 60 VFs
[18:28:47] [PASSED] 61 VFs
[18:28:47] [PASSED] 62 VFs
[18:28:47] [PASSED] 63 VFs
[18:28:47] ================== [PASSED] fair_contexts ==================
[18:28:47] ===================== fair_doorbells ======================
[18:28:47] [PASSED] 1 VF
[18:28:47] [PASSED] 2 VFs
[18:28:47] [PASSED] 3 VFs
[18:28:47] [PASSED] 4 VFs
[18:28:47] [PASSED] 5 VFs
[18:28:47] [PASSED] 6 VFs
[18:28:47] [PASSED] 7 VFs
[18:28:47] [PASSED] 8 VFs
[18:28:47] [PASSED] 9 VFs
[18:28:47] [PASSED] 10 VFs
[18:28:47] [PASSED] 11 VFs
[18:28:47] [PASSED] 12 VFs
[18:28:47] [PASSED] 13 VFs
[18:28:47] [PASSED] 14 VFs
[18:28:47] [PASSED] 15 VFs
[18:28:47] [PASSED] 16 VFs
[18:28:47] [PASSED] 17 VFs
[18:28:47] [PASSED] 18 VFs
[18:28:47] [PASSED] 19 VFs
[18:28:47] [PASSED] 20 VFs
[18:28:47] [PASSED] 21 VFs
[18:28:47] [PASSED] 22 VFs
[18:28:47] [PASSED] 23 VFs
[18:28:47] [PASSED] 24 VFs
[18:28:47] [PASSED] 25 VFs
[18:28:47] [PASSED] 26 VFs
[18:28:47] [PASSED] 27 VFs
[18:28:47] [PASSED] 28 VFs
[18:28:47] [PASSED] 29 VFs
[18:28:47] [PASSED] 30 VFs
[18:28:47] [PASSED] 31 VFs
[18:28:47] [PASSED] 32 VFs
[18:28:47] [PASSED] 33 VFs
[18:28:47] [PASSED] 34 VFs
[18:28:47] [PASSED] 35 VFs
[18:28:47] [PASSED] 36 VFs
[18:28:47] [PASSED] 37 VFs
[18:28:47] [PASSED] 38 VFs
[18:28:47] [PASSED] 39 VFs
[18:28:47] [PASSED] 40 VFs
[18:28:47] [PASSED] 41 VFs
[18:28:47] [PASSED] 42 VFs
[18:28:47] [PASSED] 43 VFs
[18:28:47] [PASSED] 44 VFs
[18:28:47] [PASSED] 45 VFs
[18:28:47] [PASSED] 46 VFs
[18:28:47] [PASSED] 47 VFs
[18:28:47] [PASSED] 48 VFs
[18:28:47] [PASSED] 49 VFs
[18:28:47] [PASSED] 50 VFs
[18:28:47] [PASSED] 51 VFs
[18:28:47] [PASSED] 52 VFs
[18:28:47] [PASSED] 53 VFs
[18:28:47] [PASSED] 54 VFs
[18:28:47] [PASSED] 55 VFs
[18:28:47] [PASSED] 56 VFs
[18:28:47] [PASSED] 57 VFs
[18:28:47] [PASSED] 58 VFs
[18:28:47] [PASSED] 59 VFs
[18:28:47] [PASSED] 60 VFs
[18:28:47] [PASSED] 61 VFs
[18:28:47] [PASSED] 62 VFs
[18:28:47] [PASSED] 63 VFs
[18:28:47] ================= [PASSED] fair_doorbells ==================
[18:28:47] ======================== fair_ggtt ========================
[18:28:47] [PASSED] 1 VF
[18:28:47] [PASSED] 2 VFs
[18:28:47] [PASSED] 3 VFs
[18:28:47] [PASSED] 4 VFs
[18:28:47] [PASSED] 5 VFs
[18:28:47] [PASSED] 6 VFs
[18:28:47] [PASSED] 7 VFs
[18:28:47] [PASSED] 8 VFs
[18:28:47] [PASSED] 9 VFs
[18:28:47] [PASSED] 10 VFs
[18:28:47] [PASSED] 11 VFs
[18:28:47] [PASSED] 12 VFs
[18:28:47] [PASSED] 13 VFs
[18:28:47] [PASSED] 14 VFs
[18:28:47] [PASSED] 15 VFs
[18:28:47] [PASSED] 16 VFs
[18:28:47] [PASSED] 17 VFs
[18:28:47] [PASSED] 18 VFs
[18:28:47] [PASSED] 19 VFs
[18:28:47] [PASSED] 20 VFs
[18:28:47] [PASSED] 21 VFs
[18:28:47] [PASSED] 22 VFs
[18:28:47] [PASSED] 23 VFs
[18:28:47] [PASSED] 24 VFs
[18:28:47] [PASSED] 25 VFs
[18:28:47] [PASSED] 26 VFs
[18:28:47] [PASSED] 27 VFs
[18:28:47] [PASSED] 28 VFs
[18:28:47] [PASSED] 29 VFs
[18:28:47] [PASSED] 30 VFs
[18:28:47] [PASSED] 31 VFs
[18:28:47] [PASSED] 32 VFs
[18:28:47] [PASSED] 33 VFs
[18:28:47] [PASSED] 34 VFs
[18:28:47] [PASSED] 35 VFs
[18:28:47] [PASSED] 36 VFs
[18:28:47] [PASSED] 37 VFs
[18:28:47] [PASSED] 38 VFs
[18:28:47] [PASSED] 39 VFs
[18:28:47] [PASSED] 40 VFs
[18:28:47] [PASSED] 41 VFs
[18:28:47] [PASSED] 42 VFs
[18:28:47] [PASSED] 43 VFs
[18:28:47] [PASSED] 44 VFs
[18:28:47] [PASSED] 45 VFs
[18:28:47] [PASSED] 46 VFs
[18:28:47] [PASSED] 47 VFs
[18:28:47] [PASSED] 48 VFs
[18:28:47] [PASSED] 49 VFs
[18:28:47] [PASSED] 50 VFs
[18:28:47] [PASSED] 51 VFs
[18:28:47] [PASSED] 52 VFs
[18:28:47] [PASSED] 53 VFs
[18:28:47] [PASSED] 54 VFs
[18:28:47] [PASSED] 55 VFs
[18:28:47] [PASSED] 56 VFs
[18:28:47] [PASSED] 57 VFs
[18:28:47] [PASSED] 58 VFs
[18:28:47] [PASSED] 59 VFs
[18:28:47] [PASSED] 60 VFs
[18:28:47] [PASSED] 61 VFs
[18:28:47] [PASSED] 62 VFs
[18:28:47] [PASSED] 63 VFs
[18:28:47] ==================== [PASSED] fair_ggtt ====================
[18:28:47] ======================== fair_vram ========================
[18:28:47] [PASSED] 1 VF
[18:28:47] [PASSED] 2 VFs
[18:28:47] [PASSED] 3 VFs
[18:28:47] [PASSED] 4 VFs
[18:28:47] [PASSED] 5 VFs
[18:28:47] [PASSED] 6 VFs
[18:28:47] [PASSED] 7 VFs
[18:28:47] [PASSED] 8 VFs
[18:28:47] [PASSED] 9 VFs
[18:28:47] [PASSED] 10 VFs
[18:28:47] [PASSED] 11 VFs
[18:28:47] [PASSED] 12 VFs
[18:28:47] [PASSED] 13 VFs
[18:28:47] [PASSED] 14 VFs
[18:28:47] [PASSED] 15 VFs
[18:28:47] [PASSED] 16 VFs
[18:28:47] [PASSED] 17 VFs
[18:28:47] [PASSED] 18 VFs
[18:28:47] [PASSED] 19 VFs
[18:28:47] [PASSED] 20 VFs
[18:28:47] [PASSED] 21 VFs
[18:28:47] [PASSED] 22 VFs
[18:28:47] [PASSED] 23 VFs
[18:28:47] [PASSED] 24 VFs
[18:28:47] [PASSED] 25 VFs
[18:28:47] [PASSED] 26 VFs
[18:28:47] [PASSED] 27 VFs
[18:28:47] [PASSED] 28 VFs
[18:28:47] [PASSED] 29 VFs
[18:28:47] [PASSED] 30 VFs
[18:28:47] [PASSED] 31 VFs
[18:28:47] [PASSED] 32 VFs
[18:28:47] [PASSED] 33 VFs
[18:28:47] [PASSED] 34 VFs
[18:28:47] [PASSED] 35 VFs
[18:28:47] [PASSED] 36 VFs
[18:28:47] [PASSED] 37 VFs
[18:28:47] [PASSED] 38 VFs
[18:28:47] [PASSED] 39 VFs
[18:28:47] [PASSED] 40 VFs
[18:28:47] [PASSED] 41 VFs
[18:28:47] [PASSED] 42 VFs
[18:28:47] [PASSED] 43 VFs
[18:28:47] [PASSED] 44 VFs
[18:28:47] [PASSED] 45 VFs
[18:28:47] [PASSED] 46 VFs
[18:28:47] [PASSED] 47 VFs
[18:28:47] [PASSED] 48 VFs
[18:28:47] [PASSED] 49 VFs
[18:28:47] [PASSED] 50 VFs
[18:28:47] [PASSED] 51 VFs
[18:28:47] [PASSED] 52 VFs
[18:28:47] [PASSED] 53 VFs
[18:28:47] [PASSED] 54 VFs
[18:28:47] [PASSED] 55 VFs
[18:28:47] [PASSED] 56 VFs
[18:28:47] [PASSED] 57 VFs
[18:28:47] [PASSED] 58 VFs
[18:28:47] [PASSED] 59 VFs
[18:28:47] [PASSED] 60 VFs
[18:28:47] [PASSED] 61 VFs
[18:28:47] [PASSED] 62 VFs
[18:28:47] [PASSED] 63 VFs
[18:28:47] ==================== [PASSED] fair_vram ====================
[18:28:47] ================== [PASSED] pf_gt_config ===================
[18:28:47] ===================== lmtt (1 subtest) =====================
[18:28:47] ======================== test_ops =========================
[18:28:47] [PASSED] 2-level
[18:28:47] [PASSED] multi-level
[18:28:47] ==================== [PASSED] test_ops =====================
[18:28:47] ====================== [PASSED] lmtt =======================
[18:28:47] ================= sriov_packet (1 subtest) =================
[18:28:47] [PASSED] test_descriptor_init
[18:28:47] ================== [PASSED] sriov_packet ===================
[18:28:47] ================= pf_service (11 subtests) =================
[18:28:47] [PASSED] pf_negotiate_any
[18:28:47] [PASSED] pf_negotiate_base_match
[18:28:47] [PASSED] pf_negotiate_base_newer
[18:28:47] [PASSED] pf_negotiate_base_next
[18:28:47] [SKIPPED] pf_negotiate_base_older (no older minor)
[18:28:47] [PASSED] pf_negotiate_base_prev
[18:28:47] [PASSED] pf_negotiate_latest_match
[18:28:47] [PASSED] pf_negotiate_latest_newer
[18:28:47] [PASSED] pf_negotiate_latest_next
[18:28:47] [SKIPPED] pf_negotiate_latest_older (no older minor)
[18:28:47] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[18:28:47] =================== [PASSED] pf_service ====================
[18:28:47] ================= xe_guc_g2g (2 subtests) ==================
[18:28:47] ============== xe_live_guc_g2g_kunit_default ==============
[18:28:47] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[18:28:47] ============== xe_live_guc_g2g_kunit_allmem ===============
[18:28:47] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[18:28:47] =================== [SKIPPED] xe_guc_g2g ===================
[18:28:47] =================== xe_mocs (2 subtests) ===================
[18:28:47] ================ xe_live_mocs_kernel_kunit ================
[18:28:47] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[18:28:47] ================ xe_live_mocs_reset_kunit =================
[18:28:47] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[18:28:47] ==================== [SKIPPED] xe_mocs =====================
[18:28:47] ================= xe_migrate (2 subtests) ==================
[18:28:47] ================= xe_migrate_sanity_kunit =================
[18:28:47] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[18:28:47] ================== xe_validate_ccs_kunit ==================
[18:28:47] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[18:28:47] =================== [SKIPPED] xe_migrate ===================
[18:28:47] ================== xe_dma_buf (1 subtest) ==================
[18:28:47] ==================== xe_dma_buf_kunit =====================
[18:28:47] ================ [SKIPPED] xe_dma_buf_kunit ================
[18:28:47] =================== [SKIPPED] xe_dma_buf ===================
[18:28:47] ================= xe_bo_shrink (1 subtest) =================
[18:28:47] =================== xe_bo_shrink_kunit ====================
[18:28:47] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[18:28:47] ================== [SKIPPED] xe_bo_shrink ==================
[18:28:47] ==================== xe_bo (2 subtests) ====================
[18:28:47] ================== xe_ccs_migrate_kunit ===================
[18:28:47] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[18:28:47] ==================== xe_bo_evict_kunit ====================
[18:28:47] =============== [SKIPPED] xe_bo_evict_kunit ================
[18:28:47] ===================== [SKIPPED] xe_bo ======================
[18:28:47] =================== xe_any (9 subtests) ====================
[18:28:47] [PASSED] test_to_xe
[18:28:47] [PASSED] test_to_dev
[18:28:47] [PASSED] test_to_pdev
[18:28:47] [PASSED] test_to_drm
[18:28:47] [PASSED] test_if_pdev
[18:28:47] [PASSED] test_if_xe
[18:28:47] [PASSED] test_if_tile
[18:28:47] [PASSED] test_if_gt
[18:28:47] [PASSED] test_to_id
[18:28:47] ===================== [PASSED] xe_any ======================
[18:28:47] ==================== args (13 subtests) ====================
[18:28:47] [PASSED] count_args_test
[18:28:47] [PASSED] call_args_example
[18:28:47] [PASSED] call_args_test
[18:28:47] [PASSED] drop_first_arg_example
[18:28:47] [PASSED] drop_first_arg_test
[18:28:47] [PASSED] first_arg_example
[18:28:47] [PASSED] first_arg_test
[18:28:47] [PASSED] last_arg_example
[18:28:47] [PASSED] last_arg_test
[18:28:47] [PASSED] pick_arg_example
[18:28:47] [PASSED] if_args_example
[18:28:47] [PASSED] if_args_test
[18:28:47] [PASSED] sep_comma_example
[18:28:47] ====================== [PASSED] args =======================
[18:28:47] =================== xe_pci (3 subtests) ====================
[18:28:47] ==================== check_graphics_ip ====================
[18:28:47] [PASSED] 12.00 Xe_LP
[18:28:47] [PASSED] 12.10 Xe_LP+
[18:28:47] [PASSED] 12.55 Xe_HPG
[18:28:47] [PASSED] 12.60 Xe_HPC
[18:28:47] [PASSED] 12.70 Xe_LPG
[18:28:47] [PASSED] 12.71 Xe_LPG
[18:28:47] [PASSED] 12.74 Xe_LPG+
[18:28:47] [PASSED] 20.01 Xe2_HPG
[18:28:47] [PASSED] 20.02 Xe2_HPG
[18:28:47] [PASSED] 20.04 Xe2_LPG
[18:28:47] [PASSED] 30.00 Xe3_LPG
[18:28:47] [PASSED] 30.01 Xe3_LPG
[18:28:47] [PASSED] 30.03 Xe3_LPG
[18:28:47] [PASSED] 30.04 Xe3_LPG
[18:28:47] [PASSED] 30.05 Xe3_LPG
[18:28:47] [PASSED] 35.10 Xe3p_LPG
[18:28:47] [PASSED] 35.11 Xe3p_XPC
[18:28:47] ================ [PASSED] check_graphics_ip ================
[18:28:47] ===================== check_media_ip ======================
[18:28:47] [PASSED] 12.00 Xe_M
[18:28:47] [PASSED] 12.55 Xe_HPM
[18:28:47] [PASSED] 13.00 Xe_LPM+
[18:28:47] [PASSED] 13.01 Xe2_HPM
[18:28:47] [PASSED] 20.00 Xe2_LPM
[18:28:47] [PASSED] 30.00 Xe3_LPM
[18:28:47] [PASSED] 30.02 Xe3_LPM
[18:28:47] [PASSED] 35.00 Xe3p_LPM
[18:28:47] [PASSED] 35.03 Xe3p_HPM
[18:28:47] ================= [PASSED] check_media_ip ==================
[18:28:47] =================== check_platform_desc ===================
[18:28:47] [PASSED] 0x9A60 (TIGERLAKE)
[18:28:47] [PASSED] 0x9A68 (TIGERLAKE)
[18:28:47] [PASSED] 0x9A70 (TIGERLAKE)
[18:28:47] [PASSED] 0x9A40 (TIGERLAKE)
[18:28:47] [PASSED] 0x9A49 (TIGERLAKE)
[18:28:47] [PASSED] 0x9A59 (TIGERLAKE)
[18:28:47] [PASSED] 0x9A78 (TIGERLAKE)
[18:28:47] [PASSED] 0x9AC0 (TIGERLAKE)
[18:28:47] [PASSED] 0x9AC9 (TIGERLAKE)
[18:28:47] [PASSED] 0x9AD9 (TIGERLAKE)
[18:28:47] [PASSED] 0x9AF8 (TIGERLAKE)
[18:28:47] [PASSED] 0x4C80 (ROCKETLAKE)
[18:28:47] [PASSED] 0x4C8A (ROCKETLAKE)
[18:28:47] [PASSED] 0x4C8B (ROCKETLAKE)
[18:28:47] [PASSED] 0x4C8C (ROCKETLAKE)
[18:28:47] [PASSED] 0x4C90 (ROCKETLAKE)
[18:28:47] [PASSED] 0x4C9A (ROCKETLAKE)
[18:28:47] [PASSED] 0x4680 (ALDERLAKE_S)
[18:28:47] [PASSED] 0x4682 (ALDERLAKE_S)
[18:28:47] [PASSED] 0x4688 (ALDERLAKE_S)
[18:28:47] [PASSED] 0x468A (ALDERLAKE_S)
[18:28:47] [PASSED] 0x468B (ALDERLAKE_S)
[18:28:47] [PASSED] 0x4690 (ALDERLAKE_S)
[18:28:47] [PASSED] 0x4692 (ALDERLAKE_S)
[18:28:47] [PASSED] 0x4693 (ALDERLAKE_S)
[18:28:47] [PASSED] 0x46A0 (ALDERLAKE_P)
[18:28:47] [PASSED] 0x46A1 (ALDERLAKE_P)
[18:28:47] [PASSED] 0x46A2 (ALDERLAKE_P)
[18:28:47] [PASSED] 0x46A3 (ALDERLAKE_P)
[18:28:47] [PASSED] 0x46A6 (ALDERLAKE_P)
[18:28:47] [PASSED] 0x46A8 (ALDERLAKE_P)
[18:28:47] [PASSED] 0x46AA (ALDERLAKE_P)
[18:28:47] [PASSED] 0x462A (ALDERLAKE_P)
[18:28:47] [PASSED] 0x4626 (ALDERLAKE_P)
[18:28:47] [PASSED] 0x4628 (ALDERLAKE_P)
[18:28:47] [PASSED] 0x46B0 (ALDERLAKE_P)
[18:28:47] [PASSED] 0x46B1 (ALDERLAKE_P)
[18:28:47] [PASSED] 0x46B2 (ALDERLAKE_P)
[18:28:47] [PASSED] 0x46B3 (ALDERLAKE_P)
[18:28:47] [PASSED] 0x46C0 (ALDERLAKE_P)
[18:28:47] [PASSED] 0x46C1 (ALDERLAKE_P)
[18:28:47] [PASSED] 0x46C2 (ALDERLAKE_P)
[18:28:47] [PASSED] 0x46C3 (ALDERLAKE_P)
[18:28:47] [PASSED] 0x46D0 (ALDERLAKE_N)
[18:28:47] [PASSED] 0x46D1 (ALDERLAKE_N)
[18:28:47] [PASSED] 0x46D2 (ALDERLAKE_N)
[18:28:47] [PASSED] 0x46D3 (ALDERLAKE_N)
[18:28:47] [PASSED] 0x46D4 (ALDERLAKE_N)
[18:28:47] [PASSED] 0xA721 (ALDERLAKE_P)
[18:28:47] [PASSED] 0xA7A1 (ALDERLAKE_P)
[18:28:47] [PASSED] 0xA7A9 (ALDERLAKE_P)
[18:28:47] [PASSED] 0xA7AC (ALDERLAKE_P)
[18:28:47] [PASSED] 0xA7AD (ALDERLAKE_P)
[18:28:47] [PASSED] 0xA720 (ALDERLAKE_P)
[18:28:47] [PASSED] 0xA7A0 (ALDERLAKE_P)
[18:28:47] [PASSED] 0xA7A8 (ALDERLAKE_P)
[18:28:47] [PASSED] 0xA7AA (ALDERLAKE_P)
[18:28:47] [PASSED] 0xA7AB (ALDERLAKE_P)
[18:28:47] [PASSED] 0xA780 (ALDERLAKE_S)
[18:28:47] [PASSED] 0xA781 (ALDERLAKE_S)
[18:28:47] [PASSED] 0xA782 (ALDERLAKE_S)
[18:28:47] [PASSED] 0xA783 (ALDERLAKE_S)
[18:28:47] [PASSED] 0xA788 (ALDERLAKE_S)
[18:28:47] [PASSED] 0xA789 (ALDERLAKE_S)
[18:28:47] [PASSED] 0xA78A (ALDERLAKE_S)
[18:28:47] [PASSED] 0xA78B (ALDERLAKE_S)
[18:28:47] [PASSED] 0x4905 (DG1)
[18:28:47] [PASSED] 0x4906 (DG1)
[18:28:47] [PASSED] 0x4907 (DG1)
[18:28:47] [PASSED] 0x4908 (DG1)
[18:28:47] [PASSED] 0x4909 (DG1)
[18:28:47] [PASSED] 0x56C0 (DG2)
[18:28:47] [PASSED] 0x56C2 (DG2)
[18:28:47] [PASSED] 0x56C1 (DG2)
[18:28:47] [PASSED] 0x7D51 (METEORLAKE)
[18:28:47] [PASSED] 0x7DD1 (METEORLAKE)
[18:28:47] [PASSED] 0x7D41 (METEORLAKE)
[18:28:47] [PASSED] 0x7D67 (METEORLAKE)
[18:28:47] [PASSED] 0xB640 (METEORLAKE)
[18:28:47] [PASSED] 0x56A0 (DG2)
[18:28:47] [PASSED] 0x56A1 (DG2)
[18:28:47] [PASSED] 0x56A2 (DG2)
[18:28:47] [PASSED] 0x56BE (DG2)
[18:28:47] [PASSED] 0x56BF (DG2)
[18:28:47] [PASSED] 0x5690 (DG2)
[18:28:47] [PASSED] 0x5691 (DG2)
[18:28:47] [PASSED] 0x5692 (DG2)
[18:28:47] [PASSED] 0x56A5 (DG2)
[18:28:47] [PASSED] 0x56A6 (DG2)
[18:28:47] [PASSED] 0x56B0 (DG2)
[18:28:47] [PASSED] 0x56B1 (DG2)
[18:28:47] [PASSED] 0x56BA (DG2)
[18:28:47] [PASSED] 0x56BB (DG2)
[18:28:47] [PASSED] 0x56BC (DG2)
[18:28:47] [PASSED] 0x56BD (DG2)
[18:28:47] [PASSED] 0x5693 (DG2)
[18:28:47] [PASSED] 0x5694 (DG2)
[18:28:47] [PASSED] 0x5695 (DG2)
[18:28:47] [PASSED] 0x56A3 (DG2)
[18:28:47] [PASSED] 0x56A4 (DG2)
[18:28:47] [PASSED] 0x56B2 (DG2)
[18:28:47] [PASSED] 0x56B3 (DG2)
[18:28:47] [PASSED] 0x5696 (DG2)
[18:28:47] [PASSED] 0x5697 (DG2)
[18:28:47] [PASSED] 0xB69 (PVC)
[18:28:47] [PASSED] 0xB6E (PVC)
[18:28:47] [PASSED] 0xBD4 (PVC)
[18:28:47] [PASSED] 0xBD5 (PVC)
[18:28:47] [PASSED] 0xBD6 (PVC)
[18:28:47] [PASSED] 0xBD7 (PVC)
[18:28:47] [PASSED] 0xBD8 (PVC)
[18:28:47] [PASSED] 0xBD9 (PVC)
[18:28:47] [PASSED] 0xBDA (PVC)
[18:28:47] [PASSED] 0xBDB (PVC)
[18:28:47] [PASSED] 0xBE0 (PVC)
[18:28:47] [PASSED] 0xBE1 (PVC)
[18:28:47] [PASSED] 0xBE5 (PVC)
[18:28:47] [PASSED] 0x7D40 (METEORLAKE)
[18:28:47] [PASSED] 0x7D45 (METEORLAKE)
[18:28:47] [PASSED] 0x7D55 (METEORLAKE)
[18:28:47] [PASSED] 0x7D60 (METEORLAKE)
[18:28:47] [PASSED] 0x7DD5 (METEORLAKE)
[18:28:47] [PASSED] 0x6420 (LUNARLAKE)
[18:28:47] [PASSED] 0x64A0 (LUNARLAKE)
[18:28:47] [PASSED] 0x64B0 (LUNARLAKE)
[18:28:47] [PASSED] 0xE202 (BATTLEMAGE)
[18:28:47] [PASSED] 0xE209 (BATTLEMAGE)
[18:28:47] [PASSED] 0xE20B (BATTLEMAGE)
[18:28:47] [PASSED] 0xE20C (BATTLEMAGE)
[18:28:47] [PASSED] 0xE20D (BATTLEMAGE)
[18:28:47] [PASSED] 0xE210 (BATTLEMAGE)
[18:28:47] [PASSED] 0xE211 (BATTLEMAGE)
[18:28:47] [PASSED] 0xE212 (BATTLEMAGE)
[18:28:47] [PASSED] 0xE216 (BATTLEMAGE)
[18:28:47] [PASSED] 0xE220 (BATTLEMAGE)
[18:28:47] [PASSED] 0xE221 (BATTLEMAGE)
[18:28:47] [PASSED] 0xE222 (BATTLEMAGE)
[18:28:47] [PASSED] 0xE223 (BATTLEMAGE)
[18:28:47] [PASSED] 0xB080 (PANTHERLAKE)
[18:28:47] [PASSED] 0xB081 (PANTHERLAKE)
[18:28:47] [PASSED] 0xB082 (PANTHERLAKE)
[18:28:47] [PASSED] 0xB083 (PANTHERLAKE)
[18:28:47] [PASSED] 0xB084 (PANTHERLAKE)
[18:28:47] [PASSED] 0xB085 (PANTHERLAKE)
[18:28:47] [PASSED] 0xB086 (PANTHERLAKE)
[18:28:47] [PASSED] 0xB087 (PANTHERLAKE)
[18:28:47] [PASSED] 0xB08F (PANTHERLAKE)
[18:28:47] [PASSED] 0xB090 (PANTHERLAKE)
[18:28:47] [PASSED] 0xB0A0 (PANTHERLAKE)
[18:28:47] [PASSED] 0xB0B0 (PANTHERLAKE)
[18:28:47] [PASSED] 0xFD80 (PANTHERLAKE)
[18:28:47] [PASSED] 0xFD81 (PANTHERLAKE)
[18:28:47] [PASSED] 0xD740 (NOVALAKE_S)
[18:28:47] [PASSED] 0xD741 (NOVALAKE_S)
[18:28:47] [PASSED] 0xD742 (NOVALAKE_S)
[18:28:47] [PASSED] 0xD743 (NOVALAKE_S)
[18:28:47] [PASSED] 0xD745 (NOVALAKE_S)
[18:28:47] [PASSED] 0xD74A (NOVALAKE_S)
[18:28:47] [PASSED] 0xD74B (NOVALAKE_S)
[18:28:47] [PASSED] 0x674C (CRESCENTISLAND)
[18:28:47] [PASSED] 0x674D (CRESCENTISLAND)
[18:28:47] [PASSED] 0x674E (CRESCENTISLAND)
[18:28:47] [PASSED] 0x674F (CRESCENTISLAND)
[18:28:47] [PASSED] 0x6750 (CRESCENTISLAND)
[18:28:47] [PASSED] 0xD750 (NOVALAKE_P)
[18:28:47] [PASSED] 0xD751 (NOVALAKE_P)
[18:28:47] [PASSED] 0xD752 (NOVALAKE_P)
[18:28:47] [PASSED] 0xD753 (NOVALAKE_P)
[18:28:47] [PASSED] 0xD754 (NOVALAKE_P)
[18:28:47] [PASSED] 0xD755 (NOVALAKE_P)
[18:28:47] [PASSED] 0xD756 (NOVALAKE_P)
[18:28:47] [PASSED] 0xD757 (NOVALAKE_P)
[18:28:47] [PASSED] 0xD75F (NOVALAKE_P)
[18:28:47] =============== [PASSED] check_platform_desc ===============
[18:28:47] ===================== [PASSED] xe_pci ======================
[18:28:47] ============= xe_rtp_tables_test (5 subtests) ==============
[18:28:47] ================== xe_rtp_table_gt_test ===================
[18:28:47] [PASSED] gt_was/14011060649
[18:28:47] [PASSED] gt_was/14011059788
[18:28:47] [PASSED] gt_was/14015795083
[18:28:47] [PASSED] gt_was/16021867713
[18:28:47] [PASSED] gt_was/14019449301
[18:28:47] [PASSED] gt_was/16028005424
[18:28:47] [PASSED] gt_was/14026578760
[18:28:47] [PASSED] gt_was/1409420604
[18:28:47] [PASSED] gt_was/1408615072
[18:28:47] [PASSED] gt_was/22010523718
[18:28:47] [PASSED] gt_was/14011006942
[18:28:47] [PASSED] gt_was/14014830051
[18:28:47] [PASSED] gt_was/18018781329
[18:28:47] [PASSED] gt_was/1509235366
[18:28:47] [PASSED] gt_was/18018781329
[18:28:47] [PASSED] gt_was/16016694945
[18:28:47] [PASSED] gt_was/14018575942
[18:28:47] [PASSED] gt_was/22016670082
[18:28:47] [PASSED] gt_was/22016670082
[18:28:47] [PASSED] gt_was/14017421178
[18:28:47] [PASSED] gt_was/16025250150
[18:28:47] [PASSED] gt_was/14021871409
[18:28:47] [PASSED] gt_was/16021865536
[18:28:47] [PASSED] gt_was/14021486841
[18:28:47] [PASSED] gt_was/14025160223
[18:28:47] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[18:28:47] [PASSED] gt_was/14025635424
[18:28:47] [PASSED] gt_was/16028005424
[18:28:47] ============== [PASSED] xe_rtp_table_gt_test ===============
[18:28:47] ================== xe_rtp_table_gt_test ===================
[18:28:47] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[18:28:47] [PASSED] gt_tunings/Tuning: 32B Access Enable
[18:28:47] [PASSED] gt_tunings/Tuning: L3 cache
[18:28:47] [PASSED] gt_tunings/Tuning: L3 cache - media
[18:28:47] [PASSED] gt_tunings/Tuning: Compression Overfetch
[18:28:47] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[18:28:47] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[18:28:47] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[18:28:47] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[18:28:47] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[18:28:47] [PASSED] gt_tunings/Tuning: Stateless compression control
[18:28:47] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[18:28:47] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[18:28:47] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[18:28:47] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[18:28:47] ============== [PASSED] xe_rtp_table_gt_test ===============
[18:28:47] ================== xe_rtp_table_oob_test ==================
[18:28:47] [PASSED] oob_was/1607983814
[18:28:47] [PASSED] oob_was/16010904313
[18:28:47] [PASSED] oob_was/18022495364
[18:28:47] [PASSED] oob_was/22012773006
[18:28:47] [PASSED] oob_was/14014475959
[18:28:47] [PASSED] oob_was/22011391025
[18:28:47] [PASSED] oob_was/22012727170
[18:28:47] [PASSED] oob_was/22012727685
[18:28:47] [PASSED] oob_was/22016596838
[18:28:47] [PASSED] oob_was/18020744125
[18:28:47] [PASSED] oob_was/1409600907
[18:28:47] [PASSED] oob_was/22014953428
[18:28:47] [PASSED] oob_was/16017236439
[18:28:47] [PASSED] oob_was/14019821291
[18:28:47] [PASSED] oob_was/14015076503
[18:28:47] [PASSED] oob_was/22016122933
[18:28:47] [PASSED] oob_was/14018913170
[18:28:47] [PASSED] oob_was/14018094691
[18:28:47] [PASSED] oob_was/18024947630
[18:28:47] [PASSED] oob_was/16022287689
[18:28:47] [PASSED] oob_was/13011645652
[18:28:47] [PASSED] oob_was/14022293748
[18:28:47] [PASSED] oob_was/22019794406
[18:28:47] [PASSED] oob_was/22019338487
[18:28:47] [PASSED] oob_was/16023588340
[18:28:47] [PASSED] oob_was/14019789679
[18:28:47] [PASSED] oob_was/14022866841
[18:28:47] [PASSED] oob_was/16021333562
[18:28:47] [PASSED] oob_was/14016712196
[18:28:47] [PASSED] oob_was/14015568240
[18:28:47] [PASSED] oob_was/18013179988
[18:28:47] [PASSED] oob_was/1508761755
[18:28:47] [PASSED] oob_was/16023105232
[18:28:47] [PASSED] oob_was/16026508708
[18:28:47] [PASSED] oob_was/14020001231
[18:28:47] [PASSED] oob_was/16023683509
[18:28:47] [PASSED] oob_was/14025515070
[18:28:47] [PASSED] oob_was/15015404425_disable
[18:28:47] [PASSED] oob_was/16026007364
[18:28:47] [PASSED] oob_was/14020316580
[18:28:47] [PASSED] oob_was/14025883347
[18:28:47] [PASSED] oob_was/16029380221
[18:28:47] [PASSED] oob_was/22022079272
[18:28:47] [PASSED] oob_was/16029897822
[18:28:47] [PASSED] oob_was/14027054324
[18:28:47] ============== [PASSED] xe_rtp_table_oob_test ==============
[18:28:47] ================ xe_rtp_table_dev_oob_test ================
[18:28:47] [PASSED] device_oob_was/22010954014
[18:28:47] [PASSED] device_oob_was/15015404425
[18:28:47] [PASSED] device_oob_was/22019338487_display
[18:28:47] [PASSED] device_oob_was/14022085890
[18:28:47] [PASSED] device_oob_was/14026539277
[18:28:47] [PASSED] device_oob_was/14026633728
[18:28:47] [PASSED] device_oob_was/14026746987
[18:28:47] [PASSED] device_oob_was/14026779378
[18:28:47] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[18:28:47] ========== xe_rtp_table_missing_upper_bound_test ==========
[18:28:47] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[18:28:47] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[18:28:47] [PASSED] register_whitelist/1806527549
[18:28:47] [PASSED] register_whitelist/allow_read_ctx_timestamp
[18:28:47] [PASSED] register_whitelist/allow_read_queue_timestamp
[18:28:47] [PASSED] register_whitelist/16014440446
[18:28:47] [PASSED] register_whitelist/16017236439
[18:28:47] [PASSED] register_whitelist/16020183090
[18:28:47] [PASSED] register_whitelist/14024997852
[18:28:47] [PASSED] register_whitelist/14024997852
[18:28:47] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[18:28:47] =============== [PASSED] xe_rtp_tables_test ================
[18:28:47] =================== xe_rtp (3 subtests) ====================
[18:28:47] =================== xe_rtp_rules_tests ====================
[18:28:47] [PASSED] no
[18:28:47] [PASSED] yes
[18:28:47] [PASSED] no-and-no
[18:28:47] [PASSED] no-and-yes
[18:28:47] [PASSED] yes-and-no
[18:28:47] [PASSED] yes-and-yes
[18:28:47] [PASSED] no-or-no
[18:28:47] [PASSED] no-or-yes
[18:28:47] [PASSED] yes-or-no
[18:28:47] [PASSED] yes-or-yes
[18:28:47] [PASSED] no-yes-or-yes-no
[18:28:47] [PASSED] no-yes-or-yes-yes
[18:28:47] [PASSED] yes-yes-or-no-yes
[18:28:47] [PASSED] yes-yes-or-yes-yes
[18:28:47] [PASSED] no-no-or-yes-or-no
[18:28:47] [PASSED] or
[18:28:47] [PASSED] or-yes
[18:28:47] [PASSED] or-no
[18:28:47] [PASSED] yes-or
[18:28:47] [PASSED] no-or
[18:28:47] [PASSED] no-or-or-yes
[18:28:47] [PASSED] yes-or-or-no
[18:28:47] [PASSED] no-or-or-no
[18:28:47] [PASSED] missing-context-engine-class
[18:28:47] [PASSED] missing-context-engine-class-or-yes
[18:28:47] [PASSED] missing-context-engine-class-or-or-yes
[18:28:47] =============== [PASSED] xe_rtp_rules_tests ================
[18:28:47] =============== xe_rtp_process_to_sr_tests ================
[18:28:47] [PASSED] coalesce-same-reg
[18:28:47] [PASSED] coalesce-same-reg-literal-and-func
[18:28:47] [PASSED] no-match-no-add
[18:28:47] [PASSED] two-regs-two-entries
[18:28:47] [PASSED] clr-one-set-other
[18:28:47] [PASSED] set-field
[18:28:47] [PASSED] conflict-duplicate
[18:28:47] [PASSED] conflict-not-disjoint
[18:28:47] [PASSED] conflict-not-disjoint-literal-and-func
[18:28:47] [PASSED] conflict-reg-type
[18:28:47] [PASSED] bad-mcr-reg-forced-to-regular
[18:28:47] [PASSED] bad-regular-reg-forced-to-mcr
[18:28:47] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[18:28:47] ================== xe_rtp_process_tests ===================
[18:28:47] [PASSED] active1
[18:28:47] [PASSED] active2
[18:28:47] [PASSED] active-inactive
[18:28:47] [PASSED] inactive-active
[18:28:47] [PASSED] inactive-active-inactive
[18:28:47] [PASSED] inactive-inactive-inactive
[18:28:47] ============== [PASSED] xe_rtp_process_tests ===============
[18:28:47] ===================== [PASSED] xe_rtp ======================
[18:28:47] ==================== xe_wa (1 subtest) =====================
[18:28:47] ======================== xe_wa_gt =========================
[18:28:47] [PASSED] TIGERLAKE B0
[18:28:47] [PASSED] DG1 A0
[18:28:47] [PASSED] DG1 B0
[18:28:47] [PASSED] ALDERLAKE_S A0
[18:28:47] [PASSED] ALDERLAKE_S B0
[18:28:47] [PASSED] ALDERLAKE_S C0
[18:28:47] [PASSED] ALDERLAKE_S D0
[18:28:47] [PASSED] ALDERLAKE_P A0
[18:28:47] [PASSED] ALDERLAKE_P B0
[18:28:47] [PASSED] ALDERLAKE_P C0
[18:28:47] [PASSED] ALDERLAKE_S RPLS D0
[18:28:47] [PASSED] ALDERLAKE_P RPLU E0
[18:28:47] [PASSED] DG2 G10 C0
[18:28:47] [PASSED] DG2 G11 B1
[18:28:47] [PASSED] DG2 G12 A1
[18:28:47] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:28:47] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:28:47] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[18:28:47] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[18:28:47] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[18:28:47] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[18:28:47] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[18:28:47] ==================== [PASSED] xe_wa_gt =====================
[18:28:47] ====================== [PASSED] xe_wa ======================
[18:28:47] ============================================================
[18:28:47] Testing complete. Ran 820 tests: passed: 792, skipped: 28
[18:28:47] Elapsed time: 36.019s total, 1.817s configuring, 33.487s building, 0.706s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[18:28:47] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:28:49] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:29:14] Starting KUnit Kernel (1/1)...
[18:29:14] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:29:14] ============= refcount_interrupt (4 subtests) ==============
[18:29:14] [PASSED] test_single_irq_change
[18:29:14] [PASSED] test_nested_irq_change
[18:29:14] [PASSED] test_multiple_irq_change
[18:29:14] [PASSED] test_irq_save
[18:29:14] =============== [PASSED] refcount_interrupt ================
[18:29:14] ============ drm_test_pick_cmdline (2 subtests) ============
[18:29:14] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[18:29:14] =============== drm_test_pick_cmdline_named ===============
[18:29:14] [PASSED] NTSC
[18:29:14] [PASSED] NTSC-J
[18:29:14] [PASSED] PAL
[18:29:14] [PASSED] PAL-M
[18:29:14] =========== [PASSED] drm_test_pick_cmdline_named ===========
[18:29:14] ============== [PASSED] drm_test_pick_cmdline ==============
[18:29:14] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[18:29:14] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[18:29:14] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[18:29:14] =========== drm_validate_clone_mode (2 subtests) ===========
[18:29:14] ============== drm_test_check_in_clone_mode ===============
[18:29:14] [PASSED] in_clone_mode
[18:29:14] [PASSED] not_in_clone_mode
[18:29:14] ========== [PASSED] drm_test_check_in_clone_mode ===========
[18:29:14] =============== drm_test_check_valid_clones ===============
[18:29:14] [PASSED] not_in_clone_mode
[18:29:14] [PASSED] valid_clone
[18:29:14] [PASSED] invalid_clone
[18:29:14] =========== [PASSED] drm_test_check_valid_clones ===========
[18:29:14] ============= [PASSED] drm_validate_clone_mode =============
[18:29:14] ============= drm_validate_modeset (1 subtest) =============
[18:29:14] [PASSED] drm_test_check_connector_changed_modeset
[18:29:14] ============== [PASSED] drm_validate_modeset ===============
[18:29:14] ====== drm_test_bridge_get_current_state (1 subtest) =======
[18:29:14] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[18:29:14] ======== [PASSED] drm_test_bridge_get_current_state ========
[18:29:14] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[18:29:14] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[18:29:14] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[18:29:14] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[18:29:14] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[18:29:14] ============== drm_bridge_alloc (2 subtests) ===============
[18:29:14] [PASSED] drm_test_drm_bridge_alloc_basic
[18:29:14] [PASSED] drm_test_drm_bridge_alloc_get_put
[18:29:14] ================ [PASSED] drm_bridge_alloc =================
[18:29:14] ============= drm_bridge_bus_fmt (5 subtests) ==============
[18:29:14] [PASSED] drm_test_bridge_rgb_yuv_rgb
[18:29:14] [PASSED] drm_test_bridge_must_convert_to_yuv444
[18:29:14] [PASSED] drm_test_bridge_hdmi_auto_rgb
[18:29:14] [PASSED] drm_test_bridge_auto_first
[18:29:14] [PASSED] drm_test_bridge_rgb_yuv_no_path
[18:29:14] =============== [PASSED] drm_bridge_bus_fmt ================
[18:29:14] ============= drm_cmdline_parser (40 subtests) =============
[18:29:14] [PASSED] drm_test_cmdline_force_d_only
[18:29:14] [PASSED] drm_test_cmdline_force_D_only_dvi
[18:29:14] [PASSED] drm_test_cmdline_force_D_only_hdmi
[18:29:14] [PASSED] drm_test_cmdline_force_D_only_not_digital
[18:29:14] [PASSED] drm_test_cmdline_force_e_only
[18:29:14] [PASSED] drm_test_cmdline_res
[18:29:14] [PASSED] drm_test_cmdline_res_vesa
[18:29:14] [PASSED] drm_test_cmdline_res_vesa_rblank
[18:29:14] [PASSED] drm_test_cmdline_res_rblank
[18:29:14] [PASSED] drm_test_cmdline_res_bpp
[18:29:14] [PASSED] drm_test_cmdline_res_refresh
[18:29:14] [PASSED] drm_test_cmdline_res_bpp_refresh
[18:29:14] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[18:29:14] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[18:29:14] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[18:29:14] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[18:29:14] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[18:29:14] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[18:29:14] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[18:29:14] [PASSED] drm_test_cmdline_res_margins_force_on
[18:29:14] [PASSED] drm_test_cmdline_res_vesa_margins
[18:29:14] [PASSED] drm_test_cmdline_name
[18:29:14] [PASSED] drm_test_cmdline_name_bpp
[18:29:14] [PASSED] drm_test_cmdline_name_option
[18:29:14] [PASSED] drm_test_cmdline_name_bpp_option
[18:29:14] [PASSED] drm_test_cmdline_rotate_0
[18:29:14] [PASSED] drm_test_cmdline_rotate_90
[18:29:14] [PASSED] drm_test_cmdline_rotate_180
[18:29:14] [PASSED] drm_test_cmdline_rotate_270
[18:29:14] [PASSED] drm_test_cmdline_hmirror
[18:29:14] [PASSED] drm_test_cmdline_vmirror
[18:29:14] [PASSED] drm_test_cmdline_margin_options
[18:29:14] [PASSED] drm_test_cmdline_multiple_options
[18:29:14] [PASSED] drm_test_cmdline_bpp_extra_and_option
[18:29:14] [PASSED] drm_test_cmdline_extra_and_option
[18:29:14] [PASSED] drm_test_cmdline_freestanding_options
[18:29:14] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[18:29:14] [PASSED] drm_test_cmdline_panel_orientation
[18:29:14] ================ drm_test_cmdline_invalid =================
[18:29:14] [PASSED] margin_only
[18:29:14] [PASSED] interlace_only
[18:29:14] [PASSED] res_missing_x
[18:29:14] [PASSED] res_missing_y
[18:29:14] [PASSED] res_bad_y
[18:29:14] [PASSED] res_missing_y_bpp
[18:29:14] [PASSED] res_bad_bpp
[18:29:14] [PASSED] res_bad_refresh
[18:29:14] [PASSED] res_bpp_refresh_force_on_off
[18:29:14] [PASSED] res_invalid_mode
[18:29:14] [PASSED] res_bpp_wrong_place_mode
[18:29:14] [PASSED] name_bpp_refresh
[18:29:14] [PASSED] name_refresh
[18:29:14] [PASSED] name_refresh_wrong_mode
[18:29:14] [PASSED] name_refresh_invalid_mode
[18:29:14] [PASSED] rotate_multiple
[18:29:14] [PASSED] rotate_invalid_val
[18:29:14] [PASSED] rotate_truncated
[18:29:14] [PASSED] invalid_option
[18:29:14] [PASSED] invalid_tv_option
[18:29:14] [PASSED] truncated_tv_option
[18:29:14] ============ [PASSED] drm_test_cmdline_invalid =============
[18:29:14] =============== drm_test_cmdline_tv_options ===============
[18:29:14] [PASSED] NTSC
[18:29:14] [PASSED] NTSC_443
[18:29:14] [PASSED] NTSC_J
[18:29:14] [PASSED] PAL
[18:29:14] [PASSED] PAL_M
[18:29:14] [PASSED] PAL_N
[18:29:14] [PASSED] SECAM
[18:29:14] [PASSED] MONO_525
[18:29:14] [PASSED] MONO_625
[18:29:14] =========== [PASSED] drm_test_cmdline_tv_options ===========
[18:29:14] =============== [PASSED] drm_cmdline_parser ================
[18:29:14] ========== drmm_connector_hdmi_init (20 subtests) ==========
[18:29:14] [PASSED] drm_test_connector_hdmi_init_valid
[18:29:14] [PASSED] drm_test_connector_hdmi_init_bpc_8
[18:29:14] [PASSED] drm_test_connector_hdmi_init_bpc_10
[18:29:14] [PASSED] drm_test_connector_hdmi_init_bpc_12
[18:29:14] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[18:29:14] [PASSED] drm_test_connector_hdmi_init_bpc_null
[18:29:14] [PASSED] drm_test_connector_hdmi_init_formats_empty
[18:29:14] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[18:29:14] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[18:29:14] [PASSED] supported_formats=0x9 yuv420_allowed=1
[18:29:14] [PASSED] supported_formats=0x9 yuv420_allowed=0
[18:29:14] [PASSED] supported_formats=0x5 yuv420_allowed=1
[18:29:14] [PASSED] supported_formats=0x5 yuv420_allowed=0
[18:29:14] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[18:29:14] [PASSED] drm_test_connector_hdmi_init_null_ddc
[18:29:14] [PASSED] drm_test_connector_hdmi_init_null_product
[18:29:14] [PASSED] drm_test_connector_hdmi_init_null_vendor
[18:29:14] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[18:29:14] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[18:29:14] [PASSED] drm_test_connector_hdmi_init_product_valid
[18:29:14] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[18:29:14] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[18:29:14] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[18:29:14] ========= drm_test_connector_hdmi_init_type_valid =========
[18:29:14] [PASSED] HDMI-A
[18:29:14] [PASSED] HDMI-B
[18:29:14] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[18:29:14] ======== drm_test_connector_hdmi_init_type_invalid ========
[18:29:14] [PASSED] Unknown
[18:29:14] [PASSED] VGA
[18:29:14] [PASSED] DVI-I
[18:29:14] [PASSED] DVI-D
[18:29:14] [PASSED] DVI-A
[18:29:14] [PASSED] Composite
[18:29:14] [PASSED] SVIDEO
[18:29:14] [PASSED] LVDS
[18:29:14] [PASSED] Component
[18:29:14] [PASSED] DIN
[18:29:14] [PASSED] DP
[18:29:14] [PASSED] TV
[18:29:14] [PASSED] eDP
[18:29:14] [PASSED] Virtual
[18:29:14] [PASSED] DSI
[18:29:14] [PASSED] DPI
[18:29:14] [PASSED] Writeback
[18:29:14] [PASSED] SPI
[18:29:14] [PASSED] USB
[18:29:14] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[18:29:14] ============ [PASSED] drmm_connector_hdmi_init =============
[18:29:14] ============= drmm_connector_init (3 subtests) =============
[18:29:14] [PASSED] drm_test_drmm_connector_init
[18:29:14] [PASSED] drm_test_drmm_connector_init_null_ddc
[18:29:14] ========= drm_test_drmm_connector_init_type_valid =========
[18:29:14] [PASSED] Unknown
[18:29:14] [PASSED] VGA
[18:29:14] [PASSED] DVI-I
[18:29:14] [PASSED] DVI-D
[18:29:14] [PASSED] DVI-A
[18:29:14] [PASSED] Composite
[18:29:14] [PASSED] SVIDEO
[18:29:14] [PASSED] LVDS
[18:29:14] [PASSED] Component
[18:29:14] [PASSED] DIN
[18:29:14] [PASSED] DP
[18:29:14] [PASSED] HDMI-A
[18:29:14] [PASSED] HDMI-B
[18:29:14] [PASSED] TV
[18:29:14] [PASSED] eDP
[18:29:14] [PASSED] Virtual
[18:29:14] [PASSED] DSI
[18:29:14] [PASSED] DPI
[18:29:14] [PASSED] Writeback
[18:29:14] [PASSED] SPI
[18:29:14] [PASSED] USB
[18:29:14] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[18:29:14] =============== [PASSED] drmm_connector_init ===============
[18:29:14] ========= drm_connector_dynamic_init (6 subtests) ==========
[18:29:14] [PASSED] drm_test_drm_connector_dynamic_init
[18:29:14] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[18:29:14] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[18:29:14] [PASSED] drm_test_drm_connector_dynamic_init_properties
[18:29:14] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[18:29:14] [PASSED] Unknown
[18:29:14] [PASSED] VGA
[18:29:14] [PASSED] DVI-I
[18:29:14] [PASSED] DVI-D
[18:29:14] [PASSED] DVI-A
[18:29:14] [PASSED] Composite
[18:29:14] [PASSED] SVIDEO
[18:29:14] [PASSED] LVDS
[18:29:14] [PASSED] Component
[18:29:14] [PASSED] DIN
[18:29:14] [PASSED] DP
[18:29:14] [PASSED] HDMI-A
[18:29:14] [PASSED] HDMI-B
[18:29:14] [PASSED] TV
[18:29:14] [PASSED] eDP
[18:29:14] [PASSED] Virtual
[18:29:14] [PASSED] DSI
[18:29:14] [PASSED] DPI
[18:29:14] [PASSED] Writeback
[18:29:14] [PASSED] SPI
[18:29:14] [PASSED] USB
[18:29:14] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[18:29:14] ======== drm_test_drm_connector_dynamic_init_name =========
[18:29:14] [PASSED] Unknown
[18:29:14] [PASSED] VGA
[18:29:14] [PASSED] DVI-I
[18:29:14] [PASSED] DVI-D
[18:29:14] [PASSED] DVI-A
[18:29:14] [PASSED] Composite
[18:29:14] [PASSED] SVIDEO
[18:29:14] [PASSED] LVDS
[18:29:14] [PASSED] Component
[18:29:14] [PASSED] DIN
[18:29:14] [PASSED] DP
[18:29:14] [PASSED] HDMI-A
[18:29:14] [PASSED] HDMI-B
[18:29:14] [PASSED] TV
[18:29:14] [PASSED] eDP
[18:29:14] [PASSED] Virtual
[18:29:14] [PASSED] DSI
[18:29:14] [PASSED] DPI
[18:29:14] [PASSED] Writeback
[18:29:14] [PASSED] SPI
[18:29:14] [PASSED] USB
[18:29:14] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[18:29:14] =========== [PASSED] drm_connector_dynamic_init ============
[18:29:14] ==== drm_connector_dynamic_register_early (4 subtests) =====
[18:29:14] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[18:29:14] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[18:29:14] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[18:29:14] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[18:29:14] ====== [PASSED] drm_connector_dynamic_register_early =======
[18:29:14] ======= drm_connector_dynamic_register (7 subtests) ========
[18:29:14] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[18:29:14] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[18:29:14] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[18:29:14] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[18:29:14] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[18:29:14] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[18:29:14] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[18:29:14] ========= [PASSED] drm_connector_dynamic_register ==========
[18:29:14] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[18:29:14] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[18:29:14] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[18:29:14] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[18:29:14] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[18:29:14] ========== drm_test_get_tv_mode_from_name_valid ===========
[18:29:14] [PASSED] NTSC
[18:29:14] [PASSED] NTSC-443
[18:29:14] [PASSED] NTSC-J
[18:29:14] [PASSED] PAL
[18:29:14] [PASSED] PAL-M
[18:29:14] [PASSED] PAL-N
[18:29:14] [PASSED] SECAM
[18:29:14] [PASSED] Mono
[18:29:14] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[18:29:14] [PASSED] drm_test_get_tv_mode_from_name_truncated
[18:29:14] ============ [PASSED] drm_get_tv_mode_from_name ============
[18:29:14] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[18:29:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[18:29:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[18:29:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[18:29:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[18:29:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[18:29:14] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[18:29:14] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[18:29:14] [PASSED] VIC 96
[18:29:14] [PASSED] VIC 97
[18:29:14] [PASSED] VIC 101
[18:29:14] [PASSED] VIC 102
[18:29:14] [PASSED] VIC 106
[18:29:14] [PASSED] VIC 107
[18:29:14] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[18:29:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[18:29:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[18:29:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[18:29:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[18:29:14] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[18:29:14] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[18:29:14] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[18:29:14] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[18:29:14] [PASSED] Automatic
[18:29:14] [PASSED] Full
[18:29:14] [PASSED] Limited 16:235
[18:29:14] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[18:29:14] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[18:29:14] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[18:29:14] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[18:29:14] === drm_test_drm_hdmi_connector_get_output_format_name ====
[18:29:14] [PASSED] RGB
[18:29:14] [PASSED] YUV 4:2:0
[18:29:14] [PASSED] YUV 4:2:2
[18:29:14] [PASSED] YUV 4:4:4
[18:29:14] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[18:29:14] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[18:29:14] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[18:29:14] ============= drm_damage_helper (21 subtests) ==============
[18:29:14] [PASSED] drm_test_damage_iter_no_damage
[18:29:14] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[18:29:14] [PASSED] drm_test_damage_iter_no_damage_src_moved
[18:29:14] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[18:29:14] [PASSED] drm_test_damage_iter_no_damage_not_visible
[18:29:14] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[18:29:14] [PASSED] drm_test_damage_iter_no_damage_no_fb
[18:29:14] [PASSED] drm_test_damage_iter_simple_damage
[18:29:14] [PASSED] drm_test_damage_iter_single_damage
[18:29:14] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[18:29:14] [PASSED] drm_test_damage_iter_single_damage_outside_src
[18:29:14] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[18:29:14] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[18:29:14] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[18:29:14] [PASSED] drm_test_damage_iter_single_damage_src_moved
[18:29:14] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[18:29:14] [PASSED] drm_test_damage_iter_damage
[18:29:14] [PASSED] drm_test_damage_iter_damage_one_intersect
[18:29:14] [PASSED] drm_test_damage_iter_damage_one_outside
[18:29:14] [PASSED] drm_test_damage_iter_damage_src_moved
[18:29:14] [PASSED] drm_test_damage_iter_damage_not_visible
[18:29:14] ================ [PASSED] drm_damage_helper ================
[18:29:14] ============== drm_dp_mst_helper (3 subtests) ==============
[18:29:14] ============== drm_test_dp_mst_calc_pbn_mode ==============
[18:29:14] [PASSED] Clock 154000 BPP 30 DSC disabled
[18:29:14] [PASSED] Clock 234000 BPP 30 DSC disabled
[18:29:14] [PASSED] Clock 297000 BPP 24 DSC disabled
[18:29:14] [PASSED] Clock 332880 BPP 24 DSC enabled
[18:29:14] [PASSED] Clock 324540 BPP 24 DSC enabled
[18:29:14] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[18:29:14] ============== drm_test_dp_mst_calc_pbn_div ===============
[18:29:14] [PASSED] Link rate 2000000 lane count 4
[18:29:14] [PASSED] Link rate 2000000 lane count 2
[18:29:14] [PASSED] Link rate 2000000 lane count 1
[18:29:14] [PASSED] Link rate 1350000 lane count 4
[18:29:14] [PASSED] Link rate 1350000 lane count 2
[18:29:14] [PASSED] Link rate 1350000 lane count 1
[18:29:14] [PASSED] Link rate 1000000 lane count 4
[18:29:14] [PASSED] Link rate 1000000 lane count 2
[18:29:14] [PASSED] Link rate 1000000 lane count 1
[18:29:14] [PASSED] Link rate 810000 lane count 4
[18:29:14] [PASSED] Link rate 810000 lane count 2
[18:29:14] [PASSED] Link rate 810000 lane count 1
[18:29:14] [PASSED] Link rate 540000 lane count 4
[18:29:14] [PASSED] Link rate 540000 lane count 2
[18:29:14] [PASSED] Link rate 540000 lane count 1
[18:29:14] [PASSED] Link rate 270000 lane count 4
[18:29:14] [PASSED] Link rate 270000 lane count 2
[18:29:14] [PASSED] Link rate 270000 lane count 1
[18:29:14] [PASSED] Link rate 162000 lane count 4
[18:29:14] [PASSED] Link rate 162000 lane count 2
[18:29:14] [PASSED] Link rate 162000 lane count 1
[18:29:14] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[18:29:14] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[18:29:14] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[18:29:14] [PASSED] DP_POWER_UP_PHY with port number
[18:29:14] [PASSED] DP_POWER_DOWN_PHY with port number
[18:29:14] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[18:29:14] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[18:29:14] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[18:29:14] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[18:29:14] [PASSED] DP_QUERY_PAYLOAD with port number
[18:29:14] [PASSED] DP_QUERY_PAYLOAD with VCPI
[18:29:14] [PASSED] DP_REMOTE_DPCD_READ with port number
[18:29:14] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[18:29:14] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[18:29:14] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[18:29:14] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[18:29:14] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[18:29:14] [PASSED] DP_REMOTE_I2C_READ with port number
[18:29:14] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[18:29:14] [PASSED] DP_REMOTE_I2C_READ with transactions array
[18:29:14] [PASSED] DP_REMOTE_I2C_WRITE with port number
[18:29:14] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[18:29:14] [PASSED] DP_REMOTE_I2C_WRITE with data array
[18:29:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[18:29:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[18:29:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[18:29:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[18:29:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[18:29:14] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[18:29:14] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[18:29:14] ================ [PASSED] drm_dp_mst_helper ================
[18:29:14] ================== drm_exec (7 subtests) ===================
[18:29:14] [PASSED] sanitycheck
[18:29:14] [PASSED] test_lock
[18:29:14] [PASSED] test_lock_unlock
[18:29:14] [PASSED] test_duplicates
[18:29:14] [PASSED] test_prepare
[18:29:14] [PASSED] test_prepare_array
[18:29:14] [PASSED] test_multiple_loops
[18:29:14] ==================== [PASSED] drm_exec =====================
[18:29:14] =========== drm_format_helper_test (17 subtests) ===========
[18:29:14] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[18:29:14] [PASSED] single_pixel_source_buffer
[18:29:14] [PASSED] single_pixel_clip_rectangle
[18:29:14] [PASSED] well_known_colors
[18:29:14] [PASSED] destination_pitch
[18:29:14] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[18:29:14] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[18:29:14] [PASSED] single_pixel_source_buffer
[18:29:14] [PASSED] single_pixel_clip_rectangle
[18:29:14] [PASSED] well_known_colors
[18:29:14] [PASSED] destination_pitch
[18:29:14] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[18:29:14] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[18:29:14] [PASSED] single_pixel_source_buffer
[18:29:14] [PASSED] single_pixel_clip_rectangle
[18:29:14] [PASSED] well_known_colors
[18:29:14] [PASSED] destination_pitch
[18:29:14] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[18:29:14] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[18:29:14] [PASSED] single_pixel_source_buffer
[18:29:14] [PASSED] single_pixel_clip_rectangle
[18:29:14] [PASSED] well_known_colors
[18:29:14] [PASSED] destination_pitch
[18:29:14] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[18:29:14] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[18:29:14] [PASSED] single_pixel_source_buffer
[18:29:14] [PASSED] single_pixel_clip_rectangle
[18:29:14] [PASSED] well_known_colors
[18:29:14] [PASSED] destination_pitch
[18:29:14] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[18:29:14] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[18:29:14] [PASSED] single_pixel_source_buffer
[18:29:14] [PASSED] single_pixel_clip_rectangle
[18:29:14] [PASSED] well_known_colors
[18:29:14] [PASSED] destination_pitch
[18:29:14] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[18:29:14] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[18:29:14] [PASSED] single_pixel_source_buffer
[18:29:14] [PASSED] single_pixel_clip_rectangle
[18:29:14] [PASSED] well_known_colors
[18:29:14] [PASSED] destination_pitch
[18:29:14] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[18:29:14] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[18:29:14] [PASSED] single_pixel_source_buffer
[18:29:14] [PASSED] single_pixel_clip_rectangle
[18:29:14] [PASSED] well_known_colors
[18:29:14] [PASSED] destination_pitch
[18:29:14] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[18:29:14] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[18:29:14] [PASSED] single_pixel_source_buffer
[18:29:14] [PASSED] single_pixel_clip_rectangle
[18:29:14] [PASSED] well_known_colors
[18:29:14] [PASSED] destination_pitch
[18:29:14] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[18:29:14] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[18:29:14] [PASSED] single_pixel_source_buffer
[18:29:14] [PASSED] single_pixel_clip_rectangle
[18:29:14] [PASSED] well_known_colors
[18:29:14] [PASSED] destination_pitch
[18:29:14] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[18:29:14] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[18:29:14] [PASSED] single_pixel_source_buffer
[18:29:14] [PASSED] single_pixel_clip_rectangle
[18:29:14] [PASSED] well_known_colors
[18:29:14] [PASSED] destination_pitch
[18:29:14] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[18:29:14] ============== drm_test_fb_xrgb8888_to_mono ===============
[18:29:14] [PASSED] single_pixel_source_buffer
[18:29:14] [PASSED] single_pixel_clip_rectangle
[18:29:14] [PASSED] well_known_colors
[18:29:14] [PASSED] destination_pitch
[18:29:14] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[18:29:14] ==================== drm_test_fb_swab =====================
[18:29:14] [PASSED] single_pixel_source_buffer
[18:29:14] [PASSED] single_pixel_clip_rectangle
[18:29:14] [PASSED] well_known_colors
[18:29:14] [PASSED] destination_pitch
[18:29:14] ================ [PASSED] drm_test_fb_swab =================
[18:29:14] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[18:29:14] [PASSED] single_pixel_source_buffer
[18:29:14] [PASSED] single_pixel_clip_rectangle
[18:29:14] [PASSED] well_known_colors
[18:29:14] [PASSED] destination_pitch
[18:29:14] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[18:29:14] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[18:29:14] [PASSED] single_pixel_source_buffer
[18:29:14] [PASSED] single_pixel_clip_rectangle
[18:29:14] [PASSED] well_known_colors
[18:29:14] [PASSED] destination_pitch
[18:29:14] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[18:29:14] ================= drm_test_fb_clip_offset =================
[18:29:14] [PASSED] pass through
[18:29:14] [PASSED] horizontal offset
[18:29:14] [PASSED] vertical offset
[18:29:14] [PASSED] horizontal and vertical offset
[18:29:14] [PASSED] horizontal offset (custom pitch)
[18:29:14] [PASSED] vertical offset (custom pitch)
[18:29:14] [PASSED] horizontal and vertical offset (custom pitch)
[18:29:14] ============= [PASSED] drm_test_fb_clip_offset =============
[18:29:14] =================== drm_test_fb_memcpy ====================
[18:29:14] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[18:29:14] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[18:29:14] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[18:29:14] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[18:29:14] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[18:29:14] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[18:29:14] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[18:29:14] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[18:29:14] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[18:29:14] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[18:29:14] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[18:29:14] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[18:29:14] =============== [PASSED] drm_test_fb_memcpy ================
[18:29:14] ============= [PASSED] drm_format_helper_test ==============
[18:29:14] ================= drm_format (18 subtests) =================
[18:29:14] [PASSED] drm_test_format_block_width_invalid
[18:29:14] [PASSED] drm_test_format_block_width_one_plane
[18:29:14] [PASSED] drm_test_format_block_width_two_plane
[18:29:14] [PASSED] drm_test_format_block_width_three_plane
[18:29:14] [PASSED] drm_test_format_block_width_tiled
[18:29:14] [PASSED] drm_test_format_block_height_invalid
[18:29:14] [PASSED] drm_test_format_block_height_one_plane
[18:29:14] [PASSED] drm_test_format_block_height_two_plane
[18:29:14] [PASSED] drm_test_format_block_height_three_plane
[18:29:14] [PASSED] drm_test_format_block_height_tiled
[18:29:14] [PASSED] drm_test_format_min_pitch_invalid
[18:29:14] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[18:29:14] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[18:29:14] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[18:29:14] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[18:29:14] [PASSED] drm_test_format_min_pitch_two_plane
[18:29:14] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[18:29:14] [PASSED] drm_test_format_min_pitch_tiled
[18:29:14] =================== [PASSED] drm_format ====================
[18:29:14] ============== drm_framebuffer (10 subtests) ===============
[18:29:14] ========== drm_test_framebuffer_check_src_coords ==========
[18:29:14] [PASSED] Success: source fits into fb
[18:29:14] [PASSED] Fail: overflowing fb with x-axis coordinate
[18:29:14] [PASSED] Fail: overflowing fb with y-axis coordinate
[18:29:14] [PASSED] Fail: overflowing fb with source width
[18:29:14] [PASSED] Fail: overflowing fb with source height
[18:29:14] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[18:29:14] [PASSED] drm_test_framebuffer_cleanup
[18:29:14] =============== drm_test_framebuffer_create ===============
[18:29:14] [PASSED] ABGR8888 normal sizes
[18:29:14] [PASSED] ABGR8888 max sizes
[18:29:14] [PASSED] ABGR8888 pitch greater than min required
[18:29:14] [PASSED] ABGR8888 pitch less than min required
[18:29:14] [PASSED] ABGR8888 Invalid width
[18:29:14] [PASSED] ABGR8888 Invalid buffer handle
[18:29:14] [PASSED] No pixel format
[18:29:14] [PASSED] ABGR8888 Width 0
[18:29:14] [PASSED] ABGR8888 Height 0
[18:29:14] [PASSED] ABGR8888 Out of bound height * pitch combination
[18:29:14] [PASSED] ABGR8888 Large buffer offset
[18:29:14] [PASSED] ABGR8888 Buffer offset for inexistent plane
[18:29:14] [PASSED] ABGR8888 Invalid flag
[18:29:14] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[18:29:14] [PASSED] ABGR8888 Valid buffer modifier
[18:29:14] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[18:29:14] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[18:29:14] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[18:29:14] [PASSED] NV12 Normal sizes
[18:29:14] [PASSED] NV12 Max sizes
[18:29:14] [PASSED] NV12 Invalid pitch
[18:29:14] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[18:29:14] [PASSED] NV12 different modifier per-plane
[18:29:14] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[18:29:14] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[18:29:14] [PASSED] NV12 Modifier for inexistent plane
[18:29:14] [PASSED] NV12 Handle for inexistent plane
[18:29:14] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[18:29:14] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[18:29:14] [PASSED] YVU420 Normal sizes
[18:29:14] [PASSED] YVU420 Max sizes
[18:29:14] [PASSED] YVU420 Invalid pitch
[18:29:14] [PASSED] YVU420 Different pitches
[18:29:14] [PASSED] YVU420 Different buffer offsets/pitches
[18:29:14] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[18:29:14] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[18:29:14] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[18:29:14] [PASSED] YVU420 Valid modifier
[18:29:14] [PASSED] YVU420 Different modifiers per plane
[18:29:14] [PASSED] YVU420 Modifier for inexistent plane
[18:29:14] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[18:29:14] [PASSED] X0L2 Normal sizes
[18:29:14] [PASSED] X0L2 Max sizes
[18:29:14] [PASSED] X0L2 Invalid pitch
[18:29:14] [PASSED] X0L2 Pitch greater than minimum required
[18:29:14] [PASSED] X0L2 Handle for inexistent plane
[18:29:14] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[18:29:14] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[18:29:14] [PASSED] X0L2 Valid modifier
[18:29:14] [PASSED] X0L2 Modifier for inexistent plane
[18:29:14] =========== [PASSED] drm_test_framebuffer_create ===========
[18:29:14] [PASSED] drm_test_framebuffer_free
[18:29:14] [PASSED] drm_test_framebuffer_init
[18:29:14] [PASSED] drm_test_framebuffer_init_bad_format
[18:29:14] [PASSED] drm_test_framebuffer_init_dev_mismatch
[18:29:14] [PASSED] drm_test_framebuffer_lookup
[18:29:14] [PASSED] drm_test_framebuffer_lookup_inexistent
[18:29:14] [PASSED] drm_test_framebuffer_modifiers_not_supported
[18:29:14] ================= [PASSED] drm_framebuffer =================
[18:29:14] ================ drm_gem_shmem (8 subtests) ================
[18:29:14] [PASSED] drm_gem_shmem_test_obj_create
[18:29:14] [PASSED] drm_gem_shmem_test_obj_create_private
[18:29:14] [PASSED] drm_gem_shmem_test_pin_pages
[18:29:14] [PASSED] drm_gem_shmem_test_vmap
[18:29:14] [PASSED] drm_gem_shmem_test_get_sg_table
[18:29:14] [PASSED] drm_gem_shmem_test_get_pages_sgt
[18:29:14] [PASSED] drm_gem_shmem_test_madvise
[18:29:14] [PASSED] drm_gem_shmem_test_purge
[18:29:14] ================== [PASSED] drm_gem_shmem ==================
[18:29:14] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[18:29:14] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[18:29:14] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[18:29:14] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[18:29:14] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[18:29:14] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[18:29:14] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[18:29:14] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[18:29:14] [PASSED] Automatic
[18:29:14] [PASSED] Full
[18:29:14] [PASSED] Limited 16:235
[18:29:14] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[18:29:14] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[18:29:14] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[18:29:14] [PASSED] drm_test_check_disable_connector
[18:29:14] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[18:29:14] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[18:29:14] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[18:29:14] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[18:29:14] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[18:29:14] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[18:29:14] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[18:29:14] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[18:29:14] [PASSED] drm_test_check_output_bpc_dvi
[18:29:14] [PASSED] drm_test_check_output_bpc_format_vic_1
[18:29:14] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[18:29:14] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[18:29:14] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[18:29:14] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[18:29:14] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[18:29:14] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[18:29:14] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[18:29:14] ============ drm_test_check_hdmi_color_format =============
[18:29:14] [PASSED] AUTO -> RGB
[18:29:14] [PASSED] YCBCR422 -> YUV422
[18:29:14] [PASSED] YCBCR420 -> YUV420
[18:29:14] [PASSED] YCBCR444 -> YUV444
[18:29:14] [PASSED] RGB -> RGB
[18:29:14] ======== [PASSED] drm_test_check_hdmi_color_format =========
[18:29:14] ======== drm_test_check_hdmi_color_format_420_only ========
[18:29:14] [PASSED] RGB should fail
[18:29:14] [PASSED] YUV444 should fail
[18:29:14] [PASSED] YUV422 should fail
[18:29:14] [PASSED] YUV420 should work
[18:29:14] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[18:29:14] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[18:29:14] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[18:29:14] [PASSED] drm_test_check_broadcast_rgb_value
[18:29:14] [PASSED] drm_test_check_bpc_8_value
[18:29:14] [PASSED] drm_test_check_bpc_10_value
[18:29:14] [PASSED] drm_test_check_bpc_12_value
[18:29:14] [PASSED] drm_test_check_format_value
[18:29:14] [PASSED] drm_test_check_tmds_char_value
[18:29:14] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[18:29:14] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[18:29:14] [PASSED] drm_test_check_mode_valid
[18:29:14] [PASSED] drm_test_check_mode_valid_reject
[18:29:14] [PASSED] drm_test_check_mode_valid_reject_rate
[18:29:14] [PASSED] drm_test_check_mode_valid_reject_max_clock
[18:29:14] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[18:29:14] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[18:29:14] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[18:29:14] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[18:29:14] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[18:29:14] [PASSED] drm_test_check_infoframes
[18:29:14] [PASSED] drm_test_check_reject_avi_infoframe
[18:29:14] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[18:29:14] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[18:29:14] [PASSED] drm_test_check_reject_audio_infoframe
[18:29:14] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[18:29:14] ================= drm_managed (2 subtests) =================
[18:29:14] [PASSED] drm_test_managed_release_action
[18:29:14] [PASSED] drm_test_managed_run_action
[18:29:14] =================== [PASSED] drm_managed ===================
[18:29:14] =================== drm_mm (6 subtests) ====================
[18:29:14] [PASSED] drm_test_mm_init
[18:29:14] [PASSED] drm_test_mm_debug
[18:29:14] [PASSED] drm_test_mm_align32
[18:29:14] [PASSED] drm_test_mm_align64
[18:29:14] [PASSED] drm_test_mm_lowest
[18:29:14] [PASSED] drm_test_mm_highest
[18:29:14] ===================== [PASSED] drm_mm ======================
[18:29:14] ============= drm_modes_analog_tv (5 subtests) =============
[18:29:14] [PASSED] drm_test_modes_analog_tv_mono_576i
[18:29:14] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[18:29:14] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[18:29:14] [PASSED] drm_test_modes_analog_tv_pal_576i
[18:29:14] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[18:29:14] =============== [PASSED] drm_modes_analog_tv ===============
[18:29:14] ============== drm_panic_helper (3 subtests) ===============
[18:29:14] ============= drm_test_panic_screen_user_map ==============
[18:29:14] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[18:29:14] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[18:29:14] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[18:29:14] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[18:29:14] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[18:29:14] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[18:29:14] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[18:29:14] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[18:29:14] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[18:29:14] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[18:29:14] ========= [PASSED] drm_test_panic_screen_user_map ==========
[18:29:14] ============= drm_test_panic_screen_user_page =============
[18:29:14] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[18:29:14] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[18:29:14] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[18:29:14] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[18:29:14] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[18:29:14] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[18:29:14] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[18:29:14] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[18:29:14] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[18:29:14] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[18:29:14] ========= [PASSED] drm_test_panic_screen_user_page =========
[18:29:14] ========== drm_test_panic_screen_user_set_pixel ===========
[18:29:14] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[18:29:14] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[18:29:14] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[18:29:14] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[18:29:14] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[18:29:14] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[18:29:14] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[18:29:14] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[18:29:14] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[18:29:14] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[18:29:14] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[18:29:14] ================ [PASSED] drm_panic_helper =================
[18:29:14] ============== drm_plane_helper (2 subtests) ===============
[18:29:14] =============== drm_test_check_plane_state ================
[18:29:14] [PASSED] clipping_simple
[18:29:14] [PASSED] clipping_rotate_reflect
[18:29:14] [PASSED] positioning_simple
[18:29:14] [PASSED] upscaling
[18:29:14] [PASSED] downscaling
[18:29:14] [PASSED] rounding1
[18:29:14] [PASSED] rounding2
[18:29:14] [PASSED] rounding3
[18:29:14] [PASSED] rounding4
[18:29:14] =========== [PASSED] drm_test_check_plane_state ============
[18:29:14] =========== drm_test_check_invalid_plane_state ============
[18:29:14] [PASSED] positioning_invalid
[18:29:14] [PASSED] upscaling_invalid
[18:29:14] [PASSED] downscaling_invalid
[18:29:14] ======= [PASSED] drm_test_check_invalid_plane_state ========
[18:29:14] ================ [PASSED] drm_plane_helper =================
[18:29:14] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[18:29:14] ====== drm_test_connector_helper_tv_get_modes_check =======
[18:29:14] [PASSED] None
[18:29:14] [PASSED] PAL
[18:29:14] [PASSED] NTSC
[18:29:14] [PASSED] Both, NTSC Default
[18:29:14] [PASSED] Both, PAL Default
[18:29:14] [PASSED] Both, NTSC Default, with PAL on command-line
[18:29:14] [PASSED] Both, PAL Default, with NTSC on command-line
[18:29:14] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[18:29:14] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[18:29:14] ================== drm_rect (9 subtests) ===================
[18:29:14] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[18:29:14] [PASSED] drm_test_rect_clip_scaled_not_clipped
[18:29:14] [PASSED] drm_test_rect_clip_scaled_clipped
[18:29:14] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[18:29:14] ================= drm_test_rect_intersect =================
[18:29:14] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[18:29:14] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[18:29:14] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[18:29:14] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[18:29:14] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[18:29:14] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[18:29:14] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[18:29:14] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[18:29:14] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[18:29:14] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[18:29:14] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[18:29:14] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[18:29:14] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[18:29:14] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[18:29:14] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[18:29:14] ============= [PASSED] drm_test_rect_intersect =============
[18:29:14] ================ drm_test_rect_calc_hscale ================
[18:29:14] [PASSED] normal use
[18:29:14] [PASSED] out of max range
[18:29:14] [PASSED] out of min range
[18:29:14] [PASSED] zero dst
[18:29:14] [PASSED] negative src
[18:29:14] [PASSED] negative dst
[18:29:14] ============ [PASSED] drm_test_rect_calc_hscale ============
[18:29:14] ================ drm_test_rect_calc_vscale ================
[18:29:14] [PASSED] normal use
[18:29:14] [PASSED] out of max range
[18:29:14] [PASSED] out of min range
[18:29:14] [PASSED] zero dst
[18:29:14] [PASSED] negative src
[18:29:14] [PASSED] negative dst
[18:29:14] ============ [PASSED] drm_test_rect_calc_vscale ============
[18:29:14] ================== drm_test_rect_rotate ===================
[18:29:14] [PASSED] reflect-x
[18:29:14] [PASSED] reflect-y
[18:29:14] [PASSED] rotate-0
[18:29:14] [PASSED] rotate-90
[18:29:14] [PASSED] rotate-180
[18:29:14] [PASSED] rotate-270
[18:29:14] ============== [PASSED] drm_test_rect_rotate ===============
[18:29:14] ================ drm_test_rect_rotate_inv =================
[18:29:14] [PASSED] reflect-x
[18:29:14] [PASSED] reflect-y
[18:29:14] [PASSED] rotate-0
[18:29:14] [PASSED] rotate-90
[18:29:14] [PASSED] rotate-180
[18:29:14] [PASSED] rotate-270
[18:29:14] ============ [PASSED] drm_test_rect_rotate_inv =============
[18:29:14] ==================== [PASSED] drm_rect =====================
[18:29:14] ============ drm_sysfb_modeset_test (1 subtest) ============
[18:29:14] ============ drm_test_sysfb_build_fourcc_list =============
[18:29:14] [PASSED] no native formats
[18:29:14] [PASSED] XRGB8888 as native format
[18:29:14] [PASSED] remove duplicates
[18:29:14] [PASSED] convert alpha formats
[18:29:14] [PASSED] random formats
[18:29:14] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[18:29:14] ============= [PASSED] drm_sysfb_modeset_test ==============
[18:29:14] ================== drm_fixp (2 subtests) ===================
[18:29:14] [PASSED] drm_test_int2fixp
[18:29:14] [PASSED] drm_test_sm2fixp
[18:29:14] ==================== [PASSED] drm_fixp =====================
[18:29:14] ============================================================
[18:29:14] Testing complete. Ran 671 tests: passed: 671
[18:29:14] Elapsed time: 27.135s total, 1.823s configuring, 24.897s building, 0.409s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[18:29:14] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:29:16] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:29:26] Starting KUnit Kernel (1/1)...
[18:29:26] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:29:26] ============= refcount_interrupt (4 subtests) ==============
[18:29:26] [PASSED] test_single_irq_change
[18:29:26] [PASSED] test_nested_irq_change
[18:29:26] [PASSED] test_multiple_irq_change
[18:29:26] [PASSED] test_irq_save
[18:29:26] =============== [PASSED] refcount_interrupt ================
[18:29:26] ================= ttm_device (5 subtests) ==================
[18:29:26] [PASSED] ttm_device_init_basic
[18:29:26] [PASSED] ttm_device_init_multiple
[18:29:26] [PASSED] ttm_device_fini_basic
[18:29:26] [PASSED] ttm_device_init_no_vma_man
[18:29:26] ================== ttm_device_init_pools ==================
[18:29:26] [PASSED] No DMA allocations, no DMA32 required
[18:29:26] [PASSED] DMA allocations, DMA32 required
[18:29:26] [PASSED] No DMA allocations, DMA32 required
[18:29:26] [PASSED] DMA allocations, no DMA32 required
[18:29:26] ============== [PASSED] ttm_device_init_pools ==============
[18:29:26] =================== [PASSED] ttm_device ====================
[18:29:26] ================== ttm_pool (8 subtests) ===================
[18:29:26] ================== ttm_pool_alloc_basic ===================
[18:29:26] [PASSED] One page
[18:29:26] [PASSED] More than one page
[18:29:26] [PASSED] Above the allocation limit
[18:29:26] [PASSED] One page, with coherent DMA mappings enabled
[18:29:26] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:29:26] ============== [PASSED] ttm_pool_alloc_basic ===============
[18:29:26] ============== ttm_pool_alloc_basic_dma_addr ==============
[18:29:26] [PASSED] One page
[18:29:26] [PASSED] More than one page
[18:29:26] [PASSED] Above the allocation limit
[18:29:26] [PASSED] One page, with coherent DMA mappings enabled
[18:29:26] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:29:26] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[18:29:26] [PASSED] ttm_pool_alloc_order_caching_match
[18:29:26] [PASSED] ttm_pool_alloc_caching_mismatch
[18:29:26] [PASSED] ttm_pool_alloc_order_mismatch
[18:29:26] [PASSED] ttm_pool_free_dma_alloc
[18:29:26] [PASSED] ttm_pool_free_no_dma_alloc
[18:29:26] [PASSED] ttm_pool_fini_basic
[18:29:26] ==================== [PASSED] ttm_pool =====================
[18:29:26] ================ ttm_resource (8 subtests) =================
[18:29:26] ================= ttm_resource_init_basic =================
[18:29:26] [PASSED] Init resource in TTM_PL_SYSTEM
[18:29:26] [PASSED] Init resource in TTM_PL_VRAM
[18:29:26] [PASSED] Init resource in a private placement
[18:29:26] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[18:29:26] ============= [PASSED] ttm_resource_init_basic =============
[18:29:26] [PASSED] ttm_resource_init_pinned
[18:29:26] [PASSED] ttm_resource_fini_basic
[18:29:26] [PASSED] ttm_resource_manager_init_basic
[18:29:26] [PASSED] ttm_resource_manager_usage_basic
[18:29:26] [PASSED] ttm_resource_manager_set_used_basic
[18:29:26] [PASSED] ttm_sys_man_alloc_basic
[18:29:26] [PASSED] ttm_sys_man_free_basic
[18:29:26] ================== [PASSED] ttm_resource ===================
[18:29:26] =================== ttm_tt (15 subtests) ===================
[18:29:26] ==================== ttm_tt_init_basic ====================
[18:29:26] [PASSED] Page-aligned size
[18:29:26] [PASSED] Extra pages requested
[18:29:26] ================ [PASSED] ttm_tt_init_basic ================
[18:29:26] [PASSED] ttm_tt_init_misaligned
[18:29:26] [PASSED] ttm_tt_fini_basic
[18:29:26] [PASSED] ttm_tt_fini_sg
[18:29:26] [PASSED] ttm_tt_fini_shmem
[18:29:26] [PASSED] ttm_tt_create_basic
[18:29:26] [PASSED] ttm_tt_create_invalid_bo_type
[18:29:26] [PASSED] ttm_tt_create_ttm_exists
[18:29:26] [PASSED] ttm_tt_create_failed
[18:29:26] [PASSED] ttm_tt_destroy_basic
[18:29:26] [PASSED] ttm_tt_populate_null_ttm
[18:29:26] [PASSED] ttm_tt_populate_populated_ttm
[18:29:26] [PASSED] ttm_tt_unpopulate_basic
[18:29:26] [PASSED] ttm_tt_unpopulate_empty_ttm
[18:29:26] [PASSED] ttm_tt_swapin_basic
[18:29:26] ===================== [PASSED] ttm_tt ======================
[18:29:26] =================== ttm_bo (14 subtests) ===================
[18:29:26] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[18:29:26] [PASSED] Cannot be interrupted and sleeps
[18:29:26] [PASSED] Cannot be interrupted, locks straight away
[18:29:26] [PASSED] Can be interrupted, sleeps
[18:29:26] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[18:29:26] [PASSED] ttm_bo_reserve_locked_no_sleep
[18:29:26] [PASSED] ttm_bo_reserve_no_wait_ticket
[18:29:26] [PASSED] ttm_bo_reserve_double_resv
[18:29:26] [PASSED] ttm_bo_reserve_interrupted
[18:29:26] [PASSED] ttm_bo_reserve_deadlock
[18:29:26] [PASSED] ttm_bo_unreserve_basic
[18:29:26] [PASSED] ttm_bo_unreserve_pinned
[18:29:26] [PASSED] ttm_bo_unreserve_bulk
[18:29:26] [PASSED] ttm_bo_fini_basic
[18:29:26] [PASSED] ttm_bo_fini_shared_resv
[18:29:26] [PASSED] ttm_bo_pin_basic
[18:29:26] [PASSED] ttm_bo_pin_unpin_resource
[18:29:26] [PASSED] ttm_bo_multiple_pin_one_unpin
[18:29:26] ===================== [PASSED] ttm_bo ======================
[18:29:26] ============== ttm_bo_validate (22 subtests) ===============
[18:29:26] ============== ttm_bo_init_reserved_sys_man ===============
[18:29:26] [PASSED] Buffer object for userspace
[18:29:26] [PASSED] Kernel buffer object
[18:29:26] [PASSED] Shared buffer object
[18:29:26] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[18:29:26] ============== ttm_bo_init_reserved_mock_man ==============
[18:29:26] [PASSED] Buffer object for userspace
[18:29:26] [PASSED] Kernel buffer object
[18:29:26] [PASSED] Shared buffer object
[18:29:26] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[18:29:26] [PASSED] ttm_bo_init_reserved_resv
[18:29:26] ================== ttm_bo_validate_basic ==================
[18:29:26] [PASSED] Buffer object for userspace
[18:29:26] [PASSED] Kernel buffer object
[18:29:26] [PASSED] Shared buffer object
[18:29:26] ============== [PASSED] ttm_bo_validate_basic ==============
[18:29:26] [PASSED] ttm_bo_validate_invalid_placement
[18:29:26] ============= ttm_bo_validate_same_placement ==============
[18:29:26] [PASSED] System manager
[18:29:26] [PASSED] VRAM manager
[18:29:26] ========= [PASSED] ttm_bo_validate_same_placement ==========
[18:29:26] [PASSED] ttm_bo_validate_failed_alloc
[18:29:26] [PASSED] ttm_bo_validate_pinned
[18:29:26] [PASSED] ttm_bo_validate_busy_placement
[18:29:26] ================ ttm_bo_validate_multihop =================
[18:29:26] [PASSED] Buffer object for userspace
[18:29:26] [PASSED] Kernel buffer object
[18:29:26] [PASSED] Shared buffer object
[18:29:26] ============ [PASSED] ttm_bo_validate_multihop =============
[18:29:26] ========== ttm_bo_validate_no_placement_signaled ==========
[18:29:26] [PASSED] Buffer object in system domain, no page vector
[18:29:26] [PASSED] Buffer object in system domain with an existing page vector
[18:29:26] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[18:29:26] ======== ttm_bo_validate_no_placement_not_signaled ========
[18:29:26] [PASSED] Buffer object for userspace
[18:29:26] [PASSED] Kernel buffer object
[18:29:26] [PASSED] Shared buffer object
[18:29:26] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[18:29:26] [PASSED] ttm_bo_validate_move_fence_signaled
[18:29:26] ========= ttm_bo_validate_move_fence_not_signaled =========
[18:29:26] [PASSED] Waits for GPU
[18:29:26] [PASSED] Tries to lock straight away
[18:29:26] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[18:29:26] [PASSED] ttm_bo_validate_swapout
[18:29:26] [PASSED] ttm_bo_validate_happy_evict
[18:29:26] [PASSED] ttm_bo_validate_all_pinned_evict
[18:29:26] [PASSED] ttm_bo_validate_allowed_only_evict
[18:29:26] [PASSED] ttm_bo_validate_deleted_evict
[18:29:26] [PASSED] ttm_bo_validate_busy_domain_evict
[18:29:26] [PASSED] ttm_bo_validate_evict_gutting
[18:29:26] [PASSED] ttm_bo_validate_recrusive_evict
[18:29:26] ================= [PASSED] ttm_bo_validate =================
[18:29:26] ============================================================
[18:29:26] Testing complete. Ran 106 tests: passed: 106
[18:29:26] Elapsed time: 12.081s total, 1.810s configuring, 10.056s building, 0.177s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[18:29:26] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:29:28] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:29:37] Starting KUnit Kernel (1/1)...
[18:29:37] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:29:37] ============= refcount_interrupt (4 subtests) ==============
[18:29:37] [PASSED] test_single_irq_change
[18:29:37] [PASSED] test_nested_irq_change
[18:29:37] [PASSED] test_multiple_irq_change
[18:29:37] [PASSED] test_irq_save
[18:29:37] =============== [PASSED] refcount_interrupt ================
[18:29:37] =============== dma-buf-fence (12 subtests) ================
[18:29:37] [PASSED] test_sanitycheck
[18:29:37] [PASSED] test_signaling
[18:29:37] [PASSED] test_add_callback
[18:29:37] [PASSED] test_late_add_callback
[18:29:37] [PASSED] test_rm_callback
[18:29:37] [PASSED] test_late_rm_callback
[18:29:37] [PASSED] test_status
[18:29:37] [PASSED] test_error
[18:29:37] [PASSED] test_wait
[18:29:37] [PASSED] test_wait_timeout
[18:29:37] [PASSED] test_stub
[18:29:37] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[18:29:37] ================== [PASSED] dma-buf-fence ==================
[18:29:37] ============ dma-buf-fence-chain (11 subtests) =============
[18:29:37] [PASSED] test_sanitycheck
[18:29:37] [PASSED] test_find_seqno
[18:29:37] [PASSED] test_find_signaled
[18:29:37] [PASSED] test_find_out_of_order
[18:29:42] [PASSED] test_find_gap
[18:29:42] [PASSED] test_find_race
[18:29:42] [PASSED] test_signal_forward
[18:29:42] [PASSED] test_signal_backward
[18:29:42] [PASSED] test_wait_forward
[18:29:42] [PASSED] test_wait_backward
[18:29:42] [PASSED] test_wait_random
[18:29:42] =============== [PASSED] dma-buf-fence-chain ===============
[18:29:42] ============ dma-buf-fence-unwrap (10 subtests) ============
[18:29:42] [PASSED] test_sanitycheck
[18:29:42] [PASSED] test_unwrap_array
[18:29:42] [PASSED] test_unwrap_chain
[18:29:42] [PASSED] test_unwrap_chain_array
[18:29:42] [PASSED] test_unwrap_merge
[18:29:42] [PASSED] test_unwrap_merge_duplicate
[18:29:42] [PASSED] test_unwrap_merge_seqno
[18:29:42] [PASSED] test_unwrap_merge_order
[18:29:42] [PASSED] test_unwrap_merge_complex
[18:29:42] [PASSED] test_unwrap_merge_complex_seqno
[18:29:42] ============== [PASSED] dma-buf-fence-unwrap ===============
[18:29:42] ================ dma-buf-resv (5 subtests) =================
[18:29:42] [PASSED] test_sanitycheck
[18:29:42] ===================== test_signaling ======================
[18:29:42] [PASSED] kernel
[18:29:42] [PASSED] write
[18:29:42] [PASSED] read
[18:29:42] [PASSED] bookkeep
[18:29:42] ================= [PASSED] test_signaling ==================
[18:29:42] ====================== test_for_each ======================
[18:29:42] [PASSED] kernel
[18:29:42] [PASSED] write
[18:29:42] [PASSED] read
[18:29:42] [PASSED] bookkeep
[18:29:42] ================== [PASSED] test_for_each ==================
[18:29:42] ================= test_for_each_unlocked ==================
[18:29:42] [PASSED] kernel
[18:29:42] [PASSED] write
[18:29:42] [PASSED] read
[18:29:42] [PASSED] bookkeep
[18:29:42] ============= [PASSED] test_for_each_unlocked ==============
[18:29:42] ===================== test_get_fences =====================
[18:29:42] [PASSED] kernel
[18:29:42] [PASSED] write
[18:29:42] [PASSED] read
[18:29:42] [PASSED] bookkeep
[18:29:42] ================= [PASSED] test_get_fences =================
[18:29:42] ================== [PASSED] dma-buf-resv ===================
[18:29:42] ============================================================
[18:29:42] Testing complete. Ran 54 tests: passed: 53, skipped: 1
[18:29:42] Elapsed time: 15.839s total, 1.796s configuring, 8.672s building, 5.354s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 14+ messages in thread* ✗ Xe.CI.BAT: failure for drm/xe: fix GuC TLB invalidation ack stalls on ARL (Wa_22016122933) (rev4)
2026-09-21 18:21 [PATCH v5 0/3] drm/xe: fix GuC TLB invalidation ack stalls on ARL (Wa_22016122933) Tales A. Mendonça
` (4 preceding siblings ...)
2026-09-21 18:29 ` ✓ CI.KUnit: success " Patchwork
@ 2026-09-21 19:28 ` Patchwork
2026-09-22 4:38 ` ✗ Xe.CI.FULL: " Patchwork
6 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2026-09-21 19:28 UTC (permalink / raw)
To: Tales A. Mendonça; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 3281 bytes --]
== Series Details ==
Series: drm/xe: fix GuC TLB invalidation ack stalls on ARL (Wa_22016122933) (rev4)
URL : https://patchwork.freedesktop.org/series/172110/
State : failure
== Summary ==
CI Bug Log - changes from xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c_BAT -> xe-pw-172110v4_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-172110v4_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-172110v4_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (15 -> 15)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-172110v4_BAT:
### IGT changes ###
#### Possible regressions ####
* igt@xe_exec_system_allocator@eu-fault-2m-range-device-host:
- bat-bmg-1: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/bat-bmg-1/igt@xe_exec_system_allocator@eu-fault-2m-range-device-host.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/bat-bmg-1/igt@xe_exec_system_allocator@eu-fault-2m-range-device-host.html
Known issues
------------
Here are the changes found in xe-pw-172110v4_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_waitfence@engine:
- bat-wcl-1: [PASS][3] -> [FAIL][4] ([Intel XE#9103])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/bat-wcl-1/igt@xe_waitfence@engine.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/bat-wcl-1/igt@xe_waitfence@engine.html
#### Possible fixes ####
* igt@xe_exec_system_allocator@fault:
- bat-bmg-1: [DMESG-WARN][5] -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/bat-bmg-1/igt@xe_exec_system_allocator@fault.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/bat-bmg-1/igt@xe_exec_system_allocator@fault.html
* igt@xe_exec_system_allocator@many-execqueues-malloc:
- bat-bmg-vm: [DMESG-WARN][7] -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/bat-bmg-vm/igt@xe_exec_system_allocator@many-execqueues-malloc.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/bat-bmg-vm/igt@xe_exec_system_allocator@many-execqueues-malloc.html
[Intel XE#9103]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9103
Build changes
-------------
* Linux: xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c -> xe-pw-172110v4
IGT_9104: a89d58dad0dd62228269a6049b39fc39ae6cf698 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c: 09eeb54bfd2f75118a26ff0226867b0850cd727c
xe-pw-172110v4: 172110v4
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/index.html
[-- Attachment #2: Type: text/html, Size: 3957 bytes --]
^ permalink raw reply [flat|nested] 14+ messages in thread* ✗ Xe.CI.FULL: failure for drm/xe: fix GuC TLB invalidation ack stalls on ARL (Wa_22016122933) (rev4)
2026-09-21 18:21 [PATCH v5 0/3] drm/xe: fix GuC TLB invalidation ack stalls on ARL (Wa_22016122933) Tales A. Mendonça
` (5 preceding siblings ...)
2026-09-21 19:28 ` ✗ Xe.CI.BAT: failure " Patchwork
@ 2026-09-22 4:38 ` Patchwork
6 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2026-09-22 4:38 UTC (permalink / raw)
To: Tales A. Mendonça; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 53669 bytes --]
== Series Details ==
Series: drm/xe: fix GuC TLB invalidation ack stalls on ARL (Wa_22016122933) (rev4)
URL : https://patchwork.freedesktop.org/series/172110/
State : failure
== Summary ==
CI Bug Log - changes from xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c_FULL -> xe-pw-172110v4_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-172110v4_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-172110v4_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (3 -> 3)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-172110v4_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0:
- shard-bmg: [PASS][1] -> [FAIL][2] +1 other test fail
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-8/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@xe_compute_preempt@compute-preempt-many-vram:
- shard-bmg: [PASS][3] -> [DMESG-FAIL][4] +1 other test dmesg-fail
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@xe_compute_preempt@compute-preempt-many-vram.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@xe_compute_preempt@compute-preempt-many-vram.html
* igt@xe_exec_system_allocator@many-large-execqueues-malloc-mlock:
- shard-bmg: [PASS][5] -> [DMESG-WARN][6] +40 other tests dmesg-warn
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-10/igt@xe_exec_system_allocator@many-large-execqueues-malloc-mlock.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@xe_exec_system_allocator@many-large-execqueues-malloc-mlock.html
* igt@xe_exec_system_allocator@process-many-execqueues-mmap-remap-ro-eocheck:
- shard-bmg: NOTRUN -> [DMESG-WARN][7] +16 other tests dmesg-warn
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-4/igt@xe_exec_system_allocator@process-many-execqueues-mmap-remap-ro-eocheck.html
#### Warnings ####
* igt@kms_vrr@max-min:
- shard-ptl: [FAIL][8] ([Intel XE#4227]) -> [DMESG-FAIL][9] +1 other test dmesg-fail
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-ptl-6/igt@kms_vrr@max-min.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-ptl-6/igt@kms_vrr@max-min.html
Known issues
------------
Here are the changes found in xe-pw-172110v4_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_hotunplug@hotreplug-lateclose-with-load:
- shard-bmg: [PASS][10] -> [ABORT][11] ([Intel XE#8007])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-8/igt@core_hotunplug@hotreplug-lateclose-with-load.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-9/igt@core_hotunplug@hotreplug-lateclose-with-load.html
* igt@core_hotunplug@hotunbind-rebind-with-load:
- shard-bmg: [PASS][12] -> [SKIP][13] ([Intel XE#8749]) +1 other test skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@core_hotunplug@hotunbind-rebind-with-load.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@core_hotunplug@hotunbind-rebind-with-load.html
* igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-edp-1:
- shard-ptl: [PASS][14] -> [FAIL][15] ([Intel XE#6078]) +1 other test fail
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-ptl-2/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-edp-1.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-ptl-7/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-edp-1.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#2327])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-1/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-16bpp-rotate-180:
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#1124]) +3 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-4/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#607] / [Intel XE#7361])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-4/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-ptl: NOTRUN -> [SKIP][19] ([Intel XE#5808])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-ptl-6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_bw@connected-linear-tiling-3-displays-target-2560x1440p:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#7679])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-1/igt@kms_bw@connected-linear-tiling-3-displays-target-2560x1440p.html
* igt@kms_bw@linear-tiling-1-displays-target-1920x1080p:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#367])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-4/igt@kms_bw@linear-tiling-1-displays-target-1920x1080p.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs:
- shard-ptl: NOTRUN -> [SKIP][22] ([Intel XE#5822])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-ptl-6/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#2887]) +7 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-4/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt709-lim:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#7358])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-1/igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt709-lim.html
* igt@kms_chamelium_frames@hdmi-crc-multiple:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#2252])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-8/igt@kms_chamelium_frames@hdmi-crc-multiple.html
* igt@kms_chamelium_hpd@dp-hpd-after-hibernate:
- shard-ptl: NOTRUN -> [SKIP][26] ([Intel XE#2252])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-ptl-6/igt@kms_chamelium_hpd@dp-hpd-after-hibernate.html
* igt@kms_color_pipeline@plane-fixed-matrix-yuv-rgb-bt2020-lut1d@pipe-d-plane-1:
- shard-bmg: NOTRUN -> [FAIL][27] ([Intel XE#9333]) +12 other tests fail
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-1/igt@kms_color_pipeline@plane-fixed-matrix-yuv-rgb-bt2020-lut1d@pipe-d-plane-1.html
* igt@kms_content_protection@legacy:
- shard-bmg: NOTRUN -> [FAIL][28] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-1/igt@kms_content_protection@legacy.html
* igt@kms_cursor_crc@cursor-sliding-128x128@pipe-a-dp-2:
- shard-bmg: [PASS][29] -> [DMESG-FAIL][30] ([Intel XE#7774]) +2 other tests dmesg-fail
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@kms_cursor_crc@cursor-sliding-128x128@pipe-a-dp-2.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_cursor_crc@cursor-sliding-128x128@pipe-a-dp-2.html
* igt@kms_cursor_crc@cursor-sliding-32x10:
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#2320]) +1 other test skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-8/igt@kms_cursor_crc@cursor-sliding-32x10.html
* igt@kms_cursor_crc@cursor-suspend:
- shard-bmg: [PASS][32] -> [INCOMPLETE][33] ([Intel XE#9210]) +1 other test incomplete
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-9/igt@kms_cursor_crc@cursor-suspend.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-6/igt@kms_cursor_crc@cursor-suspend.html
* igt@kms_dsc@dsc-with-formats:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#8265])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-4/igt@kms_dsc@dsc-with-formats.html
* igt@kms_fbcon_fbt@fbc:
- shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#4156] / [Intel XE#7425])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-4/igt@kms_fbcon_fbt@fbc.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-lnl: [PASS][36] -> [FAIL][37] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#7178] / [Intel XE#7349])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-9/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
* igt@kms_frontbuffer_tracking@fbc-2p-rte:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#4141]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-rte.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-indfb-msflip-blt:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#2311]) +10 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-pri-shrfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#2313]) +15 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@hdr-argb161616f-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#7061]) +4 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-1/igt@kms_frontbuffer_tracking@hdr-argb161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-argb161616f-draw-blt:
- shard-ptl: NOTRUN -> [SKIP][43] ([Intel XE#7061] / [Intel XE#7356])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-ptl-6/igt@kms_frontbuffer_tracking@psr-argb161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-draw-render:
- shard-ptl: NOTRUN -> [SKIP][44] ([Intel XE#5812]) +2 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-ptl-6/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_plane_cursor@overlay:
- shard-bmg: [PASS][45] -> [INCOMPLETE][46] ([Intel XE#7774] / [Intel XE#9133])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-10/igt@kms_plane_cursor@overlay.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_plane_cursor@overlay.html
* igt@kms_plane_cursor@overlay@pipe-b-hdmi-a-3-size-128:
- shard-bmg: [PASS][47] -> [INCOMPLETE][48] ([Intel XE#9133])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-10/igt@kms_plane_cursor@overlay@pipe-b-hdmi-a-3-size-128.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_plane_cursor@overlay@pipe-b-hdmi-a-3-size-128.html
* igt@kms_plane_lowres@tiling-yf:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#2393]) +1 other test skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-4/igt@kms_plane_lowres@tiling-yf.html
* igt@kms_pm_dc@dc5-psr:
- shard-lnl: [PASS][50] -> [FAIL][51] ([Intel XE#8399])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-lnl-8/igt@kms_pm_dc@dc5-psr.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-lnl-2/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_rpm@dpms-non-lpsp:
- shard-bmg: [PASS][52] -> [SKIP][53] ([Intel XE#8710])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_pm_rpm@dpms-non-lpsp.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_pm_rpm@dpms-non-lpsp.html
* igt@kms_properties@connector-properties-legacy:
- shard-bmg: [PASS][54] -> [SKIP][55] ([Intel XE#8589]) +230 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_properties@connector-properties-legacy.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_properties@connector-properties-legacy.html
* igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][56] ([Intel XE#1489])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-4/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area.html
* igt@kms_psr@fbc-psr-primary-blt:
- shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#2234] / [Intel XE#2850]) +3 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-4/igt@kms_psr@fbc-psr-primary-blt.html
* igt@kms_rotation_crc@sprite-rotation-90:
- shard-ptl: NOTRUN -> [SKIP][58] ([Intel XE#5821])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-ptl-6/igt@kms_rotation_crc@sprite-rotation-90.html
* igt@kms_vrr@flip-dpms@pipe-a-edp-1:
- shard-ptl: [PASS][59] -> [FAIL][60] ([Intel XE#4227] / [Intel XE#7397]) +1 other test fail
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-ptl-1/igt@kms_vrr@flip-dpms@pipe-a-edp-1.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-ptl-3/igt@kms_vrr@flip-dpms@pipe-a-edp-1.html
* igt@xe_exec_basic@multigpu-once-basic-defer-bind:
- shard-bmg: NOTRUN -> [SKIP][61] ([Intel XE#2322] / [Intel XE#7372])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-1/igt@xe_exec_basic@multigpu-once-basic-defer-bind.html
* igt@xe_exec_compute_mode@once-rebind:
- shard-bmg: [PASS][62] -> [DMESG-FAIL][63] ([Intel XE#6652])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-8/igt@xe_exec_compute_mode@once-rebind.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@xe_exec_compute_mode@once-rebind.html
* igt@xe_exec_fault_mode@twice-multi-queue-imm:
- shard-bmg: NOTRUN -> [SKIP][64] ([Intel XE#8374]) +4 other tests skip
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-1/igt@xe_exec_fault_mode@twice-multi-queue-imm.html
* igt@xe_exec_multi_queue@few-execs-preempt-mode-basic:
- shard-bmg: NOTRUN -> [SKIP][65] ([Intel XE#8364]) +7 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-4/igt@xe_exec_multi_queue@few-execs-preempt-mode-basic.html
* igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-dyn-priority:
- shard-ptl: NOTRUN -> [SKIP][66] ([Intel XE#8364])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-ptl-6/igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-dyn-priority.html
* igt@xe_exec_system_allocator@prefetch-sys-benchmark:
- shard-bmg: [PASS][67] -> [ABORT][68] ([Intel XE#6652])
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-8/igt@xe_exec_system_allocator@prefetch-sys-benchmark.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@xe_exec_system_allocator@prefetch-sys-benchmark.html
* igt@xe_exec_threads@threads-multi-queue-mixed-fd-userptr-rebind:
- shard-bmg: NOTRUN -> [SKIP][69] ([Intel XE#8378]) +2 other tests skip
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-8/igt@xe_exec_threads@threads-multi-queue-mixed-fd-userptr-rebind.html
* igt@xe_media_fill@media-fill:
- shard-bmg: NOTRUN -> [SKIP][70] ([Intel XE#2459] / [Intel XE#2596] / [Intel XE#7321] / [Intel XE#7453])
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-1/igt@xe_media_fill@media-fill.html
* igt@xe_pat@pat-index-xelpg:
- shard-bmg: NOTRUN -> [SKIP][71] ([Intel XE#2236] / [Intel XE#7590])
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-1/igt@xe_pat@pat-index-xelpg.html
* igt@xe_pm@s3-basic-exec:
- shard-ptl: NOTRUN -> [SKIP][72] ([Intel XE#6867])
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-ptl-6/igt@xe_pm@s3-basic-exec.html
* igt@xe_pm@s3-vm-bind-userptr:
- shard-bmg: [PASS][73] -> [INCOMPLETE][74] ([Intel XE#8175])
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-5/igt@xe_pm@s3-vm-bind-userptr.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-6/igt@xe_pm@s3-vm-bind-userptr.html
* igt@xe_pxp@pxp-termination-key-update-post-rpm:
- shard-bmg: NOTRUN -> [SKIP][75] ([Intel XE#4733] / [Intel XE#7417])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-1/igt@xe_pxp@pxp-termination-key-update-post-rpm.html
* igt@xe_query@multigpu-query-topology-l3-bank-mask:
- shard-bmg: NOTRUN -> [SKIP][76] ([Intel XE#944])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-4/igt@xe_query@multigpu-query-topology-l3-bank-mask.html
#### Possible fixes ####
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-lnl: [FAIL][77] ([Intel XE#1231]) -> [PASS][78]
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-lnl-3/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-lnl-3/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [INCOMPLETE][79] ([Intel XE#7084] / [Intel XE#8150]) -> [PASS][80] +1 other test pass
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-6/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-lnl: [FAIL][81] ([Intel XE#301]) -> [PASS][82]
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_pm_rpm@legacy-planes@plane-140:
- shard-bmg: [INCOMPLETE][83] ([Intel XE#6819] / [Intel XE#9241]) -> [PASS][84] +1 other test pass
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-3/igt@kms_pm_rpm@legacy-planes@plane-140.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-9/igt@kms_pm_rpm@legacy-planes@plane-140.html
* igt@kms_vrr@flip-basic-fastset:
- shard-ptl: [FAIL][85] ([Intel XE#4227] / [Intel XE#7397]) -> [PASS][86] +2 other tests pass
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-ptl-8/igt@kms_vrr@flip-basic-fastset.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-ptl-1/igt@kms_vrr@flip-basic-fastset.html
* igt@kms_vrr@flip-basic-fastset@pipe-a-edp-1:
- shard-ptl: [FAIL][87] ([Intel XE#6293] / [Intel XE#7397]) -> [PASS][88]
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-ptl-8/igt@kms_vrr@flip-basic-fastset@pipe-a-edp-1.html
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-ptl-1/igt@kms_vrr@flip-basic-fastset@pipe-a-edp-1.html
* igt@xe_exec_system_allocator@threads-many-large-mmap-remap-dontunmap-eocheck:
- shard-bmg: [DMESG-WARN][89] -> [PASS][90] +43 other tests pass
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-5/igt@xe_exec_system_allocator@threads-many-large-mmap-remap-dontunmap-eocheck.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-6/igt@xe_exec_system_allocator@threads-many-large-mmap-remap-dontunmap-eocheck.html
* igt@xe_exec_system_allocator@twice-large-new-bo-map:
- shard-bmg: [DMESG-WARN][91] ([Intel XE#9331]) -> [PASS][92]
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@xe_exec_system_allocator@twice-large-new-bo-map.html
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@xe_exec_system_allocator@twice-large-new-bo-map.html
* igt@xe_exec_threads@threads-hang-userptr-invalidate-race:
- shard-lnl: [FAIL][93] ([Intel XE#9096]) -> [PASS][94]
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-lnl-4/igt@xe_exec_threads@threads-hang-userptr-invalidate-race.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-lnl-7/igt@xe_exec_threads@threads-hang-userptr-invalidate-race.html
* igt@xe_pm@s3-vm-bind-prefetch:
- shard-bmg: [INCOMPLETE][95] ([Intel XE#8175]) -> [PASS][96]
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-6/igt@xe_pm@s3-vm-bind-prefetch.html
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-1/igt@xe_pm@s3-vm-bind-prefetch.html
#### Warnings ####
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-bmg: [SKIP][97] ([Intel XE#1124]) -> [SKIP][98] ([Intel XE#8589]) +2 other tests skip
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_bw@connected-linear-tiling-4-displays-target-1920x1080p:
- shard-bmg: [SKIP][99] ([Intel XE#7679]) -> [SKIP][100] ([Intel XE#8589])
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@kms_bw@connected-linear-tiling-4-displays-target-1920x1080p.html
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_bw@connected-linear-tiling-4-displays-target-1920x1080p.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc:
- shard-bmg: [SKIP][101] ([Intel XE#3432]) -> [SKIP][102] ([Intel XE#8589])
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc:
- shard-bmg: [SKIP][103] ([Intel XE#2887]) -> [SKIP][104] ([Intel XE#8589]) +6 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc.html
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_chamelium_color@ctm-blue-to-red:
- shard-bmg: [SKIP][105] ([Intel XE#2325] / [Intel XE#7358]) -> [SKIP][106] ([Intel XE#8589]) +1 other test skip
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_chamelium_color@ctm-blue-to-red.html
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_chamelium_color@ctm-blue-to-red.html
* igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601-lim:
- shard-bmg: [SKIP][107] ([Intel XE#7358]) -> [SKIP][108] ([Intel XE#8589])
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601-lim.html
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601-lim.html
* igt@kms_chamelium_frames@dp-crc-single:
- shard-bmg: [SKIP][109] ([Intel XE#2252]) -> [SKIP][110] ([Intel XE#8589]) +2 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@kms_chamelium_frames@dp-crc-single.html
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_chamelium_frames@dp-crc-single.html
* igt@kms_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601-lim:
- shard-bmg: [FAIL][111] ([Intel XE#9333]) -> [SKIP][112] ([Intel XE#8589])
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601-lim.html
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601-lim.html
* igt@kms_content_protection@atomic-dpms:
- shard-bmg: [FAIL][113] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) -> [SKIP][114] ([Intel XE#8589])
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@kms_content_protection@atomic-dpms.html
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@dp-mst-type-1-suspend-resume:
- shard-bmg: [SKIP][115] ([Intel XE#6974]) -> [SKIP][116] ([Intel XE#8589])
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@kms_content_protection@dp-mst-type-1-suspend-resume.html
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_content_protection@dp-mst-type-1-suspend-resume.html
* igt@kms_content_protection@type1:
- shard-bmg: [SKIP][117] ([Intel XE#7642]) -> [SKIP][118] ([Intel XE#8589])
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_content_protection@type1.html
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_content_protection@type1.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
- shard-bmg: [SKIP][119] ([Intel XE#2286] / [Intel XE#6035]) -> [SKIP][120] ([Intel XE#8589])
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
* igt@kms_dp_linktrain_fallback@uhbr-to-hbr-fallback:
- shard-bmg: [SKIP][121] ([Intel XE#9009]) -> [SKIP][122] ([Intel XE#8589])
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_dp_linktrain_fallback@uhbr-to-hbr-fallback.html
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_dp_linktrain_fallback@uhbr-to-hbr-fallback.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-bmg: [SKIP][123] ([Intel XE#8265]) -> [SKIP][124] ([Intel XE#8589]) +1 other test skip
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_dsc@dsc-with-bpc-formats.html
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_fbcon_fbt@psr:
- shard-bmg: [SKIP][125] ([Intel XE#8680]) -> [SKIP][126] ([Intel XE#8589])
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@kms_fbcon_fbt@psr.html
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_fbcon_fbt@psr.html
* igt@kms_feature_discovery@psr1:
- shard-bmg: [SKIP][127] ([Intel XE#2374] / [Intel XE#6127]) -> [SKIP][128] ([Intel XE#8589])
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_feature_discovery@psr1.html
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_feature_discovery@psr1.html
* igt@kms_feature_discovery@vrr:
- shard-bmg: [SKIP][129] ([Intel XE#8586]) -> [SKIP][130] ([Intel XE#8589])
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@kms_feature_discovery@vrr.html
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_feature_discovery@vrr.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling:
- shard-bmg: [SKIP][131] ([Intel XE#7178] / [Intel XE#7351]) -> [SKIP][132] ([Intel XE#8589])
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw:
- shard-bmg: [SKIP][133] ([Intel XE#2311]) -> [SKIP][134] ([Intel XE#8589]) +23 other tests skip
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt:
- shard-bmg: [SKIP][135] ([Intel XE#4141]) -> [SKIP][136] ([Intel XE#8589]) +3 other tests skip
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-render:
- shard-bmg: [SKIP][137] ([Intel XE#7061] / [Intel XE#7356]) -> [SKIP][138] ([Intel XE#8589]) +1 other test skip
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-render.html
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-abgr161616f-draw-mmap-wc:
- shard-bmg: [SKIP][139] ([Intel XE#7061]) -> [SKIP][140] ([Intel XE#8589]) +2 other tests skip
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrshdr-abgr161616f-draw-mmap-wc.html
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrshdr-abgr161616f-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
- shard-bmg: [SKIP][141] ([Intel XE#2313]) -> [SKIP][142] ([Intel XE#8589]) +22 other tests skip
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_joiner@basic-big-joiner:
- shard-bmg: [SKIP][143] ([Intel XE#6901]) -> [SKIP][144] ([Intel XE#8589])
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@kms_joiner@basic-big-joiner.html
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_joiner@basic-big-joiner.html
* igt@kms_joiner@basic-force-ultra-joiner:
- shard-bmg: [SKIP][145] ([Intel XE#6911] / [Intel XE#7466]) -> [SKIP][146] ([Intel XE#8589])
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_joiner@basic-force-ultra-joiner.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_joiner@basic-force-ultra-joiner.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-bmg: [SKIP][147] ([Intel XE#7591]) -> [SKIP][148] ([Intel XE#8589])
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_plane@pixel-format-yf-tiled-modifier:
- shard-bmg: [SKIP][149] ([Intel XE#7283]) -> [SKIP][150] ([Intel XE#8589]) +1 other test skip
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_plane@pixel-format-yf-tiled-modifier.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_plane@pixel-format-yf-tiled-modifier.html
* igt@kms_pm_dc@dc3co-framedrop-check:
- shard-bmg: [SKIP][151] ([Intel XE#8395] / [Intel XE#8396]) -> [SKIP][152] ([Intel XE#8589])
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@kms_pm_dc@dc3co-framedrop-check.html
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_pm_dc@dc3co-framedrop-check.html
* igt@kms_pm_rpm@package-g7:
- shard-bmg: [SKIP][153] ([Intel XE#6814] / [Intel XE#7428]) -> [SKIP][154] ([Intel XE#8710])
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_pm_rpm@package-g7.html
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_pm_rpm@package-g7.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf:
- shard-bmg: [SKIP][155] ([Intel XE#1489]) -> [SKIP][156] ([Intel XE#8589]) +3 other tests skip
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf.html
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr@psr-cursor-plane-onoff:
- shard-bmg: [SKIP][157] ([Intel XE#2234] / [Intel XE#2850]) -> [SKIP][158] ([Intel XE#8589]) +5 other tests skip
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@kms_psr@psr-cursor-plane-onoff.html
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_psr@psr-cursor-plane-onoff.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
- shard-bmg: [SKIP][159] ([Intel XE#3904] / [Intel XE#7342]) -> [SKIP][160] ([Intel XE#8589]) +1 other test skip
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
* igt@kms_scaling_modes@scaling-mode-full-aspect:
- shard-bmg: [SKIP][161] ([Intel XE#2413]) -> [SKIP][162] ([Intel XE#8589])
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@kms_scaling_modes@scaling-mode-full-aspect.html
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@kms_scaling_modes@scaling-mode-full-aspect.html
* igt@kms_sharpness_filter@filter-tap:
- shard-bmg: [SKIP][163] ([Intel XE#6503]) -> [SKIP][164] ([Intel XE#8589]) +1 other test skip
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@kms_sharpness_filter@filter-tap.html
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_sharpness_filter@filter-tap.html
* igt@kms_vrr@seamless-rr-switch-virtual:
- shard-bmg: [SKIP][165] ([Intel XE#1499] / [Intel XE#9271]) -> [SKIP][166] ([Intel XE#8589]) +1 other test skip
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@kms_vrr@seamless-rr-switch-virtual.html
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@kms_vrr@seamless-rr-switch-virtual.html
* igt@xe_evict@evict-threads-small-multi-queue:
- shard-bmg: [SKIP][167] ([Intel XE#8370]) -> [SKIP][168] ([Intel XE#8589])
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@xe_evict@evict-threads-small-multi-queue.html
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@xe_evict@evict-threads-small-multi-queue.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr:
- shard-bmg: [SKIP][169] ([Intel XE#2322] / [Intel XE#7372]) -> [SKIP][170] ([Intel XE#8589]) +2 other tests skip
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr.html
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr.html
* igt@xe_exec_fault_mode@many-execqueues-multi-queue-rebind-prefetch:
- shard-bmg: [SKIP][171] ([Intel XE#8374]) -> [SKIP][172] ([Intel XE#8589]) +4 other tests skip
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@xe_exec_fault_mode@many-execqueues-multi-queue-rebind-prefetch.html
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@xe_exec_fault_mode@many-execqueues-multi-queue-rebind-prefetch.html
* igt@xe_exec_mix_modes@exec-multi-queue-spinner-interrupted-lr:
- shard-bmg: [SKIP][173] ([Intel XE#9003]) -> [SKIP][174] ([Intel XE#8589])
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@xe_exec_mix_modes@exec-multi-queue-spinner-interrupted-lr.html
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@xe_exec_mix_modes@exec-multi-queue-spinner-interrupted-lr.html
* igt@xe_exec_multi_queue@max-queues-userptr-invalidate:
- shard-bmg: [SKIP][175] ([Intel XE#8364]) -> [SKIP][176] ([Intel XE#8589]) +11 other tests skip
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@xe_exec_multi_queue@max-queues-userptr-invalidate.html
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@xe_exec_multi_queue@max-queues-userptr-invalidate.html
* igt@xe_exec_reset@gt-reset-fault-injection:
- shard-bmg: [DMESG-WARN][177] ([Intel XE#9130]) -> [ABORT][178] ([Intel XE#8007] / [Intel XE#9145])
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-2/igt@xe_exec_reset@gt-reset-fault-injection.html
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-2/igt@xe_exec_reset@gt-reset-fault-injection.html
* igt@xe_exec_system_allocator@process-many-new-nomemset:
- shard-bmg: [DMESG-WARN][179] -> [SKIP][180] ([Intel XE#8589]) +23 other tests skip
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@xe_exec_system_allocator@process-many-new-nomemset.html
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@xe_exec_system_allocator@process-many-new-nomemset.html
* igt@xe_exec_system_allocator@twice-mmap-huge-nomemset:
- shard-bmg: [DMESG-WARN][181] ([Intel XE#9331]) -> [SKIP][182] ([Intel XE#8589])
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@xe_exec_system_allocator@twice-mmap-huge-nomemset.html
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@xe_exec_system_allocator@twice-mmap-huge-nomemset.html
* igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr:
- shard-bmg: [SKIP][183] ([Intel XE#8378]) -> [SKIP][184] ([Intel XE#8589]) +5 other tests skip
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr.html
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr.html
* igt@xe_page_reclaim@invalid-1g:
- shard-bmg: [SKIP][185] ([Intel XE#7793]) -> [SKIP][186] ([Intel XE#8589])
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@xe_page_reclaim@invalid-1g.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@xe_page_reclaim@invalid-1g.html
* igt@xe_pxp@pxp-stale-bo-exec-post-rpm:
- shard-bmg: [SKIP][187] ([Intel XE#4733] / [Intel XE#7417]) -> [SKIP][188] ([Intel XE#8589])
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-1/igt@xe_pxp@pxp-stale-bo-exec-post-rpm.html
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-3/igt@xe_pxp@pxp-stale-bo-exec-post-rpm.html
* igt@xe_query@multigpu-query-gt-list:
- shard-bmg: [SKIP][189] ([Intel XE#944]) -> [SKIP][190] ([Intel XE#8589])
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c/shard-bmg-4/igt@xe_query@multigpu-query-gt-list.html
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/shard-bmg-5/igt@xe_query@multigpu-query-gt-list.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1231]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1231
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
[Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
[Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
[Intel XE#2459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2459
[Intel XE#2596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2596
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
[Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#5808]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5808
[Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
[Intel XE#5821]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5821
[Intel XE#5822]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5822
[Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
[Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
[Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
[Intel XE#6127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6127
[Intel XE#6293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6293
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#6652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6652
[Intel XE#6814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6814
[Intel XE#6819]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6819
[Intel XE#6867]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6867
[Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
[Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
[Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7321
[Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
[Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7361
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
[Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
[Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
[Intel XE#7425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7425
[Intel XE#7428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7428
[Intel XE#7453]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7453
[Intel XE#7466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7466
[Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
[Intel XE#7591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7591
[Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
[Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
[Intel XE#7774]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7774
[Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
[Intel XE#8175]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8175
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370
[Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
[Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
[Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
[Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
[Intel XE#8399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8399
[Intel XE#8586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8586
[Intel XE#8589]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8589
[Intel XE#8680]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8680
[Intel XE#8710]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8710
[Intel XE#8749]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8749
[Intel XE#9003]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9003
[Intel XE#9009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9009
[Intel XE#9096]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9096
[Intel XE#9130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9130
[Intel XE#9133]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9133
[Intel XE#9145]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9145
[Intel XE#9210]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9210
[Intel XE#9241]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9241
[Intel XE#9271]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9271
[Intel XE#9331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9331
[Intel XE#9333]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9333
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c -> xe-pw-172110v4
IGT_9104: a89d58dad0dd62228269a6049b39fc39ae6cf698 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5798-09eeb54bfd2f75118a26ff0226867b0850cd727c: 09eeb54bfd2f75118a26ff0226867b0850cd727c
xe-pw-172110v4: 172110v4
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172110v4/index.html
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