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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org,
	Xizhe Tang <xizheTang2005@163.com>,
	Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Subject: [PATCH 3/3] drm/i915/vrr: s/intel_vrr_possible()/has_vrr_tg_timings()/
Date: Wed, 23 Sep 2026 19:43:21 +0300	[thread overview]
Message-ID: <20260923164321.9230-3-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20260923164321.9230-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Several places in the VRR code are using intel_vrr_possible() as
an indication whether whether we should program the VRR timing
generator registers or not. While the implementation is correct
the function name is very confusing. Rename the function to
has_vrr_tg_timings(), and make it static as it's no longer needed
outside intel_vrr.c.

Cc: Xizhe Tang <xizheTang2005@163.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 12 ++++++------
 drivers/gpu/drm/i915/display/intel_vrr.h |  1 -
 2 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index bb2bfa8e76e2..2141462fcbcb 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -98,7 +98,7 @@ bool intel_vrr_is_in_range(struct intel_connector *connector, int vrefresh)
 		vrefresh <= info->monitor_range.max_vfreq;
 }
 
-bool intel_vrr_possible(const struct intel_crtc_state *crtc_state)
+static bool has_vrr_tg_timings(const struct intel_crtc_state *crtc_state)
 {
 	return crtc_state->vrr.flipline;
 }
@@ -383,7 +383,7 @@ void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state *crtc_state,
 {
 	struct intel_display *display = to_intel_display(crtc_state);
 
-	if (!intel_vrr_possible(crtc_state))
+	if (!has_vrr_tg_timings(crtc_state))
 		return;
 
 	intel_vrr_set_cmrr_timings(crtc_state, transcoder);
@@ -623,7 +623,7 @@ void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
 	struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode;
 	int guardband;
 
-	if (!intel_vrr_possible(crtc_state))
+	if (!has_vrr_tg_timings(crtc_state))
 		return;
 
 	if (intel_vrr_use_optimized_guardband(crtc_state))
@@ -695,7 +695,7 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state)
 		intel_de_rmw(display, CHICKEN_TRANS(display, cpu_transcoder),
 			     0, PIPE_VBLANK_WITH_DELAY);
 
-	if (!intel_vrr_possible(crtc_state)) {
+	if (!has_vrr_tg_timings(crtc_state)) {
 		intel_de_write(display,
 			       TRANS_VRR_CTL(display, cpu_transcoder), 0);
 		return;
@@ -1040,7 +1040,7 @@ void intel_vrr_transcoder_enable(const struct intel_crtc_state *crtc_state)
 
 	intel_vrr_set_transcoder_timings(crtc_state);
 
-	if (!intel_vrr_possible(crtc_state))
+	if (!has_vrr_tg_timings(crtc_state))
 		return;
 
 	if (intel_vrr_always_use_vrr_tg(display))
@@ -1051,7 +1051,7 @@ void intel_vrr_transcoder_disable(const struct intel_crtc_state *old_crtc_state)
 {
 	struct intel_display *display = to_intel_display(old_crtc_state);
 
-	if (!intel_vrr_possible(old_crtc_state))
+	if (!has_vrr_tg_timings(old_crtc_state))
 		return;
 
 	if (intel_vrr_always_use_vrr_tg(display))
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
index f04e81593d99..b56aacb031fb 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr.h
@@ -19,7 +19,6 @@ enum transcoder;
 
 bool intel_vrr_is_capable(struct intel_connector *connector);
 bool intel_vrr_is_in_range(struct intel_connector *connector, int vrefresh);
-bool intel_vrr_possible(const struct intel_crtc_state *crtc_state);
 void intel_vrr_check_modeset(struct intel_atomic_state *state);
 void intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
 			      struct drm_connector_state *conn_state);
-- 
2.54.0


  parent reply	other threads:[~2026-09-23 16:43 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-23 16:43 [PATCH 1/3] drm/i915/vrr: Use vrr.in_range to determine if we need the AS SDP Ville Syrjala
2026-09-23 16:43 ` [PATCH 2/3] drm/i915/vrr: Introduce intel_vrr_can_use_vrr_tg() Ville Syrjala
2026-09-23 16:43 ` Ville Syrjala [this message]
2026-09-23 16:50 ` ✗ CI.checkpatch: warning for series starting with [1/3] drm/i915/vrr: Use vrr.in_range to determine if we need the AS SDP Patchwork
2026-09-23 16:52 ` ✓ CI.KUnit: success " Patchwork
2026-09-23 18:46 ` ✓ Xe.CI.BAT: " Patchwork
2026-09-24  6:35 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-09-25 19:23 ` [PATCH 1/3] " xizheTang2005
2026-09-28  8:46   ` Jani Nikula
2026-09-28 18:50     ` xizheTang2005

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