From: sashiko-bot@kernel.org
To: "Karthik Poosa" <karthik.poosa@intel.com>
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [PATCH i-g-t v4 01/13] drm/xe/hwmon: Handle pcode read failures of xe_hwmon_pcode_rmw_power_limit
Date: Thu, 24 Sep 2026 11:03:39 +0000 [thread overview]
Message-ID: <20260924110340.47A371F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260924105000.2627929-2-karthik.poosa@intel.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] sysfs: returning 0 on error in xe_hwmon_power_max_interval_store() causes infinite userspace loops
--
commit 719c9331149239878e8f9d385268d89b8d17624f
Author: Karthik Poosa <karthik.poosa@intel.com>
drm/xe/hwmon: Handle pcode read failures of xe_hwmon_pcode_rmw_power_limit
This patch handles pcode read failures in xe_hwmon_pcode_rmw_power_limit() by returning early and checking the error in callers. This prevents power limit settings from being updated with invalid data when the hardware read fails.
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 5edeac961ec33..514573f172ebb 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
[ ... ]
> @@ -679,11 +683,13 @@ xe_hwmon_power_max_interval_store(struct device *dev, struct device_attribute *a
>
> mutex_lock(&hwmon->hwmon_lock);
>
> - if (hwmon->xe->info.has_mbx_power_limits)
> - xe_hwmon_pcode_rmw_power_limit(hwmon, power_attr, channel, PWR_LIM_TIME, rxy);
> - else
> + if (hwmon->xe->info.has_mbx_power_limits) {
> + if (xe_hwmon_pcode_rmw_power_limit(hwmon, power_attr, channel, PWR_LIM_TIME, rxy))
> + count = 0;
[Severity: Medium]
Could setting count to 0 here instead of returning a negative error code
cause an infinite loop in userspace tools?
Returning 0 from a sysfs store callback like
xe_hwmon_power_max_interval_store() tells the VFS that 0 bytes were written.
Many userspace writers, including bash loops and standard library buffered
writers, will interpret a 0-byte write as a signal to retry the write
indefinitely.
If the underlying pcode mailbox hardware operation fails, would it be better
to propagate the negative error code (such as the return value of
xe_hwmon_pcode_rmw_power_limit()) so the userspace write operation properly
fails?
> + } else {
> r = xe_mmio_rmw32(mmio, xe_hwmon_get_reg(hwmon, REG_PKG_RAPL_LIMIT, channel),
> PWR_LIM_TIME, rxy);
> + }
>
> mutex_unlock(&hwmon->hwmon_lock);
>
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260924105000.2627929-1-karthik.poosa@intel.com?part=1
next prev parent reply other threads:[~2026-09-24 11:03 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-24 10:49 [PATCH i-g-t v4 00/13] drm/xe/hwmon: Update hwmon thermal mailbox Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 01/13] drm/xe/hwmon: Handle pcode read failures of xe_hwmon_pcode_rmw_power_limit Karthik Poosa
2026-09-24 11:03 ` sashiko-bot [this message]
2026-09-24 10:49 ` [PATCH i-g-t v4 02/13] drm/xe/hwmon: Decode mailbox temperature as sign-magnitude Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 03/13] drm/xe/hwmon: Fix memory controller thermal data handling Karthik Poosa
2026-09-24 11:02 ` sashiko-bot
2026-09-24 10:49 ` [PATCH i-g-t v4 04/13] drm/xe/hwmon: Add helpers to validate thermal sensor readings Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 05/13] drm/xe/hwmon: Handle unavailable memory controller sensors Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 06/13] drm/xe/hwmon: Detect unavailable PCIe thermal sensors Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 07/13] drm/xe/hwmon: Consolidate temperature sensor availability checks Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 08/13] drm/xe/hwmon: Cache temperature availability to reduce probe time Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 09/13] drm/xe/hwmon: Add platform-aware VRAM thermal channel support Karthik Poosa
2026-09-24 11:21 ` sashiko-bot
2026-09-24 10:49 ` [PATCH i-g-t v4 10/13] drm/xe/hwmon: use CRI-specific package and VRAM temperature registers Karthik Poosa
2026-09-24 11:25 ` sashiko-bot
2026-09-24 10:49 ` [PATCH i-g-t v4 11/13] drm/xe/hwmon: Decode CRI temperature registers as IEEE-754 Karthik Poosa
2026-09-24 11:22 ` sashiko-bot
2026-09-24 10:49 ` [PATCH i-g-t v4 12/13] drm/xe/hwmon: Update memory controller temperature offset for CRI Karthik Poosa
2026-09-24 10:50 ` [PATCH i-g-t v4 13/13] drm/xe/hwmon: Update PCIE temperature sensor " Karthik Poosa
2026-09-24 11:00 ` ✓ CI.KUnit: success for drm/xe/hwmon: Update hwmon thermal mailbox Patchwork
2026-09-24 12:13 ` ✓ Xe.CI.BAT: " Patchwork
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