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From: sashiko-bot@kernel.org
To: "Karthik Poosa" <karthik.poosa@intel.com>
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [PATCH i-g-t v4 10/13] drm/xe/hwmon: use CRI-specific package and VRAM temperature registers
Date: Thu, 24 Sep 2026 11:25:11 +0000	[thread overview]
Message-ID: <20260924112511.B17E51F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260924105000.2627929-11-karthik.poosa@intel.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] xe_hwmon: VRAM temperature register offset collision on Crescent Island
--

commit fd97330baada16c38f4cebd065bec94e97f517b7
Author: Karthik Poosa <karthik.poosa@intel.com>

drm/xe/hwmon: use CRI-specific package and VRAM temperature registers

Crescent Island uses different MMIO offsets for package and VRAM temperature
than Battlemage. Add CRI-specific register definitions and select them in
xe_hwmon_get_reg() for REG_TEMP handling.

> diff --git a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
> index 11916b4f7cfc0..a6f13d7c39894 100644
> --- a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
[ ... ]
>  #define CRI_PACKAGE_ENERGY_STATUS		XE_REG(0x138120)
> -#define CRI_PLATFORM_ENERGY_STATUS		XE_REG(0x138458)
>  #define CRI_MSU_VRAM_ENABLE             XE_REG(0x138340)
> +#define CRI_PACKAGE_TEMPERATURE			XE_REG(0x138344)
> +#define CRI_VRAM_TEMPERATURE			XE_REG(0x138348)
> +#define CRI_PLATFORM_ENERGY_STATUS		XE_REG(0x138458)
>  
>  #endif /* _XE_PCODE_REGS_H_ */

> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 1b587bd9487e1..e1cff5700e7f9 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -293,7 +293,15 @@ static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg
>  
>  	switch (hwmon_reg) {
>  	case REG_TEMP:
> -		if (xe->info.platform == XE_BATTLEMAGE || xe->info.platform == XE_CRESCENTISLAND) {
> +		if (xe->info.platform == XE_CRESCENTISLAND) {
> +			if (channel == CHANNEL_PKG)
> +				return CRI_PACKAGE_TEMPERATURE;
> +			else if (channel == CHANNEL_VRAM)
> +				return CRI_VRAM_TEMPERATURE;
> +			else if (in_range(channel, CHANNEL_VRAM_N, hwmon->temp.vram_count) &&
> +				 xe_hwmon_vram_channel_enabled(hwmon, channel - CHANNEL_VRAM_N))
> +				return BMG_VRAM_TEMPERATURE_N(channel - CHANNEL_VRAM_N);

[Severity: High]
Will using the BMG_VRAM_TEMPERATURE_N() macro for Crescent Island cause
register offset collisions for higher VRAM channels?

The BMG_VRAM_TEMPERATURE_N(n) macro computes offsets as 0x138260 + (n * 4).
When n >= 56, the resulting offsets overlap with the newly added CRI
registers:

- n = 56 gives 0x138340 (collides with CRI_MSU_VRAM_ENABLE)
- n = 57 gives 0x138344 (collides with CRI_PACKAGE_TEMPERATURE)
- n = 58 gives 0x138348 (collides with CRI_VRAM_TEMPERATURE)

Since Crescent Island allows up to 80 VRAM channels, reading the sysfs
hwmon tempX_input attributes for channels 56 and above would return
data from these unrelated registers instead of VRAM temperature telemetry.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260924105000.2627929-1-karthik.poosa@intel.com?part=10

  reply	other threads:[~2026-09-24 11:25 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-24 10:49 [PATCH i-g-t v4 00/13] drm/xe/hwmon: Update hwmon thermal mailbox Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 01/13] drm/xe/hwmon: Handle pcode read failures of xe_hwmon_pcode_rmw_power_limit Karthik Poosa
2026-09-24 11:03   ` sashiko-bot
2026-09-24 10:49 ` [PATCH i-g-t v4 02/13] drm/xe/hwmon: Decode mailbox temperature as sign-magnitude Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 03/13] drm/xe/hwmon: Fix memory controller thermal data handling Karthik Poosa
2026-09-24 11:02   ` sashiko-bot
2026-09-24 10:49 ` [PATCH i-g-t v4 04/13] drm/xe/hwmon: Add helpers to validate thermal sensor readings Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 05/13] drm/xe/hwmon: Handle unavailable memory controller sensors Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 06/13] drm/xe/hwmon: Detect unavailable PCIe thermal sensors Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 07/13] drm/xe/hwmon: Consolidate temperature sensor availability checks Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 08/13] drm/xe/hwmon: Cache temperature availability to reduce probe time Karthik Poosa
2026-09-24 10:49 ` [PATCH i-g-t v4 09/13] drm/xe/hwmon: Add platform-aware VRAM thermal channel support Karthik Poosa
2026-09-24 11:21   ` sashiko-bot
2026-09-24 10:49 ` [PATCH i-g-t v4 10/13] drm/xe/hwmon: use CRI-specific package and VRAM temperature registers Karthik Poosa
2026-09-24 11:25   ` sashiko-bot [this message]
2026-09-24 10:49 ` [PATCH i-g-t v4 11/13] drm/xe/hwmon: Decode CRI temperature registers as IEEE-754 Karthik Poosa
2026-09-24 11:22   ` sashiko-bot
2026-09-24 10:49 ` [PATCH i-g-t v4 12/13] drm/xe/hwmon: Update memory controller temperature offset for CRI Karthik Poosa
2026-09-24 10:50 ` [PATCH i-g-t v4 13/13] drm/xe/hwmon: Update PCIE temperature sensor " Karthik Poosa
2026-09-24 11:00 ` ✓ CI.KUnit: success for drm/xe/hwmon: Update hwmon thermal mailbox Patchwork
2026-09-24 12:13 ` ✓ Xe.CI.BAT: " Patchwork

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