* [PATCH 01/15] drm/xe: Guard configfs attribute reads in getters
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
@ 2026-10-05 19:06 ` Stuart Summers
2026-10-05 19:06 ` [PATCH 02/15] drm/xe/configfs: Fix out-of-bounds read in parse_wa_bb_lines() Stuart Summers
` (17 subsequent siblings)
18 siblings, 0 replies; 21+ messages in thread
From: Stuart Summers @ 2026-10-05 19:06 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
gustavo.sousa, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
The configfs getters read dev->config members without holding dev->lock,
so a concurrent store can tear the value being returned. The store paths
and a few of the getters already take the lock; make it consistent by
wrapping every read of dev->config in the getters with a scoped_guard(),
covering the surrounding checks that consume those values as well.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: LLM
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/xe/xe_configfs.c | 32 +++++++++++++++++++++-----------
1 file changed, 21 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index ad4bfd3c0703..e1cf5af958bc 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -1282,7 +1282,8 @@ bool xe_configfs_get_survivability_mode(struct pci_dev *pdev)
if (!dev)
return device_defaults.survivability_mode;
- mode = dev->config.survivability_mode;
+ scoped_guard(mutex, &dev->lock)
+ mode = dev->config.survivability_mode;
config_group_put(&dev->group);
return mode;
@@ -1296,7 +1297,8 @@ static u64 get_gt_types_allowed(struct pci_dev *pdev)
if (!dev)
return device_defaults.gt_types_allowed;
- mask = dev->config.gt_types_allowed;
+ scoped_guard(mutex, &dev->lock)
+ mask = dev->config.gt_types_allowed;
config_group_put(&dev->group);
return mask;
@@ -1340,7 +1342,8 @@ u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev)
if (!dev)
return device_defaults.engines_allowed;
- engines_allowed = dev->config.engines_allowed;
+ scoped_guard(mutex, &dev->lock)
+ engines_allowed = dev->config.engines_allowed;
config_group_put(&dev->group);
return engines_allowed;
@@ -1360,7 +1363,8 @@ bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
if (!dev)
return false;
- ret = dev->config.enable_psmi;
+ scoped_guard(mutex, &dev->lock)
+ ret = dev->config.enable_psmi;
config_group_put(&dev->group);
return ret;
@@ -1381,7 +1385,8 @@ bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev)
if (!dev)
return true;
- ret = dev->config.enable_multi_queue;
+ scoped_guard(mutex, &dev->lock)
+ ret = dev->config.enable_multi_queue;
config_group_put(&dev->group);
return ret;
@@ -1421,7 +1426,8 @@ bool xe_configfs_get_disable_vram_page_offline(struct pci_dev *pdev)
if (!dev)
return device_defaults.disable_vram_page_offline;
- ret = dev->config.disable_vram_page_offline;
+ scoped_guard(mutex, &dev->lock)
+ ret = dev->config.disable_vram_page_offline;
config_group_put(&dev->group);
return ret;
@@ -1445,10 +1451,12 @@ u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
if (!dev)
return 0;
- if (cs)
- *cs = dev->config.ctx_restore_mid_bb[class].cs;
+ scoped_guard(mutex, &dev->lock) {
+ if (cs)
+ *cs = dev->config.ctx_restore_mid_bb[class].cs;
- len = dev->config.ctx_restore_mid_bb[class].len;
+ len = dev->config.ctx_restore_mid_bb[class].len;
+ }
config_group_put(&dev->group);
return len;
@@ -1472,8 +1480,10 @@ u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
if (!dev)
return 0;
- *cs = dev->config.ctx_restore_post_bb[class].cs;
- len = dev->config.ctx_restore_post_bb[class].len;
+ scoped_guard(mutex, &dev->lock) {
+ *cs = dev->config.ctx_restore_post_bb[class].cs;
+ len = dev->config.ctx_restore_post_bb[class].len;
+ }
config_group_put(&dev->group);
return len;
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 02/15] drm/xe/configfs: Fix out-of-bounds read in parse_wa_bb_lines()
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
2026-10-05 19:06 ` [PATCH 01/15] drm/xe: Guard configfs attribute reads in getters Stuart Summers
@ 2026-10-05 19:06 ` Stuart Summers
2026-10-05 19:06 ` [PATCH 03/15] drm/xe/configfs: Copy wa_bb out under the configfs lock Stuart Summers
` (16 subsequent siblings)
18 siblings, 0 replies; 21+ messages in thread
From: Stuart Summers @ 2026-10-05 19:06 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
gustavo.sousa, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
The outer loop advances the cursor unconditionally at the end of each
iteration. When the last token of a line is terminated by the NUL rather
than by whitespace, e.g. "echo -n 'rcs cmd 1'", the cursor is already on
the NUL and the increment steps past the end of the buffer, so the loop
condition reads out of bounds. The leading strspn(p, " \t\n") already
skips the line separators, and every iteration consumes at least the
engine class token, so dropping the increment keeps the loop making
progress.
Fixes: 39ac06f70062 ("drm/xe/configfs: Add post context restore bb")
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: LLM
---
drivers/gpu/drm/xe/xe_configfs.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index e1cf5af958bc..1c7a096aa046 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -820,7 +820,11 @@ static ssize_t parse_wa_bb_lines(const char *lines,
ssize_t dwords = 0, ret;
const char *p;
- for (p = lines; *p; p++) {
+ /*
+ * Each iteration consumes at least the engine class token if it doesn't
+ * error out, so the loop always makes progress without advancing @p.
+ */
+ for (p = lines; *p;) {
const struct engine_info *info = NULL;
u32 val, val2;
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 03/15] drm/xe/configfs: Copy wa_bb out under the configfs lock
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
2026-10-05 19:06 ` [PATCH 01/15] drm/xe: Guard configfs attribute reads in getters Stuart Summers
2026-10-05 19:06 ` [PATCH 02/15] drm/xe/configfs: Fix out-of-bounds read in parse_wa_bb_lines() Stuart Summers
@ 2026-10-05 19:06 ` Stuart Summers
2026-10-05 19:06 ` [PATCH 04/15] drm/xe: Invert vram_page_offline configfs attribute Stuart Summers
` (15 subsequent siblings)
18 siblings, 0 replies; 21+ messages in thread
From: Stuart Summers @ 2026-10-05 19:06 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
gustavo.sousa, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
The ctx_restore_{mid,post}_bb getters handed the caller a pointer into
storage owned by the configfs group and then dropped both the lock and
the group reference. A concurrent store can krealloc() that buffer and
an rmdir can free it outright, leaving the caller in xe_lrc.c to
memcpy() from freed memory. Copy the batch into a caller supplied
buffer while the lock is still held instead, which also folds the
length check the callers were doing into the getters.
Fixes: 6c6988c5e03d ("drm/xe/lrc: Allow to add user commands on context switch")
Fixes: 39ac06f70062 ("drm/xe/configfs: Add post context restore bb")
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: LLM
---
drivers/gpu/drm/xe/xe_configfs.c | 52 ++++++++++++++++++++++----------
drivers/gpu/drm/xe/xe_configfs.h | 24 +++++++--------
drivers/gpu/drm/xe/xe_lrc.c | 38 +++++++----------------
3 files changed, 59 insertions(+), 55 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 1c7a096aa046..6e62fdccb4c4 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -1441,25 +1441,34 @@ bool xe_configfs_get_disable_vram_page_offline(struct pci_dev *pdev)
* xe_configfs_get_ctx_restore_mid_bb - get configfs ctx_restore_mid_bb setting
* @pdev: pci device
* @class: hw engine class
- * @cs: pointer to the bb to use - only valid during probe
+ * @cs: destination buffer for the batch, or NULL to only query the length
+ * @max_len: capacity of @cs, in dwords
*
- * Return: Number of dwords used in the mid_ctx_restore setting in configfs
+ * Copy the configured batch into @cs while holding the configfs lock, so the
+ * caller never gets a pointer to storage owned by the configfs group.
+ *
+ * Return: Number of dwords used in the mid_ctx_restore setting in configfs, or
+ * -ENOSPC if it does not fit in @max_len
*/
-u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- const u32 **cs)
+ssize_t xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ u32 *cs, size_t max_len)
{
struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- u32 len;
+ ssize_t len;
if (!dev)
return 0;
scoped_guard(mutex, &dev->lock) {
- if (cs)
- *cs = dev->config.ctx_restore_mid_bb[class].cs;
-
len = dev->config.ctx_restore_mid_bb[class].len;
+ if (cs && len) {
+ if (len > max_len)
+ len = -ENOSPC;
+ else
+ memcpy(cs, dev->config.ctx_restore_mid_bb[class].cs,
+ len * sizeof(u32));
+ }
}
config_group_put(&dev->group);
@@ -1470,23 +1479,34 @@ u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
* xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
* @pdev: pci device
* @class: hw engine class
- * @cs: pointer to the bb to use - only valid during probe
+ * @cs: destination buffer for the batch, or NULL to only query the length
+ * @max_len: capacity of @cs, in dwords
*
- * Return: Number of dwords used in the post_ctx_restore setting in configfs
+ * Copy the configured batch into @cs while holding the configfs lock, so the
+ * caller never gets a pointer to storage owned by the configfs group.
+ *
+ * Return: Number of dwords used in the post_ctx_restore setting in configfs, or
+ * -ENOSPC if it does not fit in @max_len
*/
-u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- const u32 **cs)
+ssize_t xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ u32 *cs, size_t max_len)
{
struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- u32 len;
+ ssize_t len;
if (!dev)
return 0;
scoped_guard(mutex, &dev->lock) {
- *cs = dev->config.ctx_restore_post_bb[class].cs;
len = dev->config.ctx_restore_post_bb[class].len;
+ if (cs && len) {
+ if (len > max_len)
+ len = -ENOSPC;
+ else
+ memcpy(cs, dev->config.ctx_restore_post_bb[class].cs,
+ len * sizeof(u32));
+ }
}
config_group_put(&dev->group);
diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
index 10a00d6bbf8f..14e49f23306f 100644
--- a/drivers/gpu/drm/xe/xe_configfs.h
+++ b/drivers/gpu/drm/xe/xe_configfs.h
@@ -26,12 +26,12 @@ bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev);
u32 xe_configfs_get_migrate_ulls_period_ms(struct pci_dev *pdev);
bool xe_configfs_get_disable_vram_page_offline(struct pci_dev *pdev);
-u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- const u32 **cs);
-u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- const u32 **cs);
+ssize_t xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ u32 *cs, size_t max_len);
+ssize_t xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ u32 *cs, size_t max_len);
#ifdef CONFIG_PCI_IOV
unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev);
bool xe_configfs_admin_only_pf(struct pci_dev *pdev);
@@ -48,12 +48,12 @@ static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return f
static inline bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev) { return true; }
static inline u32 xe_configfs_get_migrate_ulls_period_ms(struct pci_dev *pdev) { return 5; }
static inline bool xe_configfs_get_disable_vram_page_offline(struct pci_dev *pdev) { return false; }
-static inline u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- const u32 **cs) { return 0; }
-static inline u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- const u32 **cs) { return 0; }
+static inline ssize_t xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ u32 *cs, size_t max_len) { return 0; }
+static inline ssize_t xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ u32 *cs, size_t max_len) { return 0; }
#ifdef CONFIG_PCI_IOV
static inline unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev)
{
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index de9a9560ecf3..f751687dc568 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -94,7 +94,7 @@ gt_engine_needs_indirect_ctx(struct xe_gt *gt, enum xe_engine_class class)
return true;
if (xe_configfs_get_ctx_restore_mid_bb(to_pci_dev(xe->drm.dev),
- class, NULL))
+ class, NULL, 0) > 0)
return true;
if (gt->ring_ops[class]->emit_aux_table_inv)
@@ -1186,17 +1186,12 @@ static ssize_t setup_configfs_post_ctx_restore_bb(struct xe_lrc *lrc,
bool indirect)
{
struct xe_device *xe = gt_to_xe(lrc->gt);
- const u32 *user_batch;
- u32 *cmd = batch;
- u32 count;
+ ssize_t count;
count = xe_configfs_get_ctx_restore_post_bb(to_pci_dev(xe->drm.dev),
- hwe->class, &user_batch);
- if (!count)
- return 0;
-
- if (count > max_len)
- return -ENOSPC;
+ hwe->class, batch, max_len);
+ if (count <= 0)
+ return count;
/*
* This should be used only for tests and validation. Taint the kernel
@@ -1204,10 +1199,7 @@ static ssize_t setup_configfs_post_ctx_restore_bb(struct xe_lrc *lrc,
*/
add_taint(TAINT_TEST, LOCKDEP_STILL_OK);
- memcpy(cmd, user_batch, count * sizeof(u32));
- cmd += count;
-
- return cmd - batch;
+ return count;
}
static ssize_t setup_configfs_mid_ctx_restore_bb(struct xe_lrc *lrc,
@@ -1216,17 +1208,12 @@ static ssize_t setup_configfs_mid_ctx_restore_bb(struct xe_lrc *lrc,
bool indirect)
{
struct xe_device *xe = gt_to_xe(lrc->gt);
- const u32 *user_batch;
- u32 *cmd = batch;
- u32 count;
+ ssize_t count;
count = xe_configfs_get_ctx_restore_mid_bb(to_pci_dev(xe->drm.dev),
- hwe->class, &user_batch);
- if (!count)
- return 0;
-
- if (count > max_len)
- return -ENOSPC;
+ hwe->class, batch, max_len);
+ if (count <= 0)
+ return count;
/*
* This should be used only for tests and validation. Taint the kernel
@@ -1234,10 +1221,7 @@ static ssize_t setup_configfs_mid_ctx_restore_bb(struct xe_lrc *lrc,
*/
add_taint(TAINT_TEST, LOCKDEP_STILL_OK);
- memcpy(cmd, user_batch, count * sizeof(u32));
- cmd += count;
-
- return cmd - batch;
+ return count;
}
static ssize_t setup_invalidate_state_cache_wa(struct xe_lrc *lrc,
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 04/15] drm/xe: Invert vram_page_offline configfs attribute
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
` (2 preceding siblings ...)
2026-10-05 19:06 ` [PATCH 03/15] drm/xe/configfs: Copy wa_bb out under the configfs lock Stuart Summers
@ 2026-10-05 19:06 ` Stuart Summers
2026-10-05 19:06 ` [PATCH 05/15] drm/xe: Make survivability_mode configfs attribute a bitmap Stuart Summers
` (14 subsequent siblings)
18 siblings, 0 replies; 21+ messages in thread
From: Stuart Summers @ 2026-10-05 19:06 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
gustavo.sousa, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Rename disable_vram_page_offline to enable_vram_page_offline The default
is now true, matching the previous default of offlining being active.
Negative-logic flags are error prone once they get combined with other
conditions, so carry the positive sense all the way down to the RAS
consumer rather than inverting at the configfs boundary. The internal
xe->ras field is explicitly initialized for every platform since a
zeroed struct no longer means "offlining enabled".
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: LLM
---
drivers/gpu/drm/xe/xe_configfs.c | 44 +++++++++++++--------------
drivers/gpu/drm/xe/xe_configfs.h | 2 +-
drivers/gpu/drm/xe/xe_drm_ras_types.h | 4 +--
drivers/gpu/drm/xe/xe_ras.c | 8 +++--
drivers/gpu/drm/xe/xe_ttm_vram_mgr.c | 2 +-
5 files changed, 31 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 6e62fdccb4c4..0ccf163306fc 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -63,7 +63,7 @@
* ├── engines_allowed
* ├── migrate_ulls_period_ms
* ├── enable_psmi
- * └── disable_vram_page_offline
+ * └── enable_vram_page_offline
*
* After configuring the attributes as per next section, the device can be
* probed with::
@@ -161,15 +161,15 @@
*
* This attribute can only be set before binding to the device.
*
- * Disable VRAM page offline:
- * ----------------------------
+ * Enable VRAM page offline:
+ * -------------------------
*
- * 0, n, N, false - Do not disable (Offlining is active - default)
- * 1, y, Y, true - Disable vram page offline (Logging only)
+ * 0, n, N, false - Disable vram page offline (Logging only)
+ * 1, y, Y, true - Enable vram page offline (Offlining is active - default)
*
* Example to disable VRAM offline::
*
- * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/disable_vram_page_offline
+ * # echo 0 > /sys/kernel/config/xe/0000:03:00.0/enable_vram_page_offline
*
* This attribute can only be set on CRI before binding to the device.
*
@@ -304,7 +304,7 @@ struct xe_config_group_device {
bool survivability_mode;
bool enable_psmi;
bool enable_multi_queue;
- bool disable_vram_page_offline;
+ bool enable_vram_page_offline;
struct {
unsigned int max_vfs;
bool admin_only_pf;
@@ -326,7 +326,7 @@ static const struct xe_config_device device_defaults = {
.survivability_mode = false,
.enable_psmi = false,
.enable_multi_queue = true,
- .disable_vram_page_offline = false,
+ .enable_vram_page_offline = true,
.sriov = {
.max_vfs = XE_DEFAULT_MAX_VFS,
.admin_only_pf = XE_DEFAULT_ADMIN_ONLY_PF,
@@ -675,15 +675,15 @@ static ssize_t migrate_ulls_period_ms_store(struct config_item *item,
return len;
}
-static ssize_t disable_vram_page_offline_show(struct config_item *item, char *page)
+static ssize_t enable_vram_page_offline_show(struct config_item *item, char *page)
{
struct xe_config_device *dev = to_xe_config_device(item);
- return sprintf(page, "%s\n", str_yes_no(dev->disable_vram_page_offline));
+ return sprintf(page, "%s\n", str_yes_no(dev->enable_vram_page_offline));
}
-static ssize_t disable_vram_page_offline_store(struct config_item *item,
- const char *page, size_t len)
+static ssize_t enable_vram_page_offline_store(struct config_item *item,
+ const char *page, size_t len)
{
struct xe_config_group_device *dev = to_xe_config_group_device(item);
bool val;
@@ -697,7 +697,7 @@ static ssize_t disable_vram_page_offline_store(struct config_item *item,
if (is_bound(dev))
return -EBUSY;
- dev->config.disable_vram_page_offline = val;
+ dev->config.enable_vram_page_offline = val;
return len;
}
@@ -946,7 +946,7 @@ CONFIGFS_ATTR(, ctx_restore_post_bb);
CONFIGFS_ATTR(, enable_multi_queue);
CONFIGFS_ATTR(, migrate_ulls_period_ms);
CONFIGFS_ATTR(, enable_psmi);
-CONFIGFS_ATTR(, disable_vram_page_offline);
+CONFIGFS_ATTR(, enable_vram_page_offline);
CONFIGFS_ATTR(, engines_allowed);
CONFIGFS_ATTR(, gt_types_allowed);
CONFIGFS_ATTR(, survivability_mode);
@@ -957,7 +957,7 @@ static struct configfs_attribute *xe_config_device_attrs[] = {
&attr_enable_multi_queue,
&attr_migrate_ulls_period_ms,
&attr_enable_psmi,
- &attr_disable_vram_page_offline,
+ &attr_enable_vram_page_offline,
&attr_engines_allowed,
&attr_gt_types_allowed,
&attr_survivability_mode,
@@ -989,7 +989,7 @@ static bool xe_config_device_is_visible(struct config_item *item,
return false;
}
- if (attr == &attr_disable_vram_page_offline) {
+ if (attr == &attr_enable_vram_page_offline) {
if (!dev->desc->is_dgfx || dev->desc->platform != XE_CRESCENTISLAND)
return false;
}
@@ -1242,7 +1242,7 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
PRI_CUSTOM_ATTR("%u", migrate_ulls_period_ms);
PRI_CUSTOM_ATTR("%d", enable_multi_queue);
PRI_CUSTOM_ATTR("%d", enable_psmi);
- PRI_CUSTOM_ATTR("%d", disable_vram_page_offline);
+ PRI_CUSTOM_ATTR("%d", enable_vram_page_offline);
PRI_CUSTOM_ATTR("%d", survivability_mode);
PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
@@ -1417,21 +1417,21 @@ u32 xe_configfs_get_migrate_ulls_period_ms(struct pci_dev *pdev)
}
/**
- * xe_configfs_get_disable_vram_page_offline - get configfs disable_vram_page_offline setting
+ * xe_configfs_get_enable_vram_page_offline - get configfs enable_vram_page_offline setting
* @pdev: pci device
*
- * Return: disable_vram_page_offline setting in configfs
+ * Return: enable_vram_page_offline setting in configfs
*/
-bool xe_configfs_get_disable_vram_page_offline(struct pci_dev *pdev)
+bool xe_configfs_get_enable_vram_page_offline(struct pci_dev *pdev)
{
struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
bool ret;
if (!dev)
- return device_defaults.disable_vram_page_offline;
+ return device_defaults.enable_vram_page_offline;
scoped_guard(mutex, &dev->lock)
- ret = dev->config.disable_vram_page_offline;
+ ret = dev->config.enable_vram_page_offline;
config_group_put(&dev->group);
return ret;
diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
index 14e49f23306f..1d538ce0ed2c 100644
--- a/drivers/gpu/drm/xe/xe_configfs.h
+++ b/drivers/gpu/drm/xe/xe_configfs.h
@@ -25,7 +25,7 @@ u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev);
u32 xe_configfs_get_migrate_ulls_period_ms(struct pci_dev *pdev);
-bool xe_configfs_get_disable_vram_page_offline(struct pci_dev *pdev);
+bool xe_configfs_get_enable_vram_page_offline(struct pci_dev *pdev);
ssize_t xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
enum xe_engine_class class,
u32 *cs, size_t max_len);
diff --git a/drivers/gpu/drm/xe/xe_drm_ras_types.h b/drivers/gpu/drm/xe/xe_drm_ras_types.h
index 0be218ba2db7..60cbc35a6b35 100644
--- a/drivers/gpu/drm/xe/xe_drm_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_drm_ras_types.h
@@ -44,8 +44,8 @@ struct xe_drm_ras {
/** @info: info array for all types of errors */
struct xe_drm_ras_counter *info[DRM_XE_RAS_ERR_SEV_MAX];
- /** @disable_vram_page_offline: cached configfs policy, immutable after init */
- bool disable_vram_page_offline;
+ /** @enable_vram_page_offline: cached configfs policy, immutable after init */
+ bool enable_vram_page_offline;
};
#endif
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 7a85735c57d5..ce9b57b3eede 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -916,13 +916,15 @@ void xe_ras_init(struct xe_device *xe)
{
int ret;
+ xe->ras.enable_vram_page_offline = true;
+
/*
- * TODO: Replace platform check with xe->info.has_disable_vram_page_offline
+ * TODO: Replace platform check with xe->info.has_vram_page_offline
* once the feature flag is plumbed through device info.
*/
if (xe->info.platform == XE_CRESCENTISLAND)
- xe->ras.disable_vram_page_offline =
- xe_configfs_get_disable_vram_page_offline(to_pci_dev(xe->drm.dev));
+ xe->ras.enable_vram_page_offline =
+ xe_configfs_get_enable_vram_page_offline(to_pci_dev(xe->drm.dev));
xe_drm_ras_init(xe);
diff --git a/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c b/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c
index 9a514d983e90..1dad94a153b7 100644
--- a/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c
+++ b/drivers/gpu/drm/xe/xe_ttm_vram_mgr.c
@@ -933,7 +933,7 @@ int xe_ttm_vram_handle_addr_fault(struct xe_device *xe, u64 addr)
vram_mgr = &vr->ttm;
mm = &vram_mgr->mm;
- if (xe->ras.disable_vram_page_offline) {
+ if (!xe->ras.enable_vram_page_offline) {
xe_err(xe, "0x%llx is reported as corrupted address by HW\n",
addr);
return -EOPNOTSUPP;
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 05/15] drm/xe: Make survivability_mode configfs attribute a bitmap
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
` (3 preceding siblings ...)
2026-10-05 19:06 ` [PATCH 04/15] drm/xe: Invert vram_page_offline configfs attribute Stuart Summers
@ 2026-10-05 19:06 ` Stuart Summers
2026-10-05 19:06 ` [PATCH 06/15] drm/xe: Sort xe_config_device fields Stuart Summers
` (13 subsequent siblings)
18 siblings, 0 replies; 21+ messages in thread
From: Stuart Summers @ 2026-10-05 19:06 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
gustavo.sousa, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Survivability mode is likely to grow additional independently selectable
behaviors, so store it as a u8 bitmap rather than a bool. Only bit 0 is
defined, so the accepted values are unchanged.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: LLM
---
drivers/gpu/drm/xe/xe_configfs.c | 25 +++++++++++++---------
drivers/gpu/drm/xe/xe_configfs.h | 16 ++++++++++++--
drivers/gpu/drm/xe/xe_survivability_mode.c | 7 +++---
3 files changed, 33 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 0ccf163306fc..a16e2f48b01a 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -78,8 +78,10 @@
* Survivability mode:
* -------------------
*
- * Enable survivability mode on supported cards. This setting only takes
- * effect when probing the device. Example to enable it::
+ * Enable survivability mode on supported cards. This is a bitmap; bit 0
+ * enables survivability mode and is currently the only bit defined, so the
+ * only accepted values remain 0 and 1. This setting only takes effect when
+ * probing the device. Example to enable it::
*
* # echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_mode
*
@@ -301,7 +303,7 @@ struct xe_config_group_device {
u32 migrate_ulls_period_ms;
struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
- bool survivability_mode;
+ u8 survivability_mode;
bool enable_psmi;
bool enable_multi_queue;
bool enable_vram_page_offline;
@@ -323,7 +325,7 @@ static const struct xe_config_device device_defaults = {
.gt_types_allowed = U64_MAX,
.engines_allowed = U64_MAX,
.migrate_ulls_period_ms = 5,
- .survivability_mode = false,
+ .survivability_mode = 0,
.enable_psmi = false,
.enable_multi_queue = true,
.enable_vram_page_offline = true,
@@ -407,19 +409,22 @@ static ssize_t survivability_mode_show(struct config_item *item, char *page)
{
struct xe_config_device *dev = to_xe_config_device(item);
- return sprintf(page, "%d\n", dev->survivability_mode);
+ return sprintf(page, "%u\n", dev->survivability_mode);
}
static ssize_t survivability_mode_store(struct config_item *item, const char *page, size_t len)
{
struct xe_config_group_device *dev = to_xe_config_group_device(item);
- bool survivability_mode;
+ u8 survivability_mode;
int ret;
- ret = kstrtobool(page, &survivability_mode);
+ ret = kstrtou8(page, 0, &survivability_mode);
if (ret)
return ret;
+ if (survivability_mode & ~XE_CONFIGFS_SURVIVABILITY_MASK)
+ return -EINVAL;
+
guard(mutex)(&dev->lock);
if (is_bound(dev))
return -EBUSY;
@@ -1243,7 +1248,7 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
PRI_CUSTOM_ATTR("%d", enable_multi_queue);
PRI_CUSTOM_ATTR("%d", enable_psmi);
PRI_CUSTOM_ATTR("%d", enable_vram_page_offline);
- PRI_CUSTOM_ATTR("%d", survivability_mode);
+ PRI_CUSTOM_ATTR("%u", survivability_mode);
PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
#undef PRI_CUSTOM_ATTR
@@ -1278,10 +1283,10 @@ void xe_configfs_check_device(struct pci_dev *pdev)
*
* Return: survivability_mode attribute in configfs
*/
-bool xe_configfs_get_survivability_mode(struct pci_dev *pdev)
+u8 xe_configfs_get_survivability_mode(struct pci_dev *pdev)
{
struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- bool mode;
+ u8 mode;
if (!dev)
return device_defaults.survivability_mode;
diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
index 1d538ce0ed2c..a5c081fc1672 100644
--- a/drivers/gpu/drm/xe/xe_configfs.h
+++ b/drivers/gpu/drm/xe/xe_configfs.h
@@ -5,6 +5,7 @@
#ifndef _XE_CONFIGFS_H_
#define _XE_CONFIGFS_H_
+#include <linux/bits.h>
#include <linux/limits.h>
#include <linux/types.h>
@@ -14,11 +15,22 @@
struct pci_dev;
+/**
+ * DOC: survivability_mode configfs bits
+ *
+ * The survivability_mode attribute is a bitmap so that additional
+ * survivability behaviors can be requested independently in the future.
+ * %XE_CONFIGFS_SURVIVABILITY_ENABLE is currently the only defined bit, so
+ * the attribute still only accepts 0 and 1.
+ */
+#define XE_CONFIGFS_SURVIVABILITY_ENABLE BIT(0)
+#define XE_CONFIGFS_SURVIVABILITY_MASK XE_CONFIGFS_SURVIVABILITY_ENABLE
+
#if IS_ENABLED(CONFIG_CONFIGFS_FS)
int xe_configfs_init(void);
void xe_configfs_exit(void);
void xe_configfs_check_device(struct pci_dev *pdev);
-bool xe_configfs_get_survivability_mode(struct pci_dev *pdev);
+u8 xe_configfs_get_survivability_mode(struct pci_dev *pdev);
bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
@@ -40,7 +52,7 @@ bool xe_configfs_admin_only_pf(struct pci_dev *pdev);
static inline int xe_configfs_init(void) { return 0; }
static inline void xe_configfs_exit(void) { }
static inline void xe_configfs_check_device(struct pci_dev *pdev) { }
-static inline bool xe_configfs_get_survivability_mode(struct pci_dev *pdev) { return false; }
+static inline u8 xe_configfs_get_survivability_mode(struct pci_dev *pdev) { return 0; }
static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return true; }
static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; }
static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
diff --git a/drivers/gpu/drm/xe/xe_survivability_mode.c b/drivers/gpu/drm/xe/xe_survivability_mode.c
index 45d44ebe288b..3b96097f6ee6 100644
--- a/drivers/gpu/drm/xe/xe_survivability_mode.c
+++ b/drivers/gpu/drm/xe/xe_survivability_mode.c
@@ -306,7 +306,8 @@ static const struct attribute_group survivability_info_group = {
static int create_survivability_sysfs(struct pci_dev *pdev)
{
/* Survivability info is required if not enabled via configfs */
- bool needs_info = !xe_configfs_get_survivability_mode(pdev);
+ bool needs_info = !(xe_configfs_get_survivability_mode(pdev) &
+ XE_CONFIGFS_SURVIVABILITY_ENABLE);
struct xe_device *xe = pdev_to_xe_device(pdev);
struct device *dev = &pdev->dev;
int ret;
@@ -405,14 +406,14 @@ bool xe_survivability_mode_is_requested(struct xe_device *xe)
struct xe_mmio *mmio = xe_root_tile_mmio(xe);
struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
u32 data;
- bool survivability_mode;
+ u8 survivability_mode;
if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || xe->info.platform < XE_BATTLEMAGE)
return false;
survivability_mode = xe_configfs_get_survivability_mode(pdev);
/* Enable survivability mode if set via configfs */
- if (survivability_mode)
+ if (survivability_mode & XE_CONFIGFS_SURVIVABILITY_ENABLE)
return true;
data = xe_mmio_read32(mmio, PCODE_SCRATCH(0));
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 06/15] drm/xe: Sort xe_config_device fields
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
` (4 preceding siblings ...)
2026-10-05 19:06 ` [PATCH 05/15] drm/xe: Make survivability_mode configfs attribute a bitmap Stuart Summers
@ 2026-10-05 19:06 ` Stuart Summers
2026-10-05 19:06 ` [PATCH 07/15] drm/xe: Split out configfs data structures Stuart Summers
` (12 subsequent siblings)
18 siblings, 0 replies; 21+ messages in thread
From: Stuart Summers @ 2026-10-05 19:06 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
gustavo.sousa, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
As we're planning more configfs entries over time, let's add
some sorting rules to make sure this stays clean and easy to
manage. Sorting first by type and then name for readability.
The documentation block is sorted alphabetically by attribute
name instead, since there is no type information to group by
there.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: LLM
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
drivers/gpu/drm/xe/xe_configfs.c | 1338 +++++++++++++++---------------
drivers/gpu/drm/xe/xe_configfs.h | 32 +-
2 files changed, 692 insertions(+), 678 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index a16e2f48b01a..4a92a6f22311 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -58,12 +58,15 @@
* │ └── ...
* :
* └── 0000:03:00.0
- * ├── survivability_mode
- * ├── gt_types_allowed
+ * ├── ctx_restore_mid_bb
+ * ├── ctx_restore_post_bb
+ * ├── enable_multi_queue
+ * ├── enable_psmi
+ * ├── enable_vram_page_offline
* ├── engines_allowed
+ * ├── gt_types_allowed
* ├── migrate_ulls_period_ms
- * ├── enable_psmi
- * └── enable_vram_page_offline
+ * └── survivability_mode
*
* After configuring the attributes as per next section, the device can be
* probed with::
@@ -75,55 +78,93 @@
* Configure Attributes
* ====================
*
- * Survivability mode:
- * -------------------
+ * Context restore BB
+ * ------------------
*
- * Enable survivability mode on supported cards. This is a bitmap; bit 0
- * enables survivability mode and is currently the only bit defined, so the
- * only accepted values remain 0 and 1. This setting only takes effect when
- * probing the device. Example to enable it::
+ * Allow to execute a batch buffer during any context switches. When the
+ * GPU is restoring the context, it executes additional commands. It's useful
+ * for testing additional workarounds and validating certain HW behaviors: it's
+ * not intended for normal execution and will taint the kernel with TAINT_TEST
+ * when used.
*
- * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_mode
+ * The syntax allows to pass straight instructions to be executed by the engine
+ * in a batch buffer or set specific registers.
*
- * This attribute can only be set before binding to the device.
+ * #. Generic instruction::
*
- * Allowed GT types:
- * -----------------
+ * <engine-class> cmd <instr> [[dword0] [dword1] [...]]
*
- * Allow only specific types of GTs to be detected and initialized by the
- * driver. Any combination of GT types can be enabled/disabled, although
- * some settings will cause the device to fail to probe.
+ * #. Simple register setting::
*
- * Writes support both comma- and newline-separated input format. Reads
- * will always return one GT type per line. "primary" and "media" are the
- * GT type names supported by this interface.
+ * <engine-class> reg <address> <value>
+ *
+ * Commands are saved per engine class: all instances of that class will execute
+ * those commands during context switch. The instruction, dword arguments,
+ * addresses and values are in hex format like in the examples below.
+ *
+ * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the
+ * normal context restore::
+ *
+ * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
+ * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
+ *
+ * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 at the
+ * beginning of the context restore::
+ *
+ * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
+ * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bb
+
+ * #. Load certain values in a couple of registers (it can be used as a simpler
+ * alternative to the `cmd`) action::
+ *
+ * # cat > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb <<EOF
+ * rcs reg 4F100 DEADBEEF
+ * rcs reg 4F104 FFFFFFFF
+ * EOF
+ *
+ * .. note::
+ *
+ * When using multiple lines, make sure to use a command that is
+ * implemented with a single write syscall, like HEREDOC.
+ *
+ * Currently this is implemented only for post and mid context restore and
+ * these attributes can only be set before binding to the device.
+ *
+ * Enable multi-queue
+ * ------------------
+ *
+ * Multi-queue support on the device is enabled by default where the
+ * hardware supports it. Writing 0 force-disables multi-queue support:
+ * multi-queue exec-queue group creation via ioctl is refused, and the
+ * GuC feature is disabled::
+ *
+ * # echo 0 > /sys/kernel/config/xe/0000:03:00.0/enable_multi_queue
*
* This attribute can only be set before binding to the device.
*
- * Examples:
+ * PSMI
+ * ----
*
- * Allow both primary and media GTs to be initialized and used. This matches
- * the driver's default behavior::
+ * Enable extra debugging capabilities to trace engine execution. Only useful
+ * during early platform enabling and requires additional hardware connected.
+ * Once it's enabled, additionals WAs are added and runtime configuration is
+ * done via debugfs. Example to enable it::
*
- * # echo 'primary,media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
+ * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_psmi
*
- * Allow only the primary GT of each tile to be initialized and used,
- * effectively disabling the media GT if it exists on the platform::
+ * This attribute can only be set before binding to the device.
*
- * # echo 'primary' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
+ * Enable VRAM page offline:
+ * -------------------------
*
- * Allow only the media GT of each tile to be initialized and used,
- * effectively disabling the primary GT. **This configuration will cause
- * device probe failure on all current platforms, but may be allowed on
- * igpu platforms in the future**::
+ * 0, n, N, false - Disable vram page offline (Logging only)
+ * 1, y, Y, true - Enable vram page offline (Offlining is active - default)
*
- * # echo 'media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
+ * Example to disable VRAM offline::
*
- * Disable all GTs. Only other GPU IP (such as display) is potentially usable.
- * **This configuration will cause device probe failure on all current
- * platforms, but may be allowed on igpu platforms in the future**::
+ * # echo 0 > /sys/kernel/config/xe/0000:03:00.0/enable_vram_page_offline
*
- * # echo '' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
+ * This attribute can only be set on CRI before binding to the device.
*
* Allowed engines:
* ----------------
@@ -151,81 +192,69 @@
*
* This attribute can only be set before binding to the device.
*
- * PSMI
- * ----
+ * Allowed GT types:
+ * -----------------
*
- * Enable extra debugging capabilities to trace engine execution. Only useful
- * during early platform enabling and requires additional hardware connected.
- * Once it's enabled, additionals WAs are added and runtime configuration is
- * done via debugfs. Example to enable it::
+ * Allow only specific types of GTs to be detected and initialized by the
+ * driver. Any combination of GT types can be enabled/disabled, although
+ * some settings will cause the device to fail to probe.
*
- * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_psmi
+ * Writes support both comma- and newline-separated input format. Reads
+ * will always return one GT type per line. "primary" and "media" are the
+ * GT type names supported by this interface.
*
* This attribute can only be set before binding to the device.
*
- * Enable VRAM page offline:
- * -------------------------
- *
- * 0, n, N, false - Disable vram page offline (Logging only)
- * 1, y, Y, true - Enable vram page offline (Offlining is active - default)
- *
- * Example to disable VRAM offline::
- *
- * # echo 0 > /sys/kernel/config/xe/0000:03:00.0/enable_vram_page_offline
+ * Examples:
*
- * This attribute can only be set on CRI before binding to the device.
+ * Allow both primary and media GTs to be initialized and used. This matches
+ * the driver's default behavior::
*
- * Context restore BB
- * ------------------
+ * # echo 'primary,media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
*
- * Allow to execute a batch buffer during any context switches. When the
- * GPU is restoring the context, it executes additional commands. It's useful
- * for testing additional workarounds and validating certain HW behaviors: it's
- * not intended for normal execution and will taint the kernel with TAINT_TEST
- * when used.
+ * Allow only the primary GT of each tile to be initialized and used,
+ * effectively disabling the media GT if it exists on the platform::
*
- * The syntax allows to pass straight instructions to be executed by the engine
- * in a batch buffer or set specific registers.
+ * # echo 'primary' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
*
- * #. Generic instruction::
+ * Allow only the media GT of each tile to be initialized and used,
+ * effectively disabling the primary GT. **This configuration will cause
+ * device probe failure on all current platforms, but may be allowed on
+ * igpu platforms in the future**::
*
- * <engine-class> cmd <instr> [[dword0] [dword1] [...]]
+ * # echo 'media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
*
- * #. Simple register setting::
+ * Disable all GTs. Only other GPU IP (such as display) is potentially usable.
+ * **This configuration will cause device probe failure on all current
+ * platforms, but may be allowed on igpu platforms in the future**::
*
- * <engine-class> reg <address> <value>
+ * # echo '' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
*
- * Commands are saved per engine class: all instances of that class will execute
- * those commands during context switch. The instruction, dword arguments,
- * addresses and values are in hex format like in the examples below.
+ * Migrate ULLS Period (ms)
+ * ------------------------
*
- * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the
- * normal context restore::
+ * Migrate ULLS period, in milliseconds. This is the delay between entering
+ * migrate ULLS (a continuously running batch) and exiting it. Migrate ULLS is
+ * currently entered during page faults and SVM prefetch operations. Default 5,
+ * zero indicates ULLS is disabled.
*
- * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
- * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
+ * How to disable migration ULLS:
*
- * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 at the
- * beginning of the context restore::
+ * # echo 0 > /sys/kernel/config/xe/0000:03:00.0/migrate_ulls_period_ms
*
- * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
- * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bb
-
- * #. Load certain values in a couple of registers (it can be used as a simpler
- * alternative to the `cmd`) action::
+ * This attribute can only be set before binding to the device.
*
- * # cat > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb <<EOF
- * rcs reg 4F100 DEADBEEF
- * rcs reg 4F104 FFFFFFFF
- * EOF
+ * Survivability mode:
+ * -------------------
*
- * .. note::
+ * Enable survivability mode on supported cards. This is a bitmap; bit 0
+ * enables survivability mode and is currently the only bit defined, so the
+ * only accepted values remain 0 and 1. This setting only takes effect when
+ * probing the device. Example to enable it::
*
- * When using multiple lines, make sure to use a command that is
- * implemented with a single write syscall, like HEREDOC.
+ * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_mode
*
- * Currently this is implemented only for post and mid context restore and
- * these attributes can only be set before binding to the device.
+ * This attribute can only be set before binding to the device.
*
* Max SR-IOV Virtual Functions
* ----------------------------
@@ -253,32 +282,6 @@
*
* This setting only takes effect when probing the device.
*
- * Enable multi-queue
- * ------------------
- *
- * Multi-queue support on the device is enabled by default where the
- * hardware supports it. Writing 0 force-disables multi-queue support:
- * multi-queue exec-queue group creation via ioctl is refused, and the
- * GuC feature is disabled::
- *
- * # echo 0 > /sys/kernel/config/xe/0000:03:00.0/enable_multi_queue
- *
- * This attribute can only be set before binding to the device.
- *
- * Migrate ULLS Period (ms)
- * ------------------------
- *
- * Migrate ULLS period, in milliseconds. This is the delay between entering
- * migrate ULLS (a continuously running batch) and exiting it. Migrate ULLS is
- * currently entered during page faults and SVM prefetch operations. Default 5,
- * zero indicates ULLS is disabled.
- *
- * How to disable migration ULLS:
- *
- * # echo 0 > /sys/kernel/config/xe/0000:03:00.0/migrate_ulls_period_ms
- *
- * This attribute can only be set before binding to the device.
- *
* Remove devices
* ==============
*
@@ -297,15 +300,20 @@ struct xe_config_group_device {
struct config_group group;
struct config_group sriov;
+ /*
+ * Fields sorted by type (largest first) then name: struct arrays,
+ * u64, u32/unsigned int, u8, bool, sub-structs last. Within each
+ * type, entries are sorted alphabetically.
+ */
struct xe_config_device {
- u64 gt_types_allowed;
+ struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
+ struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
u64 engines_allowed;
+ u64 gt_types_allowed;
u32 migrate_ulls_period_ms;
- struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
- struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
u8 survivability_mode;
- bool enable_psmi;
bool enable_multi_queue;
+ bool enable_psmi;
bool enable_vram_page_offline;
struct {
unsigned int max_vfs;
@@ -322,12 +330,12 @@ struct xe_config_group_device {
};
static const struct xe_config_device device_defaults = {
- .gt_types_allowed = U64_MAX,
.engines_allowed = U64_MAX,
+ .gt_types_allowed = U64_MAX,
.migrate_ulls_period_ms = 5,
.survivability_mode = 0,
- .enable_psmi = false,
.enable_multi_queue = true,
+ .enable_psmi = false,
.enable_vram_page_offline = true,
.sriov = {
.max_vfs = XE_DEFAULT_MAX_VFS,
@@ -405,84 +413,345 @@ static bool is_bound(struct xe_config_group_device *dev)
return ret;
}
-static ssize_t survivability_mode_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = to_xe_config_device(item);
-
- return sprintf(page, "%u\n", dev->survivability_mode);
-}
-
-static ssize_t survivability_mode_store(struct config_item *item, const char *page, size_t len)
-{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
- u8 survivability_mode;
- int ret;
-
- ret = kstrtou8(page, 0, &survivability_mode);
- if (ret)
- return ret;
+static struct xe_config_group_device *find_xe_config_group_device(struct pci_dev *pdev);
- if (survivability_mode & ~XE_CONFIGFS_SURVIVABILITY_MASK)
+/**
+ * xe_configfs_get_ctx_restore_mid_bb - get configfs ctx_restore_mid_bb setting
+ * @pdev: pci device
+ * @class: hw engine class
+ * @cs: destination buffer for the batch, or NULL to only query the length
+ * @max_len: capacity of @cs, in dwords
+ *
+ * Copy the configured batch into @cs while holding the configfs lock, so the
+ * caller never gets a pointer to storage owned by the configfs group.
+ *
+ * Return: Number of dwords used in the mid_ctx_restore setting in configfs, or
+ * -ENOSPC if it does not fit in @max_len
+ */
+ssize_t xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ u32 *cs, size_t max_len)
+{
+ struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+ ssize_t len;
+
+ if (!dev)
+ return 0;
+
+ scoped_guard(mutex, &dev->lock) {
+ len = dev->config.ctx_restore_mid_bb[class].len;
+ if (cs && len) {
+ if (len > max_len)
+ len = -ENOSPC;
+ else
+ memcpy(cs, dev->config.ctx_restore_mid_bb[class].cs,
+ len * sizeof(u32));
+ }
+ }
+ config_group_put(&dev->group);
+
+ return len;
+}
+
+/**
+ * xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
+ * @pdev: pci device
+ * @class: hw engine class
+ * @cs: destination buffer for the batch, or NULL to only query the length
+ * @max_len: capacity of @cs, in dwords
+ *
+ * Copy the configured batch into @cs while holding the configfs lock, so the
+ * caller never gets a pointer to storage owned by the configfs group.
+ *
+ * Return: Number of dwords used in the post_ctx_restore setting in configfs, or
+ * -ENOSPC if it does not fit in @max_len
+ */
+ssize_t xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ u32 *cs, size_t max_len)
+{
+ struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+ ssize_t len;
+
+ if (!dev)
+ return 0;
+
+ scoped_guard(mutex, &dev->lock) {
+ len = dev->config.ctx_restore_post_bb[class].len;
+ if (cs && len) {
+ if (len > max_len)
+ len = -ENOSPC;
+ else
+ memcpy(cs, dev->config.ctx_restore_post_bb[class].cs,
+ len * sizeof(u32));
+ }
+ }
+ config_group_put(&dev->group);
+
+ return len;
+}
+
+static bool wa_bb_read_advance(bool dereference, char **p,
+ const char *append, size_t len,
+ size_t *max_size)
+{
+ if (dereference) {
+ if (len >= *max_size)
+ return false;
+ *max_size -= len;
+ if (append)
+ memcpy(*p, append, len);
+ }
+
+ *p += len;
+
+ return true;
+}
+
+static ssize_t wa_bb_show(struct xe_config_group_device *dev,
+ struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
+ char *data, size_t sz)
+{
+ char *p = data;
+
+ guard(mutex)(&dev->lock);
+
+ for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
+ enum xe_engine_class ec = engine_info[i].engine_class;
+ size_t len;
+
+ if (!wa_bb[ec].len)
+ continue;
+
+ len = snprintf(p, sz, "%s:", engine_info[i].cls);
+ if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
+ return -ENOBUFS;
+
+ for (size_t j = 0; j < wa_bb[ec].len; j++) {
+ len = snprintf(p, sz, " %08x", wa_bb[ec].cs[j]);
+ if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
+ return -ENOBUFS;
+ }
+
+ if (!wa_bb_read_advance(data, &p, "\n", 1, &sz))
+ return -ENOBUFS;
+ }
+
+ if (!wa_bb_read_advance(data, &p, "", 1, &sz))
+ return -ENOBUFS;
+
+ /* Reserve one more to match check for '\0' */
+ if (!data)
+ p++;
+
+ return p - data;
+}
+
+static ssize_t ctx_restore_mid_bb_show(struct config_item *item, char *page)
+{
+ struct xe_config_group_device *dev = to_xe_config_group_device(item);
+
+ return wa_bb_show(dev, dev->config.ctx_restore_mid_bb, page, SZ_4K);
+}
+
+static ssize_t ctx_restore_post_bb_show(struct config_item *item, char *page)
+{
+ struct xe_config_group_device *dev = to_xe_config_group_device(item);
+
+ return wa_bb_show(dev, dev->config.ctx_restore_post_bb, page, SZ_4K);
+}
+
+static void wa_bb_append(struct wa_bb *wa_bb, u32 val)
+{
+ if (wa_bb->cs)
+ wa_bb->cs[wa_bb->len] = val;
+
+ wa_bb->len++;
+}
+
+static ssize_t parse_hex(const char *line, u32 *pval)
+{
+ char numstr[12];
+ const char *p;
+ ssize_t numlen;
+
+ p = line + strspn(line, " \t");
+ if (!*p || *p == '\n')
+ return 0;
+
+ numlen = strcspn(p, " \t\n");
+ if (!numlen || numlen >= sizeof(numstr) - 1)
+ return -EINVAL;
+
+ memcpy(numstr, p, numlen);
+ numstr[numlen] = '\0';
+ p += numlen;
+
+ if (kstrtou32(numstr, 16, pval))
return -EINVAL;
+ return p - line;
+}
+
+static int parse_engine(const char *s, const char *end_chars, u64 *mask,
+ const struct engine_info **pinfo);
+
+/*
+ * Parse lines with the format
+ *
+ * <engine-class> cmd <u32> <u32...>
+ * <engine-class> reg <u32_addr> <u32_val>
+ *
+ * and optionally save them in @wa_bb[i].cs is non-NULL.
+ *
+ * Return the number of dwords parsed.
+ */
+static ssize_t parse_wa_bb_lines(const char *lines,
+ struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX])
+{
+ ssize_t dwords = 0, ret;
+ const char *p;
+
+ /*
+ * Each iteration consumes at least the engine class token if it doesn't
+ * error out, so the loop always makes progress without advancing @p.
+ */
+ for (p = lines; *p;) {
+ const struct engine_info *info = NULL;
+ u32 val, val2;
+
+ /* Also allow empty lines */
+ p += strspn(p, " \t\n");
+ if (!*p)
+ break;
+
+ ret = parse_engine(p, " \t\n", NULL, &info);
+ if (ret < 0)
+ return ret;
+
+ p += ret;
+ p += strspn(p, " \t");
+
+ if (str_has_prefix(p, "cmd")) {
+ for (p += strlen("cmd"); *p;) {
+ ret = parse_hex(p, &val);
+ if (ret < 0)
+ return -EINVAL;
+ if (!ret)
+ break;
+
+ p += ret;
+ dwords++;
+ wa_bb_append(&wa_bb[info->engine_class], val);
+ }
+ } else if (str_has_prefix(p, "reg")) {
+ p += strlen("reg");
+ ret = parse_hex(p, &val);
+ if (ret <= 0)
+ return -EINVAL;
+
+ p += ret;
+ ret = parse_hex(p, &val2);
+ if (ret <= 0)
+ return -EINVAL;
+
+ p += ret;
+ dwords += 3;
+ wa_bb_append(&wa_bb[info->engine_class],
+ MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1));
+ wa_bb_append(&wa_bb[info->engine_class], val);
+ wa_bb_append(&wa_bb[info->engine_class], val2);
+ } else {
+ return -EINVAL;
+ }
+ }
+
+ return dwords;
+}
+
+static ssize_t wa_bb_store(struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
+ struct xe_config_group_device *dev,
+ const char *page, size_t len)
+{
+ /* tmp_wa_bb must match wa_bb's size */
+ struct wa_bb tmp_wa_bb[XE_ENGINE_CLASS_MAX] = { };
+ ssize_t count, class;
+ u32 *tmp;
+
+ /* 1. Count dwords - wa_bb[i].cs is NULL for all classes */
+ count = parse_wa_bb_lines(page, tmp_wa_bb);
+ if (count < 0)
+ return count;
+
guard(mutex)(&dev->lock);
+
if (is_bound(dev))
return -EBUSY;
- dev->config.survivability_mode = survivability_mode;
+ /*
+ * 2. Allocate a u32 array and set the pointers to the right positions
+ * according to the length of each class' wa_bb
+ */
+ tmp = krealloc(wa_bb[0].cs, count * sizeof(u32), GFP_KERNEL);
+ if (!tmp)
+ return -ENOMEM;
- return len;
-}
+ if (!count) {
+ memset(wa_bb, 0, sizeof(tmp_wa_bb));
+ return len;
+ }
-static ssize_t gt_types_allowed_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = to_xe_config_device(item);
- char *p = page;
+ for (class = 0, count = 0; class < XE_ENGINE_CLASS_MAX; ++class) {
+ tmp_wa_bb[class].cs = tmp + count;
+ count += tmp_wa_bb[class].len;
+ tmp_wa_bb[class].len = 0;
+ }
- for (size_t i = 0; i < ARRAY_SIZE(gt_types); i++)
- if (dev->gt_types_allowed & BIT_ULL(gt_types[i].type))
- p += sprintf(p, "%s\n", gt_types[i].name);
+ /* 3. Parse wa_bb lines again, this time saving the values */
+ count = parse_wa_bb_lines(page, tmp_wa_bb);
+ if (count < 0)
+ return count;
- return p - page;
+ memcpy(wa_bb, tmp_wa_bb, sizeof(tmp_wa_bb));
+
+ return len;
}
-static ssize_t gt_types_allowed_store(struct config_item *item, const char *page,
- size_t len)
+static ssize_t ctx_restore_mid_bb_store(struct config_item *item,
+ const char *data, size_t sz)
{
struct xe_config_group_device *dev = to_xe_config_group_device(item);
- char *buf __free(kfree) = kstrdup(page, GFP_KERNEL);
- char *p = buf;
- u64 typemask = 0;
- if (!buf)
- return -ENOMEM;
-
- while (p) {
- char *typename = strsep(&p, ",\n");
- bool matched = false;
+ return wa_bb_store(dev->config.ctx_restore_mid_bb, dev, data, sz);
+}
- if (typename[0] == '\0')
- continue;
+static ssize_t ctx_restore_post_bb_store(struct config_item *item,
+ const char *data, size_t sz)
+{
+ struct xe_config_group_device *dev = to_xe_config_group_device(item);
- for (size_t i = 0; i < ARRAY_SIZE(gt_types); i++) {
- if (strcmp(typename, gt_types[i].name) == 0) {
- typemask |= BIT(gt_types[i].type);
- matched = true;
- break;
- }
- }
+ return wa_bb_store(dev->config.ctx_restore_post_bb, dev, data, sz);
+}
- if (!matched)
- return -EINVAL;
- }
+/**
+ * xe_configfs_get_engines_allowed - get engine allowed mask from configfs
+ * @pdev: pci device
+ *
+ * Return: engine mask with allowed engines set in configfs
+ */
+u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+ u64 engines_allowed;
- guard(mutex)(&dev->lock);
- if (is_bound(dev))
- return -EBUSY;
+ if (!dev)
+ return device_defaults.engines_allowed;
- dev->config.gt_types_allowed = typemask;
+ scoped_guard(mutex, &dev->lock)
+ engines_allowed = dev->config.engines_allowed;
+ config_group_put(&dev->group);
- return len;
+ return engines_allowed;
}
static ssize_t engines_allowed_show(struct config_item *item, char *page)
@@ -600,59 +869,117 @@ static ssize_t engines_allowed_store(struct config_item *item, const char *page,
return len;
}
-static ssize_t enable_psmi_show(struct config_item *item, char *page)
+static u64 get_gt_types_allowed(struct pci_dev *pdev)
{
- struct xe_config_device *dev = to_xe_config_device(item);
-
- return sprintf(page, "%d\n", dev->enable_psmi);
-}
+ struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+ u64 mask;
-static ssize_t enable_psmi_store(struct config_item *item, const char *page, size_t len)
-{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
- bool val;
- int ret;
+ if (!dev)
+ return device_defaults.gt_types_allowed;
- ret = kstrtobool(page, &val);
- if (ret)
- return ret;
+ scoped_guard(mutex, &dev->lock)
+ mask = dev->config.gt_types_allowed;
+ config_group_put(&dev->group);
- guard(mutex)(&dev->lock);
- if (is_bound(dev))
- return -EBUSY;
+ return mask;
+}
- dev->config.enable_psmi = val;
+/**
+ * xe_configfs_primary_gt_allowed - determine whether primary GTs are supported
+ * @pdev: pci device
+ *
+ * Return: True if primary GTs are enabled, false if they have been disabled via
+ * configfs.
+ */
+bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev)
+{
+ return get_gt_types_allowed(pdev) & BIT_ULL(XE_GT_TYPE_MAIN);
+}
- return len;
+/**
+ * xe_configfs_media_gt_allowed - determine whether media GTs are supported
+ * @pdev: pci device
+ *
+ * Return: True if the media GTs are enabled, false if they have been disabled
+ * via configfs.
+ */
+bool xe_configfs_media_gt_allowed(struct pci_dev *pdev)
+{
+ return get_gt_types_allowed(pdev) & BIT_ULL(XE_GT_TYPE_MEDIA);
}
-static ssize_t enable_multi_queue_show(struct config_item *item, char *page)
+static ssize_t gt_types_allowed_show(struct config_item *item, char *page)
{
struct xe_config_device *dev = to_xe_config_device(item);
+ char *p = page;
- return sprintf(page, "%d\n", dev->enable_multi_queue);
+ for (size_t i = 0; i < ARRAY_SIZE(gt_types); i++)
+ if (dev->gt_types_allowed & BIT_ULL(gt_types[i].type))
+ p += sprintf(p, "%s\n", gt_types[i].name);
+
+ return p - page;
}
-static ssize_t enable_multi_queue_store(struct config_item *item, const char *page,
- size_t len)
+static ssize_t gt_types_allowed_store(struct config_item *item, const char *page,
+ size_t len)
{
struct xe_config_group_device *dev = to_xe_config_group_device(item);
- bool val;
- int ret;
+ char *buf __free(kfree) = kstrdup(page, GFP_KERNEL);
+ char *p = buf;
+ u64 typemask = 0;
- ret = kstrtobool(page, &val);
- if (ret)
- return ret;
+ if (!buf)
+ return -ENOMEM;
+
+ while (p) {
+ char *typename = strsep(&p, ",\n");
+ bool matched = false;
+
+ if (typename[0] == '\0')
+ continue;
+
+ for (size_t i = 0; i < ARRAY_SIZE(gt_types); i++) {
+ if (strcmp(typename, gt_types[i].name) == 0) {
+ typemask |= BIT(gt_types[i].type);
+ matched = true;
+ break;
+ }
+ }
+
+ if (!matched)
+ return -EINVAL;
+ }
guard(mutex)(&dev->lock);
if (is_bound(dev))
return -EBUSY;
- dev->config.enable_multi_queue = val;
+ dev->config.gt_types_allowed = typemask;
return len;
}
+/**
+ * xe_configfs_get_migrate_ulls_period_ms - get configfs migrate_ulls_period_ms setting
+ * @pdev: pci device
+ *
+ * Return: Migrate ULLS period in milliseconds (zero is disabled).
+ */
+u32 xe_configfs_get_migrate_ulls_period_ms(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+ u32 ret;
+
+ if (!dev)
+ return device_defaults.migrate_ulls_period_ms;
+
+ scoped_guard(mutex, &dev->lock)
+ ret = dev->config.migrate_ulls_period_ms;
+ config_group_put(&dev->group);
+
+ return ret;
+}
+
static ssize_t migrate_ulls_period_ms_show(struct config_item *item, char *page)
{
struct xe_config_device *dev = to_xe_config_device(item);
@@ -680,292 +1007,220 @@ static ssize_t migrate_ulls_period_ms_store(struct config_item *item,
return len;
}
-static ssize_t enable_vram_page_offline_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = to_xe_config_device(item);
-
- return sprintf(page, "%s\n", str_yes_no(dev->enable_vram_page_offline));
-}
-
-static ssize_t enable_vram_page_offline_store(struct config_item *item,
- const char *page, size_t len)
-{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
- bool val;
- int ret;
-
- ret = kstrtobool(page, &val);
- if (ret)
- return ret;
-
- guard(mutex)(&dev->lock);
- if (is_bound(dev))
- return -EBUSY;
-
- dev->config.enable_vram_page_offline = val;
-
- return len;
-}
-
-static bool wa_bb_read_advance(bool dereference, char **p,
- const char *append, size_t len,
- size_t *max_size)
-{
- if (dereference) {
- if (len >= *max_size)
- return false;
- *max_size -= len;
- if (append)
- memcpy(*p, append, len);
- }
-
- *p += len;
-
- return true;
-}
-
-static ssize_t wa_bb_show(struct xe_config_group_device *dev,
- struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
- char *data, size_t sz)
+/**
+ * xe_configfs_get_survivability_mode - get configfs survivability mode attribute
+ * @pdev: pci device
+ *
+ * Return: survivability_mode attribute in configfs
+ */
+u8 xe_configfs_get_survivability_mode(struct pci_dev *pdev)
{
- char *p = data;
-
- guard(mutex)(&dev->lock);
-
- for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
- enum xe_engine_class ec = engine_info[i].engine_class;
- size_t len;
-
- if (!wa_bb[ec].len)
- continue;
-
- len = snprintf(p, sz, "%s:", engine_info[i].cls);
- if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
- return -ENOBUFS;
-
- for (size_t j = 0; j < wa_bb[ec].len; j++) {
- len = snprintf(p, sz, " %08x", wa_bb[ec].cs[j]);
- if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
- return -ENOBUFS;
- }
-
- if (!wa_bb_read_advance(data, &p, "\n", 1, &sz))
- return -ENOBUFS;
- }
+ struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+ u8 mode;
- if (!wa_bb_read_advance(data, &p, "", 1, &sz))
- return -ENOBUFS;
+ if (!dev)
+ return device_defaults.survivability_mode;
- /* Reserve one more to match check for '\0' */
- if (!data)
- p++;
+ scoped_guard(mutex, &dev->lock)
+ mode = dev->config.survivability_mode;
+ config_group_put(&dev->group);
- return p - data;
+ return mode;
}
-static ssize_t ctx_restore_mid_bb_show(struct config_item *item, char *page)
+static ssize_t survivability_mode_show(struct config_item *item, char *page)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ struct xe_config_device *dev = to_xe_config_device(item);
- return wa_bb_show(dev, dev->config.ctx_restore_mid_bb, page, SZ_4K);
+ return sprintf(page, "%u\n", dev->survivability_mode);
}
-static ssize_t ctx_restore_post_bb_show(struct config_item *item, char *page)
+static ssize_t survivability_mode_store(struct config_item *item, const char *page, size_t len)
{
struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ u8 survivability_mode;
+ int ret;
- return wa_bb_show(dev, dev->config.ctx_restore_post_bb, page, SZ_4K);
-}
+ ret = kstrtou8(page, 0, &survivability_mode);
+ if (ret)
+ return ret;
-static void wa_bb_append(struct wa_bb *wa_bb, u32 val)
-{
- if (wa_bb->cs)
- wa_bb->cs[wa_bb->len] = val;
+ if (survivability_mode & ~XE_CONFIGFS_SURVIVABILITY_MASK)
+ return -EINVAL;
- wa_bb->len++;
+ guard(mutex)(&dev->lock);
+ if (is_bound(dev))
+ return -EBUSY;
+
+ dev->config.survivability_mode = survivability_mode;
+
+ return len;
}
-static ssize_t parse_hex(const char *line, u32 *pval)
+/**
+ * xe_configfs_get_enable_multi_queue - get configfs enable_multi_queue setting
+ * @pdev: pci device
+ *
+ * Return: true if multi-queue is enabled for this device (the default),
+ * false if it has been force-disabled via configfs.
+ */
+bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev)
{
- char numstr[12];
- const char *p;
- ssize_t numlen;
+ struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+ bool ret;
- p = line + strspn(line, " \t");
- if (!*p || *p == '\n')
- return 0;
+ if (!dev)
+ return true;
- numlen = strcspn(p, " \t\n");
- if (!numlen || numlen >= sizeof(numstr) - 1)
- return -EINVAL;
+ scoped_guard(mutex, &dev->lock)
+ ret = dev->config.enable_multi_queue;
+ config_group_put(&dev->group);
- memcpy(numstr, p, numlen);
- numstr[numlen] = '\0';
- p += numlen;
+ return ret;
+}
- if (kstrtou32(numstr, 16, pval))
- return -EINVAL;
+static ssize_t enable_multi_queue_show(struct config_item *item, char *page)
+{
+ struct xe_config_device *dev = to_xe_config_device(item);
- return p - line;
+ return sprintf(page, "%d\n", dev->enable_multi_queue);
}
-/*
- * Parse lines with the format
- *
- * <engine-class> cmd <u32> <u32...>
- * <engine-class> reg <u32_addr> <u32_val>
- *
- * and optionally save them in @wa_bb[i].cs is non-NULL.
- *
- * Return the number of dwords parsed.
- */
-static ssize_t parse_wa_bb_lines(const char *lines,
- struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX])
+static ssize_t enable_multi_queue_store(struct config_item *item, const char *page,
+ size_t len)
{
- ssize_t dwords = 0, ret;
- const char *p;
+ struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ bool val;
+ int ret;
- /*
- * Each iteration consumes at least the engine class token if it doesn't
- * error out, so the loop always makes progress without advancing @p.
- */
- for (p = lines; *p;) {
- const struct engine_info *info = NULL;
- u32 val, val2;
+ ret = kstrtobool(page, &val);
+ if (ret)
+ return ret;
- /* Also allow empty lines */
- p += strspn(p, " \t\n");
- if (!*p)
- break;
+ guard(mutex)(&dev->lock);
+ if (is_bound(dev))
+ return -EBUSY;
- ret = parse_engine(p, " \t\n", NULL, &info);
- if (ret < 0)
- return ret;
+ dev->config.enable_multi_queue = val;
- p += ret;
- p += strspn(p, " \t");
+ return len;
+}
- if (str_has_prefix(p, "cmd")) {
- for (p += strlen("cmd"); *p;) {
- ret = parse_hex(p, &val);
- if (ret < 0)
- return -EINVAL;
- if (!ret)
- break;
+/**
+ * xe_configfs_get_psmi_enabled - get configfs enable_psmi setting
+ * @pdev: pci device
+ *
+ * Return: enable_psmi setting in configfs
+ */
+bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+ bool ret;
- p += ret;
- dwords++;
- wa_bb_append(&wa_bb[info->engine_class], val);
- }
- } else if (str_has_prefix(p, "reg")) {
- p += strlen("reg");
- ret = parse_hex(p, &val);
- if (ret <= 0)
- return -EINVAL;
+ if (!dev)
+ return false;
- p += ret;
- ret = parse_hex(p, &val2);
- if (ret <= 0)
- return -EINVAL;
+ scoped_guard(mutex, &dev->lock)
+ ret = dev->config.enable_psmi;
+ config_group_put(&dev->group);
- p += ret;
- dwords += 3;
- wa_bb_append(&wa_bb[info->engine_class],
- MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1));
- wa_bb_append(&wa_bb[info->engine_class], val);
- wa_bb_append(&wa_bb[info->engine_class], val2);
- } else {
- return -EINVAL;
- }
- }
+ return ret;
+}
- return dwords;
+static ssize_t enable_psmi_show(struct config_item *item, char *page)
+{
+ struct xe_config_device *dev = to_xe_config_device(item);
+
+ return sprintf(page, "%d\n", dev->enable_psmi);
}
-static ssize_t wa_bb_store(struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
- struct xe_config_group_device *dev,
- const char *page, size_t len)
+static ssize_t enable_psmi_store(struct config_item *item, const char *page, size_t len)
{
- /* tmp_wa_bb must match wa_bb's size */
- struct wa_bb tmp_wa_bb[XE_ENGINE_CLASS_MAX] = { };
- ssize_t count, class;
- u32 *tmp;
+ struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ bool val;
+ int ret;
- /* 1. Count dwords - wa_bb[i].cs is NULL for all classes */
- count = parse_wa_bb_lines(page, tmp_wa_bb);
- if (count < 0)
- return count;
+ ret = kstrtobool(page, &val);
+ if (ret)
+ return ret;
guard(mutex)(&dev->lock);
-
if (is_bound(dev))
return -EBUSY;
- /*
- * 2. Allocate a u32 array and set the pointers to the right positions
- * according to the length of each class' wa_bb
- */
- tmp = krealloc(wa_bb[0].cs, count * sizeof(u32), GFP_KERNEL);
- if (!tmp)
- return -ENOMEM;
+ dev->config.enable_psmi = val;
- if (!count) {
- memset(wa_bb, 0, sizeof(tmp_wa_bb));
- return len;
- }
+ return len;
+}
- for (class = 0, count = 0; class < XE_ENGINE_CLASS_MAX; ++class) {
- tmp_wa_bb[class].cs = tmp + count;
- count += tmp_wa_bb[class].len;
- tmp_wa_bb[class].len = 0;
- }
+/**
+ * xe_configfs_get_enable_vram_page_offline - get configfs enable_vram_page_offline setting
+ * @pdev: pci device
+ *
+ * Return: enable_vram_page_offline setting in configfs
+ */
+bool xe_configfs_get_enable_vram_page_offline(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+ bool ret;
- /* 3. Parse wa_bb lines again, this time saving the values */
- count = parse_wa_bb_lines(page, tmp_wa_bb);
- if (count < 0)
- return count;
+ if (!dev)
+ return device_defaults.enable_vram_page_offline;
- memcpy(wa_bb, tmp_wa_bb, sizeof(tmp_wa_bb));
+ scoped_guard(mutex, &dev->lock)
+ ret = dev->config.enable_vram_page_offline;
+ config_group_put(&dev->group);
- return len;
+ return ret;
}
-static ssize_t ctx_restore_mid_bb_store(struct config_item *item,
- const char *data, size_t sz)
+static ssize_t enable_vram_page_offline_show(struct config_item *item, char *page)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ struct xe_config_device *dev = to_xe_config_device(item);
- return wa_bb_store(dev->config.ctx_restore_mid_bb, dev, data, sz);
+ return sprintf(page, "%s\n", str_yes_no(dev->enable_vram_page_offline));
}
-static ssize_t ctx_restore_post_bb_store(struct config_item *item,
- const char *data, size_t sz)
+static ssize_t enable_vram_page_offline_store(struct config_item *item,
+ const char *page, size_t len)
{
struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ bool val;
+ int ret;
- return wa_bb_store(dev->config.ctx_restore_post_bb, dev, data, sz);
+ ret = kstrtobool(page, &val);
+ if (ret)
+ return ret;
+
+ guard(mutex)(&dev->lock);
+ if (is_bound(dev))
+ return -EBUSY;
+
+ dev->config.enable_vram_page_offline = val;
+
+ return len;
}
CONFIGFS_ATTR(, ctx_restore_mid_bb);
CONFIGFS_ATTR(, ctx_restore_post_bb);
-CONFIGFS_ATTR(, enable_multi_queue);
-CONFIGFS_ATTR(, migrate_ulls_period_ms);
-CONFIGFS_ATTR(, enable_psmi);
-CONFIGFS_ATTR(, enable_vram_page_offline);
CONFIGFS_ATTR(, engines_allowed);
CONFIGFS_ATTR(, gt_types_allowed);
+CONFIGFS_ATTR(, migrate_ulls_period_ms);
CONFIGFS_ATTR(, survivability_mode);
+CONFIGFS_ATTR(, enable_multi_queue);
+CONFIGFS_ATTR(, enable_psmi);
+CONFIGFS_ATTR(, enable_vram_page_offline);
static struct configfs_attribute *xe_config_device_attrs[] = {
&attr_ctx_restore_mid_bb,
&attr_ctx_restore_post_bb,
- &attr_enable_multi_queue,
- &attr_migrate_ulls_period_ms,
- &attr_enable_psmi,
- &attr_enable_vram_page_offline,
&attr_engines_allowed,
&attr_gt_types_allowed,
+ &attr_migrate_ulls_period_ms,
&attr_survivability_mode,
+ &attr_enable_multi_queue,
+ &attr_enable_psmi,
+ &attr_enable_vram_page_offline,
NULL,
};
@@ -1242,13 +1497,13 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
dev->config.attr_); \
} while (0)
- PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
PRI_CUSTOM_ATTR("%llx", engines_allowed);
+ PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
PRI_CUSTOM_ATTR("%u", migrate_ulls_period_ms);
+ PRI_CUSTOM_ATTR("%u", survivability_mode);
PRI_CUSTOM_ATTR("%d", enable_multi_queue);
PRI_CUSTOM_ATTR("%d", enable_psmi);
PRI_CUSTOM_ATTR("%d", enable_vram_page_offline);
- PRI_CUSTOM_ATTR("%u", survivability_mode);
PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
#undef PRI_CUSTOM_ATTR
@@ -1277,247 +1532,6 @@ void xe_configfs_check_device(struct pci_dev *pdev)
config_group_put(&dev->group);
}
-/**
- * xe_configfs_get_survivability_mode - get configfs survivability mode attribute
- * @pdev: pci device
- *
- * Return: survivability_mode attribute in configfs
- */
-u8 xe_configfs_get_survivability_mode(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- u8 mode;
-
- if (!dev)
- return device_defaults.survivability_mode;
-
- scoped_guard(mutex, &dev->lock)
- mode = dev->config.survivability_mode;
- config_group_put(&dev->group);
-
- return mode;
-}
-
-static u64 get_gt_types_allowed(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- u64 mask;
-
- if (!dev)
- return device_defaults.gt_types_allowed;
-
- scoped_guard(mutex, &dev->lock)
- mask = dev->config.gt_types_allowed;
- config_group_put(&dev->group);
-
- return mask;
-}
-
-/**
- * xe_configfs_primary_gt_allowed - determine whether primary GTs are supported
- * @pdev: pci device
- *
- * Return: True if primary GTs are enabled, false if they have been disabled via
- * configfs.
- */
-bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev)
-{
- return get_gt_types_allowed(pdev) & BIT_ULL(XE_GT_TYPE_MAIN);
-}
-
-/**
- * xe_configfs_media_gt_allowed - determine whether media GTs are supported
- * @pdev: pci device
- *
- * Return: True if the media GTs are enabled, false if they have been disabled
- * via configfs.
- */
-bool xe_configfs_media_gt_allowed(struct pci_dev *pdev)
-{
- return get_gt_types_allowed(pdev) & BIT_ULL(XE_GT_TYPE_MEDIA);
-}
-
-/**
- * xe_configfs_get_engines_allowed - get engine allowed mask from configfs
- * @pdev: pci device
- *
- * Return: engine mask with allowed engines set in configfs
- */
-u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- u64 engines_allowed;
-
- if (!dev)
- return device_defaults.engines_allowed;
-
- scoped_guard(mutex, &dev->lock)
- engines_allowed = dev->config.engines_allowed;
- config_group_put(&dev->group);
-
- return engines_allowed;
-}
-
-/**
- * xe_configfs_get_psmi_enabled - get configfs enable_psmi setting
- * @pdev: pci device
- *
- * Return: enable_psmi setting in configfs
- */
-bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- bool ret;
-
- if (!dev)
- return false;
-
- scoped_guard(mutex, &dev->lock)
- ret = dev->config.enable_psmi;
- config_group_put(&dev->group);
-
- return ret;
-}
-
-/**
- * xe_configfs_get_enable_multi_queue - get configfs enable_multi_queue setting
- * @pdev: pci device
- *
- * Return: true if multi-queue is enabled for this device (the default),
- * false if it has been force-disabled via configfs.
- */
-bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- bool ret;
-
- if (!dev)
- return true;
-
- scoped_guard(mutex, &dev->lock)
- ret = dev->config.enable_multi_queue;
- config_group_put(&dev->group);
-
- return ret;
-}
-
-/**
- * xe_configfs_get_migrate_ulls_period_ms - get configfs migrate_ulls_period_ms setting
- * @pdev: pci device
- *
- * Return: Migrate ULLS period in milliseconds (zero is disabled).
- */
-u32 xe_configfs_get_migrate_ulls_period_ms(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- u32 ret;
-
- if (!dev)
- return device_defaults.migrate_ulls_period_ms;
-
- ret = dev->config.migrate_ulls_period_ms;
- config_group_put(&dev->group);
-
- return ret;
-}
-
-/**
- * xe_configfs_get_enable_vram_page_offline - get configfs enable_vram_page_offline setting
- * @pdev: pci device
- *
- * Return: enable_vram_page_offline setting in configfs
- */
-bool xe_configfs_get_enable_vram_page_offline(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- bool ret;
-
- if (!dev)
- return device_defaults.enable_vram_page_offline;
-
- scoped_guard(mutex, &dev->lock)
- ret = dev->config.enable_vram_page_offline;
- config_group_put(&dev->group);
-
- return ret;
-}
-
-/**
- * xe_configfs_get_ctx_restore_mid_bb - get configfs ctx_restore_mid_bb setting
- * @pdev: pci device
- * @class: hw engine class
- * @cs: destination buffer for the batch, or NULL to only query the length
- * @max_len: capacity of @cs, in dwords
- *
- * Copy the configured batch into @cs while holding the configfs lock, so the
- * caller never gets a pointer to storage owned by the configfs group.
- *
- * Return: Number of dwords used in the mid_ctx_restore setting in configfs, or
- * -ENOSPC if it does not fit in @max_len
- */
-ssize_t xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- u32 *cs, size_t max_len)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- ssize_t len;
-
- if (!dev)
- return 0;
-
- scoped_guard(mutex, &dev->lock) {
- len = dev->config.ctx_restore_mid_bb[class].len;
- if (cs && len) {
- if (len > max_len)
- len = -ENOSPC;
- else
- memcpy(cs, dev->config.ctx_restore_mid_bb[class].cs,
- len * sizeof(u32));
- }
- }
- config_group_put(&dev->group);
-
- return len;
-}
-
-/**
- * xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
- * @pdev: pci device
- * @class: hw engine class
- * @cs: destination buffer for the batch, or NULL to only query the length
- * @max_len: capacity of @cs, in dwords
- *
- * Copy the configured batch into @cs while holding the configfs lock, so the
- * caller never gets a pointer to storage owned by the configfs group.
- *
- * Return: Number of dwords used in the post_ctx_restore setting in configfs, or
- * -ENOSPC if it does not fit in @max_len
- */
-ssize_t xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- u32 *cs, size_t max_len)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- ssize_t len;
-
- if (!dev)
- return 0;
-
- scoped_guard(mutex, &dev->lock) {
- len = dev->config.ctx_restore_post_bb[class].len;
- if (cs && len) {
- if (len > max_len)
- len = -ENOSPC;
- else
- memcpy(cs, dev->config.ctx_restore_post_bb[class].cs,
- len * sizeof(u32));
- }
- }
- config_group_put(&dev->group);
-
- return len;
-}
-
#ifdef CONFIG_PCI_IOV
/**
* xe_configfs_admin_only_pf() - Get PF's operational mode.
diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
index a5c081fc1672..275086e50451 100644
--- a/drivers/gpu/drm/xe/xe_configfs.h
+++ b/drivers/gpu/drm/xe/xe_configfs.h
@@ -30,20 +30,20 @@ struct pci_dev;
int xe_configfs_init(void);
void xe_configfs_exit(void);
void xe_configfs_check_device(struct pci_dev *pdev);
-u8 xe_configfs_get_survivability_mode(struct pci_dev *pdev);
-bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
-bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
-u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
-bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
-bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev);
-u32 xe_configfs_get_migrate_ulls_period_ms(struct pci_dev *pdev);
-bool xe_configfs_get_enable_vram_page_offline(struct pci_dev *pdev);
ssize_t xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
enum xe_engine_class class,
u32 *cs, size_t max_len);
ssize_t xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
enum xe_engine_class class,
u32 *cs, size_t max_len);
+u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
+bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
+bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
+u32 xe_configfs_get_migrate_ulls_period_ms(struct pci_dev *pdev);
+u8 xe_configfs_get_survivability_mode(struct pci_dev *pdev);
+bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev);
+bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
+bool xe_configfs_get_enable_vram_page_offline(struct pci_dev *pdev);
#ifdef CONFIG_PCI_IOV
unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev);
bool xe_configfs_admin_only_pf(struct pci_dev *pdev);
@@ -52,20 +52,20 @@ bool xe_configfs_admin_only_pf(struct pci_dev *pdev);
static inline int xe_configfs_init(void) { return 0; }
static inline void xe_configfs_exit(void) { }
static inline void xe_configfs_check_device(struct pci_dev *pdev) { }
-static inline u8 xe_configfs_get_survivability_mode(struct pci_dev *pdev) { return 0; }
-static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return true; }
-static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; }
-static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
-static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
-static inline bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev) { return true; }
-static inline u32 xe_configfs_get_migrate_ulls_period_ms(struct pci_dev *pdev) { return 5; }
-static inline bool xe_configfs_get_disable_vram_page_offline(struct pci_dev *pdev) { return false; }
static inline ssize_t xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
enum xe_engine_class class,
u32 *cs, size_t max_len) { return 0; }
static inline ssize_t xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
enum xe_engine_class class,
u32 *cs, size_t max_len) { return 0; }
+static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
+static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return true; }
+static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; }
+static inline u32 xe_configfs_get_migrate_ulls_period_ms(struct pci_dev *pdev) { return 5; }
+static inline u8 xe_configfs_get_survivability_mode(struct pci_dev *pdev) { return 0; }
+static inline bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev) { return true; }
+static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
+static inline bool xe_configfs_get_disable_vram_page_offline(struct pci_dev *pdev) { return false; }
#ifdef CONFIG_PCI_IOV
static inline unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev)
{
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 07/15] drm/xe: Split out configfs data structures
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
` (5 preceding siblings ...)
2026-10-05 19:06 ` [PATCH 06/15] drm/xe: Sort xe_config_device fields Stuart Summers
@ 2026-10-05 19:06 ` Stuart Summers
2026-10-05 19:06 ` [PATCH 08/15] drm/xe: Add a new debug focused configfs group Stuart Summers
` (11 subsequent siblings)
18 siblings, 0 replies; 21+ messages in thread
From: Stuart Summers @ 2026-10-05 19:06 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
gustavo.sousa, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Planning on moving debug specific configfs parameters
to their own file in a future patch. In preparation for
that change, move the structures in xe_configfs.c to a
new _types.h file so we can easily access them in the
different configfs files.
Doing that separately here instead of combining with
the patch that adds the debug file for ease of review.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: LLM
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/xe/xe_configfs.c | 43 --------------------
drivers/gpu/drm/xe/xe_configfs.h | 1 +
drivers/gpu/drm/xe/xe_configfs_types.h | 55 ++++++++++++++++++++++++++
3 files changed, 56 insertions(+), 43 deletions(-)
create mode 100644 drivers/gpu/drm/xe/xe_configfs_types.h
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 4a92a6f22311..16884fa035a8 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -4,7 +4,6 @@
*/
#include <linux/bitops.h>
-#include <linux/ctype.h>
#include <linux/configfs.h>
#include <linux/cleanup.h>
#include <linux/find.h>
@@ -17,10 +16,7 @@
#include "xe_configfs.h"
#include "xe_defaults.h"
#include "xe_gt_types.h"
-#include "xe_hw_engine_types.h"
#include "xe_module.h"
-#include "xe_pci_types.h"
-#include "xe_sriov_types.h"
/**
* DOC: Xe Configfs
@@ -290,45 +286,6 @@
* # rmdir /sys/kernel/config/xe/0000:03:00.0/
*/
-/* Similar to struct xe_bb, but not tied to HW (yet) */
-struct wa_bb {
- u32 *cs;
- u32 len; /* in dwords */
-};
-
-struct xe_config_group_device {
- struct config_group group;
- struct config_group sriov;
-
- /*
- * Fields sorted by type (largest first) then name: struct arrays,
- * u64, u32/unsigned int, u8, bool, sub-structs last. Within each
- * type, entries are sorted alphabetically.
- */
- struct xe_config_device {
- struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
- struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
- u64 engines_allowed;
- u64 gt_types_allowed;
- u32 migrate_ulls_period_ms;
- u8 survivability_mode;
- bool enable_multi_queue;
- bool enable_psmi;
- bool enable_vram_page_offline;
- struct {
- unsigned int max_vfs;
- bool admin_only_pf;
- } sriov;
- } config;
-
- /* protects attributes */
- struct mutex lock;
- /* matching descriptor */
- const struct xe_device_desc *desc;
- /* tentative SR-IOV mode */
- enum xe_sriov_mode mode;
-};
-
static const struct xe_config_device device_defaults = {
.engines_allowed = U64_MAX,
.gt_types_allowed = U64_MAX,
diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
index 275086e50451..c832de85b771 100644
--- a/drivers/gpu/drm/xe/xe_configfs.h
+++ b/drivers/gpu/drm/xe/xe_configfs.h
@@ -9,6 +9,7 @@
#include <linux/limits.h>
#include <linux/types.h>
+#include "xe_configfs_types.h"
#include "xe_defaults.h"
#include "xe_hw_engine_types.h"
#include "xe_module.h"
diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h b/drivers/gpu/drm/xe/xe_configfs_types.h
new file mode 100644
index 000000000000..b1e351761d69
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_configfs_types.h
@@ -0,0 +1,55 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+#ifndef _XE_CONFIGFS_TYPES_H_
+#define _XE_CONFIGFS_TYPES_H_
+
+#include <linux/configfs.h>
+#include <linux/mutex.h>
+#include <linux/types.h>
+
+#include "xe_hw_engine_types.h"
+#include "xe_pci_types.h"
+#include "xe_sriov_types.h"
+
+/* Similar to struct xe_bb, but not tied to HW (yet) */
+struct wa_bb {
+ u32 *cs;
+ u32 len; /* in dwords */
+};
+
+struct xe_config_group_device {
+ struct config_group group;
+ struct config_group sriov;
+
+ /*
+ * Fields sorted by type (largest first) then name: struct arrays,
+ * u64, u32/unsigned int, u8, bool, sub-structs last. Within each
+ * type, entries are sorted alphabetically.
+ */
+ struct xe_config_device {
+ struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
+ struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
+ u64 engines_allowed;
+ u64 gt_types_allowed;
+ u32 migrate_ulls_period_ms;
+ u8 survivability_mode;
+ bool enable_multi_queue;
+ bool enable_psmi;
+ bool enable_vram_page_offline;
+ struct {
+ unsigned int max_vfs;
+ bool admin_only_pf;
+ } sriov;
+ } config;
+
+ /* protects attributes */
+ struct mutex lock;
+ /* matching descriptor */
+ const struct xe_device_desc *desc;
+ /* tentative SR-IOV mode */
+ enum xe_sriov_mode mode;
+};
+
+#endif /* _XE_CONFIGFS_TYPES_H_ */
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 08/15] drm/xe: Add a new debug focused configfs group
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
` (6 preceding siblings ...)
2026-10-05 19:06 ` [PATCH 07/15] drm/xe: Split out configfs data structures Stuart Summers
@ 2026-10-05 19:06 ` Stuart Summers
2026-10-05 19:06 ` [PATCH 09/15] drm/xe: Move debug configfs entries to xe_configfs_debug.c Stuart Summers
` (10 subsequent siblings)
18 siblings, 0 replies; 21+ messages in thread
From: Stuart Summers @ 2026-10-05 19:06 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
gustavo.sousa, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Add the skeleton code for a new debug specific configfs group.
Just add the structure for now. Actual debug content will be
added in a subsequent patch.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: LLM
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/Makefile | 3 +++
drivers/gpu/drm/xe/xe_configfs.c | 5 +++++
drivers/gpu/drm/xe/xe_configfs_debug.c | 14 ++++++++++++++
drivers/gpu/drm/xe/xe_configfs_debug.h | 13 +++++++++++++
drivers/gpu/drm/xe/xe_configfs_types.h | 3 +++
5 files changed, 38 insertions(+)
create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.c
create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 10930c924070..23accd9e6503 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -167,6 +167,9 @@ xe-$(CONFIG_HWMON) += xe_hwmon.o
xe-$(CONFIG_PERF_EVENTS) += xe_pmu.o
xe-$(CONFIG_CONFIGFS_FS) += xe_configfs.o
+ifeq ($(CONFIG_CONFIGFS_FS),y)
+xe-$(CONFIG_DRM_XE_DEBUG) += xe_configfs_debug.o
+endif
# graphics virtualization (SR-IOV) support
xe-y += \
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 16884fa035a8..8c2c912594fa 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -14,6 +14,7 @@
#include "instructions/xe_mi_commands.h"
#include "xe_configfs.h"
+#include "xe_configfs_debug.h"
#include "xe_defaults.h"
#include "xe_gt_types.h"
#include "xe_module.h"
@@ -1407,6 +1408,10 @@ static struct config_group *xe_config_make_device_group(struct config_group *gro
config_group_init_type_name(&dev->sriov, "sriov", &xe_config_sriov_type);
configfs_add_default_group(&dev->sriov, &dev->group);
}
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
+ config_group_init_type_name(&dev->debug, "debug", &xe_configfs_debug_type);
+ configfs_add_default_group(&dev->debug, &dev->group);
+#endif
mutex_init(&dev->lock);
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c b/drivers/gpu/drm/xe/xe_configfs_debug.c
new file mode 100644
index 000000000000..45617282cec5
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include <linux/configfs.h>
+#include <linux/module.h>
+
+#include "xe_configfs_debug.h"
+#include "xe_configfs_types.h"
+
+const struct config_item_type xe_configfs_debug_type = {
+ .ct_owner = THIS_MODULE,
+};
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.h b/drivers/gpu/drm/xe/xe_configfs_debug.h
new file mode 100644
index 000000000000..5f938450aed2
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+#ifndef _XE_CONFIGFS_DEBUG_H_
+#define _XE_CONFIGFS_DEBUG_H_
+
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG) && IS_ENABLED(CONFIG_CONFIGFS_FS)
+struct config_item_type;
+extern const struct config_item_type xe_configfs_debug_type;
+#endif
+
+#endif /* _XE_CONFIGFS_DEBUG_H_ */
diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h b/drivers/gpu/drm/xe/xe_configfs_types.h
index b1e351761d69..3a9ab40d519b 100644
--- a/drivers/gpu/drm/xe/xe_configfs_types.h
+++ b/drivers/gpu/drm/xe/xe_configfs_types.h
@@ -22,6 +22,9 @@ struct wa_bb {
struct xe_config_group_device {
struct config_group group;
struct config_group sriov;
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
+ struct config_group debug;
+#endif
/*
* Fields sorted by type (largest first) then name: struct arrays,
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 09/15] drm/xe: Move debug configfs entries to xe_configfs_debug.c
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
` (7 preceding siblings ...)
2026-10-05 19:06 ` [PATCH 08/15] drm/xe: Add a new debug focused configfs group Stuart Summers
@ 2026-10-05 19:06 ` Stuart Summers
2026-10-05 19:06 ` [PATCH 10/15] drm/xe/guc: Add configfs support for guc_log_level Stuart Summers
` (9 subsequent siblings)
18 siblings, 0 replies; 21+ messages in thread
From: Stuart Summers @ 2026-10-05 19:06 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
gustavo.sousa, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Move the debug specific configfs attributes into the new
xe_configfs_debug.c file under a new debug configfs subdirectory.
Ensure these are wrapped in CONFIG_DRM_XE_DEBUG to allow finer grained
debug changes outside of more ABI specific configfs entries.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: LLM
---
drivers/gpu/drm/xe/xe_configfs.c | 1058 ++----------------------
drivers/gpu/drm/xe/xe_configfs.h | 88 +-
drivers/gpu/drm/xe/xe_configfs_debug.c | 979 ++++++++++++++++++++++
drivers/gpu/drm/xe/xe_configfs_debug.h | 42 +-
drivers/gpu/drm/xe/xe_configfs_types.h | 18 +-
drivers/gpu/drm/xe/xe_guc.c | 1 +
drivers/gpu/drm/xe/xe_guc_ads.c | 1 +
drivers/gpu/drm/xe/xe_hw_engine.c | 1 +
drivers/gpu/drm/xe/xe_lrc.c | 1 +
drivers/gpu/drm/xe/xe_pci.c | 1 +
drivers/gpu/drm/xe/xe_psmi.c | 1 +
drivers/gpu/drm/xe/xe_ras.c | 1 +
drivers/gpu/drm/xe/xe_rtp.c | 1 +
13 files changed, 1190 insertions(+), 1003 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 8c2c912594fa..8e5ebb3ecfa7 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -6,17 +6,14 @@
#include <linux/bitops.h>
#include <linux/configfs.h>
#include <linux/cleanup.h>
-#include <linux/find.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/string.h>
-#include "instructions/xe_mi_commands.h"
#include "xe_configfs.h"
#include "xe_configfs_debug.h"
#include "xe_defaults.h"
-#include "xe_gt_types.h"
#include "xe_module.h"
/**
@@ -55,13 +52,6 @@
* │ └── ...
* :
* └── 0000:03:00.0
- * ├── ctx_restore_mid_bb
- * ├── ctx_restore_post_bb
- * ├── enable_multi_queue
- * ├── enable_psmi
- * ├── enable_vram_page_offline
- * ├── engines_allowed
- * ├── gt_types_allowed
* ├── migrate_ulls_period_ms
* └── survivability_mode
*
@@ -75,158 +65,18 @@
* Configure Attributes
* ====================
*
- * Context restore BB
- * ------------------
- *
- * Allow to execute a batch buffer during any context switches. When the
- * GPU is restoring the context, it executes additional commands. It's useful
- * for testing additional workarounds and validating certain HW behaviors: it's
- * not intended for normal execution and will taint the kernel with TAINT_TEST
- * when used.
- *
- * The syntax allows to pass straight instructions to be executed by the engine
- * in a batch buffer or set specific registers.
- *
- * #. Generic instruction::
- *
- * <engine-class> cmd <instr> [[dword0] [dword1] [...]]
- *
- * #. Simple register setting::
- *
- * <engine-class> reg <address> <value>
- *
- * Commands are saved per engine class: all instances of that class will execute
- * those commands during context switch. The instruction, dword arguments,
- * addresses and values are in hex format like in the examples below.
- *
- * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the
- * normal context restore::
- *
- * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
- * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
- *
- * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 at the
- * beginning of the context restore::
- *
- * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
- * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bb
-
- * #. Load certain values in a couple of registers (it can be used as a simpler
- * alternative to the `cmd`) action::
- *
- * # cat > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb <<EOF
- * rcs reg 4F100 DEADBEEF
- * rcs reg 4F104 FFFFFFFF
- * EOF
- *
- * .. note::
- *
- * When using multiple lines, make sure to use a command that is
- * implemented with a single write syscall, like HEREDOC.
- *
- * Currently this is implemented only for post and mid context restore and
- * these attributes can only be set before binding to the device.
- *
- * Enable multi-queue
- * ------------------
- *
- * Multi-queue support on the device is enabled by default where the
- * hardware supports it. Writing 0 force-disables multi-queue support:
- * multi-queue exec-queue group creation via ioctl is refused, and the
- * GuC feature is disabled::
- *
- * # echo 0 > /sys/kernel/config/xe/0000:03:00.0/enable_multi_queue
- *
- * This attribute can only be set before binding to the device.
- *
- * PSMI
- * ----
- *
- * Enable extra debugging capabilities to trace engine execution. Only useful
- * during early platform enabling and requires additional hardware connected.
- * Once it's enabled, additionals WAs are added and runtime configuration is
- * done via debugfs. Example to enable it::
- *
- * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_psmi
- *
- * This attribute can only be set before binding to the device.
- *
- * Enable VRAM page offline:
- * -------------------------
- *
- * 0, n, N, false - Disable vram page offline (Logging only)
- * 1, y, Y, true - Enable vram page offline (Offlining is active - default)
- *
- * Example to disable VRAM offline::
- *
- * # echo 0 > /sys/kernel/config/xe/0000:03:00.0/enable_vram_page_offline
- *
- * This attribute can only be set on CRI before binding to the device.
- *
- * Allowed engines:
- * ----------------
- *
- * Allow only a set of engine(s) to be available, disabling the other engines
- * even if they are available in hardware. This is applied after HW fuses are
- * considered on each tile. Examples:
- *
- * Allow only one render and one copy engines, nothing else::
- *
- * # echo 'rcs0,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowed
- *
- * Allow only compute engines and first copy engine::
- *
- * # echo 'ccs*,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowed
- *
- * Note that the engine names are the per-GT hardware names. On multi-tile
- * platforms, writing ``rcs0,bcs0`` to this file would allow the first render
- * and copy engines on each tile.
- *
- * The requested configuration may not be supported by the platform and driver
- * may fail to probe. For example: if at least one copy engine is expected to be
- * available for migrations, but it's disabled. This is intended for debugging
- * purposes only.
- *
- * This attribute can only be set before binding to the device.
- *
- * Allowed GT types:
- * -----------------
+ * Survivability mode:
+ * -------------------
*
- * Allow only specific types of GTs to be detected and initialized by the
- * driver. Any combination of GT types can be enabled/disabled, although
- * some settings will cause the device to fail to probe.
+ * Enable survivability mode on supported cards. This is a bitmap; bit 0
+ * enables survivability mode and is currently the only bit defined, so the
+ * only accepted values remain 0 and 1. This setting only takes effect when
+ * probing the device. Example to enable it::
*
- * Writes support both comma- and newline-separated input format. Reads
- * will always return one GT type per line. "primary" and "media" are the
- * GT type names supported by this interface.
+ * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_mode
*
* This attribute can only be set before binding to the device.
*
- * Examples:
- *
- * Allow both primary and media GTs to be initialized and used. This matches
- * the driver's default behavior::
- *
- * # echo 'primary,media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
- *
- * Allow only the primary GT of each tile to be initialized and used,
- * effectively disabling the media GT if it exists on the platform::
- *
- * # echo 'primary' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
- *
- * Allow only the media GT of each tile to be initialized and used,
- * effectively disabling the primary GT. **This configuration will cause
- * device probe failure on all current platforms, but may be allowed on
- * igpu platforms in the future**::
- *
- * # echo 'media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
- *
- * Disable all GTs. Only other GPU IP (such as display) is potentially usable.
- * **This configuration will cause device probe failure on all current
- * platforms, but may be allowed on igpu platforms in the future**::
- *
- * # echo '' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
- *
* Migrate ULLS Period (ms)
* ------------------------
*
@@ -241,18 +91,6 @@
*
* This attribute can only be set before binding to the device.
*
- * Survivability mode:
- * -------------------
- *
- * Enable survivability mode on supported cards. This is a bitmap; bit 0
- * enables survivability mode and is currently the only bit defined, so the
- * only accepted values remain 0 and 1. This setting only takes effect when
- * probing the device. Example to enable it::
- *
- * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_mode
- *
- * This attribute can only be set before binding to the device.
- *
* Max SR-IOV Virtual Functions
* ----------------------------
*
@@ -287,14 +125,18 @@
* # rmdir /sys/kernel/config/xe/0000:03:00.0/
*/
-static const struct xe_config_device device_defaults = {
- .engines_allowed = U64_MAX,
- .gt_types_allowed = U64_MAX,
+const struct xe_config_device xe_configfs_device_defaults = {
.migrate_ulls_period_ms = 5,
.survivability_mode = 0,
- .enable_multi_queue = true,
- .enable_psmi = false,
- .enable_vram_page_offline = true,
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
+ .debug = {
+ .engines_allowed = U64_MAX,
+ .gt_types_allowed = U64_MAX,
+ .enable_multi_queue = true,
+ .enable_psmi = false,
+ .enable_vram_page_offline = true,
+ },
+#endif
.sriov = {
.max_vfs = XE_DEFAULT_MAX_VFS,
.admin_only_pf = XE_DEFAULT_ADMIN_ONLY_PF,
@@ -303,50 +145,22 @@ static const struct xe_config_device device_defaults = {
static void set_device_defaults(struct xe_config_device *config)
{
- *config = device_defaults;
+ *config = xe_configfs_device_defaults;
#ifdef CONFIG_PCI_IOV
config->sriov.max_vfs = xe_modparam.max_vfs;
#endif
}
-struct engine_info {
- const char *cls;
- u64 mask;
- enum xe_engine_class engine_class;
-};
-
-/* Some helpful macros to aid on the sizing of buffer allocation when parsing */
-#define MAX_ENGINE_CLASS_CHARS 5
-#define MAX_ENGINE_INSTANCE_CHARS 2
-
-static const struct engine_info engine_info[] = {
- { .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK, .engine_class = XE_ENGINE_CLASS_RENDER },
- { .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK, .engine_class = XE_ENGINE_CLASS_COPY },
- { .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_DECODE },
- { .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_ENHANCE },
- { .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK, .engine_class = XE_ENGINE_CLASS_COMPUTE },
- { .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK, .engine_class = XE_ENGINE_CLASS_OTHER },
-};
-
-static const struct {
- const char *name;
- enum xe_gt_type type;
-} gt_types[] = {
- { .name = "primary", .type = XE_GT_TYPE_MAIN },
- { .name = "media", .type = XE_GT_TYPE_MEDIA },
-};
-
-static struct xe_config_group_device *to_xe_config_group_device(struct config_item *item)
-{
- return container_of(to_config_group(item), struct xe_config_group_device, group);
-}
-
-static struct xe_config_device *to_xe_config_device(struct config_item *item)
-{
- return &to_xe_config_group_device(item)->config;
-}
-
-static bool is_bound(struct xe_config_group_device *dev)
+/**
+ * xe_configfs_is_bound - check whether the matching pci device is bound
+ * @dev: configfs group device
+ *
+ * Caller must hold @dev->lock.
+ *
+ * Return: true if the matching pci_dev is already bound to a driver,
+ * false otherwise.
+ */
+bool xe_configfs_is_bound(struct xe_config_group_device *dev)
{
unsigned int domain, bus, slot, function;
struct pci_dev *pdev;
@@ -371,598 +185,14 @@ static bool is_bound(struct xe_config_group_device *dev)
return ret;
}
-static struct xe_config_group_device *find_xe_config_group_device(struct pci_dev *pdev);
-
-/**
- * xe_configfs_get_ctx_restore_mid_bb - get configfs ctx_restore_mid_bb setting
- * @pdev: pci device
- * @class: hw engine class
- * @cs: destination buffer for the batch, or NULL to only query the length
- * @max_len: capacity of @cs, in dwords
- *
- * Copy the configured batch into @cs while holding the configfs lock, so the
- * caller never gets a pointer to storage owned by the configfs group.
- *
- * Return: Number of dwords used in the mid_ctx_restore setting in configfs, or
- * -ENOSPC if it does not fit in @max_len
- */
-ssize_t xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- u32 *cs, size_t max_len)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- ssize_t len;
-
- if (!dev)
- return 0;
-
- scoped_guard(mutex, &dev->lock) {
- len = dev->config.ctx_restore_mid_bb[class].len;
- if (cs && len) {
- if (len > max_len)
- len = -ENOSPC;
- else
- memcpy(cs, dev->config.ctx_restore_mid_bb[class].cs,
- len * sizeof(u32));
- }
- }
- config_group_put(&dev->group);
-
- return len;
-}
-
-/**
- * xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
- * @pdev: pci device
- * @class: hw engine class
- * @cs: destination buffer for the batch, or NULL to only query the length
- * @max_len: capacity of @cs, in dwords
- *
- * Copy the configured batch into @cs while holding the configfs lock, so the
- * caller never gets a pointer to storage owned by the configfs group.
- *
- * Return: Number of dwords used in the post_ctx_restore setting in configfs, or
- * -ENOSPC if it does not fit in @max_len
- */
-ssize_t xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- u32 *cs, size_t max_len)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- ssize_t len;
-
- if (!dev)
- return 0;
-
- scoped_guard(mutex, &dev->lock) {
- len = dev->config.ctx_restore_post_bb[class].len;
- if (cs && len) {
- if (len > max_len)
- len = -ENOSPC;
- else
- memcpy(cs, dev->config.ctx_restore_post_bb[class].cs,
- len * sizeof(u32));
- }
- }
- config_group_put(&dev->group);
-
- return len;
-}
-
-static bool wa_bb_read_advance(bool dereference, char **p,
- const char *append, size_t len,
- size_t *max_size)
-{
- if (dereference) {
- if (len >= *max_size)
- return false;
- *max_size -= len;
- if (append)
- memcpy(*p, append, len);
- }
-
- *p += len;
-
- return true;
-}
-
-static ssize_t wa_bb_show(struct xe_config_group_device *dev,
- struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
- char *data, size_t sz)
-{
- char *p = data;
-
- guard(mutex)(&dev->lock);
-
- for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
- enum xe_engine_class ec = engine_info[i].engine_class;
- size_t len;
-
- if (!wa_bb[ec].len)
- continue;
-
- len = snprintf(p, sz, "%s:", engine_info[i].cls);
- if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
- return -ENOBUFS;
-
- for (size_t j = 0; j < wa_bb[ec].len; j++) {
- len = snprintf(p, sz, " %08x", wa_bb[ec].cs[j]);
- if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
- return -ENOBUFS;
- }
-
- if (!wa_bb_read_advance(data, &p, "\n", 1, &sz))
- return -ENOBUFS;
- }
-
- if (!wa_bb_read_advance(data, &p, "", 1, &sz))
- return -ENOBUFS;
-
- /* Reserve one more to match check for '\0' */
- if (!data)
- p++;
-
- return p - data;
-}
-
-static ssize_t ctx_restore_mid_bb_show(struct config_item *item, char *page)
-{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
-
- return wa_bb_show(dev, dev->config.ctx_restore_mid_bb, page, SZ_4K);
-}
-
-static ssize_t ctx_restore_post_bb_show(struct config_item *item, char *page)
-{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
-
- return wa_bb_show(dev, dev->config.ctx_restore_post_bb, page, SZ_4K);
-}
-
-static void wa_bb_append(struct wa_bb *wa_bb, u32 val)
-{
- if (wa_bb->cs)
- wa_bb->cs[wa_bb->len] = val;
-
- wa_bb->len++;
-}
-
-static ssize_t parse_hex(const char *line, u32 *pval)
-{
- char numstr[12];
- const char *p;
- ssize_t numlen;
-
- p = line + strspn(line, " \t");
- if (!*p || *p == '\n')
- return 0;
-
- numlen = strcspn(p, " \t\n");
- if (!numlen || numlen >= sizeof(numstr) - 1)
- return -EINVAL;
-
- memcpy(numstr, p, numlen);
- numstr[numlen] = '\0';
- p += numlen;
-
- if (kstrtou32(numstr, 16, pval))
- return -EINVAL;
-
- return p - line;
-}
-
-static int parse_engine(const char *s, const char *end_chars, u64 *mask,
- const struct engine_info **pinfo);
-
-/*
- * Parse lines with the format
- *
- * <engine-class> cmd <u32> <u32...>
- * <engine-class> reg <u32_addr> <u32_val>
- *
- * and optionally save them in @wa_bb[i].cs is non-NULL.
- *
- * Return the number of dwords parsed.
- */
-static ssize_t parse_wa_bb_lines(const char *lines,
- struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX])
-{
- ssize_t dwords = 0, ret;
- const char *p;
-
- /*
- * Each iteration consumes at least the engine class token if it doesn't
- * error out, so the loop always makes progress without advancing @p.
- */
- for (p = lines; *p;) {
- const struct engine_info *info = NULL;
- u32 val, val2;
-
- /* Also allow empty lines */
- p += strspn(p, " \t\n");
- if (!*p)
- break;
-
- ret = parse_engine(p, " \t\n", NULL, &info);
- if (ret < 0)
- return ret;
-
- p += ret;
- p += strspn(p, " \t");
-
- if (str_has_prefix(p, "cmd")) {
- for (p += strlen("cmd"); *p;) {
- ret = parse_hex(p, &val);
- if (ret < 0)
- return -EINVAL;
- if (!ret)
- break;
-
- p += ret;
- dwords++;
- wa_bb_append(&wa_bb[info->engine_class], val);
- }
- } else if (str_has_prefix(p, "reg")) {
- p += strlen("reg");
- ret = parse_hex(p, &val);
- if (ret <= 0)
- return -EINVAL;
-
- p += ret;
- ret = parse_hex(p, &val2);
- if (ret <= 0)
- return -EINVAL;
-
- p += ret;
- dwords += 3;
- wa_bb_append(&wa_bb[info->engine_class],
- MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1));
- wa_bb_append(&wa_bb[info->engine_class], val);
- wa_bb_append(&wa_bb[info->engine_class], val2);
- } else {
- return -EINVAL;
- }
- }
-
- return dwords;
-}
-
-static ssize_t wa_bb_store(struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
- struct xe_config_group_device *dev,
- const char *page, size_t len)
-{
- /* tmp_wa_bb must match wa_bb's size */
- struct wa_bb tmp_wa_bb[XE_ENGINE_CLASS_MAX] = { };
- ssize_t count, class;
- u32 *tmp;
-
- /* 1. Count dwords - wa_bb[i].cs is NULL for all classes */
- count = parse_wa_bb_lines(page, tmp_wa_bb);
- if (count < 0)
- return count;
-
- guard(mutex)(&dev->lock);
-
- if (is_bound(dev))
- return -EBUSY;
-
- /*
- * 2. Allocate a u32 array and set the pointers to the right positions
- * according to the length of each class' wa_bb
- */
- tmp = krealloc(wa_bb[0].cs, count * sizeof(u32), GFP_KERNEL);
- if (!tmp)
- return -ENOMEM;
-
- if (!count) {
- memset(wa_bb, 0, sizeof(tmp_wa_bb));
- return len;
- }
-
- for (class = 0, count = 0; class < XE_ENGINE_CLASS_MAX; ++class) {
- tmp_wa_bb[class].cs = tmp + count;
- count += tmp_wa_bb[class].len;
- tmp_wa_bb[class].len = 0;
- }
-
- /* 3. Parse wa_bb lines again, this time saving the values */
- count = parse_wa_bb_lines(page, tmp_wa_bb);
- if (count < 0)
- return count;
-
- memcpy(wa_bb, tmp_wa_bb, sizeof(tmp_wa_bb));
-
- return len;
-}
-
-static ssize_t ctx_restore_mid_bb_store(struct config_item *item,
- const char *data, size_t sz)
-{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
-
- return wa_bb_store(dev->config.ctx_restore_mid_bb, dev, data, sz);
-}
-
-static ssize_t ctx_restore_post_bb_store(struct config_item *item,
- const char *data, size_t sz)
-{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
-
- return wa_bb_store(dev->config.ctx_restore_post_bb, dev, data, sz);
-}
-
-/**
- * xe_configfs_get_engines_allowed - get engine allowed mask from configfs
- * @pdev: pci device
- *
- * Return: engine mask with allowed engines set in configfs
- */
-u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- u64 engines_allowed;
-
- if (!dev)
- return device_defaults.engines_allowed;
-
- scoped_guard(mutex, &dev->lock)
- engines_allowed = dev->config.engines_allowed;
- config_group_put(&dev->group);
-
- return engines_allowed;
-}
-
-static ssize_t engines_allowed_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = to_xe_config_device(item);
- char *p = page;
-
- for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
- u64 mask = engine_info[i].mask;
-
- if ((dev->engines_allowed & mask) == mask) {
- p += sprintf(p, "%s*\n", engine_info[i].cls);
- } else if (mask & dev->engines_allowed) {
- u16 bit0 = __ffs64(mask), bit;
-
- mask &= dev->engines_allowed;
-
- for_each_set_bit(bit, (const unsigned long *)&mask, 64)
- p += sprintf(p, "%s%u\n", engine_info[i].cls,
- bit - bit0);
- }
- }
-
- return p - page;
-}
-
-/*
- * Lookup engine_info. If @mask is not NULL, reduce the mask according to the
- * instance in @pattern.
- *
- * Examples of inputs:
- * - lookup_engine_info("rcs0", &mask): return "rcs" entry from @engine_info and
- * mask == BIT_ULL(XE_HW_ENGINE_RCS0)
- * - lookup_engine_info("rcs*", &mask): return "rcs" entry from @engine_info and
- * mask == XE_HW_ENGINE_RCS_MASK
- * - lookup_engine_info("rcs", NULL): return "rcs" entry from @engine_info
- */
-static const struct engine_info *lookup_engine_info(const char *pattern, u64 *mask)
-{
- for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
- u8 instance;
- u16 bit;
-
- if (!str_has_prefix(pattern, engine_info[i].cls))
- continue;
-
- pattern += strlen(engine_info[i].cls);
- if (!mask)
- return *pattern ? NULL : &engine_info[i];
-
- if (!strcmp(pattern, "*")) {
- *mask = engine_info[i].mask;
- return &engine_info[i];
- }
-
- if (kstrtou8(pattern, 10, &instance))
- return NULL;
-
- bit = __ffs64(engine_info[i].mask) + instance;
- if (bit >= fls64(engine_info[i].mask))
- return NULL;
-
- *mask = BIT_ULL(bit);
- return &engine_info[i];
- }
-
- return NULL;
-}
-
-static int parse_engine(const char *s, const char *end_chars, u64 *mask,
- const struct engine_info **pinfo)
-{
- char buf[MAX_ENGINE_CLASS_CHARS + MAX_ENGINE_INSTANCE_CHARS + 1];
- const struct engine_info *info;
- size_t len;
-
- len = strcspn(s, end_chars);
- if (len >= sizeof(buf))
- return -EINVAL;
-
- memcpy(buf, s, len);
- buf[len] = '\0';
-
- info = lookup_engine_info(buf, mask);
- if (!info)
- return -ENOENT;
-
- if (pinfo)
- *pinfo = info;
-
- return len;
-}
-
-static ssize_t engines_allowed_store(struct config_item *item, const char *page,
- size_t len)
-{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
- ssize_t patternlen, p;
- u64 mask, val = 0;
-
- for (p = 0; p < len; p += patternlen + 1) {
- patternlen = parse_engine(page + p, ",\n", &mask, NULL);
- if (patternlen < 0)
- return -EINVAL;
-
- val |= mask;
- }
-
- guard(mutex)(&dev->lock);
- if (is_bound(dev))
- return -EBUSY;
-
- dev->config.engines_allowed = val;
-
- return len;
-}
-
-static u64 get_gt_types_allowed(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- u64 mask;
-
- if (!dev)
- return device_defaults.gt_types_allowed;
-
- scoped_guard(mutex, &dev->lock)
- mask = dev->config.gt_types_allowed;
- config_group_put(&dev->group);
-
- return mask;
-}
-
-/**
- * xe_configfs_primary_gt_allowed - determine whether primary GTs are supported
- * @pdev: pci device
- *
- * Return: True if primary GTs are enabled, false if they have been disabled via
- * configfs.
- */
-bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev)
-{
- return get_gt_types_allowed(pdev) & BIT_ULL(XE_GT_TYPE_MAIN);
-}
-
-/**
- * xe_configfs_media_gt_allowed - determine whether media GTs are supported
- * @pdev: pci device
- *
- * Return: True if the media GTs are enabled, false if they have been disabled
- * via configfs.
- */
-bool xe_configfs_media_gt_allowed(struct pci_dev *pdev)
-{
- return get_gt_types_allowed(pdev) & BIT_ULL(XE_GT_TYPE_MEDIA);
-}
-
-static ssize_t gt_types_allowed_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = to_xe_config_device(item);
- char *p = page;
-
- for (size_t i = 0; i < ARRAY_SIZE(gt_types); i++)
- if (dev->gt_types_allowed & BIT_ULL(gt_types[i].type))
- p += sprintf(p, "%s\n", gt_types[i].name);
-
- return p - page;
-}
-
-static ssize_t gt_types_allowed_store(struct config_item *item, const char *page,
- size_t len)
-{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
- char *buf __free(kfree) = kstrdup(page, GFP_KERNEL);
- char *p = buf;
- u64 typemask = 0;
-
- if (!buf)
- return -ENOMEM;
-
- while (p) {
- char *typename = strsep(&p, ",\n");
- bool matched = false;
-
- if (typename[0] == '\0')
- continue;
-
- for (size_t i = 0; i < ARRAY_SIZE(gt_types); i++) {
- if (strcmp(typename, gt_types[i].name) == 0) {
- typemask |= BIT(gt_types[i].type);
- matched = true;
- break;
- }
- }
-
- if (!matched)
- return -EINVAL;
- }
-
- guard(mutex)(&dev->lock);
- if (is_bound(dev))
- return -EBUSY;
-
- dev->config.gt_types_allowed = typemask;
-
- return len;
-}
-
-/**
- * xe_configfs_get_migrate_ulls_period_ms - get configfs migrate_ulls_period_ms setting
- * @pdev: pci device
- *
- * Return: Migrate ULLS period in milliseconds (zero is disabled).
- */
-u32 xe_configfs_get_migrate_ulls_period_ms(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- u32 ret;
-
- if (!dev)
- return device_defaults.migrate_ulls_period_ms;
-
- scoped_guard(mutex, &dev->lock)
- ret = dev->config.migrate_ulls_period_ms;
- config_group_put(&dev->group);
-
- return ret;
-}
-
-static ssize_t migrate_ulls_period_ms_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = to_xe_config_device(item);
-
- return sprintf(page, "%u\n", dev->migrate_ulls_period_ms);
-}
-
-static ssize_t migrate_ulls_period_ms_store(struct config_item *item,
- const char *page, size_t len)
+static void xe_config_device_release(struct config_item *item)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
- u32 val;
- int ret;
-
- ret = kstrtou32(page, 0, &val);
- if (ret)
- return ret;
-
- guard(mutex)(&dev->lock);
- if (is_bound(dev))
- return -EBUSY;
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
- dev->config.migrate_ulls_period_ms = val;
+ mutex_destroy(&dev->lock);
- return len;
+ xe_configfs_debug_release_config(&dev->config);
+ kfree(dev);
}
/**
@@ -973,11 +203,11 @@ static ssize_t migrate_ulls_period_ms_store(struct config_item *item,
*/
u8 xe_configfs_get_survivability_mode(struct pci_dev *pdev)
{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+ struct xe_config_group_device *dev = xe_configfs_find_group_device(pdev);
u8 mode;
if (!dev)
- return device_defaults.survivability_mode;
+ return xe_configfs_device_defaults.survivability_mode;
scoped_guard(mutex, &dev->lock)
mode = dev->config.survivability_mode;
@@ -988,14 +218,14 @@ u8 xe_configfs_get_survivability_mode(struct pci_dev *pdev)
static ssize_t survivability_mode_show(struct config_item *item, char *page)
{
- struct xe_config_device *dev = to_xe_config_device(item);
+ struct xe_config_device *dev = xe_configfs_to_device(item);
return sprintf(page, "%u\n", dev->survivability_mode);
}
static ssize_t survivability_mode_store(struct config_item *item, const char *page, size_t len)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
u8 survivability_mode;
int ret;
@@ -1007,7 +237,7 @@ static ssize_t survivability_mode_store(struct config_item *item, const char *pa
return -EINVAL;
guard(mutex)(&dev->lock);
- if (is_bound(dev))
+ if (xe_configfs_is_bound(dev))
return -EBUSY;
dev->config.survivability_mode = survivability_mode;
@@ -1016,183 +246,62 @@ static ssize_t survivability_mode_store(struct config_item *item, const char *pa
}
/**
- * xe_configfs_get_enable_multi_queue - get configfs enable_multi_queue setting
- * @pdev: pci device
- *
- * Return: true if multi-queue is enabled for this device (the default),
- * false if it has been force-disabled via configfs.
- */
-bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- bool ret;
-
- if (!dev)
- return true;
-
- scoped_guard(mutex, &dev->lock)
- ret = dev->config.enable_multi_queue;
- config_group_put(&dev->group);
-
- return ret;
-}
-
-static ssize_t enable_multi_queue_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = to_xe_config_device(item);
-
- return sprintf(page, "%d\n", dev->enable_multi_queue);
-}
-
-static ssize_t enable_multi_queue_store(struct config_item *item, const char *page,
- size_t len)
-{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
- bool val;
- int ret;
-
- ret = kstrtobool(page, &val);
- if (ret)
- return ret;
-
- guard(mutex)(&dev->lock);
- if (is_bound(dev))
- return -EBUSY;
-
- dev->config.enable_multi_queue = val;
-
- return len;
-}
-
-/**
- * xe_configfs_get_psmi_enabled - get configfs enable_psmi setting
- * @pdev: pci device
- *
- * Return: enable_psmi setting in configfs
- */
-bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- bool ret;
-
- if (!dev)
- return false;
-
- scoped_guard(mutex, &dev->lock)
- ret = dev->config.enable_psmi;
- config_group_put(&dev->group);
-
- return ret;
-}
-
-static ssize_t enable_psmi_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = to_xe_config_device(item);
-
- return sprintf(page, "%d\n", dev->enable_psmi);
-}
-
-static ssize_t enable_psmi_store(struct config_item *item, const char *page, size_t len)
-{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
- bool val;
- int ret;
-
- ret = kstrtobool(page, &val);
- if (ret)
- return ret;
-
- guard(mutex)(&dev->lock);
- if (is_bound(dev))
- return -EBUSY;
-
- dev->config.enable_psmi = val;
-
- return len;
-}
-
-/**
- * xe_configfs_get_enable_vram_page_offline - get configfs enable_vram_page_offline setting
+ * xe_configfs_get_migrate_ulls_period_ms - get configfs migrate_ulls_period_ms setting
* @pdev: pci device
*
- * Return: enable_vram_page_offline setting in configfs
+ * Return: Migrate ULLS period in milliseconds (zero is disabled).
*/
-bool xe_configfs_get_enable_vram_page_offline(struct pci_dev *pdev)
+u32 xe_configfs_get_migrate_ulls_period_ms(struct pci_dev *pdev)
{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- bool ret;
+ struct xe_config_group_device *dev = xe_configfs_find_group_device(pdev);
+ u32 ret;
if (!dev)
- return device_defaults.enable_vram_page_offline;
+ return xe_configfs_device_defaults.migrate_ulls_period_ms;
scoped_guard(mutex, &dev->lock)
- ret = dev->config.enable_vram_page_offline;
+ ret = dev->config.migrate_ulls_period_ms;
config_group_put(&dev->group);
return ret;
}
-static ssize_t enable_vram_page_offline_show(struct config_item *item, char *page)
+static ssize_t migrate_ulls_period_ms_show(struct config_item *item, char *page)
{
- struct xe_config_device *dev = to_xe_config_device(item);
+ struct xe_config_device *dev = xe_configfs_to_device(item);
- return sprintf(page, "%s\n", str_yes_no(dev->enable_vram_page_offline));
+ return sprintf(page, "%u\n", dev->migrate_ulls_period_ms);
}
-static ssize_t enable_vram_page_offline_store(struct config_item *item,
- const char *page, size_t len)
+static ssize_t migrate_ulls_period_ms_store(struct config_item *item,
+ const char *page, size_t len)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
- bool val;
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
+ u32 val;
int ret;
- ret = kstrtobool(page, &val);
+ ret = kstrtou32(page, 0, &val);
if (ret)
return ret;
guard(mutex)(&dev->lock);
- if (is_bound(dev))
+ if (xe_configfs_is_bound(dev))
return -EBUSY;
- dev->config.enable_vram_page_offline = val;
+ dev->config.migrate_ulls_period_ms = val;
return len;
}
-CONFIGFS_ATTR(, ctx_restore_mid_bb);
-CONFIGFS_ATTR(, ctx_restore_post_bb);
-CONFIGFS_ATTR(, engines_allowed);
-CONFIGFS_ATTR(, gt_types_allowed);
CONFIGFS_ATTR(, migrate_ulls_period_ms);
CONFIGFS_ATTR(, survivability_mode);
-CONFIGFS_ATTR(, enable_multi_queue);
-CONFIGFS_ATTR(, enable_psmi);
-CONFIGFS_ATTR(, enable_vram_page_offline);
static struct configfs_attribute *xe_config_device_attrs[] = {
- &attr_ctx_restore_mid_bb,
- &attr_ctx_restore_post_bb,
- &attr_engines_allowed,
- &attr_gt_types_allowed,
&attr_migrate_ulls_period_ms,
&attr_survivability_mode,
- &attr_enable_multi_queue,
- &attr_enable_psmi,
- &attr_enable_vram_page_offline,
NULL,
};
-static void xe_config_device_release(struct config_item *item)
-{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
-
- mutex_destroy(&dev->lock);
-
- kfree(dev->config.ctx_restore_mid_bb[0].cs);
- kfree(dev->config.ctx_restore_post_bb[0].cs);
- kfree(dev);
-}
-
static struct configfs_item_operations xe_config_device_ops = {
.release = xe_config_device_release,
};
@@ -1200,18 +309,13 @@ static struct configfs_item_operations xe_config_device_ops = {
static bool xe_config_device_is_visible(struct config_item *item,
struct configfs_attribute *attr, int n)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
if (attr == &attr_survivability_mode) {
if (!dev->desc->is_dgfx || dev->desc->platform < XE_BATTLEMAGE)
return false;
}
- if (attr == &attr_enable_vram_page_offline) {
- if (!dev->desc->is_dgfx || dev->desc->platform != XE_CRESCENTISLAND)
- return false;
- }
-
return true;
}
@@ -1228,7 +332,7 @@ static const struct config_item_type xe_config_device_type = {
static ssize_t sriov_max_vfs_show(struct config_item *item, char *page)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item->ci_parent);
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
guard(mutex)(&dev->lock);
@@ -1240,13 +344,13 @@ static ssize_t sriov_max_vfs_show(struct config_item *item, char *page)
static ssize_t sriov_max_vfs_store(struct config_item *item, const char *page, size_t len)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item->ci_parent);
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
unsigned int max_vfs;
int ret;
guard(mutex)(&dev->lock);
- if (is_bound(dev))
+ if (xe_configfs_is_bound(dev))
return -EBUSY;
ret = kstrtouint(page, 0, &max_vfs);
@@ -1262,7 +366,7 @@ static ssize_t sriov_max_vfs_store(struct config_item *item, const char *page, s
static ssize_t sriov_admin_only_pf_show(struct config_item *item, char *page)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item->ci_parent);
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
guard(mutex)(&dev->lock);
@@ -1271,13 +375,13 @@ static ssize_t sriov_admin_only_pf_show(struct config_item *item, char *page)
static ssize_t sriov_admin_only_pf_store(struct config_item *item, const char *page, size_t len)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item->ci_parent);
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
bool admin_only_pf;
int ret;
guard(mutex)(&dev->lock);
- if (is_bound(dev))
+ if (xe_configfs_is_bound(dev))
return -EBUSY;
ret = kstrtobool(page, &admin_only_pf);
@@ -1300,7 +404,7 @@ static struct configfs_attribute *xe_config_sriov_attrs[] = {
static bool xe_config_sriov_is_visible(struct config_item *item,
struct configfs_attribute *attr, int n)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item->ci_parent);
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
if (attr == &sriov_attr_max_vfs && dev->mode != XE_SRIOV_MODE_PF)
return false;
@@ -1436,7 +540,17 @@ static struct configfs_subsystem xe_configfs = {
},
};
-static struct xe_config_group_device *find_xe_config_group_device(struct pci_dev *pdev)
+/**
+ * xe_configfs_find_group_device() - Find a configfs group by PCI device.
+ * @pdev: the &pci_dev to look up
+ *
+ * Searches the configfs subsystem for a group whose name matches @pdev.
+ * If found, the returned group has an elevated reference count; the caller
+ * must call config_group_put() when done.
+ *
+ * Return: pointer to the matching &xe_config_group_device, or NULL.
+ */
+struct xe_config_group_device *xe_configfs_find_group_device(struct pci_dev *pdev)
{
struct config_item *item;
@@ -1447,25 +561,27 @@ static struct xe_config_group_device *find_xe_config_group_device(struct pci_dev
if (!item)
return NULL;
- return to_xe_config_group_device(item);
+ return xe_configfs_to_group_device(item);
}
static void dump_custom_dev_config(struct pci_dev *pdev,
struct xe_config_group_device *dev)
{
#define PRI_CUSTOM_ATTR(fmt_, attr_) do { \
- if (dev->config.attr_ != device_defaults.attr_) \
+ if (dev->config.attr_ != xe_configfs_device_defaults.attr_) \
pci_info(pdev, "configfs: " __stringify(attr_) " = " fmt_ "\n", \
dev->config.attr_); \
} while (0)
- PRI_CUSTOM_ATTR("%llx", engines_allowed);
- PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
PRI_CUSTOM_ATTR("%u", migrate_ulls_period_ms);
PRI_CUSTOM_ATTR("%u", survivability_mode);
- PRI_CUSTOM_ATTR("%d", enable_multi_queue);
- PRI_CUSTOM_ATTR("%d", enable_psmi);
- PRI_CUSTOM_ATTR("%d", enable_vram_page_offline);
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
+ PRI_CUSTOM_ATTR("%llx", debug.engines_allowed);
+ PRI_CUSTOM_ATTR("%llx", debug.gt_types_allowed);
+ PRI_CUSTOM_ATTR("%d", debug.enable_multi_queue);
+ PRI_CUSTOM_ATTR("%d", debug.enable_psmi);
+ PRI_CUSTOM_ATTR("%d", debug.enable_vram_page_offline);
+#endif
PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
#undef PRI_CUSTOM_ATTR
@@ -1480,13 +596,13 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
*/
void xe_configfs_check_device(struct pci_dev *pdev)
{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+ struct xe_config_group_device *dev = xe_configfs_find_group_device(pdev);
if (!dev)
return;
/* memcmp here is safe as both are zero-initialized */
- if (memcmp(&dev->config, &device_defaults, sizeof(dev->config))) {
+ if (memcmp(&dev->config, &xe_configfs_device_defaults, sizeof(dev->config))) {
pci_info(pdev, "Found custom settings in configfs\n");
dump_custom_dev_config(pdev, dev);
}
@@ -1508,7 +624,7 @@ void xe_configfs_check_device(struct pci_dev *pdev)
*/
bool xe_configfs_admin_only_pf(struct pci_dev *pdev)
{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+ struct xe_config_group_device *dev = xe_configfs_find_group_device(pdev);
bool admin_only_pf;
if (!dev)
@@ -1533,7 +649,7 @@ bool xe_configfs_admin_only_pf(struct pci_dev *pdev)
*/
unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev)
{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+ struct xe_config_group_device *dev = xe_configfs_find_group_device(pdev);
unsigned int max_vfs;
if (!dev)
diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
index c832de85b771..cb7185044d6a 100644
--- a/drivers/gpu/drm/xe/xe_configfs.h
+++ b/drivers/gpu/drm/xe/xe_configfs.h
@@ -14,7 +14,11 @@
#include "xe_hw_engine_types.h"
#include "xe_module.h"
+struct config_item;
struct pci_dev;
+struct xe_config_group_device;
+
+extern const struct xe_config_device xe_configfs_device_defaults;
/**
* DOC: survivability_mode configfs bits
@@ -28,23 +32,71 @@ struct pci_dev;
#define XE_CONFIGFS_SURVIVABILITY_MASK XE_CONFIGFS_SURVIVABILITY_ENABLE
#if IS_ENABLED(CONFIG_CONFIGFS_FS)
+/**
+ * xe_configfs_to_group_device() - Cast a config_item to &xe_config_group_device.
+ * @item: the &config_item embedded in the device group
+ *
+ * The @item must be the top-level device group's cg_item, not a subgroup item.
+ * Use xe_configfs_subgroup_to_group_device() for subgroup show/store callbacks.
+ *
+ * Return: pointer to the enclosing &xe_config_group_device.
+ */
+static inline struct xe_config_group_device *
+xe_configfs_to_group_device(struct config_item *item)
+{
+ return container_of(to_config_group(item), struct xe_config_group_device, group);
+}
+
+/**
+ * xe_configfs_to_device() - Cast a config_item to &xe_config_device.
+ * @item: the &config_item embedded in the device group
+ *
+ * Convenience wrapper around xe_configfs_to_group_device().
+ *
+ * Return: pointer to the &xe_config_device nested in the group.
+ */
+static inline struct xe_config_device *xe_configfs_to_device(struct config_item *item)
+{
+ return &xe_configfs_to_group_device(item)->config;
+}
+
+/**
+ * xe_configfs_subgroup_to_group_device() - Cast a subgroup item to &xe_config_group_device.
+ * @item: the &config_item of a subgroup (e.g. sriov or debug)
+ *
+ * In configfs, show/store callbacks for a subgroup's attributes receive the
+ * subgroup's cg_item, whose parent is the device group's cg_item.
+ * This helper walks up one level to return the enclosing device group.
+ *
+ * Return: pointer to the enclosing &xe_config_group_device.
+ */
+static inline struct xe_config_group_device *
+xe_configfs_subgroup_to_group_device(struct config_item *item)
+{
+ return xe_configfs_to_group_device(item->ci_parent);
+}
+
+/**
+ * xe_configfs_subgroup_to_device() - Cast a subgroup item to &xe_config_device.
+ * @item: the &config_item of a subgroup (e.g. sriov or debug)
+ *
+ * Convenience wrapper for a subgroup item to get the &xe_config_device.
+ *
+ * Return: pointer to the &xe_config_device nested in the parent device group.
+ */
+static inline struct xe_config_device *
+xe_configfs_subgroup_to_device(struct config_item *item)
+{
+ return xe_configfs_to_device(item->ci_parent);
+}
+
+bool xe_configfs_is_bound(struct xe_config_group_device *dev);
+struct xe_config_group_device *xe_configfs_find_group_device(struct pci_dev *pdev);
int xe_configfs_init(void);
void xe_configfs_exit(void);
void xe_configfs_check_device(struct pci_dev *pdev);
-ssize_t xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- u32 *cs, size_t max_len);
-ssize_t xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- u32 *cs, size_t max_len);
-u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
-bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
-bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
u32 xe_configfs_get_migrate_ulls_period_ms(struct pci_dev *pdev);
u8 xe_configfs_get_survivability_mode(struct pci_dev *pdev);
-bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev);
-bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
-bool xe_configfs_get_enable_vram_page_offline(struct pci_dev *pdev);
#ifdef CONFIG_PCI_IOV
unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev);
bool xe_configfs_admin_only_pf(struct pci_dev *pdev);
@@ -53,20 +105,8 @@ bool xe_configfs_admin_only_pf(struct pci_dev *pdev);
static inline int xe_configfs_init(void) { return 0; }
static inline void xe_configfs_exit(void) { }
static inline void xe_configfs_check_device(struct pci_dev *pdev) { }
-static inline ssize_t xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- u32 *cs, size_t max_len) { return 0; }
-static inline ssize_t xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- u32 *cs, size_t max_len) { return 0; }
-static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
-static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return true; }
-static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; }
static inline u32 xe_configfs_get_migrate_ulls_period_ms(struct pci_dev *pdev) { return 5; }
static inline u8 xe_configfs_get_survivability_mode(struct pci_dev *pdev) { return 0; }
-static inline bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev) { return true; }
-static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
-static inline bool xe_configfs_get_disable_vram_page_offline(struct pci_dev *pdev) { return false; }
#ifdef CONFIG_PCI_IOV
static inline unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev)
{
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c b/drivers/gpu/drm/xe/xe_configfs_debug.c
index 45617282cec5..a6800706eefa 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug.c
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
@@ -3,12 +3,991 @@
* Copyright © 2026 Intel Corporation
*/
+#include <linux/bitops.h>
#include <linux/configfs.h>
#include <linux/module.h>
+#include <linux/cleanup.h>
+#include <linux/find.h>
+#include <linux/pci.h>
+#include <linux/string.h>
+#include "abi/guc_log_abi.h"
+#include "instructions/xe_mi_commands.h"
+#include "xe_configfs.h"
#include "xe_configfs_debug.h"
#include "xe_configfs_types.h"
+#include "xe_gt_types.h"
+#include "xe_hw_engine_types.h"
+#include "xe_pci_types.h"
+
+/**
+ * DOC: Xe Configfs Debug Attributes
+ *
+ * Overview
+ * ========
+ *
+ * The following configfs attributes are only available when the kernel is
+ * built with ``CONFIG_DRM_XE_DEBUG=y``. They appear under the ``debug/``
+ * subdirectory of each xe configfs device. They are intended for hardware
+ * and driver debugging and are not stable ABI. Using them is "at your own
+ * risk".
+ *
+ * See the top-level ``Xe Configfs`` documentation in ``xe_configfs.c``
+ * for how to create, probe and remove configfs devices. Once a device
+ * directory exists, the driver populates it with a ``debug/`` subdirectory
+ * containing the entries described below::
+ *
+ * /sys/kernel/config/xe/
+ * └── 0000:03:00.0
+ * └── debug/
+ * ├── ctx_restore_mid_bb
+ * ├── ctx_restore_post_bb
+ * ├── enable_multi_queue
+ * ├── enable_psmi
+ * ├── enable_vram_page_offline
+ * ├── engines_allowed
+ * └── gt_types_allowed
+ *
+ * Configure Attributes
+ * ====================
+ *
+ * Context restore BB
+ * ------------------
+ *
+ * Allow to execute a batch buffer during any context switches. When the
+ * GPU is restoring the context, it executes additional commands. It's useful
+ * for testing additional workarounds and validating certain HW behaviors: it's
+ * not intended for normal execution and will taint the kernel with TAINT_TEST
+ * when used.
+ *
+ * The syntax allows to pass straight instructions to be executed by the engine
+ * in a batch buffer or set specific registers.
+ *
+ * #. Generic instruction::
+ *
+ * <engine-class> cmd <instr> [[dword0] [dword1] [...]]
+ *
+ * #. Simple register setting::
+ *
+ * <engine-class> reg <address> <value>
+ *
+ * Commands are saved per engine class: all instances of that class will execute
+ * those commands during context switch. The instruction, dword arguments,
+ * addresses and values are in hex format like in the examples below.
+ *
+ * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the
+ * normal context restore::
+ *
+ * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
+ * > /sys/kernel/config/xe/0000:03:00.0/debug/ctx_restore_post_bb
+ *
+ * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 at the
+ * beginning of the context restore::
+ *
+ * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
+ * > /sys/kernel/config/xe/0000:03:00.0/debug/ctx_restore_mid_bb
+ *
+ * #. Load certain values in a couple of registers (it can be used as a simpler
+ * alternative to the `cmd`) action::
+ *
+ * # cat > /sys/kernel/config/xe/0000:03:00.0/debug/ctx_restore_post_bb <<EOF
+ * rcs reg 4F100 DEADBEEF
+ * rcs reg 4F104 FFFFFFFF
+ * EOF
+ *
+ * .. note::
+ *
+ * When using multiple lines, make sure to use a command that is
+ * implemented with a single write syscall, like HEREDOC.
+ *
+ * Currently this is implemented only for post and mid context restore and
+ * these attributes can only be set before binding to the device.
+ *
+ * Enable multi-queue
+ * ------------------
+ *
+ * Multi-queue support on the device is enabled by default where the
+ * hardware supports it. Writing 0 force-disables multi-queue support:
+ * multi-queue exec-queue group creation via ioctl is refused, and the
+ * GuC feature is disabled::
+ *
+ * # echo 0 > /sys/kernel/config/xe/0000:03:00.0/debug/enable_multi_queue
+ *
+ * This attribute can only be set before binding to the device.
+ *
+ * PSMI
+ * ----
+ *
+ * Enable extra debugging capabilities to trace engine execution. Only useful
+ * during early platform enabling and requires additional hardware connected.
+ * Once it's enabled, additionals WAs are added and runtime configuration is
+ * done via debugfs. Example to enable it::
+ *
+ * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/debug/enable_psmi
+ *
+ * This attribute can only be set before binding to the device.
+ *
+ * Enable VRAM page offline:
+ * -------------------------
+ *
+ * 0, n, N, false - Disable vram page offline (Logging only)
+ * 1, y, Y, true - Enable vram page offline (Offlining is active - default)
+ *
+ * Example to disable VRAM offline::
+ *
+ * # echo 0 > /sys/kernel/config/xe/0000:03:00.0/debug/enable_vram_page_offline
+ *
+ * This attribute can only be set on CRI before binding to the device.
+ *
+ * Allowed engines:
+ * ----------------
+ *
+ * Allow only a set of engine(s) to be available, disabling the other engines
+ * even if they are available in hardware. This is applied after HW fuses are
+ * considered on each tile. Examples:
+ *
+ * Allow only one render and one copy engines, nothing else::
+ *
+ * # echo 'rcs0,bcs0' > /sys/kernel/config/xe/0000:03:00.0/debug/engines_allowed
+ *
+ * Allow only compute engines and first copy engine::
+ *
+ * # echo 'ccs*,bcs0' > /sys/kernel/config/xe/0000:03:00.0/debug/engines_allowed
+ *
+ * Note that the engine names are the per-GT hardware names. On multi-tile
+ * platforms, writing ``rcs0,bcs0`` to this file would allow the first render
+ * and copy engines on each tile.
+ *
+ * The requested configuration may not be supported by the platform and driver
+ * may fail to probe. For example: if at least one copy engine is expected to be
+ * available for migrations, but it's disabled. This is intended for debugging
+ * purposes only.
+ *
+ * This attribute can only be set before binding to the device.
+ *
+ * Allowed GT types:
+ * -----------------
+ *
+ * Allow only specific types of GTs to be detected and initialized by the
+ * driver. Any combination of GT types can be enabled/disabled, although
+ * some settings will cause the device to fail to probe.
+ *
+ * Writes support both comma- and newline-separated input format. Reads
+ * will always return one GT type per line. "primary" and "media" are the
+ * GT type names supported by this interface.
+ *
+ * This attribute can only be set before binding to the device.
+ *
+ * Examples:
+ *
+ * Allow both primary and media GTs to be initialized and used. This matches
+ * the driver's default behavior::
+ *
+ * # echo 'primary,media' > /sys/kernel/config/xe/0000:03:00.0/debug/gt_types_allowed
+ *
+ * Allow only the primary GT of each tile to be initialized and used,
+ * effectively disabling the media GT if it exists on the platform::
+ *
+ * # echo 'primary' > /sys/kernel/config/xe/0000:03:00.0/debug/gt_types_allowed
+ *
+ * Allow only the media GT of each tile to be initialized and used,
+ * effectively disabling the primary GT. **This configuration will cause
+ * device probe failure on all current platforms, but may be allowed on
+ * igpu platforms in the future**::
+ *
+ * # echo 'media' > /sys/kernel/config/xe/0000:03:00.0/debug/gt_types_allowed
+ *
+ * Disable all GTs. Only other GPU IP (such as display) is potentially usable.
+ * **This configuration will cause device probe failure on all current
+ * platforms, but may be allowed on igpu platforms in the future**::
+ *
+ * # echo '' > /sys/kernel/config/xe/0000:03:00.0/debug/gt_types_allowed
+ */
+
+struct engine_info {
+ const char *cls;
+ u64 mask;
+ enum xe_engine_class engine_class;
+};
+
+/* Some helpful macros to aid on the sizing of buffer allocation when parsing */
+#define MAX_ENGINE_CLASS_CHARS 5
+#define MAX_ENGINE_INSTANCE_CHARS 2
+
+static const struct engine_info engine_info[] = {
+ { .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK, .engine_class = XE_ENGINE_CLASS_RENDER },
+ { .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK, .engine_class = XE_ENGINE_CLASS_COPY },
+ { .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_DECODE },
+ { .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_ENHANCE },
+ { .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK, .engine_class = XE_ENGINE_CLASS_COMPUTE },
+ { .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK, .engine_class = XE_ENGINE_CLASS_OTHER },
+};
+
+static const struct {
+ const char *name;
+ enum xe_gt_type type;
+} gt_types[] = {
+ { .name = "primary", .type = XE_GT_TYPE_MAIN },
+ { .name = "media", .type = XE_GT_TYPE_MEDIA },
+};
+
+static struct xe_config_group_device *find_device(struct pci_dev *pdev)
+{
+ return xe_configfs_find_group_device(pdev);
+}
+
+/**
+ * xe_configfs_get_ctx_restore_mid_bb - get configfs ctx_restore_mid_bb setting
+ * @pdev: pci device
+ * @class: hw engine class
+ * @cs: destination buffer for the batch, or NULL to only query the length
+ * @max_len: capacity of @cs, in dwords
+ *
+ * Copy the configured batch into @cs while holding the configfs lock, so the
+ * caller never gets a pointer to storage owned by the configfs group.
+ *
+ * Return: Number of dwords used in the mid_ctx_restore setting in configfs, or
+ * -ENOSPC if it does not fit in @max_len
+ */
+ssize_t xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ u32 *cs, size_t max_len)
+{
+ struct xe_config_group_device *dev = find_device(pdev);
+ ssize_t len;
+
+ if (!dev)
+ return 0;
+
+ scoped_guard(mutex, &dev->lock) {
+ len = dev->config.debug.ctx_restore_mid_bb[class].len;
+ if (cs && len) {
+ if (len > max_len)
+ len = -ENOSPC;
+ else
+ memcpy(cs, dev->config.debug.ctx_restore_mid_bb[class].cs,
+ len * sizeof(u32));
+ }
+ }
+ config_group_put(&dev->group);
+
+ return len;
+}
+
+/**
+ * xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
+ * @pdev: pci device
+ * @class: hw engine class
+ * @cs: destination buffer for the batch, or NULL to only query the length
+ * @max_len: capacity of @cs, in dwords
+ *
+ * Copy the configured batch into @cs while holding the configfs lock, so the
+ * caller never gets a pointer to storage owned by the configfs group.
+ *
+ * Return: Number of dwords used in the post_ctx_restore setting in configfs, or
+ * -ENOSPC if it does not fit in @max_len
+ */
+ssize_t xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ u32 *cs, size_t max_len)
+{
+ struct xe_config_group_device *dev = find_device(pdev);
+ ssize_t len;
+
+ if (!dev)
+ return 0;
+
+ scoped_guard(mutex, &dev->lock) {
+ len = dev->config.debug.ctx_restore_post_bb[class].len;
+ if (cs && len) {
+ if (len > max_len)
+ len = -ENOSPC;
+ else
+ memcpy(cs, dev->config.debug.ctx_restore_post_bb[class].cs,
+ len * sizeof(u32));
+ }
+ }
+ config_group_put(&dev->group);
+
+ return len;
+}
+
+static bool wa_bb_read_advance(bool dereference, char **p,
+ const char *append, size_t len,
+ size_t *max_size)
+{
+ if (dereference) {
+ if (len >= *max_size)
+ return false;
+ *max_size -= len;
+ if (append)
+ memcpy(*p, append, len);
+ }
+
+ *p += len;
+
+ return true;
+}
+
+static ssize_t wa_bb_show(struct xe_config_group_device *dev,
+ struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
+ char *data, size_t sz)
+{
+ char *p = data;
+
+ guard(mutex)(&dev->lock);
+
+ for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
+ enum xe_engine_class ec = engine_info[i].engine_class;
+ size_t len;
+
+ if (!wa_bb[ec].len)
+ continue;
+
+ len = snprintf(p, sz, "%s:", engine_info[i].cls);
+ if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
+ return -ENOBUFS;
+
+ for (size_t j = 0; j < wa_bb[ec].len; j++) {
+ len = snprintf(p, sz, " %08x", wa_bb[ec].cs[j]);
+ if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
+ return -ENOBUFS;
+ }
+
+ if (!wa_bb_read_advance(data, &p, "\n", 1, &sz))
+ return -ENOBUFS;
+ }
+
+ if (!wa_bb_read_advance(data, &p, "", 1, &sz))
+ return -ENOBUFS;
+
+ /* Reserve one more to match check for '\0' */
+ if (!data)
+ p++;
+
+ return p - data;
+}
+
+static ssize_t ctx_restore_mid_bb_show(struct config_item *item, char *page)
+{
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
+
+ return wa_bb_show(dev, dev->config.debug.ctx_restore_mid_bb, page, SZ_4K);
+}
+
+static ssize_t ctx_restore_post_bb_show(struct config_item *item, char *page)
+{
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
+
+ return wa_bb_show(dev, dev->config.debug.ctx_restore_post_bb, page, SZ_4K);
+}
+
+static void wa_bb_append(struct wa_bb *wa_bb, u32 val)
+{
+ if (wa_bb->cs)
+ wa_bb->cs[wa_bb->len] = val;
+
+ wa_bb->len++;
+}
+
+static ssize_t parse_hex(const char *line, u32 *pval)
+{
+ char numstr[12];
+ const char *p;
+ ssize_t numlen;
+
+ p = line + strspn(line, " \t");
+ if (!*p || *p == '\n')
+ return 0;
+
+ numlen = strcspn(p, " \t\n");
+ if (!numlen || numlen >= sizeof(numstr) - 1)
+ return -EINVAL;
+
+ memcpy(numstr, p, numlen);
+ numstr[numlen] = '\0';
+ p += numlen;
+
+ if (kstrtou32(numstr, 16, pval))
+ return -EINVAL;
+
+ return p - line;
+}
+
+static int parse_engine(const char *s, const char *end_chars, u64 *mask,
+ const struct engine_info **pinfo);
+
+/*
+ * Parse lines with the format
+ *
+ * <engine-class> cmd <u32> <u32...>
+ * <engine-class> reg <u32_addr> <u32_val>
+ *
+ * and optionally save them in @wa_bb[i].cs is non-NULL.
+ *
+ * Return the number of dwords parsed.
+ */
+static ssize_t parse_wa_bb_lines(const char *lines,
+ struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX])
+{
+ ssize_t dwords = 0, ret;
+ const char *p;
+
+ /*
+ * Each iteration consumes at least the engine class token if it doesn't
+ * error out, so the loop always makes progress without advancing @p.
+ */
+ for (p = lines; *p;) {
+ const struct engine_info *info = NULL;
+ u32 val, val2;
+
+ /* Also allow empty lines */
+ p += strspn(p, " \t\n");
+ if (!*p)
+ break;
+
+ ret = parse_engine(p, " \t\n", NULL, &info);
+ if (ret < 0)
+ return ret;
+
+ p += ret;
+ p += strspn(p, " \t");
+
+ if (str_has_prefix(p, "cmd")) {
+ for (p += strlen("cmd"); *p;) {
+ ret = parse_hex(p, &val);
+ if (ret < 0)
+ return -EINVAL;
+ if (!ret)
+ break;
+
+ p += ret;
+ dwords++;
+ wa_bb_append(&wa_bb[info->engine_class], val);
+ }
+ } else if (str_has_prefix(p, "reg")) {
+ p += strlen("reg");
+ ret = parse_hex(p, &val);
+ if (ret <= 0)
+ return -EINVAL;
+
+ p += ret;
+ ret = parse_hex(p, &val2);
+ if (ret <= 0)
+ return -EINVAL;
+
+ p += ret;
+ dwords += 3;
+ wa_bb_append(&wa_bb[info->engine_class],
+ MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1));
+ wa_bb_append(&wa_bb[info->engine_class], val);
+ wa_bb_append(&wa_bb[info->engine_class], val2);
+ } else {
+ return -EINVAL;
+ }
+ }
+
+ return dwords;
+}
+
+static ssize_t wa_bb_store(struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
+ struct xe_config_group_device *dev,
+ const char *page, size_t len)
+{
+ /* tmp_wa_bb must match wa_bb's size */
+ struct wa_bb tmp_wa_bb[XE_ENGINE_CLASS_MAX] = { };
+ ssize_t count, class;
+ u32 *tmp;
+
+ /* 1. Count dwords - wa_bb[i].cs is NULL for all classes */
+ count = parse_wa_bb_lines(page, tmp_wa_bb);
+ if (count < 0)
+ return count;
+
+ guard(mutex)(&dev->lock);
+
+ if (xe_configfs_is_bound(dev))
+ return -EBUSY;
+
+ /*
+ * 2. Allocate a u32 array and set the pointers to the right positions
+ * according to the length of each class' wa_bb
+ */
+ tmp = krealloc(wa_bb[0].cs, count * sizeof(u32), GFP_KERNEL);
+ if (!tmp)
+ return -ENOMEM;
+
+ if (!count) {
+ memset(wa_bb, 0, sizeof(tmp_wa_bb));
+ return len;
+ }
+
+ for (class = 0, count = 0; class < XE_ENGINE_CLASS_MAX; ++class) {
+ tmp_wa_bb[class].cs = tmp + count;
+ count += tmp_wa_bb[class].len;
+ tmp_wa_bb[class].len = 0;
+ }
+
+ /* 3. Parse wa_bb lines again, this time saving the values */
+ count = parse_wa_bb_lines(page, tmp_wa_bb);
+ if (count < 0) {
+ kfree(tmp);
+ memset(wa_bb, 0, sizeof(tmp_wa_bb));
+ return count;
+ }
+
+ memcpy(wa_bb, tmp_wa_bb, sizeof(tmp_wa_bb));
+
+ return len;
+}
+
+static ssize_t ctx_restore_mid_bb_store(struct config_item *item,
+ const char *data, size_t sz)
+{
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
+
+ return wa_bb_store(dev->config.debug.ctx_restore_mid_bb, dev, data, sz);
+}
+
+static ssize_t ctx_restore_post_bb_store(struct config_item *item,
+ const char *data, size_t sz)
+{
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
+
+ return wa_bb_store(dev->config.debug.ctx_restore_post_bb, dev, data, sz);
+}
+
+/**
+ * xe_configfs_get_engines_allowed - get engine allowed mask from configfs
+ * @pdev: pci device
+ *
+ * Return: engine mask with allowed engines set in configfs
+ */
+u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = find_device(pdev);
+ u64 engines_allowed;
+
+ if (!dev)
+ return xe_configfs_device_defaults.debug.engines_allowed;
+
+ scoped_guard(mutex, &dev->lock)
+ engines_allowed = dev->config.debug.engines_allowed;
+ config_group_put(&dev->group);
+
+ return engines_allowed;
+}
+
+static ssize_t engines_allowed_show(struct config_item *item, char *page)
+{
+ struct xe_config_device *dev = xe_configfs_subgroup_to_device(item);
+ char *p = page;
+
+ for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
+ u64 mask = engine_info[i].mask;
+
+ if ((dev->debug.engines_allowed & mask) == mask) {
+ p += sprintf(p, "%s*\n", engine_info[i].cls);
+ } else if (mask & dev->debug.engines_allowed) {
+ u16 bit0 = __ffs64(mask), bit;
+
+ mask &= dev->debug.engines_allowed;
+
+ for_each_set_bit(bit, (const unsigned long *)&mask, 64)
+ p += sprintf(p, "%s%u\n", engine_info[i].cls,
+ bit - bit0);
+ }
+ }
+
+ return p - page;
+}
+
+/*
+ * Lookup engine_info. If @mask is not NULL, reduce the mask according to the
+ * instance in @pattern.
+ *
+ * Examples of inputs:
+ * - lookup_engine_info("rcs0", &mask): return "rcs" entry from @engine_info and
+ * mask == BIT_ULL(XE_HW_ENGINE_RCS0)
+ * - lookup_engine_info("rcs*", &mask): return "rcs" entry from @engine_info and
+ * mask == XE_HW_ENGINE_RCS_MASK
+ * - lookup_engine_info("rcs", NULL): return "rcs" entry from @engine_info
+ */
+static const struct engine_info *lookup_engine_info(const char *pattern, u64 *mask)
+{
+ for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
+ u8 instance;
+ u16 bit;
+
+ if (!str_has_prefix(pattern, engine_info[i].cls))
+ continue;
+
+ pattern += strlen(engine_info[i].cls);
+ if (!mask)
+ return *pattern ? NULL : &engine_info[i];
+
+ if (!strcmp(pattern, "*")) {
+ *mask = engine_info[i].mask;
+ return &engine_info[i];
+ }
+
+ if (kstrtou8(pattern, 10, &instance))
+ return NULL;
+
+ bit = __ffs64(engine_info[i].mask) + instance;
+ if (bit >= fls64(engine_info[i].mask))
+ return NULL;
+
+ *mask = BIT_ULL(bit);
+ return &engine_info[i];
+ }
+
+ return NULL;
+}
+
+static int parse_engine(const char *s, const char *end_chars, u64 *mask,
+ const struct engine_info **pinfo)
+{
+ char buf[MAX_ENGINE_CLASS_CHARS + MAX_ENGINE_INSTANCE_CHARS + 1];
+ const struct engine_info *info;
+ size_t len;
+
+ len = strcspn(s, end_chars);
+ if (len >= sizeof(buf))
+ return -EINVAL;
+
+ memcpy(buf, s, len);
+ buf[len] = '\0';
+
+ info = lookup_engine_info(buf, mask);
+ if (!info)
+ return -ENOENT;
+
+ if (pinfo)
+ *pinfo = info;
+
+ return len;
+}
+
+static ssize_t engines_allowed_store(struct config_item *item, const char *page,
+ size_t len)
+{
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
+ ssize_t patternlen, p;
+ u64 mask, val = 0;
+
+ for (p = 0; p < len; p += patternlen + 1) {
+ patternlen = parse_engine(page + p, ",\n", &mask, NULL);
+ if (patternlen < 0)
+ return -EINVAL;
+
+ val |= mask;
+ }
+
+ guard(mutex)(&dev->lock);
+ if (xe_configfs_is_bound(dev))
+ return -EBUSY;
+
+ dev->config.debug.engines_allowed = val;
+
+ return len;
+}
+
+static u64 get_gt_types_allowed(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = find_device(pdev);
+ u64 mask;
+
+ if (!dev)
+ return xe_configfs_device_defaults.debug.gt_types_allowed;
+
+ scoped_guard(mutex, &dev->lock)
+ mask = dev->config.debug.gt_types_allowed;
+ config_group_put(&dev->group);
+
+ return mask;
+}
+
+/**
+ * xe_configfs_primary_gt_allowed - determine whether primary GTs are supported
+ * @pdev: pci device
+ *
+ * Return: True if primary GTs are enabled, false if they have been disabled via
+ * configfs.
+ */
+bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev)
+{
+ return get_gt_types_allowed(pdev) & BIT_ULL(XE_GT_TYPE_MAIN);
+}
+
+/**
+ * xe_configfs_media_gt_allowed - determine whether media GTs are supported
+ * @pdev: pci device
+ *
+ * Return: True if the media GTs are enabled, false if they have been disabled
+ * via configfs.
+ */
+bool xe_configfs_media_gt_allowed(struct pci_dev *pdev)
+{
+ return get_gt_types_allowed(pdev) & BIT_ULL(XE_GT_TYPE_MEDIA);
+}
+
+static ssize_t gt_types_allowed_show(struct config_item *item, char *page)
+{
+ struct xe_config_device *dev = xe_configfs_subgroup_to_device(item);
+ char *p = page;
+
+ for (size_t i = 0; i < ARRAY_SIZE(gt_types); i++)
+ if (dev->debug.gt_types_allowed & BIT_ULL(gt_types[i].type))
+ p += sprintf(p, "%s\n", gt_types[i].name);
+
+ return p - page;
+}
+
+static ssize_t gt_types_allowed_store(struct config_item *item, const char *page,
+ size_t len)
+{
+ char *buf __free(kfree) = kstrdup(page, GFP_KERNEL);
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
+ u64 typemask = 0;
+ char *p = buf;
+
+ if (!buf)
+ return -ENOMEM;
+
+ while (p) {
+ char *typename = strsep(&p, ",\n");
+ bool matched = false;
+
+ if (typename[0] == '\0')
+ continue;
+
+ for (size_t i = 0; i < ARRAY_SIZE(gt_types); i++) {
+ if (strcmp(typename, gt_types[i].name) == 0) {
+ typemask |= BIT(gt_types[i].type);
+ matched = true;
+ break;
+ }
+ }
+
+ if (!matched)
+ return -EINVAL;
+ }
+
+ guard(mutex)(&dev->lock);
+ if (xe_configfs_is_bound(dev))
+ return -EBUSY;
+
+ dev->config.debug.gt_types_allowed = typemask;
+
+ return len;
+}
+
+/**
+ * xe_configfs_get_enable_multi_queue - get configfs enable_multi_queue setting
+ * @pdev: pci device
+ *
+ * Return: true if multi-queue is enabled for this device (the default),
+ * false if it has been force-disabled via configfs.
+ */
+bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = find_device(pdev);
+ bool ret;
+
+ if (!dev)
+ return xe_configfs_device_defaults.debug.enable_multi_queue;
+
+ scoped_guard(mutex, &dev->lock)
+ ret = dev->config.debug.enable_multi_queue;
+ config_group_put(&dev->group);
+
+ return ret;
+}
+
+static ssize_t enable_multi_queue_show(struct config_item *item, char *page)
+{
+ struct xe_config_device *dev = xe_configfs_subgroup_to_device(item);
+
+ return sprintf(page, "%d\n", dev->debug.enable_multi_queue);
+}
+
+static ssize_t enable_multi_queue_store(struct config_item *item, const char *page, size_t len)
+{
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
+ bool val;
+ int ret;
+
+ ret = kstrtobool(page, &val);
+ if (ret)
+ return ret;
+
+ guard(mutex)(&dev->lock);
+ if (xe_configfs_is_bound(dev))
+ return -EBUSY;
+
+ dev->config.debug.enable_multi_queue = val;
+
+ return len;
+}
+
+/**
+ * xe_configfs_get_psmi_enabled - get configfs enable_psmi setting
+ * @pdev: pci device
+ *
+ * Return: enable_psmi setting in configfs
+ */
+bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = find_device(pdev);
+ bool ret;
+
+ if (!dev)
+ return false;
+
+ scoped_guard(mutex, &dev->lock)
+ ret = dev->config.debug.enable_psmi;
+ config_group_put(&dev->group);
+
+ return ret;
+}
+
+static ssize_t enable_psmi_show(struct config_item *item, char *page)
+{
+ struct xe_config_device *dev = xe_configfs_subgroup_to_device(item);
+
+ return sprintf(page, "%d\n", dev->debug.enable_psmi);
+}
+
+static ssize_t enable_psmi_store(struct config_item *item, const char *page, size_t len)
+{
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
+ bool val;
+ int ret;
+
+ ret = kstrtobool(page, &val);
+ if (ret)
+ return ret;
+
+ guard(mutex)(&dev->lock);
+ if (xe_configfs_is_bound(dev))
+ return -EBUSY;
+
+ dev->config.debug.enable_psmi = val;
+
+ return len;
+}
+
+/**
+ * xe_configfs_get_enable_vram_page_offline - get configfs enable_vram_page_offline setting
+ * @pdev: pci device
+ *
+ * Return: enable_vram_page_offline setting in configfs
+ */
+bool xe_configfs_get_enable_vram_page_offline(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = find_device(pdev);
+ bool ret;
+
+ if (!dev)
+ return xe_configfs_device_defaults.debug.enable_vram_page_offline;
+
+ scoped_guard(mutex, &dev->lock)
+ ret = dev->config.debug.enable_vram_page_offline;
+ config_group_put(&dev->group);
+
+ return ret;
+}
+
+static ssize_t enable_vram_page_offline_show(struct config_item *item, char *page)
+{
+ struct xe_config_device *dev = xe_configfs_subgroup_to_device(item);
+
+ return sprintf(page, "%s\n", str_yes_no(dev->debug.enable_vram_page_offline));
+}
+
+static ssize_t enable_vram_page_offline_store(struct config_item *item,
+ const char *page, size_t len)
+{
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
+ bool val;
+ int ret;
+
+ ret = kstrtobool(page, &val);
+ if (ret)
+ return ret;
+
+ guard(mutex)(&dev->lock);
+ if (xe_configfs_is_bound(dev))
+ return -EBUSY;
+
+ dev->config.debug.enable_vram_page_offline = val;
+
+ return len;
+}
+
+CONFIGFS_ATTR(, ctx_restore_mid_bb);
+CONFIGFS_ATTR(, ctx_restore_post_bb);
+CONFIGFS_ATTR(, engines_allowed);
+CONFIGFS_ATTR(, gt_types_allowed);
+CONFIGFS_ATTR(, enable_multi_queue);
+CONFIGFS_ATTR(, enable_psmi);
+CONFIGFS_ATTR(, enable_vram_page_offline);
+
+static struct configfs_attribute *xe_configfs_debug_attrs[] = {
+ &attr_ctx_restore_mid_bb,
+ &attr_ctx_restore_post_bb,
+ &attr_engines_allowed,
+ &attr_gt_types_allowed,
+ &attr_enable_multi_queue,
+ &attr_enable_psmi,
+ &attr_enable_vram_page_offline,
+ NULL,
+};
+
+/*
+ * Per-parameter visibility predicates.
+ *
+ * XE_PARAM_VISIBLE_ALWAYS - attribute is always shown.
+ *
+ * These macros are only evaluated here, where the platform descriptor is
+ * reachable. xe_configfs_debug_params.h treats them as opaque tokens.
+ */
+#define XE_PARAM_VISIBLE_ALWAYS(_item) \
+ (true)
+
+static bool xe_configfs_debug_is_visible(struct config_item *item,
+ struct configfs_attribute *attr, int n)
+{
+ struct xe_config_group_device *dev;
+
+ if (attr == &attr_enable_vram_page_offline) {
+ dev = xe_configfs_to_group_device(item->ci_parent);
+
+ return dev->desc->is_dgfx && dev->desc->platform == XE_CRESCENTISLAND;
+ }
+
+ return true;
+}
+
+static struct configfs_group_operations xe_configfs_debug_group_ops = {
+ .is_visible = xe_configfs_debug_is_visible,
+};
const struct config_item_type xe_configfs_debug_type = {
+ .ct_attrs = xe_configfs_debug_attrs,
+ .ct_group_ops = &xe_configfs_debug_group_ops,
.ct_owner = THIS_MODULE,
};
+
+/**
+ * xe_configfs_debug_release_config - release debug-specific config resources
+ * @config: xe config device structure
+ *
+ * Frees any memory allocated for debug configfs parameters.
+ */
+void xe_configfs_debug_release_config(struct xe_config_device *config)
+{
+ kfree(config->debug.ctx_restore_mid_bb[0].cs);
+ kfree(config->debug.ctx_restore_post_bb[0].cs);
+}
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.h b/drivers/gpu/drm/xe/xe_configfs_debug.h
index 5f938450aed2..5d0875d47a1f 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug.h
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.h
@@ -5,9 +5,49 @@
#ifndef _XE_CONFIGFS_DEBUG_H_
#define _XE_CONFIGFS_DEBUG_H_
+#include <linux/types.h>
+
+#include "xe_hw_engine_types.h"
+
+struct pci_dev;
+struct xe_config_device;
+
#if IS_ENABLED(CONFIG_DRM_XE_DEBUG) && IS_ENABLED(CONFIG_CONFIGFS_FS)
-struct config_item_type;
extern const struct config_item_type xe_configfs_debug_type;
+void xe_configfs_debug_release_config(struct xe_config_device *config);
+ssize_t xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ u32 *cs, size_t max_len);
+ssize_t xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ u32 *cs, size_t max_len);
+u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
+bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
+bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
+bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev);
+bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
+bool xe_configfs_get_enable_vram_page_offline(struct pci_dev *pdev);
+#else
+/*
+ * Callers gate these accesses on CONFIG_DRM_XE_DEBUG, so when that's
+ * disabled the returned defaults are dead code. When CONFIG_DRM_XE_DEBUG=y
+ * but CONFIG_CONFIGFS_FS=n there is no configfs group to consult, so the
+ * defaults below are used for real to keep debug knobs functional (at
+ * their default values) even without configfs support.
+ */
+static inline void xe_configfs_debug_release_config(struct xe_config_device *config) { }
+static inline ssize_t xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ u32 *cs, size_t max_len) { return 0; }
+static inline ssize_t xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ u32 *cs, size_t max_len) { return 0; }
+static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
+static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return true; }
+static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; }
+static inline bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev) { return true; }
+static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
+static inline bool xe_configfs_get_enable_vram_page_offline(struct pci_dev *pdev) { return true; }
#endif
#endif /* _XE_CONFIGFS_DEBUG_H_ */
diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h b/drivers/gpu/drm/xe/xe_configfs_types.h
index 3a9ab40d519b..72f97dcad8f4 100644
--- a/drivers/gpu/drm/xe/xe_configfs_types.h
+++ b/drivers/gpu/drm/xe/xe_configfs_types.h
@@ -32,15 +32,19 @@ struct xe_config_group_device {
* type, entries are sorted alphabetically.
*/
struct xe_config_device {
- struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
- struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
- u64 engines_allowed;
- u64 gt_types_allowed;
u32 migrate_ulls_period_ms;
u8 survivability_mode;
- bool enable_multi_queue;
- bool enable_psmi;
- bool enable_vram_page_offline;
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
+ struct {
+ struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
+ struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
+ u64 engines_allowed;
+ u64 gt_types_allowed;
+ bool enable_multi_queue;
+ bool enable_psmi;
+ bool enable_vram_page_offline;
+ } debug;
+#endif
struct {
unsigned int max_vfs;
bool admin_only_pf;
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 3ab4cb9e4964..c0398789081a 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -19,6 +19,7 @@
#include "regs/xe_irq_regs.h"
#include "xe_bo.h"
#include "xe_configfs.h"
+#include "xe_configfs_debug.h"
#include "xe_device.h"
#include "xe_force_wake.h"
#include "xe_gt.h"
diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index 43a2951a66d6..f5ca687e847d 100644
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -17,6 +17,7 @@
#include "regs/xe_guc_regs.h"
#include "xe_bo.h"
#include "xe_configfs.h"
+#include "xe_configfs_debug.h"
#include "xe_gt.h"
#include "xe_gt_ccs_mode.h"
#include "xe_gt_mcr.h"
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 265f95c0c899..62a080f6fa23 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -18,6 +18,7 @@
#include "xe_assert.h"
#include "xe_bo.h"
#include "xe_configfs.h"
+#include "xe_configfs_debug.h"
#include "xe_device.h"
#include "xe_execlist.h"
#include "xe_force_wake.h"
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index f751687dc568..70494c4b5deb 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -19,6 +19,7 @@
#include "xe_bb.h"
#include "xe_bo.h"
#include "xe_configfs.h"
+#include "xe_configfs_debug.h"
#include "xe_device.h"
#include "xe_drm_client.h"
#include "xe_exec_queue.h"
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 57c6f778ca24..18fa9d4f2f6d 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -19,6 +19,7 @@
#include "regs/xe_gt_regs.h"
#include "regs/xe_regs.h"
#include "xe_configfs.h"
+#include "xe_configfs_debug.h"
#include "xe_device.h"
#include "xe_drv.h"
#include "xe_gt.h"
diff --git a/drivers/gpu/drm/xe/xe_psmi.c b/drivers/gpu/drm/xe/xe_psmi.c
index 899b01f72ba3..59af3d145418 100644
--- a/drivers/gpu/drm/xe/xe_psmi.c
+++ b/drivers/gpu/drm/xe/xe_psmi.c
@@ -8,6 +8,7 @@
#include "xe_bo.h"
#include "xe_device_types.h"
#include "xe_configfs.h"
+#include "xe_configfs_debug.h"
#include "xe_psmi.h"
/*
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index ce9b57b3eede..1336c0aff6b9 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -4,6 +4,7 @@
*/
#include "xe_configfs.h"
+#include "xe_configfs_debug.h"
#include "xe_debugfs.h"
#include "xe_device.h"
#include "xe_drm_ras.h"
diff --git a/drivers/gpu/drm/xe/xe_rtp.c b/drivers/gpu/drm/xe/xe_rtp.c
index 6a8d6ea68f25..62068189320f 100644
--- a/drivers/gpu/drm/xe/xe_rtp.c
+++ b/drivers/gpu/drm/xe/xe_rtp.c
@@ -10,6 +10,7 @@
#include <uapi/drm/xe_drm.h>
#include "xe_configfs.h"
+#include "xe_configfs_debug.h"
#include "xe_device.h"
#include "xe_gt.h"
#include "xe_gt_topology.h"
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 10/15] drm/xe/guc: Add configfs support for guc_log_level
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
` (8 preceding siblings ...)
2026-10-05 19:06 ` [PATCH 09/15] drm/xe: Move debug configfs entries to xe_configfs_debug.c Stuart Summers
@ 2026-10-05 19:06 ` Stuart Summers
2026-10-05 19:06 ` [PATCH 11/15] drm/xe/guc: Add support for NPK as a GuC log target Stuart Summers
` (8 subsequent siblings)
18 siblings, 0 replies; 21+ messages in thread
From: Stuart Summers @ 2026-10-05 19:06 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
gustavo.sousa, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Allow the GuC log level to be selected per-device via configfs in
addition to the existing 'guc_log_level' module parameter. The configfs
attribute lives under the new 'debug' configfs subdirectory:
/sys/kernel/config/xe/<bdf>/debug/guc_log_level
When the configfs attribute is set to a valid level (0-5), it overrides
the module parameter for that device. The default value is -1
(XE_GUC_LOG_LEVEL_UNSET), which means 'unset' and falls back to the
'guc_log_level' module parameter, ensuring existing users that rely
solely on the module parameter are unaffected by this change.
The module parameter implementation itself is untouched.
Note that the expectation is a user will only set the log level when
CONFIG_DRM_XE_DEBUG is set.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: LLM
---
drivers/gpu/drm/xe/xe_configfs.c | 2 +
drivers/gpu/drm/xe/xe_configfs_debug.c | 86 +++++++++++++++++++++++++-
drivers/gpu/drm/xe/xe_configfs_debug.h | 7 +++
drivers/gpu/drm/xe/xe_configfs_types.h | 1 +
drivers/gpu/drm/xe/xe_defaults.h | 3 +
drivers/gpu/drm/xe/xe_guc_log.c | 3 +-
6 files changed, 100 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 8e5ebb3ecfa7..4aa5b7c488eb 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -132,6 +132,7 @@ const struct xe_config_device xe_configfs_device_defaults = {
.debug = {
.engines_allowed = U64_MAX,
.gt_types_allowed = U64_MAX,
+ .guc_log_level = XE_GUC_LOG_LEVEL_UNSET,
.enable_multi_queue = true,
.enable_psmi = false,
.enable_vram_page_offline = true,
@@ -578,6 +579,7 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
PRI_CUSTOM_ATTR("%llx", debug.engines_allowed);
PRI_CUSTOM_ATTR("%llx", debug.gt_types_allowed);
+ PRI_CUSTOM_ATTR("%d", debug.guc_log_level);
PRI_CUSTOM_ATTR("%d", debug.enable_multi_queue);
PRI_CUSTOM_ATTR("%d", debug.enable_psmi);
PRI_CUSTOM_ATTR("%d", debug.enable_vram_page_offline);
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c b/drivers/gpu/drm/xe/xe_configfs_debug.c
index a6800706eefa..cbfb12266bf4 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug.c
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
@@ -17,6 +17,7 @@
#include "xe_configfs_debug.h"
#include "xe_configfs_types.h"
#include "xe_gt_types.h"
+#include "xe_guc_log.h"
#include "xe_hw_engine_types.h"
#include "xe_pci_types.h"
@@ -46,7 +47,8 @@
* ├── enable_psmi
* ├── enable_vram_page_offline
* ├── engines_allowed
- * └── gt_types_allowed
+ * ├── gt_types_allowed
+ * └── guc_log_level
*
* Configure Attributes
* ====================
@@ -202,6 +204,27 @@
* platforms, but may be allowed on igpu platforms in the future**::
*
* # echo '' > /sys/kernel/config/xe/0000:03:00.0/debug/gt_types_allowed
+ *
+ * GuC log level:
+ * --------------
+ *
+ * Set the GuC firmware logging verbosity for this device. Accepted values
+ * match the ``guc_log_level`` module parameter:
+ *
+ * - 0: disable
+ * - 1: normal (non-verbose)
+ * - 2..%GUC_LOG_LEVEL_MAX: verbose levels
+ *
+ * Example::
+ *
+ * # echo 3 > /sys/kernel/config/xe/0000:03:00.0/debug/guc_log_level
+ *
+ * The default value is %XE_GUC_LOG_LEVEL_UNSET (-1), which means the value
+ * of the ``guc_log_level`` module parameter is used. Any value greater
+ * than -1 written to this attribute overrides the module parameter for
+ * this device.
+ *
+ * This attribute can only be set before binding to the device.
*/
struct engine_info {
@@ -783,6 +806,65 @@ static ssize_t gt_types_allowed_store(struct config_item *item, const char *page
return len;
}
+/**
+ * xe_configfs_get_guc_log_level - get configfs guc_log_level setting
+ * @pdev: pci device
+ *
+ * Returns the guc_log_level value configured via configfs. If the configfs
+ * value is negative (the default is %XE_GUC_LOG_LEVEL_UNSET, -1), the value
+ * of the ``guc_log_level`` module parameter is returned instead, allowing
+ * the configfs entry to override the module parameter without affecting
+ * users that rely solely on the module parameter.
+ *
+ * Return: GuC log level to use for this device.
+ */
+int xe_configfs_get_guc_log_level(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = find_device(pdev);
+ int level = xe_modparam.guc_log_level;
+
+ if (!dev)
+ return level;
+
+ scoped_guard(mutex, &dev->lock)
+ if (dev->config.debug.guc_log_level >= 0)
+ level = dev->config.debug.guc_log_level;
+
+ config_group_put(&dev->group);
+
+ return level;
+}
+
+static ssize_t guc_log_level_show(struct config_item *item, char *page)
+{
+ struct xe_config_device *dev = xe_configfs_subgroup_to_device(item);
+
+ return sprintf(page, "%d\n", dev->debug.guc_log_level);
+}
+
+static ssize_t guc_log_level_store(struct config_item *item, const char *page, size_t len)
+{
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
+ int val;
+ int ret;
+
+ ret = kstrtoint(page, 0, &val);
+ if (ret)
+ return ret;
+
+ if (val != XE_GUC_LOG_LEVEL_UNSET &&
+ (val < 0 || val > GUC_LOG_LEVEL_MAX))
+ return -EINVAL;
+
+ guard(mutex)(&dev->lock);
+ if (xe_configfs_is_bound(dev))
+ return -EBUSY;
+
+ dev->config.debug.guc_log_level = val;
+
+ return len;
+}
+
/**
* xe_configfs_get_enable_multi_queue - get configfs enable_multi_queue setting
* @pdev: pci device
@@ -930,6 +1012,7 @@ CONFIGFS_ATTR(, ctx_restore_mid_bb);
CONFIGFS_ATTR(, ctx_restore_post_bb);
CONFIGFS_ATTR(, engines_allowed);
CONFIGFS_ATTR(, gt_types_allowed);
+CONFIGFS_ATTR(, guc_log_level);
CONFIGFS_ATTR(, enable_multi_queue);
CONFIGFS_ATTR(, enable_psmi);
CONFIGFS_ATTR(, enable_vram_page_offline);
@@ -939,6 +1022,7 @@ static struct configfs_attribute *xe_configfs_debug_attrs[] = {
&attr_ctx_restore_post_bb,
&attr_engines_allowed,
&attr_gt_types_allowed,
+ &attr_guc_log_level,
&attr_enable_multi_queue,
&attr_enable_psmi,
&attr_enable_vram_page_offline,
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.h b/drivers/gpu/drm/xe/xe_configfs_debug.h
index 5d0875d47a1f..c4915832f539 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug.h
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.h
@@ -7,7 +7,9 @@
#include <linux/types.h>
+#include "xe_defaults.h"
#include "xe_hw_engine_types.h"
+#include "xe_module.h"
struct pci_dev;
struct xe_config_device;
@@ -24,6 +26,7 @@ ssize_t xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
+int xe_configfs_get_guc_log_level(struct pci_dev *pdev);
bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev);
bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
bool xe_configfs_get_enable_vram_page_offline(struct pci_dev *pdev);
@@ -45,6 +48,10 @@ static inline ssize_t xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return true; }
static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; }
+static inline int xe_configfs_get_guc_log_level(struct pci_dev *pdev)
+{
+ return xe_modparam.guc_log_level;
+}
static inline bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev) { return true; }
static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
static inline bool xe_configfs_get_enable_vram_page_offline(struct pci_dev *pdev) { return true; }
diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h b/drivers/gpu/drm/xe/xe_configfs_types.h
index 72f97dcad8f4..01903cb4423e 100644
--- a/drivers/gpu/drm/xe/xe_configfs_types.h
+++ b/drivers/gpu/drm/xe/xe_configfs_types.h
@@ -40,6 +40,7 @@ struct xe_config_group_device {
struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
u64 engines_allowed;
u64 gt_types_allowed;
+ int guc_log_level;
bool enable_multi_queue;
bool enable_psmi;
bool enable_vram_page_offline;
diff --git a/drivers/gpu/drm/xe/xe_defaults.h b/drivers/gpu/drm/xe/xe_defaults.h
index 0884224ef7c7..a9467b77fabd 100644
--- a/drivers/gpu/drm/xe/xe_defaults.h
+++ b/drivers/gpu/drm/xe/xe_defaults.h
@@ -13,6 +13,9 @@
#define XE_DEFAULT_GUC_LOG_LEVEL 1
#endif
+/* Sentinel value for guc_log_level configfs: not set, fall back to module param */
+#define XE_GUC_LOG_LEVEL_UNSET -1
+
#define XE_DEFAULT_PROBE_DISPLAY IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
#define XE_DEFAULT_VRAM_BAR_SIZE 0
#define XE_DEFAULT_FORCE_PROBE CONFIG_DRM_XE_FORCE_PROBE
diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c
index 7d006268ce91..e22ab08ab172 100644
--- a/drivers/gpu/drm/xe/xe_guc_log.c
+++ b/drivers/gpu/drm/xe/xe_guc_log.c
@@ -13,6 +13,7 @@
#include "abi/guc_lfd_abi.h"
#include "regs/xe_guc_regs.h"
#include "xe_bo.h"
+#include "xe_configfs_debug.h"
#include "xe_devcoredump.h"
#include "xe_force_wake.h"
#include "xe_gt_printk.h"
@@ -640,7 +641,7 @@ int xe_guc_log_init(struct xe_guc_log *log)
xe_map_memset(xe, &bo->vmap, 0, 0, xe_bo_size(bo));
log->bo = bo;
- log->level = xe_modparam.guc_log_level;
+ log->level = xe_configfs_get_guc_log_level(to_pci_dev(xe->drm.dev));
return 0;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 11/15] drm/xe/guc: Add support for NPK as a GuC log target
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
` (9 preceding siblings ...)
2026-10-05 19:06 ` [PATCH 10/15] drm/xe/guc: Add configfs support for guc_log_level Stuart Summers
@ 2026-10-05 19:06 ` Stuart Summers
2026-10-05 19:06 ` [PATCH 12/15] drm/xe: Add infrastructure for debug configfs parameters Stuart Summers
` (7 subsequent siblings)
18 siblings, 0 replies; 21+ messages in thread
From: Stuart Summers @ 2026-10-05 19:06 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
gustavo.sousa, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
GuC provides the ability to gather logs through a hardware interface
called NPK. For certain debugging scenarios this can be advantageous
over getting logs from memory (or in addition to).
Add a hook for this alternate debugging mode via a configfs. This
translates into a parameter passed to GuC during load time.
v2: Convert to configfs from modparam (Matt)
v3: Configfs documentation formatting (Shuicheng)
Kerneldoc/comment add + configfs entry ordering
Only set the guc_log_target when GuC log is enabled (Daniele)
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: LLM
---
drivers/gpu/drm/xe/abi/guc_log_abi.h | 8 ++++
drivers/gpu/drm/xe/xe_configfs.c | 2 +
drivers/gpu/drm/xe/xe_configfs_debug.c | 65 +++++++++++++++++++++++++-
drivers/gpu/drm/xe/xe_configfs_debug.h | 5 ++
drivers/gpu/drm/xe/xe_configfs_types.h | 1 +
drivers/gpu/drm/xe/xe_defaults.h | 2 +
drivers/gpu/drm/xe/xe_guc.c | 11 +++--
7 files changed, 90 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/xe/abi/guc_log_abi.h b/drivers/gpu/drm/xe/abi/guc_log_abi.h
index fbf212d59a40..e1b121bff549 100644
--- a/drivers/gpu/drm/xe/abi/guc_log_abi.h
+++ b/drivers/gpu/drm/xe/abi/guc_log_abi.h
@@ -51,6 +51,14 @@ enum guc_log_type {
#define GUC_LOG_BUFFER_TYPE_MAX 3
+enum guc_log_target {
+ GUC_LOG_TARGET_MEM = 0,
+ GUC_LOG_TARGET_NPK,
+ GUC_LOG_TARGET_MEM_AND_NPK,
+};
+
+#define GUC_LOG_TARGET_MAX GUC_LOG_TARGET_MEM_AND_NPK
+
/**
* struct guc_log_buffer_state - GuC log buffer state
*
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 4aa5b7c488eb..d09c97eb8120 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -133,6 +133,7 @@ const struct xe_config_device xe_configfs_device_defaults = {
.engines_allowed = U64_MAX,
.gt_types_allowed = U64_MAX,
.guc_log_level = XE_GUC_LOG_LEVEL_UNSET,
+ .guc_log_target = XE_DEFAULT_GUC_LOG_TARGET,
.enable_multi_queue = true,
.enable_psmi = false,
.enable_vram_page_offline = true,
@@ -580,6 +581,7 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
PRI_CUSTOM_ATTR("%llx", debug.engines_allowed);
PRI_CUSTOM_ATTR("%llx", debug.gt_types_allowed);
PRI_CUSTOM_ATTR("%d", debug.guc_log_level);
+ PRI_CUSTOM_ATTR("%d", debug.guc_log_target);
PRI_CUSTOM_ATTR("%d", debug.enable_multi_queue);
PRI_CUSTOM_ATTR("%d", debug.enable_psmi);
PRI_CUSTOM_ATTR("%d", debug.enable_vram_page_offline);
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c b/drivers/gpu/drm/xe/xe_configfs_debug.c
index cbfb12266bf4..ff8e38ed717d 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug.c
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
@@ -48,7 +48,8 @@
* ├── enable_vram_page_offline
* ├── engines_allowed
* ├── gt_types_allowed
- * └── guc_log_level
+ * ├── guc_log_level
+ * └── guc_log_target
*
* Configure Attributes
* ====================
@@ -225,6 +226,16 @@
* this device.
*
* This attribute can only be set before binding to the device.
+ *
+ * GuC log target:
+ * ---------------
+ *
+ * Set the destination for the GuC log. 0 - memory only (default),
+ * 1 - NPK only, 2 - memory + NPK. Example::
+ *
+ * # echo 2 > /sys/kernel/config/xe/0000:03:00.0/debug/guc_log_target
+ *
+ * This attribute can only be set before binding to the device.
*/
struct engine_info {
@@ -865,6 +876,56 @@ static ssize_t guc_log_level_store(struct config_item *item, const char *page, s
return len;
}
+/**
+ * xe_configfs_get_guc_log_target - get configfs GuC log target attribute
+ * @pdev: pci device
+ *
+ * Return: guc_log_target attribute in configfs
+ */
+u8 xe_configfs_get_guc_log_target(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = find_device(pdev);
+ u8 target;
+
+ if (!dev)
+ return xe_configfs_device_defaults.debug.guc_log_target;
+
+ scoped_guard(mutex, &dev->lock)
+ target = dev->config.debug.guc_log_target;
+ config_group_put(&dev->group);
+
+ return target;
+}
+
+static ssize_t guc_log_target_show(struct config_item *item, char *page)
+{
+ struct xe_config_device *dev = xe_configfs_subgroup_to_device(item);
+
+ return sprintf(page, "%d\n", dev->debug.guc_log_target);
+}
+
+static ssize_t guc_log_target_store(struct config_item *item, const char *page, size_t len)
+{
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
+ u8 guc_log_target;
+ int ret;
+
+ ret = kstrtou8(page, 0, &guc_log_target);
+ if (ret)
+ return ret;
+
+ if (guc_log_target > GUC_LOG_TARGET_MAX)
+ return -EINVAL;
+
+ guard(mutex)(&dev->lock);
+ if (xe_configfs_is_bound(dev))
+ return -EBUSY;
+
+ dev->config.debug.guc_log_target = guc_log_target;
+
+ return len;
+}
+
/**
* xe_configfs_get_enable_multi_queue - get configfs enable_multi_queue setting
* @pdev: pci device
@@ -1013,6 +1074,7 @@ CONFIGFS_ATTR(, ctx_restore_post_bb);
CONFIGFS_ATTR(, engines_allowed);
CONFIGFS_ATTR(, gt_types_allowed);
CONFIGFS_ATTR(, guc_log_level);
+CONFIGFS_ATTR(, guc_log_target);
CONFIGFS_ATTR(, enable_multi_queue);
CONFIGFS_ATTR(, enable_psmi);
CONFIGFS_ATTR(, enable_vram_page_offline);
@@ -1023,6 +1085,7 @@ static struct configfs_attribute *xe_configfs_debug_attrs[] = {
&attr_engines_allowed,
&attr_gt_types_allowed,
&attr_guc_log_level,
+ &attr_guc_log_target,
&attr_enable_multi_queue,
&attr_enable_psmi,
&attr_enable_vram_page_offline,
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.h b/drivers/gpu/drm/xe/xe_configfs_debug.h
index c4915832f539..d8e08d64a410 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug.h
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.h
@@ -27,6 +27,7 @@ u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
int xe_configfs_get_guc_log_level(struct pci_dev *pdev);
+u8 xe_configfs_get_guc_log_target(struct pci_dev *pdev);
bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev);
bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
bool xe_configfs_get_enable_vram_page_offline(struct pci_dev *pdev);
@@ -52,6 +53,10 @@ static inline int xe_configfs_get_guc_log_level(struct pci_dev *pdev)
{
return xe_modparam.guc_log_level;
}
+static inline u8 xe_configfs_get_guc_log_target(struct pci_dev *pdev)
+{
+ return XE_DEFAULT_GUC_LOG_TARGET;
+}
static inline bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev) { return true; }
static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
static inline bool xe_configfs_get_enable_vram_page_offline(struct pci_dev *pdev) { return true; }
diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h b/drivers/gpu/drm/xe/xe_configfs_types.h
index 01903cb4423e..f9c71954114d 100644
--- a/drivers/gpu/drm/xe/xe_configfs_types.h
+++ b/drivers/gpu/drm/xe/xe_configfs_types.h
@@ -41,6 +41,7 @@ struct xe_config_group_device {
u64 engines_allowed;
u64 gt_types_allowed;
int guc_log_level;
+ u8 guc_log_target;
bool enable_multi_queue;
bool enable_psmi;
bool enable_vram_page_offline;
diff --git a/drivers/gpu/drm/xe/xe_defaults.h b/drivers/gpu/drm/xe/xe_defaults.h
index a9467b77fabd..20292e682bf9 100644
--- a/drivers/gpu/drm/xe/xe_defaults.h
+++ b/drivers/gpu/drm/xe/xe_defaults.h
@@ -5,6 +5,7 @@
#ifndef _XE_DEFAULTS_H_
#define _XE_DEFAULTS_H_
+#include "abi/guc_log_abi.h"
#include "xe_device_types.h"
#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
@@ -12,6 +13,7 @@
#else
#define XE_DEFAULT_GUC_LOG_LEVEL 1
#endif
+#define XE_DEFAULT_GUC_LOG_TARGET GUC_LOG_TARGET_MEM
/* Sentinel value for guc_log_level configfs: not set, fall back to module param */
#define XE_GUC_LOG_LEVEL_UNSET -1
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index c0398789081a..41ab68dab150 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -76,13 +76,18 @@ static u32 guc_bo_ggtt_addr(struct xe_guc *guc,
static u32 guc_ctl_debug_flags(struct xe_guc *guc)
{
+ struct pci_dev *pdev = to_pci_dev(guc_to_xe(guc)->drm.dev);
u32 level = xe_guc_log_get_level(&guc->log);
u32 flags = 0;
- if (!GUC_LOG_LEVEL_IS_VERBOSE(level))
+ if (!GUC_LOG_LEVEL_IS_VERBOSE(level)) {
flags |= GUC_LOG_DISABLED;
- else
- flags |= FIELD_PREP(GUC_LOG_VERBOSITY, GUC_LOG_LEVEL_TO_VERBOSITY(level));
+ } else {
+ flags |= FIELD_PREP(GUC_LOG_VERBOSITY,
+ GUC_LOG_LEVEL_TO_VERBOSITY(level));
+ flags |= FIELD_PREP(GUC_LOG_DESTINATION,
+ xe_configfs_get_guc_log_target(pdev));
+ }
return flags;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 12/15] drm/xe: Add infrastructure for debug configfs parameters
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
` (10 preceding siblings ...)
2026-10-05 19:06 ` [PATCH 11/15] drm/xe/guc: Add support for NPK as a GuC log target Stuart Summers
@ 2026-10-05 19:06 ` Stuart Summers
2026-10-05 19:06 ` [PATCH 13/15] drm/xe: Migrate existing debug configfs entries to params infrastructure Stuart Summers
` (6 subsequent siblings)
18 siblings, 0 replies; 21+ messages in thread
From: Stuart Summers @ 2026-10-05 19:06 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
gustavo.sousa, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Borrow the X-macro pattern from i915_debugfs_params.c and adapt it to
the Xe debug configfs interface, so future debug-only configfs entries
can be added with a single line.
Add a new header xe_configfs_debug_params.h that defines:
XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(param)
invoked as
'param(type, name, default, validator, visibility, getter, fallback)'
for each debug configfs parameter. The matching backing struct, default
initializer fragment, configfs_attribute objects, show/store handlers,
entries in xe_configfs_debug_attrs[] and the xe_configfs_get_<name>()
accessor are all generated from this single list.
Supported type tokens are int, bool, u8, u16, u32 and u64. Sized
unsigned types are used directly rather than mirroring i915's
int/unsigned int (which exists there only because those debugfs
entries shadow module_param values, and module_param itself does not
support sized types).
The validator slot is a function-like macro that takes the parsed
typed value and returns 0 or a negative errno. XE_PARAM_VALIDATE_NONE
is provided for parameters whose full type range is acceptable.
Function-like macros (rather than function pointers) let the compiler
fold trivial validators away entirely.
The visibility slot is a function-like macro that takes a config_item
and returns whether the attribute should be visible.
The getter and fallback slots drive the generated
xe_configfs_get_<name>(pdev) accessor: getter(dev, name) computes the
return value from a found device group, while fallback is returned
when no device group matches. Most parameters just read the stored
value and repeat their default as the fallback (XE_PARAM_GETTER_READ);
a parameter can override either slot when its accessor needs different
behavior.
The auto-generated handlers, configfs_attribute objects and getters
live in a new xe_configfs_debug_params.c so they do not crowd the
hand-written entries in xe_configfs_debug.c. The attribute objects are
non-static (declared 'extern' in the header) so xe_configfs_debug.c can
splice them into xe_configfs_debug_attrs[] and reference them from
is_visible().
The parameter list is intentionally empty in this patch; converting
existing entries (or adding new ones) is left to follow-up changes so
this infrastructure can be reviewed in isolation.
Note that the expectation is a user will only set these debug
parameters when CONFIG_DRM_XE_DEBUG is set; the entire facility lives
behind that Kconfig.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: LLM
---
drivers/gpu/drm/xe/Makefile | 2 +-
drivers/gpu/drm/xe/xe_configfs_debug_params.c | 151 +++++++++++++++
drivers/gpu/drm/xe/xe_configfs_debug_params.h | 174 ++++++++++++++++++
3 files changed, 326 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug_params.c
create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug_params.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 23accd9e6503..c8280a05aff0 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -168,7 +168,7 @@ xe-$(CONFIG_HWMON) += xe_hwmon.o
xe-$(CONFIG_PERF_EVENTS) += xe_pmu.o
xe-$(CONFIG_CONFIGFS_FS) += xe_configfs.o
ifeq ($(CONFIG_CONFIGFS_FS),y)
-xe-$(CONFIG_DRM_XE_DEBUG) += xe_configfs_debug.o
+xe-$(CONFIG_DRM_XE_DEBUG) += xe_configfs_debug.o xe_configfs_debug_params.o
endif
# graphics virtualization (SR-IOV) support
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug_params.c b/drivers/gpu/drm/xe/xe_configfs_debug_params.c
new file mode 100644
index 000000000000..c28d2e4693f8
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_configfs_debug_params.c
@@ -0,0 +1,151 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+/*
+ * Auto-generated debug configfs parameters.
+ *
+ * This file expands XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH() (defined in
+ * xe_configfs_debug_params.h) to define the show/store handlers and
+ * configfs_attribute objects for every parameter in the list.
+ *
+ * Per-type ops generators are provided for the simple scalar types
+ * supported by &struct xe_configfs_debug_params: int, bool, u8, u16,
+ * u32, u64. The integer template is parameterised on the kstrto helper
+ * and the printf format string; bool gets its own template because
+ * kstrtobool() has a different signature.
+ *
+ * Each store handler invokes the per-parameter validator (a
+ * function-like macro from the X-macro list), allowing range or
+ * sentinel checks to be expressed declaratively next to the parameter
+ * definition.
+ *
+ * Generated configfs_attribute objects are non-static so that
+ * xe_configfs_debug.c can reference them by symbol (xe_configfs_attr_<name>)
+ * when assembling its xe_configfs_debug_attrs[] array and its is_visible()
+ * callback.
+ *
+ * This file also generates the xe_configfs_get_<name>() accessors used
+ * by the rest of the driver to read a parameter's effective value; see
+ * the DOC section below.
+ */
+
+#include <linux/cleanup.h>
+#include <linux/configfs.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/string.h>
+#include <linux/sysfs.h>
+
+#include "xe_configfs_debug_params.h"
+#include "xe_configfs.h"
+
+#define _XE_PARAM_DEFINE_OPS_NUMERIC(_T, _name, _kstrto, _fmt, _validator) \
+static ssize_t _name##_show(struct config_item *item, char *page) \
+{ \
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item); \
+ XE_PARAM_TYPE_##_T val; \
+ scoped_guard(mutex, &dev->lock) \
+ val = dev->config.debug.params._name; \
+ return sprintf(page, _fmt "\n", val); \
+} \
+static ssize_t _name##_store(struct config_item *item, const char *page, size_t len) \
+{ \
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item); \
+ XE_PARAM_TYPE_##_T val; \
+ int ret = _kstrto(page, 0, &val); \
+ if (ret) \
+ return ret; \
+ ret = _validator(val); \
+ if (ret) \
+ return ret; \
+ guard(mutex)(&dev->lock); \
+ if (xe_configfs_is_bound(dev)) \
+ return -EBUSY; \
+ dev->config.debug.params._name = val; \
+ return len; \
+}
+
+#define _XE_PARAM_DEFINE_OPS_int(_name, _validator) \
+ _XE_PARAM_DEFINE_OPS_NUMERIC(int, _name, kstrtoint, "%d", _validator)
+#define _XE_PARAM_DEFINE_OPS_u8(_name, _validator) \
+ _XE_PARAM_DEFINE_OPS_NUMERIC(u8, _name, kstrtou8, "%u", _validator)
+#define _XE_PARAM_DEFINE_OPS_u16(_name, _validator) \
+ _XE_PARAM_DEFINE_OPS_NUMERIC(u16, _name, kstrtou16, "%u", _validator)
+#define _XE_PARAM_DEFINE_OPS_u32(_name, _validator) \
+ _XE_PARAM_DEFINE_OPS_NUMERIC(u32, _name, kstrtou32, "%u", _validator)
+#define _XE_PARAM_DEFINE_OPS_u64(_name, _validator) \
+ _XE_PARAM_DEFINE_OPS_NUMERIC(u64, _name, kstrtou64, "%llu", _validator)
+#define _XE_PARAM_DEFINE_OPS_bool(_name, _validator) \
+static ssize_t _name##_show(struct config_item *item, char *page) \
+{ \
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item); \
+ bool val; \
+ scoped_guard(mutex, &dev->lock) \
+ val = dev->config.debug.params._name; \
+ return sprintf(page, "%d\n", val); \
+} \
+static ssize_t _name##_store(struct config_item *item, const char *page, size_t len) \
+{ \
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item); \
+ bool val; \
+ int ret = kstrtobool(page, &val); \
+ if (ret) \
+ return ret; \
+ ret = _validator(val); \
+ if (ret) \
+ return ret; \
+ guard(mutex)(&dev->lock); \
+ if (xe_configfs_is_bound(dev)) \
+ return -EBUSY; \
+ dev->config.debug.params._name = val; \
+ return len; \
+}
+
+#define _XE_PARAM_DEFINE_OPS(_T, _name, _def, _validator, _vis, _get, _fallback) \
+ _XE_PARAM_DEFINE_OPS_##_T(_name, _validator)
+XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(_XE_PARAM_DEFINE_OPS)
+
+/*
+ * Define the configfs_attribute objects. These are non-static so they
+ * can be referenced from xe_configfs_debug.c.
+ */
+#define _XE_PARAM_DEFINE_ATTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+struct configfs_attribute xe_configfs_attr_##_name = { \
+ .ca_name = __stringify(_name), \
+ .ca_owner = THIS_MODULE, \
+ .ca_mode = 0644, \
+ .show = _name##_show, \
+ .store = _name##_store, \
+};
+
+XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(_XE_PARAM_DEFINE_ATTR)
+
+/**
+ * DOC: Debug configfs parameter getters
+ *
+ * xe_configfs_get_<name>() accessors for every parameter declared via
+ * XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH() are generated below from that
+ * same list. Each looks up the &xe_config_group_device matching @pdev,
+ * applies the parameter's "getter" macro to compute the return value,
+ * and drops the reference before returning. If no matching device
+ * group exists, the parameter's "fallback" value is returned instead.
+ *
+ * The CONFIG_DRM_XE_DEBUG=n stub for each of these accessors is
+ * generated separately, in xe_configfs_debug.h.
+ */
+#define _XE_PARAM_DEFINE_GETTER(_T, _name, _def, _val, _vis, _get, _fallback) \
+XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev) \
+{ \
+ struct xe_config_group_device *dev = xe_configfs_find_group_device(pdev); \
+ XE_PARAM_TYPE_##_T ret; \
+ if (!dev) \
+ return (_fallback); \
+ scoped_guard(mutex, &dev->lock) \
+ ret = _get(dev, _name); \
+ config_group_put(&dev->group); \
+ return ret; \
+}
+XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(_XE_PARAM_DEFINE_GETTER)
+#undef _XE_PARAM_DEFINE_GETTER
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug_params.h b/drivers/gpu/drm/xe/xe_configfs_debug_params.h
new file mode 100644
index 000000000000..3ed7ed22961f
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_configfs_debug_params.h
@@ -0,0 +1,174 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_CONFIGFS_DEBUG_PARAMS_H_
+#define _XE_CONFIGFS_DEBUG_PARAMS_H_
+
+#include <linux/configfs.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+
+struct pci_dev;
+
+/*
+ * Internal type/format aliases resolved by XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH().
+ *
+ * Each parameter declares its type using one of these tokens; the helper
+ * macros below and in xe_configfs_debug_params.c resolve the token to the
+ * underlying C type, printf format, and kstrto helper.
+ *
+ * Supported type tokens: int, bool, u8, u16, u32, u64. Add new types by
+ * defining matching XE_PARAM_TYPE_<token> and XE_PARAM_FMT_<token> here,
+ * plus an ops generator in xe_configfs_debug_params.c.
+ */
+#define XE_PARAM_TYPE_int int
+#define XE_PARAM_TYPE_bool bool
+#define XE_PARAM_TYPE_u8 u8
+#define XE_PARAM_TYPE_u16 u16
+#define XE_PARAM_TYPE_u32 u32
+#define XE_PARAM_TYPE_u64 u64
+
+#define XE_PARAM_FMT_int "%d"
+#define XE_PARAM_FMT_bool "%d"
+#define XE_PARAM_FMT_u8 "%u"
+#define XE_PARAM_FMT_u16 "%u"
+#define XE_PARAM_FMT_u32 "%u"
+#define XE_PARAM_FMT_u64 "%llu"
+
+/*
+ * Per-parameter validators
+ *
+ * A validator is a function-like macro that takes the (already-parsed)
+ * typed value and expands to an int expression: 0 if the value is
+ * acceptable, a negative errno (typically -EINVAL) otherwise.
+ *
+ * XE_PARAM_VALIDATE_NONE is the no-op validator for parameters whose
+ * full type range is acceptable.
+ */
+#define XE_PARAM_VALIDATE_NONE(_v) (0)
+
+/*
+ * Per-parameter getter helpers.
+ *
+ * "getter" is a function-like macro invoked as ``getter(dev, name)``,
+ * where @dev is a non-NULL, already-looked-up &xe_config_group_device;
+ * it expands to the value xe_configfs_get_<name>() should return.
+ * XE_PARAM_GETTER_READ is the default for parameters with no special
+ * behavior: read the value straight out of the stored params struct.
+ *
+ * "fallback" is the value xe_configfs_get_<name>() returns when no
+ * device group is found for the given PCI device, and unconditionally
+ * when CONFIG_DRM_XE_DEBUG is disabled (the generated accessor is then
+ * a static inline stub in xe_configfs_debug.h, with no device group to
+ * look up at all). Because it must be evaluable in both of those
+ * contexts, it must never reference @dev or &xe_config_group_device.
+ * It is usually just the parameter's default value; override it when
+ * the "nothing configured" value differs from the initial stored
+ * value, as with guc_log_level falling back to the guc_log_level
+ * module parameter.
+ */
+#define XE_PARAM_GETTER_READ(_dev, _name) ((_dev)->config.debug.params._name)
+
+/**
+ * XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH - iterate over debug configfs params
+ * @param: function-like macro called as
+ * ``param(type, name, default, validator, visibility, getter, fallback)``
+ *
+ * type: parameter type token, one of {int, bool, u8, u16, u32, u64}
+ * name: parameter name; appears as a configfs file at
+ * /sys/kernel/config/xe/<bdf>/debug/<name>
+ * default: initial/default value of the parameter
+ * validator: function-like macro ``v -> int`` returning 0 or a negative
+ * errno; use XE_PARAM_VALIDATE_NONE when no extra constraints
+ * apply beyond the underlying type's range
+ * visibility: function-like macro ``item -> bool`` returning true when
+ * the attribute should be visible; evaluated in
+ * xe_configfs_debug.c where the platform descriptor is
+ * accessible; use XE_PARAM_VISIBLE_ALWAYS for unconditional
+ * visibility
+ * getter: function-like macro ``(dev, name) -> value``; use
+ * XE_PARAM_GETTER_READ unless the accessor needs bespoke
+ * behavior
+ * fallback: value returned when there is no configfs override to
+ * consult; usually just repeat the default
+ *
+ * To add a new debug-only configfs parameter, append a single line to
+ * this list. The infrastructure auto-generates the struct member,
+ * default initialization, configfs attribute (show/store), inclusion in
+ * the debug attrs[] array, the xe_configfs_get_<name>() accessor (both
+ * its CONFIG_DRM_XE_DEBUG=y implementation and its =n stub), and the
+ * diagnostic dump in dump_custom_dev_config().
+ *
+ * Generated configfs files use the default permissions provided by the
+ * configfs core (read-write); a system administrator can restrict them
+ * at runtime if needed.
+ */
+#define XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(param) \
+ /* No parameters yet - add entries above this line. */
+
+/* Generate the struct that backs all debug params in xe_config_device. */
+#define _XE_PARAM_MEMBER(_T, _name, _def, _val, _vis, _get, _fallback) XE_PARAM_TYPE_##_T _name;
+struct xe_configfs_debug_params {
+ XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(_XE_PARAM_MEMBER)
+};
+
+#undef _XE_PARAM_MEMBER
+
+/*
+ * Designated-initializer fragment for &xe_configfs_device_defaults. Use as:
+ *
+ * .debug.params = {
+ * XE_CONFIGFS_DEBUG_PARAMS_DEFAULTS
+ * },
+ */
+#define _XE_PARAM_DEFAULT_INIT(_T, _name, _def, _val, _vis, _get, _fallback) ._name = (_def),
+#define XE_CONFIGFS_DEBUG_PARAMS_DEFAULTS \
+ XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(_XE_PARAM_DEFAULT_INIT)
+
+/*
+ * Forward declarations of the per-parameter configfs_attribute objects.
+ *
+ * The objects themselves are defined in xe_configfs_debug_params.c (as
+ * non-static so they can be referenced from xe_configfs_debug.c's
+ * xe_configfs_debug_attrs[] array and is_visible() callback). They live
+ * in the same translation unit as the X-macro-generated show/store
+ * handlers; consumers should reference them via xe_configfs_attr_<name>.
+ */
+#define _XE_PARAM_DECLARE_ATTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+ extern struct configfs_attribute xe_configfs_attr_##_name;
+XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(_XE_PARAM_DECLARE_ATTR)
+#undef _XE_PARAM_DECLARE_ATTR
+
+/*
+ * Helper used by xe_configfs_debug.c to splice the auto-generated
+ * attribute pointers into its xe_configfs_debug_attrs[] array.
+ */
+#define XE_PARAM_ATTR_PTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+ &xe_configfs_attr_##_name,
+
+/*
+ * Declarations of the per-parameter xe_configfs_get_<name>() accessors.
+ *
+ * The CONFIG_DRM_XE_DEBUG=y implementations are generated alongside the
+ * show/store handlers in xe_configfs_debug_params.c; see the DOC section
+ * there for what they do. xe_configfs_debug.h uses this macro to declare
+ * the matching prototypes for its callers.
+ */
+#define XE_PARAM_DECLARE_GETTER(_T, _name, _def, _val, _vis, _get, _fallback) \
+ XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev);
+
+/*
+ * CONFIG_DRM_XE_DEBUG=n stub for xe_configfs_get_<name>(). There is no
+ * configfs facility to consult in this configuration, so the accessor
+ * unconditionally returns its "fallback" value. Used by
+ * xe_configfs_debug.h.
+ */
+#define XE_PARAM_DECLARE_GETTER_STUB(_T, _name, _def, _val, _vis, _get, _fallback) \
+static inline XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev) \
+{ \
+ return _fallback; \
+}
+
+#endif /* _XE_CONFIGFS_DEBUG_PARAMS_H_ */
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 13/15] drm/xe: Migrate existing debug configfs entries to params infrastructure
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
` (11 preceding siblings ...)
2026-10-05 19:06 ` [PATCH 12/15] drm/xe: Add infrastructure for debug configfs parameters Stuart Summers
@ 2026-10-05 19:06 ` Stuart Summers
2026-10-05 19:06 ` [PATCH 14/15] drm/xe: Taint kernel when debug configfs parameters are set Stuart Summers
` (5 subsequent siblings)
18 siblings, 0 replies; 21+ messages in thread
From: Stuart Summers @ 2026-10-05 19:06 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
gustavo.sousa, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Move the existing debug configfs entries whose semantics fit the
generic show/store template into the new parameter list.
Add validators for the guc_log_level and guc_log_target.
Add a custom getter for the guc_log_level to fall back to the modparam.
The new parameters are intentionally longer than the normal 80
character limit for readability.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: LLM
---
drivers/gpu/drm/xe/xe_configfs.c | 19 +-
drivers/gpu/drm/xe/xe_configfs_debug.c | 282 +-----------------
drivers/gpu/drm/xe/xe_configfs_debug.h | 20 +-
drivers/gpu/drm/xe/xe_configfs_debug_params.c | 1 +
drivers/gpu/drm/xe/xe_configfs_debug_params.h | 22 +-
drivers/gpu/drm/xe/xe_configfs_types.h | 7 +-
drivers/gpu/drm/xe/xe_guc.c | 2 +-
drivers/gpu/drm/xe/xe_psmi.c | 2 +-
drivers/gpu/drm/xe/xe_rtp.c | 2 +-
9 files changed, 50 insertions(+), 307 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index d09c97eb8120..f6da51614d4a 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -130,13 +130,9 @@ const struct xe_config_device xe_configfs_device_defaults = {
.survivability_mode = 0,
#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
.debug = {
- .engines_allowed = U64_MAX,
- .gt_types_allowed = U64_MAX,
- .guc_log_level = XE_GUC_LOG_LEVEL_UNSET,
- .guc_log_target = XE_DEFAULT_GUC_LOG_TARGET,
- .enable_multi_queue = true,
- .enable_psmi = false,
- .enable_vram_page_offline = true,
+ .params = {
+ XE_CONFIGFS_DEBUG_PARAMS_DEFAULTS
+ },
},
#endif
.sriov = {
@@ -580,11 +576,10 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
PRI_CUSTOM_ATTR("%llx", debug.engines_allowed);
PRI_CUSTOM_ATTR("%llx", debug.gt_types_allowed);
- PRI_CUSTOM_ATTR("%d", debug.guc_log_level);
- PRI_CUSTOM_ATTR("%d", debug.guc_log_target);
- PRI_CUSTOM_ATTR("%d", debug.enable_multi_queue);
- PRI_CUSTOM_ATTR("%d", debug.enable_psmi);
- PRI_CUSTOM_ATTR("%d", debug.enable_vram_page_offline);
+#define _XE_PARAM_DUMP(_T, _name, _def, _val, _vis, _get, _fallback) \
+ PRI_CUSTOM_ATTR(XE_PARAM_FMT_##_T, debug.params._name);
+ XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(_XE_PARAM_DUMP)
+#undef _XE_PARAM_DUMP
#endif
PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c b/drivers/gpu/drm/xe/xe_configfs_debug.c
index ff8e38ed717d..3524706bc654 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug.c
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
@@ -817,278 +817,17 @@ static ssize_t gt_types_allowed_store(struct config_item *item, const char *page
return len;
}
-/**
- * xe_configfs_get_guc_log_level - get configfs guc_log_level setting
- * @pdev: pci device
- *
- * Returns the guc_log_level value configured via configfs. If the configfs
- * value is negative (the default is %XE_GUC_LOG_LEVEL_UNSET, -1), the value
- * of the ``guc_log_level`` module parameter is returned instead, allowing
- * the configfs entry to override the module parameter without affecting
- * users that rely solely on the module parameter.
- *
- * Return: GuC log level to use for this device.
- */
-int xe_configfs_get_guc_log_level(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_device(pdev);
- int level = xe_modparam.guc_log_level;
-
- if (!dev)
- return level;
-
- scoped_guard(mutex, &dev->lock)
- if (dev->config.debug.guc_log_level >= 0)
- level = dev->config.debug.guc_log_level;
-
- config_group_put(&dev->group);
-
- return level;
-}
-
-static ssize_t guc_log_level_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = xe_configfs_subgroup_to_device(item);
-
- return sprintf(page, "%d\n", dev->debug.guc_log_level);
-}
-
-static ssize_t guc_log_level_store(struct config_item *item, const char *page, size_t len)
-{
- struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
- int val;
- int ret;
-
- ret = kstrtoint(page, 0, &val);
- if (ret)
- return ret;
-
- if (val != XE_GUC_LOG_LEVEL_UNSET &&
- (val < 0 || val > GUC_LOG_LEVEL_MAX))
- return -EINVAL;
-
- guard(mutex)(&dev->lock);
- if (xe_configfs_is_bound(dev))
- return -EBUSY;
-
- dev->config.debug.guc_log_level = val;
-
- return len;
-}
-
-/**
- * xe_configfs_get_guc_log_target - get configfs GuC log target attribute
- * @pdev: pci device
- *
- * Return: guc_log_target attribute in configfs
- */
-u8 xe_configfs_get_guc_log_target(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_device(pdev);
- u8 target;
-
- if (!dev)
- return xe_configfs_device_defaults.debug.guc_log_target;
-
- scoped_guard(mutex, &dev->lock)
- target = dev->config.debug.guc_log_target;
- config_group_put(&dev->group);
-
- return target;
-}
-
-static ssize_t guc_log_target_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = xe_configfs_subgroup_to_device(item);
-
- return sprintf(page, "%d\n", dev->debug.guc_log_target);
-}
-
-static ssize_t guc_log_target_store(struct config_item *item, const char *page, size_t len)
-{
- struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
- u8 guc_log_target;
- int ret;
-
- ret = kstrtou8(page, 0, &guc_log_target);
- if (ret)
- return ret;
-
- if (guc_log_target > GUC_LOG_TARGET_MAX)
- return -EINVAL;
-
- guard(mutex)(&dev->lock);
- if (xe_configfs_is_bound(dev))
- return -EBUSY;
-
- dev->config.debug.guc_log_target = guc_log_target;
-
- return len;
-}
-
-/**
- * xe_configfs_get_enable_multi_queue - get configfs enable_multi_queue setting
- * @pdev: pci device
- *
- * Return: true if multi-queue is enabled for this device (the default),
- * false if it has been force-disabled via configfs.
- */
-bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_device(pdev);
- bool ret;
-
- if (!dev)
- return xe_configfs_device_defaults.debug.enable_multi_queue;
-
- scoped_guard(mutex, &dev->lock)
- ret = dev->config.debug.enable_multi_queue;
- config_group_put(&dev->group);
-
- return ret;
-}
-
-static ssize_t enable_multi_queue_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = xe_configfs_subgroup_to_device(item);
-
- return sprintf(page, "%d\n", dev->debug.enable_multi_queue);
-}
-
-static ssize_t enable_multi_queue_store(struct config_item *item, const char *page, size_t len)
-{
- struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
- bool val;
- int ret;
-
- ret = kstrtobool(page, &val);
- if (ret)
- return ret;
-
- guard(mutex)(&dev->lock);
- if (xe_configfs_is_bound(dev))
- return -EBUSY;
-
- dev->config.debug.enable_multi_queue = val;
-
- return len;
-}
-
-/**
- * xe_configfs_get_psmi_enabled - get configfs enable_psmi setting
- * @pdev: pci device
- *
- * Return: enable_psmi setting in configfs
- */
-bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_device(pdev);
- bool ret;
-
- if (!dev)
- return false;
-
- scoped_guard(mutex, &dev->lock)
- ret = dev->config.debug.enable_psmi;
- config_group_put(&dev->group);
-
- return ret;
-}
-
-static ssize_t enable_psmi_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = xe_configfs_subgroup_to_device(item);
-
- return sprintf(page, "%d\n", dev->debug.enable_psmi);
-}
-
-static ssize_t enable_psmi_store(struct config_item *item, const char *page, size_t len)
-{
- struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
- bool val;
- int ret;
-
- ret = kstrtobool(page, &val);
- if (ret)
- return ret;
-
- guard(mutex)(&dev->lock);
- if (xe_configfs_is_bound(dev))
- return -EBUSY;
-
- dev->config.debug.enable_psmi = val;
-
- return len;
-}
-
-/**
- * xe_configfs_get_enable_vram_page_offline - get configfs enable_vram_page_offline setting
- * @pdev: pci device
- *
- * Return: enable_vram_page_offline setting in configfs
- */
-bool xe_configfs_get_enable_vram_page_offline(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_device(pdev);
- bool ret;
-
- if (!dev)
- return xe_configfs_device_defaults.debug.enable_vram_page_offline;
-
- scoped_guard(mutex, &dev->lock)
- ret = dev->config.debug.enable_vram_page_offline;
- config_group_put(&dev->group);
-
- return ret;
-}
-
-static ssize_t enable_vram_page_offline_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = xe_configfs_subgroup_to_device(item);
-
- return sprintf(page, "%s\n", str_yes_no(dev->debug.enable_vram_page_offline));
-}
-
-static ssize_t enable_vram_page_offline_store(struct config_item *item,
- const char *page, size_t len)
-{
- struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item);
- bool val;
- int ret;
-
- ret = kstrtobool(page, &val);
- if (ret)
- return ret;
-
- guard(mutex)(&dev->lock);
- if (xe_configfs_is_bound(dev))
- return -EBUSY;
-
- dev->config.debug.enable_vram_page_offline = val;
-
- return len;
-}
-
CONFIGFS_ATTR(, ctx_restore_mid_bb);
CONFIGFS_ATTR(, ctx_restore_post_bb);
CONFIGFS_ATTR(, engines_allowed);
CONFIGFS_ATTR(, gt_types_allowed);
-CONFIGFS_ATTR(, guc_log_level);
-CONFIGFS_ATTR(, guc_log_target);
-CONFIGFS_ATTR(, enable_multi_queue);
-CONFIGFS_ATTR(, enable_psmi);
-CONFIGFS_ATTR(, enable_vram_page_offline);
static struct configfs_attribute *xe_configfs_debug_attrs[] = {
&attr_ctx_restore_mid_bb,
&attr_ctx_restore_post_bb,
&attr_engines_allowed,
&attr_gt_types_allowed,
- &attr_guc_log_level,
- &attr_guc_log_target,
- &attr_enable_multi_queue,
- &attr_enable_psmi,
- &attr_enable_vram_page_offline,
+ XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(XE_PARAM_ATTR_PTR)
NULL,
};
@@ -1096,27 +835,32 @@ static struct configfs_attribute *xe_configfs_debug_attrs[] = {
* Per-parameter visibility predicates.
*
* XE_PARAM_VISIBLE_ALWAYS - attribute is always shown.
+ * XE_PARAM_VISIBLE_VRAM_PAGE_OFFLINE - only shown on dGFX Crescent Island.
*
* These macros are only evaluated here, where the platform descriptor is
* reachable. xe_configfs_debug_params.h treats them as opaque tokens.
*/
#define XE_PARAM_VISIBLE_ALWAYS(_item) \
(true)
+#define XE_PARAM_VISIBLE_VRAM_PAGE_OFFLINE(_item) \
+ (xe_configfs_subgroup_to_group_device(_item)->desc->is_dgfx && \
+ xe_configfs_subgroup_to_group_device(_item)->desc->platform == XE_CRESCENTISLAND)
static bool xe_configfs_debug_is_visible(struct config_item *item,
struct configfs_attribute *attr, int n)
{
- struct xe_config_group_device *dev;
-
- if (attr == &attr_enable_vram_page_offline) {
- dev = xe_configfs_to_group_device(item->ci_parent);
-
- return dev->desc->is_dgfx && dev->desc->platform == XE_CRESCENTISLAND;
- }
+#define _XE_PARAM_VIS_CHECK(_T, _name, _def, _val, _vis, _get, _fallback) \
+ if (attr == &xe_configfs_attr_##_name) \
+ return _vis(item);
+ XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(_XE_PARAM_VIS_CHECK)
+#undef _XE_PARAM_VIS_CHECK
return true;
}
+#undef XE_PARAM_VISIBLE_ALWAYS
+#undef XE_PARAM_VISIBLE_VRAM_PAGE_OFFLINE
+
static struct configfs_group_operations xe_configfs_debug_group_ops = {
.is_visible = xe_configfs_debug_is_visible,
};
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.h b/drivers/gpu/drm/xe/xe_configfs_debug.h
index d8e08d64a410..136d3fb679ff 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug.h
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.h
@@ -7,7 +7,7 @@
#include <linux/types.h>
-#include "xe_defaults.h"
+#include "xe_configfs_debug_params.h"
#include "xe_hw_engine_types.h"
#include "xe_module.h"
@@ -26,11 +26,7 @@ ssize_t xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
-int xe_configfs_get_guc_log_level(struct pci_dev *pdev);
-u8 xe_configfs_get_guc_log_target(struct pci_dev *pdev);
-bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev);
-bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
-bool xe_configfs_get_enable_vram_page_offline(struct pci_dev *pdev);
+XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(XE_PARAM_DECLARE_GETTER)
#else
/*
* Callers gate these accesses on CONFIG_DRM_XE_DEBUG, so when that's
@@ -49,17 +45,7 @@ static inline ssize_t xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return true; }
static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; }
-static inline int xe_configfs_get_guc_log_level(struct pci_dev *pdev)
-{
- return xe_modparam.guc_log_level;
-}
-static inline u8 xe_configfs_get_guc_log_target(struct pci_dev *pdev)
-{
- return XE_DEFAULT_GUC_LOG_TARGET;
-}
-static inline bool xe_configfs_get_enable_multi_queue(struct pci_dev *pdev) { return true; }
-static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
-static inline bool xe_configfs_get_enable_vram_page_offline(struct pci_dev *pdev) { return true; }
+XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(XE_PARAM_DECLARE_GETTER_STUB)
#endif
#endif /* _XE_CONFIGFS_DEBUG_H_ */
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug_params.c b/drivers/gpu/drm/xe/xe_configfs_debug_params.c
index c28d2e4693f8..b85bd82c8c94 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug_params.c
+++ b/drivers/gpu/drm/xe/xe_configfs_debug_params.c
@@ -40,6 +40,7 @@
#include "xe_configfs_debug_params.h"
#include "xe_configfs.h"
+#include "xe_configfs_debug.h"
#define _XE_PARAM_DEFINE_OPS_NUMERIC(_T, _name, _kstrto, _fmt, _validator) \
static ssize_t _name##_show(struct config_item *item, char *page) \
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug_params.h b/drivers/gpu/drm/xe/xe_configfs_debug_params.h
index 3ed7ed22961f..b469ae365aa1 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug_params.h
+++ b/drivers/gpu/drm/xe/xe_configfs_debug_params.h
@@ -10,6 +10,12 @@
#include <linux/errno.h>
#include <linux/types.h>
+#include "abi/guc_log_abi.h"
+#include "xe_defaults.h"
+#include "xe_guc_fwif.h"
+#include "xe_guc_log.h"
+#include "xe_module.h"
+
struct pci_dev;
/*
@@ -49,6 +55,12 @@ struct pci_dev;
*/
#define XE_PARAM_VALIDATE_NONE(_v) (0)
+#define XE_PARAM_VALIDATE_GUC_LOG_LEVEL(_v) \
+ (((_v) == XE_GUC_LOG_LEVEL_UNSET || \
+ ((_v) >= 0 && (_v) <= GUC_LOG_LEVEL_MAX)) ? 0 : -EINVAL)
+#define XE_PARAM_VALIDATE_GUC_LOG_TARGET(_v) \
+ (((_v) <= GUC_LOG_TARGET_MAX) ? 0 : -EINVAL)
+
/*
* Per-parameter getter helpers.
*
@@ -71,6 +83,10 @@ struct pci_dev;
*/
#define XE_PARAM_GETTER_READ(_dev, _name) ((_dev)->config.debug.params._name)
+#define XE_PARAM_GETTER_GUC_LOG_LEVEL(_dev, _name) \
+ ({ typeof((_dev)->config.debug.params._name) __v = (_dev)->config.debug.params._name; \
+ __v >= 0 ? __v : xe_modparam.guc_log_level; })
+
/**
* XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH - iterate over debug configfs params
* @param: function-like macro called as
@@ -106,7 +122,11 @@ struct pci_dev;
* at runtime if needed.
*/
#define XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(param) \
- /* No parameters yet - add entries above this line. */
+ param(int, guc_log_level, XE_GUC_LOG_LEVEL_UNSET, XE_PARAM_VALIDATE_GUC_LOG_LEVEL, XE_PARAM_VISIBLE_ALWAYS, XE_PARAM_GETTER_GUC_LOG_LEVEL, xe_modparam.guc_log_level) \
+ param(u8, guc_log_target, XE_DEFAULT_GUC_LOG_TARGET, XE_PARAM_VALIDATE_GUC_LOG_TARGET, XE_PARAM_VISIBLE_ALWAYS, XE_PARAM_GETTER_READ, XE_DEFAULT_GUC_LOG_TARGET) \
+ param(bool, enable_multi_queue, true, XE_PARAM_VALIDATE_NONE, XE_PARAM_VISIBLE_ALWAYS, XE_PARAM_GETTER_READ, true) \
+ param(bool, enable_psmi, false, XE_PARAM_VALIDATE_NONE, XE_PARAM_VISIBLE_ALWAYS, XE_PARAM_GETTER_READ, false) \
+ param(bool, enable_vram_page_offline, true, XE_PARAM_VALIDATE_NONE, XE_PARAM_VISIBLE_VRAM_PAGE_OFFLINE, XE_PARAM_GETTER_READ, true)
/* Generate the struct that backs all debug params in xe_config_device. */
#define _XE_PARAM_MEMBER(_T, _name, _def, _val, _vis, _get, _fallback) XE_PARAM_TYPE_##_T _name;
diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h b/drivers/gpu/drm/xe/xe_configfs_types.h
index f9c71954114d..7cee4daabdb0 100644
--- a/drivers/gpu/drm/xe/xe_configfs_types.h
+++ b/drivers/gpu/drm/xe/xe_configfs_types.h
@@ -9,6 +9,7 @@
#include <linux/mutex.h>
#include <linux/types.h>
+#include "xe_configfs_debug_params.h"
#include "xe_hw_engine_types.h"
#include "xe_pci_types.h"
#include "xe_sriov_types.h"
@@ -40,11 +41,7 @@ struct xe_config_group_device {
struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
u64 engines_allowed;
u64 gt_types_allowed;
- int guc_log_level;
- u8 guc_log_target;
- bool enable_multi_queue;
- bool enable_psmi;
- bool enable_vram_page_offline;
+ struct xe_configfs_debug_params params;
} debug;
#endif
struct {
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 41ab68dab150..14e93dda0180 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -100,7 +100,7 @@ static u32 guc_ctl_feature_flags(struct xe_guc *guc)
if (!xe->info.skip_guc_pc)
flags |= GUC_CTL_ENABLE_SLPC;
- if (xe_configfs_get_psmi_enabled(to_pci_dev(xe->drm.dev)))
+ if (xe_configfs_get_enable_psmi(to_pci_dev(xe->drm.dev)))
flags |= GUC_CTL_ENABLE_PSMI_LOGGING;
if (xe_guc_using_main_gamctrl_queues(guc))
diff --git a/drivers/gpu/drm/xe/xe_psmi.c b/drivers/gpu/drm/xe/xe_psmi.c
index 59af3d145418..ff9a14949339 100644
--- a/drivers/gpu/drm/xe/xe_psmi.c
+++ b/drivers/gpu/drm/xe/xe_psmi.c
@@ -34,7 +34,7 @@
static bool psmi_enabled(struct xe_device *xe)
{
- return xe_configfs_get_psmi_enabled(to_pci_dev(xe->drm.dev));
+ return xe_configfs_get_enable_psmi(to_pci_dev(xe->drm.dev));
}
static void psmi_free_object(struct xe_bo *bo)
diff --git a/drivers/gpu/drm/xe/xe_rtp.c b/drivers/gpu/drm/xe/xe_rtp.c
index 62068189320f..3ead1eac93f5 100644
--- a/drivers/gpu/drm/xe/xe_rtp.c
+++ b/drivers/gpu/drm/xe/xe_rtp.c
@@ -450,7 +450,7 @@ bool xe_rtp_match_psmi_enabled(const struct xe_device *xe,
const struct xe_gt *gt,
const struct xe_hw_engine *hwe)
{
- return xe_configfs_get_psmi_enabled(to_pci_dev(xe->drm.dev));
+ return xe_configfs_get_enable_psmi(to_pci_dev(xe->drm.dev));
}
bool xe_rtp_match_gt_has_discontiguous_dss_groups(const struct xe_device *xe,
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 14/15] drm/xe: Taint kernel when debug configfs parameters are set
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
` (12 preceding siblings ...)
2026-10-05 19:06 ` [PATCH 13/15] drm/xe: Migrate existing debug configfs entries to params infrastructure Stuart Summers
@ 2026-10-05 19:06 ` Stuart Summers
2026-10-05 19:06 ` [PATCH 15/15] drm/xe: Add enable_media module parameter Stuart Summers
` (4 subsequent siblings)
18 siblings, 0 replies; 21+ messages in thread
From: Stuart Summers @ 2026-10-05 19:06 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
gustavo.sousa, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Writing any debug configfs attribute indicates the system is running
in a non-standard configuration that may mask bugs or produce misleading
behaviour. Taint the kernel with TAINT_TEST on each successful write so
bug reports clearly reflect when debug settings were active.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: LLM
---
drivers/gpu/drm/xe/xe_configfs_debug.c | 12 ++++++++++++
drivers/gpu/drm/xe/xe_configfs_debug_params.c | 6 ++++++
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c b/drivers/gpu/drm/xe/xe_configfs_debug.c
index 3524706bc654..aa8b73cb2a64 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug.c
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
@@ -8,6 +8,7 @@
#include <linux/module.h>
#include <linux/cleanup.h>
#include <linux/find.h>
+#include <linux/panic.h>
#include <linux/pci.h>
#include <linux/string.h>
@@ -33,6 +34,10 @@
* and driver debugging and are not stable ABI. Using them is "at your own
* risk".
*
+ * Writing any debug attribute taints the kernel with ``TAINT_TEST``. This
+ * makes it visible in bug reports when a non-standard or unsafe configuration
+ * was active.
+ *
* See the top-level ``Xe Configfs`` documentation in ``xe_configfs.c``
* for how to create, probe and remove configfs devices. Once a device
* directory exists, the driver populates it with a ``debug/`` subdirectory
@@ -553,6 +558,7 @@ static ssize_t wa_bb_store(struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
if (!count) {
memset(wa_bb, 0, sizeof(tmp_wa_bb));
+ add_taint(TAINT_TEST, LOCKDEP_STILL_OK);
return len;
}
@@ -572,6 +578,8 @@ static ssize_t wa_bb_store(struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
memcpy(wa_bb, tmp_wa_bb, sizeof(tmp_wa_bb));
+ add_taint(TAINT_TEST, LOCKDEP_STILL_OK);
+
return len;
}
@@ -724,6 +732,8 @@ static ssize_t engines_allowed_store(struct config_item *item, const char *page,
dev->config.debug.engines_allowed = val;
+ add_taint(TAINT_TEST, LOCKDEP_STILL_OK);
+
return len;
}
@@ -814,6 +824,8 @@ static ssize_t gt_types_allowed_store(struct config_item *item, const char *page
dev->config.debug.gt_types_allowed = typemask;
+ add_taint(TAINT_TEST, LOCKDEP_STILL_OK);
+
return len;
}
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug_params.c b/drivers/gpu/drm/xe/xe_configfs_debug_params.c
index b85bd82c8c94..5a69d4b15442 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug_params.c
+++ b/drivers/gpu/drm/xe/xe_configfs_debug_params.c
@@ -29,11 +29,15 @@
* This file also generates the xe_configfs_get_<name>() accessors used
* by the rest of the driver to read a parameter's effective value; see
* the DOC section below.
+ *
+ * Setting these parameters taints the kernel since these are intended
+ * for debug and testing purposes only.
*/
#include <linux/cleanup.h>
#include <linux/configfs.h>
#include <linux/kernel.h>
+#include <linux/panic.h>
#include <linux/pci.h>
#include <linux/string.h>
#include <linux/sysfs.h>
@@ -65,6 +69,7 @@ static ssize_t _name##_store(struct config_item *item, const char *page, size_t
if (xe_configfs_is_bound(dev)) \
return -EBUSY; \
dev->config.debug.params._name = val; \
+ add_taint(TAINT_TEST, LOCKDEP_STILL_OK); \
return len; \
}
@@ -101,6 +106,7 @@ static ssize_t _name##_store(struct config_item *item, const char *page, size_t
if (xe_configfs_is_bound(dev)) \
return -EBUSY; \
dev->config.debug.params._name = val; \
+ add_taint(TAINT_TEST, LOCKDEP_STILL_OK); \
return len; \
}
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 15/15] drm/xe: Add enable_media module parameter
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
` (13 preceding siblings ...)
2026-10-05 19:06 ` [PATCH 14/15] drm/xe: Taint kernel when debug configfs parameters are set Stuart Summers
@ 2026-10-05 19:06 ` Stuart Summers
2026-10-05 19:26 ` ✗ CI.checkpatch: warning for Add new debug infrastructure for configfs (rev9) Patchwork
` (3 subsequent siblings)
18 siblings, 0 replies; 21+ messages in thread
From: Stuart Summers @ 2026-10-05 19:06 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
gustavo.sousa, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
The gt_types_allowed configfs attribute is debug-only, so provide a
supported way to disable the media GT on production builds. The
modparam takes precedence over configfs so a single knob is enough to
guarantee the media GT is left alone.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: LLM
---
drivers/gpu/drm/xe/xe_configfs_debug.c | 3 +++
drivers/gpu/drm/xe/xe_defaults.h | 1 +
drivers/gpu/drm/xe/xe_module.c | 6 ++++++
drivers/gpu/drm/xe/xe_module.h | 1 +
drivers/gpu/drm/xe/xe_pci.c | 19 ++++++++++++++++---
5 files changed, 27 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c b/drivers/gpu/drm/xe/xe_configfs_debug.c
index aa8b73cb2a64..e6a0b1f960bc 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug.c
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
@@ -184,6 +184,9 @@
* will always return one GT type per line. "primary" and "media" are the
* GT type names supported by this interface.
*
+ * Note that the ``enable_media=0`` module parameter takes precedence over
+ * this attribute: it disables the media GT even if "media" is listed here.
+ *
* This attribute can only be set before binding to the device.
*
* Examples:
diff --git a/drivers/gpu/drm/xe/xe_defaults.h b/drivers/gpu/drm/xe/xe_defaults.h
index 20292e682bf9..fdb12ebfa4e4 100644
--- a/drivers/gpu/drm/xe/xe_defaults.h
+++ b/drivers/gpu/drm/xe/xe_defaults.h
@@ -18,6 +18,7 @@
/* Sentinel value for guc_log_level configfs: not set, fall back to module param */
#define XE_GUC_LOG_LEVEL_UNSET -1
+#define XE_DEFAULT_ENABLE_MEDIA true
#define XE_DEFAULT_PROBE_DISPLAY IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
#define XE_DEFAULT_VRAM_BAR_SIZE 0
#define XE_DEFAULT_FORCE_PROBE CONFIG_DRM_XE_FORCE_PROBE
diff --git a/drivers/gpu/drm/xe/xe_module.c b/drivers/gpu/drm/xe/xe_module.c
index 897724cb5cfb..be6a3a439cb0 100644
--- a/drivers/gpu/drm/xe/xe_module.c
+++ b/drivers/gpu/drm/xe/xe_module.c
@@ -22,6 +22,7 @@
#include "xe_sched_job.h"
struct xe_modparam xe_modparam = {
+ .enable_media = XE_DEFAULT_ENABLE_MEDIA,
.probe_display = XE_DEFAULT_PROBE_DISPLAY,
.guc_log_level = XE_DEFAULT_GUC_LOG_LEVEL,
.force_probe = XE_DEFAULT_FORCE_PROBE,
@@ -38,6 +39,11 @@ module_param_named(svm_notifier_size, xe_modparam.svm_notifier_size, uint, 0600)
MODULE_PARM_DESC(svm_notifier_size, "Set the svm notifier size in MiB, must be power of 2 "
"[default=" __stringify(XE_DEFAULT_SVM_NOTIFIER_SIZE) "]");
+module_param_named(enable_media, xe_modparam.enable_media, bool, 0444);
+MODULE_PARM_DESC(enable_media, "Enable the media GT, when present. Disabling overrides any "
+ "media GT selected via the gt_types_allowed configfs attribute "
+ "[default=" __stringify(XE_DEFAULT_ENABLE_MEDIA) "])");
+
#if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
module_param_named(probe_display, xe_modparam.probe_display, bool, 0444);
MODULE_PARM_DESC(probe_display, "Probe display HW, otherwise it's left untouched "
diff --git a/drivers/gpu/drm/xe/xe_module.h b/drivers/gpu/drm/xe/xe_module.h
index 6272d9e41207..b10010e0a007 100644
--- a/drivers/gpu/drm/xe/xe_module.h
+++ b/drivers/gpu/drm/xe/xe_module.h
@@ -12,6 +12,7 @@ struct work_struct;
/* Module modprobe variables */
struct xe_modparam {
+ bool enable_media;
bool probe_display;
int force_vram_bar_size;
int guc_log_level;
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 18fa9d4f2f6d..6544c373af8c 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -613,6 +613,19 @@ enum xe_gmdid_type {
GMDID_MEDIA
};
+/*
+ * The media GT is usable only if both the enable_media modparam and the
+ * gt_types_allowed configfs attribute allow it; the modparam takes
+ * precedence and disables the media GT regardless of the configfs setting.
+ */
+static bool media_gt_allowed(struct xe_device *xe)
+{
+ if (!xe_modparam.enable_media)
+ return false;
+
+ return xe_configfs_media_gt_allowed(to_pci_dev(xe->drm.dev));
+}
+
static int read_gmdid(struct xe_device *xe, enum xe_gmdid_type type, u32 *ver, u32 *revid)
{
struct xe_mmio *mmio = xe_root_tile_mmio(xe);
@@ -634,7 +647,7 @@ static int read_gmdid(struct xe_device *xe, enum xe_gmdid_type type, u32 *ver, u
int err;
/* Don't try to read media ver if media GT is not allowed */
- if (type == GMDID_MEDIA && !xe_configfs_media_gt_allowed(to_pci_dev(xe->drm.dev))) {
+ if (type == GMDID_MEDIA && !media_gt_allowed(xe)) {
*ver = *revid = 0;
return 0;
}
@@ -929,8 +942,8 @@ static struct xe_gt *alloc_media_gt(struct xe_tile *tile,
struct xe_device *xe = tile_to_xe(tile);
struct xe_gt *gt;
- if (!xe_configfs_media_gt_allowed(to_pci_dev(xe->drm.dev))) {
- xe_tile_info(tile, "Media GT disabled via configfs\n");
+ if (!media_gt_allowed(xe)) {
+ xe_tile_info(tile, "Media GT disabled\n");
return NULL;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* ✗ CI.checkpatch: warning for Add new debug infrastructure for configfs (rev9)
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
` (14 preceding siblings ...)
2026-10-05 19:06 ` [PATCH 15/15] drm/xe: Add enable_media module parameter Stuart Summers
@ 2026-10-05 19:26 ` Patchwork
2026-10-05 19:28 ` ✓ CI.KUnit: success " Patchwork
` (2 subsequent siblings)
18 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2026-10-05 19:26 UTC (permalink / raw)
To: Stuart Summers; +Cc: intel-xe
== Series Details ==
Series: Add new debug infrastructure for configfs (rev9)
URL : https://patchwork.freedesktop.org/series/165879/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
6bef5ce5c74dc76b4ee69ab2832c0d1fd63c91c7
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 5fd1a7baa1a57943a746cc52cb17739d647c634b
Author: Stuart Summers <stuart.summers@intel.com>
Date: Mon Oct 5 19:06:25 2026 +0000
drm/xe: Add enable_media module parameter
The gt_types_allowed configfs attribute is debug-only, so provide a
supported way to disable the media GT on production builds. The
modparam takes precedence over configfs so a single knob is enough to
guarantee the media GT is left alone.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: LLM
+ /mt/dim checkpatch c1341b7b7cec27ca50f287ec497e41a8cc88f22b drm-intel
da12487153d9 drm/xe: Guard configfs attribute reads in getters
f3c9411d3200 drm/xe/configfs: Fix out-of-bounds read in parse_wa_bb_lines()
47564c1b8672 drm/xe/configfs: Copy wa_bb out under the configfs lock
ab0ace4b72d5 drm/xe: Invert vram_page_offline configfs attribute
d99a29444f93 drm/xe: Make survivability_mode configfs attribute a bitmap
6e6f8a80597e drm/xe: Sort xe_config_device fields
e562b47354c3 drm/xe: Split out configfs data structures
-:101: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#101:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 124 lines checked
a63349c528b3 drm/xe: Add a new debug focused configfs group
-:52: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#52:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 62 lines checked
dd8274ed0d92 drm/xe: Move debug configfs entries to xe_configfs_debug.c
-:1677: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#1677: FILE: drivers/gpu/drm/xe/xe_configfs_debug.c:220:
+ { .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_DECODE },
-:1678: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#1678: FILE: drivers/gpu/drm/xe/xe_configfs_debug.c:221:
+ { .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_ENHANCE },
-:2413: WARNING:MACRO_ARG_UNUSED: Argument '_item' is not used in function-like macro
#2413: FILE: drivers/gpu/drm/xe/xe_configfs_debug.c:956:
+#define XE_PARAM_VISIBLE_ALWAYS(_item) \
+ (true)
total: 0 errors, 3 warnings, 0 checks, 2531 lines checked
45795682d823 drm/xe/guc: Add configfs support for guc_log_level
1d5f5e72f97f drm/xe/guc: Add support for NPK as a GuC log target
-:180: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#180: FILE: drivers/gpu/drm/xe/xe_configfs_debug.h:56:
}
+static inline u8 xe_configfs_get_guc_log_target(struct pci_dev *pdev)
total: 0 errors, 0 warnings, 1 checks, 182 lines checked
d1fe70aaf3be drm/xe: Add infrastructure for debug configfs parameters
-:76: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#76:
new file mode 100644
-:124: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_name' - possible side-effects?
#124: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:44:
+#define _XE_PARAM_DEFINE_OPS_NUMERIC(_T, _name, _kstrto, _fmt, _validator) \
+static ssize_t _name##_show(struct config_item *item, char *page) \
+{ \
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item); \
+ XE_PARAM_TYPE_##_T val; \
+ scoped_guard(mutex, &dev->lock) \
+ val = dev->config.debug.params._name; \
+ return sprintf(page, _fmt "\n", val); \
+} \
+static ssize_t _name##_store(struct config_item *item, const char *page, size_t len) \
+{ \
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item); \
+ XE_PARAM_TYPE_##_T val; \
+ int ret = _kstrto(page, 0, &val); \
+ if (ret) \
+ return ret; \
+ ret = _validator(val); \
+ if (ret) \
+ return ret; \
+ guard(mutex)(&dev->lock); \
+ if (xe_configfs_is_bound(dev)) \
+ return -EBUSY; \
+ dev->config.debug.params._name = val; \
+ return len; \
+}
-:160: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_name' - possible side-effects?
#160: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:80:
+#define _XE_PARAM_DEFINE_OPS_bool(_name, _validator) \
+static ssize_t _name##_show(struct config_item *item, char *page) \
+{ \
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item); \
+ bool val; \
+ scoped_guard(mutex, &dev->lock) \
+ val = dev->config.debug.params._name; \
+ return sprintf(page, "%d\n", val); \
+} \
+static ssize_t _name##_store(struct config_item *item, const char *page, size_t len) \
+{ \
+ struct xe_config_group_device *dev = xe_configfs_subgroup_to_group_device(item); \
+ bool val; \
+ int ret = kstrtobool(page, &val); \
+ if (ret) \
+ return ret; \
+ ret = _validator(val); \
+ if (ret) \
+ return ret; \
+ guard(mutex)(&dev->lock); \
+ if (xe_configfs_is_bound(dev)) \
+ return -EBUSY; \
+ dev->config.debug.params._name = val; \
+ return len; \
+}
-:186: WARNING:MACRO_ARG_UNUSED: Argument '_def' is not used in function-like macro
#186: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:106:
+#define _XE_PARAM_DEFINE_OPS(_T, _name, _def, _validator, _vis, _get, _fallback) \
+ _XE_PARAM_DEFINE_OPS_##_T(_name, _validator)
-:186: WARNING:MACRO_ARG_UNUSED: Argument '_vis' is not used in function-like macro
#186: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:106:
+#define _XE_PARAM_DEFINE_OPS(_T, _name, _def, _validator, _vis, _get, _fallback) \
+ _XE_PARAM_DEFINE_OPS_##_T(_name, _validator)
-:186: WARNING:MACRO_ARG_UNUSED: Argument '_get' is not used in function-like macro
#186: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:106:
+#define _XE_PARAM_DEFINE_OPS(_T, _name, _def, _validator, _vis, _get, _fallback) \
+ _XE_PARAM_DEFINE_OPS_##_T(_name, _validator)
-:186: WARNING:MACRO_ARG_UNUSED: Argument '_fallback' is not used in function-like macro
#186: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:106:
+#define _XE_PARAM_DEFINE_OPS(_T, _name, _def, _validator, _vis, _get, _fallback) \
+ _XE_PARAM_DEFINE_OPS_##_T(_name, _validator)
-:194: WARNING:MACRO_ARG_UNUSED: Argument '_T' is not used in function-like macro
#194: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:114:
+#define _XE_PARAM_DEFINE_ATTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+struct configfs_attribute xe_configfs_attr_##_name = { \
+ .ca_name = __stringify(_name), \
+ .ca_owner = THIS_MODULE, \
+ .ca_mode = 0644, \
+ .show = _name##_show, \
+ .store = _name##_store, \
+};
-:194: WARNING:MACRO_ARG_UNUSED: Argument '_def' is not used in function-like macro
#194: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:114:
+#define _XE_PARAM_DEFINE_ATTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+struct configfs_attribute xe_configfs_attr_##_name = { \
+ .ca_name = __stringify(_name), \
+ .ca_owner = THIS_MODULE, \
+ .ca_mode = 0644, \
+ .show = _name##_show, \
+ .store = _name##_store, \
+};
-:194: WARNING:MACRO_ARG_UNUSED: Argument '_val' is not used in function-like macro
#194: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:114:
+#define _XE_PARAM_DEFINE_ATTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+struct configfs_attribute xe_configfs_attr_##_name = { \
+ .ca_name = __stringify(_name), \
+ .ca_owner = THIS_MODULE, \
+ .ca_mode = 0644, \
+ .show = _name##_show, \
+ .store = _name##_store, \
+};
-:194: WARNING:MACRO_ARG_UNUSED: Argument '_vis' is not used in function-like macro
#194: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:114:
+#define _XE_PARAM_DEFINE_ATTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+struct configfs_attribute xe_configfs_attr_##_name = { \
+ .ca_name = __stringify(_name), \
+ .ca_owner = THIS_MODULE, \
+ .ca_mode = 0644, \
+ .show = _name##_show, \
+ .store = _name##_store, \
+};
-:194: WARNING:MACRO_ARG_UNUSED: Argument '_get' is not used in function-like macro
#194: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:114:
+#define _XE_PARAM_DEFINE_ATTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+struct configfs_attribute xe_configfs_attr_##_name = { \
+ .ca_name = __stringify(_name), \
+ .ca_owner = THIS_MODULE, \
+ .ca_mode = 0644, \
+ .show = _name##_show, \
+ .store = _name##_store, \
+};
-:194: WARNING:MACRO_ARG_UNUSED: Argument '_fallback' is not used in function-like macro
#194: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:114:
+#define _XE_PARAM_DEFINE_ATTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+struct configfs_attribute xe_configfs_attr_##_name = { \
+ .ca_name = __stringify(_name), \
+ .ca_owner = THIS_MODULE, \
+ .ca_mode = 0644, \
+ .show = _name##_show, \
+ .store = _name##_store, \
+};
-:194: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#194: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:114:
+#define _XE_PARAM_DEFINE_ATTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+struct configfs_attribute xe_configfs_attr_##_name = { \
+ .ca_name = __stringify(_name), \
+ .ca_owner = THIS_MODULE, \
+ .ca_mode = 0644, \
+ .show = _name##_show, \
+ .store = _name##_store, \
+};
-:218: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#218: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:138:
+#define _XE_PARAM_DEFINE_GETTER(_T, _name, _def, _val, _vis, _get, _fallback) \
+XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev) \
+{ \
+ struct xe_config_group_device *dev = xe_configfs_find_group_device(pdev); \
+ XE_PARAM_TYPE_##_T ret; \
+ if (!dev) \
+ return (_fallback); \
+ scoped_guard(mutex, &dev->lock) \
+ ret = _get(dev, _name); \
+ config_group_put(&dev->group); \
+ return ret; \
+}
BUT SEE:
do {} while (0) advice is over-stated in a few situations:
The more obvious case is macros, like MODULE_PARM_DESC, invoked at
file-scope, where C disallows code (it must be in functions). See
$exceptions if you have one to add by name.
More troublesome is declarative macros used at top of new scope,
like DECLARE_PER_CPU. These might just compile with a do-while-0
wrapper, but would be incorrect. Most of these are handled by
detecting struct,union,etc declaration primitives in $exceptions.
Theres also macros called inside an if (block), which "return" an
expression. These cannot do-while, and need a ({}) wrapper.
Enjoy this qualification while we work to improve our heuristics.
-:218: WARNING:MACRO_ARG_UNUSED: Argument '_def' is not used in function-like macro
#218: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:138:
+#define _XE_PARAM_DEFINE_GETTER(_T, _name, _def, _val, _vis, _get, _fallback) \
+XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev) \
+{ \
+ struct xe_config_group_device *dev = xe_configfs_find_group_device(pdev); \
+ XE_PARAM_TYPE_##_T ret; \
+ if (!dev) \
+ return (_fallback); \
+ scoped_guard(mutex, &dev->lock) \
+ ret = _get(dev, _name); \
+ config_group_put(&dev->group); \
+ return ret; \
+}
-:218: WARNING:MACRO_ARG_UNUSED: Argument '_val' is not used in function-like macro
#218: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:138:
+#define _XE_PARAM_DEFINE_GETTER(_T, _name, _def, _val, _vis, _get, _fallback) \
+XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev) \
+{ \
+ struct xe_config_group_device *dev = xe_configfs_find_group_device(pdev); \
+ XE_PARAM_TYPE_##_T ret; \
+ if (!dev) \
+ return (_fallback); \
+ scoped_guard(mutex, &dev->lock) \
+ ret = _get(dev, _name); \
+ config_group_put(&dev->group); \
+ return ret; \
+}
-:218: WARNING:MACRO_ARG_UNUSED: Argument '_vis' is not used in function-like macro
#218: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:138:
+#define _XE_PARAM_DEFINE_GETTER(_T, _name, _def, _val, _vis, _get, _fallback) \
+XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev) \
+{ \
+ struct xe_config_group_device *dev = xe_configfs_find_group_device(pdev); \
+ XE_PARAM_TYPE_##_T ret; \
+ if (!dev) \
+ return (_fallback); \
+ scoped_guard(mutex, &dev->lock) \
+ ret = _get(dev, _name); \
+ config_group_put(&dev->group); \
+ return ret; \
+}
-:230: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#230: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:150:
+}
+XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(_XE_PARAM_DEFINE_GETTER)
-:287: WARNING:MACRO_ARG_UNUSED: Argument '_v' is not used in function-like macro
#287: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:50:
+#define XE_PARAM_VALIDATE_NONE(_v) (0)
-:349: WARNING:MULTISTATEMENT_MACRO_USE_DO_WHILE: Non-declarative macros with multiple statements should be enclosed in a do - while loop
#349: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:112:
+#define _XE_PARAM_MEMBER(_T, _name, _def, _val, _vis, _get, _fallback) XE_PARAM_TYPE_##_T _name;
BUT SEE:
do {} while (0) advice is over-stated in a few situations:
The more obvious case is macros, like MODULE_PARM_DESC, invoked at
file-scope, where C disallows code (it must be in functions). See
$exceptions if you have one to add by name.
More troublesome is declarative macros used at top of new scope,
like DECLARE_PER_CPU. These might just compile with a do-while-0
wrapper, but would be incorrect. Most of these are handled by
detecting struct,union,etc declaration primitives in $exceptions.
Theres also macros called inside an if (block), which "return" an
expression. These cannot do-while, and need a ({}) wrapper.
Enjoy this qualification while we work to improve our heuristics.
-:349: WARNING:MACRO_ARG_UNUSED: Argument '_def' is not used in function-like macro
#349: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:112:
+#define _XE_PARAM_MEMBER(_T, _name, _def, _val, _vis, _get, _fallback) XE_PARAM_TYPE_##_T _name;
-:349: WARNING:MACRO_ARG_UNUSED: Argument '_val' is not used in function-like macro
#349: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:112:
+#define _XE_PARAM_MEMBER(_T, _name, _def, _val, _vis, _get, _fallback) XE_PARAM_TYPE_##_T _name;
-:349: WARNING:MACRO_ARG_UNUSED: Argument '_vis' is not used in function-like macro
#349: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:112:
+#define _XE_PARAM_MEMBER(_T, _name, _def, _val, _vis, _get, _fallback) XE_PARAM_TYPE_##_T _name;
-:349: WARNING:MACRO_ARG_UNUSED: Argument '_get' is not used in function-like macro
#349: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:112:
+#define _XE_PARAM_MEMBER(_T, _name, _def, _val, _vis, _get, _fallback) XE_PARAM_TYPE_##_T _name;
-:349: WARNING:MACRO_ARG_UNUSED: Argument '_fallback' is not used in function-like macro
#349: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:112:
+#define _XE_PARAM_MEMBER(_T, _name, _def, _val, _vis, _get, _fallback) XE_PARAM_TYPE_##_T _name;
-:349: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#349: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:112:
+#define _XE_PARAM_MEMBER(_T, _name, _def, _val, _vis, _get, _fallback) XE_PARAM_TYPE_##_T _name;
-:363: WARNING:MACRO_ARG_UNUSED: Argument '_T' is not used in function-like macro
#363: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:126:
+#define _XE_PARAM_DEFAULT_INIT(_T, _name, _def, _val, _vis, _get, _fallback) ._name = (_def),
-:363: WARNING:MACRO_ARG_UNUSED: Argument '_val' is not used in function-like macro
#363: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:126:
+#define _XE_PARAM_DEFAULT_INIT(_T, _name, _def, _val, _vis, _get, _fallback) ._name = (_def),
-:363: WARNING:MACRO_ARG_UNUSED: Argument '_vis' is not used in function-like macro
#363: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:126:
+#define _XE_PARAM_DEFAULT_INIT(_T, _name, _def, _val, _vis, _get, _fallback) ._name = (_def),
-:363: WARNING:MACRO_ARG_UNUSED: Argument '_get' is not used in function-like macro
#363: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:126:
+#define _XE_PARAM_DEFAULT_INIT(_T, _name, _def, _val, _vis, _get, _fallback) ._name = (_def),
-:363: WARNING:MACRO_ARG_UNUSED: Argument '_fallback' is not used in function-like macro
#363: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:126:
+#define _XE_PARAM_DEFAULT_INIT(_T, _name, _def, _val, _vis, _get, _fallback) ._name = (_def),
-:376: WARNING:MACRO_ARG_UNUSED: Argument '_T' is not used in function-like macro
#376: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:139:
+#define _XE_PARAM_DECLARE_ATTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+ extern struct configfs_attribute xe_configfs_attr_##_name;
-:376: WARNING:MACRO_ARG_UNUSED: Argument '_def' is not used in function-like macro
#376: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:139:
+#define _XE_PARAM_DECLARE_ATTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+ extern struct configfs_attribute xe_configfs_attr_##_name;
-:376: WARNING:MACRO_ARG_UNUSED: Argument '_val' is not used in function-like macro
#376: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:139:
+#define _XE_PARAM_DECLARE_ATTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+ extern struct configfs_attribute xe_configfs_attr_##_name;
-:376: WARNING:MACRO_ARG_UNUSED: Argument '_vis' is not used in function-like macro
#376: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:139:
+#define _XE_PARAM_DECLARE_ATTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+ extern struct configfs_attribute xe_configfs_attr_##_name;
-:376: WARNING:MACRO_ARG_UNUSED: Argument '_get' is not used in function-like macro
#376: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:139:
+#define _XE_PARAM_DECLARE_ATTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+ extern struct configfs_attribute xe_configfs_attr_##_name;
-:376: WARNING:MACRO_ARG_UNUSED: Argument '_fallback' is not used in function-like macro
#376: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:139:
+#define _XE_PARAM_DECLARE_ATTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+ extern struct configfs_attribute xe_configfs_attr_##_name;
-:376: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#376: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:139:
+#define _XE_PARAM_DECLARE_ATTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+ extern struct configfs_attribute xe_configfs_attr_##_name;
-:385: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#385: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:148:
+#define XE_PARAM_ATTR_PTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+ &xe_configfs_attr_##_name,
BUT SEE:
do {} while (0) advice is over-stated in a few situations:
The more obvious case is macros, like MODULE_PARM_DESC, invoked at
file-scope, where C disallows code (it must be in functions). See
$exceptions if you have one to add by name.
More troublesome is declarative macros used at top of new scope,
like DECLARE_PER_CPU. These might just compile with a do-while-0
wrapper, but would be incorrect. Most of these are handled by
detecting struct,union,etc declaration primitives in $exceptions.
Theres also macros called inside an if (block), which "return" an
expression. These cannot do-while, and need a ({}) wrapper.
Enjoy this qualification while we work to improve our heuristics.
-:385: WARNING:MACRO_ARG_UNUSED: Argument '_T' is not used in function-like macro
#385: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:148:
+#define XE_PARAM_ATTR_PTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+ &xe_configfs_attr_##_name,
-:385: WARNING:MACRO_ARG_UNUSED: Argument '_def' is not used in function-like macro
#385: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:148:
+#define XE_PARAM_ATTR_PTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+ &xe_configfs_attr_##_name,
-:385: WARNING:MACRO_ARG_UNUSED: Argument '_val' is not used in function-like macro
#385: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:148:
+#define XE_PARAM_ATTR_PTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+ &xe_configfs_attr_##_name,
-:385: WARNING:MACRO_ARG_UNUSED: Argument '_vis' is not used in function-like macro
#385: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:148:
+#define XE_PARAM_ATTR_PTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+ &xe_configfs_attr_##_name,
-:385: WARNING:MACRO_ARG_UNUSED: Argument '_get' is not used in function-like macro
#385: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:148:
+#define XE_PARAM_ATTR_PTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+ &xe_configfs_attr_##_name,
-:385: WARNING:MACRO_ARG_UNUSED: Argument '_fallback' is not used in function-like macro
#385: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:148:
+#define XE_PARAM_ATTR_PTR(_T, _name, _def, _val, _vis, _get, _fallback) \
+ &xe_configfs_attr_##_name,
-:396: WARNING:MULTISTATEMENT_MACRO_USE_DO_WHILE: Non-declarative macros with multiple statements should be enclosed in a do - while loop
#396: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:159:
+#define XE_PARAM_DECLARE_GETTER(_T, _name, _def, _val, _vis, _get, _fallback) \
+ XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev);
BUT SEE:
do {} while (0) advice is over-stated in a few situations:
The more obvious case is macros, like MODULE_PARM_DESC, invoked at
file-scope, where C disallows code (it must be in functions). See
$exceptions if you have one to add by name.
More troublesome is declarative macros used at top of new scope,
like DECLARE_PER_CPU. These might just compile with a do-while-0
wrapper, but would be incorrect. Most of these are handled by
detecting struct,union,etc declaration primitives in $exceptions.
Theres also macros called inside an if (block), which "return" an
expression. These cannot do-while, and need a ({}) wrapper.
Enjoy this qualification while we work to improve our heuristics.
-:396: WARNING:MACRO_ARG_UNUSED: Argument '_def' is not used in function-like macro
#396: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:159:
+#define XE_PARAM_DECLARE_GETTER(_T, _name, _def, _val, _vis, _get, _fallback) \
+ XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev);
-:396: WARNING:MACRO_ARG_UNUSED: Argument '_val' is not used in function-like macro
#396: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:159:
+#define XE_PARAM_DECLARE_GETTER(_T, _name, _def, _val, _vis, _get, _fallback) \
+ XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev);
-:396: WARNING:MACRO_ARG_UNUSED: Argument '_vis' is not used in function-like macro
#396: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:159:
+#define XE_PARAM_DECLARE_GETTER(_T, _name, _def, _val, _vis, _get, _fallback) \
+ XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev);
-:396: WARNING:MACRO_ARG_UNUSED: Argument '_get' is not used in function-like macro
#396: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:159:
+#define XE_PARAM_DECLARE_GETTER(_T, _name, _def, _val, _vis, _get, _fallback) \
+ XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev);
-:396: WARNING:MACRO_ARG_UNUSED: Argument '_fallback' is not used in function-like macro
#396: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:159:
+#define XE_PARAM_DECLARE_GETTER(_T, _name, _def, _val, _vis, _get, _fallback) \
+ XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev);
-:396: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#396: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:159:
+#define XE_PARAM_DECLARE_GETTER(_T, _name, _def, _val, _vis, _get, _fallback) \
+ XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev);
-:405: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#405: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:168:
+#define XE_PARAM_DECLARE_GETTER_STUB(_T, _name, _def, _val, _vis, _get, _fallback) \
+static inline XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev) \
+{ \
+ return _fallback; \
+}
BUT SEE:
do {} while (0) advice is over-stated in a few situations:
The more obvious case is macros, like MODULE_PARM_DESC, invoked at
file-scope, where C disallows code (it must be in functions). See
$exceptions if you have one to add by name.
More troublesome is declarative macros used at top of new scope,
like DECLARE_PER_CPU. These might just compile with a do-while-0
wrapper, but would be incorrect. Most of these are handled by
detecting struct,union,etc declaration primitives in $exceptions.
Theres also macros called inside an if (block), which "return" an
expression. These cannot do-while, and need a ({}) wrapper.
Enjoy this qualification while we work to improve our heuristics.
-:405: WARNING:MACRO_ARG_UNUSED: Argument '_def' is not used in function-like macro
#405: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:168:
+#define XE_PARAM_DECLARE_GETTER_STUB(_T, _name, _def, _val, _vis, _get, _fallback) \
+static inline XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev) \
+{ \
+ return _fallback; \
+}
-:405: WARNING:MACRO_ARG_UNUSED: Argument '_val' is not used in function-like macro
#405: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:168:
+#define XE_PARAM_DECLARE_GETTER_STUB(_T, _name, _def, _val, _vis, _get, _fallback) \
+static inline XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev) \
+{ \
+ return _fallback; \
+}
-:405: WARNING:MACRO_ARG_UNUSED: Argument '_vis' is not used in function-like macro
#405: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:168:
+#define XE_PARAM_DECLARE_GETTER_STUB(_T, _name, _def, _val, _vis, _get, _fallback) \
+static inline XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev) \
+{ \
+ return _fallback; \
+}
-:405: WARNING:MACRO_ARG_UNUSED: Argument '_get' is not used in function-like macro
#405: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:168:
+#define XE_PARAM_DECLARE_GETTER_STUB(_T, _name, _def, _val, _vis, _get, _fallback) \
+static inline XE_PARAM_TYPE_##_T xe_configfs_get_##_name(struct pci_dev *pdev) \
+{ \
+ return _fallback; \
+}
total: 3 errors, 52 warnings, 3 checks, 333 lines checked
ef37512484d6 drm/xe: Migrate existing debug configfs entries to params infrastructure
-:50: WARNING:MACRO_ARG_UNUSED: Argument '_def' is not used in function-like macro
#50: FILE: drivers/gpu/drm/xe/xe_configfs.c:579:
+#define _XE_PARAM_DUMP(_T, _name, _def, _val, _vis, _get, _fallback) \
+ PRI_CUSTOM_ATTR(XE_PARAM_FMT_##_T, debug.params._name);
-:50: WARNING:MACRO_ARG_UNUSED: Argument '_val' is not used in function-like macro
#50: FILE: drivers/gpu/drm/xe/xe_configfs.c:579:
+#define _XE_PARAM_DUMP(_T, _name, _def, _val, _vis, _get, _fallback) \
+ PRI_CUSTOM_ATTR(XE_PARAM_FMT_##_T, debug.params._name);
-:50: WARNING:MACRO_ARG_UNUSED: Argument '_vis' is not used in function-like macro
#50: FILE: drivers/gpu/drm/xe/xe_configfs.c:579:
+#define _XE_PARAM_DUMP(_T, _name, _def, _val, _vis, _get, _fallback) \
+ PRI_CUSTOM_ATTR(XE_PARAM_FMT_##_T, debug.params._name);
-:50: WARNING:MACRO_ARG_UNUSED: Argument '_get' is not used in function-like macro
#50: FILE: drivers/gpu/drm/xe/xe_configfs.c:579:
+#define _XE_PARAM_DUMP(_T, _name, _def, _val, _vis, _get, _fallback) \
+ PRI_CUSTOM_ATTR(XE_PARAM_FMT_##_T, debug.params._name);
-:50: WARNING:MACRO_ARG_UNUSED: Argument '_fallback' is not used in function-like macro
#50: FILE: drivers/gpu/drm/xe/xe_configfs.c:579:
+#define _XE_PARAM_DUMP(_T, _name, _def, _val, _vis, _get, _fallback) \
+ PRI_CUSTOM_ATTR(XE_PARAM_FMT_##_T, debug.params._name);
-:50: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#50: FILE: drivers/gpu/drm/xe/xe_configfs.c:579:
+#define _XE_PARAM_DUMP(_T, _name, _def, _val, _vis, _get, _fallback) \
+ PRI_CUSTOM_ATTR(XE_PARAM_FMT_##_T, debug.params._name);
-:352: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_item' - possible side-effects?
#352: FILE: drivers/gpu/drm/xe/xe_configfs_debug.c:845:
+#define XE_PARAM_VISIBLE_VRAM_PAGE_OFFLINE(_item) \
+ (xe_configfs_subgroup_to_group_device(_item)->desc->is_dgfx && \
+ xe_configfs_subgroup_to_group_device(_item)->desc->platform == XE_CRESCENTISLAND)
-:366: ERROR:MULTISTATEMENT_MACRO_USE_DO_WHILE: Macros starting with if should be enclosed by a do - while loop to avoid possible if/else logic defects
#366: FILE: drivers/gpu/drm/xe/xe_configfs_debug.c:852:
+#define _XE_PARAM_VIS_CHECK(_T, _name, _def, _val, _vis, _get, _fallback) \
+ if (attr == &xe_configfs_attr_##_name) \
+ return _vis(item);
-:366: WARNING:MACRO_ARG_UNUSED: Argument '_T' is not used in function-like macro
#366: FILE: drivers/gpu/drm/xe/xe_configfs_debug.c:852:
+#define _XE_PARAM_VIS_CHECK(_T, _name, _def, _val, _vis, _get, _fallback) \
+ if (attr == &xe_configfs_attr_##_name) \
+ return _vis(item);
-:366: WARNING:MACRO_ARG_UNUSED: Argument '_def' is not used in function-like macro
#366: FILE: drivers/gpu/drm/xe/xe_configfs_debug.c:852:
+#define _XE_PARAM_VIS_CHECK(_T, _name, _def, _val, _vis, _get, _fallback) \
+ if (attr == &xe_configfs_attr_##_name) \
+ return _vis(item);
-:366: WARNING:MACRO_ARG_UNUSED: Argument '_val' is not used in function-like macro
#366: FILE: drivers/gpu/drm/xe/xe_configfs_debug.c:852:
+#define _XE_PARAM_VIS_CHECK(_T, _name, _def, _val, _vis, _get, _fallback) \
+ if (attr == &xe_configfs_attr_##_name) \
+ return _vis(item);
-:366: WARNING:MACRO_ARG_UNUSED: Argument '_get' is not used in function-like macro
#366: FILE: drivers/gpu/drm/xe/xe_configfs_debug.c:852:
+#define _XE_PARAM_VIS_CHECK(_T, _name, _def, _val, _vis, _get, _fallback) \
+ if (attr == &xe_configfs_attr_##_name) \
+ return _vis(item);
-:366: WARNING:MACRO_ARG_UNUSED: Argument '_fallback' is not used in function-like macro
#366: FILE: drivers/gpu/drm/xe/xe_configfs_debug.c:852:
+#define _XE_PARAM_VIS_CHECK(_T, _name, _def, _val, _vis, _get, _fallback) \
+ if (attr == &xe_configfs_attr_##_name) \
+ return _vis(item);
-:366: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#366: FILE: drivers/gpu/drm/xe/xe_configfs_debug.c:852:
+#define _XE_PARAM_VIS_CHECK(_T, _name, _def, _val, _vis, _get, _fallback) \
+ if (attr == &xe_configfs_attr_##_name) \
+ return _vis(item);
-:459: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_v' - possible side-effects?
#459: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:58:
+#define XE_PARAM_VALIDATE_GUC_LOG_LEVEL(_v) \
+ (((_v) == XE_GUC_LOG_LEVEL_UNSET || \
+ ((_v) >= 0 && (_v) <= GUC_LOG_LEVEL_MAX)) ? 0 : -EINVAL)
-:472: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_name' - possible side-effects?
#472: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:86:
+#define XE_PARAM_GETTER_GUC_LOG_LEVEL(_dev, _name) \
+ ({ typeof((_dev)->config.debug.params._name) __v = (_dev)->config.debug.params._name; \
+ __v >= 0 ? __v : xe_modparam.guc_log_level; })
-:484: WARNING:LONG_LINE: line length of 202 exceeds 100 columns
#484: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:125:
+ param(int, guc_log_level, XE_GUC_LOG_LEVEL_UNSET, XE_PARAM_VALIDATE_GUC_LOG_LEVEL, XE_PARAM_VISIBLE_ALWAYS, XE_PARAM_GETTER_GUC_LOG_LEVEL, xe_modparam.guc_log_level) \
-:485: WARNING:LONG_LINE: line length of 202 exceeds 100 columns
#485: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:126:
+ param(u8, guc_log_target, XE_DEFAULT_GUC_LOG_TARGET, XE_PARAM_VALIDATE_GUC_LOG_TARGET, XE_PARAM_VISIBLE_ALWAYS, XE_PARAM_GETTER_READ, XE_DEFAULT_GUC_LOG_TARGET) \
-:486: WARNING:LONG_LINE: line length of 181 exceeds 100 columns
#486: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:127:
+ param(bool, enable_multi_queue, true, XE_PARAM_VALIDATE_NONE, XE_PARAM_VISIBLE_ALWAYS, XE_PARAM_GETTER_READ, true) \
-:487: WARNING:LONG_LINE: line length of 182 exceeds 100 columns
#487: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:128:
+ param(bool, enable_psmi, false, XE_PARAM_VALIDATE_NONE, XE_PARAM_VISIBLE_ALWAYS, XE_PARAM_GETTER_READ, false) \
-:488: WARNING:LONG_LINE: line length of 179 exceeds 100 columns
#488: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:129:
+ param(bool, enable_vram_page_offline, true, XE_PARAM_VALIDATE_NONE, XE_PARAM_VISIBLE_VRAM_PAGE_OFFLINE, XE_PARAM_GETTER_READ, true)
total: 1 errors, 17 warnings, 3 checks, 483 lines checked
bccafd372b6d drm/xe: Taint kernel when debug configfs parameters are set
5fd1a7baa1a5 drm/xe: Add enable_media module parameter
^ permalink raw reply [flat|nested] 21+ messages in thread* ✓ CI.KUnit: success for Add new debug infrastructure for configfs (rev9)
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
` (15 preceding siblings ...)
2026-10-05 19:26 ` ✗ CI.checkpatch: warning for Add new debug infrastructure for configfs (rev9) Patchwork
@ 2026-10-05 19:28 ` Patchwork
2026-10-05 20:05 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-10-05 20:34 ` [PATCH 00/15] Add new debug infrastructure for configfs Summers, Stuart
18 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2026-10-05 19:28 UTC (permalink / raw)
To: Stuart Summers; +Cc: intel-xe
== Series Details ==
Series: Add new debug infrastructure for configfs (rev9)
URL : https://patchwork.freedesktop.org/series/165879/
State : success
== Summary ==
+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[19:26:43] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:26:48] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:27:08] Starting KUnit Kernel (1/1)...
[19:27:08] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:27:08] ================= gpu_buddy (14 subtests) ==================
[19:27:08] [PASSED] gpu_test_buddy_alloc_limit
[19:27:08] [PASSED] gpu_test_buddy_alloc_optimistic
[19:27:08] [PASSED] gpu_test_buddy_alloc_pessimistic
[19:27:08] [PASSED] gpu_test_buddy_alloc_pathological
[19:27:08] [PASSED] gpu_test_buddy_alloc_contiguous
[19:27:08] [PASSED] gpu_test_buddy_alloc_clear
[19:27:08] [PASSED] gpu_test_buddy_alloc_range
[19:27:08] [PASSED] gpu_test_buddy_alloc_range_bias
[19:27:09] [PASSED] gpu_test_buddy_fragmentation_performance
[19:27:10] [PASSED] gpu_test_buddy_dirty_tracker_performance
[19:27:10] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[19:27:10] [PASSED] gpu_test_buddy_offset_aligned_allocation
[19:27:10] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[19:27:10] [PASSED] gpu_test_buddy_addr_to_block
[19:27:10] ==================== [PASSED] gpu_buddy ====================
[19:27:10] ============================================================
[19:27:10] Testing complete. Ran 14 tests: passed: 14
[19:27:10] Elapsed time: 27.083s total, 4.449s configuring, 20.515s building, 2.043s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[19:27:10] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:27:12] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:27:47] Starting KUnit Kernel (1/1)...
[19:27:47] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:27:47] ================== guc_buf (11 subtests) ===================
[19:27:47] [PASSED] test_smallest
[19:27:47] [PASSED] test_largest
[19:27:47] [PASSED] test_granular
[19:27:47] [PASSED] test_unique
[19:27:47] [PASSED] test_overlap
[19:27:47] [PASSED] test_reusable
[19:27:47] [PASSED] test_too_big
[19:27:47] [PASSED] test_flush
[19:27:47] [PASSED] test_lookup
[19:27:47] [PASSED] test_data
[19:27:47] [PASSED] test_class
[19:27:47] ===================== [PASSED] guc_buf =====================
[19:27:47] =================== guc_dbm (7 subtests) ===================
[19:27:47] [PASSED] test_empty
[19:27:47] [PASSED] test_default
[19:27:47] ======================== test_size ========================
[19:27:47] [PASSED] 4
[19:27:47] [PASSED] 8
[19:27:47] [PASSED] 32
[19:27:47] [PASSED] 256
[19:27:47] ==================== [PASSED] test_size ====================
[19:27:47] ======================= test_reuse ========================
[19:27:47] [PASSED] 4
[19:27:47] [PASSED] 8
[19:27:47] [PASSED] 32
[19:27:47] [PASSED] 256
[19:27:47] =================== [PASSED] test_reuse ====================
[19:27:47] =================== test_range_overlap ====================
[19:27:47] [PASSED] 4
[19:27:47] [PASSED] 8
[19:27:47] [PASSED] 32
[19:27:47] [PASSED] 256
[19:27:47] =============== [PASSED] test_range_overlap ================
[19:27:47] =================== test_range_compact ====================
[19:27:47] [PASSED] 4
[19:27:47] [PASSED] 8
[19:27:47] [PASSED] 32
[19:27:47] [PASSED] 256
[19:27:47] =============== [PASSED] test_range_compact ================
[19:27:47] ==================== test_range_spare =====================
[19:27:47] [PASSED] 4
[19:27:47] [PASSED] 8
[19:27:47] [PASSED] 32
[19:27:47] [PASSED] 256
[19:27:47] ================ [PASSED] test_range_spare =================
[19:27:47] ===================== [PASSED] guc_dbm =====================
[19:27:47] =================== guc_idm (6 subtests) ===================
[19:27:47] [PASSED] bad_init
[19:27:47] [PASSED] no_init
[19:27:47] [PASSED] init_fini
[19:27:47] [PASSED] check_used
[19:27:47] [PASSED] check_quota
[19:27:47] [PASSED] check_all
[19:27:47] ===================== [PASSED] guc_idm =====================
[19:27:47] ============== guc_klv_helpers (13 subtests) ===============
[19:27:47] [PASSED] test_count
[19:27:47] [PASSED] test_encode_u32
[19:27:47] [PASSED] test_encode_u64
[19:27:47] [PASSED] test_encode_string
[19:27:47] [PASSED] test_encode_object_raw
[19:27:47] [PASSED] test_encode_object_klv
[19:27:47] [PASSED] test_encode_object_nested
[19:27:47] [PASSED] test_encode_object_basic
[19:27:47] ===================== test_decode_u16 =====================
[19:27:47] [PASSED] empty
[19:27:47] [PASSED] valid
[19:27:47] [PASSED] max
[19:27:47] [PASSED] big
[19:27:47] [PASSED] long
[19:27:47] ================= [PASSED] test_decode_u16 =================
[19:27:47] ===================== test_decode_u32 =====================
[19:27:47] [PASSED] empty
[19:27:47] [PASSED] valid
[19:27:47] [PASSED] max
[19:27:47] [PASSED] long
[19:27:47] ================= [PASSED] test_decode_u32 =================
[19:27:47] ===================== test_decode_u64 =====================
[19:27:47] [PASSED] empty
[19:27:47] [PASSED] short
[19:27:47] [PASSED] valid
[19:27:47] [PASSED] max
[19:27:47] [PASSED] long
[19:27:47] ================= [PASSED] test_decode_u64 =================
[19:27:47] ===================== test_decode_str =====================
[19:27:47] [PASSED] empty
[19:27:47] [PASSED] one
[19:27:47] [PASSED] one_trash
[19:27:47] [PASSED] two
[19:27:47] [PASSED] two_trash
[19:27:47] [PASSED] three
[19:27:47] [PASSED] dword
[19:27:47] [PASSED] four
[19:27:47] [PASSED] five
[19:27:47] [PASSED] six
[19:27:47] [PASSED] seven
[19:27:47] [PASSED] qword
[19:27:47] ================= [PASSED] test_decode_str =================
[19:27:47] [PASSED] test_print
[19:27:47] ================= [PASSED] guc_klv_helpers =================
[19:27:47] =================== xe_log (4 subtests) ====================
[19:27:47] [PASSED] demo_cper
[19:27:47] [PASSED] demo_dmesg
[19:27:47] ======================= test_dmesg ========================
[19:27:47] [PASSED] test_fatal
[19:27:47] [PASSED] test_fatal_tile
[19:27:47] [PASSED] test_fatal_gt
[19:27:47] [PASSED] test_fatal_comp
[19:27:47] [PASSED] test_fatal_comp_tile
[19:27:47] [PASSED] test_fatal_comp_gt
[19:27:47] [PASSED] test_fatal_all
[19:27:47] [PASSED] test_recoverable
[19:27:47] [PASSED] test_recoverable_tile
[19:27:47] [PASSED] test_recoverable_gt
[19:27:47] [PASSED] test_recoverable_comp
[19:27:47] [PASSED] test_recoverable_comp_tile
[19:27:47] [PASSED] test_recoverable_comp_gt
[19:27:47] [PASSED] test_recoverable_all
[19:27:47] [PASSED] test_info
[19:27:47] [PASSED] test_info_tile
[19:27:47] [PASSED] test_info_gt
[19:27:47] [PASSED] test_info_err
[19:27:47] [PASSED] test_info_comp
[19:27:47] [PASSED] test_info_comp_tile
[19:27:47] [PASSED] test_info_comp_gt
[19:27:47] [PASSED] test_info_all
[19:27:47] [PASSED] test_hw_fatal
[19:27:47] [PASSED] test_hw_recoverable
[19:27:47] [PASSED] test_hw_corrected
[19:27:47] [PASSED] test_hw_informational
[19:27:47] =================== [PASSED] test_dmesg ====================
[19:27:47] ====================== test_invalid =======================
[19:27:47] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[19:27:47] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[19:27:47] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[19:27:47] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[19:27:47] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[19:27:47] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[19:27:47] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[19:27:47] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[19:27:47] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[19:27:47] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[19:27:47] ================== [SKIPPED] test_invalid ==================
[19:27:47] ===================== [PASSED] xe_log ======================
[19:27:47] ================== no_relay (3 subtests) ===================
[19:27:47] [PASSED] xe_drops_guc2pf_if_not_ready
[19:27:47] [PASSED] xe_drops_guc2vf_if_not_ready
[19:27:47] [PASSED] xe_rejects_send_if_not_ready
[19:27:47] ==================== [PASSED] no_relay =====================
[19:27:47] ================== pf_relay (14 subtests) ==================
[19:27:47] [PASSED] pf_rejects_guc2pf_too_short
[19:27:47] [PASSED] pf_rejects_guc2pf_too_long
[19:27:47] [PASSED] pf_rejects_guc2pf_no_payload
[19:27:47] [PASSED] pf_fails_no_payload
[19:27:47] [PASSED] pf_fails_bad_origin
[19:27:47] [PASSED] pf_fails_bad_type
[19:27:47] [PASSED] pf_txn_reports_error
[19:27:47] [PASSED] pf_txn_sends_pf2guc
[19:27:47] [PASSED] pf_sends_pf2guc
[19:27:47] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[19:27:47] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[19:27:47] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[19:27:47] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[19:27:47] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[19:27:47] ==================== [PASSED] pf_relay =====================
[19:27:47] ================== vf_relay (3 subtests) ===================
[19:27:47] [PASSED] vf_rejects_guc2vf_too_short
[19:27:47] [PASSED] vf_rejects_guc2vf_too_long
[19:27:47] [PASSED] vf_rejects_guc2vf_no_payload
[19:27:47] ==================== [PASSED] vf_relay =====================
[19:27:47] ================ pf_gt_config (9 subtests) =================
[19:27:47] [PASSED] fair_contexts_1vf
[19:27:47] [PASSED] fair_doorbells_1vf
[19:27:47] [PASSED] fair_ggtt_1vf
[19:27:47] ====================== fair_vram_1vf ======================
[19:27:47] [PASSED] 3.50 GiB
[19:27:47] [PASSED] 11.5 GiB
[19:27:47] [PASSED] 15.5 GiB
[19:27:47] [PASSED] 31.5 GiB
[19:27:47] [PASSED] 63.5 GiB
[19:27:47] [PASSED] 1.91 GiB
[19:27:47] ================== [PASSED] fair_vram_1vf ==================
[19:27:47] ================ fair_vram_1vf_admin_only =================
[19:27:47] [PASSED] 3.50 GiB
[19:27:47] [PASSED] 11.5 GiB
[19:27:47] [PASSED] 15.5 GiB
[19:27:47] [PASSED] 31.5 GiB
[19:27:47] [PASSED] 63.5 GiB
[19:27:47] [PASSED] 1.91 GiB
[19:27:47] ============ [PASSED] fair_vram_1vf_admin_only =============
[19:27:47] ====================== fair_contexts ======================
[19:27:47] [PASSED] 1 VF
[19:27:47] [PASSED] 2 VFs
[19:27:47] [PASSED] 3 VFs
[19:27:47] [PASSED] 4 VFs
[19:27:47] [PASSED] 5 VFs
[19:27:47] [PASSED] 6 VFs
[19:27:47] [PASSED] 7 VFs
[19:27:47] [PASSED] 8 VFs
[19:27:47] [PASSED] 9 VFs
[19:27:47] [PASSED] 10 VFs
[19:27:47] [PASSED] 11 VFs
[19:27:47] [PASSED] 12 VFs
[19:27:47] [PASSED] 13 VFs
[19:27:47] [PASSED] 14 VFs
[19:27:47] [PASSED] 15 VFs
[19:27:47] [PASSED] 16 VFs
[19:27:47] [PASSED] 17 VFs
[19:27:47] [PASSED] 18 VFs
[19:27:47] [PASSED] 19 VFs
[19:27:47] [PASSED] 20 VFs
[19:27:47] [PASSED] 21 VFs
[19:27:47] [PASSED] 22 VFs
[19:27:47] [PASSED] 23 VFs
[19:27:47] [PASSED] 24 VFs
[19:27:47] [PASSED] 25 VFs
[19:27:47] [PASSED] 26 VFs
[19:27:47] [PASSED] 27 VFs
[19:27:47] [PASSED] 28 VFs
[19:27:47] [PASSED] 29 VFs
[19:27:47] [PASSED] 30 VFs
[19:27:47] [PASSED] 31 VFs
[19:27:47] [PASSED] 32 VFs
[19:27:47] [PASSED] 33 VFs
[19:27:47] [PASSED] 34 VFs
[19:27:47] [PASSED] 35 VFs
[19:27:47] [PASSED] 36 VFs
[19:27:47] [PASSED] 37 VFs
[19:27:47] [PASSED] 38 VFs
[19:27:47] [PASSED] 39 VFs
[19:27:47] [PASSED] 40 VFs
[19:27:47] [PASSED] 41 VFs
[19:27:47] [PASSED] 42 VFs
[19:27:47] [PASSED] 43 VFs
[19:27:47] [PASSED] 44 VFs
[19:27:47] [PASSED] 45 VFs
[19:27:47] [PASSED] 46 VFs
[19:27:47] [PASSED] 47 VFs
[19:27:47] [PASSED] 48 VFs
[19:27:47] [PASSED] 49 VFs
[19:27:47] [PASSED] 50 VFs
[19:27:47] [PASSED] 51 VFs
[19:27:47] [PASSED] 52 VFs
[19:27:47] [PASSED] 53 VFs
[19:27:47] [PASSED] 54 VFs
[19:27:47] [PASSED] 55 VFs
[19:27:47] [PASSED] 56 VFs
[19:27:47] [PASSED] 57 VFs
[19:27:47] [PASSED] 58 VFs
[19:27:47] [PASSED] 59 VFs
[19:27:47] [PASSED] 60 VFs
[19:27:47] [PASSED] 61 VFs
[19:27:47] [PASSED] 62 VFs
[19:27:47] [PASSED] 63 VFs
[19:27:47] ================== [PASSED] fair_contexts ==================
[19:27:47] ===================== fair_doorbells ======================
[19:27:47] [PASSED] 1 VF
[19:27:47] [PASSED] 2 VFs
[19:27:47] [PASSED] 3 VFs
[19:27:47] [PASSED] 4 VFs
[19:27:47] [PASSED] 5 VFs
[19:27:47] [PASSED] 6 VFs
[19:27:47] [PASSED] 7 VFs
[19:27:47] [PASSED] 8 VFs
[19:27:47] [PASSED] 9 VFs
[19:27:47] [PASSED] 10 VFs
[19:27:47] [PASSED] 11 VFs
[19:27:47] [PASSED] 12 VFs
[19:27:47] [PASSED] 13 VFs
[19:27:47] [PASSED] 14 VFs
[19:27:47] [PASSED] 15 VFs
[19:27:47] [PASSED] 16 VFs
[19:27:47] [PASSED] 17 VFs
[19:27:47] [PASSED] 18 VFs
[19:27:47] [PASSED] 19 VFs
[19:27:47] [PASSED] 20 VFs
[19:27:47] [PASSED] 21 VFs
[19:27:47] [PASSED] 22 VFs
[19:27:47] [PASSED] 23 VFs
[19:27:47] [PASSED] 24 VFs
[19:27:47] [PASSED] 25 VFs
[19:27:47] [PASSED] 26 VFs
[19:27:47] [PASSED] 27 VFs
[19:27:47] [PASSED] 28 VFs
[19:27:47] [PASSED] 29 VFs
[19:27:47] [PASSED] 30 VFs
[19:27:47] [PASSED] 31 VFs
[19:27:47] [PASSED] 32 VFs
[19:27:47] [PASSED] 33 VFs
[19:27:47] [PASSED] 34 VFs
[19:27:47] [PASSED] 35 VFs
[19:27:47] [PASSED] 36 VFs
[19:27:47] [PASSED] 37 VFs
[19:27:47] [PASSED] 38 VFs
[19:27:47] [PASSED] 39 VFs
[19:27:47] [PASSED] 40 VFs
[19:27:47] [PASSED] 41 VFs
[19:27:47] [PASSED] 42 VFs
[19:27:47] [PASSED] 43 VFs
[19:27:47] [PASSED] 44 VFs
[19:27:47] [PASSED] 45 VFs
[19:27:47] [PASSED] 46 VFs
[19:27:47] [PASSED] 47 VFs
[19:27:47] [PASSED] 48 VFs
[19:27:47] [PASSED] 49 VFs
[19:27:47] [PASSED] 50 VFs
[19:27:47] [PASSED] 51 VFs
[19:27:47] [PASSED] 52 VFs
[19:27:47] [PASSED] 53 VFs
[19:27:47] [PASSED] 54 VFs
[19:27:47] [PASSED] 55 VFs
[19:27:47] [PASSED] 56 VFs
[19:27:47] [PASSED] 57 VFs
[19:27:47] [PASSED] 58 VFs
[19:27:47] [PASSED] 59 VFs
[19:27:47] [PASSED] 60 VFs
[19:27:47] [PASSED] 61 VFs
[19:27:47] [PASSED] 62 VFs
[19:27:47] [PASSED] 63 VFs
[19:27:47] ================= [PASSED] fair_doorbells ==================
[19:27:47] ======================== fair_ggtt ========================
[19:27:47] [PASSED] 1 VF
[19:27:47] [PASSED] 2 VFs
[19:27:47] [PASSED] 3 VFs
[19:27:47] [PASSED] 4 VFs
[19:27:47] [PASSED] 5 VFs
[19:27:47] [PASSED] 6 VFs
[19:27:47] [PASSED] 7 VFs
[19:27:47] [PASSED] 8 VFs
[19:27:47] [PASSED] 9 VFs
[19:27:47] [PASSED] 10 VFs
[19:27:47] [PASSED] 11 VFs
[19:27:47] [PASSED] 12 VFs
[19:27:47] [PASSED] 13 VFs
[19:27:47] [PASSED] 14 VFs
[19:27:47] [PASSED] 15 VFs
[19:27:47] [PASSED] 16 VFs
[19:27:47] [PASSED] 17 VFs
[19:27:47] [PASSED] 18 VFs
[19:27:47] [PASSED] 19 VFs
[19:27:47] [PASSED] 20 VFs
[19:27:47] [PASSED] 21 VFs
[19:27:47] [PASSED] 22 VFs
[19:27:47] [PASSED] 23 VFs
[19:27:47] [PASSED] 24 VFs
[19:27:47] [PASSED] 25 VFs
[19:27:47] [PASSED] 26 VFs
[19:27:47] [PASSED] 27 VFs
[19:27:47] [PASSED] 28 VFs
[19:27:47] [PASSED] 29 VFs
[19:27:47] [PASSED] 30 VFs
[19:27:47] [PASSED] 31 VFs
[19:27:47] [PASSED] 32 VFs
[19:27:47] [PASSED] 33 VFs
[19:27:47] [PASSED] 34 VFs
[19:27:47] [PASSED] 35 VFs
[19:27:47] [PASSED] 36 VFs
[19:27:47] [PASSED] 37 VFs
[19:27:47] [PASSED] 38 VFs
[19:27:47] [PASSED] 39 VFs
[19:27:47] [PASSED] 40 VFs
[19:27:47] [PASSED] 41 VFs
[19:27:47] [PASSED] 42 VFs
[19:27:47] [PASSED] 43 VFs
[19:27:47] [PASSED] 44 VFs
[19:27:47] [PASSED] 45 VFs
[19:27:47] [PASSED] 46 VFs
[19:27:47] [PASSED] 47 VFs
[19:27:47] [PASSED] 48 VFs
[19:27:47] [PASSED] 49 VFs
[19:27:47] [PASSED] 50 VFs
[19:27:47] [PASSED] 51 VFs
[19:27:47] [PASSED] 52 VFs
[19:27:47] [PASSED] 53 VFs
[19:27:47] [PASSED] 54 VFs
[19:27:47] [PASSED] 55 VFs
[19:27:47] [PASSED] 56 VFs
[19:27:47] [PASSED] 57 VFs
[19:27:47] [PASSED] 58 VFs
[19:27:47] [PASSED] 59 VFs
[19:27:47] [PASSED] 60 VFs
[19:27:47] [PASSED] 61 VFs
[19:27:47] [PASSED] 62 VFs
[19:27:47] [PASSED] 63 VFs
[19:27:47] ==================== [PASSED] fair_ggtt ====================
[19:27:47] ======================== fair_vram ========================
[19:27:47] [PASSED] 1 VF
[19:27:47] [PASSED] 2 VFs
[19:27:47] [PASSED] 3 VFs
[19:27:47] [PASSED] 4 VFs
[19:27:47] [PASSED] 5 VFs
[19:27:47] [PASSED] 6 VFs
[19:27:47] [PASSED] 7 VFs
[19:27:47] [PASSED] 8 VFs
[19:27:47] [PASSED] 9 VFs
[19:27:47] [PASSED] 10 VFs
[19:27:47] [PASSED] 11 VFs
[19:27:47] [PASSED] 12 VFs
[19:27:47] [PASSED] 13 VFs
[19:27:47] [PASSED] 14 VFs
[19:27:47] [PASSED] 15 VFs
[19:27:47] [PASSED] 16 VFs
[19:27:47] [PASSED] 17 VFs
[19:27:47] [PASSED] 18 VFs
[19:27:47] [PASSED] 19 VFs
[19:27:47] [PASSED] 20 VFs
[19:27:47] [PASSED] 21 VFs
[19:27:47] [PASSED] 22 VFs
[19:27:47] [PASSED] 23 VFs
[19:27:47] [PASSED] 24 VFs
[19:27:47] [PASSED] 25 VFs
[19:27:47] [PASSED] 26 VFs
[19:27:47] [PASSED] 27 VFs
[19:27:47] [PASSED] 28 VFs
[19:27:47] [PASSED] 29 VFs
[19:27:47] [PASSED] 30 VFs
[19:27:47] [PASSED] 31 VFs
[19:27:47] [PASSED] 32 VFs
[19:27:47] [PASSED] 33 VFs
[19:27:47] [PASSED] 34 VFs
[19:27:47] [PASSED] 35 VFs
[19:27:47] [PASSED] 36 VFs
[19:27:47] [PASSED] 37 VFs
[19:27:47] [PASSED] 38 VFs
[19:27:47] [PASSED] 39 VFs
[19:27:47] [PASSED] 40 VFs
[19:27:47] [PASSED] 41 VFs
[19:27:47] [PASSED] 42 VFs
[19:27:47] [PASSED] 43 VFs
[19:27:47] [PASSED] 44 VFs
[19:27:47] [PASSED] 45 VFs
[19:27:47] [PASSED] 46 VFs
[19:27:47] [PASSED] 47 VFs
[19:27:47] [PASSED] 48 VFs
[19:27:47] [PASSED] 49 VFs
[19:27:47] [PASSED] 50 VFs
[19:27:47] [PASSED] 51 VFs
[19:27:47] [PASSED] 52 VFs
[19:27:47] [PASSED] 53 VFs
[19:27:47] [PASSED] 54 VFs
[19:27:47] [PASSED] 55 VFs
[19:27:47] [PASSED] 56 VFs
[19:27:47] [PASSED] 57 VFs
[19:27:47] [PASSED] 58 VFs
[19:27:47] [PASSED] 59 VFs
[19:27:47] [PASSED] 60 VFs
[19:27:47] [PASSED] 61 VFs
[19:27:47] [PASSED] 62 VFs
[19:27:47] [PASSED] 63 VFs
[19:27:47] ==================== [PASSED] fair_vram ====================
[19:27:47] ================== [PASSED] pf_gt_config ===================
[19:27:47] ===================== lmtt (1 subtest) =====================
[19:27:47] ======================== test_ops =========================
[19:27:47] [PASSED] 2-level
[19:27:47] [PASSED] multi-level
[19:27:47] ==================== [PASSED] test_ops =====================
[19:27:47] ====================== [PASSED] lmtt =======================
[19:27:47] ================= sriov_packet (1 subtest) =================
[19:27:47] [PASSED] test_descriptor_init
[19:27:47] ================== [PASSED] sriov_packet ===================
[19:27:47] ================= pf_service (11 subtests) =================
[19:27:47] [PASSED] pf_negotiate_any
[19:27:47] [PASSED] pf_negotiate_base_match
[19:27:47] [PASSED] pf_negotiate_base_newer
[19:27:47] [PASSED] pf_negotiate_base_next
[19:27:47] [SKIPPED] pf_negotiate_base_older (no older minor)
[19:27:47] [PASSED] pf_negotiate_base_prev
[19:27:47] [PASSED] pf_negotiate_latest_match
[19:27:47] [PASSED] pf_negotiate_latest_newer
[19:27:47] [PASSED] pf_negotiate_latest_next
[19:27:47] [SKIPPED] pf_negotiate_latest_older (no older minor)
[19:27:47] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[19:27:47] =================== [PASSED] pf_service ====================
[19:27:47] ================= xe_guc_g2g (2 subtests) ==================
[19:27:47] ============== xe_live_guc_g2g_kunit_default ==============
[19:27:47] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[19:27:47] ============== xe_live_guc_g2g_kunit_allmem ===============
[19:27:47] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[19:27:47] =================== [SKIPPED] xe_guc_g2g ===================
[19:27:47] =================== xe_mocs (2 subtests) ===================
[19:27:47] ================ xe_live_mocs_kernel_kunit ================
[19:27:47] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[19:27:47] ================ xe_live_mocs_reset_kunit =================
[19:27:47] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[19:27:47] ==================== [SKIPPED] xe_mocs =====================
[19:27:47] ================= xe_migrate (2 subtests) ==================
[19:27:47] ================= xe_migrate_sanity_kunit =================
[19:27:47] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[19:27:47] ================== xe_validate_ccs_kunit ==================
[19:27:47] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[19:27:47] =================== [SKIPPED] xe_migrate ===================
[19:27:47] ================== xe_dma_buf (1 subtest) ==================
[19:27:47] ==================== xe_dma_buf_kunit =====================
[19:27:47] ================ [SKIPPED] xe_dma_buf_kunit ================
[19:27:47] =================== [SKIPPED] xe_dma_buf ===================
[19:27:47] ================= xe_bo_shrink (1 subtest) =================
[19:27:47] =================== xe_bo_shrink_kunit ====================
[19:27:47] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[19:27:47] ================== [SKIPPED] xe_bo_shrink ==================
[19:27:47] ==================== xe_bo (2 subtests) ====================
[19:27:47] ================== xe_ccs_migrate_kunit ===================
[19:27:47] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[19:27:47] ==================== xe_bo_evict_kunit ====================
[19:27:47] =============== [SKIPPED] xe_bo_evict_kunit ================
[19:27:47] ===================== [SKIPPED] xe_bo ======================
[19:27:47] =================== xe_any (9 subtests) ====================
[19:27:47] [PASSED] test_to_xe
[19:27:47] [PASSED] test_to_dev
[19:27:47] [PASSED] test_to_pdev
[19:27:47] [PASSED] test_to_drm
[19:27:47] [PASSED] test_if_pdev
[19:27:47] [PASSED] test_if_xe
[19:27:47] [PASSED] test_if_tile
[19:27:47] [PASSED] test_if_gt
[19:27:47] [PASSED] test_to_id
[19:27:47] ===================== [PASSED] xe_any ======================
[19:27:47] ==================== args (13 subtests) ====================
[19:27:47] [PASSED] count_args_test
[19:27:47] [PASSED] call_args_example
[19:27:47] [PASSED] call_args_test
[19:27:47] [PASSED] drop_first_arg_example
[19:27:47] [PASSED] drop_first_arg_test
[19:27:47] [PASSED] first_arg_example
[19:27:47] [PASSED] first_arg_test
[19:27:47] [PASSED] last_arg_example
[19:27:47] [PASSED] last_arg_test
[19:27:47] [PASSED] pick_arg_example
[19:27:47] [PASSED] if_args_example
[19:27:47] [PASSED] if_args_test
[19:27:47] [PASSED] sep_comma_example
[19:27:47] ====================== [PASSED] args =======================
[19:27:47] =================== xe_pci (3 subtests) ====================
[19:27:47] ==================== check_graphics_ip ====================
[19:27:47] [PASSED] 12.00 Xe_LP
[19:27:47] [PASSED] 12.10 Xe_LP+
[19:27:47] [PASSED] 12.55 Xe_HPG
[19:27:47] [PASSED] 12.60 Xe_HPC
[19:27:47] [PASSED] 12.70 Xe_LPG
[19:27:47] [PASSED] 12.71 Xe_LPG
[19:27:47] [PASSED] 12.74 Xe_LPG+
[19:27:47] [PASSED] 20.01 Xe2_HPG
[19:27:47] [PASSED] 20.02 Xe2_HPG
[19:27:47] [PASSED] 20.04 Xe2_LPG
[19:27:47] [PASSED] 30.00 Xe3_LPG
[19:27:47] [PASSED] 30.01 Xe3_LPG
[19:27:47] [PASSED] 30.03 Xe3_LPG
[19:27:47] [PASSED] 30.04 Xe3_LPG
[19:27:47] [PASSED] 30.05 Xe3_LPG
[19:27:47] [PASSED] 35.10 Xe3p_LPG
[19:27:47] [PASSED] 35.11 Xe3p_XPC
[19:27:47] ================ [PASSED] check_graphics_ip ================
[19:27:47] ===================== check_media_ip ======================
[19:27:47] [PASSED] 12.00 Xe_M
[19:27:47] [PASSED] 12.55 Xe_HPM
[19:27:47] [PASSED] 13.00 Xe_LPM+
[19:27:47] [PASSED] 13.01 Xe2_HPM
[19:27:47] [PASSED] 20.00 Xe2_LPM
[19:27:47] [PASSED] 30.00 Xe3_LPM
[19:27:47] [PASSED] 30.02 Xe3_LPM
[19:27:47] [PASSED] 35.00 Xe3p_LPM
[19:27:47] [PASSED] 35.03 Xe3p_HPM
[19:27:47] ================= [PASSED] check_media_ip ==================
[19:27:47] =================== check_platform_desc ===================
[19:27:47] [PASSED] 0x9A60 (TIGERLAKE)
[19:27:47] [PASSED] 0x9A68 (TIGERLAKE)
[19:27:47] [PASSED] 0x9A70 (TIGERLAKE)
[19:27:47] [PASSED] 0x9A40 (TIGERLAKE)
[19:27:47] [PASSED] 0x9A49 (TIGERLAKE)
[19:27:47] [PASSED] 0x9A59 (TIGERLAKE)
[19:27:47] [PASSED] 0x9A78 (TIGERLAKE)
[19:27:47] [PASSED] 0x9AC0 (TIGERLAKE)
[19:27:47] [PASSED] 0x9AC9 (TIGERLAKE)
[19:27:47] [PASSED] 0x9AD9 (TIGERLAKE)
[19:27:47] [PASSED] 0x9AF8 (TIGERLAKE)
[19:27:47] [PASSED] 0x4C80 (ROCKETLAKE)
[19:27:47] [PASSED] 0x4C8A (ROCKETLAKE)
[19:27:47] [PASSED] 0x4C8B (ROCKETLAKE)
[19:27:47] [PASSED] 0x4C8C (ROCKETLAKE)
[19:27:47] [PASSED] 0x4C90 (ROCKETLAKE)
[19:27:47] [PASSED] 0x4C9A (ROCKETLAKE)
[19:27:47] [PASSED] 0x4680 (ALDERLAKE_S)
[19:27:47] [PASSED] 0x4682 (ALDERLAKE_S)
[19:27:47] [PASSED] 0x4688 (ALDERLAKE_S)
[19:27:47] [PASSED] 0x468A (ALDERLAKE_S)
[19:27:47] [PASSED] 0x468B (ALDERLAKE_S)
[19:27:47] [PASSED] 0x4690 (ALDERLAKE_S)
[19:27:47] [PASSED] 0x4692 (ALDERLAKE_S)
[19:27:47] [PASSED] 0x4693 (ALDERLAKE_S)
[19:27:47] [PASSED] 0x46A0 (ALDERLAKE_P)
[19:27:47] [PASSED] 0x46A1 (ALDERLAKE_P)
[19:27:47] [PASSED] 0x46A2 (ALDERLAKE_P)
[19:27:47] [PASSED] 0x46A3 (ALDERLAKE_P)
[19:27:47] [PASSED] 0x46A6 (ALDERLAKE_P)
[19:27:47] [PASSED] 0x46A8 (ALDERLAKE_P)
[19:27:47] [PASSED] 0x46AA (ALDERLAKE_P)
[19:27:47] [PASSED] 0x462A (ALDERLAKE_P)
[19:27:47] [PASSED] 0x4626 (ALDERLAKE_P)
[19:27:47] [PASSED] 0x4628 (ALDERLAKE_P)
[19:27:47] [PASSED] 0x46B0 (ALDERLAKE_P)
[19:27:47] [PASSED] 0x46B1 (ALDERLAKE_P)
[19:27:47] [PASSED] 0x46B2 (ALDERLAKE_P)
[19:27:47] [PASSED] 0x46B3 (ALDERLAKE_P)
[19:27:47] [PASSED] 0x46C0 (ALDERLAKE_P)
[19:27:47] [PASSED] 0x46C1 (ALDERLAKE_P)
[19:27:47] [PASSED] 0x46C2 (ALDERLAKE_P)
[19:27:47] [PASSED] 0x46C3 (ALDERLAKE_P)
[19:27:47] [PASSED] 0x46D0 (ALDERLAKE_N)
[19:27:47] [PASSED] 0x46D1 (ALDERLAKE_N)
[19:27:47] [PASSED] 0x46D2 (ALDERLAKE_N)
[19:27:47] [PASSED] 0x46D3 (ALDERLAKE_N)
[19:27:47] [PASSED] 0x46D4 (ALDERLAKE_N)
[19:27:47] [PASSED] 0xA721 (ALDERLAKE_P)
[19:27:47] [PASSED] 0xA7A1 (ALDERLAKE_P)
[19:27:47] [PASSED] 0xA7A9 (ALDERLAKE_P)
[19:27:47] [PASSED] 0xA7AC (ALDERLAKE_P)
[19:27:47] [PASSED] 0xA7AD (ALDERLAKE_P)
[19:27:47] [PASSED] 0xA720 (ALDERLAKE_P)
[19:27:47] [PASSED] 0xA7A0 (ALDERLAKE_P)
[19:27:47] [PASSED] 0xA7A8 (ALDERLAKE_P)
[19:27:47] [PASSED] 0xA7AA (ALDERLAKE_P)
[19:27:47] [PASSED] 0xA7AB (ALDERLAKE_P)
[19:27:47] [PASSED] 0xA780 (ALDERLAKE_S)
[19:27:47] [PASSED] 0xA781 (ALDERLAKE_S)
[19:27:47] [PASSED] 0xA782 (ALDERLAKE_S)
[19:27:47] [PASSED] 0xA783 (ALDERLAKE_S)
[19:27:47] [PASSED] 0xA788 (ALDERLAKE_S)
[19:27:47] [PASSED] 0xA789 (ALDERLAKE_S)
[19:27:47] [PASSED] 0xA78A (ALDERLAKE_S)
[19:27:47] [PASSED] 0xA78B (ALDERLAKE_S)
[19:27:47] [PASSED] 0x4905 (DG1)
[19:27:47] [PASSED] 0x4906 (DG1)
[19:27:47] [PASSED] 0x4907 (DG1)
[19:27:47] [PASSED] 0x4908 (DG1)
[19:27:47] [PASSED] 0x4909 (DG1)
[19:27:47] [PASSED] 0x56C0 (DG2)
[19:27:47] [PASSED] 0x56C2 (DG2)
[19:27:47] [PASSED] 0x56C1 (DG2)
[19:27:47] [PASSED] 0x7D51 (METEORLAKE)
[19:27:47] [PASSED] 0x7DD1 (METEORLAKE)
[19:27:47] [PASSED] 0x7D41 (METEORLAKE)
[19:27:47] [PASSED] 0x7D67 (METEORLAKE)
[19:27:47] [PASSED] 0xB640 (METEORLAKE)
[19:27:47] [PASSED] 0x56A0 (DG2)
[19:27:47] [PASSED] 0x56A1 (DG2)
[19:27:47] [PASSED] 0x56A2 (DG2)
[19:27:47] [PASSED] 0x56BE (DG2)
[19:27:47] [PASSED] 0x56BF (DG2)
[19:27:47] [PASSED] 0x5690 (DG2)
[19:27:47] [PASSED] 0x5691 (DG2)
[19:27:47] [PASSED] 0x5692 (DG2)
[19:27:47] [PASSED] 0x56A5 (DG2)
[19:27:47] [PASSED] 0x56A6 (DG2)
[19:27:47] [PASSED] 0x56B0 (DG2)
[19:27:47] [PASSED] 0x56B1 (DG2)
[19:27:47] [PASSED] 0x56BA (DG2)
[19:27:47] [PASSED] 0x56BB (DG2)
[19:27:47] [PASSED] 0x56BC (DG2)
[19:27:47] [PASSED] 0x56BD (DG2)
[19:27:47] [PASSED] 0x5693 (DG2)
[19:27:47] [PASSED] 0x5694 (DG2)
[19:27:47] [PASSED] 0x5695 (DG2)
[19:27:47] [PASSED] 0x56A3 (DG2)
[19:27:47] [PASSED] 0x56A4 (DG2)
[19:27:47] [PASSED] 0x56B2 (DG2)
[19:27:47] [PASSED] 0x56B3 (DG2)
[19:27:47] [PASSED] 0x5696 (DG2)
[19:27:47] [PASSED] 0x5697 (DG2)
[19:27:47] [PASSED] 0xB69 (PVC)
[19:27:47] [PASSED] 0xB6E (PVC)
[19:27:47] [PASSED] 0xBD4 (PVC)
[19:27:47] [PASSED] 0xBD5 (PVC)
[19:27:47] [PASSED] 0xBD6 (PVC)
[19:27:47] [PASSED] 0xBD7 (PVC)
[19:27:47] [PASSED] 0xBD8 (PVC)
[19:27:47] [PASSED] 0xBD9 (PVC)
[19:27:47] [PASSED] 0xBDA (PVC)
[19:27:47] [PASSED] 0xBDB (PVC)
[19:27:47] [PASSED] 0xBE0 (PVC)
[19:27:47] [PASSED] 0xBE1 (PVC)
[19:27:47] [PASSED] 0xBE5 (PVC)
[19:27:47] [PASSED] 0x7D40 (METEORLAKE)
[19:27:47] [PASSED] 0x7D45 (METEORLAKE)
[19:27:47] [PASSED] 0x7D55 (METEORLAKE)
[19:27:47] [PASSED] 0x7D60 (METEORLAKE)
[19:27:47] [PASSED] 0x7DD5 (METEORLAKE)
[19:27:47] [PASSED] 0x6420 (LUNARLAKE)
[19:27:47] [PASSED] 0x64A0 (LUNARLAKE)
[19:27:47] [PASSED] 0x64B0 (LUNARLAKE)
[19:27:47] [PASSED] 0xE202 (BATTLEMAGE)
[19:27:47] [PASSED] 0xE209 (BATTLEMAGE)
[19:27:47] [PASSED] 0xE20B (BATTLEMAGE)
[19:27:47] [PASSED] 0xE20C (BATTLEMAGE)
[19:27:47] [PASSED] 0xE20D (BATTLEMAGE)
[19:27:47] [PASSED] 0xE210 (BATTLEMAGE)
[19:27:47] [PASSED] 0xE211 (BATTLEMAGE)
[19:27:47] [PASSED] 0xE212 (BATTLEMAGE)
[19:27:47] [PASSED] 0xE216 (BATTLEMAGE)
[19:27:47] [PASSED] 0xE220 (BATTLEMAGE)
[19:27:47] [PASSED] 0xE221 (BATTLEMAGE)
[19:27:47] [PASSED] 0xE222 (BATTLEMAGE)
[19:27:47] [PASSED] 0xE223 (BATTLEMAGE)
[19:27:47] [PASSED] 0xB080 (PANTHERLAKE)
[19:27:47] [PASSED] 0xB081 (PANTHERLAKE)
[19:27:47] [PASSED] 0xB082 (PANTHERLAKE)
[19:27:47] [PASSED] 0xB083 (PANTHERLAKE)
[19:27:47] [PASSED] 0xB084 (PANTHERLAKE)
[19:27:47] [PASSED] 0xB085 (PANTHERLAKE)
[19:27:47] [PASSED] 0xB086 (PANTHERLAKE)
[19:27:47] [PASSED] 0xB087 (PANTHERLAKE)
[19:27:47] [PASSED] 0xB08F (PANTHERLAKE)
[19:27:47] [PASSED] 0xB090 (PANTHERLAKE)
[19:27:47] [PASSED] 0xB0A0 (PANTHERLAKE)
[19:27:47] [PASSED] 0xB0A1 (PANTHERLAKE)
[19:27:47] [PASSED] 0xB0B0 (PANTHERLAKE)
[19:27:47] [PASSED] 0xFD80 (PANTHERLAKE)
[19:27:47] [PASSED] 0xFD81 (PANTHERLAKE)
[19:27:47] [PASSED] 0xD740 (NOVALAKE_S)
[19:27:47] [PASSED] 0xD741 (NOVALAKE_S)
[19:27:47] [PASSED] 0xD742 (NOVALAKE_S)
[19:27:47] [PASSED] 0xD743 (NOVALAKE_S)
[19:27:47] [PASSED] 0xD745 (NOVALAKE_S)
[19:27:47] [PASSED] 0xD74A (NOVALAKE_S)
[19:27:47] [PASSED] 0xD74B (NOVALAKE_S)
[19:27:47] [PASSED] 0x674C (CRESCENTISLAND)
[19:27:47] [PASSED] 0x674D (CRESCENTISLAND)
[19:27:47] [PASSED] 0x674E (CRESCENTISLAND)
[19:27:47] [PASSED] 0x674F (CRESCENTISLAND)
[19:27:47] [PASSED] 0x6750 (CRESCENTISLAND)
[19:27:47] [PASSED] 0x6751 (CRESCENTISLAND)
[19:27:47] [PASSED] 0xD750 (NOVALAKE_P)
[19:27:47] [PASSED] 0xD751 (NOVALAKE_P)
[19:27:47] [PASSED] 0xD752 (NOVALAKE_P)
[19:27:47] [PASSED] 0xD753 (NOVALAKE_P)
[19:27:47] [PASSED] 0xD754 (NOVALAKE_P)
[19:27:47] [PASSED] 0xD755 (NOVALAKE_P)
[19:27:47] [PASSED] 0xD756 (NOVALAKE_P)
[19:27:47] [PASSED] 0xD757 (NOVALAKE_P)
[19:27:47] [PASSED] 0xD75F (NOVALAKE_P)
[19:27:47] =============== [PASSED] check_platform_desc ===============
[19:27:47] ===================== [PASSED] xe_pci ======================
[19:27:47] ============= xe_rtp_tables_test (5 subtests) ==============
[19:27:47] ================== xe_rtp_table_gt_test ===================
[19:27:47] [PASSED] gt_was/14011060649
[19:27:47] [PASSED] gt_was/14011059788
[19:27:47] [PASSED] gt_was/14015795083
[19:27:47] [PASSED] gt_was/16021867713
[19:27:47] [PASSED] gt_was/14019449301
[19:27:47] [PASSED] gt_was/16028005424
[19:27:47] [PASSED] gt_was/14026578760
[19:27:47] [PASSED] gt_was/1409420604
[19:27:47] [PASSED] gt_was/1408615072
[19:27:47] [PASSED] gt_was/22010523718
[19:27:47] [PASSED] gt_was/14011006942
[19:27:47] [PASSED] gt_was/14014830051
[19:27:47] [PASSED] gt_was/18018781329
[19:27:47] [PASSED] gt_was/1509235366
[19:27:47] [PASSED] gt_was/18018781329
[19:27:47] [PASSED] gt_was/16016694945
[19:27:47] [PASSED] gt_was/14018575942
[19:27:47] [PASSED] gt_was/22016670082
[19:27:47] [PASSED] gt_was/22016670082
[19:27:47] [PASSED] gt_was/14017421178
[19:27:47] [PASSED] gt_was/16025250150
[19:27:47] [PASSED] gt_was/14021871409
[19:27:47] [PASSED] gt_was/16021865536
[19:27:47] [PASSED] gt_was/14021486841
[19:27:47] [PASSED] gt_was/14025160223
[19:27:47] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[19:27:47] [PASSED] gt_was/14025635424
[19:27:47] [PASSED] gt_was/16028005424
[19:27:47] ============== [PASSED] xe_rtp_table_gt_test ===============
[19:27:47] ================== xe_rtp_table_gt_test ===================
[19:27:47] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[19:27:47] [PASSED] gt_tunings/Tuning: 32B Access Enable
[19:27:47] [PASSED] gt_tunings/Tuning: L3 cache
[19:27:47] [PASSED] gt_tunings/Tuning: L3 cache - media
[19:27:47] [PASSED] gt_tunings/Tuning: Compression Overfetch
[19:27:47] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[19:27:47] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[19:27:47] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[19:27:47] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[19:27:47] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[19:27:47] [PASSED] gt_tunings/Tuning: Stateless compression control
[19:27:47] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[19:27:47] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[19:27:47] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[19:27:47] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[19:27:47] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[19:27:47] ============== [PASSED] xe_rtp_table_gt_test ===============
[19:27:47] ================== xe_rtp_table_oob_test ==================
[19:27:47] [PASSED] oob_was/1607983814
[19:27:47] [PASSED] oob_was/16010904313
[19:27:47] [PASSED] oob_was/18022495364
[19:27:47] [PASSED] oob_was/22012773006
[19:27:47] [PASSED] oob_was/14014475959
[19:27:47] [PASSED] oob_was/22011391025
[19:27:47] [PASSED] oob_was/22012727170
[19:27:47] [PASSED] oob_was/22012727685
[19:27:47] [PASSED] oob_was/22016596838
[19:27:47] [PASSED] oob_was/18020744125
[19:27:47] [PASSED] oob_was/1409600907
[19:27:47] [PASSED] oob_was/22014953428
[19:27:47] [PASSED] oob_was/16017236439
[19:27:47] [PASSED] oob_was/14019821291
[19:27:47] [PASSED] oob_was/14015076503
[19:27:47] [PASSED] oob_was/22016122933
[19:27:47] [PASSED] oob_was/14018913170
[19:27:47] [PASSED] oob_was/14018094691
[19:27:47] [PASSED] oob_was/18024947630
[19:27:47] [PASSED] oob_was/16022287689
[19:27:47] [PASSED] oob_was/13011645652
[19:27:47] [PASSED] oob_was/14022293748
[19:27:47] [PASSED] oob_was/22019794406
[19:27:47] [PASSED] oob_was/22019338487
[19:27:47] [PASSED] oob_was/16023588340
[19:27:47] [PASSED] oob_was/14019789679
[19:27:47] [PASSED] oob_was/14022866841
[19:27:47] [PASSED] oob_was/16021333562
[19:27:47] [PASSED] oob_was/14016712196
[19:27:47] [PASSED] oob_was/14015568240
[19:27:47] [PASSED] oob_was/18013179988
[19:27:47] [PASSED] oob_was/1508761755
[19:27:47] [PASSED] oob_was/16023105232
[19:27:47] [PASSED] oob_was/16026508708
[19:27:47] [PASSED] oob_was/14020001231
[19:27:47] [PASSED] oob_was/16023683509
[19:27:47] [PASSED] oob_was/14025515070
[19:27:47] [PASSED] oob_was/15015404425_disable
[19:27:47] [PASSED] oob_was/16026007364
[19:27:47] [PASSED] oob_was/14020316580
[19:27:47] [PASSED] oob_was/14025883347
[19:27:47] [PASSED] oob_was/16029380221
[19:27:47] [PASSED] oob_was/22022079272
[19:27:47] [PASSED] oob_was/16029897822
[19:27:47] [PASSED] oob_was/14027054324
[19:27:47] [PASSED] oob_was/14025941587
[19:27:47] [PASSED] oob_was/16030224309
[19:27:47] ============== [PASSED] xe_rtp_table_oob_test ==============
[19:27:47] ================ xe_rtp_table_dev_oob_test ================
[19:27:47] [PASSED] device_oob_was/22010954014
[19:27:47] [PASSED] device_oob_was/15015404425
[19:27:47] [PASSED] device_oob_was/22019338487_display
[19:27:47] [PASSED] device_oob_was/14022085890
[19:27:47] [PASSED] device_oob_was/14026539277
[19:27:47] [PASSED] device_oob_was/14026633728
[19:27:47] [PASSED] device_oob_was/14026746987
[19:27:47] [PASSED] device_oob_was/14026779378
[19:27:47] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[19:27:47] ========== xe_rtp_table_missing_upper_bound_test ==========
[19:27:47] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[19:27:47] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[19:27:47] [PASSED] register_whitelist/1806527549
[19:27:47] [PASSED] register_whitelist/allow_read_ctx_timestamp
[19:27:47] [PASSED] register_whitelist/allow_read_queue_timestamp
[19:27:47] [PASSED] register_whitelist/16014440446
[19:27:47] [PASSED] register_whitelist/16017236439
[19:27:47] [PASSED] register_whitelist/16020183090
[19:27:47] [PASSED] register_whitelist/14024997852
[19:27:47] [PASSED] register_whitelist/14024997852
[19:27:47] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[19:27:47] =============== [PASSED] xe_rtp_tables_test ================
[19:27:47] =================== xe_rtp (3 subtests) ====================
[19:27:47] =================== xe_rtp_rules_tests ====================
[19:27:47] [PASSED] no
[19:27:47] [PASSED] yes
[19:27:47] [PASSED] no-and-no
[19:27:47] [PASSED] no-and-yes
[19:27:47] [PASSED] yes-and-no
[19:27:47] [PASSED] yes-and-yes
[19:27:47] [PASSED] no-or-no
[19:27:47] [PASSED] no-or-yes
[19:27:47] [PASSED] yes-or-no
[19:27:47] [PASSED] yes-or-yes
[19:27:47] [PASSED] no-yes-or-yes-no
[19:27:47] [PASSED] no-yes-or-yes-yes
[19:27:47] [PASSED] yes-yes-or-no-yes
[19:27:47] [PASSED] yes-yes-or-yes-yes
[19:27:47] [PASSED] no-no-or-yes-or-no
[19:27:47] [PASSED] or
[19:27:47] [PASSED] or-yes
[19:27:47] [PASSED] or-no
[19:27:47] [PASSED] yes-or
[19:27:47] [PASSED] no-or
[19:27:47] [PASSED] no-or-or-yes
[19:27:47] [PASSED] yes-or-or-no
[19:27:47] [PASSED] no-or-or-no
[19:27:47] [PASSED] missing-context-engine-class
[19:27:47] [PASSED] missing-context-engine-class-or-yes
[19:27:47] [PASSED] missing-context-engine-class-or-or-yes
[19:27:47] =============== [PASSED] xe_rtp_rules_tests ================
[19:27:47] =============== xe_rtp_process_to_sr_tests ================
[19:27:47] [PASSED] coalesce-same-reg
[19:27:47] [PASSED] coalesce-same-reg-literal-and-func
[19:27:47] [PASSED] no-match-no-add
[19:27:47] [PASSED] two-regs-two-entries
[19:27:47] [PASSED] clr-one-set-other
[19:27:47] [PASSED] set-field
[19:27:47] [PASSED] conflict-duplicate
[19:27:47] [PASSED] conflict-not-disjoint
[19:27:47] [PASSED] conflict-not-disjoint-literal-and-func
[19:27:47] [PASSED] conflict-reg-type
[19:27:47] [PASSED] bad-mcr-reg-forced-to-regular
[19:27:47] [PASSED] bad-regular-reg-forced-to-mcr
[19:27:47] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[19:27:47] ================== xe_rtp_process_tests ===================
[19:27:47] [PASSED] active1
[19:27:47] [PASSED] active2
[19:27:47] [PASSED] active-inactive
[19:27:47] [PASSED] inactive-active
[19:27:47] [PASSED] inactive-active-inactive
[19:27:47] [PASSED] inactive-inactive-inactive
[19:27:47] ============== [PASSED] xe_rtp_process_tests ===============
[19:27:47] ===================== [PASSED] xe_rtp ======================
[19:27:47] ==================== xe_wa (1 subtest) =====================
[19:27:47] ======================== xe_wa_gt =========================
[19:27:47] [PASSED] TIGERLAKE B0
[19:27:47] [PASSED] DG1 A0
[19:27:47] [PASSED] DG1 B0
[19:27:47] [PASSED] ALDERLAKE_S A0
[19:27:47] [PASSED] ALDERLAKE_S B0
[19:27:47] [PASSED] ALDERLAKE_S C0
[19:27:47] [PASSED] ALDERLAKE_S D0
[19:27:47] [PASSED] ALDERLAKE_P A0
[19:27:47] [PASSED] ALDERLAKE_P B0
[19:27:47] [PASSED] ALDERLAKE_P C0
[19:27:47] [PASSED] ALDERLAKE_S RPLS D0
[19:27:47] [PASSED] ALDERLAKE_P RPLU E0
[19:27:47] [PASSED] DG2 G10 C0
[19:27:47] [PASSED] DG2 G11 B1
[19:27:47] [PASSED] DG2 G12 A1
[19:27:47] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[19:27:47] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[19:27:47] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[19:27:47] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[19:27:47] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[19:27:47] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[19:27:47] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[19:27:47] ==================== [PASSED] xe_wa_gt =====================
[19:27:47] ====================== [PASSED] xe_wa ======================
[19:27:47] ============================================================
[19:27:47] Testing complete. Ran 821 tests: passed: 793, skipped: 28
[19:27:47] Elapsed time: 37.041s total, 1.868s configuring, 34.407s building, 0.713s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[19:27:48] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:27:49] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:28:15] Starting KUnit Kernel (1/1)...
[19:28:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:28:15] ============ drm_test_pick_cmdline (2 subtests) ============
[19:28:15] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[19:28:15] =============== drm_test_pick_cmdline_named ===============
[19:28:15] [PASSED] NTSC
[19:28:15] [PASSED] NTSC-J
[19:28:15] [PASSED] PAL
[19:28:15] [PASSED] PAL-M
[19:28:15] =========== [PASSED] drm_test_pick_cmdline_named ===========
[19:28:15] ============== [PASSED] drm_test_pick_cmdline ==============
[19:28:15] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[19:28:15] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[19:28:15] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[19:28:15] =========== drm_validate_clone_mode (2 subtests) ===========
[19:28:15] ============== drm_test_check_in_clone_mode ===============
[19:28:15] [PASSED] in_clone_mode
[19:28:15] [PASSED] not_in_clone_mode
[19:28:15] ========== [PASSED] drm_test_check_in_clone_mode ===========
[19:28:15] =============== drm_test_check_valid_clones ===============
[19:28:15] [PASSED] not_in_clone_mode
[19:28:15] [PASSED] valid_clone
[19:28:15] [PASSED] invalid_clone
[19:28:15] =========== [PASSED] drm_test_check_valid_clones ===========
[19:28:15] ============= [PASSED] drm_validate_clone_mode =============
[19:28:15] ============= drm_validate_modeset (1 subtest) =============
[19:28:15] [PASSED] drm_test_check_connector_changed_modeset
[19:28:15] ============== [PASSED] drm_validate_modeset ===============
[19:28:15] ====== drm_test_bridge_get_current_state (1 subtest) =======
[19:28:15] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[19:28:15] ======== [PASSED] drm_test_bridge_get_current_state ========
[19:28:15] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[19:28:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[19:28:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[19:28:15] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[19:28:15] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[19:28:15] ============== drm_bridge_alloc (2 subtests) ===============
[19:28:15] [PASSED] drm_test_drm_bridge_alloc_basic
[19:28:15] [PASSED] drm_test_drm_bridge_alloc_get_put
[19:28:15] ================ [PASSED] drm_bridge_alloc =================
[19:28:15] ============= drm_bridge_bus_fmt (5 subtests) ==============
[19:28:15] [PASSED] drm_test_bridge_rgb_yuv_rgb
[19:28:15] [PASSED] drm_test_bridge_must_convert_to_yuv444
[19:28:15] [PASSED] drm_test_bridge_hdmi_auto_rgb
[19:28:15] [PASSED] drm_test_bridge_auto_first
[19:28:15] [PASSED] drm_test_bridge_rgb_yuv_no_path
[19:28:15] =============== [PASSED] drm_bridge_bus_fmt ================
[19:28:15] ============= drm_cmdline_parser (40 subtests) =============
[19:28:15] [PASSED] drm_test_cmdline_force_d_only
[19:28:15] [PASSED] drm_test_cmdline_force_D_only_dvi
[19:28:15] [PASSED] drm_test_cmdline_force_D_only_hdmi
[19:28:15] [PASSED] drm_test_cmdline_force_D_only_not_digital
[19:28:15] [PASSED] drm_test_cmdline_force_e_only
[19:28:15] [PASSED] drm_test_cmdline_res
[19:28:15] [PASSED] drm_test_cmdline_res_vesa
[19:28:15] [PASSED] drm_test_cmdline_res_vesa_rblank
[19:28:15] [PASSED] drm_test_cmdline_res_rblank
[19:28:15] [PASSED] drm_test_cmdline_res_bpp
[19:28:15] [PASSED] drm_test_cmdline_res_refresh
[19:28:15] [PASSED] drm_test_cmdline_res_bpp_refresh
[19:28:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[19:28:15] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[19:28:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[19:28:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[19:28:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[19:28:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[19:28:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[19:28:15] [PASSED] drm_test_cmdline_res_margins_force_on
[19:28:15] [PASSED] drm_test_cmdline_res_vesa_margins
[19:28:15] [PASSED] drm_test_cmdline_name
[19:28:15] [PASSED] drm_test_cmdline_name_bpp
[19:28:15] [PASSED] drm_test_cmdline_name_option
[19:28:15] [PASSED] drm_test_cmdline_name_bpp_option
[19:28:15] [PASSED] drm_test_cmdline_rotate_0
[19:28:15] [PASSED] drm_test_cmdline_rotate_90
[19:28:15] [PASSED] drm_test_cmdline_rotate_180
[19:28:15] [PASSED] drm_test_cmdline_rotate_270
[19:28:15] [PASSED] drm_test_cmdline_hmirror
[19:28:15] [PASSED] drm_test_cmdline_vmirror
[19:28:15] [PASSED] drm_test_cmdline_margin_options
[19:28:15] [PASSED] drm_test_cmdline_multiple_options
[19:28:15] [PASSED] drm_test_cmdline_bpp_extra_and_option
[19:28:15] [PASSED] drm_test_cmdline_extra_and_option
[19:28:15] [PASSED] drm_test_cmdline_freestanding_options
[19:28:15] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[19:28:15] [PASSED] drm_test_cmdline_panel_orientation
[19:28:15] ================ drm_test_cmdline_invalid =================
[19:28:15] [PASSED] margin_only
[19:28:15] [PASSED] interlace_only
[19:28:15] [PASSED] res_missing_x
[19:28:15] [PASSED] res_missing_y
[19:28:15] [PASSED] res_bad_y
[19:28:15] [PASSED] res_missing_y_bpp
[19:28:15] [PASSED] res_bad_bpp
[19:28:15] [PASSED] res_bad_refresh
[19:28:15] [PASSED] res_bpp_refresh_force_on_off
[19:28:15] [PASSED] res_invalid_mode
[19:28:15] [PASSED] res_bpp_wrong_place_mode
[19:28:15] [PASSED] name_bpp_refresh
[19:28:15] [PASSED] name_refresh
[19:28:15] [PASSED] name_refresh_wrong_mode
[19:28:15] [PASSED] name_refresh_invalid_mode
[19:28:15] [PASSED] rotate_multiple
[19:28:15] [PASSED] rotate_invalid_val
[19:28:15] [PASSED] rotate_truncated
[19:28:15] [PASSED] invalid_option
[19:28:15] [PASSED] invalid_tv_option
[19:28:15] [PASSED] truncated_tv_option
[19:28:15] ============ [PASSED] drm_test_cmdline_invalid =============
[19:28:15] =============== drm_test_cmdline_tv_options ===============
[19:28:15] [PASSED] NTSC
[19:28:15] [PASSED] NTSC_443
[19:28:15] [PASSED] NTSC_J
[19:28:15] [PASSED] PAL
[19:28:15] [PASSED] PAL_M
[19:28:15] [PASSED] PAL_N
[19:28:15] [PASSED] SECAM
[19:28:15] [PASSED] MONO_525
[19:28:15] [PASSED] MONO_625
[19:28:15] =========== [PASSED] drm_test_cmdline_tv_options ===========
[19:28:15] =============== [PASSED] drm_cmdline_parser ================
[19:28:15] ========== drmm_connector_hdmi_init (20 subtests) ==========
[19:28:15] [PASSED] drm_test_connector_hdmi_init_valid
[19:28:15] [PASSED] drm_test_connector_hdmi_init_bpc_8
[19:28:15] [PASSED] drm_test_connector_hdmi_init_bpc_10
[19:28:15] [PASSED] drm_test_connector_hdmi_init_bpc_12
[19:28:15] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[19:28:15] [PASSED] drm_test_connector_hdmi_init_bpc_null
[19:28:15] [PASSED] drm_test_connector_hdmi_init_formats_empty
[19:28:15] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[19:28:15] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[19:28:15] [PASSED] supported_formats=0x9 yuv420_allowed=1
[19:28:15] [PASSED] supported_formats=0x9 yuv420_allowed=0
[19:28:15] [PASSED] supported_formats=0x5 yuv420_allowed=1
[19:28:15] [PASSED] supported_formats=0x5 yuv420_allowed=0
[19:28:15] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[19:28:15] [PASSED] drm_test_connector_hdmi_init_null_ddc
[19:28:15] [PASSED] drm_test_connector_hdmi_init_null_product
[19:28:15] [PASSED] drm_test_connector_hdmi_init_null_vendor
[19:28:15] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[19:28:15] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[19:28:15] [PASSED] drm_test_connector_hdmi_init_product_valid
[19:28:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[19:28:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[19:28:15] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[19:28:15] ========= drm_test_connector_hdmi_init_type_valid =========
[19:28:15] [PASSED] HDMI-A
[19:28:15] [PASSED] HDMI-B
[19:28:15] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[19:28:15] ======== drm_test_connector_hdmi_init_type_invalid ========
[19:28:15] [PASSED] Unknown
[19:28:15] [PASSED] VGA
[19:28:15] [PASSED] DVI-I
[19:28:15] [PASSED] DVI-D
[19:28:15] [PASSED] DVI-A
[19:28:15] [PASSED] Composite
[19:28:15] [PASSED] SVIDEO
[19:28:15] [PASSED] LVDS
[19:28:15] [PASSED] Component
[19:28:15] [PASSED] DIN
[19:28:15] [PASSED] DP
[19:28:15] [PASSED] TV
[19:28:15] [PASSED] eDP
[19:28:15] [PASSED] Virtual
[19:28:15] [PASSED] DSI
[19:28:15] [PASSED] DPI
[19:28:15] [PASSED] Writeback
[19:28:15] [PASSED] SPI
[19:28:15] [PASSED] USB
[19:28:15] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[19:28:15] ============ [PASSED] drmm_connector_hdmi_init =============
[19:28:15] ============= drmm_connector_init (3 subtests) =============
[19:28:15] [PASSED] drm_test_drmm_connector_init
[19:28:15] [PASSED] drm_test_drmm_connector_init_null_ddc
[19:28:15] ========= drm_test_drmm_connector_init_type_valid =========
[19:28:15] [PASSED] Unknown
[19:28:15] [PASSED] VGA
[19:28:15] [PASSED] DVI-I
[19:28:15] [PASSED] DVI-D
[19:28:15] [PASSED] DVI-A
[19:28:15] [PASSED] Composite
[19:28:15] [PASSED] SVIDEO
[19:28:15] [PASSED] LVDS
[19:28:15] [PASSED] Component
[19:28:15] [PASSED] DIN
[19:28:15] [PASSED] DP
[19:28:15] [PASSED] HDMI-A
[19:28:15] [PASSED] HDMI-B
[19:28:15] [PASSED] TV
[19:28:15] [PASSED] eDP
[19:28:15] [PASSED] Virtual
[19:28:15] [PASSED] DSI
[19:28:15] [PASSED] DPI
[19:28:15] [PASSED] Writeback
[19:28:15] [PASSED] SPI
[19:28:15] [PASSED] USB
[19:28:15] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[19:28:15] =============== [PASSED] drmm_connector_init ===============
[19:28:15] ========= drm_connector_dynamic_init (6 subtests) ==========
[19:28:15] [PASSED] drm_test_drm_connector_dynamic_init
[19:28:15] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[19:28:15] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[19:28:15] [PASSED] drm_test_drm_connector_dynamic_init_properties
[19:28:15] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[19:28:15] [PASSED] Unknown
[19:28:15] [PASSED] VGA
[19:28:15] [PASSED] DVI-I
[19:28:15] [PASSED] DVI-D
[19:28:15] [PASSED] DVI-A
[19:28:15] [PASSED] Composite
[19:28:15] [PASSED] SVIDEO
[19:28:15] [PASSED] LVDS
[19:28:15] [PASSED] Component
[19:28:15] [PASSED] DIN
[19:28:15] [PASSED] DP
[19:28:15] [PASSED] HDMI-A
[19:28:15] [PASSED] HDMI-B
[19:28:15] [PASSED] TV
[19:28:15] [PASSED] eDP
[19:28:15] [PASSED] Virtual
[19:28:15] [PASSED] DSI
[19:28:15] [PASSED] DPI
[19:28:15] [PASSED] Writeback
[19:28:15] [PASSED] SPI
[19:28:15] [PASSED] USB
[19:28:15] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[19:28:15] ======== drm_test_drm_connector_dynamic_init_name =========
[19:28:15] [PASSED] Unknown
[19:28:15] [PASSED] VGA
[19:28:15] [PASSED] DVI-I
[19:28:15] [PASSED] DVI-D
[19:28:15] [PASSED] DVI-A
[19:28:15] [PASSED] Composite
[19:28:15] [PASSED] SVIDEO
[19:28:15] [PASSED] LVDS
[19:28:15] [PASSED] Component
[19:28:15] [PASSED] DIN
[19:28:15] [PASSED] DP
[19:28:15] [PASSED] HDMI-A
[19:28:15] [PASSED] HDMI-B
[19:28:15] [PASSED] TV
[19:28:15] [PASSED] eDP
[19:28:15] [PASSED] Virtual
[19:28:15] [PASSED] DSI
[19:28:15] [PASSED] DPI
[19:28:15] [PASSED] Writeback
[19:28:15] [PASSED] SPI
[19:28:15] [PASSED] USB
[19:28:15] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[19:28:15] =========== [PASSED] drm_connector_dynamic_init ============
[19:28:15] ==== drm_connector_dynamic_register_early (4 subtests) =====
[19:28:15] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[19:28:15] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[19:28:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[19:28:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[19:28:15] ====== [PASSED] drm_connector_dynamic_register_early =======
[19:28:15] ======= drm_connector_dynamic_register (7 subtests) ========
[19:28:15] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[19:28:15] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[19:28:15] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[19:28:15] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[19:28:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[19:28:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[19:28:15] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[19:28:15] ========= [PASSED] drm_connector_dynamic_register ==========
[19:28:15] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[19:28:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[19:28:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[19:28:15] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[19:28:15] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[19:28:15] ========== drm_test_get_tv_mode_from_name_valid ===========
[19:28:15] [PASSED] NTSC
[19:28:15] [PASSED] NTSC-443
[19:28:15] [PASSED] NTSC-J
[19:28:15] [PASSED] PAL
[19:28:15] [PASSED] PAL-M
[19:28:15] [PASSED] PAL-N
[19:28:15] [PASSED] SECAM
[19:28:15] [PASSED] Mono
[19:28:15] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[19:28:15] [PASSED] drm_test_get_tv_mode_from_name_truncated
[19:28:15] ============ [PASSED] drm_get_tv_mode_from_name ============
[19:28:15] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[19:28:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[19:28:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[19:28:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[19:28:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[19:28:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[19:28:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[19:28:15] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[19:28:15] [PASSED] VIC 96
[19:28:15] [PASSED] VIC 97
[19:28:15] [PASSED] VIC 101
[19:28:15] [PASSED] VIC 102
[19:28:15] [PASSED] VIC 106
[19:28:15] [PASSED] VIC 107
[19:28:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[19:28:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[19:28:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[19:28:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[19:28:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[19:28:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[19:28:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[19:28:15] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[19:28:15] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[19:28:15] [PASSED] Automatic
[19:28:15] [PASSED] Full
[19:28:15] [PASSED] Limited 16:235
[19:28:15] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[19:28:15] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[19:28:15] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[19:28:15] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[19:28:15] === drm_test_drm_hdmi_connector_get_output_format_name ====
[19:28:15] [PASSED] RGB
[19:28:15] [PASSED] YUV 4:2:0
[19:28:15] [PASSED] YUV 4:2:2
[19:28:15] [PASSED] YUV 4:4:4
[19:28:15] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[19:28:15] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[19:28:15] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[19:28:15] ============= drm_damage_helper (21 subtests) ==============
[19:28:15] [PASSED] drm_test_damage_iter_no_damage
[19:28:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[19:28:15] [PASSED] drm_test_damage_iter_no_damage_src_moved
[19:28:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[19:28:15] [PASSED] drm_test_damage_iter_no_damage_not_visible
[19:28:15] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[19:28:15] [PASSED] drm_test_damage_iter_no_damage_no_fb
[19:28:15] [PASSED] drm_test_damage_iter_simple_damage
[19:28:15] [PASSED] drm_test_damage_iter_single_damage
[19:28:15] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[19:28:15] [PASSED] drm_test_damage_iter_single_damage_outside_src
[19:28:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[19:28:15] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[19:28:15] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[19:28:15] [PASSED] drm_test_damage_iter_single_damage_src_moved
[19:28:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[19:28:15] [PASSED] drm_test_damage_iter_damage
[19:28:15] [PASSED] drm_test_damage_iter_damage_one_intersect
[19:28:15] [PASSED] drm_test_damage_iter_damage_one_outside
[19:28:15] [PASSED] drm_test_damage_iter_damage_src_moved
[19:28:15] [PASSED] drm_test_damage_iter_damage_not_visible
[19:28:15] ================ [PASSED] drm_damage_helper ================
[19:28:15] ============== drm_dp_mst_helper (3 subtests) ==============
[19:28:15] ============== drm_test_dp_mst_calc_pbn_mode ==============
[19:28:15] [PASSED] Clock 154000 BPP 30 DSC disabled
[19:28:15] [PASSED] Clock 234000 BPP 30 DSC disabled
[19:28:15] [PASSED] Clock 297000 BPP 24 DSC disabled
[19:28:15] [PASSED] Clock 332880 BPP 24 DSC enabled
[19:28:15] [PASSED] Clock 324540 BPP 24 DSC enabled
[19:28:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[19:28:15] ============== drm_test_dp_mst_calc_pbn_div ===============
[19:28:15] [PASSED] Link rate 2000000 lane count 4
[19:28:15] [PASSED] Link rate 2000000 lane count 2
[19:28:15] [PASSED] Link rate 2000000 lane count 1
[19:28:15] [PASSED] Link rate 1350000 lane count 4
[19:28:15] [PASSED] Link rate 1350000 lane count 2
[19:28:15] [PASSED] Link rate 1350000 lane count 1
[19:28:15] [PASSED] Link rate 1000000 lane count 4
[19:28:15] [PASSED] Link rate 1000000 lane count 2
[19:28:15] [PASSED] Link rate 1000000 lane count 1
[19:28:15] [PASSED] Link rate 810000 lane count 4
[19:28:15] [PASSED] Link rate 810000 lane count 2
[19:28:15] [PASSED] Link rate 810000 lane count 1
[19:28:15] [PASSED] Link rate 540000 lane count 4
[19:28:15] [PASSED] Link rate 540000 lane count 2
[19:28:15] [PASSED] Link rate 540000 lane count 1
[19:28:15] [PASSED] Link rate 270000 lane count 4
[19:28:15] [PASSED] Link rate 270000 lane count 2
[19:28:15] [PASSED] Link rate 270000 lane count 1
[19:28:15] [PASSED] Link rate 162000 lane count 4
[19:28:15] [PASSED] Link rate 162000 lane count 2
[19:28:15] [PASSED] Link rate 162000 lane count 1
[19:28:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[19:28:15] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[19:28:15] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[19:28:15] [PASSED] DP_POWER_UP_PHY with port number
[19:28:15] [PASSED] DP_POWER_DOWN_PHY with port number
[19:28:15] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[19:28:15] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[19:28:15] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[19:28:15] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[19:28:15] [PASSED] DP_QUERY_PAYLOAD with port number
[19:28:15] [PASSED] DP_QUERY_PAYLOAD with VCPI
[19:28:15] [PASSED] DP_REMOTE_DPCD_READ with port number
[19:28:15] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[19:28:15] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[19:28:15] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[19:28:15] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[19:28:15] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[19:28:15] [PASSED] DP_REMOTE_I2C_READ with port number
[19:28:15] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[19:28:15] [PASSED] DP_REMOTE_I2C_READ with transactions array
[19:28:15] [PASSED] DP_REMOTE_I2C_WRITE with port number
[19:28:15] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[19:28:15] [PASSED] DP_REMOTE_I2C_WRITE with data array
[19:28:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[19:28:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[19:28:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[19:28:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[19:28:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[19:28:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[19:28:15] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[19:28:15] ================ [PASSED] drm_dp_mst_helper ================
[19:28:15] ================== drm_exec (7 subtests) ===================
[19:28:15] [PASSED] sanitycheck
[19:28:15] [PASSED] test_lock
[19:28:15] [PASSED] test_lock_unlock
[19:28:15] [PASSED] test_duplicates
[19:28:15] [PASSED] test_prepare
[19:28:15] [PASSED] test_prepare_array
[19:28:15] [PASSED] test_multiple_loops
[19:28:15] ==================== [PASSED] drm_exec =====================
[19:28:15] =========== drm_format_helper_test (17 subtests) ===========
[19:28:15] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[19:28:15] [PASSED] single_pixel_source_buffer
[19:28:15] [PASSED] single_pixel_clip_rectangle
[19:28:15] [PASSED] well_known_colors
[19:28:15] [PASSED] destination_pitch
[19:28:15] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[19:28:15] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[19:28:15] [PASSED] single_pixel_source_buffer
[19:28:15] [PASSED] single_pixel_clip_rectangle
[19:28:15] [PASSED] well_known_colors
[19:28:15] [PASSED] destination_pitch
[19:28:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[19:28:15] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[19:28:15] [PASSED] single_pixel_source_buffer
[19:28:15] [PASSED] single_pixel_clip_rectangle
[19:28:15] [PASSED] well_known_colors
[19:28:15] [PASSED] destination_pitch
[19:28:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[19:28:15] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[19:28:15] [PASSED] single_pixel_source_buffer
[19:28:15] [PASSED] single_pixel_clip_rectangle
[19:28:15] [PASSED] well_known_colors
[19:28:15] [PASSED] destination_pitch
[19:28:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[19:28:15] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[19:28:15] [PASSED] single_pixel_source_buffer
[19:28:15] [PASSED] single_pixel_clip_rectangle
[19:28:15] [PASSED] well_known_colors
[19:28:15] [PASSED] destination_pitch
[19:28:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[19:28:15] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[19:28:15] [PASSED] single_pixel_source_buffer
[19:28:15] [PASSED] single_pixel_clip_rectangle
[19:28:15] [PASSED] well_known_colors
[19:28:15] [PASSED] destination_pitch
[19:28:15] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[19:28:15] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[19:28:15] [PASSED] single_pixel_source_buffer
[19:28:15] [PASSED] single_pixel_clip_rectangle
[19:28:15] [PASSED] well_known_colors
[19:28:15] [PASSED] destination_pitch
[19:28:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[19:28:15] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[19:28:15] [PASSED] single_pixel_source_buffer
[19:28:15] [PASSED] single_pixel_clip_rectangle
[19:28:15] [PASSED] well_known_colors
[19:28:15] [PASSED] destination_pitch
[19:28:15] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[19:28:15] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[19:28:15] [PASSED] single_pixel_source_buffer
[19:28:15] [PASSED] single_pixel_clip_rectangle
[19:28:15] [PASSED] well_known_colors
[19:28:15] [PASSED] destination_pitch
[19:28:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[19:28:15] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[19:28:15] [PASSED] single_pixel_source_buffer
[19:28:15] [PASSED] single_pixel_clip_rectangle
[19:28:15] [PASSED] well_known_colors
[19:28:15] [PASSED] destination_pitch
[19:28:15] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[19:28:15] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[19:28:15] [PASSED] single_pixel_source_buffer
[19:28:15] [PASSED] single_pixel_clip_rectangle
[19:28:15] [PASSED] well_known_colors
[19:28:15] [PASSED] destination_pitch
[19:28:15] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[19:28:15] ============== drm_test_fb_xrgb8888_to_mono ===============
[19:28:15] [PASSED] single_pixel_source_buffer
[19:28:15] [PASSED] single_pixel_clip_rectangle
[19:28:15] [PASSED] well_known_colors
[19:28:15] [PASSED] destination_pitch
[19:28:15] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[19:28:15] ==================== drm_test_fb_swab =====================
[19:28:15] [PASSED] single_pixel_source_buffer
[19:28:15] [PASSED] single_pixel_clip_rectangle
[19:28:15] [PASSED] well_known_colors
[19:28:15] [PASSED] destination_pitch
[19:28:15] ================ [PASSED] drm_test_fb_swab =================
[19:28:15] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[19:28:15] [PASSED] single_pixel_source_buffer
[19:28:15] [PASSED] single_pixel_clip_rectangle
[19:28:15] [PASSED] well_known_colors
[19:28:15] [PASSED] destination_pitch
[19:28:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[19:28:15] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[19:28:15] [PASSED] single_pixel_source_buffer
[19:28:15] [PASSED] single_pixel_clip_rectangle
[19:28:15] [PASSED] well_known_colors
[19:28:15] [PASSED] destination_pitch
[19:28:15] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[19:28:15] ================= drm_test_fb_clip_offset =================
[19:28:15] [PASSED] pass through
[19:28:15] [PASSED] horizontal offset
[19:28:15] [PASSED] vertical offset
[19:28:15] [PASSED] horizontal and vertical offset
[19:28:15] [PASSED] horizontal offset (custom pitch)
[19:28:15] [PASSED] vertical offset (custom pitch)
[19:28:15] [PASSED] horizontal and vertical offset (custom pitch)
[19:28:15] ============= [PASSED] drm_test_fb_clip_offset =============
[19:28:15] =================== drm_test_fb_memcpy ====================
[19:28:15] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[19:28:15] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[19:28:15] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[19:28:15] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[19:28:15] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[19:28:15] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[19:28:15] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[19:28:15] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[19:28:15] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[19:28:15] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[19:28:15] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[19:28:15] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[19:28:15] =============== [PASSED] drm_test_fb_memcpy ================
[19:28:15] ============= [PASSED] drm_format_helper_test ==============
[19:28:15] ================= drm_format (18 subtests) =================
[19:28:15] [PASSED] drm_test_format_block_width_invalid
[19:28:15] [PASSED] drm_test_format_block_width_one_plane
[19:28:15] [PASSED] drm_test_format_block_width_two_plane
[19:28:15] [PASSED] drm_test_format_block_width_three_plane
[19:28:15] [PASSED] drm_test_format_block_width_tiled
[19:28:15] [PASSED] drm_test_format_block_height_invalid
[19:28:15] [PASSED] drm_test_format_block_height_one_plane
[19:28:15] [PASSED] drm_test_format_block_height_two_plane
[19:28:15] [PASSED] drm_test_format_block_height_three_plane
[19:28:15] [PASSED] drm_test_format_block_height_tiled
[19:28:15] [PASSED] drm_test_format_min_pitch_invalid
[19:28:15] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[19:28:15] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[19:28:15] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[19:28:15] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[19:28:15] [PASSED] drm_test_format_min_pitch_two_plane
[19:28:15] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[19:28:15] [PASSED] drm_test_format_min_pitch_tiled
[19:28:15] =================== [PASSED] drm_format ====================
[19:28:15] ============== drm_framebuffer (10 subtests) ===============
[19:28:15] ========== drm_test_framebuffer_check_src_coords ==========
[19:28:15] [PASSED] Success: source fits into fb
[19:28:15] [PASSED] Fail: overflowing fb with x-axis coordinate
[19:28:15] [PASSED] Fail: overflowing fb with y-axis coordinate
[19:28:15] [PASSED] Fail: overflowing fb with source width
[19:28:15] [PASSED] Fail: overflowing fb with source height
[19:28:15] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[19:28:15] [PASSED] drm_test_framebuffer_cleanup
[19:28:15] =============== drm_test_framebuffer_create ===============
[19:28:15] [PASSED] ABGR8888 normal sizes
[19:28:15] [PASSED] ABGR8888 max sizes
[19:28:15] [PASSED] ABGR8888 pitch greater than min required
[19:28:15] [PASSED] ABGR8888 pitch less than min required
[19:28:15] [PASSED] ABGR8888 Invalid width
[19:28:15] [PASSED] ABGR8888 Invalid buffer handle
[19:28:15] [PASSED] No pixel format
[19:28:15] [PASSED] ABGR8888 Width 0
[19:28:15] [PASSED] ABGR8888 Height 0
[19:28:15] [PASSED] ABGR8888 Out of bound height * pitch combination
[19:28:15] [PASSED] ABGR8888 Large buffer offset
[19:28:15] [PASSED] ABGR8888 Buffer offset for inexistent plane
[19:28:15] [PASSED] ABGR8888 Invalid flag
[19:28:15] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[19:28:15] [PASSED] ABGR8888 Valid buffer modifier
[19:28:15] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[19:28:15] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[19:28:15] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[19:28:15] [PASSED] NV12 Normal sizes
[19:28:15] [PASSED] NV12 Max sizes
[19:28:15] [PASSED] NV12 Invalid pitch
[19:28:15] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[19:28:15] [PASSED] NV12 different modifier per-plane
[19:28:15] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[19:28:15] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[19:28:15] [PASSED] NV12 Modifier for inexistent plane
[19:28:15] [PASSED] NV12 Handle for inexistent plane
[19:28:15] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[19:28:15] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[19:28:15] [PASSED] YVU420 Normal sizes
[19:28:15] [PASSED] YVU420 Max sizes
[19:28:15] [PASSED] YVU420 Invalid pitch
[19:28:15] [PASSED] YVU420 Different pitches
[19:28:15] [PASSED] YVU420 Different buffer offsets/pitches
[19:28:15] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[19:28:15] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[19:28:15] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[19:28:15] [PASSED] YVU420 Valid modifier
[19:28:15] [PASSED] YVU420 Different modifiers per plane
[19:28:15] [PASSED] YVU420 Modifier for inexistent plane
[19:28:15] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[19:28:15] [PASSED] X0L2 Normal sizes
[19:28:15] [PASSED] X0L2 Max sizes
[19:28:15] [PASSED] X0L2 Invalid pitch
[19:28:15] [PASSED] X0L2 Pitch greater than minimum required
[19:28:15] [PASSED] X0L2 Handle for inexistent plane
[19:28:15] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[19:28:15] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[19:28:15] [PASSED] X0L2 Valid modifier
[19:28:15] [PASSED] X0L2 Modifier for inexistent plane
[19:28:15] =========== [PASSED] drm_test_framebuffer_create ===========
[19:28:15] [PASSED] drm_test_framebuffer_free
[19:28:15] [PASSED] drm_test_framebuffer_init
[19:28:15] [PASSED] drm_test_framebuffer_init_bad_format
[19:28:15] [PASSED] drm_test_framebuffer_init_dev_mismatch
[19:28:15] [PASSED] drm_test_framebuffer_lookup
[19:28:15] [PASSED] drm_test_framebuffer_lookup_inexistent
[19:28:15] [PASSED] drm_test_framebuffer_modifiers_not_supported
[19:28:15] ================= [PASSED] drm_framebuffer =================
[19:28:15] ================ drm_gem_shmem (8 subtests) ================
[19:28:15] [PASSED] drm_gem_shmem_test_obj_create
[19:28:15] [PASSED] drm_gem_shmem_test_obj_create_private
[19:28:15] [PASSED] drm_gem_shmem_test_pin_pages
[19:28:15] [PASSED] drm_gem_shmem_test_vmap
[19:28:15] [PASSED] drm_gem_shmem_test_get_sg_table
[19:28:15] [PASSED] drm_gem_shmem_test_get_pages_sgt
[19:28:15] [PASSED] drm_gem_shmem_test_madvise
[19:28:15] [PASSED] drm_gem_shmem_test_purge
[19:28:15] ================== [PASSED] drm_gem_shmem ==================
[19:28:15] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[19:28:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[19:28:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[19:28:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[19:28:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[19:28:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[19:28:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[19:28:15] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[19:28:15] [PASSED] Automatic
[19:28:15] [PASSED] Full
[19:28:15] [PASSED] Limited 16:235
[19:28:15] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[19:28:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[19:28:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[19:28:15] [PASSED] drm_test_check_disable_connector
[19:28:15] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[19:28:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[19:28:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[19:28:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[19:28:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[19:28:15] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[19:28:15] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[19:28:15] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[19:28:15] [PASSED] drm_test_check_output_bpc_dvi
[19:28:15] [PASSED] drm_test_check_output_bpc_format_vic_1
[19:28:15] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[19:28:15] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[19:28:15] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[19:28:15] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[19:28:15] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[19:28:15] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[19:28:15] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[19:28:15] ============ drm_test_check_hdmi_color_format =============
[19:28:15] [PASSED] AUTO -> RGB
[19:28:15] [PASSED] YCBCR422 -> YUV422
[19:28:15] [PASSED] YCBCR420 -> YUV420
[19:28:15] [PASSED] YCBCR444 -> YUV444
[19:28:15] [PASSED] RGB -> RGB
[19:28:15] ======== [PASSED] drm_test_check_hdmi_color_format =========
[19:28:15] ======== drm_test_check_hdmi_color_format_420_only ========
[19:28:15] [PASSED] RGB should fail
[19:28:15] [PASSED] YUV444 should fail
[19:28:15] [PASSED] YUV422 should fail
[19:28:15] [PASSED] YUV420 should work
[19:28:15] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[19:28:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[19:28:15] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[19:28:15] [PASSED] drm_test_check_broadcast_rgb_value
[19:28:15] [PASSED] drm_test_check_bpc_8_value
[19:28:15] [PASSED] drm_test_check_bpc_10_value
[19:28:15] [PASSED] drm_test_check_bpc_12_value
[19:28:15] [PASSED] drm_test_check_format_value
[19:28:15] [PASSED] drm_test_check_tmds_char_value
[19:28:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[19:28:15] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[19:28:15] [PASSED] drm_test_check_mode_valid
[19:28:15] [PASSED] drm_test_check_mode_valid_reject
[19:28:15] [PASSED] drm_test_check_mode_valid_reject_rate
[19:28:15] [PASSED] drm_test_check_mode_valid_reject_max_clock
[19:28:15] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[19:28:15] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[19:28:15] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[19:28:15] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[19:28:15] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[19:28:15] [PASSED] drm_test_check_infoframes
[19:28:15] [PASSED] drm_test_check_reject_avi_infoframe
[19:28:15] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[19:28:15] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[19:28:15] [PASSED] drm_test_check_reject_audio_infoframe
[19:28:15] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[19:28:15] ================= drm_managed (2 subtests) =================
[19:28:15] [PASSED] drm_test_managed_release_action
[19:28:15] [PASSED] drm_test_managed_run_action
[19:28:15] =================== [PASSED] drm_managed ===================
[19:28:15] =================== drm_mm (6 subtests) ====================
[19:28:15] [PASSED] drm_test_mm_init
[19:28:15] [PASSED] drm_test_mm_debug
[19:28:15] [PASSED] drm_test_mm_align32
[19:28:15] [PASSED] drm_test_mm_align64
[19:28:15] [PASSED] drm_test_mm_lowest
[19:28:15] [PASSED] drm_test_mm_highest
[19:28:15] ===================== [PASSED] drm_mm ======================
[19:28:15] ============= drm_modes_analog_tv (5 subtests) =============
[19:28:15] [PASSED] drm_test_modes_analog_tv_mono_576i
[19:28:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[19:28:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[19:28:15] [PASSED] drm_test_modes_analog_tv_pal_576i
[19:28:15] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[19:28:15] =============== [PASSED] drm_modes_analog_tv ===============
[19:28:15] ============== drm_panic_helper (3 subtests) ===============
[19:28:15] ============= drm_test_panic_screen_user_map ==============
[19:28:15] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[19:28:15] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[19:28:15] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[19:28:15] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[19:28:15] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[19:28:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[19:28:15] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[19:28:15] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[19:28:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[19:28:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[19:28:15] ========= [PASSED] drm_test_panic_screen_user_map ==========
[19:28:15] ============= drm_test_panic_screen_user_page =============
[19:28:15] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[19:28:15] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[19:28:15] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[19:28:15] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[19:28:15] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[19:28:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[19:28:15] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[19:28:15] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[19:28:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[19:28:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[19:28:15] ========= [PASSED] drm_test_panic_screen_user_page =========
[19:28:15] ========== drm_test_panic_screen_user_set_pixel ===========
[19:28:15] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[19:28:15] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[19:28:15] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[19:28:15] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[19:28:15] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[19:28:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[19:28:15] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[19:28:15] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[19:28:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[19:28:15] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[19:28:15] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[19:28:15] ================ [PASSED] drm_panic_helper =================
[19:28:15] ============== drm_plane_helper (2 subtests) ===============
[19:28:15] =============== drm_test_check_plane_state ================
[19:28:15] [PASSED] clipping_simple
[19:28:15] [PASSED] clipping_rotate_reflect
[19:28:15] [PASSED] positioning_simple
[19:28:15] [PASSED] upscaling
[19:28:15] [PASSED] downscaling
[19:28:15] [PASSED] rounding1
[19:28:15] [PASSED] rounding2
[19:28:15] [PASSED] rounding3
[19:28:15] [PASSED] rounding4
[19:28:15] =========== [PASSED] drm_test_check_plane_state ============
[19:28:15] =========== drm_test_check_invalid_plane_state ============
[19:28:15] [PASSED] positioning_invalid
[19:28:15] [PASSED] upscaling_invalid
[19:28:15] [PASSED] downscaling_invalid
[19:28:15] ======= [PASSED] drm_test_check_invalid_plane_state ========
[19:28:15] ================ [PASSED] drm_plane_helper =================
[19:28:15] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[19:28:15] ====== drm_test_connector_helper_tv_get_modes_check =======
[19:28:15] [PASSED] None
[19:28:15] [PASSED] PAL
[19:28:15] [PASSED] NTSC
[19:28:15] [PASSED] Both, NTSC Default
[19:28:15] [PASSED] Both, PAL Default
[19:28:15] [PASSED] Both, NTSC Default, with PAL on command-line
[19:28:15] [PASSED] Both, PAL Default, with NTSC on command-line
[19:28:15] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[19:28:15] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[19:28:15] ================== drm_rect (9 subtests) ===================
[19:28:15] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[19:28:15] [PASSED] drm_test_rect_clip_scaled_not_clipped
[19:28:15] [PASSED] drm_test_rect_clip_scaled_clipped
[19:28:15] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[19:28:15] ================= drm_test_rect_intersect =================
[19:28:15] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[19:28:15] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[19:28:15] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[19:28:15] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[19:28:15] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[19:28:15] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[19:28:15] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[19:28:15] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[19:28:15] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[19:28:15] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[19:28:15] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[19:28:15] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[19:28:15] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[19:28:15] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[19:28:15] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[19:28:15] ============= [PASSED] drm_test_rect_intersect =============
[19:28:15] ================ drm_test_rect_calc_hscale ================
[19:28:15] [PASSED] normal use
[19:28:15] [PASSED] out of max range
[19:28:15] [PASSED] out of min range
[19:28:15] [PASSED] zero dst
[19:28:15] [PASSED] negative src
[19:28:15] [PASSED] negative dst
[19:28:15] ============ [PASSED] drm_test_rect_calc_hscale ============
[19:28:15] ================ drm_test_rect_calc_vscale ================
[19:28:15] [PASSED] normal use
[19:28:15] [PASSED] out of max range
[19:28:15] [PASSED] out of min range
[19:28:15] [PASSED] zero dst
[19:28:15] [PASSED] negative src
[19:28:15] [PASSED] negative dst
[19:28:15] ============ [PASSED] drm_test_rect_calc_vscale ============
[19:28:15] ================== drm_test_rect_rotate ===================
[19:28:15] [PASSED] reflect-x
[19:28:15] [PASSED] reflect-y
[19:28:15] [PASSED] rotate-0
[19:28:15] [PASSED] rotate-90
[19:28:15] [PASSED] rotate-180
[19:28:15] [PASSED] rotate-270
[19:28:15] ============== [PASSED] drm_test_rect_rotate ===============
[19:28:15] ================ drm_test_rect_rotate_inv =================
[19:28:15] [PASSED] reflect-x
[19:28:15] [PASSED] reflect-y
[19:28:15] [PASSED] rotate-0
[19:28:15] [PASSED] rotate-90
[19:28:15] [PASSED] rotate-180
[19:28:15] [PASSED] rotate-270
[19:28:15] ============ [PASSED] drm_test_rect_rotate_inv =============
[19:28:15] ==================== [PASSED] drm_rect =====================
[19:28:15] ============ drm_sysfb_modeset_test (1 subtest) ============
[19:28:15] ============ drm_test_sysfb_build_fourcc_list =============
[19:28:15] [PASSED] no native formats
[19:28:15] [PASSED] XRGB8888 as native format
[19:28:15] [PASSED] remove duplicates
[19:28:15] [PASSED] convert alpha formats
[19:28:15] [PASSED] random formats
[19:28:15] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[19:28:15] ============= [PASSED] drm_sysfb_modeset_test ==============
[19:28:15] ================== drm_fixp (2 subtests) ===================
[19:28:15] [PASSED] drm_test_int2fixp
[19:28:15] [PASSED] drm_test_sm2fixp
[19:28:15] ==================== [PASSED] drm_fixp =====================
[19:28:15] ============================================================
[19:28:15] Testing complete. Ran 667 tests: passed: 667
[19:28:15] Elapsed time: 27.928s total, 1.880s configuring, 25.581s building, 0.414s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[19:28:16] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:28:17] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:28:28] Starting KUnit Kernel (1/1)...
[19:28:28] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:28:28] ================= ttm_device (5 subtests) ==================
[19:28:28] [PASSED] ttm_device_init_basic
[19:28:28] [PASSED] ttm_device_init_multiple
[19:28:28] [PASSED] ttm_device_fini_basic
[19:28:28] [PASSED] ttm_device_init_no_vma_man
[19:28:28] ================== ttm_device_init_pools ==================
[19:28:28] [PASSED] No DMA allocations, no DMA32 required
[19:28:28] [PASSED] DMA allocations, DMA32 required
[19:28:28] [PASSED] No DMA allocations, DMA32 required
[19:28:28] [PASSED] DMA allocations, no DMA32 required
[19:28:28] ============== [PASSED] ttm_device_init_pools ==============
[19:28:28] =================== [PASSED] ttm_device ====================
[19:28:28] ================== ttm_pool (8 subtests) ===================
[19:28:28] ================== ttm_pool_alloc_basic ===================
[19:28:28] [PASSED] One page
[19:28:28] [PASSED] More than one page
[19:28:28] [PASSED] Above the allocation limit
[19:28:28] [PASSED] One page, with coherent DMA mappings enabled
[19:28:28] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[19:28:28] ============== [PASSED] ttm_pool_alloc_basic ===============
[19:28:28] ============== ttm_pool_alloc_basic_dma_addr ==============
[19:28:28] [PASSED] One page
[19:28:28] [PASSED] More than one page
[19:28:28] [PASSED] Above the allocation limit
[19:28:28] [PASSED] One page, with coherent DMA mappings enabled
[19:28:28] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[19:28:28] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[19:28:28] [PASSED] ttm_pool_alloc_order_caching_match
[19:28:28] [PASSED] ttm_pool_alloc_caching_mismatch
[19:28:28] [PASSED] ttm_pool_alloc_order_mismatch
[19:28:28] [PASSED] ttm_pool_free_dma_alloc
[19:28:28] [PASSED] ttm_pool_free_no_dma_alloc
[19:28:28] [PASSED] ttm_pool_fini_basic
[19:28:28] ==================== [PASSED] ttm_pool =====================
[19:28:28] ================ ttm_resource (8 subtests) =================
[19:28:28] ================= ttm_resource_init_basic =================
[19:28:28] [PASSED] Init resource in TTM_PL_SYSTEM
[19:28:28] [PASSED] Init resource in TTM_PL_VRAM
[19:28:28] [PASSED] Init resource in a private placement
[19:28:28] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[19:28:28] ============= [PASSED] ttm_resource_init_basic =============
[19:28:28] [PASSED] ttm_resource_init_pinned
[19:28:28] [PASSED] ttm_resource_fini_basic
[19:28:28] [PASSED] ttm_resource_manager_init_basic
[19:28:28] [PASSED] ttm_resource_manager_usage_basic
[19:28:28] [PASSED] ttm_resource_manager_set_used_basic
[19:28:28] [PASSED] ttm_sys_man_alloc_basic
[19:28:28] [PASSED] ttm_sys_man_free_basic
[19:28:28] ================== [PASSED] ttm_resource ===================
[19:28:28] =================== ttm_tt (15 subtests) ===================
[19:28:28] ==================== ttm_tt_init_basic ====================
[19:28:28] [PASSED] Page-aligned size
[19:28:28] [PASSED] Extra pages requested
[19:28:28] ================ [PASSED] ttm_tt_init_basic ================
[19:28:28] [PASSED] ttm_tt_init_misaligned
[19:28:28] [PASSED] ttm_tt_fini_basic
[19:28:28] [PASSED] ttm_tt_fini_sg
[19:28:28] [PASSED] ttm_tt_fini_shmem
[19:28:28] [PASSED] ttm_tt_create_basic
[19:28:28] [PASSED] ttm_tt_create_invalid_bo_type
[19:28:28] [PASSED] ttm_tt_create_ttm_exists
[19:28:28] [PASSED] ttm_tt_create_failed
[19:28:28] [PASSED] ttm_tt_destroy_basic
[19:28:28] [PASSED] ttm_tt_populate_null_ttm
[19:28:28] [PASSED] ttm_tt_populate_populated_ttm
[19:28:28] [PASSED] ttm_tt_unpopulate_basic
[19:28:28] [PASSED] ttm_tt_unpopulate_empty_ttm
[19:28:28] [PASSED] ttm_tt_swapin_basic
[19:28:28] ===================== [PASSED] ttm_tt ======================
[19:28:28] =================== ttm_bo (14 subtests) ===================
[19:28:28] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[19:28:28] [PASSED] Cannot be interrupted and sleeps
[19:28:28] [PASSED] Cannot be interrupted, locks straight away
[19:28:28] [PASSED] Can be interrupted, sleeps
[19:28:28] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[19:28:28] [PASSED] ttm_bo_reserve_locked_no_sleep
[19:28:28] [PASSED] ttm_bo_reserve_no_wait_ticket
[19:28:28] [PASSED] ttm_bo_reserve_double_resv
[19:28:28] [PASSED] ttm_bo_reserve_interrupted
[19:28:28] [PASSED] ttm_bo_reserve_deadlock
[19:28:28] [PASSED] ttm_bo_unreserve_basic
[19:28:28] [PASSED] ttm_bo_unreserve_pinned
[19:28:28] [PASSED] ttm_bo_unreserve_bulk
[19:28:28] [PASSED] ttm_bo_fini_basic
[19:28:28] [PASSED] ttm_bo_fini_shared_resv
[19:28:28] [PASSED] ttm_bo_pin_basic
[19:28:28] [PASSED] ttm_bo_pin_unpin_resource
[19:28:28] [PASSED] ttm_bo_multiple_pin_one_unpin
[19:28:28] ===================== [PASSED] ttm_bo ======================
[19:28:28] ============== ttm_bo_validate (22 subtests) ===============
[19:28:28] ============== ttm_bo_init_reserved_sys_man ===============
[19:28:28] [PASSED] Buffer object for userspace
[19:28:28] [PASSED] Kernel buffer object
[19:28:28] [PASSED] Shared buffer object
[19:28:28] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[19:28:28] ============== ttm_bo_init_reserved_mock_man ==============
[19:28:28] [PASSED] Buffer object for userspace
[19:28:28] [PASSED] Kernel buffer object
[19:28:28] [PASSED] Shared buffer object
[19:28:28] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[19:28:28] [PASSED] ttm_bo_init_reserved_resv
[19:28:28] ================== ttm_bo_validate_basic ==================
[19:28:28] [PASSED] Buffer object for userspace
[19:28:28] [PASSED] Kernel buffer object
[19:28:28] [PASSED] Shared buffer object
[19:28:28] ============== [PASSED] ttm_bo_validate_basic ==============
[19:28:28] [PASSED] ttm_bo_validate_invalid_placement
[19:28:28] ============= ttm_bo_validate_same_placement ==============
[19:28:28] [PASSED] System manager
[19:28:28] [PASSED] VRAM manager
[19:28:28] ========= [PASSED] ttm_bo_validate_same_placement ==========
[19:28:28] [PASSED] ttm_bo_validate_failed_alloc
[19:28:28] [PASSED] ttm_bo_validate_pinned
[19:28:28] [PASSED] ttm_bo_validate_busy_placement
[19:28:28] ================ ttm_bo_validate_multihop =================
[19:28:28] [PASSED] Buffer object for userspace
[19:28:28] [PASSED] Kernel buffer object
[19:28:28] [PASSED] Shared buffer object
[19:28:28] ============ [PASSED] ttm_bo_validate_multihop =============
[19:28:28] ========== ttm_bo_validate_no_placement_signaled ==========
[19:28:28] [PASSED] Buffer object in system domain, no page vector
[19:28:28] [PASSED] Buffer object in system domain with an existing page vector
[19:28:28] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[19:28:28] ======== ttm_bo_validate_no_placement_not_signaled ========
[19:28:28] [PASSED] Buffer object for userspace
[19:28:28] [PASSED] Kernel buffer object
[19:28:28] [PASSED] Shared buffer object
[19:28:28] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[19:28:28] [PASSED] ttm_bo_validate_move_fence_signaled
[19:28:28] ========= ttm_bo_validate_move_fence_not_signaled =========
[19:28:28] [PASSED] Waits for GPU
[19:28:28] [PASSED] Tries to lock straight away
[19:28:28] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[19:28:28] [PASSED] ttm_bo_validate_swapout
[19:28:28] [PASSED] ttm_bo_validate_happy_evict
[19:28:28] [PASSED] ttm_bo_validate_all_pinned_evict
[19:28:28] [PASSED] ttm_bo_validate_allowed_only_evict
[19:28:28] [PASSED] ttm_bo_validate_deleted_evict
[19:28:28] [PASSED] ttm_bo_validate_busy_domain_evict
[19:28:28] [PASSED] ttm_bo_validate_evict_gutting
[19:28:28] [PASSED] ttm_bo_validate_recrusive_evict
[19:28:28] ================= [PASSED] ttm_bo_validate =================
[19:28:28] ============================================================
[19:28:28] Testing complete. Ran 102 tests: passed: 102
[19:28:28] Elapsed time: 12.324s total, 1.832s configuring, 10.276s building, 0.170s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[19:28:28] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:28:30] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:28:39] Starting KUnit Kernel (1/1)...
[19:28:39] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:28:39] =============== dma-buf-fence (12 subtests) ================
[19:28:39] [PASSED] test_sanitycheck
[19:28:39] [PASSED] test_signaling
[19:28:39] [PASSED] test_add_callback
[19:28:39] [PASSED] test_late_add_callback
[19:28:39] [PASSED] test_rm_callback
[19:28:39] [PASSED] test_late_rm_callback
[19:28:39] [PASSED] test_status
[19:28:39] [PASSED] test_error
[19:28:39] [PASSED] test_wait
[19:28:39] [PASSED] test_wait_timeout
[19:28:39] [PASSED] test_stub
[19:28:39] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[19:28:39] ================== [PASSED] dma-buf-fence ==================
[19:28:39] ============ dma-buf-fence-chain (11 subtests) =============
[19:28:39] [PASSED] test_sanitycheck
[19:28:39] [PASSED] test_find_seqno
[19:28:39] [PASSED] test_find_signaled
[19:28:39] [PASSED] test_find_out_of_order
[19:28:44] [PASSED] test_find_gap
[19:28:44] [PASSED] test_find_race
[19:28:44] [PASSED] test_signal_forward
[19:28:44] [PASSED] test_signal_backward
[19:28:44] [PASSED] test_wait_forward
[19:28:44] [PASSED] test_wait_backward
[19:28:44] [PASSED] test_wait_random
[19:28:44] =============== [PASSED] dma-buf-fence-chain ===============
[19:28:44] ============ dma-buf-fence-unwrap (10 subtests) ============
[19:28:44] [PASSED] test_sanitycheck
[19:28:44] [PASSED] test_unwrap_array
[19:28:44] [PASSED] test_unwrap_chain
[19:28:44] [PASSED] test_unwrap_chain_array
[19:28:44] [PASSED] test_unwrap_merge
[19:28:44] [PASSED] test_unwrap_merge_duplicate
[19:28:44] [PASSED] test_unwrap_merge_seqno
[19:28:44] [PASSED] test_unwrap_merge_order
[19:28:44] [PASSED] test_unwrap_merge_complex
[19:28:44] [PASSED] test_unwrap_merge_complex_seqno
[19:28:44] ============== [PASSED] dma-buf-fence-unwrap ===============
[19:28:44] ================ dma-buf-resv (5 subtests) =================
[19:28:44] [PASSED] test_sanitycheck
[19:28:44] ===================== test_signaling ======================
[19:28:44] [PASSED] kernel
[19:28:44] [PASSED] write
[19:28:44] [PASSED] read
[19:28:44] [PASSED] bookkeep
[19:28:44] ================= [PASSED] test_signaling ==================
[19:28:44] ====================== test_for_each ======================
[19:28:44] [PASSED] kernel
[19:28:44] [PASSED] write
[19:28:44] [PASSED] read
[19:28:44] [PASSED] bookkeep
[19:28:44] ================== [PASSED] test_for_each ==================
[19:28:44] ================= test_for_each_unlocked ==================
[19:28:44] [PASSED] kernel
[19:28:44] [PASSED] write
[19:28:44] [PASSED] read
[19:28:44] [PASSED] bookkeep
[19:28:44] ============= [PASSED] test_for_each_unlocked ==============
[19:28:44] ===================== test_get_fences =====================
[19:28:44] [PASSED] kernel
[19:28:44] [PASSED] write
[19:28:44] [PASSED] read
[19:28:44] [PASSED] bookkeep
[19:28:44] ================= [PASSED] test_get_fences =================
[19:28:44] ================== [PASSED] dma-buf-resv ===================
[19:28:44] ============================================================
[19:28:44] Testing complete. Ran 50 tests: passed: 49, skipped: 1
[19:28:44] Elapsed time: 15.927s total, 1.862s configuring, 8.742s building, 5.278s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 21+ messages in thread* ✗ Xe.CI.BAT: failure for Add new debug infrastructure for configfs (rev9)
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
` (16 preceding siblings ...)
2026-10-05 19:28 ` ✓ CI.KUnit: success " Patchwork
@ 2026-10-05 20:05 ` Patchwork
2026-10-05 20:34 ` [PATCH 00/15] Add new debug infrastructure for configfs Summers, Stuart
18 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2026-10-05 20:05 UTC (permalink / raw)
To: Stuart Summers; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 90742 bytes --]
== Series Details ==
Series: Add new debug infrastructure for configfs (rev9)
URL : https://patchwork.freedesktop.org/series/165879/
State : failure
== Summary ==
CI Bug Log - changes from xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b_BAT -> xe-pw-165879v9_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-165879v9_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-165879v9_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (15 -> 13)
------------------------------
Missing (2): bat-bmg-vm bat-ptl-vm
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-165879v9_BAT:
### IGT changes ###
#### Possible regressions ####
* igt@kms_addfb_basic@addfb25-4-tiled:
- bat-nvls-2: [PASS][1] -> [SKIP][2] +221 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@kms_addfb_basic@addfb25-4-tiled.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@kms_addfb_basic@addfb25-4-tiled.html
* igt@kms_addfb_basic@bad-pitch-0:
- bat-bmg-1: [PASS][3] -> [SKIP][4] +270 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-1/igt@kms_addfb_basic@bad-pitch-0.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-1/igt@kms_addfb_basic@bad-pitch-0.html
* igt@kms_addfb_basic@bad-pitch-128:
- bat-ptl-2: [PASS][5] -> [SKIP][6] +240 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-2/igt@kms_addfb_basic@bad-pitch-128.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-2/igt@kms_addfb_basic@bad-pitch-128.html
* igt@kms_addfb_basic@bad-pitch-63:
- bat-lnl-1: [PASS][7] -> [SKIP][8] +232 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@kms_addfb_basic@bad-pitch-63.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@kms_addfb_basic@bad-pitch-63.html
* igt@kms_addfb_basic@unused-offsets:
- bat-ptl-1: [PASS][9] -> [SKIP][10] +222 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-1/igt@kms_addfb_basic@unused-offsets.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-1/igt@kms_addfb_basic@unused-offsets.html
* igt@xe_dma_buf_sync@export-dma-buf-once-read-write-sync:
- bat-lnl-2: [PASS][11] -> [SKIP][12] +184 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@xe_dma_buf_sync@export-dma-buf-once-read-write-sync.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@xe_dma_buf_sync@export-dma-buf-once-read-write-sync.html
* igt@xe_exec_basic@twice-bindexecqueue-userptr:
- bat-bmg-2: [PASS][13] -> [SKIP][14] +252 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-2/igt@xe_exec_basic@twice-bindexecqueue-userptr.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-2/igt@xe_exec_basic@twice-bindexecqueue-userptr.html
* igt@xe_exec_compute_mode@twice-preempt-fence-early:
- bat-nvls-1: [PASS][15] -> [SKIP][16] +241 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@xe_exec_compute_mode@twice-preempt-fence-early.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@xe_exec_compute_mode@twice-preempt-fence-early.html
* igt@xe_intel_bb@offset-control:
- bat-adlp-7: [PASS][17] -> [SKIP][18] +185 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_intel_bb@offset-control.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_intel_bb@offset-control.html
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- bat-atsm-2: [PASS][19] -> [FAIL][20] +6 other tests fail
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
- bat-wcl-2: [PASS][21] -> [FAIL][22] +4 other tests fail
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-2/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-2/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
- bat-nvls-1: [PASS][23] -> [FAIL][24] +4 other tests fail
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
- bat-wcl-1: [PASS][25] -> [FAIL][26] +4 other tests fail
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-1/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-1/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
* igt@xe_live_ktest@xe_dma_buf:
- bat-bmg-2: [PASS][27] -> [FAIL][28] +6 other tests fail
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-2/igt@xe_live_ktest@xe_dma_buf.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-2/igt@xe_live_ktest@xe_dma_buf.html
- bat-bmg-1: [PASS][29] -> [FAIL][30] +6 other tests fail
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-1/igt@xe_live_ktest@xe_dma_buf.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-1/igt@xe_live_ktest@xe_dma_buf.html
* igt@xe_live_ktest@xe_dma_buf@xe_dma_buf_kunit:
- bat-ptl-1: [PASS][31] -> [FAIL][32] +4 other tests fail
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-1/igt@xe_live_ktest@xe_dma_buf@xe_dma_buf_kunit.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-1/igt@xe_live_ktest@xe_dma_buf@xe_dma_buf_kunit.html
- bat-lnl-1: [PASS][33] -> [FAIL][34] +4 other tests fail
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@xe_live_ktest@xe_dma_buf@xe_dma_buf_kunit.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@xe_live_ktest@xe_dma_buf@xe_dma_buf_kunit.html
* igt@xe_live_ktest@xe_migrate:
- bat-adlp-7: [PASS][35] -> [FAIL][36] +3 other tests fail
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_live_ktest@xe_migrate.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_live_ktest@xe_migrate.html
- bat-ptl-2: [PASS][37] -> [FAIL][38] +4 other tests fail
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-2/igt@xe_live_ktest@xe_migrate.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-2/igt@xe_live_ktest@xe_migrate.html
* igt@xe_live_ktest@xe_migrate@xe_migrate_sanity_kunit:
- bat-lnl-2: [PASS][39] -> [FAIL][40] +4 other tests fail
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@xe_live_ktest@xe_migrate@xe_migrate_sanity_kunit.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@xe_live_ktest@xe_migrate@xe_migrate_sanity_kunit.html
- bat-nvls-2: [PASS][41] -> [FAIL][42] +4 other tests fail
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@xe_live_ktest@xe_migrate@xe_migrate_sanity_kunit.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@xe_live_ktest@xe_migrate@xe_migrate_sanity_kunit.html
* igt@xe_module_load@load:
- bat-nvls-2: [PASS][43] -> [DMESG-FAIL][44]
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@xe_module_load@load.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@xe_module_load@load.html
- bat-atsm-2: [PASS][45] -> [DMESG-FAIL][46]
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@xe_module_load@load.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@xe_module_load@load.html
- bat-wcl-1: [PASS][47] -> [DMESG-FAIL][48]
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-1/igt@xe_module_load@load.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-1/igt@xe_module_load@load.html
- bat-ptl-1: [PASS][49] -> [DMESG-FAIL][50]
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-1/igt@xe_module_load@load.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-1/igt@xe_module_load@load.html
- bat-wcl-2: [PASS][51] -> [DMESG-FAIL][52]
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-2/igt@xe_module_load@load.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-2/igt@xe_module_load@load.html
- bat-lnl-1: [PASS][53] -> [DMESG-FAIL][54]
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@xe_module_load@load.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@xe_module_load@load.html
- bat-bmg-3: [PASS][55] -> [DMESG-FAIL][56]
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-3/igt@xe_module_load@load.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-3/igt@xe_module_load@load.html
- bat-adlp-7: [PASS][57] -> [DMESG-FAIL][58]
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_module_load@load.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_module_load@load.html
- bat-ptl-2: [PASS][59] -> [DMESG-FAIL][60]
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-2/igt@xe_module_load@load.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-2/igt@xe_module_load@load.html
- bat-bmg-2: [PASS][61] -> [DMESG-FAIL][62]
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-2/igt@xe_module_load@load.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-2/igt@xe_module_load@load.html
- bat-bmg-1: [PASS][63] -> [DMESG-FAIL][64]
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-1/igt@xe_module_load@load.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-1/igt@xe_module_load@load.html
- bat-nvls-1: [PASS][65] -> [DMESG-FAIL][66]
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@xe_module_load@load.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@xe_module_load@load.html
- bat-lnl-2: [PASS][67] -> [DMESG-FAIL][68]
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@xe_module_load@load.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@xe_module_load@load.html
* igt@xe_query@multigpu-query-pxp-status:
- bat-bmg-3: [PASS][69] -> [SKIP][70] +71 other tests skip
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-3/igt@xe_query@multigpu-query-pxp-status.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-3/igt@xe_query@multigpu-query-pxp-status.html
* igt@xe_sysfs_scheduler@job_timeout_ms-min-max:
- bat-atsm-2: [PASS][71] -> [SKIP][72] +164 other tests skip
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@xe_sysfs_scheduler@job_timeout_ms-min-max.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@xe_sysfs_scheduler@job_timeout_ms-min-max.html
* igt@xe_vm@munmap-style-unbind-front:
- bat-wcl-1: [PASS][73] -> [SKIP][74] +243 other tests skip
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-1/igt@xe_vm@munmap-style-unbind-front.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-1/igt@xe_vm@munmap-style-unbind-front.html
* igt@xe_vm@shared-pte-page:
- bat-wcl-2: [PASS][75] -> [SKIP][76] +222 other tests skip
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-2/igt@xe_vm@shared-pte-page.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-2/igt@xe_vm@shared-pte-page.html
#### Warnings ####
* igt@core_hotunplug@unbind-rebind:
- bat-nvls-1: [DMESG-WARN][77] ([Intel XE#8762] / [Intel XE#9069]) -> [SKIP][78]
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@core_hotunplug@unbind-rebind.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@core_hotunplug@unbind-rebind.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-ptl-1: [SKIP][79] ([Intel XE#5765]) -> [SKIP][80]
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
- bat-lnl-1: [SKIP][81] ([Intel XE#1466]) -> [SKIP][82]
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
- bat-bmg-2: [SKIP][83] ([Intel XE#2233]) -> [SKIP][84]
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
- bat-wcl-2: [SKIP][85] ([Intel XE#7245]) -> [SKIP][86]
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
- bat-bmg-1: [SKIP][87] ([Intel XE#2233]) -> [SKIP][88]
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
- bat-nvls-1: [SKIP][89] ([Intel XE#8757]) -> [SKIP][90]
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
- bat-nvls-2: [SKIP][91] ([Intel XE#8757]) -> [SKIP][92]
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
- bat-ptl-2: [SKIP][93] ([Intel XE#5765]) -> [SKIP][94]
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
- bat-wcl-1: [SKIP][95] ([Intel XE#7245]) -> [SKIP][96]
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_addfb_basic@addfb25-yf-tiled-legacy:
- bat-atsm-2: [SKIP][97] ([i915#6077]) -> [SKIP][98] +30 other tests skip
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@kms_addfb_basic@addfb25-yf-tiled-legacy.html
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@kms_addfb_basic@addfb25-yf-tiled-legacy.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- bat-bmg-2: [SKIP][99] ([Intel XE#2489] / [Intel XE#3419]) -> [SKIP][100] +13 other tests skip
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
- bat-atsm-2: [SKIP][101] ([Intel XE#1024] / [Intel XE#782] / [Intel XE#947]) -> [SKIP][102] +5 other tests skip
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size:
- bat-ptl-1: [SKIP][103] ([Intel XE#5766]) -> [SKIP][104] +13 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-1/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-1/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html
* igt@kms_dsc@dsc-basic:
- bat-nvls-1: [SKIP][105] ([Intel XE#8759]) -> [SKIP][106]
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@kms_dsc@dsc-basic.html
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@kms_dsc@dsc-basic.html
- bat-ptl-2: [SKIP][107] ([Intel XE#5907]) -> [SKIP][108]
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-2/igt@kms_dsc@dsc-basic.html
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-2/igt@kms_dsc@dsc-basic.html
- bat-bmg-1: [SKIP][109] ([Intel XE#8265]) -> [SKIP][110]
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-1/igt@kms_dsc@dsc-basic.html
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-1/igt@kms_dsc@dsc-basic.html
- bat-atsm-2: [SKIP][111] ([Intel XE#1024] / [Intel XE#784] / [Intel XE#947]) -> [SKIP][112]
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@kms_dsc@dsc-basic.html
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@kms_dsc@dsc-basic.html
- bat-wcl-1: [SKIP][113] ([Intel XE#8265]) -> [SKIP][114]
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-1/igt@kms_dsc@dsc-basic.html
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-1/igt@kms_dsc@dsc-basic.html
* igt@kms_flip@basic-flip-vs-modeset:
- bat-bmg-2: [SKIP][115] ([Intel XE#2482]) -> [SKIP][116] +3 other tests skip
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-2/igt@kms_flip@basic-flip-vs-modeset.html
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-2/igt@kms_flip@basic-flip-vs-modeset.html
* igt@kms_flip@basic-flip-vs-wf_vblank:
- bat-wcl-2: [SKIP][117] ([Intel XE#7240]) -> [SKIP][118] +3 other tests skip
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-2/igt@kms_flip@basic-flip-vs-wf_vblank.html
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-2/igt@kms_flip@basic-flip-vs-wf_vblank.html
- bat-lnl-2: [SKIP][119] ([Intel XE#2235] / [Intel XE#2482]) -> [SKIP][120] +3 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@kms_flip@basic-flip-vs-wf_vblank.html
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@kms_flip@basic-flip-vs-wf_vblank.html
- bat-nvls-2: [SKIP][121] ([Intel XE#8756] / [Intel XE#8783]) -> [SKIP][122] +3 other tests skip
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@kms_flip@basic-flip-vs-wf_vblank.html
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@kms_flip@basic-flip-vs-wf_vblank.html
* igt@kms_flip@basic-plain-flip:
- bat-ptl-1: [SKIP][123] ([Intel XE#5769]) -> [SKIP][124] +3 other tests skip
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-1/igt@kms_flip@basic-plain-flip.html
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-1/igt@kms_flip@basic-plain-flip.html
* igt@kms_force_connector_basic@force-connector-state:
- bat-lnl-1: [SKIP][125] ([Intel XE#352]) -> [SKIP][126] +2 other tests skip
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@kms_force_connector_basic@force-connector-state.html
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@kms_force_connector_basic@force-connector-state.html
* igt@kms_frontbuffer_tracking@basic:
- bat-ptl-1: [SKIP][127] ([Intel XE#5781]) -> [SKIP][128]
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-1/igt@kms_frontbuffer_tracking@basic.html
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-1/igt@kms_frontbuffer_tracking@basic.html
- bat-bmg-2: [SKIP][129] ([Intel XE#2434] / [Intel XE#2548] / [Intel XE#6314]) -> [SKIP][130]
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-2/igt@kms_frontbuffer_tracking@basic.html
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-2/igt@kms_frontbuffer_tracking@basic.html
- bat-atsm-2: [SKIP][131] ([Intel XE#1024] / [Intel XE#783] / [Intel XE#947]) -> [SKIP][132]
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@kms_frontbuffer_tracking@basic.html
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@kms_frontbuffer_tracking@basic.html
- bat-wcl-2: [SKIP][133] ([Intel XE#7246]) -> [SKIP][134]
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-2/igt@kms_frontbuffer_tracking@basic.html
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-2/igt@kms_frontbuffer_tracking@basic.html
- bat-nvls-2: [SKIP][135] ([Intel XE#8761] / [Intel XE#8773]) -> [SKIP][136]
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@kms_frontbuffer_tracking@basic.html
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_hdmi_inject@inject-audio:
- bat-atsm-2: [SKIP][137] ([Intel XE#540]) -> [SKIP][138] +3 other tests skip
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@kms_hdmi_inject@inject-audio.html
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@kms_hdmi_inject@inject-audio.html
- bat-lnl-1: [SKIP][139] ([Intel XE#1470] / [Intel XE#2853]) -> [SKIP][140]
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@kms_hdmi_inject@inject-audio.html
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_pipe_crc_basic@hang-read-crc:
- bat-wcl-2: [SKIP][141] ([Intel XE#7237]) -> [SKIP][142] +13 other tests skip
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-2/igt@kms_pipe_crc_basic@hang-read-crc.html
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-2/igt@kms_pipe_crc_basic@hang-read-crc.html
* igt@kms_pipe_crc_basic@nonblocking-crc:
- bat-nvls-2: [SKIP][143] ([Intel XE#8755]) -> [SKIP][144] +13 other tests skip
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@kms_pipe_crc_basic@nonblocking-crc.html
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@kms_pipe_crc_basic@nonblocking-crc.html
- bat-atsm-2: [SKIP][145] ([Intel XE#829] / [i915#1836]) -> [SKIP][146] +6 other tests skip
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@kms_pipe_crc_basic@nonblocking-crc.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@kms_pipe_crc_basic@nonblocking-crc.html
* igt@kms_prop_blob@basic:
- bat-atsm-2: [SKIP][147] ([Intel XE#780]) -> [SKIP][148]
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@kms_prop_blob@basic.html
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@kms_prop_blob@basic.html
* igt@kms_psr@psr-primary-page-flip:
- bat-atsm-2: [SKIP][149] ([Intel XE#1024] / [Intel XE#947]) -> [SKIP][150] +6 other tests skip
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@kms_psr@psr-primary-page-flip.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@kms_psr@psr-primary-page-flip.html
* igt@kms_psr@psr-sprite-plane-onoff:
- bat-wcl-2: [SKIP][151] ([Intel XE#2850]) -> [SKIP][152] +2 other tests skip
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-2/igt@kms_psr@psr-sprite-plane-onoff.html
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-2/igt@kms_psr@psr-sprite-plane-onoff.html
- bat-bmg-1: [SKIP][153] ([Intel XE#2234] / [Intel XE#2850]) -> [SKIP][154] +2 other tests skip
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-1/igt@kms_psr@psr-sprite-plane-onoff.html
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-1/igt@kms_psr@psr-sprite-plane-onoff.html
- bat-nvls-2: [SKIP][155] ([Intel XE#8758] / [Intel XE#8784]) -> [SKIP][156] +2 other tests skip
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@kms_psr@psr-sprite-plane-onoff.html
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@kms_psr@psr-sprite-plane-onoff.html
- bat-bmg-2: [SKIP][157] ([Intel XE#2234] / [Intel XE#2850]) -> [SKIP][158] +2 other tests skip
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-2/igt@kms_psr@psr-sprite-plane-onoff.html
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-2/igt@kms_psr@psr-sprite-plane-onoff.html
* igt@sriov_basic@enable-vfs-autoprobe-on:
- bat-lnl-1: [SKIP][159] ([Intel XE#1091] / [Intel XE#2849]) -> [SKIP][160] +1 other test skip
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@sriov_basic@enable-vfs-autoprobe-on.html
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@sriov_basic@enable-vfs-autoprobe-on.html
- bat-lnl-2: [SKIP][161] ([Intel XE#1091] / [Intel XE#2849]) -> [SKIP][162] +1 other test skip
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@sriov_basic@enable-vfs-autoprobe-on.html
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@sriov_basic@enable-vfs-autoprobe-on.html
* igt@xe_ccs@block-copy-compressed:
- bat-adlp-7: [SKIP][163] ([Intel XE#455] / [Intel XE#488] / [Intel XE#5607]) -> [SKIP][164] +1 other test skip
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_ccs@block-copy-compressed.html
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_ccs@block-copy-compressed.html
* igt@xe_compute_preempt@compute-preempt:
- bat-adlp-7: [SKIP][165] ([Intel XE#6360]) -> [SKIP][166] +1 other test skip
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_compute_preempt@compute-preempt.html
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_compute_preempt@compute-preempt.html
- bat-atsm-2: [SKIP][167] ([Intel XE#8380]) -> [SKIP][168] +1 other test skip
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@xe_compute_preempt@compute-preempt.html
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@xe_compute_preempt@compute-preempt.html
* igt@xe_evict@evict-beng-small:
- bat-adlp-7: [SKIP][169] ([Intel XE#261] / [Intel XE#5564] / [Intel XE#688]) -> [SKIP][170] +9 other tests skip
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_evict@evict-beng-small.html
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_evict@evict-beng-small.html
- bat-ptl-2: [SKIP][171] ([Intel XE#5764]) -> [SKIP][172] +11 other tests skip
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-2/igt@xe_evict@evict-beng-small.html
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-2/igt@xe_evict@evict-beng-small.html
* igt@xe_evict@evict-beng-small-cm:
- bat-ptl-1: [SKIP][173] ([Intel XE#5764]) -> [SKIP][174] +11 other tests skip
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-1/igt@xe_evict@evict-beng-small-cm.html
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-1/igt@xe_evict@evict-beng-small-cm.html
- bat-lnl-1: [SKIP][175] ([Intel XE#6540] / [Intel XE#688]) -> [SKIP][176] +11 other tests skip
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@xe_evict@evict-beng-small-cm.html
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@xe_evict@evict-beng-small-cm.html
* igt@xe_evict@evict-small-multi-vm:
- bat-wcl-2: [SKIP][177] ([Intel XE#7238]) -> [SKIP][178] +11 other tests skip
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-2/igt@xe_evict@evict-small-multi-vm.html
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-2/igt@xe_evict@evict-small-multi-vm.html
- bat-nvls-1: [SKIP][179] ([Intel XE#8777]) -> [SKIP][180] +9 other tests skip
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@xe_evict@evict-small-multi-vm.html
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@xe_evict@evict-small-multi-vm.html
- bat-nvls-2: [SKIP][181] ([Intel XE#8777]) -> [SKIP][182] +9 other tests skip
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@xe_evict@evict-small-multi-vm.html
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@xe_evict@evict-small-multi-vm.html
- bat-wcl-1: [SKIP][183] ([Intel XE#7238]) -> [SKIP][184] +11 other tests skip
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-1/igt@xe_evict@evict-small-multi-vm.html
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-1/igt@xe_evict@evict-small-multi-vm.html
* igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd:
- bat-nvls-1: [SKIP][185] ([Intel XE#8744]) -> [SKIP][186] +1 other test skip
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd.html
- bat-lnl-2: [SKIP][187] ([Intel XE#6540] / [Intel XE#688]) -> [SKIP][188] +11 other tests skip
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd.html
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd.html
- bat-nvls-2: [SKIP][189] ([Intel XE#8744]) -> [SKIP][190] +1 other test skip
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd.html
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd.html
- bat-adlp-7: [SKIP][191] ([Intel XE#5563] / [Intel XE#688]) -> [SKIP][192] +1 other test skip
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd.html
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_evict_ccs@evict-overcommit-parallel-nofree-samefd.html
* igt@xe_exec_balancer@no-exec-parallel-basic:
- bat-lnl-1: [SKIP][193] ([Intel XE#7482]) -> [SKIP][194] +17 other tests skip
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@xe_exec_balancer@no-exec-parallel-basic.html
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@xe_exec_balancer@no-exec-parallel-basic.html
* igt@xe_exec_balancer@no-exec-virtual-basic:
- bat-lnl-2: [SKIP][195] ([Intel XE#7482]) -> [SKIP][196] +17 other tests skip
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@xe_exec_balancer@no-exec-virtual-basic.html
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@xe_exec_balancer@no-exec-virtual-basic.html
- bat-nvls-2: [SKIP][197] ([Intel XE#8741]) -> [SKIP][198] +17 other tests skip
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@xe_exec_balancer@no-exec-virtual-basic.html
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@xe_exec_balancer@no-exec-virtual-basic.html
* igt@xe_exec_balancer@twice-cm-virtual-rebind:
- bat-ptl-1: [SKIP][199] ([Intel XE#7482]) -> [SKIP][200] +17 other tests skip
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-1/igt@xe_exec_balancer@twice-cm-virtual-rebind.html
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-1/igt@xe_exec_balancer@twice-cm-virtual-rebind.html
* igt@xe_exec_balancer@twice-cm-virtual-userptr:
- bat-adlp-7: [SKIP][201] ([Intel XE#7482]) -> [SKIP][202] +17 other tests skip
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_exec_balancer@twice-cm-virtual-userptr.html
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_exec_balancer@twice-cm-virtual-userptr.html
* igt@xe_exec_balancer@twice-parallel-userptr:
- bat-ptl-2: [SKIP][203] ([Intel XE#7482]) -> [SKIP][204] +17 other tests skip
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-2/igt@xe_exec_balancer@twice-parallel-userptr.html
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-2/igt@xe_exec_balancer@twice-parallel-userptr.html
* igt@xe_exec_balancer@twice-virtual-rebind:
- bat-wcl-1: [SKIP][205] ([Intel XE#7482]) -> [SKIP][206] +17 other tests skip
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-1/igt@xe_exec_balancer@twice-virtual-rebind.html
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-1/igt@xe_exec_balancer@twice-virtual-rebind.html
* igt@xe_exec_balancer@twice-virtual-userptr-invalidate:
- bat-nvls-1: [SKIP][207] ([Intel XE#8741]) -> [SKIP][208] +17 other tests skip
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@xe_exec_balancer@twice-virtual-userptr-invalidate.html
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@xe_exec_balancer@twice-virtual-userptr-invalidate.html
* igt@xe_exec_balancer@twice-virtual-userptr-rebind:
- bat-wcl-2: [SKIP][209] ([Intel XE#7482]) -> [SKIP][210] +17 other tests skip
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-2/igt@xe_exec_balancer@twice-virtual-userptr-rebind.html
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-2/igt@xe_exec_balancer@twice-virtual-userptr-rebind.html
* igt@xe_exec_fault_mode@invalid-va:
- bat-atsm-2: [SKIP][211] ([Intel XE#8381]) -> [SKIP][212]
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@xe_exec_fault_mode@invalid-va.html
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@xe_exec_fault_mode@invalid-va.html
* igt@xe_exec_fault_mode@twice-rebind-prefetch:
- bat-adlp-7: [SKIP][213] ([Intel XE#288] / [Intel XE#5561]) -> [SKIP][214] +33 other tests skip
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_exec_fault_mode@twice-rebind-prefetch.html
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_exec_fault_mode@twice-rebind-prefetch.html
* igt@xe_exec_fault_mode@twice-userptr-prefetch:
- bat-atsm-2: [SKIP][215] ([Intel XE#288]) -> [SKIP][216] +32 other tests skip
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@xe_exec_fault_mode@twice-userptr-prefetch.html
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@xe_exec_fault_mode@twice-userptr-prefetch.html
* igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence:
- bat-atsm-2: [SKIP][217] ([Intel XE#8376]) -> [SKIP][218] +3 other tests skip
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence.html
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence.html
* igt@xe_exec_mix_modes@exec-spinner-interrupted-dma-fence:
- bat-adlp-7: [SKIP][219] ([Intel XE#8376]) -> [SKIP][220] +3 other tests skip
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_exec_mix_modes@exec-spinner-interrupted-dma-fence.html
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_exec_mix_modes@exec-spinner-interrupted-dma-fence.html
* igt@xe_exec_multi_queue@exec-sanity:
- bat-bmg-1: [SKIP][221] ([Intel XE#8364]) -> [SKIP][222] +13 other tests skip
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-1/igt@xe_exec_multi_queue@exec-sanity.html
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-1/igt@xe_exec_multi_queue@exec-sanity.html
* igt@xe_exec_multi_queue@many-queues-basic:
- bat-ptl-1: [SKIP][223] ([Intel XE#8364]) -> [SKIP][224] +13 other tests skip
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-1/igt@xe_exec_multi_queue@many-queues-basic.html
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-1/igt@xe_exec_multi_queue@many-queues-basic.html
* igt@xe_exec_multi_queue@many-queues-basic-smem:
- bat-lnl-2: [SKIP][225] ([Intel XE#8364]) -> [SKIP][226] +13 other tests skip
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@xe_exec_multi_queue@many-queues-basic-smem.html
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@xe_exec_multi_queue@many-queues-basic-smem.html
- bat-nvls-2: [SKIP][227] ([Intel XE#8377]) -> [SKIP][228] +13 other tests skip
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@xe_exec_multi_queue@many-queues-basic-smem.html
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@xe_exec_multi_queue@many-queues-basic-smem.html
* igt@xe_exec_multi_queue@many-queues-preempt-mode-userptr:
- bat-atsm-2: [SKIP][229] ([Intel XE#8364]) -> [SKIP][230] +13 other tests skip
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@xe_exec_multi_queue@many-queues-preempt-mode-userptr.html
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@xe_exec_multi_queue@many-queues-preempt-mode-userptr.html
* igt@xe_exec_multi_queue@many-queues-priority:
- bat-ptl-2: [SKIP][231] ([Intel XE#8364]) -> [SKIP][232] +13 other tests skip
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-2/igt@xe_exec_multi_queue@many-queues-priority.html
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-2/igt@xe_exec_multi_queue@many-queues-priority.html
- bat-wcl-1: [SKIP][233] ([Intel XE#8364]) -> [SKIP][234] +13 other tests skip
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-1/igt@xe_exec_multi_queue@many-queues-priority.html
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-1/igt@xe_exec_multi_queue@many-queues-priority.html
* igt@xe_exec_multi_queue@many-queues-userptr-invalidate:
- bat-wcl-2: [SKIP][235] ([Intel XE#8364]) -> [SKIP][236] +13 other tests skip
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-2/igt@xe_exec_multi_queue@many-queues-userptr-invalidate.html
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-2/igt@xe_exec_multi_queue@many-queues-userptr-invalidate.html
- bat-nvls-1: [SKIP][237] ([Intel XE#8377]) -> [SKIP][238] +13 other tests skip
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@xe_exec_multi_queue@many-queues-userptr-invalidate.html
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@xe_exec_multi_queue@many-queues-userptr-invalidate.html
* igt@xe_exec_multi_queue@priority:
- bat-lnl-1: [SKIP][239] ([Intel XE#8364]) -> [SKIP][240] +13 other tests skip
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@xe_exec_multi_queue@priority.html
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@xe_exec_multi_queue@priority.html
- bat-bmg-2: [SKIP][241] ([Intel XE#8364]) -> [SKIP][242] +13 other tests skip
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-2/igt@xe_exec_multi_queue@priority.html
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-2/igt@xe_exec_multi_queue@priority.html
- bat-adlp-7: [SKIP][243] ([Intel XE#8364] / [Intel XE#8377]) -> [SKIP][244] +13 other tests skip
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_exec_multi_queue@priority.html
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_exec_multi_queue@priority.html
* igt@xe_exec_system_allocator@eu-fault-2m-range-device-host:
- bat-adlp-7: [SKIP][245] ([Intel XE#4915]) -> [SKIP][246] +11 other tests skip
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_exec_system_allocator@eu-fault-2m-range-device-host.html
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_exec_system_allocator@eu-fault-2m-range-device-host.html
* igt@xe_exec_system_allocator@twice-free:
- bat-atsm-2: [SKIP][247] ([Intel XE#8379]) -> [SKIP][248] +11 other tests skip
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@xe_exec_system_allocator@twice-free.html
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@xe_exec_system_allocator@twice-free.html
* igt@xe_huc_copy@huc_copy:
- bat-nvls-1: [SKIP][249] ([Intel XE#8746]) -> [SKIP][250]
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@xe_huc_copy@huc_copy.html
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@xe_huc_copy@huc_copy.html
- bat-nvls-2: [SKIP][251] ([Intel XE#8746]) -> [SKIP][252]
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@xe_huc_copy@huc_copy.html
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@xe_huc_copy@huc_copy.html
- bat-atsm-2: [SKIP][253] ([Intel XE#255]) -> [SKIP][254]
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@xe_huc_copy@huc_copy.html
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@xe_huc_copy@huc_copy.html
* igt@xe_live_ktest@xe_bo:
- bat-ptl-1: [SKIP][255] ([Intel XE#5775]) -> [FAIL][256] +2 other tests fail
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-1/igt@xe_live_ktest@xe_bo.html
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-1/igt@xe_live_ktest@xe_bo.html
- bat-lnl-1: [SKIP][257] ([Intel XE#2229]) -> [FAIL][258] +2 other tests fail
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@xe_live_ktest@xe_bo.html
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@xe_live_ktest@xe_bo.html
- bat-adlp-7: [SKIP][259] ([Intel XE#2229] / [Intel XE#455]) -> [FAIL][260] +2 other tests fail
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_live_ktest@xe_bo.html
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_live_ktest@xe_bo.html
- bat-lnl-2: [SKIP][261] ([Intel XE#2229]) -> [FAIL][262] +2 other tests fail
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@xe_live_ktest@xe_bo.html
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@xe_live_ktest@xe_bo.html
- bat-nvls-1: [SKIP][263] ([Intel XE#8792]) -> [FAIL][264]
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@xe_live_ktest@xe_bo.html
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@xe_live_ktest@xe_bo.html
- bat-nvls-2: [SKIP][265] ([Intel XE#8792]) -> [FAIL][266]
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@xe_live_ktest@xe_bo.html
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@xe_live_ktest@xe_bo.html
* igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit:
- bat-wcl-2: [SKIP][267] ([Intel XE#7239]) -> [FAIL][268] +2 other tests fail
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-2/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-2/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html
- bat-nvls-1: [SKIP][269] ([Intel XE#8791] / [Intel XE#8792]) -> [FAIL][270]
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html
- bat-ptl-2: [SKIP][271] ([Intel XE#5775]) -> [FAIL][272] +2 other tests fail
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-2/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-2/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html
- bat-nvls-2: [SKIP][273] ([Intel XE#8791] / [Intel XE#8792]) -> [FAIL][274]
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@xe_live_ktest@xe_bo@xe_bo_evict_kunit.html
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- bat-bmg-2: [SKIP][275] ([Intel XE#2229]) -> [FAIL][276]
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-2/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
[276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-2/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
- bat-bmg-1: [SKIP][277] ([Intel XE#2229]) -> [FAIL][278]
[277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-1/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
[278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-1/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
* igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
- bat-atsm-2: [SKIP][279] ([Intel XE#2229]) -> [FAIL][280]
[279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
[280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
- bat-wcl-1: [SKIP][281] ([Intel XE#7239]) -> [FAIL][282] +2 other tests fail
[281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-1/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
[282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-1/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
- bat-adlp-7: [SKIP][283] ([Intel XE#2229] / [Intel XE#5488]) -> [FAIL][284]
[283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
[284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
- bat-nvls-1: [SKIP][285] ([Intel XE#8791]) -> [FAIL][286]
[285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
[286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
- bat-nvls-2: [SKIP][287] ([Intel XE#8791]) -> [FAIL][288]
[287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
[288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
* igt@xe_mmap@vram:
- bat-wcl-2: [SKIP][289] ([Intel XE#7243]) -> [SKIP][290]
[289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-2/igt@xe_mmap@vram.html
[290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-2/igt@xe_mmap@vram.html
- bat-nvls-1: [SKIP][291] ([Intel XE#8747]) -> [SKIP][292]
[291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@xe_mmap@vram.html
[292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@xe_mmap@vram.html
- bat-nvls-2: [SKIP][293] ([Intel XE#8747]) -> [SKIP][294]
[293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@xe_mmap@vram.html
[294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@xe_mmap@vram.html
- bat-ptl-2: [SKIP][295] ([Intel XE#5776]) -> [SKIP][296]
[295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-2/igt@xe_mmap@vram.html
[296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-2/igt@xe_mmap@vram.html
- bat-wcl-1: [SKIP][297] ([Intel XE#7243]) -> [SKIP][298]
[297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-1/igt@xe_mmap@vram.html
[298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-1/igt@xe_mmap@vram.html
- bat-ptl-1: [SKIP][299] ([Intel XE#5776]) -> [SKIP][300]
[299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-1/igt@xe_mmap@vram.html
[300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-1/igt@xe_mmap@vram.html
- bat-lnl-1: [SKIP][301] ([Intel XE#1416]) -> [SKIP][302]
[301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@xe_mmap@vram.html
[302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@xe_mmap@vram.html
- bat-adlp-7: [SKIP][303] ([Intel XE#1008] / [Intel XE#5591]) -> [SKIP][304]
[303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_mmap@vram.html
[304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_mmap@vram.html
- bat-lnl-2: [SKIP][305] ([Intel XE#1416]) -> [SKIP][306]
[305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@xe_mmap@vram.html
[306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@xe_mmap@vram.html
* igt@xe_pat@pat-index-auto:
- bat-adlp-7: [SKIP][307] ([Intel XE#8434]) -> [SKIP][308]
[307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_pat@pat-index-auto.html
[308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_pat@pat-index-auto.html
- bat-atsm-2: [SKIP][309] ([Intel XE#8434]) -> [SKIP][310]
[309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@xe_pat@pat-index-auto.html
[310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@xe_pat@pat-index-auto.html
* igt@xe_pat@pat-index-xe2:
- bat-atsm-2: [SKIP][311] ([Intel XE#977]) -> [SKIP][312]
[311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@xe_pat@pat-index-xe2.html
[312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@xe_pat@pat-index-xe2.html
- bat-adlp-7: [SKIP][313] ([Intel XE#977]) -> [SKIP][314]
[313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_pat@pat-index-xe2.html
[314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_pat@pat-index-xe2.html
* igt@xe_pat@pat-index-xehpc:
- bat-lnl-1: [SKIP][315] ([Intel XE#1420] / [Intel XE#2838] / [Intel XE#7590]) -> [SKIP][316]
[315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@xe_pat@pat-index-xehpc.html
[316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@xe_pat@pat-index-xehpc.html
- bat-bmg-2: [SKIP][317] ([Intel XE#1420] / [Intel XE#7590]) -> [SKIP][318]
[317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-2/igt@xe_pat@pat-index-xehpc.html
[318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-2/igt@xe_pat@pat-index-xehpc.html
- bat-adlp-7: [SKIP][319] ([Intel XE#2838] / [Intel XE#979]) -> [SKIP][320]
[319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_pat@pat-index-xehpc.html
[320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_pat@pat-index-xehpc.html
- bat-atsm-2: [SKIP][321] ([Intel XE#2838] / [Intel XE#979]) -> [SKIP][322]
[321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@xe_pat@pat-index-xehpc.html
[322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@xe_pat@pat-index-xehpc.html
- bat-wcl-2: [SKIP][323] ([Intel XE#7247] / [Intel XE#7590]) -> [SKIP][324]
[323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-2/igt@xe_pat@pat-index-xehpc.html
[324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-2/igt@xe_pat@pat-index-xehpc.html
- bat-bmg-1: [SKIP][325] ([Intel XE#1420] / [Intel XE#7590]) -> [SKIP][326]
[325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-1/igt@xe_pat@pat-index-xehpc.html
[326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-1/igt@xe_pat@pat-index-xehpc.html
- bat-nvls-1: [SKIP][327] ([Intel XE#8748]) -> [SKIP][328]
[327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@xe_pat@pat-index-xehpc.html
[328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@xe_pat@pat-index-xehpc.html
- bat-lnl-2: [SKIP][329] ([Intel XE#1420] / [Intel XE#2838] / [Intel XE#7590]) -> [SKIP][330]
[329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@xe_pat@pat-index-xehpc.html
[330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@xe_pat@pat-index-xehpc.html
- bat-nvls-2: [SKIP][331] ([Intel XE#8748]) -> [SKIP][332]
[331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@xe_pat@pat-index-xehpc.html
[332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@xe_pat@pat-index-xehpc.html
- bat-ptl-2: [SKIP][333] ([Intel XE#5777] / [Intel XE#7590]) -> [SKIP][334]
[333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-2/igt@xe_pat@pat-index-xehpc.html
[334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-2/igt@xe_pat@pat-index-xehpc.html
- bat-wcl-1: [SKIP][335] ([Intel XE#7247] / [Intel XE#7590]) -> [SKIP][336]
[335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-1/igt@xe_pat@pat-index-xehpc.html
[336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-1/igt@xe_pat@pat-index-xehpc.html
- bat-ptl-1: [SKIP][337] ([Intel XE#5777] / [Intel XE#7590]) -> [SKIP][338]
[337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-1/igt@xe_pat@pat-index-xehpc.html
[338]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-1/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pat@pat-index-xelp:
- bat-bmg-2: [SKIP][339] ([Intel XE#2245] / [Intel XE#7590]) -> [SKIP][340]
[339]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-2/igt@xe_pat@pat-index-xelp.html
[340]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-2/igt@xe_pat@pat-index-xelp.html
- bat-bmg-1: [SKIP][341] ([Intel XE#2245] / [Intel XE#7590]) -> [SKIP][342]
[341]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-1/igt@xe_pat@pat-index-xelp.html
[342]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-1/igt@xe_pat@pat-index-xelp.html
- bat-lnl-2: [SKIP][343] ([Intel XE#7590] / [Intel XE#977]) -> [SKIP][344]
[343]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@xe_pat@pat-index-xelp.html
[344]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@xe_pat@pat-index-xelp.html
- bat-nvls-2: [SKIP][345] ([Intel XE#8743]) -> [SKIP][346]
[345]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@xe_pat@pat-index-xelp.html
[346]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@xe_pat@pat-index-xelp.html
- bat-wcl-1: [SKIP][347] ([Intel XE#7242] / [Intel XE#7590]) -> [SKIP][348]
[347]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-1/igt@xe_pat@pat-index-xelp.html
[348]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-1/igt@xe_pat@pat-index-xelp.html
- bat-wcl-2: [SKIP][349] ([Intel XE#7242] / [Intel XE#7590]) -> [SKIP][350]
[349]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-2/igt@xe_pat@pat-index-xelp.html
[350]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-2/igt@xe_pat@pat-index-xelp.html
- bat-lnl-1: [SKIP][351] ([Intel XE#7590] / [Intel XE#977]) -> [SKIP][352]
[351]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@xe_pat@pat-index-xelp.html
[352]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@xe_pat@pat-index-xelp.html
- bat-nvls-1: [SKIP][353] ([Intel XE#8743]) -> [SKIP][354]
[353]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@xe_pat@pat-index-xelp.html
[354]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@xe_pat@pat-index-xelp.html
- bat-ptl-2: [SKIP][355] ([Intel XE#5771] / [Intel XE#7590]) -> [SKIP][356]
[355]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-2/igt@xe_pat@pat-index-xelp.html
[356]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-2/igt@xe_pat@pat-index-xelp.html
- bat-ptl-1: [SKIP][357] ([Intel XE#5771] / [Intel XE#7590]) -> [SKIP][358]
[357]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-1/igt@xe_pat@pat-index-xelp.html
[358]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-1/igt@xe_pat@pat-index-xelp.html
* igt@xe_pat@pat-index-xelpg:
- bat-ptl-1: [SKIP][359] ([Intel XE#5780] / [Intel XE#7590]) -> [SKIP][360]
[359]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-1/igt@xe_pat@pat-index-xelpg.html
[360]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-1/igt@xe_pat@pat-index-xelpg.html
- bat-lnl-1: [SKIP][361] ([Intel XE#7590] / [Intel XE#979]) -> [SKIP][362]
[361]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@xe_pat@pat-index-xelpg.html
[362]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@xe_pat@pat-index-xelpg.html
- bat-bmg-2: [SKIP][363] ([Intel XE#2236] / [Intel XE#7590]) -> [SKIP][364]
[363]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-2/igt@xe_pat@pat-index-xelpg.html
[364]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-2/igt@xe_pat@pat-index-xelpg.html
- bat-adlp-7: [SKIP][365] ([Intel XE#979]) -> [SKIP][366]
[365]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@xe_pat@pat-index-xelpg.html
[366]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@xe_pat@pat-index-xelpg.html
- bat-atsm-2: [SKIP][367] ([Intel XE#979]) -> [SKIP][368]
[367]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-atsm-2/igt@xe_pat@pat-index-xelpg.html
[368]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-atsm-2/igt@xe_pat@pat-index-xelpg.html
- bat-wcl-2: [SKIP][369] ([Intel XE#7248] / [Intel XE#7590]) -> [SKIP][370]
[369]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-2/igt@xe_pat@pat-index-xelpg.html
[370]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-2/igt@xe_pat@pat-index-xelpg.html
- bat-bmg-1: [SKIP][371] ([Intel XE#2236] / [Intel XE#7590]) -> [SKIP][372]
[371]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-1/igt@xe_pat@pat-index-xelpg.html
[372]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-1/igt@xe_pat@pat-index-xelpg.html
- bat-nvls-1: [SKIP][373] ([Intel XE#8745]) -> [SKIP][374]
[373]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@xe_pat@pat-index-xelpg.html
[374]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@xe_pat@pat-index-xelpg.html
- bat-lnl-2: [SKIP][375] ([Intel XE#2236] / [Intel XE#7590] / [Intel XE#979]) -> [SKIP][376]
[375]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@xe_pat@pat-index-xelpg.html
[376]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@xe_pat@pat-index-xelpg.html
- bat-nvls-2: [SKIP][377] ([Intel XE#8745]) -> [SKIP][378]
[377]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-2/igt@xe_pat@pat-index-xelpg.html
[378]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-2/igt@xe_pat@pat-index-xelpg.html
- bat-ptl-2: [SKIP][379] ([Intel XE#5780] / [Intel XE#7590]) -> [SKIP][380]
[379]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-2/igt@xe_pat@pat-index-xelpg.html
[380]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-2/igt@xe_pat@pat-index-xelpg.html
- bat-wcl-1: [SKIP][381] ([Intel XE#7248] / [Intel XE#7590]) -> [SKIP][382]
[381]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-1/igt@xe_pat@pat-index-xelpg.html
[382]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-1/igt@xe_pat@pat-index-xelpg.html
* igt@xe_sriov_flr@flr-vf1-clear:
- bat-lnl-2: [SKIP][383] ([Intel XE#3342]) -> [SKIP][384]
[383]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@xe_sriov_flr@flr-vf1-clear.html
[384]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@xe_sriov_flr@flr-vf1-clear.html
- bat-lnl-1: [SKIP][385] ([Intel XE#3342]) -> [SKIP][386]
[385]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@xe_sriov_flr@flr-vf1-clear.html
[386]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@xe_sriov_flr@flr-vf1-clear.html
Known issues
------------
Here are the changes found in xe-pw-165879v9_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_hotunplug@unbind-rebind:
- bat-bmg-2: [PASS][387] -> [SKIP][388] ([Intel XE#8749])
[387]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-2/igt@core_hotunplug@unbind-rebind.html
[388]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-2/igt@core_hotunplug@unbind-rebind.html
- bat-bmg-1: [PASS][389] -> [SKIP][390] ([Intel XE#8749])
[389]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-1/igt@core_hotunplug@unbind-rebind.html
[390]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-1/igt@core_hotunplug@unbind-rebind.html
* igt@fbdev@eof:
- bat-nvls-1: [PASS][391] -> [SKIP][392] ([Intel XE#8742]) +4 other tests skip
[391]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-nvls-1/igt@fbdev@eof.html
[392]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-nvls-1/igt@fbdev@eof.html
- bat-wcl-1: [PASS][393] -> [SKIP][394] ([Intel XE#7241]) +4 other tests skip
[393]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-wcl-1/igt@fbdev@eof.html
[394]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-wcl-1/igt@fbdev@eof.html
- bat-lnl-1: [PASS][395] -> [SKIP][396] ([Intel XE#2134]) +4 other tests skip
[395]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@fbdev@eof.html
[396]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@fbdev@eof.html
* igt@fbdev@nullptr:
- bat-ptl-2: [PASS][397] -> [SKIP][398] ([Intel XE#5773]) +4 other tests skip
[397]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-2/igt@fbdev@nullptr.html
[398]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-2/igt@fbdev@nullptr.html
* igt@fbdev@read:
- bat-bmg-1: [PASS][399] -> [SKIP][400] ([Intel XE#2134]) +4 other tests skip
[399]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-1/igt@fbdev@read.html
[400]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-1/igt@fbdev@read.html
* igt@fbdev@write:
- bat-adlp-7: [PASS][401] -> [SKIP][402] ([Intel XE#2134]) +4 other tests skip
[401]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@fbdev@write.html
[402]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@fbdev@write.html
* igt@kms_addfb_basic@bad-pitch-0:
- bat-lnl-2: [PASS][403] -> [SKIP][404] ([Intel XE#2235]) +30 other tests skip
[403]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@kms_addfb_basic@bad-pitch-0.html
[404]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@kms_addfb_basic@bad-pitch-0.html
* igt@kms_frontbuffer_tracking@basic:
- bat-lnl-1: [PASS][405] -> [SKIP][406] ([Intel XE#2351]) +3 other tests skip
[405]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@kms_frontbuffer_tracking@basic.html
[406]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_psr@psr-cursor-plane-move:
- bat-adlp-7: [PASS][407] -> [SKIP][408] ([Intel XE#2351]) +3 other tests skip
[407]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@kms_psr@psr-cursor-plane-move.html
[408]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@kms_psr@psr-cursor-plane-move.html
* igt@kms_psr@psr-sprite-plane-onoff:
- bat-ptl-2: [PASS][409] -> [SKIP][410] ([Intel XE#1406]) +2 other tests skip
[409]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-2/igt@kms_psr@psr-sprite-plane-onoff.html
[410]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-2/igt@kms_psr@psr-sprite-plane-onoff.html
* igt@xe_multigpu_svm@mgpu-latency-prefetch:
- bat-bmg-3: [PASS][411] -> [SKIP][412] ([Intel XE#6964]) +20 other tests skip
[411]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-3/igt@xe_multigpu_svm@mgpu-latency-prefetch.html
[412]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-3/igt@xe_multigpu_svm@mgpu-latency-prefetch.html
* igt@xe_peer2peer@read:
- bat-bmg-3: [PASS][413] -> [SKIP][414] ([Intel XE#6953] / [Intel XE#7326] / [Intel XE#7353]) +1 other test skip
[413]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-bmg-3/igt@xe_peer2peer@read.html
[414]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-bmg-3/igt@xe_peer2peer@read.html
#### Warnings ####
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-lnl-2: [SKIP][415] ([Intel XE#1466] / [Intel XE#2235]) -> [SKIP][416] ([Intel XE#2235])
[415]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
[416]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_dsc@dsc-basic:
- bat-lnl-1: [SKIP][417] ([Intel XE#8265]) -> [SKIP][418] ([Intel XE#2351])
[417]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-1/igt@kms_dsc@dsc-basic.html
[418]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-1/igt@kms_dsc@dsc-basic.html
- bat-adlp-7: [SKIP][419] ([Intel XE#8265]) -> [SKIP][420] ([Intel XE#2351])
[419]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-adlp-7/igt@kms_dsc@dsc-basic.html
[420]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-adlp-7/igt@kms_dsc@dsc-basic.html
- bat-lnl-2: [SKIP][421] ([Intel XE#2235]) -> [SKIP][422] ([Intel XE#2235] / [Intel XE#2351])
[421]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@kms_dsc@dsc-basic.html
[422]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@kms_dsc@dsc-basic.html
* igt@kms_force_connector_basic@force-connector-state:
- bat-lnl-2: [SKIP][423] ([Intel XE#2235] / [Intel XE#352]) -> [SKIP][424] ([Intel XE#2235]) +2 other tests skip
[423]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@kms_force_connector_basic@force-connector-state.html
[424]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@kms_force_connector_basic@force-connector-state.html
* igt@kms_frontbuffer_tracking@basic:
- bat-lnl-2: [SKIP][425] ([Intel XE#2235] / [Intel XE#2548] / [Intel XE#7779]) -> [SKIP][426] ([Intel XE#2235] / [Intel XE#2351])
[425]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@kms_frontbuffer_tracking@basic.html
[426]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_hdmi_inject@inject-audio:
- bat-lnl-2: [SKIP][427] ([Intel XE#1470] / [Intel XE#2235] / [Intel XE#2853]) -> [SKIP][428] ([Intel XE#2235])
[427]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@kms_hdmi_inject@inject-audio.html
[428]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_psr@psr-cursor-plane-move:
- bat-lnl-2: [SKIP][429] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][430] ([Intel XE#2351]) +2 other tests skip
[429]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-lnl-2/igt@kms_psr@psr-cursor-plane-move.html
[430]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-lnl-2/igt@kms_psr@psr-cursor-plane-move.html
* igt@kms_psr@psr-sprite-plane-onoff:
- bat-ptl-1: [SKIP][431] ([Intel XE#1406] / [Intel XE#5778]) -> [SKIP][432] ([Intel XE#1406]) +2 other tests skip
[431]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b/bat-ptl-1/igt@kms_psr@psr-sprite-plane-onoff.html
[432]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/bat-ptl-1/igt@kms_psr@psr-sprite-plane-onoff.html
[Intel XE#1008]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1008
[Intel XE#1024]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1024
[Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1416]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1416
[Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
[Intel XE#1466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1466
[Intel XE#1470]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1470
[Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2235]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2235
[Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
[Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
[Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
[Intel XE#2434]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2434
[Intel XE#2482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2482
[Intel XE#2489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2489
[Intel XE#2548]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2548
[Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
[Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
[Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
[Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2853]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2853
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3419]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3419
[Intel XE#352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/352
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/488
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/540
[Intel XE#5488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5488
[Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
[Intel XE#5563]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5563
[Intel XE#5564]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5564
[Intel XE#5591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5591
[Intel XE#5607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5607
[Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764
[Intel XE#5765]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5765
[Intel XE#5766]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5766
[Intel XE#5769]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5769
[Intel XE#5771]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5771
[Intel XE#5773]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5773
[Intel XE#5775]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5775
[Intel XE#5776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5776
[Intel XE#5777]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5777
[Intel XE#5778]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5778
[Intel XE#5780]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5780
[Intel XE#5781]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5781
[Intel XE#5907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5907
[Intel XE#6314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6314
[Intel XE#6360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6360
[Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#7237]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7237
[Intel XE#7238]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7238
[Intel XE#7239]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7239
[Intel XE#7240]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7240
[Intel XE#7241]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7241
[Intel XE#7242]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7242
[Intel XE#7243]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7243
[Intel XE#7245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7245
[Intel XE#7246]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7246
[Intel XE#7247]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7247
[Intel XE#7248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7248
[Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
[Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353
[Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
[Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
[Intel XE#7779]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7779
[Intel XE#780]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/780
[Intel XE#782]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/782
[Intel XE#783]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/783
[Intel XE#784]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/784
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#829]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/829
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8376
[Intel XE#8377]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8377
[Intel XE#8379]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8379
[Intel XE#8380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8380
[Intel XE#8381]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8381
[Intel XE#8434]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8434
[Intel XE#8741]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8741
[Intel XE#8742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8742
[Intel XE#8743]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8743
[Intel XE#8744]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8744
[Intel XE#8745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8745
[Intel XE#8746]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8746
[Intel XE#8747]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8747
[Intel XE#8748]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8748
[Intel XE#8749]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8749
[Intel XE#8755]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8755
[Intel XE#8756]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8756
[Intel XE#8757]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8757
[Intel XE#8758]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8758
[Intel XE#8759]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8759
[Intel XE#8761]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8761
[Intel XE#8762]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8762
[Intel XE#8773]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8773
[Intel XE#8777]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8777
[Intel XE#8783]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8783
[Intel XE#8784]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8784
[Intel XE#8791]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8791
[Intel XE#8792]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8792
[Intel XE#9069]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9069
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#947]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/947
[Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
[Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
[i915#1836]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1836
[i915#6077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6077
Build changes
-------------
* IGT: IGT_9128 -> IGT_9130
* Linux: xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b -> xe-pw-165879v9
IGT_9128: 9128
IGT_9130: 9130
xe-5889-c1341b7b7cec27ca50f287ec497e41a8cc88f22b: c1341b7b7cec27ca50f287ec497e41a8cc88f22b
xe-pw-165879v9: 165879v9
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v9/index.html
[-- Attachment #2: Type: text/html, Size: 103094 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH 00/15] Add new debug infrastructure for configfs
2026-10-05 19:06 [PATCH 00/15] Add new debug infrastructure for configfs Stuart Summers
` (17 preceding siblings ...)
2026-10-05 20:05 ` ✗ Xe.CI.BAT: failure " Patchwork
@ 2026-10-05 20:34 ` Summers, Stuart
18 siblings, 0 replies; 21+ messages in thread
From: Summers, Stuart @ 2026-10-05 20:34 UTC (permalink / raw)
To: Summers, Stuart
Cc: intel-xe@lists.freedesktop.org, Lin, Shuicheng, Vivi, Rodrigo,
Roper, Matthew D, Brost, Matthew, Sousa, Gustavo,
Ceraolo Spurio, Daniele, Nerlige Ramappa, Umesh
Looks like there's a bug in this rev, sorry about that. I'll respin
with a fix, please ignore this one.
Thanks,
Stuart
On Mon, 2026-10-05 at 19:06 +0000, Stuart Summers wrote:
> Add a new configfs debug group. The intent of this structure is
> to allow us to separate ABI facing configfs entries from those
> which are purely for debug purposes. And it allows us more
> flexibility
> in how we define those parameters used for debug.
>
> Add a new infrastructure to this debug configfs group that lets us
> easily define the parameters in a quick list. This is primarily
> useful for simple, single-type parameters such as enable/disable
> features or simple values passed. For more complex parameters,
> we will still need to define these separately.
>
> Pull the GuC target related changes from [1] to fit within
> this new structure and add a new definition for guc_log_level
> on top of the existing module parameter (to ensure we aren't
> impacting existing users of the module parameter).
>
> Note that the debug parameters here are all to be used "at your
> own risk". Without having in depth knowledge of how these impact
> the software and hardware, there could be unforeseen consequences
> of setting them. As such, they are all wrapped in a
> CONFIG_DRM_XE_DEBUG configfs option.
>
> In terms of the patches here, I'm sorting the existing parameters
> by name/type. I know we have a few other module parameters that
> could migrate here, but I didn't want to overload this series
> too much, so the focus for now is on the existing configfs entries
> and demonstrating the new structures with the GuC log level and
> target parameters.
>
> I used GitHub Copilot with Claude pretty extensively through the
> process here and attributed as such. Happy to answer any questions
> around this. Took a bit of time getting back to this series around
> other work, and in that time I was playing around with a few
> different
> models, hence some of the patches are showing multiple of them. I
> tried to attribute each as I was implementing the changes.
>
> I also decided to drop John Harrison from the NPK patch. It has
> been modified quite a bit from the original, but more importantly
> John is no longer with Intel and that email address isn't available
> any more. If it makes a difference here, John and I had both
> separately
> implemented this same change at different occasions for debug. The
> one I used to start that initial series was cherry-picked from his
> latest variant.
>
> v2:
> - In this second revision I did confirm that the guc_log_level
> module parameter is taking precedence over the configfs parameter
> and ensured the other parameters seem to be autogenerating and
> working as expected.
> - I tried to address all the review feedback from the first
> revision, [2].
> - I also did another pass on the sorting since there were a few
> discrepancies I noticed in the first revision. I kept Gustavo's
> R-B on that one, but would like an ack before merging at least
> to confirm the patch is sane.
> - And finally I moved the getter functions into the X-macro
> generators so we can autogenerate more of the similar functions
> between the different parameters in that debug param list.
> v3:
> - Address a couple of comments from Sashiko around GuC log level
> input checking and proper guard implementation.
> v4:
> - More review feedback from Sashiko addressed...
> v5:
> - Move the goto to a return (more Sashiko feedback) in the GuC
> log level setter before moving to the X-macro solution.
> v6:
> - Make the autogenerated X-macro function names more specific to
> avoid naming collisions (Sashiko again).
> v7:
> - Fix the couple of pre-existing bugs called out by Sashiko in
> the prior rev...
> - Make CONFIGFS_FS a required config for xe to avoid issues with
> stale values in the fallback getters.
> - Renamed disable_vram_page_offline to enable_vram_page_offline
> for a more consistent naming scheme (this was a new configfs
> entry added since the prior rev).
> - Converted survivability_mode to a u8 bitmap to allow for
> extendability in the future. Only bit 0 is defined, so the
> behavior
> should be the same.
> - Added an enable_media module parameter at the end of the series.
> gt_types_allowed is debug-only, so this gives production builds a
> supported way to leave the media GT alone. The modparam takes
> precedence over configfs.
> - Adjust the sorting to be alphabetical for the documentation
> specifically (Matt)
> v8:
> - Revert the CONFIGFS_FS require change from the previous rev (Matt)
> - Rebase on the latest which adds a new ulls configfs that is going
> into the production list.
> - Use Assisted-by: LLM as documented on the latest kernel.org site
> for
> AI attribution.
>
> Stuart Summers (15):
> drm/xe: Guard configfs attribute reads in getters
> drm/xe/configfs: Fix out-of-bounds read in parse_wa_bb_lines()
> drm/xe/configfs: Copy wa_bb out under the configfs lock
> drm/xe: Invert vram_page_offline configfs attribute
> drm/xe: Make survivability_mode configfs attribute a bitmap
> drm/xe: Sort xe_config_device fields
> drm/xe: Split out configfs data structures
> drm/xe: Add a new debug focused configfs group
> drm/xe: Move debug configfs entries to xe_configfs_debug.c
> drm/xe/guc: Add configfs support for guc_log_level
> drm/xe/guc: Add support for NPK as a GuC log target
> drm/xe: Add infrastructure for debug configfs parameters
> drm/xe: Migrate existing debug configfs entries to params
> infrastructure
> drm/xe: Taint kernel when debug configfs parameters are set
> drm/xe: Add enable_media module parameter
>
> drivers/gpu/drm/xe/Makefile | 3 +
> drivers/gpu/drm/xe/abi/guc_log_abi.h | 8 +
> drivers/gpu/drm/xe/xe_configfs.c | 1110 ++-------------
> --
> drivers/gpu/drm/xe/xe_configfs.h | 105 +-
> drivers/gpu/drm/xe/xe_configfs_debug.c | 899 +++++++++++++
> drivers/gpu/drm/xe/xe_configfs_debug.h | 51 +
> drivers/gpu/drm/xe/xe_configfs_debug_params.c | 158 +++
> drivers/gpu/drm/xe/xe_configfs_debug_params.h | 194 +++
> drivers/gpu/drm/xe/xe_configfs_types.h | 61 +
> drivers/gpu/drm/xe/xe_defaults.h | 6 +
> drivers/gpu/drm/xe/xe_drm_ras_types.h | 4 +-
> drivers/gpu/drm/xe/xe_guc.c | 14 +-
> drivers/gpu/drm/xe/xe_guc_ads.c | 1 +
> drivers/gpu/drm/xe/xe_guc_log.c | 3 +-
> drivers/gpu/drm/xe/xe_hw_engine.c | 1 +
> drivers/gpu/drm/xe/xe_lrc.c | 39 +-
> drivers/gpu/drm/xe/xe_module.c | 6 +
> drivers/gpu/drm/xe/xe_module.h | 1 +
> drivers/gpu/drm/xe/xe_pci.c | 20 +-
> drivers/gpu/drm/xe/xe_psmi.c | 3 +-
> drivers/gpu/drm/xe/xe_ras.c | 9 +-
> drivers/gpu/drm/xe/xe_rtp.c | 3 +-
> drivers/gpu/drm/xe/xe_survivability_mode.c | 7 +-
> drivers/gpu/drm/xe/xe_ttm_vram_mgr.c | 2 +-
> 24 files changed, 1646 insertions(+), 1062 deletions(-)
> create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.c
> create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.h
> create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug_params.c
> create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug_params.h
> create mode 100644 drivers/gpu/drm/xe/xe_configfs_types.h
>
^ permalink raw reply [flat|nested] 21+ messages in thread