[PATCH] drm/i915/psr: ASYNC_VIDEO_TIMING_NOT_SUPPORTED_IN_PR not valid for eDP

["Jouni Högander" <jouni.hogander@intel.com>]

EDP1.5 specification says:

"Although defined for the PR function in DP Standard, the
ASYNC_VIDEO_TIMING_NOT_SUPPORTED_IN_PR and DSC_DECODE_NOT_SUPPORTED_IN_PR
bits (DPCD 000B1h[3, 2], respectively) are DP-specific and are therefore
not used in eDP."

Stop using SYNC_VIDEO_TIMING_NOT_SUPPORTED_IN_PR on eDP.

Cc: Jake Steinman <j@metarealtyinc.ca>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 00d0146b26002..c2bb2c4071527 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1698,8 +1698,11 @@ static inline bool compute_link_off_after_as_sdp_when_pr_active(struct intel_con
 
 static inline bool compute_disable_as_sdp_when_pr_active(struct intel_connector *connector)
 {
-	return !(connector->dp.panel_replay_caps.dpcd[INTEL_PR_DPCD_INDEX(DP_PANEL_REPLAY_CAP_CAPABILITY)] &
-		 DP_PANEL_REPLAY_ASYNC_VIDEO_TIMING_NOT_SUPPORTED_IN_PR);
+	struct intel_dp *intel_dp = intel_attached_dp(connector);
+
+	return intel_dp_is_edp(intel_dp) ? false :
+		!(connector->dp.panel_replay_caps.dpcd[INTEL_PR_DPCD_INDEX(DP_PANEL_REPLAY_CAP_CAPABILITY)] &
+		  DP_PANEL_REPLAY_ASYNC_VIDEO_TIMING_NOT_SUPPORTED_IN_PR);
 }
 
 static bool _panel_replay_compute_config(struct intel_crtc_state *crtc_state,
-- 
2.43.0