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From: Mika Kahola <mika.kahola@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: jouni.hogander@intel.com, Mika Kahola <mika.kahola@intel.com>
Subject: [PATCH v3 1/9] drm/i915/psr: Track all joined pipes for frontbuffer tracking
Date: Fri, 23 Oct 2026 10:00:44 +0000	[thread overview]
Message-ID: <20261023100052.683192-2-mika.kahola@intel.com> (raw)
In-Reply-To: <20261023100052.683192-1-mika.kahola@intel.com>

psr.pipe is the joiner primary only, so frontbuffer bits coming from a
secondary pipe get masked out and the update goes unnoticed. Add
psr.pipe_mask covering every joined pipe and use that instead.

No functional change, joiner is still rejected in compute_config().

v2: Split the active_non_psr_pipes change into its own patch (Jouni)

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 .../drm/i915/display/intel_display_types.h    |  1 +
 drivers/gpu/drm/i915/display/intel_psr.c      | 25 ++++++++++++++-----
 2 files changed, 20 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 8f9fb2603638a..4756e50a3b707 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1802,6 +1802,7 @@ struct intel_psr {
 	bool enabled;
 	int pause_counter;
 	enum pipe pipe;
+	u8 pipe_mask;
 	enum transcoder transcoder;
 	bool active;
 	struct work_struct work;
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 4ae47d33096a6..27ccccdc72315 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -36,6 +36,7 @@
 #include "intel_cursor_regs.h"
 #include "intel_ddi.h"
 #include "intel_de.h"
+#include "intel_display.h"
 #include "intel_display_irq.h"
 #include "intel_display_regs.h"
 #include "intel_display_rpm.h"
@@ -1802,6 +1803,19 @@ static void psr2_dc3co_disable_work(struct work_struct *work)
 	mutex_unlock(&intel_dp->psr.lock);
 }
 
+/* Frontbuffer bits for every pipe driving this PSR/Panel Replay instance. */
+static unsigned int psr_frontbuffer_mask(struct intel_dp *intel_dp)
+{
+	struct intel_display *display = to_intel_display(intel_dp);
+	unsigned int mask = 0;
+	enum pipe pipe;
+
+	for_each_pipe_masked(display, pipe, intel_dp->psr.pipe_mask)
+		mask |= INTEL_FRONTBUFFER_ALL_MASK(pipe);
+
+	return mask;
+}
+
 static void
 psr2_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits)
 {
@@ -1817,8 +1831,7 @@ psr2_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits
 	 * At every frontbuffer flush flip event modified delay of delayed work,
 	 * when delayed work schedules that means display has been idle.
 	 */
-	if (!(frontbuffer_bits &
-	    INTEL_FRONTBUFFER_ALL_MASK(intel_dp->psr.pipe)))
+	if (!(frontbuffer_bits & psr_frontbuffer_mask(intel_dp)))
 		return;
 
 	mod_delayed_work(display->wq.unordered, &intel_dp->psr.dc3co_work,
@@ -2179,6 +2192,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
 	intel_dp->psr.panel_replay_enabled = crtc_state->has_panel_replay;
 	intel_dp->psr.busy_frontbuffer_bits = 0;
 	intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
+	intel_dp->psr.pipe_mask = intel_crtc_joined_pipe_mask(crtc_state);
 	intel_dp->psr.transcoder = crtc_state->cpu_transcoder;
 	/* DC5/DC6 requires at least 6 idle frames */
 	val = usecs_to_jiffies(intel_get_frame_time_us(crtc_state) * 6);
@@ -2398,6 +2412,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 	intel_dp->psr.psr2_sel_fetch_cff_enabled = false;
 	intel_dp->psr.active_non_psr_pipes = 0;
 	intel_dp->psr.pkg_c_latency_used = 0;
+	intel_dp->psr.pipe_mask = 0;
 	cancel_delayed_work(&intel_dp->psr.dc3co_work);
 	intel_dp->psr.dc3co_allowed = false;
 }
@@ -3617,8 +3632,7 @@ void intel_psr_invalidate(struct intel_display *display,
 			continue;
 		}
 
-		pipe_frontbuffer_bits &=
-			INTEL_FRONTBUFFER_ALL_MASK(intel_dp->psr.pipe);
+		pipe_frontbuffer_bits &= psr_frontbuffer_mask(intel_dp);
 		intel_dp->psr.busy_frontbuffer_bits |= pipe_frontbuffer_bits;
 
 		if (pipe_frontbuffer_bits)
@@ -3698,8 +3712,7 @@ void intel_psr_flush(struct intel_display *display,
 			continue;
 		}
 
-		pipe_frontbuffer_bits &=
-			INTEL_FRONTBUFFER_ALL_MASK(intel_dp->psr.pipe);
+		pipe_frontbuffer_bits &= psr_frontbuffer_mask(intel_dp);
 		intel_dp->psr.busy_frontbuffer_bits &= ~pipe_frontbuffer_bits;
 
 		/*
-- 
2.43.0


  reply	other threads:[~2026-10-23 10:01 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-23 10:00 [PATCH v3 0/9] drm/i915/psr: PSR2 and Panel Replay with the joiner Mika Kahola
2026-10-23 10:00 ` Mika Kahola [this message]
2026-10-23 10:33   ` [PATCH v3 1/9] drm/i915/psr: Track all joined pipes for frontbuffer tracking Hogander, Jouni
2026-10-23 10:00 ` [PATCH v3 2/9] drm/i915/psr: Exclude the joiner secondary from active_non_psr_pipes Mika Kahola
2026-10-23 11:21   ` Hogander, Jouni
2026-10-23 10:00 ` [PATCH v3 3/9] drm/i915/psr: Take the selective fetch area from pipe_src Mika Kahola
2026-10-23 12:09   ` Hogander, Jouni
2026-10-23 10:00 ` [PATCH v3 4/9] drm/i915/psr: Split the selective fetch calculation into helpers Mika Kahola
2026-10-23 12:14   ` Hogander, Jouni
2026-10-23 10:00 ` [PATCH v3 5/9] drm/i915/psr: Derive the alignment loop condition from the SU area Mika Kahola
2026-10-23 12:29   ` Hogander, Jouni
2026-10-23 10:00 ` [PATCH v3 6/9] drm/i915/psr: Merge the selective fetch area across joined pipes Mika Kahola
2026-10-23 12:43   ` Hogander, Jouni
2026-10-23 10:00 ` [PATCH v3 7/9] drm/i915/psr: Resolve the PSR encoders through the joiner primary Mika Kahola
2026-10-26  6:18   ` Hogander, Jouni
2026-10-23 10:00 ` [PATCH v3 8/9] drm/i915/psr: Allow Panel Replay and PSR2 with joiner Mika Kahola
2026-10-26  6:56   ` Hogander, Jouni
2026-10-23 10:00 ` [PATCH v3 9/9] drm/i915/display: Allow forcing the joiner on eDP Mika Kahola
2026-10-23 10:11 ` ✓ CI.KUnit: success for drm/i915/psr: PSR2 and Panel Replay with the joiner Patchwork
2026-10-23 10:55 ` ✓ Xe.CI.BAT: " Patchwork
2026-10-23 14:45 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-10-26  8:06 ` [PATCH v3 0/9] " Kahola, Mika

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