Re: [PATCH v2 09/13] drm/i915/dsb: Add pipedmc dc balance enable/disable

["Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>]

On 4/21/2025 9:18 PM, Mitul Golani wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add function to control DC balance enable/disable bit via DSB.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


> ---
>   drivers/gpu/drm/i915/display/intel_dmc.c      | 24 +++++++++++++++++++
>   drivers/gpu/drm/i915/display/intel_dmc.h      |  5 ++++
>   drivers/gpu/drm/i915/display/intel_dmc_regs.h |  9 +++++++
>   3 files changed, 38 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
> index ff2b97a752b1..e32599a4f68f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> @@ -30,6 +30,7 @@
>   #include "intel_de.h"
>   #include "intel_display_rpm.h"
>   #include "intel_display_power_well.h"
> +#include "intel_display_types.h"
>   #include "intel_dmc.h"
>   #include "intel_dmc_regs.h"
>   #include "intel_step.h"
> @@ -1355,3 +1356,26 @@ void intel_dmc_debugfs_register(struct intel_display *display)
>   	debugfs_create_file("i915_dmc_info", 0444, minor->debugfs_root,
>   			    display, &intel_dmc_debugfs_status_fops);
>   }
> +
> +void intel_pipedmc_dcb_enable(struct intel_dsb *dsb, struct intel_crtc *crtc)
> +{
> +	struct intel_display *display = to_intel_display(crtc);
> +	struct intel_crtc_state *crtc_state =
> +		to_intel_crtc_state(crtc->base.state);
> +	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +
> +	intel_de_write_dsb(display, dsb,
> +			   PIPEDMC_DCB_CTL(display, cpu_transcoder),
> +			   PIPEDMC_ADAPTIVE_DCB_ENABLE);
> +}
> +
> +void intel_pipedmc_dcb_disable(struct intel_dsb *dsb, struct intel_crtc *crtc)
> +{
> +	struct intel_display *display = to_intel_display(crtc);
> +	struct intel_crtc_state *crtc_state =
> +		to_intel_crtc_state(crtc->base.state);
> +	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +
> +	intel_de_write_dsb(display, dsb,
> +			   PIPEDMC_DCB_CTL(display, cpu_transcoder), 0);
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h
> index c78426eb4cd5..74dcd142f5b1 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.h
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.h
> @@ -10,8 +10,10 @@
>   
>   enum pipe;
>   struct drm_printer;
> +struct intel_crtc;
>   struct intel_display;
>   struct intel_dmc_snapshot;
> +struct intel_dsb;
>   
>   void intel_dmc_init(struct intel_display *display);
>   void intel_dmc_load_program(struct intel_display *display);
> @@ -30,4 +32,7 @@ void intel_dmc_update_dc6_allowed_count(struct intel_display *display, bool star
>   
>   void assert_dmc_loaded(struct intel_display *display);
>   
> +void intel_pipedmc_dcb_enable(struct intel_dsb *dsb, struct intel_crtc *crtc);
> +void intel_pipedmc_dcb_disable(struct intel_dsb *dsb, struct intel_crtc *crtc);
> +
>   #endif /* __INTEL_DMC_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc_regs.h b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
> index 39e4f70005ab..6788afb816ea 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
> @@ -174,4 +174,13 @@
>   #define _PIPEDMC_DCB_VMAX_F			0x555A8
>   #define PIPEDMC_DCB_VMAX(dev_priv, trans)	_MMIO_TRANS2(dev_priv, trans, _PIPEDMC_DCB_VMAX_A)
>   
> +#define _PIPEDMC_DCB_CTL_A			0x5F1A0
> +#define _PIPEDMC_DCB_CTL_B			0x5F5A0
> +#define _PIPEDMC_DCB_CTL_C			0x5F9A0
> +#define _PIPEDMC_DCB_CTL_D			0x5FDA0
> +#define _PIPEDMC_DCB_CTL_E			0x551A0
> +#define _PIPEDMC_DCB_CTL_F			0x555A0
> +#define PIPEDMC_DCB_CTL(dev_priv, trans)	_MMIO_TRANS2(dev_priv, trans, _PIPEDMC_DCB_CTL_A)
> +#define PIPEDMC_ADAPTIVE_DCB_ENABLE		REG_BIT(31)
> +
>   #endif /* __INTEL_DMC_REGS_H__ */