[PATCH] drm/xe: Fix operator precedence bug in emit_flush_invalidate

[PATCH] drm/xe: Fix operator precedence bug in emit_flush_invalidate

[lirongqing]

From: Li RongQing <lirongqing@baidu.com>

The expression:
    MI_FLUSH_IMM_DW | (flush_flags & MI_INVALIDATE_TLB) ?: 0;

is parsed as:
    (MI_FLUSH_DW | MI_FLUSH_DW_OP_STOREDW | MI_FLUSH_IMM_DW |
     (flush_flags & MI_INVALIDATE_TLB)) ?: 0;

Since the combined constant flags are always non-zero, the GNU extension
'?: 0' acts as a no-op and does not change the value. Remove this redundant
and confusing logic.

Signed-off-by: Li RongQing <lirongqing@baidu.com>
---
 drivers/gpu/drm/xe/xe_ring_ops.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index cfeb4fc..ee468d3 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -144,7 +144,7 @@ static int emit_bb_start(u64 batch_addr, u32 ppgtt_flag, u32 *dw, int i)
 static int emit_flush_invalidate(u32 addr, u32 val, u32 flush_flags, u32 *dw, int i)
 {
 	dw[i++] = MI_FLUSH_DW | MI_FLUSH_DW_OP_STOREDW |
-		  MI_FLUSH_IMM_DW | (flush_flags & MI_INVALIDATE_TLB) ?: 0;
+		  MI_FLUSH_IMM_DW | (flush_flags & MI_INVALIDATE_TLB);
 
 	dw[i++] = addr | MI_FLUSH_DW_USE_GTT;
 	dw[i++] = 0;
-- 
2.9.4

Re: [PATCH] drm/xe: Fix operator precedence bug in emit_flush_invalidate

[Thomas Hellström]

On Wed, 2026-05-13 at 07:37 -0400, lirongqing wrote:
> From: Li RongQing <lirongqing@baidu.com>
> 
> The expression:
>     MI_FLUSH_IMM_DW | (flush_flags & MI_INVALIDATE_TLB) ?: 0;
> 
> is parsed as:
>     (MI_FLUSH_DW | MI_FLUSH_DW_OP_STOREDW | MI_FLUSH_IMM_DW |
>      (flush_flags & MI_INVALIDATE_TLB)) ?: 0;
> 
> Since the combined constant flags are always non-zero, the GNU
> extension
> '?: 0' acts as a no-op and does not change the value. Remove this
> redundant
> and confusing logic.
> 
> Signed-off-by: Li RongQing <lirongqing@baidu.com>

Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>

Will push to drm-xe-next once CI is clean.


> ---
>  drivers/gpu/drm/xe/xe_ring_ops.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c
> b/drivers/gpu/drm/xe/xe_ring_ops.c
> index cfeb4fc..ee468d3 100644
> --- a/drivers/gpu/drm/xe/xe_ring_ops.c
> +++ b/drivers/gpu/drm/xe/xe_ring_ops.c
> @@ -144,7 +144,7 @@ static int emit_bb_start(u64 batch_addr, u32
> ppgtt_flag, u32 *dw, int i)
>  static int emit_flush_invalidate(u32 addr, u32 val, u32 flush_flags,
> u32 *dw, int i)
>  {
>  	dw[i++] = MI_FLUSH_DW | MI_FLUSH_DW_OP_STOREDW |
> -		  MI_FLUSH_IMM_DW | (flush_flags &
> MI_INVALIDATE_TLB) ?: 0;
> +		  MI_FLUSH_IMM_DW | (flush_flags &
> MI_INVALIDATE_TLB);
>  
>  	dw[i++] = addr | MI_FLUSH_DW_USE_GTT;
>  	dw[i++] = 0;

✗ LGCI.VerificationFailed: failure for drm/xe: Fix operator precedence bug in emit_flush_invalidate

[Patchwork]

== Series Details ==

Series: drm/xe: Fix operator precedence bug in emit_flush_invalidate
URL   : https://patchwork.freedesktop.org/series/166516/
State : failure

== Summary ==

Address 'lirongqing@baidu.com' is not on the allowlist, which prevents CI from being triggered for this patch.
If you want Intel GFX CI to accept this address, please contact the script maintainers at i915-ci-infra@lists.freedesktop.org.
Exception occurred during validation, bailing out!