From: "Mallesh, Koujalagi" <mallesh.koujalagi@intel.com>
To: Riana Tauro <riana.tauro@intel.com>, <intel-xe@lists.freedesktop.org>
Cc: <anshuman.gupta@intel.com>, <rodrigo.vivi@intel.com>,
<aravind.iddamsetty@linux.intel.com>, <badal.nilawar@intel.com>,
<raag.jadav@intel.com>, <ravi.kishore.koppuravuri@intel.com>,
<tejas.upadhyay@intel.com>
Subject: Re: [PATCH v2 2/9] drm/xe/hw_error: Initialize hw_error_work per tile
Date: Tue, 27 Oct 2026 20:21:37 +0530 [thread overview]
Message-ID: <276d15ca-bf1c-4510-8202-4f2f8ae46f65@intel.com> (raw)
In-Reply-To: <20261026060459.771448-13-riana.tauro@intel.com>
On 26-10-2026 11:35 am, Riana Tauro wrote:
> From: Raag Jadav <raag.jadav@intel.com>
>
> Since hw_error_work is now being reused generically, initialize it per tile
> so that we don't hit uninitialized work for non-root tile. While at it,
> disable hw_error_work on fini to prevent UAF during unwind.
>
> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> Reviewed-by: Riana Tauro <riana.tauro@intel.com>
> ---
> drivers/gpu/drm/xe/xe_hw_error.c | 24 ++++++++++++++++++++++--
> drivers/gpu/drm/xe/xe_hw_error.h | 1 +
> 2 files changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
> index 41ddd997478b..f7799c3c08aa 100644
> --- a/drivers/gpu/drm/xe/xe_hw_error.c
> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
> @@ -537,6 +537,23 @@ static void process_hw_errors(struct xe_device *xe)
> }
> }
>
> +/**
> + * xe_hw_error_work_disable - Disable hw error work
> + * @arg: xe device instance
> + *
> + * This function disables the delayed work for hardware error handling
> + * for all tiles.
> + */
> +void xe_hw_error_work_disable(void *arg)
> +{
> + struct xe_device *xe = arg;
> + struct xe_tile *tile;
> + u8 id;
> +
> + for_each_tile(tile, xe, id)
> + disable_delayed_work_sync(&tile->hw_error_work);
> +}
> +
hmm, we are disabling hw_error_work.
IMO, if we see non-fatal error fires on the IRQ path (since it's
asynchronous), since the work is still disabled,
it would not be processed further.
Thanks,
-/Mallesh
> /**
> * xe_hw_error_init - Initialize hw errors
> * @xe: xe device instance
> @@ -546,12 +563,15 @@ static void process_hw_errors(struct xe_device *xe)
> */
> void xe_hw_error_init(struct xe_device *xe)
> {
> - struct xe_tile *tile = xe_device_get_root_tile(xe);
> + struct xe_tile *tile;
> + u8 id;
>
> if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
> return;
>
> - INIT_DELAYED_WORK(&tile->hw_error_work, hw_error_work);
> + for_each_tile(tile, xe, id)
> + INIT_DELAYED_WORK(&tile->hw_error_work, hw_error_work);
>
> process_hw_errors(xe);
> + devm_add_action_or_reset(xe->drm.dev, xe_hw_error_work_disable, xe);
> }
> diff --git a/drivers/gpu/drm/xe/xe_hw_error.h b/drivers/gpu/drm/xe/xe_hw_error.h
> index 5e3a11424108..c2c0bfa6d9f9 100644
> --- a/drivers/gpu/drm/xe/xe_hw_error.h
> +++ b/drivers/gpu/drm/xe/xe_hw_error.h
> @@ -12,4 +12,5 @@ struct xe_device;
>
> void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl);
> void xe_hw_error_init(struct xe_device *xe);
> +void xe_hw_error_work_disable(void *arg);
> #endif
next prev parent reply other threads:[~2026-10-27 14:52 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-26 6:04 [PATCH v2 0/9] Handle non-fatal errors routed via IRQ Riana Tauro
2026-10-26 6:05 ` [PATCH v2 1/9] drm/xe/hw_error: Reuse CSC worker for generic error handling Riana Tauro
2026-10-27 13:01 ` Mallesh, Koujalagi
2026-10-29 8:07 ` Tauro, Riana
2026-10-26 6:05 ` [PATCH v2 2/9] drm/xe/hw_error: Initialize hw_error_work per tile Riana Tauro
2026-10-26 9:37 ` sashiko-bot
2026-10-27 14:51 ` Mallesh, Koujalagi [this message]
2026-10-29 8:11 ` Tauro, Riana
2026-10-28 16:07 ` Andi Shyti
2026-10-26 6:05 ` [PATCH v2 3/9] drm/xe: Add wa_14028434957 to Graphics Version 35.11 Riana Tauro
2026-10-28 6:16 ` Mallesh, Koujalagi
2026-10-29 8:12 ` Tauro, Riana
2026-10-28 14:19 ` Gustavo Sousa
2026-10-29 8:32 ` Tauro, Riana
2026-10-26 6:05 ` [PATCH v2 4/9] drm/xe/xe_hw_error: Handle non-fatal errors routed via direct IRQ Riana Tauro
2026-10-26 10:09 ` sashiko-bot
2026-10-26 10:49 ` Upadhyay, Tejas
2026-10-26 14:08 ` Tauro, Riana
2026-10-29 6:36 ` Mallesh, Koujalagi
2026-10-29 8:17 ` Tauro, Riana
2026-10-28 16:15 ` Andi Shyti
2026-10-29 8:23 ` Tauro, Riana
2026-10-28 16:17 ` Andi Shyti
2026-10-29 8:20 ` Tauro, Riana
2026-10-26 6:05 ` [PATCH v2 5/9] drm/xe/ras: Treat non-fatal PCIe errors as recovered Riana Tauro
2026-10-28 9:24 ` Mallesh, Koujalagi
2026-10-29 8:27 ` Tauro, Riana
2026-10-26 6:05 ` [PATCH v2 6/9] drm/xe/pci: Add upstream switch port lookup helper Riana Tauro
2026-10-28 9:45 ` Mallesh, Koujalagi
2026-10-28 16:19 ` Andi Shyti
2026-10-29 8:28 ` Tauro, Riana
2026-10-26 6:05 ` [PATCH v2 7/9] drm/xe/xe_ras: Disable hw error worker when AER handling is in progress Riana Tauro
2026-10-26 10:32 ` sashiko-bot
2026-10-26 6:05 ` [PATCH v2 8/9] drm/xe/xe_ras: Trigger SBR for all device errors Riana Tauro
2026-10-28 16:25 ` Andi Shyti
2026-10-29 5:18 ` Mallesh, Koujalagi
2026-10-26 6:05 ` [PATCH v2 9/9] drm/xe/ras: Skip double-bit ECC page offlining on AER path Riana Tauro
2026-10-28 16:26 ` Andi Shyti
2026-10-29 5:25 ` Mallesh, Koujalagi
2026-10-26 6:30 ` ✓ CI.KUnit: success for Handle non-fatal errors routed via IRQ (rev2) Patchwork
2026-10-26 7:05 ` ✓ Xe.CI.BAT: " Patchwork
2026-10-26 8:55 ` ✗ Xe.CI.FULL: failure " Patchwork
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