From: sashiko-bot@kernel.org
To: "Riana Tauro" <riana.tauro@intel.com>, intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v2 7/9] drm/xe/xe_ras: Disable hw error worker when AER handling is in progress
Date: Mon, 26 Oct 2026 10:32:35 +0000 [thread overview]
Message-ID: <sashiko-outbox-184957@kernel.org> (raw)
In-Reply-To: <20261026060459.771448-18-riana.tauro@intel.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] drm/xe: uninitialized hw_error_work disabled on VF in xe_pci_error_detected()
--
commit b14238c72b86ed2185123242102a8af0419bfeb1
Author: Riana Tauro <riana.tauro@intel.com>
drm/xe/xe_ras: Disable hw error worker when AER handling is in progress
When an uncorrectable internal AER error occurs on a device with workaround
14028434957, this commit marks the RAS state as using the AER path and
flushes and disables the hardware error worker in xe_pci_error_detected().
> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> index 9bf0da3a3d152..b27f8a0f1b170 100644
> --- a/drivers/gpu/drm/xe/xe_pci_error.c
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
[ ... ]
> @@ -67,6 +91,15 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
> if (xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe))
> return PCI_ERS_RESULT_DISCONNECT;
>
> + /*
> + * If non-fatal error processing is in progress when uncorrectable internal error occurs,
> + * flush and disable the worker to prevent further processing, as a reset is imminent.
> + */
> + if (XE_DEVICE_WA(xe, 14028434957) && is_aer_internal_error(pdev)) {
> + xe_ras_set_aer_path(xe, true);
> + xe_hw_error_work_disable(xe);
> + }
[Severity: High]
Can this call xe_hw_error_work_disable() on an uninitialized tile->hw_error_work
when xe_pci_error_detected() runs on an SR-IOV VF?
On Crescent Island, SR-IOV is supported and workaround 14028434957 is
populated via xe_wa_process_device_oob() in xe_device_probe_early(), so
XE_DEVICE_WA(xe, 14028434957) evaluates to true on both PF and VF instances.
However, xe_hw_error_init() skips initializing tile->hw_error_work on VFs:
drivers/gpu/drm/xe/xe_hw_error.c:xe_hw_error_init()
if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
return;
for_each_tile(tile, xe, id)
INIT_DELAYED_WORK(&tile->hw_error_work, hw_error_work);
When an uncorrectable internal error occurs on the upstream switch port,
pcie_do_recovery() walks subordinate devices under the bridge and invokes
xe_pci_error_detected() for bound VFs as well as the PF. Because
pci_upstream_bridge() resolves pci_physfn(dev) for VFs,
is_aer_internal_error() returns true on the VF too, and
xe_hw_error_work_disable() then calls disable_delayed_work_sync() on
uninitialized delayed_work structs:
drivers/gpu/drm/xe/xe_hw_error.c:xe_hw_error_work_disable()
for_each_tile(tile, xe, id)
disable_delayed_work_sync(&tile->hw_error_work);
Should this path check !IS_SRIOV_VF(xe) (or xe->info.has_sysctrl) before
disabling the worker?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261026060459.771448-11-riana.tauro@intel.com?part=7
next prev parent reply other threads:[~2026-10-26 10:32 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-26 6:04 [PATCH v2 0/9] Handle non-fatal errors routed via IRQ Riana Tauro
2026-10-26 6:05 ` [PATCH v2 1/9] drm/xe/hw_error: Reuse CSC worker for generic error handling Riana Tauro
2026-10-27 13:01 ` Mallesh, Koujalagi
2026-10-29 8:07 ` Tauro, Riana
2026-10-26 6:05 ` [PATCH v2 2/9] drm/xe/hw_error: Initialize hw_error_work per tile Riana Tauro
2026-10-26 9:37 ` sashiko-bot
2026-10-27 14:51 ` Mallesh, Koujalagi
2026-10-29 8:11 ` Tauro, Riana
2026-10-28 16:07 ` Andi Shyti
2026-10-26 6:05 ` [PATCH v2 3/9] drm/xe: Add wa_14028434957 to Graphics Version 35.11 Riana Tauro
2026-10-28 6:16 ` Mallesh, Koujalagi
2026-10-29 8:12 ` Tauro, Riana
2026-10-28 14:19 ` Gustavo Sousa
2026-10-29 8:32 ` Tauro, Riana
2026-10-26 6:05 ` [PATCH v2 4/9] drm/xe/xe_hw_error: Handle non-fatal errors routed via direct IRQ Riana Tauro
2026-10-26 10:09 ` sashiko-bot
2026-10-26 10:49 ` Upadhyay, Tejas
2026-10-26 14:08 ` Tauro, Riana
2026-10-29 6:36 ` Mallesh, Koujalagi
2026-10-29 8:17 ` Tauro, Riana
2026-10-28 16:15 ` Andi Shyti
2026-10-29 8:23 ` Tauro, Riana
2026-10-28 16:17 ` Andi Shyti
2026-10-29 8:20 ` Tauro, Riana
2026-10-26 6:05 ` [PATCH v2 5/9] drm/xe/ras: Treat non-fatal PCIe errors as recovered Riana Tauro
2026-10-28 9:24 ` Mallesh, Koujalagi
2026-10-29 8:27 ` Tauro, Riana
2026-10-26 6:05 ` [PATCH v2 6/9] drm/xe/pci: Add upstream switch port lookup helper Riana Tauro
2026-10-28 9:45 ` Mallesh, Koujalagi
2026-10-28 16:19 ` Andi Shyti
2026-10-29 8:28 ` Tauro, Riana
2026-10-26 6:05 ` [PATCH v2 7/9] drm/xe/xe_ras: Disable hw error worker when AER handling is in progress Riana Tauro
2026-10-26 10:32 ` sashiko-bot [this message]
2026-10-26 6:05 ` [PATCH v2 8/9] drm/xe/xe_ras: Trigger SBR for all device errors Riana Tauro
2026-10-28 16:25 ` Andi Shyti
2026-10-29 5:18 ` Mallesh, Koujalagi
2026-10-26 6:05 ` [PATCH v2 9/9] drm/xe/ras: Skip double-bit ECC page offlining on AER path Riana Tauro
2026-10-28 16:26 ` Andi Shyti
2026-10-29 5:25 ` Mallesh, Koujalagi
2026-10-26 6:30 ` ✓ CI.KUnit: success for Handle non-fatal errors routed via IRQ (rev2) Patchwork
2026-10-26 7:05 ` ✓ Xe.CI.BAT: " Patchwork
2026-10-26 8:55 ` ✗ Xe.CI.FULL: failure " Patchwork
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