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From: Riana Tauro <riana.tauro@intel.com>
To: Raag Jadav <raag.jadav@intel.com>
Cc: <intel-xe@lists.freedesktop.org>,
	<dri-devel@lists.freedesktop.org>,
	<aravind.iddamsetty@linux.intel.com>, <anshuman.gupta@intel.com>,
	<rodrigo.vivi@intel.com>, <joonas.lahtinen@linux.intel.com>,
	<simona.vetter@ffwll.ch>, <airlied@gmail.com>,
	<pratik.bari@intel.com>, <joshua.santosh.ranjan@intel.com>,
	<ashwin.kumar.kulkarni@intel.com>, <shubham.kumar@intel.com>,
	<ravi.kishore.koppuravuri@intel.com>
Subject: Re: [PATCH v4 2/4] drm/xe/xe_drm_ras: Add support for drm ras
Date: Wed, 28 Jan 2026 13:04:15 +0530	[thread overview]
Message-ID: <2a41c135-5e30-496f-918d-7233051d7a4f@intel.com> (raw)
In-Reply-To: <aXm3kI6tAJkrO30F@black.igk.intel.com>



On 1/28/2026 12:45 PM, Raag Jadav wrote:
> On Wed, Jan 28, 2026 at 12:21:18PM +0530, Riana Tauro wrote:
>> On 1/20/2026 10:31 PM, Raag Jadav wrote:
>>> On Mon, Jan 19, 2026 at 09:30:24AM +0530, Riana Tauro wrote:
>>>> Allocate correctable, uncorrectable nodes for every xe device
>>>> Each node contains error classes, counters and respective
>>>> query counter functions.
>>>
>>> ...
>>>
>>>> +static int hw_query_error_counter(struct xe_drm_ras_counter *info,
>>>> +				  u32 error_id, const char **name, u32 *val)
>>>> +{
>>>> +	if (error_id < DRM_XE_RAS_ERROR_CLASS_GT || error_id >= DRM_XE_RAS_ERROR_CLASS_MAX)
>>>
>>> This looks like it can be in_range().
>>
>> in_range has start+len. Should again use count here.
>> This seems simpler
> 
> I just had another look at this and wondering if we really need lower
> bound check? error_id is already unsigned right?


added this because error_id starts from 1 and not 0.

the entire condition can be removed. This is already being checked in 
the first patch

+	if (error_id < node->error_counter_range.first ||
+	    error_id > node->error_counter_range.last)
+		return -EINVAL;

Will remove this in next rev

Thanks
Riana

> 
> Raag
> 
>>>> +		return -EINVAL;
>>>> +
>>>> +	if (!info[error_id].name)
>>>> +		return -ENOENT;
>>>> +
>>>> +	*name = info[error_id].name;
>>>> +	*val = atomic64_read(&info[error_id].counter);
>>>> +
>>>> +	return 0;
>>>> +}


  reply	other threads:[~2026-01-28  7:34 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-19  4:00 [PATCH v4 0/4] Introduce DRM_RAS using generic netlink for RAS Riana Tauro
2026-01-19  3:36 ` ✗ CI.checkpatch: warning for Introduce DRM_RAS using generic netlink for RAS (rev4) Patchwork
2026-01-19  3:37 ` ✓ CI.KUnit: success " Patchwork
2026-01-19  3:52 ` ✗ CI.checksparse: warning " Patchwork
2026-01-19  4:00 ` [PATCH v4 1/4] drm/ras: Introduce the DRM RAS infrastructure over generic netlink Riana Tauro
2026-01-22 21:51   ` Zack McKevitt
2026-02-02  6:20     ` Riana Tauro
2026-01-19  4:00 ` [PATCH v4 2/4] drm/xe/xe_drm_ras: Add support for drm ras Riana Tauro
2026-01-20 17:01   ` Raag Jadav
2026-01-28  6:51     ` Riana Tauro
2026-01-28  7:15       ` Raag Jadav
2026-01-28  7:34         ` Riana Tauro [this message]
2026-01-19  4:00 ` [PATCH v4 3/4] drm/xe/xe_hw_error: Add support for GT hardware errors Riana Tauro
2026-01-19  9:06   ` kernel test robot
2026-01-21  7:09   ` Raag Jadav
2026-01-27  8:29     ` Riana Tauro
2026-01-27 10:12       ` Raag Jadav
2026-01-19  4:00 ` [PATCH v4 4/4] drm/xe/xe_hw_error: Add support for PVC SOC errors Riana Tauro
2026-01-23 10:33   ` Raag Jadav
2026-01-27  9:43     ` Riana Tauro
2026-01-19  4:11 ` ✗ Xe.CI.BAT: failure for Introduce DRM_RAS using generic netlink for RAS (rev4) Patchwork
2026-01-19  5:33 ` ✗ Xe.CI.Full: " Patchwork

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