From: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: <intel-gfx@lists.freedesktop.org>,
<intel-xe@lists.freedesktop.org>, <jouni.hogander@intel.com>,
Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Subject: Re: [PATCH 1/5] drm/i915/dp: Fix readback for target_rr in Adaptive Sync SDP
Date: Thu, 30 Oct 2025 14:58:21 +0530 [thread overview]
Message-ID: <317f4ccb-c1a1-4b17-a4a0-1561e23b5dc1@intel.com> (raw)
In-Reply-To: <aQMfQK2OiYixqv9D@intel.com>
On 10/30/2025 1:48 PM, Ville Syrjälä wrote:
> On Thu, Oct 30, 2025 at 10:47:51AM +0530, Ankit Nautiyal wrote:
>> Correct the bit-shift logic to properly readback the 10 bit target_rr from
>> DB3 and DB4.
>>
>> Fixes: 12ea89291603 ("drm/i915/dp: Add Read/Write support for Adaptive Sync SDP")
>> Cc: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
>> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 475518b4048b..c013eb2e18a1 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -4996,7 +4996,7 @@ int intel_dp_as_sdp_unpack(struct drm_dp_as_sdp *as_sdp,
>> as_sdp->length = sdp->sdp_header.HB3 & DP_ADAPTIVE_SYNC_SDP_LENGTH;
>> as_sdp->mode = sdp->db[0] & DP_ADAPTIVE_SYNC_SDP_OPERATION_MODE;
>> as_sdp->vtotal = (sdp->db[2] << 8) | sdp->db[1];
>> - as_sdp->target_rr = (u64)sdp->db[3] | ((u64)sdp->db[4] & 0x3);
>> + as_sdp->target_rr = (u64)sdp->db[3] | ((u64)(sdp->db[4] & 0x3) << 8);
> The (u64) casts are completely pointless. And I would try to write this
> in a styple that is more consistent with the vtotal assignment right
> above it. Eg.: target_rr = ((db[4] & 0x3) << 8) | db[3];
Makes sense. Will change this as suggested.
Regards,
Ankit
>
>> as_sdp->target_rr_divider = sdp->db[4] & 0x20 ? true : false;
>>
>> return 0;
>> --
>> 2.45.2
next prev parent reply other threads:[~2025-10-30 9:28 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-30 5:17 [PATCH 0/5] Fix Adaptive Sync SDP for Panel Replay Ankit Nautiyal
2025-10-30 5:17 ` [PATCH 1/5] drm/i915/dp: Fix readback for target_rr in Adaptive Sync SDP Ankit Nautiyal
2025-10-30 8:18 ` Ville Syrjälä
2025-10-30 9:28 ` Nautiyal, Ankit K [this message]
2025-10-30 5:17 ` [PATCH 2/5] drm/i915/dp: Allow AS_SDP only if panel replay + auxless alpm is supported Ankit Nautiyal
2025-10-30 8:23 ` Ville Syrjälä
2025-10-30 9:32 ` Nautiyal, Ankit K
2025-10-30 5:17 ` [PATCH 3/5] drm/i915/display: Take into account AS SDP in intel_dp_sdp_min_guardband Ankit Nautiyal
2025-10-30 5:17 ` [PATCH 4/5] drm/i915/alpm: Compute LOBF late after guardband is already determined Ankit Nautiyal
2025-10-30 5:17 ` [PATCH 5/5] drm/i915/alpm: Allow LOBF only if window1 > alpm check_entry lines Ankit Nautiyal
2025-10-30 10:35 ` Ville Syrjälä
2025-10-30 13:15 ` Nautiyal, Ankit K
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