[PATCH v2 0/5] drm/xe/vf: Fix exec queue creation during post-migration recovery

[PATCH v2 0/5] drm/xe/vf: Fix exec queue creation during post-migration recovery

[Tomasz Lis]

Fix a few issues which sporadically happen due to a race between
post-migration fixups procedure, and exec queue creation routine.

Tests which create a lot of exec queues were sporadically failing
due to one of LRCs having its state within VRAM damaged. This series
fixes all such issues, by prolonging wait for fixups within EQ
creation, and also re-creating the one LRC whose creation happened
at the time of VF switch.

v2: Add a patch with atomic value increase which allowed to solve the
  few very rare test fails which were still happening.

Tomasz Lis (5):
  drm/xe/queue: Call fini on exec queue creation fail
  drm/xe/vf: Avoid LRC being freed while applying fixups
  drm/xe/vf: Wait for default LRCs fixups before using
  drm/xe/vf: Redo LRC creation while in VF fixups
  drm/xe/vf: Use marker to catch fixups during LRC creation

 drivers/gpu/drm/xe/xe_exec_queue.c        | 17 ++++++++--
 drivers/gpu/drm/xe/xe_gt_sriov_vf.c       | 39 +++++++++++++++--------
 drivers/gpu/drm/xe/xe_gt_sriov_vf.h       |  4 ++-
 drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h |  6 ++--
 4 files changed, 48 insertions(+), 18 deletions(-)

-- 
2.25.1

[PATCH v2 1/5] drm/xe/queue: Call fini on exec queue creation fail

[Tomasz Lis]

Every call to queue init should have a corresponding fini call.
Skipping this would mean skipping removal of the queue from GuC list
(which is part of guc_id allocation). A damaged queue stored in
exec_queue_lookup list would lead to invalid memory reference,
sooner or later.

Call fini to free guc_id. This must be done before any internal
LRCs are freed.

Fixes: 3c1fa4aa60b1 ("drm/xe: Move queue init before LRC creation")
Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_exec_queue.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 66d0e10ee2c4..42849be46166 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -324,6 +324,8 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
 	return 0;
 
 err_lrc:
+	q->ops->fini(q);
+
 	for (i = i - 1; i >= 0; --i)
 		xe_lrc_put(q->lrc[i]);
 	return err;
-- 
2.25.1

[PATCH v2 2/5] drm/xe/vf: Avoid LRC being freed while applying fixups

[Tomasz Lis]

There is a small but non-zero chance that fixups are running on
a context during teardown. The chances are decreased by starting
the teardown by releasing guc_id, but remain non-zero.
On the other hand the sync between fixups and context creation
drastically increases chance for such parallel teardown if
context creation fails.

Prevent LRC teardown in parallel with fixups by getting a reference.

Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
---
 drivers/gpu/drm/xe/xe_exec_queue.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 42849be46166..e9396ad3390a 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -1669,10 +1669,11 @@ int xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch)
 		lrc = READ_ONCE(q->lrc[i]);
 		if (!lrc)
 			continue;
-
+		xe_lrc_get(lrc);
 		xe_lrc_update_memirq_regs_with_address(lrc, q->hwe, scratch);
 		xe_lrc_update_hwctx_regs_with_address(lrc);
 		err = xe_lrc_setup_wa_bb_with_scratch(lrc, q->hwe, scratch);
+		xe_lrc_put(lrc);
 		if (err)
 			break;
 	}
-- 
2.25.1

Re: [PATCH v2 2/5] drm/xe/vf: Avoid LRC being freed while applying fixups

[Matthew Brost]

On Thu, Feb 19, 2026 at 12:21:55AM +0100, Tomasz Lis wrote:
> There is a small but non-zero chance that fixups are running on
> a context during teardown. The chances are decreased by starting
> the teardown by releasing guc_id, but remain non-zero.
> On the other hand the sync between fixups and context creation
> drastically increases chance for such parallel teardown if
> context creation fails.
> 

I don't see how this is possible.

xe_exec_queue_contexts_hwsp_rebase only happens if the exec queue is
present in &guc->submission_state.exec_queue_lookup.

 332 static void __xe_exec_queue_fini(struct xe_exec_queue *q)
 333 {
 334         int i;
 335
 336         q->ops->fini(q);
 337
 338         for (i = 0; i < q->width; ++i)
 339                 xe_lrc_put(q->lrc[i]);
 340 }

The removal from &guc->submission_state.exec_queue_lookup happen on line
336 in the above before. Thus a xe_exec_queue_contexts_hwsp_rebase can't
be executing on a 'q' after line 336 returns, then we drop the
references to the LRC. I agree this lifetime is questionable at best
(IIRC my GuC documentation explain this why this works) but if there is
a problem it should be fix with this lifetime in mind.

Looking at __xe_exec_queue_init, I believe 'err_lrc' label should
actually call __xe_exec_queue_fini.

> Prevent LRC teardown in parallel with fixups by getting a reference.
> 
> Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_exec_queue.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> index 42849be46166..e9396ad3390a 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> @@ -1669,10 +1669,11 @@ int xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch)
>  		lrc = READ_ONCE(q->lrc[i]);
>  		if (!lrc)
>  			continue;
> -
> +		xe_lrc_get(lrc);

This doesn't actually fix anything. The LRC could (current, in error
paths) disappear between the read and get.

Matt

>  		xe_lrc_update_memirq_regs_with_address(lrc, q->hwe, scratch);
>  		xe_lrc_update_hwctx_regs_with_address(lrc);
>  		err = xe_lrc_setup_wa_bb_with_scratch(lrc, q->hwe, scratch);
> +		xe_lrc_put(lrc);
>  		if (err)
>  			break;
>  	}
> -- 
> 2.25.1
> 

Re: [PATCH v2 2/5] drm/xe/vf: Avoid LRC being freed while applying fixups

[Lis, Tomasz]

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On 2/19/2026 8:00 PM, Matthew Brost wrote:
> On Thu, Feb 19, 2026 at 12:21:55AM +0100, Tomasz Lis wrote:
>> There is a small but non-zero chance that fixups are running on
>> a context during teardown. The chances are decreased by starting
>> the teardown by releasing guc_id, but remain non-zero.
>> On the other hand the sync between fixups and context creation
>> drastically increases chance for such parallel teardown if
>> context creation fails.
>>
> I don't see how this is possible.
>
> xe_exec_queue_contexts_hwsp_rebase only happens if the exec queue is
> present in &guc->submission_state.exec_queue_lookup.
>
>   332 static void __xe_exec_queue_fini(struct xe_exec_queue *q)
>   333 {
>   334         int i;
>   335
>   336         q->ops->fini(q);
>   337
>   338         for (i = 0; i < q->width; ++i)
>   339                 xe_lrc_put(q->lrc[i]);
>   340 }
>
> The removal from &guc->submission_state.exec_queue_lookup happen on line
> 336 in the above before. Thus a xe_exec_queue_contexts_hwsp_rebase can't
> be executing on a 'q' after line 336 returns, then we drop the
> references to the LRC. I agree this lifetime is questionable at best
> (IIRC my GuC documentation explain this why this works) but if there is
> a problem it should be fix with this lifetime in mind.

Consider a situation: __xe_exec_queue_init() and 
xe_exec_queue_contexts_hwsp_rebase() are running at the same time, on a 
one core VM, switching CPU contexts (each bullet is a context switch).

* __xe_exec_queue_init() passes `q->ops->init(q)` - the queue is added 
to exec_queue_lookup, then it starts creating LRCs - it's multi-LRC queue

* xe_exec_queue_contexts_hwsp_rebase() is executed on this new queue, 
starts the loop over LRCs

*  __xe_exec_queue_init() fails to create last of the LRCs, and jumps to 
`err_lrc` where all the finalization is done - removal form 
exec_queue_lookup and freeing of already created LRCs

* CPU context switches back to __xe_exec_queue_init() which goes through 
pointers of now freed LRCs, accessing the inside - SEGFAULT.

(I used one CPU core only to simplify the scenario, it could happen on 
multi-core as well)

> Looking at __xe_exec_queue_init, I believe 'err_lrc' label should
> actually call __xe_exec_queue_fini.

The __xe_exec_queue_fini() currently assumes that all LRC pointers are 
non-NULL.

Do you mean adding such check there? With it present, we could call that 
function in `err_lrc`.

I see no issue with such change, so let me know and I'll do it (assuming 
we will not be adding any wait there, as hinted below).

>
>> Prevent LRC teardown in parallel with fixups by getting a reference.
>>
>> Signed-off-by: Tomasz Lis<tomasz.lis@intel.com>
>> ---
>>   drivers/gpu/drm/xe/xe_exec_queue.c | 3 ++-
>>   1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
>> index 42849be46166..e9396ad3390a 100644
>> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
>> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
>> @@ -1669,10 +1669,11 @@ int xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch)
>>   		lrc = READ_ONCE(q->lrc[i]);
>>   		if (!lrc)
>>   			continue;
>> -
>> +		xe_lrc_get(lrc);
> This doesn't actually fix anything. The LRC could (current, in error
> paths) disappear between the read and get.

It is true that this is only narrowing the window rather than providing 
flawless fix. Though narrowing the window is a substantial improvement 
over ignoring the issue.

We could use xe_gt_sriov_vf_wait_valid_default_lrc() within `err_lrc:` 
instead, that would allow a flawless fix. An advantage of the current 
solution is that it keeps the complication within recovery code, without 
altering the common flow (by common flow I mean the queue creation flow 
used for both PF and VF, and regardless whether vf migration is 
possible). It also allows to free the memory faster - if we've failed 
LRC creation, it may be important to free resources as soon as possible.

Reading and writing local mem is substantially slower than the local 
pointer read and refcount increase, so this way we're narrowing the 
window by definitely more than 95%.

-Tomasz

>
> Matt
>
>>   		xe_lrc_update_memirq_regs_with_address(lrc, q->hwe, scratch);
>>   		xe_lrc_update_hwctx_regs_with_address(lrc);
>>   		err = xe_lrc_setup_wa_bb_with_scratch(lrc, q->hwe, scratch);
>> +		xe_lrc_put(lrc);
>>   		if (err)
>>   			break;
>>   	}
>> -- 
>> 2.25.1
>>

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Re: [PATCH v2 2/5] drm/xe/vf: Avoid LRC being freed while applying fixups

[Matthew Brost]

On Fri, Feb 20, 2026 at 04:20:25PM +0100, Lis, Tomasz wrote:
> 
> On 2/19/2026 8:00 PM, Matthew Brost wrote:
> > On Thu, Feb 19, 2026 at 12:21:55AM +0100, Tomasz Lis wrote:
> > > There is a small but non-zero chance that fixups are running on
> > > a context during teardown. The chances are decreased by starting
> > > the teardown by releasing guc_id, but remain non-zero.
> > > On the other hand the sync between fixups and context creation
> > > drastically increases chance for such parallel teardown if
> > > context creation fails.
> > > 
> > I don't see how this is possible.
> > 
> > xe_exec_queue_contexts_hwsp_rebase only happens if the exec queue is
> > present in &guc->submission_state.exec_queue_lookup.
> > 
> >   332 static void __xe_exec_queue_fini(struct xe_exec_queue *q)
> >   333 {
> >   334         int i;
> >   335
> >   336         q->ops->fini(q);
> >   337
> >   338         for (i = 0; i < q->width; ++i)
> >   339                 xe_lrc_put(q->lrc[i]);
> >   340 }
> > 
> > The removal from &guc->submission_state.exec_queue_lookup happen on line
> > 336 in the above before. Thus a xe_exec_queue_contexts_hwsp_rebase can't
> > be executing on a 'q' after line 336 returns, then we drop the
> > references to the LRC. I agree this lifetime is questionable at best
> > (IIRC my GuC documentation explain this why this works) but if there is
> > a problem it should be fix with this lifetime in mind.
> 
> Consider a situation: __xe_exec_queue_init() and
> xe_exec_queue_contexts_hwsp_rebase() are running at the same time, on a one
> core VM, switching CPU contexts (each bullet is a context switch).
> 
> * __xe_exec_queue_init() passes `q->ops->init(q)` - the queue is added to
> exec_queue_lookup, then it starts creating LRCs - it's multi-LRC queue
> 
> * xe_exec_queue_contexts_hwsp_rebase() is executed on this new queue, starts
> the loop over LRCs
> 
> *  __xe_exec_queue_init() fails to create last of the LRCs, and jumps to
> `err_lrc` where all the finalization is done - removal form
> exec_queue_lookup and freeing of already created LRCs
> 
> * CPU context switches back to __xe_exec_queue_init() which goes through
> pointers of now freed LRCs, accessing the inside - SEGFAULT.
> 
> (I used one CPU core only to simplify the scenario, it could happen on
> multi-core as well)
> 

Yes.

> > Looking at __xe_exec_queue_init, I believe 'err_lrc' label should
> > actually call __xe_exec_queue_fini.
> 
> The __xe_exec_queue_fini() currently assumes that all LRC pointers are
> non-NULL.
> 

Oh, yes. I missed that. Either __xe_exec_queue_fini would need a NULL
check or xe_lrc_put could have a NULL check (e.g., make it like kfree,
dma_fencez_put, or xe_bo_put which can be called with NULL. 

> Do you mean adding such check there? With it present, we could call that
> function in `err_lrc`.
> 
> I see no issue with such change, so let me know and I'll do it (assuming we
> will not be adding any wait there, as hinted below).
>

See above, a NULL check somewhere. No real preference where.
 
> > 
> > > Prevent LRC teardown in parallel with fixups by getting a reference.
> > > 
> > > Signed-off-by: Tomasz Lis<tomasz.lis@intel.com>
> > > ---
> > >   drivers/gpu/drm/xe/xe_exec_queue.c | 3 ++-
> > >   1 file changed, 2 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> > > index 42849be46166..e9396ad3390a 100644
> > > --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> > > +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> > > @@ -1669,10 +1669,11 @@ int xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch)
> > >   		lrc = READ_ONCE(q->lrc[i]);
> > >   		if (!lrc)
> > >   			continue;
> > > -
> > > +		xe_lrc_get(lrc);
> > This doesn't actually fix anything. The LRC could (current, in error
> > paths) disappear between the read and get.
> 
> It is true that this is only narrowing the window rather than providing
> flawless fix. Though narrowing the window is a substantial improvement over
> ignoring the issue.
> 
> We could use xe_gt_sriov_vf_wait_valid_default_lrc() within `err_lrc:`
> instead, that would allow a flawless fix. An advantage of the current
> solution is that it keeps the complication within recovery code, without
> altering the common flow (by common flow I mean the queue creation flow used
> for both PF and VF, and regardless whether vf migration is possible). It
> also allows to free the memory faster - if we've failed LRC creation, it may
> be important to free resources as soon as possible.
> 
> Reading and writing local mem is substantially slower than the local pointer
> read and refcount increase, so this way we're narrowing the window by
> definitely more than 95%.

Yes, but if we are going to fix this, let's make sure it is 100%
correct. Please use __xe_exec_queue_fini in LRC error path and NULL
check somewhere.

Matt

> 
> -Tomasz
> 
> > 
> > Matt
> > 
> > >   		xe_lrc_update_memirq_regs_with_address(lrc, q->hwe, scratch);
> > >   		xe_lrc_update_hwctx_regs_with_address(lrc);
> > >   		err = xe_lrc_setup_wa_bb_with_scratch(lrc, q->hwe, scratch);
> > > +		xe_lrc_put(lrc);
> > >   		if (err)
> > >   			break;
> > >   	}
> > > -- 
> > > 2.25.1
> > > 

[PATCH v2 3/5] drm/xe/vf: Wait for default LRCs fixups before using

[Tomasz Lis]

When a context is being created during save/restore, the LRC creation
needs to wait for GGTT address space to be shifted. But it also needs
to have fixed default LRCs. This is mandatory to avoid the situation
where LRC will be created based on data from before the fixups, but
reference within exec queue will be set too late for fixups.

This fixes an issue where contexts created during save/restore have
a large chance of having one unfixed LRC, due to the xe_lrc_create()
being synced for equal start to race with default LRC fixups.

Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
---
 drivers/gpu/drm/xe/xe_exec_queue.c        |  2 +-
 drivers/gpu/drm/xe/xe_gt_sriov_vf.c       | 24 +++++++++++------------
 drivers/gpu/drm/xe/xe_gt_sriov_vf.h       |  2 +-
 drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h |  4 ++--
 4 files changed, 15 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index e9396ad3390a..6eb561086e1c 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -309,7 +309,7 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
 	for (i = 0; i < q->width; ++i) {
 		struct xe_lrc *lrc;
 
-		xe_gt_sriov_vf_wait_valid_ggtt(q->gt);
+		xe_gt_sriov_vf_wait_valid_default_lrc(q->gt);
 		lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,
 				    xe_lrc_ring_size(), q->msix_vec, flags);
 		if (IS_ERR(lrc)) {
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
index 527ded3c9c22..5ce06031018d 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
@@ -536,12 +536,6 @@ static int vf_get_ggtt_info(struct xe_gt *gt)
 	 */
 	xe_ggtt_shift_nodes(tile->mem.ggtt, start);
 
-	if (xe_sriov_vf_migration_supported(gt_to_xe(gt))) {
-		WRITE_ONCE(gt->sriov.vf.migration.ggtt_need_fixes, false);
-		smp_wmb();	/* Ensure above write visible before wake */
-		wake_up_all(&gt->sriov.vf.migration.wq);
-	}
-
 	return 0;
 }
 
@@ -844,6 +838,10 @@ static void xe_gt_sriov_vf_default_lrcs_hwsp_rebase(struct xe_gt *gt)
 
 	for_each_hw_engine(hwe, gt, id)
 		xe_default_lrc_update_memirq_regs_with_address(hwe);
+
+	WRITE_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes, false);
+	smp_wmb();	/* Ensure above write visible before wake */
+	wake_up_all(&gt->sriov.vf.migration.wq);
 }
 
 static void vf_start_migration_recovery(struct xe_gt *gt)
@@ -858,7 +856,7 @@ static void vf_start_migration_recovery(struct xe_gt *gt)
 	    !gt->sriov.vf.migration.recovery_teardown) {
 		gt->sriov.vf.migration.recovery_queued = true;
 		WRITE_ONCE(gt->sriov.vf.migration.recovery_inprogress, true);
-		WRITE_ONCE(gt->sriov.vf.migration.ggtt_need_fixes, true);
+		WRITE_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes, true);
 		smp_wmb();	/* Ensure above writes visible before wake */
 
 		xe_guc_ct_wake_waiters(&gt->uc.guc.ct);
@@ -1303,7 +1301,7 @@ static void vf_post_migration_abort(struct xe_gt *gt)
 {
 	spin_lock_irq(&gt->sriov.vf.migration.lock);
 	WRITE_ONCE(gt->sriov.vf.migration.recovery_inprogress, false);
-	WRITE_ONCE(gt->sriov.vf.migration.ggtt_need_fixes, false);
+	WRITE_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes, false);
 	spin_unlock_irq(&gt->sriov.vf.migration.lock);
 
 	wake_up_all(&gt->sriov.vf.migration.wq);
@@ -1499,7 +1497,7 @@ bool xe_gt_sriov_vf_recovery_pending(struct xe_gt *gt)
 	return READ_ONCE(gt->sriov.vf.migration.recovery_inprogress);
 }
 
-static bool vf_valid_ggtt(struct xe_gt *gt)
+static bool vf_valid_default_lrc(struct xe_gt *gt)
 {
 	struct xe_memirq *memirq = &gt_to_tile(gt)->memirq;
 	bool irq_pending = xe_device_uses_memirq(gt_to_xe(gt)) &&
@@ -1507,17 +1505,17 @@ static bool vf_valid_ggtt(struct xe_gt *gt)
 
 	xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
 
-	if (irq_pending || READ_ONCE(gt->sriov.vf.migration.ggtt_need_fixes))
+	if (irq_pending || READ_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes))
 		return false;
 
 	return true;
 }
 
 /**
- * xe_gt_sriov_vf_wait_valid_ggtt() - VF wait for valid GGTT addresses
+ * xe_gt_sriov_vf_wait_valid_default_lrc() - wait for valid GGTT refs in default LRCs
  * @gt: the &xe_gt
  */
-void xe_gt_sriov_vf_wait_valid_ggtt(struct xe_gt *gt)
+void xe_gt_sriov_vf_wait_valid_default_lrc(struct xe_gt *gt)
 {
 	int ret;
 
@@ -1526,7 +1524,7 @@ void xe_gt_sriov_vf_wait_valid_ggtt(struct xe_gt *gt)
 		return;
 
 	ret = wait_event_interruptible_timeout(gt->sriov.vf.migration.wq,
-					       vf_valid_ggtt(gt),
+					       vf_valid_default_lrc(gt),
 					       HZ * 5);
 	xe_gt_WARN_ON(gt, !ret);
 }
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
index 7d97189c2d3d..70232dc38f9a 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
@@ -39,6 +39,6 @@ void xe_gt_sriov_vf_print_config(struct xe_gt *gt, struct drm_printer *p);
 void xe_gt_sriov_vf_print_runtime(struct xe_gt *gt, struct drm_printer *p);
 void xe_gt_sriov_vf_print_version(struct xe_gt *gt, struct drm_printer *p);
 
-void xe_gt_sriov_vf_wait_valid_ggtt(struct xe_gt *gt);
+void xe_gt_sriov_vf_wait_valid_default_lrc(struct xe_gt *gt);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
index 4ef881b9b662..8be181bf3cf3 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
@@ -73,8 +73,8 @@ struct xe_gt_sriov_vf_migration {
 	bool recovery_queued;
 	/** @recovery_inprogress: VF post migration recovery in progress */
 	bool recovery_inprogress;
-	/** @ggtt_need_fixes: VF GGTT needs fixes */
-	bool ggtt_need_fixes;
+	/** @default_lrcs_need_fixes: GGTT refs within default LRCs need fixes */
+	bool default_lrcs_need_fixes;
 };
 
 /**
-- 
2.25.1

Re: [PATCH v2 3/5] drm/xe/vf: Wait for default LRCs fixups before using

[Matthew Brost]

On Thu, Feb 19, 2026 at 12:21:56AM +0100, Tomasz Lis wrote:
> When a context is being created during save/restore, the LRC creation
> needs to wait for GGTT address space to be shifted. But it also needs
> to have fixed default LRCs. This is mandatory to avoid the situation
> where LRC will be created based on data from before the fixups, but
> reference within exec queue will be set too late for fixups.
> 
> This fixes an issue where contexts created during save/restore have
> a large chance of having one unfixed LRC, due to the xe_lrc_create()
> being synced for equal start to race with default LRC fixups.
> 
> Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>

This is better than what is in place, so...
Reviewed-by: Matthew Brost <matthew.brost@intel.com>

But I think we need to close on why my suggestion in the previous rev
isn't fixing the issue (off list discussion). If we go this series, then
my RB holds for future revs.

Matt 

> ---
>  drivers/gpu/drm/xe/xe_exec_queue.c        |  2 +-
>  drivers/gpu/drm/xe/xe_gt_sriov_vf.c       | 24 +++++++++++------------
>  drivers/gpu/drm/xe/xe_gt_sriov_vf.h       |  2 +-
>  drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h |  4 ++--
>  4 files changed, 15 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> index e9396ad3390a..6eb561086e1c 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> @@ -309,7 +309,7 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
>  	for (i = 0; i < q->width; ++i) {
>  		struct xe_lrc *lrc;
>  
> -		xe_gt_sriov_vf_wait_valid_ggtt(q->gt);
> +		xe_gt_sriov_vf_wait_valid_default_lrc(q->gt);
>  		lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,
>  				    xe_lrc_ring_size(), q->msix_vec, flags);
>  		if (IS_ERR(lrc)) {
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> index 527ded3c9c22..5ce06031018d 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> @@ -536,12 +536,6 @@ static int vf_get_ggtt_info(struct xe_gt *gt)
>  	 */
>  	xe_ggtt_shift_nodes(tile->mem.ggtt, start);
>  
> -	if (xe_sriov_vf_migration_supported(gt_to_xe(gt))) {
> -		WRITE_ONCE(gt->sriov.vf.migration.ggtt_need_fixes, false);
> -		smp_wmb();	/* Ensure above write visible before wake */
> -		wake_up_all(&gt->sriov.vf.migration.wq);
> -	}
> -
>  	return 0;
>  }
>  
> @@ -844,6 +838,10 @@ static void xe_gt_sriov_vf_default_lrcs_hwsp_rebase(struct xe_gt *gt)
>  
>  	for_each_hw_engine(hwe, gt, id)
>  		xe_default_lrc_update_memirq_regs_with_address(hwe);
> +
> +	WRITE_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes, false);
> +	smp_wmb();	/* Ensure above write visible before wake */
> +	wake_up_all(&gt->sriov.vf.migration.wq);
>  }
>  
>  static void vf_start_migration_recovery(struct xe_gt *gt)
> @@ -858,7 +856,7 @@ static void vf_start_migration_recovery(struct xe_gt *gt)
>  	    !gt->sriov.vf.migration.recovery_teardown) {
>  		gt->sriov.vf.migration.recovery_queued = true;
>  		WRITE_ONCE(gt->sriov.vf.migration.recovery_inprogress, true);
> -		WRITE_ONCE(gt->sriov.vf.migration.ggtt_need_fixes, true);
> +		WRITE_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes, true);
>  		smp_wmb();	/* Ensure above writes visible before wake */
>  
>  		xe_guc_ct_wake_waiters(&gt->uc.guc.ct);
> @@ -1303,7 +1301,7 @@ static void vf_post_migration_abort(struct xe_gt *gt)
>  {
>  	spin_lock_irq(&gt->sriov.vf.migration.lock);
>  	WRITE_ONCE(gt->sriov.vf.migration.recovery_inprogress, false);
> -	WRITE_ONCE(gt->sriov.vf.migration.ggtt_need_fixes, false);
> +	WRITE_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes, false);
>  	spin_unlock_irq(&gt->sriov.vf.migration.lock);
>  
>  	wake_up_all(&gt->sriov.vf.migration.wq);
> @@ -1499,7 +1497,7 @@ bool xe_gt_sriov_vf_recovery_pending(struct xe_gt *gt)
>  	return READ_ONCE(gt->sriov.vf.migration.recovery_inprogress);
>  }
>  
> -static bool vf_valid_ggtt(struct xe_gt *gt)
> +static bool vf_valid_default_lrc(struct xe_gt *gt)
>  {
>  	struct xe_memirq *memirq = &gt_to_tile(gt)->memirq;
>  	bool irq_pending = xe_device_uses_memirq(gt_to_xe(gt)) &&
> @@ -1507,17 +1505,17 @@ static bool vf_valid_ggtt(struct xe_gt *gt)
>  
>  	xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
>  
> -	if (irq_pending || READ_ONCE(gt->sriov.vf.migration.ggtt_need_fixes))
> +	if (irq_pending || READ_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes))
>  		return false;
>  
>  	return true;
>  }
>  
>  /**
> - * xe_gt_sriov_vf_wait_valid_ggtt() - VF wait for valid GGTT addresses
> + * xe_gt_sriov_vf_wait_valid_default_lrc() - wait for valid GGTT refs in default LRCs
>   * @gt: the &xe_gt
>   */
> -void xe_gt_sriov_vf_wait_valid_ggtt(struct xe_gt *gt)
> +void xe_gt_sriov_vf_wait_valid_default_lrc(struct xe_gt *gt)
>  {
>  	int ret;
>  
> @@ -1526,7 +1524,7 @@ void xe_gt_sriov_vf_wait_valid_ggtt(struct xe_gt *gt)
>  		return;
>  
>  	ret = wait_event_interruptible_timeout(gt->sriov.vf.migration.wq,
> -					       vf_valid_ggtt(gt),
> +					       vf_valid_default_lrc(gt),
>  					       HZ * 5);
>  	xe_gt_WARN_ON(gt, !ret);
>  }
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
> index 7d97189c2d3d..70232dc38f9a 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
> @@ -39,6 +39,6 @@ void xe_gt_sriov_vf_print_config(struct xe_gt *gt, struct drm_printer *p);
>  void xe_gt_sriov_vf_print_runtime(struct xe_gt *gt, struct drm_printer *p);
>  void xe_gt_sriov_vf_print_version(struct xe_gt *gt, struct drm_printer *p);
>  
> -void xe_gt_sriov_vf_wait_valid_ggtt(struct xe_gt *gt);
> +void xe_gt_sriov_vf_wait_valid_default_lrc(struct xe_gt *gt);
>  
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> index 4ef881b9b662..8be181bf3cf3 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> @@ -73,8 +73,8 @@ struct xe_gt_sriov_vf_migration {
>  	bool recovery_queued;
>  	/** @recovery_inprogress: VF post migration recovery in progress */
>  	bool recovery_inprogress;
> -	/** @ggtt_need_fixes: VF GGTT needs fixes */
> -	bool ggtt_need_fixes;
> +	/** @default_lrcs_need_fixes: GGTT refs within default LRCs need fixes */
> +	bool default_lrcs_need_fixes;
>  };
>  
>  /**
> -- 
> 2.25.1
> 

Re: [PATCH v2 3/5] drm/xe/vf: Wait for default LRCs fixups before using

[Matthew Brost]

On Thu, Feb 19, 2026 at 12:16:49PM -0800, Matthew Brost wrote:
> On Thu, Feb 19, 2026 at 12:21:56AM +0100, Tomasz Lis wrote:
> > When a context is being created during save/restore, the LRC creation
> > needs to wait for GGTT address space to be shifted. But it also needs
> > to have fixed default LRCs. This is mandatory to avoid the situation
> > where LRC will be created based on data from before the fixups, but
> > reference within exec queue will be set too late for fixups.
> > 
> > This fixes an issue where contexts created during save/restore have
> > a large chance of having one unfixed LRC, due to the xe_lrc_create()
> > being synced for equal start to race with default LRC fixups.
> > 
> > Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
> 
> This is better than what is in place, so...
> Reviewed-by: Matthew Brost <matthew.brost@intel.com>

A little quick on this RB, see my comment here [1].

[1] https://patchwork.freedesktop.org/patch/705610/?series=161287&rev=2#comment_1298253

> 
> But I think we need to close on why my suggestion in the previous rev
> isn't fixing the issue (off list discussion). If we go this series, then

We still need to figure out why my previous suggestion doesn't work.

> my RB holds for future revs.
> 
> Matt 
> 
> > ---
> >  drivers/gpu/drm/xe/xe_exec_queue.c        |  2 +-
> >  drivers/gpu/drm/xe/xe_gt_sriov_vf.c       | 24 +++++++++++------------
> >  drivers/gpu/drm/xe/xe_gt_sriov_vf.h       |  2 +-
> >  drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h |  4 ++--
> >  4 files changed, 15 insertions(+), 17 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> > index e9396ad3390a..6eb561086e1c 100644
> > --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> > +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> > @@ -309,7 +309,7 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
> >  	for (i = 0; i < q->width; ++i) {
> >  		struct xe_lrc *lrc;
> >  
> > -		xe_gt_sriov_vf_wait_valid_ggtt(q->gt);
> > +		xe_gt_sriov_vf_wait_valid_default_lrc(q->gt);
> >  		lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,
> >  				    xe_lrc_ring_size(), q->msix_vec, flags);
> >  		if (IS_ERR(lrc)) {
> > diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> > index 527ded3c9c22..5ce06031018d 100644
> > --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> > +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> > @@ -536,12 +536,6 @@ static int vf_get_ggtt_info(struct xe_gt *gt)
> >  	 */
> >  	xe_ggtt_shift_nodes(tile->mem.ggtt, start);
> >  
> > -	if (xe_sriov_vf_migration_supported(gt_to_xe(gt))) {
> > -		WRITE_ONCE(gt->sriov.vf.migration.ggtt_need_fixes, false);
> > -		smp_wmb();	/* Ensure above write visible before wake */
> > -		wake_up_all(&gt->sriov.vf.migration.wq);
> > -	}
> > -
> >  	return 0;
> >  }
> >  
> > @@ -844,6 +838,10 @@ static void xe_gt_sriov_vf_default_lrcs_hwsp_rebase(struct xe_gt *gt)
> >  
> >  	for_each_hw_engine(hwe, gt, id)
> >  		xe_default_lrc_update_memirq_regs_with_address(hwe);
> > +
> > +	WRITE_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes, false);
> > +	smp_wmb();	/* Ensure above write visible before wake */
> > +	wake_up_all(&gt->sriov.vf.migration.wq);

Then with [1], move this wakeup to vf_post_migration_fixups after all fixups.

Matt

> >  }
> >  
> >  static void vf_start_migration_recovery(struct xe_gt *gt)
> > @@ -858,7 +856,7 @@ static void vf_start_migration_recovery(struct xe_gt *gt)
> >  	    !gt->sriov.vf.migration.recovery_teardown) {
> >  		gt->sriov.vf.migration.recovery_queued = true;
> >  		WRITE_ONCE(gt->sriov.vf.migration.recovery_inprogress, true);
> > -		WRITE_ONCE(gt->sriov.vf.migration.ggtt_need_fixes, true);
> > +		WRITE_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes, true);
> >  		smp_wmb();	/* Ensure above writes visible before wake */
> >  
> >  		xe_guc_ct_wake_waiters(&gt->uc.guc.ct);
> > @@ -1303,7 +1301,7 @@ static void vf_post_migration_abort(struct xe_gt *gt)
> >  {
> >  	spin_lock_irq(&gt->sriov.vf.migration.lock);
> >  	WRITE_ONCE(gt->sriov.vf.migration.recovery_inprogress, false);
> > -	WRITE_ONCE(gt->sriov.vf.migration.ggtt_need_fixes, false);
> > +	WRITE_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes, false);
> >  	spin_unlock_irq(&gt->sriov.vf.migration.lock);
> >  
> >  	wake_up_all(&gt->sriov.vf.migration.wq);
> > @@ -1499,7 +1497,7 @@ bool xe_gt_sriov_vf_recovery_pending(struct xe_gt *gt)
> >  	return READ_ONCE(gt->sriov.vf.migration.recovery_inprogress);
> >  }
> >  
> > -static bool vf_valid_ggtt(struct xe_gt *gt)
> > +static bool vf_valid_default_lrc(struct xe_gt *gt)
> >  {
> >  	struct xe_memirq *memirq = &gt_to_tile(gt)->memirq;
> >  	bool irq_pending = xe_device_uses_memirq(gt_to_xe(gt)) &&
> > @@ -1507,17 +1505,17 @@ static bool vf_valid_ggtt(struct xe_gt *gt)
> >  
> >  	xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
> >  
> > -	if (irq_pending || READ_ONCE(gt->sriov.vf.migration.ggtt_need_fixes))
> > +	if (irq_pending || READ_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes))
> >  		return false;
> >  
> >  	return true;
> >  }
> >  
> >  /**
> > - * xe_gt_sriov_vf_wait_valid_ggtt() - VF wait for valid GGTT addresses
> > + * xe_gt_sriov_vf_wait_valid_default_lrc() - wait for valid GGTT refs in default LRCs
> >   * @gt: the &xe_gt
> >   */
> > -void xe_gt_sriov_vf_wait_valid_ggtt(struct xe_gt *gt)
> > +void xe_gt_sriov_vf_wait_valid_default_lrc(struct xe_gt *gt)
> >  {
> >  	int ret;
> >  
> > @@ -1526,7 +1524,7 @@ void xe_gt_sriov_vf_wait_valid_ggtt(struct xe_gt *gt)
> >  		return;
> >  
> >  	ret = wait_event_interruptible_timeout(gt->sriov.vf.migration.wq,
> > -					       vf_valid_ggtt(gt),
> > +					       vf_valid_default_lrc(gt),
> >  					       HZ * 5);
> >  	xe_gt_WARN_ON(gt, !ret);
> >  }
> > diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
> > index 7d97189c2d3d..70232dc38f9a 100644
> > --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
> > +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
> > @@ -39,6 +39,6 @@ void xe_gt_sriov_vf_print_config(struct xe_gt *gt, struct drm_printer *p);
> >  void xe_gt_sriov_vf_print_runtime(struct xe_gt *gt, struct drm_printer *p);
> >  void xe_gt_sriov_vf_print_version(struct xe_gt *gt, struct drm_printer *p);
> >  
> > -void xe_gt_sriov_vf_wait_valid_ggtt(struct xe_gt *gt);
> > +void xe_gt_sriov_vf_wait_valid_default_lrc(struct xe_gt *gt);
> >  
> >  #endif
> > diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> > index 4ef881b9b662..8be181bf3cf3 100644
> > --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> > +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> > @@ -73,8 +73,8 @@ struct xe_gt_sriov_vf_migration {
> >  	bool recovery_queued;
> >  	/** @recovery_inprogress: VF post migration recovery in progress */
> >  	bool recovery_inprogress;
> > -	/** @ggtt_need_fixes: VF GGTT needs fixes */
> > -	bool ggtt_need_fixes;
> > +	/** @default_lrcs_need_fixes: GGTT refs within default LRCs need fixes */
> > +	bool default_lrcs_need_fixes;
> >  };
> >  
> >  /**
> > -- 
> > 2.25.1
> > 

Re: [PATCH v2 3/5] drm/xe/vf: Wait for default LRCs fixups before using

[Lis, Tomasz]

On 2/19/2026 9:40 PM, Matthew Brost wrote:
> On Thu, Feb 19, 2026 at 12:16:49PM -0800, Matthew Brost wrote:
>> On Thu, Feb 19, 2026 at 12:21:56AM +0100, Tomasz Lis wrote:
>>> When a context is being created during save/restore, the LRC creation
>>> needs to wait for GGTT address space to be shifted. But it also needs
>>> to have fixed default LRCs. This is mandatory to avoid the situation
>>> where LRC will be created based on data from before the fixups, but
>>> reference within exec queue will be set too late for fixups.
>>>
>>> This fixes an issue where contexts created during save/restore have
>>> a large chance of having one unfixed LRC, due to the xe_lrc_create()
>>> being synced for equal start to race with default LRC fixups.
>>>
>>> Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
>> This is better than what is in place, so...
>> Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> A little quick on this RB, see my comment here [1].
>
> [1] https://patchwork.freedesktop.org/patch/705610/?series=161287&rev=2#comment_1298253
ack
>
>> But I think we need to close on why my suggestion in the previous rev
>> isn't fixing the issue (off list discussion). If we go this series, then
> We still need to figure out why my previous suggestion doesn't work.

Right. Testing this is even harder than I expected though. Not only each 
verification required 1000+ runs, but I already confirmed that there is 
more than one place within `xe_lrc_create()` which causes an issue if 
not protected by the atomic..

We need to, but this may take some time.

-Tomasz

>> my RB holds for future revs.
>>
>> Matt
>>
>>> ---
>>>   drivers/gpu/drm/xe/xe_exec_queue.c        |  2 +-
>>>   drivers/gpu/drm/xe/xe_gt_sriov_vf.c       | 24 +++++++++++------------
>>>   drivers/gpu/drm/xe/xe_gt_sriov_vf.h       |  2 +-
>>>   drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h |  4 ++--
>>>   4 files changed, 15 insertions(+), 17 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
>>> index e9396ad3390a..6eb561086e1c 100644
>>> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
>>> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
>>> @@ -309,7 +309,7 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
>>>   	for (i = 0; i < q->width; ++i) {
>>>   		struct xe_lrc *lrc;
>>>   
>>> -		xe_gt_sriov_vf_wait_valid_ggtt(q->gt);
>>> +		xe_gt_sriov_vf_wait_valid_default_lrc(q->gt);
>>>   		lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,
>>>   				    xe_lrc_ring_size(), q->msix_vec, flags);
>>>   		if (IS_ERR(lrc)) {
>>> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
>>> index 527ded3c9c22..5ce06031018d 100644
>>> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
>>> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
>>> @@ -536,12 +536,6 @@ static int vf_get_ggtt_info(struct xe_gt *gt)
>>>   	 */
>>>   	xe_ggtt_shift_nodes(tile->mem.ggtt, start);
>>>   
>>> -	if (xe_sriov_vf_migration_supported(gt_to_xe(gt))) {
>>> -		WRITE_ONCE(gt->sriov.vf.migration.ggtt_need_fixes, false);
>>> -		smp_wmb();	/* Ensure above write visible before wake */
>>> -		wake_up_all(&gt->sriov.vf.migration.wq);
>>> -	}
>>> -
>>>   	return 0;
>>>   }
>>>   
>>> @@ -844,6 +838,10 @@ static void xe_gt_sriov_vf_default_lrcs_hwsp_rebase(struct xe_gt *gt)
>>>   
>>>   	for_each_hw_engine(hwe, gt, id)
>>>   		xe_default_lrc_update_memirq_regs_with_address(hwe);
>>> +
>>> +	WRITE_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes, false);
>>> +	smp_wmb();	/* Ensure above write visible before wake */
>>> +	wake_up_all(&gt->sriov.vf.migration.wq);
> Then with [1], move this wakeup to vf_post_migration_fixups after all fixups.
>
> Matt
>
>>>   }
>>>   
>>>   static void vf_start_migration_recovery(struct xe_gt *gt)
>>> @@ -858,7 +856,7 @@ static void vf_start_migration_recovery(struct xe_gt *gt)
>>>   	    !gt->sriov.vf.migration.recovery_teardown) {
>>>   		gt->sriov.vf.migration.recovery_queued = true;
>>>   		WRITE_ONCE(gt->sriov.vf.migration.recovery_inprogress, true);
>>> -		WRITE_ONCE(gt->sriov.vf.migration.ggtt_need_fixes, true);
>>> +		WRITE_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes, true);
>>>   		smp_wmb();	/* Ensure above writes visible before wake */
>>>   
>>>   		xe_guc_ct_wake_waiters(&gt->uc.guc.ct);
>>> @@ -1303,7 +1301,7 @@ static void vf_post_migration_abort(struct xe_gt *gt)
>>>   {
>>>   	spin_lock_irq(&gt->sriov.vf.migration.lock);
>>>   	WRITE_ONCE(gt->sriov.vf.migration.recovery_inprogress, false);
>>> -	WRITE_ONCE(gt->sriov.vf.migration.ggtt_need_fixes, false);
>>> +	WRITE_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes, false);
>>>   	spin_unlock_irq(&gt->sriov.vf.migration.lock);
>>>   
>>>   	wake_up_all(&gt->sriov.vf.migration.wq);
>>> @@ -1499,7 +1497,7 @@ bool xe_gt_sriov_vf_recovery_pending(struct xe_gt *gt)
>>>   	return READ_ONCE(gt->sriov.vf.migration.recovery_inprogress);
>>>   }
>>>   
>>> -static bool vf_valid_ggtt(struct xe_gt *gt)
>>> +static bool vf_valid_default_lrc(struct xe_gt *gt)
>>>   {
>>>   	struct xe_memirq *memirq = &gt_to_tile(gt)->memirq;
>>>   	bool irq_pending = xe_device_uses_memirq(gt_to_xe(gt)) &&
>>> @@ -1507,17 +1505,17 @@ static bool vf_valid_ggtt(struct xe_gt *gt)
>>>   
>>>   	xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
>>>   
>>> -	if (irq_pending || READ_ONCE(gt->sriov.vf.migration.ggtt_need_fixes))
>>> +	if (irq_pending || READ_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes))
>>>   		return false;
>>>   
>>>   	return true;
>>>   }
>>>   
>>>   /**
>>> - * xe_gt_sriov_vf_wait_valid_ggtt() - VF wait for valid GGTT addresses
>>> + * xe_gt_sriov_vf_wait_valid_default_lrc() - wait for valid GGTT refs in default LRCs
>>>    * @gt: the &xe_gt
>>>    */
>>> -void xe_gt_sriov_vf_wait_valid_ggtt(struct xe_gt *gt)
>>> +void xe_gt_sriov_vf_wait_valid_default_lrc(struct xe_gt *gt)
>>>   {
>>>   	int ret;
>>>   
>>> @@ -1526,7 +1524,7 @@ void xe_gt_sriov_vf_wait_valid_ggtt(struct xe_gt *gt)
>>>   		return;
>>>   
>>>   	ret = wait_event_interruptible_timeout(gt->sriov.vf.migration.wq,
>>> -					       vf_valid_ggtt(gt),
>>> +					       vf_valid_default_lrc(gt),
>>>   					       HZ * 5);
>>>   	xe_gt_WARN_ON(gt, !ret);
>>>   }
>>> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
>>> index 7d97189c2d3d..70232dc38f9a 100644
>>> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
>>> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
>>> @@ -39,6 +39,6 @@ void xe_gt_sriov_vf_print_config(struct xe_gt *gt, struct drm_printer *p);
>>>   void xe_gt_sriov_vf_print_runtime(struct xe_gt *gt, struct drm_printer *p);
>>>   void xe_gt_sriov_vf_print_version(struct xe_gt *gt, struct drm_printer *p);
>>>   
>>> -void xe_gt_sriov_vf_wait_valid_ggtt(struct xe_gt *gt);
>>> +void xe_gt_sriov_vf_wait_valid_default_lrc(struct xe_gt *gt);
>>>   
>>>   #endif
>>> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
>>> index 4ef881b9b662..8be181bf3cf3 100644
>>> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
>>> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
>>> @@ -73,8 +73,8 @@ struct xe_gt_sriov_vf_migration {
>>>   	bool recovery_queued;
>>>   	/** @recovery_inprogress: VF post migration recovery in progress */
>>>   	bool recovery_inprogress;
>>> -	/** @ggtt_need_fixes: VF GGTT needs fixes */
>>> -	bool ggtt_need_fixes;
>>> +	/** @default_lrcs_need_fixes: GGTT refs within default LRCs need fixes */
>>> +	bool default_lrcs_need_fixes;
>>>   };
>>>   
>>>   /**
>>> -- 
>>> 2.25.1
>>>

Re: [PATCH v2 3/5] drm/xe/vf: Wait for default LRCs fixups before using

[Matthew Brost]

On Fri, Feb 20, 2026 at 06:20:32PM +0100, Lis, Tomasz wrote:
> 
> On 2/19/2026 9:40 PM, Matthew Brost wrote:
> > On Thu, Feb 19, 2026 at 12:16:49PM -0800, Matthew Brost wrote:
> > > On Thu, Feb 19, 2026 at 12:21:56AM +0100, Tomasz Lis wrote:
> > > > When a context is being created during save/restore, the LRC creation
> > > > needs to wait for GGTT address space to be shifted. But it also needs
> > > > to have fixed default LRCs. This is mandatory to avoid the situation
> > > > where LRC will be created based on data from before the fixups, but
> > > > reference within exec queue will be set too late for fixups.
> > > > 
> > > > This fixes an issue where contexts created during save/restore have
> > > > a large chance of having one unfixed LRC, due to the xe_lrc_create()
> > > > being synced for equal start to race with default LRC fixups.
> > > > 
> > > > Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
> > > This is better than what is in place, so...
> > > Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> > A little quick on this RB, see my comment here [1].
> > 
> > [1] https://patchwork.freedesktop.org/patch/705610/?series=161287&rev=2#comment_1298253
> ack
> > 
> > > But I think we need to close on why my suggestion in the previous rev
> > > isn't fixing the issue (off list discussion). If we go this series, then
> > We still need to figure out why my previous suggestion doesn't work.
> 
> Right. Testing this is even harder than I expected though. Not only each
> verification required 1000+ runs, but I already confirmed that there is more
> than one place within `xe_lrc_create()` which causes an issue if not
> protected by the atomic..
> 
> We need to, but this may take some time.
> 

Ok. I think that with some of my suggestions—particularly those in
[1]—we can get a version of this series merged. I've reasoned through a
few minor changes and suggestions in [1]; with those, the layering looks
solid, race-free, and memory-safe, all of which the current code is not.
So let's move forward with this series, assuming we can align on my
comments in [1] and in the other patches.

Matt 

[1] https://patchwork.freedesktop.org/patch/705610/?series=161287&rev=2#comment_1298682

> -Tomasz
> 
> > > my RB holds for future revs.
> > > 
> > > Matt
> > > 
> > > > ---
> > > >   drivers/gpu/drm/xe/xe_exec_queue.c        |  2 +-
> > > >   drivers/gpu/drm/xe/xe_gt_sriov_vf.c       | 24 +++++++++++------------
> > > >   drivers/gpu/drm/xe/xe_gt_sriov_vf.h       |  2 +-
> > > >   drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h |  4 ++--
> > > >   4 files changed, 15 insertions(+), 17 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> > > > index e9396ad3390a..6eb561086e1c 100644
> > > > --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> > > > +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> > > > @@ -309,7 +309,7 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
> > > >   	for (i = 0; i < q->width; ++i) {
> > > >   		struct xe_lrc *lrc;
> > > > -		xe_gt_sriov_vf_wait_valid_ggtt(q->gt);
> > > > +		xe_gt_sriov_vf_wait_valid_default_lrc(q->gt);
> > > >   		lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,
> > > >   				    xe_lrc_ring_size(), q->msix_vec, flags);
> > > >   		if (IS_ERR(lrc)) {
> > > > diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> > > > index 527ded3c9c22..5ce06031018d 100644
> > > > --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> > > > +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> > > > @@ -536,12 +536,6 @@ static int vf_get_ggtt_info(struct xe_gt *gt)
> > > >   	 */
> > > >   	xe_ggtt_shift_nodes(tile->mem.ggtt, start);
> > > > -	if (xe_sriov_vf_migration_supported(gt_to_xe(gt))) {
> > > > -		WRITE_ONCE(gt->sriov.vf.migration.ggtt_need_fixes, false);
> > > > -		smp_wmb();	/* Ensure above write visible before wake */
> > > > -		wake_up_all(&gt->sriov.vf.migration.wq);
> > > > -	}
> > > > -
> > > >   	return 0;
> > > >   }
> > > > @@ -844,6 +838,10 @@ static void xe_gt_sriov_vf_default_lrcs_hwsp_rebase(struct xe_gt *gt)
> > > >   	for_each_hw_engine(hwe, gt, id)
> > > >   		xe_default_lrc_update_memirq_regs_with_address(hwe);
> > > > +
> > > > +	WRITE_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes, false);
> > > > +	smp_wmb();	/* Ensure above write visible before wake */
> > > > +	wake_up_all(&gt->sriov.vf.migration.wq);
> > Then with [1], move this wakeup to vf_post_migration_fixups after all fixups.
> > 
> > Matt
> > 
> > > >   }
> > > >   static void vf_start_migration_recovery(struct xe_gt *gt)
> > > > @@ -858,7 +856,7 @@ static void vf_start_migration_recovery(struct xe_gt *gt)
> > > >   	    !gt->sriov.vf.migration.recovery_teardown) {
> > > >   		gt->sriov.vf.migration.recovery_queued = true;
> > > >   		WRITE_ONCE(gt->sriov.vf.migration.recovery_inprogress, true);
> > > > -		WRITE_ONCE(gt->sriov.vf.migration.ggtt_need_fixes, true);
> > > > +		WRITE_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes, true);
> > > >   		smp_wmb();	/* Ensure above writes visible before wake */
> > > >   		xe_guc_ct_wake_waiters(&gt->uc.guc.ct);
> > > > @@ -1303,7 +1301,7 @@ static void vf_post_migration_abort(struct xe_gt *gt)
> > > >   {
> > > >   	spin_lock_irq(&gt->sriov.vf.migration.lock);
> > > >   	WRITE_ONCE(gt->sriov.vf.migration.recovery_inprogress, false);
> > > > -	WRITE_ONCE(gt->sriov.vf.migration.ggtt_need_fixes, false);
> > > > +	WRITE_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes, false);
> > > >   	spin_unlock_irq(&gt->sriov.vf.migration.lock);
> > > >   	wake_up_all(&gt->sriov.vf.migration.wq);
> > > > @@ -1499,7 +1497,7 @@ bool xe_gt_sriov_vf_recovery_pending(struct xe_gt *gt)
> > > >   	return READ_ONCE(gt->sriov.vf.migration.recovery_inprogress);
> > > >   }
> > > > -static bool vf_valid_ggtt(struct xe_gt *gt)
> > > > +static bool vf_valid_default_lrc(struct xe_gt *gt)
> > > >   {
> > > >   	struct xe_memirq *memirq = &gt_to_tile(gt)->memirq;
> > > >   	bool irq_pending = xe_device_uses_memirq(gt_to_xe(gt)) &&
> > > > @@ -1507,17 +1505,17 @@ static bool vf_valid_ggtt(struct xe_gt *gt)
> > > >   	xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
> > > > -	if (irq_pending || READ_ONCE(gt->sriov.vf.migration.ggtt_need_fixes))
> > > > +	if (irq_pending || READ_ONCE(gt->sriov.vf.migration.default_lrcs_need_fixes))
> > > >   		return false;
> > > >   	return true;
> > > >   }
> > > >   /**
> > > > - * xe_gt_sriov_vf_wait_valid_ggtt() - VF wait for valid GGTT addresses
> > > > + * xe_gt_sriov_vf_wait_valid_default_lrc() - wait for valid GGTT refs in default LRCs
> > > >    * @gt: the &xe_gt
> > > >    */
> > > > -void xe_gt_sriov_vf_wait_valid_ggtt(struct xe_gt *gt)
> > > > +void xe_gt_sriov_vf_wait_valid_default_lrc(struct xe_gt *gt)
> > > >   {
> > > >   	int ret;
> > > > @@ -1526,7 +1524,7 @@ void xe_gt_sriov_vf_wait_valid_ggtt(struct xe_gt *gt)
> > > >   		return;
> > > >   	ret = wait_event_interruptible_timeout(gt->sriov.vf.migration.wq,
> > > > -					       vf_valid_ggtt(gt),
> > > > +					       vf_valid_default_lrc(gt),
> > > >   					       HZ * 5);
> > > >   	xe_gt_WARN_ON(gt, !ret);
> > > >   }
> > > > diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
> > > > index 7d97189c2d3d..70232dc38f9a 100644
> > > > --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
> > > > +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
> > > > @@ -39,6 +39,6 @@ void xe_gt_sriov_vf_print_config(struct xe_gt *gt, struct drm_printer *p);
> > > >   void xe_gt_sriov_vf_print_runtime(struct xe_gt *gt, struct drm_printer *p);
> > > >   void xe_gt_sriov_vf_print_version(struct xe_gt *gt, struct drm_printer *p);
> > > > -void xe_gt_sriov_vf_wait_valid_ggtt(struct xe_gt *gt);
> > > > +void xe_gt_sriov_vf_wait_valid_default_lrc(struct xe_gt *gt);
> > > >   #endif
> > > > diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> > > > index 4ef881b9b662..8be181bf3cf3 100644
> > > > --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> > > > +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> > > > @@ -73,8 +73,8 @@ struct xe_gt_sriov_vf_migration {
> > > >   	bool recovery_queued;
> > > >   	/** @recovery_inprogress: VF post migration recovery in progress */
> > > >   	bool recovery_inprogress;
> > > > -	/** @ggtt_need_fixes: VF GGTT needs fixes */
> > > > -	bool ggtt_need_fixes;
> > > > +	/** @default_lrcs_need_fixes: GGTT refs within default LRCs need fixes */
> > > > +	bool default_lrcs_need_fixes;
> > > >   };
> > > >   /**
> > > > -- 
> > > > 2.25.1
> > > > 

[PATCH v2 4/5] drm/xe/vf: Redo LRC creation while in VF fixups

[Tomasz Lis]

If the xe module within a VM was creating a new LRC during
save/restore, this LRC will be invalid. The fixups procedure
may not be able to reach it, as there will be a race to add
the new LRC reference to an exec queue.

Testing suggests that even if new LRC which was being created
during VM migration is added to EQ in time for fixups, said
LRC may still remain damaged.

Free the incorrectly created LRC, and trigger a re-run of the
creation, but only after waiting for default LRC fixups.

Since LRC creation is many times faster than fixups procedure
(because fixups include GuC handshake), checking once at
the end of LRC creation is enough to ensure that the fixups
running in parallel will be spotted.

Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
---
 drivers/gpu/drm/xe/xe_exec_queue.c  | 6 ++++++
 drivers/gpu/drm/xe/xe_gt_sriov_vf.c | 8 ++++++++
 drivers/gpu/drm/xe/xe_gt_sriov_vf.h | 1 +
 3 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 6eb561086e1c..2ebf25a35557 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -316,6 +316,12 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
 			err = PTR_ERR(lrc);
 			goto err_lrc;
 		}
+		if (!xe_gt_vf_valid_default_lrc(q->gt)) {
+			xe_lrc_put(lrc);
+			i--;
+			continue;
+		}
+
 
 		/* Pairs with READ_ONCE to xe_exec_queue_contexts_hwsp_rebase */
 		WRITE_ONCE(q->lrc[i], lrc);
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
index 5ce06031018d..ff9fb9196486 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
@@ -1511,6 +1511,14 @@ static bool vf_valid_default_lrc(struct xe_gt *gt)
 	return true;
 }
 
+bool xe_gt_vf_valid_default_lrc(struct xe_gt *gt)
+{
+	if (!IS_SRIOV_VF(gt_to_xe(gt)) ||
+	    !xe_sriov_vf_migration_supported(gt_to_xe(gt)))
+		return true;
+	return vf_valid_default_lrc(gt);
+}
+
 /**
  * xe_gt_sriov_vf_wait_valid_default_lrc() - wait for valid GGTT refs in default LRCs
  * @gt: the &xe_gt
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
index 70232dc38f9a..8c21b8ab2f16 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
@@ -39,6 +39,7 @@ void xe_gt_sriov_vf_print_config(struct xe_gt *gt, struct drm_printer *p);
 void xe_gt_sriov_vf_print_runtime(struct xe_gt *gt, struct drm_printer *p);
 void xe_gt_sriov_vf_print_version(struct xe_gt *gt, struct drm_printer *p);
 
+bool xe_gt_vf_valid_default_lrc(struct xe_gt *gt);
 void xe_gt_sriov_vf_wait_valid_default_lrc(struct xe_gt *gt);
 
 #endif
-- 
2.25.1

[PATCH v2 5/5] drm/xe/vf: Use marker to catch fixups during LRC creation

[Tomasz Lis]

When LRC is created during fixups, it may have invalid state. Ensure
that all such situations are caught, so that LRC creation can be
repeated.

Due to VM having arbitrarly set amount of CPU cores, it is possible
to limit the amount to 1. In such case, there is a possibility that
kernel will switch CPU contexts in a way which makes previously used
detection methods miss a VF migration recovery running in parallel
(by simply not switching to the LRC creation thread during recovery).

This possibility is not only theoretical, it was revealed by testing
that in a small percentage of specially crafted test cases, the
resulting LRC is damaged and causes GPU hang.

With the additional atomic value increased after fixups, any VF
migration that avoided the usual detection during LRC creation will
be caught.

Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
---
 drivers/gpu/drm/xe/xe_exec_queue.c        | 6 +++++-
 drivers/gpu/drm/xe/xe_gt_sriov_vf.c       | 7 +++++++
 drivers/gpu/drm/xe/xe_gt_sriov_vf.h       | 1 +
 drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h | 2 ++
 4 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 2ebf25a35557..a8d26fece38a 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -308,15 +308,19 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
 	 */
 	for (i = 0; i < q->width; ++i) {
 		struct xe_lrc *lrc;
+		int marker;
 
 		xe_gt_sriov_vf_wait_valid_default_lrc(q->gt);
+		marker = xe_vf_migration_fixups_complete_count(q->gt);
+
 		lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,
 				    xe_lrc_ring_size(), q->msix_vec, flags);
 		if (IS_ERR(lrc)) {
 			err = PTR_ERR(lrc);
 			goto err_lrc;
 		}
-		if (!xe_gt_vf_valid_default_lrc(q->gt)) {
+		if (!xe_gt_vf_valid_default_lrc(q->gt) ||
+		    marker != xe_vf_migration_fixups_complete_count(q->gt)) {
 			xe_lrc_put(lrc);
 			i--;
 			continue;
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
index ff9fb9196486..240c53b07eb3 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
@@ -1254,6 +1254,11 @@ static size_t post_migration_scratch_size(struct xe_device *xe)
 	return max(xe_lrc_reg_size(xe), LRC_WA_BB_SIZE);
 }
 
+int xe_vf_migration_fixups_complete_count(struct xe_gt *gt)
+{
+	return atomic_read(&gt->sriov.vf.migration.fixups_complete);
+}
+
 static int vf_post_migration_fixups(struct xe_gt *gt)
 {
 	void *buf = gt->sriov.vf.migration.scratch;
@@ -1274,6 +1279,8 @@ static int vf_post_migration_fixups(struct xe_gt *gt)
 	if (err)
 		return err;
 
+	atomic_inc(&gt->sriov.vf.migration.fixups_complete);
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
index 8c21b8ab2f16..4651c7f3335c 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
@@ -41,5 +41,6 @@ void xe_gt_sriov_vf_print_version(struct xe_gt *gt, struct drm_printer *p);
 
 bool xe_gt_vf_valid_default_lrc(struct xe_gt *gt);
 void xe_gt_sriov_vf_wait_valid_default_lrc(struct xe_gt *gt);
+int xe_vf_migration_fixups_complete_count(struct xe_gt *gt);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
index 8be181bf3cf3..41d6199e3508 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
@@ -54,6 +54,8 @@ struct xe_gt_sriov_vf_migration {
 	wait_queue_head_t wq;
 	/** @scratch: Scratch memory for VF recovery */
 	void *scratch;
+	/** @fixups_complete: Counts completed fixups stages */
+	atomic_t fixups_complete;
 	/** @debug: Debug hooks for delaying migration */
 	struct {
 		/**
-- 
2.25.1

Re: [PATCH v2 5/5] drm/xe/vf: Use marker to catch fixups during LRC creation

[Matthew Brost]

On Thu, Feb 19, 2026 at 12:21:58AM +0100, Tomasz Lis wrote:
> When LRC is created during fixups, it may have invalid state. Ensure
> that all such situations are caught, so that LRC creation can be
> repeated.
> 
> Due to VM having arbitrarly set amount of CPU cores, it is possible
> to limit the amount to 1. In such case, there is a possibility that
> kernel will switch CPU contexts in a way which makes previously used
> detection methods miss a VF migration recovery running in parallel
> (by simply not switching to the LRC creation thread during recovery).
> 
> This possibility is not only theoretical, it was revealed by testing
> that in a small percentage of specially crafted test cases, the
> resulting LRC is damaged and causes GPU hang.
> 
> With the additional atomic value increased after fixups, any VF
> migration that avoided the usual detection during LRC creation will
> be caught.
> 
> Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_exec_queue.c        | 6 +++++-
>  drivers/gpu/drm/xe/xe_gt_sriov_vf.c       | 7 +++++++
>  drivers/gpu/drm/xe/xe_gt_sriov_vf.h       | 1 +
>  drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h | 2 ++
>  4 files changed, 15 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> index 2ebf25a35557..a8d26fece38a 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> @@ -308,15 +308,19 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
>  	 */
>  	for (i = 0; i < q->width; ++i) {
>  		struct xe_lrc *lrc;
> +		int marker;
>  
>  		xe_gt_sriov_vf_wait_valid_default_lrc(q->gt);
> +		marker = xe_vf_migration_fixups_complete_count(q->gt);
> +
>  		lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,
>  				    xe_lrc_ring_size(), q->msix_vec, flags);
>  		if (IS_ERR(lrc)) {
>  			err = PTR_ERR(lrc);
>  			goto err_lrc;
>  		}
> -		if (!xe_gt_vf_valid_default_lrc(q->gt)) {
> +		if (!xe_gt_vf_valid_default_lrc(q->gt) ||
> +		    marker != xe_vf_migration_fixups_complete_count(q->gt)) {
>  			xe_lrc_put(lrc);

What exactly does this marker buy us? Couldn't patch #3 just signal
'gt->sriov.vf.migration.default_lrcs_need_fixes' where
'gt->sriov.vf.migration.fixups_complete' is incremented in this patch?

Then just drop this patch?

Matt

>  			i--;
>  			continue;
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> index ff9fb9196486..240c53b07eb3 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> @@ -1254,6 +1254,11 @@ static size_t post_migration_scratch_size(struct xe_device *xe)
>  	return max(xe_lrc_reg_size(xe), LRC_WA_BB_SIZE);
>  }
>  
> +int xe_vf_migration_fixups_complete_count(struct xe_gt *gt)
> +{
> +	return atomic_read(&gt->sriov.vf.migration.fixups_complete);
> +}
> +
>  static int vf_post_migration_fixups(struct xe_gt *gt)
>  {
>  	void *buf = gt->sriov.vf.migration.scratch;
> @@ -1274,6 +1279,8 @@ static int vf_post_migration_fixups(struct xe_gt *gt)
>  	if (err)
>  		return err;
>  
> +	atomic_inc(&gt->sriov.vf.migration.fixups_complete);
> +
>  	return 0;
>  }
>  
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
> index 8c21b8ab2f16..4651c7f3335c 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
> @@ -41,5 +41,6 @@ void xe_gt_sriov_vf_print_version(struct xe_gt *gt, struct drm_printer *p);
>  
>  bool xe_gt_vf_valid_default_lrc(struct xe_gt *gt);
>  void xe_gt_sriov_vf_wait_valid_default_lrc(struct xe_gt *gt);
> +int xe_vf_migration_fixups_complete_count(struct xe_gt *gt);
>  
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> index 8be181bf3cf3..41d6199e3508 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> @@ -54,6 +54,8 @@ struct xe_gt_sriov_vf_migration {
>  	wait_queue_head_t wq;
>  	/** @scratch: Scratch memory for VF recovery */
>  	void *scratch;
> +	/** @fixups_complete: Counts completed fixups stages */
> +	atomic_t fixups_complete;
>  	/** @debug: Debug hooks for delaying migration */
>  	struct {
>  		/**
> -- 
> 2.25.1
> 

Re: [PATCH v2 5/5] drm/xe/vf: Use marker to catch fixups during LRC creation

[Lis, Tomasz]

[-- Attachment #1: Type: text/plain, Size: 6161 bytes --]


On 2/19/2026 9:33 PM, Matthew Brost wrote:
> On Thu, Feb 19, 2026 at 12:21:58AM +0100, Tomasz Lis wrote:
>> When LRC is created during fixups, it may have invalid state. Ensure
>> that all such situations are caught, so that LRC creation can be
>> repeated.
>>
>> Due to VM having arbitrarly set amount of CPU cores, it is possible
>> to limit the amount to 1. In such case, there is a possibility that
>> kernel will switch CPU contexts in a way which makes previously used
>> detection methods miss a VF migration recovery running in parallel
>> (by simply not switching to the LRC creation thread during recovery).
>>
>> This possibility is not only theoretical, it was revealed by testing
>> that in a small percentage of specially crafted test cases, the
>> resulting LRC is damaged and causes GPU hang.
>>
>> With the additional atomic value increased after fixups, any VF
>> migration that avoided the usual detection during LRC creation will
>> be caught.
>>
>> Signed-off-by: Tomasz Lis<tomasz.lis@intel.com>
>> ---
>>   drivers/gpu/drm/xe/xe_exec_queue.c        | 6 +++++-
>>   drivers/gpu/drm/xe/xe_gt_sriov_vf.c       | 7 +++++++
>>   drivers/gpu/drm/xe/xe_gt_sriov_vf.h       | 1 +
>>   drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h | 2 ++
>>   4 files changed, 15 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
>> index 2ebf25a35557..a8d26fece38a 100644
>> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
>> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
>> @@ -308,15 +308,19 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
>>   	 */
>>   	for (i = 0; i < q->width; ++i) {
>>   		struct xe_lrc *lrc;
>> +		int marker;
>>   
>>   		xe_gt_sriov_vf_wait_valid_default_lrc(q->gt);
>> +		marker = xe_vf_migration_fixups_complete_count(q->gt);
>> +
>>   		lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,
>>   				    xe_lrc_ring_size(), q->msix_vec, flags);
>>   		if (IS_ERR(lrc)) {
>>   			err = PTR_ERR(lrc);
>>   			goto err_lrc;
>>   		}
>> -		if (!xe_gt_vf_valid_default_lrc(q->gt)) {
>> +		if (!xe_gt_vf_valid_default_lrc(q->gt) ||
>> +		    marker != xe_vf_migration_fixups_complete_count(q->gt)) {
>>   			xe_lrc_put(lrc);
> What exactly does this marker buy us? Couldn't patch #3 just signal
> 'gt->sriov.vf.migration.default_lrcs_need_fixes' where
> 'gt->sriov.vf.migration.fixups_complete' is incremented in this patch?
>
> Then just drop this patch?

This solves an issue which was found by test fails, so it's not 
theoretical (though it is a rare sporadic):

Consider a VM with one-core CPU, where migration happened while __xe_exec_queue_init() was executing, during creation of LRCs - so after xe_gt_sriov_vf_wait_valid_default_lrc() has finished, stop was inside xe_lrc_create().
It is possible that this queue creation function will be preempted and will remain without progress during the whole migration recovery. When the function finally gets back to being executed, it is already past the recovery - and xe_gt_vf_valid_default_lrc() will return true.

This means the whole function will run as normal, without any code flow change caused by migration. In particular, a LRC which was partially created before migration, and partially after recovery, will be kept.
There are two problems with that: one is that depending on when the CPU context was switched, this LRC may have GGTT references and may have skipped fixups. The other is that LRC created during VF migration is sometimes damaged even after fixups, so it needs to be freed and re-created - and we did not detected that, leaving the LRC as is.

The `default_lrcs_need_fixes` tells us the recovery is still in 
progress, but it doesn't tell us whether it already finished before and 
we've missed it.

I originally didn't though it was achievable, as GuC communication is 
slow and something will be always executed while the VF recovery is 
waiting for GuC. But it turns out the CPU may get switched to other 
tasks, leaving the queue creation starving for the whole recovery.

What can I improve in the description to make this clearer?

-Tomasz

> Matt
>
>>   			i--;
>>   			continue;
>> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
>> index ff9fb9196486..240c53b07eb3 100644
>> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
>> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
>> @@ -1254,6 +1254,11 @@ static size_t post_migration_scratch_size(struct xe_device *xe)
>>   	return max(xe_lrc_reg_size(xe), LRC_WA_BB_SIZE);
>>   }
>>   
>> +int xe_vf_migration_fixups_complete_count(struct xe_gt *gt)
>> +{
>> +	return atomic_read(&gt->sriov.vf.migration.fixups_complete);
>> +}
>> +
>>   static int vf_post_migration_fixups(struct xe_gt *gt)
>>   {
>>   	void *buf = gt->sriov.vf.migration.scratch;
>> @@ -1274,6 +1279,8 @@ static int vf_post_migration_fixups(struct xe_gt *gt)
>>   	if (err)
>>   		return err;
>>   
>> +	atomic_inc(&gt->sriov.vf.migration.fixups_complete);
>> +
>>   	return 0;
>>   }
>>   
>> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
>> index 8c21b8ab2f16..4651c7f3335c 100644
>> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
>> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
>> @@ -41,5 +41,6 @@ void xe_gt_sriov_vf_print_version(struct xe_gt *gt, struct drm_printer *p);
>>   
>>   bool xe_gt_vf_valid_default_lrc(struct xe_gt *gt);
>>   void xe_gt_sriov_vf_wait_valid_default_lrc(struct xe_gt *gt);
>> +int xe_vf_migration_fixups_complete_count(struct xe_gt *gt);
>>   
>>   #endif
>> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
>> index 8be181bf3cf3..41d6199e3508 100644
>> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
>> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
>> @@ -54,6 +54,8 @@ struct xe_gt_sriov_vf_migration {
>>   	wait_queue_head_t wq;
>>   	/** @scratch: Scratch memory for VF recovery */
>>   	void *scratch;
>> +	/** @fixups_complete: Counts completed fixups stages */
>> +	atomic_t fixups_complete;
>>   	/** @debug: Debug hooks for delaying migration */
>>   	struct {
>>   		/**
>> -- 
>> 2.25.1
>>

[-- Attachment #2: Type: text/html, Size: 7015 bytes --]

Re: [PATCH v2 5/5] drm/xe/vf: Use marker to catch fixups during LRC creation

[Matthew Brost]

On Fri, Feb 20, 2026 at 05:43:50PM +0100, Lis, Tomasz wrote:
> 
> On 2/19/2026 9:33 PM, Matthew Brost wrote:
> > On Thu, Feb 19, 2026 at 12:21:58AM +0100, Tomasz Lis wrote:
> > > When LRC is created during fixups, it may have invalid state. Ensure
> > > that all such situations are caught, so that LRC creation can be
> > > repeated.
> > > 
> > > Due to VM having arbitrarly set amount of CPU cores, it is possible
> > > to limit the amount to 1. In such case, there is a possibility that
> > > kernel will switch CPU contexts in a way which makes previously used
> > > detection methods miss a VF migration recovery running in parallel
> > > (by simply not switching to the LRC creation thread during recovery).
> > > 
> > > This possibility is not only theoretical, it was revealed by testing
> > > that in a small percentage of specially crafted test cases, the
> > > resulting LRC is damaged and causes GPU hang.
> > > 
> > > With the additional atomic value increased after fixups, any VF
> > > migration that avoided the usual detection during LRC creation will
> > > be caught.
> > > 
> > > Signed-off-by: Tomasz Lis<tomasz.lis@intel.com>
> > > ---
> > >   drivers/gpu/drm/xe/xe_exec_queue.c        | 6 +++++-
> > >   drivers/gpu/drm/xe/xe_gt_sriov_vf.c       | 7 +++++++
> > >   drivers/gpu/drm/xe/xe_gt_sriov_vf.h       | 1 +
> > >   drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h | 2 ++
> > >   4 files changed, 15 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> > > index 2ebf25a35557..a8d26fece38a 100644
> > > --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> > > +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> > > @@ -308,15 +308,19 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
> > >   	 */
> > >   	for (i = 0; i < q->width; ++i) {
> > >   		struct xe_lrc *lrc;
> > > +		int marker;
> > >   		xe_gt_sriov_vf_wait_valid_default_lrc(q->gt);
> > > +		marker = xe_vf_migration_fixups_complete_count(q->gt);
> > > +
> > >   		lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,
> > >   				    xe_lrc_ring_size(), q->msix_vec, flags);
> > >   		if (IS_ERR(lrc)) {
> > >   			err = PTR_ERR(lrc);
> > >   			goto err_lrc;
> > >   		}
> > > -		if (!xe_gt_vf_valid_default_lrc(q->gt)) {
> > > +		if (!xe_gt_vf_valid_default_lrc(q->gt) ||
> > > +		    marker != xe_vf_migration_fixups_complete_count(q->gt)) {
> > >   			xe_lrc_put(lrc);
> > What exactly does this marker buy us? Couldn't patch #3 just signal
> > 'gt->sriov.vf.migration.default_lrcs_need_fixes' where
> > 'gt->sriov.vf.migration.fixups_complete' is incremented in this patch?
> > 
> > Then just drop this patch?
> 
> This solves an issue which was found by test fails, so it's not theoretical
> (though it is a rare sporadic):
> 

I agree the existing code is broken and need to be fixed.

> Consider a VM with one-core CPU, where migration happened while __xe_exec_queue_init() was executing, during creation of LRCs - so after xe_gt_sriov_vf_wait_valid_default_lrc() has finished, stop was inside xe_lrc_create().
> It is possible that this queue creation function will be preempted and will remain without progress during the whole migration recovery. When the function finally gets back to being executed, it is already past the recovery - and xe_gt_vf_valid_default_lrc() will return true.
> 
> This means the whole function will run as normal, without any code flow change caused by migration. In particular, a LRC which was partially created before migration, and partially after recovery, will be kept.
> There are two problems with that: one is that depending on when the CPU context was switched, this LRC may have GGTT references and may have skipped fixups. The other is that LRC created during VF migration is sometimes damaged even after fixups, so it needs to be freed and re-created - and we did not detected that, leaving the LRC as is.
> 

Ok, yes I see the problem but the way you have this coded is still racey
and bit ugly on function calls.
 
How about...


        for (i = 0; i < q->width; ++i) {
		struct xe_lrc *__lrc = NULL;

		do { 
			marker = xe_gt_sriov_vf_wait_valid_default_lrc(q->gt);

			lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,
					    xe_lrc_ring_size(), q->msix_vec, flags);
			if (IS_ERR(lrc)) {
				err = PTR_ERR(lrc);
				goto err_lrc;
			}

			/* Pairs with READ_ONCE to xe_exec_queue_contexts_hwsp_rebase */
			WRITE_ONCE(q->lrc[i], lrc);

			if (__lrc)
				xe_lrc_put(__lrc);
			__lrc = lrc;
		} while (marker != xe_vf_migration_fixups_marker(q->gt);
        }

So we basically combine xe_gt_sriov_vf_wait_valid_default_lrc and
xe_vf_migration_fixups_complete_count into a single function.

Like xe_gt_vf_valid_default_lrc and
xe_vf_migration_fixups_complete_count are combined into
xe_vf_migration_fixups_marker. The implementation would be something
like:

xe_vf_migration_fixups_marker(...)
{
	if (!xe_gt_vf_valid_default_lrc(gt))
		return -1;

	return atomic_read(&gt->sriov.vf.migration.fixups_complete);
}

The lastly, we move the marker check after making the LRC available to
the fixup handler. My code does have bug in it though, the fixup handler
can UAF on q->lrc[i] if we retry here in __xe_exec_queue_init.

So let's add some helpers for LRC access on the queue...

/* Use this in __xe_exec_queue_init */
void xe_exec_queue_set_lrc(struct xe_exec_queue *q, xe_lrc *lrc, int idx)
{
	xe_assert(..., idx < q->width);

	spin_lock(&q->lrc_lookup);
	q->lrc[i] = lrc;
	spin_unlock(&q->lrc_lookup);
}

/* Use this in xe_exec_queue_contexts_hwsp_rebase */
struct xe_exec_queue *xe_exec_queue_get_lrc(struct xe_exec_queue *q, int idx)
{
	struct xe_lrc *lrc;

	xe_assert(..., idx < q->width);

	spin_lock(&q->lrc_lookup);
	lrc = q->lrc[i];
	if (lrc)
		xe_lrc_get(lrc);
	spin_unlock(&q->lrc_lookup);

	return lrc;
}

What do you think?

Matt

> The `default_lrcs_need_fixes` tells us the recovery is still in progress,
> but it doesn't tell us whether it already finished before and we've missed
> it.
> 
> I originally didn't though it was achievable, as GuC communication is slow
> and something will be always executed while the VF recovery is waiting for
> GuC. But it turns out the CPU may get switched to other tasks, leaving the
> queue creation starving for the whole recovery.
> 
> What can I improve in the description to make this clearer?
> 
> -Tomasz
> 
> > Matt
> > 
> > >   			i--;
> > >   			continue;
> > > diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> > > index ff9fb9196486..240c53b07eb3 100644
> > > --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> > > +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> > > @@ -1254,6 +1254,11 @@ static size_t post_migration_scratch_size(struct xe_device *xe)
> > >   	return max(xe_lrc_reg_size(xe), LRC_WA_BB_SIZE);
> > >   }
> > > +int xe_vf_migration_fixups_complete_count(struct xe_gt *gt)
> > > +{
> > > +	return atomic_read(&gt->sriov.vf.migration.fixups_complete);
> > > +}
> > > +
> > >   static int vf_post_migration_fixups(struct xe_gt *gt)
> > >   {
> > >   	void *buf = gt->sriov.vf.migration.scratch;
> > > @@ -1274,6 +1279,8 @@ static int vf_post_migration_fixups(struct xe_gt *gt)
> > >   	if (err)
> > >   		return err;
> > > +	atomic_inc(&gt->sriov.vf.migration.fixups_complete);
> > > +
> > >   	return 0;
> > >   }
> > > diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
> > > index 8c21b8ab2f16..4651c7f3335c 100644
> > > --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
> > > +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
> > > @@ -41,5 +41,6 @@ void xe_gt_sriov_vf_print_version(struct xe_gt *gt, struct drm_printer *p);
> > >   bool xe_gt_vf_valid_default_lrc(struct xe_gt *gt);
> > >   void xe_gt_sriov_vf_wait_valid_default_lrc(struct xe_gt *gt);
> > > +int xe_vf_migration_fixups_complete_count(struct xe_gt *gt);
> > >   #endif
> > > diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> > > index 8be181bf3cf3..41d6199e3508 100644
> > > --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> > > +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> > > @@ -54,6 +54,8 @@ struct xe_gt_sriov_vf_migration {
> > >   	wait_queue_head_t wq;
> > >   	/** @scratch: Scratch memory for VF recovery */
> > >   	void *scratch;
> > > +	/** @fixups_complete: Counts completed fixups stages */
> > > +	atomic_t fixups_complete;
> > >   	/** @debug: Debug hooks for delaying migration */
> > >   	struct {
> > >   		/**
> > > -- 
> > > 2.25.1
> > > 

✓ CI.KUnit: success for drm/xe/vf: Fix exec queue creation during post-migration recovery (rev2)

[Patchwork]

== Series Details ==

Series: drm/xe/vf: Fix exec queue creation during post-migration recovery (rev2)
URL   : https://patchwork.freedesktop.org/series/161287/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[23:33:09] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:33:14] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:33:45] Starting KUnit Kernel (1/1)...
[23:33:45] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:33:45] ================== guc_buf (11 subtests) ===================
[23:33:45] [PASSED] test_smallest
[23:33:45] [PASSED] test_largest
[23:33:45] [PASSED] test_granular
[23:33:45] [PASSED] test_unique
[23:33:45] [PASSED] test_overlap
[23:33:45] [PASSED] test_reusable
[23:33:45] [PASSED] test_too_big
[23:33:45] [PASSED] test_flush
[23:33:45] [PASSED] test_lookup
[23:33:45] [PASSED] test_data
[23:33:45] [PASSED] test_class
[23:33:45] ===================== [PASSED] guc_buf =====================
[23:33:45] =================== guc_dbm (7 subtests) ===================
[23:33:46] [PASSED] test_empty
[23:33:46] [PASSED] test_default
[23:33:46] ======================== test_size  ========================
[23:33:46] [PASSED] 4
[23:33:46] [PASSED] 8
[23:33:46] [PASSED] 32
[23:33:46] [PASSED] 256
[23:33:46] ==================== [PASSED] test_size ====================
[23:33:46] ======================= test_reuse  ========================
[23:33:46] [PASSED] 4
[23:33:46] [PASSED] 8
[23:33:46] [PASSED] 32
[23:33:46] [PASSED] 256
[23:33:46] =================== [PASSED] test_reuse ====================
[23:33:46] =================== test_range_overlap  ====================
[23:33:46] [PASSED] 4
[23:33:46] [PASSED] 8
[23:33:46] [PASSED] 32
[23:33:46] [PASSED] 256
[23:33:46] =============== [PASSED] test_range_overlap ================
[23:33:46] =================== test_range_compact  ====================
[23:33:46] [PASSED] 4
[23:33:46] [PASSED] 8
[23:33:46] [PASSED] 32
[23:33:46] [PASSED] 256
[23:33:46] =============== [PASSED] test_range_compact ================
[23:33:46] ==================== test_range_spare  =====================
[23:33:46] [PASSED] 4
[23:33:46] [PASSED] 8
[23:33:46] [PASSED] 32
[23:33:46] [PASSED] 256
[23:33:46] ================ [PASSED] test_range_spare =================
[23:33:46] ===================== [PASSED] guc_dbm =====================
[23:33:46] =================== guc_idm (6 subtests) ===================
[23:33:46] [PASSED] bad_init
[23:33:46] [PASSED] no_init
[23:33:46] [PASSED] init_fini
[23:33:46] [PASSED] check_used
[23:33:46] [PASSED] check_quota
[23:33:46] [PASSED] check_all
[23:33:46] ===================== [PASSED] guc_idm =====================
[23:33:46] ================== no_relay (3 subtests) ===================
[23:33:46] [PASSED] xe_drops_guc2pf_if_not_ready
[23:33:46] [PASSED] xe_drops_guc2vf_if_not_ready
[23:33:46] [PASSED] xe_rejects_send_if_not_ready
[23:33:46] ==================== [PASSED] no_relay =====================
[23:33:46] ================== pf_relay (14 subtests) ==================
[23:33:46] [PASSED] pf_rejects_guc2pf_too_short
[23:33:46] [PASSED] pf_rejects_guc2pf_too_long
[23:33:46] [PASSED] pf_rejects_guc2pf_no_payload
[23:33:46] [PASSED] pf_fails_no_payload
[23:33:46] [PASSED] pf_fails_bad_origin
[23:33:46] [PASSED] pf_fails_bad_type
[23:33:46] [PASSED] pf_txn_reports_error
[23:33:46] [PASSED] pf_txn_sends_pf2guc
[23:33:46] [PASSED] pf_sends_pf2guc
[23:33:46] [SKIPPED] pf_loopback_nop
[23:33:46] [SKIPPED] pf_loopback_echo
[23:33:46] [SKIPPED] pf_loopback_fail
[23:33:46] [SKIPPED] pf_loopback_busy
[23:33:46] [SKIPPED] pf_loopback_retry
[23:33:46] ==================== [PASSED] pf_relay =====================
[23:33:46] ================== vf_relay (3 subtests) ===================
[23:33:46] [PASSED] vf_rejects_guc2vf_too_short
[23:33:46] [PASSED] vf_rejects_guc2vf_too_long
[23:33:46] [PASSED] vf_rejects_guc2vf_no_payload
[23:33:46] ==================== [PASSED] vf_relay =====================
[23:33:46] ================ pf_gt_config (6 subtests) =================
[23:33:46] [PASSED] fair_contexts_1vf
[23:33:46] [PASSED] fair_doorbells_1vf
[23:33:46] [PASSED] fair_ggtt_1vf
[23:33:46] ====================== fair_contexts  ======================
[23:33:46] [PASSED] 1 VF
[23:33:46] [PASSED] 2 VFs
[23:33:46] [PASSED] 3 VFs
[23:33:46] [PASSED] 4 VFs
[23:33:46] [PASSED] 5 VFs
[23:33:46] [PASSED] 6 VFs
[23:33:46] [PASSED] 7 VFs
[23:33:46] [PASSED] 8 VFs
[23:33:46] [PASSED] 9 VFs
[23:33:46] [PASSED] 10 VFs
[23:33:46] [PASSED] 11 VFs
[23:33:46] [PASSED] 12 VFs
[23:33:46] [PASSED] 13 VFs
[23:33:46] [PASSED] 14 VFs
[23:33:46] [PASSED] 15 VFs
[23:33:46] [PASSED] 16 VFs
[23:33:46] [PASSED] 17 VFs
[23:33:46] [PASSED] 18 VFs
[23:33:46] [PASSED] 19 VFs
[23:33:46] [PASSED] 20 VFs
[23:33:46] [PASSED] 21 VFs
[23:33:46] [PASSED] 22 VFs
[23:33:46] [PASSED] 23 VFs
[23:33:46] [PASSED] 24 VFs
[23:33:46] [PASSED] 25 VFs
[23:33:46] [PASSED] 26 VFs
[23:33:46] [PASSED] 27 VFs
[23:33:46] [PASSED] 28 VFs
[23:33:46] [PASSED] 29 VFs
[23:33:46] [PASSED] 30 VFs
[23:33:46] [PASSED] 31 VFs
[23:33:46] [PASSED] 32 VFs
[23:33:46] [PASSED] 33 VFs
[23:33:46] [PASSED] 34 VFs
[23:33:46] [PASSED] 35 VFs
[23:33:46] [PASSED] 36 VFs
[23:33:46] [PASSED] 37 VFs
[23:33:46] [PASSED] 38 VFs
[23:33:46] [PASSED] 39 VFs
[23:33:46] [PASSED] 40 VFs
[23:33:46] [PASSED] 41 VFs
[23:33:46] [PASSED] 42 VFs
[23:33:46] [PASSED] 43 VFs
[23:33:46] [PASSED] 44 VFs
[23:33:46] [PASSED] 45 VFs
[23:33:46] [PASSED] 46 VFs
[23:33:46] [PASSED] 47 VFs
[23:33:46] [PASSED] 48 VFs
[23:33:46] [PASSED] 49 VFs
[23:33:46] [PASSED] 50 VFs
[23:33:46] [PASSED] 51 VFs
[23:33:46] [PASSED] 52 VFs
[23:33:46] [PASSED] 53 VFs
[23:33:46] [PASSED] 54 VFs
[23:33:46] [PASSED] 55 VFs
[23:33:46] [PASSED] 56 VFs
[23:33:46] [PASSED] 57 VFs
[23:33:46] [PASSED] 58 VFs
[23:33:46] [PASSED] 59 VFs
[23:33:46] [PASSED] 60 VFs
[23:33:46] [PASSED] 61 VFs
[23:33:46] [PASSED] 62 VFs
[23:33:46] [PASSED] 63 VFs
[23:33:46] ================== [PASSED] fair_contexts ==================
[23:33:46] ===================== fair_doorbells  ======================
[23:33:46] [PASSED] 1 VF
[23:33:46] [PASSED] 2 VFs
[23:33:46] [PASSED] 3 VFs
[23:33:46] [PASSED] 4 VFs
[23:33:46] [PASSED] 5 VFs
[23:33:46] [PASSED] 6 VFs
[23:33:46] [PASSED] 7 VFs
[23:33:46] [PASSED] 8 VFs
[23:33:46] [PASSED] 9 VFs
[23:33:46] [PASSED] 10 VFs
[23:33:46] [PASSED] 11 VFs
[23:33:46] [PASSED] 12 VFs
[23:33:46] [PASSED] 13 VFs
[23:33:46] [PASSED] 14 VFs
[23:33:46] [PASSED] 15 VFs
[23:33:46] [PASSED] 16 VFs
[23:33:46] [PASSED] 17 VFs
[23:33:46] [PASSED] 18 VFs
[23:33:46] [PASSED] 19 VFs
[23:33:46] [PASSED] 20 VFs
[23:33:46] [PASSED] 21 VFs
[23:33:46] [PASSED] 22 VFs
[23:33:46] [PASSED] 23 VFs
[23:33:46] [PASSED] 24 VFs
[23:33:46] [PASSED] 25 VFs
[23:33:46] [PASSED] 26 VFs
[23:33:46] [PASSED] 27 VFs
[23:33:46] [PASSED] 28 VFs
[23:33:46] [PASSED] 29 VFs
[23:33:46] [PASSED] 30 VFs
[23:33:46] [PASSED] 31 VFs
[23:33:46] [PASSED] 32 VFs
[23:33:46] [PASSED] 33 VFs
[23:33:46] [PASSED] 34 VFs
[23:33:46] [PASSED] 35 VFs
[23:33:46] [PASSED] 36 VFs
[23:33:46] [PASSED] 37 VFs
[23:33:46] [PASSED] 38 VFs
[23:33:46] [PASSED] 39 VFs
[23:33:46] [PASSED] 40 VFs
[23:33:46] [PASSED] 41 VFs
[23:33:46] [PASSED] 42 VFs
[23:33:46] [PASSED] 43 VFs
[23:33:46] [PASSED] 44 VFs
[23:33:46] [PASSED] 45 VFs
[23:33:46] [PASSED] 46 VFs
[23:33:46] [PASSED] 47 VFs
[23:33:46] [PASSED] 48 VFs
[23:33:46] [PASSED] 49 VFs
[23:33:46] [PASSED] 50 VFs
[23:33:46] [PASSED] 51 VFs
[23:33:46] [PASSED] 52 VFs
[23:33:46] [PASSED] 53 VFs
[23:33:46] [PASSED] 54 VFs
[23:33:46] [PASSED] 55 VFs
[23:33:46] [PASSED] 56 VFs
[23:33:46] [PASSED] 57 VFs
[23:33:46] [PASSED] 58 VFs
[23:33:46] [PASSED] 59 VFs
[23:33:46] [PASSED] 60 VFs
[23:33:46] [PASSED] 61 VFs
[23:33:46] [PASSED] 62 VFs
[23:33:46] [PASSED] 63 VFs
[23:33:46] ================= [PASSED] fair_doorbells ==================
[23:33:46] ======================== fair_ggtt  ========================
[23:33:46] [PASSED] 1 VF
[23:33:46] [PASSED] 2 VFs
[23:33:46] [PASSED] 3 VFs
[23:33:46] [PASSED] 4 VFs
[23:33:46] [PASSED] 5 VFs
[23:33:46] [PASSED] 6 VFs
[23:33:46] [PASSED] 7 VFs
[23:33:46] [PASSED] 8 VFs
[23:33:46] [PASSED] 9 VFs
[23:33:46] [PASSED] 10 VFs
[23:33:46] [PASSED] 11 VFs
[23:33:46] [PASSED] 12 VFs
[23:33:46] [PASSED] 13 VFs
[23:33:46] [PASSED] 14 VFs
[23:33:46] [PASSED] 15 VFs
[23:33:46] [PASSED] 16 VFs
[23:33:46] [PASSED] 17 VFs
[23:33:46] [PASSED] 18 VFs
[23:33:46] [PASSED] 19 VFs
[23:33:46] [PASSED] 20 VFs
[23:33:46] [PASSED] 21 VFs
[23:33:46] [PASSED] 22 VFs
[23:33:46] [PASSED] 23 VFs
[23:33:46] [PASSED] 24 VFs
[23:33:46] [PASSED] 25 VFs
[23:33:46] [PASSED] 26 VFs
[23:33:46] [PASSED] 27 VFs
[23:33:46] [PASSED] 28 VFs
[23:33:46] [PASSED] 29 VFs
[23:33:46] [PASSED] 30 VFs
[23:33:46] [PASSED] 31 VFs
[23:33:46] [PASSED] 32 VFs
[23:33:46] [PASSED] 33 VFs
[23:33:46] [PASSED] 34 VFs
[23:33:46] [PASSED] 35 VFs
[23:33:46] [PASSED] 36 VFs
[23:33:46] [PASSED] 37 VFs
[23:33:46] [PASSED] 38 VFs
[23:33:46] [PASSED] 39 VFs
[23:33:46] [PASSED] 40 VFs
[23:33:46] [PASSED] 41 VFs
[23:33:46] [PASSED] 42 VFs
[23:33:46] [PASSED] 43 VFs
[23:33:46] [PASSED] 44 VFs
[23:33:46] [PASSED] 45 VFs
[23:33:46] [PASSED] 46 VFs
[23:33:46] [PASSED] 47 VFs
[23:33:46] [PASSED] 48 VFs
[23:33:46] [PASSED] 49 VFs
[23:33:46] [PASSED] 50 VFs
[23:33:46] [PASSED] 51 VFs
[23:33:46] [PASSED] 52 VFs
[23:33:46] [PASSED] 53 VFs
[23:33:46] [PASSED] 54 VFs
[23:33:46] [PASSED] 55 VFs
[23:33:46] [PASSED] 56 VFs
[23:33:46] [PASSED] 57 VFs
[23:33:46] [PASSED] 58 VFs
[23:33:46] [PASSED] 59 VFs
[23:33:46] [PASSED] 60 VFs
[23:33:46] [PASSED] 61 VFs
[23:33:46] [PASSED] 62 VFs
[23:33:46] [PASSED] 63 VFs
[23:33:46] ==================== [PASSED] fair_ggtt ====================
[23:33:46] ================== [PASSED] pf_gt_config ===================
[23:33:46] ===================== lmtt (1 subtest) =====================
[23:33:46] ======================== test_ops  =========================
[23:33:46] [PASSED] 2-level
[23:33:46] [PASSED] multi-level
[23:33:46] ==================== [PASSED] test_ops =====================
[23:33:46] ====================== [PASSED] lmtt =======================
[23:33:46] ================= pf_service (11 subtests) =================
[23:33:46] [PASSED] pf_negotiate_any
[23:33:46] [PASSED] pf_negotiate_base_match
[23:33:46] [PASSED] pf_negotiate_base_newer
[23:33:46] [PASSED] pf_negotiate_base_next
[23:33:46] [SKIPPED] pf_negotiate_base_older
[23:33:46] [PASSED] pf_negotiate_base_prev
[23:33:46] [PASSED] pf_negotiate_latest_match
[23:33:46] [PASSED] pf_negotiate_latest_newer
[23:33:46] [PASSED] pf_negotiate_latest_next
[23:33:46] [SKIPPED] pf_negotiate_latest_older
[23:33:46] [SKIPPED] pf_negotiate_latest_prev
[23:33:46] =================== [PASSED] pf_service ====================
[23:33:46] ================= xe_guc_g2g (2 subtests) ==================
[23:33:46] ============== xe_live_guc_g2g_kunit_default  ==============
[23:33:46] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[23:33:46] ============== xe_live_guc_g2g_kunit_allmem  ===============
[23:33:46] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[23:33:46] =================== [SKIPPED] xe_guc_g2g ===================
[23:33:46] =================== xe_mocs (2 subtests) ===================
[23:33:46] ================ xe_live_mocs_kernel_kunit  ================
[23:33:46] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[23:33:46] ================ xe_live_mocs_reset_kunit  =================
[23:33:46] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[23:33:46] ==================== [SKIPPED] xe_mocs =====================
[23:33:46] ================= xe_migrate (2 subtests) ==================
[23:33:46] ================= xe_migrate_sanity_kunit  =================
[23:33:46] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[23:33:46] ================== xe_validate_ccs_kunit  ==================
[23:33:46] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[23:33:46] =================== [SKIPPED] xe_migrate ===================
[23:33:46] ================== xe_dma_buf (1 subtest) ==================
[23:33:46] ==================== xe_dma_buf_kunit  =====================
[23:33:46] ================ [SKIPPED] xe_dma_buf_kunit ================
[23:33:46] =================== [SKIPPED] xe_dma_buf ===================
[23:33:46] ================= xe_bo_shrink (1 subtest) =================
[23:33:46] =================== xe_bo_shrink_kunit  ====================
[23:33:46] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[23:33:46] ================== [SKIPPED] xe_bo_shrink ==================
[23:33:46] ==================== xe_bo (2 subtests) ====================
[23:33:46] ================== xe_ccs_migrate_kunit  ===================
[23:33:46] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[23:33:46] ==================== xe_bo_evict_kunit  ====================
[23:33:46] =============== [SKIPPED] xe_bo_evict_kunit ================
[23:33:46] ===================== [SKIPPED] xe_bo ======================
[23:33:46] ==================== args (13 subtests) ====================
[23:33:46] [PASSED] count_args_test
[23:33:46] [PASSED] call_args_example
[23:33:46] [PASSED] call_args_test
[23:33:46] [PASSED] drop_first_arg_example
[23:33:46] [PASSED] drop_first_arg_test
[23:33:46] [PASSED] first_arg_example
[23:33:46] [PASSED] first_arg_test
[23:33:46] [PASSED] last_arg_example
[23:33:46] [PASSED] last_arg_test
[23:33:46] [PASSED] pick_arg_example
[23:33:46] [PASSED] if_args_example
[23:33:46] [PASSED] if_args_test
[23:33:46] [PASSED] sep_comma_example
[23:33:46] ====================== [PASSED] args =======================
[23:33:46] =================== xe_pci (3 subtests) ====================
[23:33:46] ==================== check_graphics_ip  ====================
[23:33:46] [PASSED] 12.00 Xe_LP
[23:33:46] [PASSED] 12.10 Xe_LP+
[23:33:46] [PASSED] 12.55 Xe_HPG
[23:33:46] [PASSED] 12.60 Xe_HPC
[23:33:46] [PASSED] 12.70 Xe_LPG
[23:33:46] [PASSED] 12.71 Xe_LPG
[23:33:46] [PASSED] 12.74 Xe_LPG+
[23:33:46] [PASSED] 20.01 Xe2_HPG
[23:33:46] [PASSED] 20.02 Xe2_HPG
[23:33:46] [PASSED] 20.04 Xe2_LPG
[23:33:46] [PASSED] 30.00 Xe3_LPG
[23:33:46] [PASSED] 30.01 Xe3_LPG
[23:33:46] [PASSED] 30.03 Xe3_LPG
[23:33:46] [PASSED] 30.04 Xe3_LPG
[23:33:46] [PASSED] 30.05 Xe3_LPG
[23:33:46] [PASSED] 35.10 Xe3p_LPG
[23:33:46] [PASSED] 35.11 Xe3p_XPC
[23:33:46] ================ [PASSED] check_graphics_ip ================
[23:33:46] ===================== check_media_ip  ======================
[23:33:46] [PASSED] 12.00 Xe_M
[23:33:46] [PASSED] 12.55 Xe_HPM
[23:33:46] [PASSED] 13.00 Xe_LPM+
[23:33:46] [PASSED] 13.01 Xe2_HPM
[23:33:46] [PASSED] 20.00 Xe2_LPM
[23:33:46] [PASSED] 30.00 Xe3_LPM
[23:33:46] [PASSED] 30.02 Xe3_LPM
[23:33:46] [PASSED] 35.00 Xe3p_LPM
[23:33:46] [PASSED] 35.03 Xe3p_HPM
[23:33:46] ================= [PASSED] check_media_ip ==================
[23:33:46] =================== check_platform_desc  ===================
[23:33:46] [PASSED] 0x9A60 (TIGERLAKE)
[23:33:46] [PASSED] 0x9A68 (TIGERLAKE)
[23:33:46] [PASSED] 0x9A70 (TIGERLAKE)
[23:33:46] [PASSED] 0x9A40 (TIGERLAKE)
[23:33:46] [PASSED] 0x9A49 (TIGERLAKE)
[23:33:46] [PASSED] 0x9A59 (TIGERLAKE)
[23:33:46] [PASSED] 0x9A78 (TIGERLAKE)
[23:33:46] [PASSED] 0x9AC0 (TIGERLAKE)
[23:33:46] [PASSED] 0x9AC9 (TIGERLAKE)
[23:33:46] [PASSED] 0x9AD9 (TIGERLAKE)
[23:33:46] [PASSED] 0x9AF8 (TIGERLAKE)
[23:33:46] [PASSED] 0x4C80 (ROCKETLAKE)
[23:33:46] [PASSED] 0x4C8A (ROCKETLAKE)
[23:33:46] [PASSED] 0x4C8B (ROCKETLAKE)
[23:33:46] [PASSED] 0x4C8C (ROCKETLAKE)
[23:33:46] [PASSED] 0x4C90 (ROCKETLAKE)
[23:33:46] [PASSED] 0x4C9A (ROCKETLAKE)
[23:33:46] [PASSED] 0x4680 (ALDERLAKE_S)
[23:33:46] [PASSED] 0x4682 (ALDERLAKE_S)
[23:33:46] [PASSED] 0x4688 (ALDERLAKE_S)
[23:33:46] [PASSED] 0x468A (ALDERLAKE_S)
[23:33:46] [PASSED] 0x468B (ALDERLAKE_S)
[23:33:46] [PASSED] 0x4690 (ALDERLAKE_S)
[23:33:46] [PASSED] 0x4692 (ALDERLAKE_S)
[23:33:46] [PASSED] 0x4693 (ALDERLAKE_S)
[23:33:46] [PASSED] 0x46A0 (ALDERLAKE_P)
[23:33:46] [PASSED] 0x46A1 (ALDERLAKE_P)
[23:33:46] [PASSED] 0x46A2 (ALDERLAKE_P)
[23:33:46] [PASSED] 0x46A3 (ALDERLAKE_P)
[23:33:46] [PASSED] 0x46A6 (ALDERLAKE_P)
[23:33:46] [PASSED] 0x46A8 (ALDERLAKE_P)
[23:33:46] [PASSED] 0x46AA (ALDERLAKE_P)
[23:33:46] [PASSED] 0x462A (ALDERLAKE_P)
[23:33:46] [PASSED] 0x4626 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[23:33:46] [PASSED] 0x4628 (ALDERLAKE_P)
[23:33:46] [PASSED] 0x46B0 (ALDERLAKE_P)
[23:33:46] [PASSED] 0x46B1 (ALDERLAKE_P)
[23:33:46] [PASSED] 0x46B2 (ALDERLAKE_P)
[23:33:46] [PASSED] 0x46B3 (ALDERLAKE_P)
[23:33:46] [PASSED] 0x46C0 (ALDERLAKE_P)
[23:33:46] [PASSED] 0x46C1 (ALDERLAKE_P)
[23:33:46] [PASSED] 0x46C2 (ALDERLAKE_P)
[23:33:46] [PASSED] 0x46C3 (ALDERLAKE_P)
[23:33:46] [PASSED] 0x46D0 (ALDERLAKE_N)
[23:33:46] [PASSED] 0x46D1 (ALDERLAKE_N)
[23:33:46] [PASSED] 0x46D2 (ALDERLAKE_N)
[23:33:46] [PASSED] 0x46D3 (ALDERLAKE_N)
[23:33:46] [PASSED] 0x46D4 (ALDERLAKE_N)
[23:33:46] [PASSED] 0xA721 (ALDERLAKE_P)
[23:33:46] [PASSED] 0xA7A1 (ALDERLAKE_P)
[23:33:46] [PASSED] 0xA7A9 (ALDERLAKE_P)
[23:33:46] [PASSED] 0xA7AC (ALDERLAKE_P)
[23:33:46] [PASSED] 0xA7AD (ALDERLAKE_P)
[23:33:46] [PASSED] 0xA720 (ALDERLAKE_P)
[23:33:46] [PASSED] 0xA7A0 (ALDERLAKE_P)
[23:33:46] [PASSED] 0xA7A8 (ALDERLAKE_P)
[23:33:46] [PASSED] 0xA7AA (ALDERLAKE_P)
[23:33:46] [PASSED] 0xA7AB (ALDERLAKE_P)
[23:33:46] [PASSED] 0xA780 (ALDERLAKE_S)
[23:33:46] [PASSED] 0xA781 (ALDERLAKE_S)
[23:33:46] [PASSED] 0xA782 (ALDERLAKE_S)
[23:33:46] [PASSED] 0xA783 (ALDERLAKE_S)
[23:33:46] [PASSED] 0xA788 (ALDERLAKE_S)
[23:33:46] [PASSED] 0xA789 (ALDERLAKE_S)
[23:33:46] [PASSED] 0xA78A (ALDERLAKE_S)
[23:33:46] [PASSED] 0xA78B (ALDERLAKE_S)
[23:33:46] [PASSED] 0x4905 (DG1)
[23:33:46] [PASSED] 0x4906 (DG1)
[23:33:46] [PASSED] 0x4907 (DG1)
[23:33:46] [PASSED] 0x4908 (DG1)
[23:33:46] [PASSED] 0x4909 (DG1)
[23:33:46] [PASSED] 0x56C0 (DG2)
[23:33:46] [PASSED] 0x56C2 (DG2)
[23:33:46] [PASSED] 0x56C1 (DG2)
[23:33:46] [PASSED] 0x7D51 (METEORLAKE)
[23:33:46] [PASSED] 0x7DD1 (METEORLAKE)
[23:33:46] [PASSED] 0x7D41 (METEORLAKE)
[23:33:46] [PASSED] 0x7D67 (METEORLAKE)
[23:33:46] [PASSED] 0xB640 (METEORLAKE)
[23:33:46] [PASSED] 0x56A0 (DG2)
[23:33:46] [PASSED] 0x56A1 (DG2)
[23:33:46] [PASSED] 0x56A2 (DG2)
[23:33:46] [PASSED] 0x56BE (DG2)
[23:33:46] [PASSED] 0x56BF (DG2)
[23:33:46] [PASSED] 0x5690 (DG2)
[23:33:46] [PASSED] 0x5691 (DG2)
[23:33:46] [PASSED] 0x5692 (DG2)
[23:33:46] [PASSED] 0x56A5 (DG2)
[23:33:46] [PASSED] 0x56A6 (DG2)
[23:33:46] [PASSED] 0x56B0 (DG2)
[23:33:46] [PASSED] 0x56B1 (DG2)
[23:33:46] [PASSED] 0x56BA (DG2)
[23:33:46] [PASSED] 0x56BB (DG2)
[23:33:46] [PASSED] 0x56BC (DG2)
[23:33:46] [PASSED] 0x56BD (DG2)
[23:33:46] [PASSED] 0x5693 (DG2)
[23:33:46] [PASSED] 0x5694 (DG2)
[23:33:46] [PASSED] 0x5695 (DG2)
[23:33:46] [PASSED] 0x56A3 (DG2)
[23:33:46] [PASSED] 0x56A4 (DG2)
[23:33:46] [PASSED] 0x56B2 (DG2)
[23:33:46] [PASSED] 0x56B3 (DG2)
[23:33:46] [PASSED] 0x5696 (DG2)
[23:33:46] [PASSED] 0x5697 (DG2)
[23:33:46] [PASSED] 0xB69 (PVC)
[23:33:46] [PASSED] 0xB6E (PVC)
[23:33:46] [PASSED] 0xBD4 (PVC)
[23:33:46] [PASSED] 0xBD5 (PVC)
[23:33:46] [PASSED] 0xBD6 (PVC)
[23:33:46] [PASSED] 0xBD7 (PVC)
[23:33:46] [PASSED] 0xBD8 (PVC)
[23:33:46] [PASSED] 0xBD9 (PVC)
[23:33:46] [PASSED] 0xBDA (PVC)
[23:33:46] [PASSED] 0xBDB (PVC)
[23:33:46] [PASSED] 0xBE0 (PVC)
[23:33:46] [PASSED] 0xBE1 (PVC)
[23:33:46] [PASSED] 0xBE5 (PVC)
[23:33:46] [PASSED] 0x7D40 (METEORLAKE)
[23:33:46] [PASSED] 0x7D45 (METEORLAKE)
[23:33:46] [PASSED] 0x7D55 (METEORLAKE)
[23:33:46] [PASSED] 0x7D60 (METEORLAKE)
[23:33:46] [PASSED] 0x7DD5 (METEORLAKE)
[23:33:46] [PASSED] 0x6420 (LUNARLAKE)
[23:33:46] [PASSED] 0x64A0 (LUNARLAKE)
[23:33:46] [PASSED] 0x64B0 (LUNARLAKE)
[23:33:46] [PASSED] 0xE202 (BATTLEMAGE)
[23:33:46] [PASSED] 0xE209 (BATTLEMAGE)
[23:33:46] [PASSED] 0xE20B (BATTLEMAGE)
[23:33:46] [PASSED] 0xE20C (BATTLEMAGE)
[23:33:46] [PASSED] 0xE20D (BATTLEMAGE)
[23:33:46] [PASSED] 0xE210 (BATTLEMAGE)
[23:33:46] [PASSED] 0xE211 (BATTLEMAGE)
[23:33:46] [PASSED] 0xE212 (BATTLEMAGE)
[23:33:46] [PASSED] 0xE216 (BATTLEMAGE)
[23:33:46] [PASSED] 0xE220 (BATTLEMAGE)
[23:33:46] [PASSED] 0xE221 (BATTLEMAGE)
[23:33:46] [PASSED] 0xE222 (BATTLEMAGE)
[23:33:46] [PASSED] 0xE223 (BATTLEMAGE)
[23:33:46] [PASSED] 0xB080 (PANTHERLAKE)
[23:33:46] [PASSED] 0xB081 (PANTHERLAKE)
[23:33:46] [PASSED] 0xB082 (PANTHERLAKE)
[23:33:46] [PASSED] 0xB083 (PANTHERLAKE)
[23:33:46] [PASSED] 0xB084 (PANTHERLAKE)
[23:33:46] [PASSED] 0xB085 (PANTHERLAKE)
[23:33:46] [PASSED] 0xB086 (PANTHERLAKE)
[23:33:46] [PASSED] 0xB087 (PANTHERLAKE)
[23:33:46] [PASSED] 0xB08F (PANTHERLAKE)
[23:33:46] [PASSED] 0xB090 (PANTHERLAKE)
[23:33:46] [PASSED] 0xB0A0 (PANTHERLAKE)
[23:33:46] [PASSED] 0xB0B0 (PANTHERLAKE)
[23:33:46] [PASSED] 0xFD80 (PANTHERLAKE)
[23:33:46] [PASSED] 0xFD81 (PANTHERLAKE)
[23:33:46] [PASSED] 0xD740 (NOVALAKE_S)
[23:33:46] [PASSED] 0xD741 (NOVALAKE_S)
[23:33:46] [PASSED] 0xD742 (NOVALAKE_S)
[23:33:46] [PASSED] 0xD743 (NOVALAKE_S)
[23:33:46] [PASSED] 0xD744 (NOVALAKE_S)
[23:33:46] [PASSED] 0xD745 (NOVALAKE_S)
[23:33:46] [PASSED] 0x674C (CRESCENTISLAND)
[23:33:46] [PASSED] 0xD750 (NOVALAKE_P)
[23:33:46] [PASSED] 0xD751 (NOVALAKE_P)
[23:33:46] [PASSED] 0xD752 (NOVALAKE_P)
[23:33:46] [PASSED] 0xD753 (NOVALAKE_P)
[23:33:46] [PASSED] 0xD754 (NOVALAKE_P)
[23:33:46] [PASSED] 0xD755 (NOVALAKE_P)
[23:33:46] [PASSED] 0xD756 (NOVALAKE_P)
[23:33:46] [PASSED] 0xD757 (NOVALAKE_P)
[23:33:46] [PASSED] 0xD75F (NOVALAKE_P)
[23:33:46] =============== [PASSED] check_platform_desc ===============
[23:33:46] ===================== [PASSED] xe_pci ======================
[23:33:46] =================== xe_rtp (2 subtests) ====================
[23:33:46] =============== xe_rtp_process_to_sr_tests  ================
[23:33:46] [PASSED] coalesce-same-reg
[23:33:46] [PASSED] no-match-no-add
[23:33:46] [PASSED] match-or
[23:33:46] [PASSED] match-or-xfail
[23:33:46] [PASSED] no-match-no-add-multiple-rules
[23:33:46] [PASSED] two-regs-two-entries
[23:33:46] [PASSED] clr-one-set-other
[23:33:46] [PASSED] set-field
[23:33:46] [PASSED] conflict-duplicate
[23:33:46] [PASSED] conflict-not-disjoint
[23:33:46] [PASSED] conflict-reg-type
[23:33:46] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[23:33:46] ================== xe_rtp_process_tests  ===================
[23:33:46] [PASSED] active1
[23:33:46] [PASSED] active2
[23:33:46] [PASSED] active-inactive
[23:33:46] [PASSED] inactive-active
[23:33:46] [PASSED] inactive-1st_or_active-inactive
[23:33:46] [PASSED] inactive-2nd_or_active-inactive
[23:33:46] [PASSED] inactive-last_or_active-inactive
[23:33:46] [PASSED] inactive-no_or_active-inactive
[23:33:46] ============== [PASSED] xe_rtp_process_tests ===============
[23:33:46] ===================== [PASSED] xe_rtp ======================
[23:33:46] ==================== xe_wa (1 subtest) =====================
[23:33:46] ======================== xe_wa_gt  =========================
[23:33:46] [PASSED] TIGERLAKE B0
[23:33:46] [PASSED] DG1 A0
[23:33:46] [PASSED] DG1 B0
[23:33:46] [PASSED] ALDERLAKE_S A0
[23:33:46] [PASSED] ALDERLAKE_S B0
[23:33:46] [PASSED] ALDERLAKE_S C0
[23:33:46] [PASSED] ALDERLAKE_S D0
[23:33:46] [PASSED] ALDERLAKE_P A0
[23:33:46] [PASSED] ALDERLAKE_P B0
[23:33:46] [PASSED] ALDERLAKE_P C0
[23:33:46] [PASSED] ALDERLAKE_S RPLS D0
[23:33:46] [PASSED] ALDERLAKE_P RPLU E0
[23:33:46] [PASSED] DG2 G10 C0
[23:33:46] [PASSED] DG2 G11 B1
[23:33:46] [PASSED] DG2 G12 A1
[23:33:46] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:33:46] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:33:46] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[23:33:46] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[23:33:46] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[23:33:46] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[23:33:46] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[23:33:46] ==================== [PASSED] xe_wa_gt =====================
[23:33:46] ====================== [PASSED] xe_wa ======================
[23:33:46] ============================================================
[23:33:46] Testing complete. Ran 522 tests: passed: 504, skipped: 18
[23:33:46] Elapsed time: 36.447s total, 4.165s configuring, 31.765s building, 0.475s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[23:33:46] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:33:48] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:34:13] Starting KUnit Kernel (1/1)...
[23:34:13] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:34:13] ============ drm_test_pick_cmdline (2 subtests) ============
[23:34:13] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[23:34:13] =============== drm_test_pick_cmdline_named  ===============
[23:34:13] [PASSED] NTSC
[23:34:13] [PASSED] NTSC-J
[23:34:13] [PASSED] PAL
[23:34:13] [PASSED] PAL-M
[23:34:13] =========== [PASSED] drm_test_pick_cmdline_named ===========
[23:34:13] ============== [PASSED] drm_test_pick_cmdline ==============
[23:34:13] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[23:34:13] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[23:34:13] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[23:34:13] =========== drm_validate_clone_mode (2 subtests) ===========
[23:34:13] ============== drm_test_check_in_clone_mode  ===============
[23:34:13] [PASSED] in_clone_mode
[23:34:13] [PASSED] not_in_clone_mode
[23:34:13] ========== [PASSED] drm_test_check_in_clone_mode ===========
[23:34:13] =============== drm_test_check_valid_clones  ===============
[23:34:13] [PASSED] not_in_clone_mode
[23:34:13] [PASSED] valid_clone
[23:34:13] [PASSED] invalid_clone
[23:34:13] =========== [PASSED] drm_test_check_valid_clones ===========
[23:34:13] ============= [PASSED] drm_validate_clone_mode =============
[23:34:13] ============= drm_validate_modeset (1 subtest) =============
[23:34:13] [PASSED] drm_test_check_connector_changed_modeset
[23:34:13] ============== [PASSED] drm_validate_modeset ===============
[23:34:13] ====== drm_test_bridge_get_current_state (2 subtests) ======
[23:34:13] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[23:34:13] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[23:34:13] ======== [PASSED] drm_test_bridge_get_current_state ========
[23:34:13] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[23:34:13] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[23:34:13] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[23:34:13] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[23:34:13] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[23:34:13] ============== drm_bridge_alloc (2 subtests) ===============
[23:34:13] [PASSED] drm_test_drm_bridge_alloc_basic
[23:34:13] [PASSED] drm_test_drm_bridge_alloc_get_put
[23:34:13] ================ [PASSED] drm_bridge_alloc =================
[23:34:13] ============= drm_cmdline_parser (40 subtests) =============
[23:34:13] [PASSED] drm_test_cmdline_force_d_only
[23:34:13] [PASSED] drm_test_cmdline_force_D_only_dvi
[23:34:13] [PASSED] drm_test_cmdline_force_D_only_hdmi
[23:34:13] [PASSED] drm_test_cmdline_force_D_only_not_digital
[23:34:13] [PASSED] drm_test_cmdline_force_e_only
[23:34:13] [PASSED] drm_test_cmdline_res
[23:34:13] [PASSED] drm_test_cmdline_res_vesa
[23:34:13] [PASSED] drm_test_cmdline_res_vesa_rblank
[23:34:13] [PASSED] drm_test_cmdline_res_rblank
[23:34:13] [PASSED] drm_test_cmdline_res_bpp
[23:34:13] [PASSED] drm_test_cmdline_res_refresh
[23:34:13] [PASSED] drm_test_cmdline_res_bpp_refresh
[23:34:13] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[23:34:13] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[23:34:13] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[23:34:13] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[23:34:13] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[23:34:13] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[23:34:13] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[23:34:13] [PASSED] drm_test_cmdline_res_margins_force_on
[23:34:13] [PASSED] drm_test_cmdline_res_vesa_margins
[23:34:13] [PASSED] drm_test_cmdline_name
[23:34:13] [PASSED] drm_test_cmdline_name_bpp
[23:34:13] [PASSED] drm_test_cmdline_name_option
[23:34:13] [PASSED] drm_test_cmdline_name_bpp_option
[23:34:13] [PASSED] drm_test_cmdline_rotate_0
[23:34:13] [PASSED] drm_test_cmdline_rotate_90
[23:34:13] [PASSED] drm_test_cmdline_rotate_180
[23:34:13] [PASSED] drm_test_cmdline_rotate_270
[23:34:13] [PASSED] drm_test_cmdline_hmirror
[23:34:13] [PASSED] drm_test_cmdline_vmirror
[23:34:13] [PASSED] drm_test_cmdline_margin_options
[23:34:13] [PASSED] drm_test_cmdline_multiple_options
[23:34:13] [PASSED] drm_test_cmdline_bpp_extra_and_option
[23:34:13] [PASSED] drm_test_cmdline_extra_and_option
[23:34:13] [PASSED] drm_test_cmdline_freestanding_options
[23:34:13] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[23:34:13] [PASSED] drm_test_cmdline_panel_orientation
[23:34:13] ================ drm_test_cmdline_invalid  =================
[23:34:13] [PASSED] margin_only
[23:34:13] [PASSED] interlace_only
[23:34:13] [PASSED] res_missing_x
[23:34:13] [PASSED] res_missing_y
[23:34:13] [PASSED] res_bad_y
[23:34:13] [PASSED] res_missing_y_bpp
[23:34:13] [PASSED] res_bad_bpp
[23:34:13] [PASSED] res_bad_refresh
[23:34:13] [PASSED] res_bpp_refresh_force_on_off
[23:34:13] [PASSED] res_invalid_mode
[23:34:13] [PASSED] res_bpp_wrong_place_mode
[23:34:13] [PASSED] name_bpp_refresh
[23:34:13] [PASSED] name_refresh
[23:34:13] [PASSED] name_refresh_wrong_mode
[23:34:13] [PASSED] name_refresh_invalid_mode
[23:34:13] [PASSED] rotate_multiple
[23:34:13] [PASSED] rotate_invalid_val
[23:34:13] [PASSED] rotate_truncated
[23:34:13] [PASSED] invalid_option
[23:34:13] [PASSED] invalid_tv_option
[23:34:13] [PASSED] truncated_tv_option
[23:34:13] ============ [PASSED] drm_test_cmdline_invalid =============
[23:34:13] =============== drm_test_cmdline_tv_options  ===============
[23:34:13] [PASSED] NTSC
[23:34:13] [PASSED] NTSC_443
[23:34:13] [PASSED] NTSC_J
[23:34:13] [PASSED] PAL
[23:34:13] [PASSED] PAL_M
[23:34:13] [PASSED] PAL_N
[23:34:13] [PASSED] SECAM
[23:34:13] [PASSED] MONO_525
[23:34:13] [PASSED] MONO_625
[23:34:13] =========== [PASSED] drm_test_cmdline_tv_options ===========
[23:34:13] =============== [PASSED] drm_cmdline_parser ================
[23:34:13] ========== drmm_connector_hdmi_init (20 subtests) ==========
[23:34:13] [PASSED] drm_test_connector_hdmi_init_valid
[23:34:13] [PASSED] drm_test_connector_hdmi_init_bpc_8
[23:34:13] [PASSED] drm_test_connector_hdmi_init_bpc_10
[23:34:13] [PASSED] drm_test_connector_hdmi_init_bpc_12
[23:34:13] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[23:34:13] [PASSED] drm_test_connector_hdmi_init_bpc_null
[23:34:13] [PASSED] drm_test_connector_hdmi_init_formats_empty
[23:34:13] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[23:34:13] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[23:34:13] [PASSED] supported_formats=0x9 yuv420_allowed=1
[23:34:13] [PASSED] supported_formats=0x9 yuv420_allowed=0
[23:34:13] [PASSED] supported_formats=0x3 yuv420_allowed=1
[23:34:13] [PASSED] supported_formats=0x3 yuv420_allowed=0
[23:34:13] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[23:34:13] [PASSED] drm_test_connector_hdmi_init_null_ddc
[23:34:13] [PASSED] drm_test_connector_hdmi_init_null_product
[23:34:13] [PASSED] drm_test_connector_hdmi_init_null_vendor
[23:34:13] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[23:34:13] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[23:34:13] [PASSED] drm_test_connector_hdmi_init_product_valid
[23:34:13] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[23:34:13] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[23:34:13] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[23:34:13] ========= drm_test_connector_hdmi_init_type_valid  =========
[23:34:13] [PASSED] HDMI-A
[23:34:13] [PASSED] HDMI-B
[23:34:13] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[23:34:13] ======== drm_test_connector_hdmi_init_type_invalid  ========
[23:34:13] [PASSED] Unknown
[23:34:13] [PASSED] VGA
[23:34:13] [PASSED] DVI-I
[23:34:13] [PASSED] DVI-D
[23:34:13] [PASSED] DVI-A
[23:34:13] [PASSED] Composite
[23:34:13] [PASSED] SVIDEO
[23:34:13] [PASSED] LVDS
[23:34:13] [PASSED] Component
[23:34:13] [PASSED] DIN
[23:34:13] [PASSED] DP
[23:34:13] [PASSED] TV
[23:34:13] [PASSED] eDP
[23:34:13] [PASSED] Virtual
[23:34:13] [PASSED] DSI
[23:34:13] [PASSED] DPI
[23:34:13] [PASSED] Writeback
[23:34:13] [PASSED] SPI
[23:34:13] [PASSED] USB
[23:34:13] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[23:34:13] ============ [PASSED] drmm_connector_hdmi_init =============
[23:34:13] ============= drmm_connector_init (3 subtests) =============
[23:34:13] [PASSED] drm_test_drmm_connector_init
[23:34:13] [PASSED] drm_test_drmm_connector_init_null_ddc
[23:34:13] ========= drm_test_drmm_connector_init_type_valid  =========
[23:34:13] [PASSED] Unknown
[23:34:13] [PASSED] VGA
[23:34:13] [PASSED] DVI-I
[23:34:13] [PASSED] DVI-D
[23:34:13] [PASSED] DVI-A
[23:34:13] [PASSED] Composite
[23:34:13] [PASSED] SVIDEO
[23:34:13] [PASSED] LVDS
[23:34:13] [PASSED] Component
[23:34:13] [PASSED] DIN
[23:34:13] [PASSED] DP
[23:34:13] [PASSED] HDMI-A
[23:34:13] [PASSED] HDMI-B
[23:34:13] [PASSED] TV
[23:34:13] [PASSED] eDP
[23:34:13] [PASSED] Virtual
[23:34:13] [PASSED] DSI
[23:34:13] [PASSED] DPI
[23:34:13] [PASSED] Writeback
[23:34:13] [PASSED] SPI
[23:34:13] [PASSED] USB
[23:34:13] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[23:34:13] =============== [PASSED] drmm_connector_init ===============
[23:34:13] ========= drm_connector_dynamic_init (6 subtests) ==========
[23:34:13] [PASSED] drm_test_drm_connector_dynamic_init
[23:34:13] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[23:34:13] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[23:34:13] [PASSED] drm_test_drm_connector_dynamic_init_properties
[23:34:13] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[23:34:13] [PASSED] Unknown
[23:34:13] [PASSED] VGA
[23:34:13] [PASSED] DVI-I
[23:34:13] [PASSED] DVI-D
[23:34:13] [PASSED] DVI-A
[23:34:13] [PASSED] Composite
[23:34:13] [PASSED] SVIDEO
[23:34:13] [PASSED] LVDS
[23:34:13] [PASSED] Component
[23:34:13] [PASSED] DIN
[23:34:13] [PASSED] DP
[23:34:13] [PASSED] HDMI-A
[23:34:13] [PASSED] HDMI-B
[23:34:13] [PASSED] TV
[23:34:13] [PASSED] eDP
[23:34:13] [PASSED] Virtual
[23:34:13] [PASSED] DSI
[23:34:13] [PASSED] DPI
[23:34:13] [PASSED] Writeback
[23:34:13] [PASSED] SPI
[23:34:13] [PASSED] USB
[23:34:13] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[23:34:13] ======== drm_test_drm_connector_dynamic_init_name  =========
[23:34:13] [PASSED] Unknown
[23:34:13] [PASSED] VGA
[23:34:13] [PASSED] DVI-I
[23:34:13] [PASSED] DVI-D
[23:34:13] [PASSED] DVI-A
[23:34:13] [PASSED] Composite
[23:34:13] [PASSED] SVIDEO
[23:34:13] [PASSED] LVDS
[23:34:13] [PASSED] Component
[23:34:13] [PASSED] DIN
[23:34:13] [PASSED] DP
[23:34:13] [PASSED] HDMI-A
[23:34:13] [PASSED] HDMI-B
[23:34:13] [PASSED] TV
[23:34:13] [PASSED] eDP
[23:34:13] [PASSED] Virtual
[23:34:13] [PASSED] DSI
[23:34:13] [PASSED] DPI
[23:34:13] [PASSED] Writeback
[23:34:13] [PASSED] SPI
[23:34:13] [PASSED] USB
[23:34:13] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[23:34:13] =========== [PASSED] drm_connector_dynamic_init ============
[23:34:13] ==== drm_connector_dynamic_register_early (4 subtests) =====
[23:34:13] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[23:34:13] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[23:34:13] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[23:34:13] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[23:34:13] ====== [PASSED] drm_connector_dynamic_register_early =======
[23:34:13] ======= drm_connector_dynamic_register (7 subtests) ========
[23:34:13] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[23:34:13] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[23:34:13] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[23:34:13] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[23:34:13] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[23:34:13] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[23:34:13] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[23:34:13] ========= [PASSED] drm_connector_dynamic_register ==========
[23:34:13] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[23:34:13] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[23:34:13] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[23:34:13] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[23:34:13] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[23:34:13] ========== drm_test_get_tv_mode_from_name_valid  ===========
[23:34:13] [PASSED] NTSC
[23:34:13] [PASSED] NTSC-443
[23:34:13] [PASSED] NTSC-J
[23:34:13] [PASSED] PAL
[23:34:13] [PASSED] PAL-M
[23:34:13] [PASSED] PAL-N
[23:34:13] [PASSED] SECAM
[23:34:13] [PASSED] Mono
[23:34:13] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[23:34:13] [PASSED] drm_test_get_tv_mode_from_name_truncated
[23:34:13] ============ [PASSED] drm_get_tv_mode_from_name ============
[23:34:13] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[23:34:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[23:34:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[23:34:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[23:34:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[23:34:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[23:34:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[23:34:13] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[23:34:13] [PASSED] VIC 96
[23:34:13] [PASSED] VIC 97
[23:34:13] [PASSED] VIC 101
[23:34:13] [PASSED] VIC 102
[23:34:13] [PASSED] VIC 106
[23:34:13] [PASSED] VIC 107
[23:34:13] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[23:34:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[23:34:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[23:34:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[23:34:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[23:34:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[23:34:13] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[23:34:13] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[23:34:13] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[23:34:13] [PASSED] Automatic
[23:34:13] [PASSED] Full
[23:34:13] [PASSED] Limited 16:235
[23:34:13] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[23:34:13] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[23:34:13] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[23:34:13] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[23:34:13] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[23:34:13] [PASSED] RGB
[23:34:13] [PASSED] YUV 4:2:0
[23:34:13] [PASSED] YUV 4:2:2
[23:34:13] [PASSED] YUV 4:4:4
[23:34:13] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[23:34:13] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[23:34:13] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[23:34:13] ============= drm_damage_helper (21 subtests) ==============
[23:34:13] [PASSED] drm_test_damage_iter_no_damage
[23:34:13] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[23:34:13] [PASSED] drm_test_damage_iter_no_damage_src_moved
[23:34:13] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[23:34:13] [PASSED] drm_test_damage_iter_no_damage_not_visible
[23:34:13] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[23:34:13] [PASSED] drm_test_damage_iter_no_damage_no_fb
[23:34:13] [PASSED] drm_test_damage_iter_simple_damage
[23:34:13] [PASSED] drm_test_damage_iter_single_damage
[23:34:13] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[23:34:13] [PASSED] drm_test_damage_iter_single_damage_outside_src
[23:34:13] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[23:34:13] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[23:34:13] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[23:34:13] [PASSED] drm_test_damage_iter_single_damage_src_moved
[23:34:13] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[23:34:13] [PASSED] drm_test_damage_iter_damage
[23:34:13] [PASSED] drm_test_damage_iter_damage_one_intersect
[23:34:13] [PASSED] drm_test_damage_iter_damage_one_outside
[23:34:13] [PASSED] drm_test_damage_iter_damage_src_moved
[23:34:13] [PASSED] drm_test_damage_iter_damage_not_visible
[23:34:13] ================ [PASSED] drm_damage_helper ================
[23:34:13] ============== drm_dp_mst_helper (3 subtests) ==============
[23:34:13] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[23:34:13] [PASSED] Clock 154000 BPP 30 DSC disabled
[23:34:13] [PASSED] Clock 234000 BPP 30 DSC disabled
[23:34:13] [PASSED] Clock 297000 BPP 24 DSC disabled
[23:34:13] [PASSED] Clock 332880 BPP 24 DSC enabled
[23:34:13] [PASSED] Clock 324540 BPP 24 DSC enabled
[23:34:13] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[23:34:13] ============== drm_test_dp_mst_calc_pbn_div  ===============
[23:34:13] [PASSED] Link rate 2000000 lane count 4
[23:34:13] [PASSED] Link rate 2000000 lane count 2
[23:34:13] [PASSED] Link rate 2000000 lane count 1
[23:34:13] [PASSED] Link rate 1350000 lane count 4
[23:34:13] [PASSED] Link rate 1350000 lane count 2
[23:34:13] [PASSED] Link rate 1350000 lane count 1
[23:34:13] [PASSED] Link rate 1000000 lane count 4
[23:34:13] [PASSED] Link rate 1000000 lane count 2
[23:34:13] [PASSED] Link rate 1000000 lane count 1
[23:34:13] [PASSED] Link rate 810000 lane count 4
[23:34:13] [PASSED] Link rate 810000 lane count 2
[23:34:13] [PASSED] Link rate 810000 lane count 1
[23:34:13] [PASSED] Link rate 540000 lane count 4
[23:34:13] [PASSED] Link rate 540000 lane count 2
[23:34:13] [PASSED] Link rate 540000 lane count 1
[23:34:13] [PASSED] Link rate 270000 lane count 4
[23:34:13] [PASSED] Link rate 270000 lane count 2
[23:34:13] [PASSED] Link rate 270000 lane count 1
[23:34:13] [PASSED] Link rate 162000 lane count 4
[23:34:13] [PASSED] Link rate 162000 lane count 2
[23:34:13] [PASSED] Link rate 162000 lane count 1
[23:34:13] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[23:34:13] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[23:34:13] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[23:34:13] [PASSED] DP_POWER_UP_PHY with port number
[23:34:13] [PASSED] DP_POWER_DOWN_PHY with port number
[23:34:13] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[23:34:13] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[23:34:13] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[23:34:13] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[23:34:13] [PASSED] DP_QUERY_PAYLOAD with port number
[23:34:13] [PASSED] DP_QUERY_PAYLOAD with VCPI
[23:34:13] [PASSED] DP_REMOTE_DPCD_READ with port number
[23:34:13] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[23:34:13] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[23:34:13] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[23:34:13] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[23:34:13] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[23:34:13] [PASSED] DP_REMOTE_I2C_READ with port number
[23:34:13] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[23:34:13] [PASSED] DP_REMOTE_I2C_READ with transactions array
[23:34:13] [PASSED] DP_REMOTE_I2C_WRITE with port number
[23:34:13] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[23:34:13] [PASSED] DP_REMOTE_I2C_WRITE with data array
[23:34:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[23:34:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[23:34:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[23:34:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[23:34:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[23:34:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[23:34:13] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[23:34:13] ================ [PASSED] drm_dp_mst_helper ================
[23:34:13] ================== drm_exec (7 subtests) ===================
[23:34:13] [PASSED] sanitycheck
[23:34:13] [PASSED] test_lock
[23:34:13] [PASSED] test_lock_unlock
[23:34:13] [PASSED] test_duplicates
[23:34:13] [PASSED] test_prepare
[23:34:13] [PASSED] test_prepare_array
[23:34:13] [PASSED] test_multiple_loops
[23:34:13] ==================== [PASSED] drm_exec =====================
[23:34:13] =========== drm_format_helper_test (17 subtests) ===========
[23:34:13] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[23:34:13] [PASSED] single_pixel_source_buffer
[23:34:13] [PASSED] single_pixel_clip_rectangle
[23:34:13] [PASSED] well_known_colors
[23:34:13] [PASSED] destination_pitch
[23:34:13] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[23:34:13] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[23:34:13] [PASSED] single_pixel_source_buffer
[23:34:13] [PASSED] single_pixel_clip_rectangle
[23:34:13] [PASSED] well_known_colors
[23:34:13] [PASSED] destination_pitch
[23:34:13] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[23:34:13] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[23:34:13] [PASSED] single_pixel_source_buffer
[23:34:13] [PASSED] single_pixel_clip_rectangle
[23:34:13] [PASSED] well_known_colors
[23:34:13] [PASSED] destination_pitch
[23:34:13] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[23:34:13] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[23:34:13] [PASSED] single_pixel_source_buffer
[23:34:13] [PASSED] single_pixel_clip_rectangle
[23:34:13] [PASSED] well_known_colors
[23:34:13] [PASSED] destination_pitch
[23:34:13] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[23:34:13] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[23:34:13] [PASSED] single_pixel_source_buffer
[23:34:13] [PASSED] single_pixel_clip_rectangle
[23:34:13] [PASSED] well_known_colors
[23:34:13] [PASSED] destination_pitch
[23:34:13] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[23:34:13] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[23:34:13] [PASSED] single_pixel_source_buffer
[23:34:13] [PASSED] single_pixel_clip_rectangle
[23:34:13] [PASSED] well_known_colors
[23:34:13] [PASSED] destination_pitch
[23:34:13] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[23:34:13] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[23:34:13] [PASSED] single_pixel_source_buffer
[23:34:13] [PASSED] single_pixel_clip_rectangle
[23:34:13] [PASSED] well_known_colors
[23:34:13] [PASSED] destination_pitch
[23:34:13] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[23:34:13] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[23:34:13] [PASSED] single_pixel_source_buffer
[23:34:13] [PASSED] single_pixel_clip_rectangle
[23:34:13] [PASSED] well_known_colors
[23:34:13] [PASSED] destination_pitch
[23:34:13] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[23:34:13] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[23:34:13] [PASSED] single_pixel_source_buffer
[23:34:13] [PASSED] single_pixel_clip_rectangle
[23:34:13] [PASSED] well_known_colors
[23:34:13] [PASSED] destination_pitch
[23:34:13] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[23:34:13] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[23:34:13] [PASSED] single_pixel_source_buffer
[23:34:13] [PASSED] single_pixel_clip_rectangle
[23:34:13] [PASSED] well_known_colors
[23:34:13] [PASSED] destination_pitch
[23:34:13] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[23:34:13] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[23:34:13] [PASSED] single_pixel_source_buffer
[23:34:13] [PASSED] single_pixel_clip_rectangle
[23:34:13] [PASSED] well_known_colors
[23:34:13] [PASSED] destination_pitch
[23:34:13] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[23:34:13] ============== drm_test_fb_xrgb8888_to_mono  ===============
[23:34:13] [PASSED] single_pixel_source_buffer
[23:34:13] [PASSED] single_pixel_clip_rectangle
[23:34:13] [PASSED] well_known_colors
[23:34:13] [PASSED] destination_pitch
[23:34:13] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[23:34:13] ==================== drm_test_fb_swab  =====================
[23:34:13] [PASSED] single_pixel_source_buffer
[23:34:13] [PASSED] single_pixel_clip_rectangle
[23:34:13] [PASSED] well_known_colors
[23:34:13] [PASSED] destination_pitch
[23:34:13] ================ [PASSED] drm_test_fb_swab =================
[23:34:13] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[23:34:13] [PASSED] single_pixel_source_buffer
[23:34:13] [PASSED] single_pixel_clip_rectangle
[23:34:13] [PASSED] well_known_colors
[23:34:13] [PASSED] destination_pitch
[23:34:13] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[23:34:13] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[23:34:13] [PASSED] single_pixel_source_buffer
[23:34:13] [PASSED] single_pixel_clip_rectangle
[23:34:13] [PASSED] well_known_colors
[23:34:13] [PASSED] destination_pitch
[23:34:13] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[23:34:13] ================= drm_test_fb_clip_offset  =================
[23:34:13] [PASSED] pass through
[23:34:13] [PASSED] horizontal offset
[23:34:13] [PASSED] vertical offset
[23:34:13] [PASSED] horizontal and vertical offset
[23:34:13] [PASSED] horizontal offset (custom pitch)
[23:34:13] [PASSED] vertical offset (custom pitch)
[23:34:13] [PASSED] horizontal and vertical offset (custom pitch)
[23:34:13] ============= [PASSED] drm_test_fb_clip_offset =============
[23:34:13] =================== drm_test_fb_memcpy  ====================
[23:34:13] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[23:34:13] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[23:34:13] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[23:34:13] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[23:34:13] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[23:34:13] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[23:34:13] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[23:34:13] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[23:34:13] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[23:34:13] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[23:34:13] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[23:34:13] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[23:34:13] =============== [PASSED] drm_test_fb_memcpy ================
[23:34:13] ============= [PASSED] drm_format_helper_test ==============
[23:34:13] ================= drm_format (18 subtests) =================
[23:34:13] [PASSED] drm_test_format_block_width_invalid
[23:34:13] [PASSED] drm_test_format_block_width_one_plane
[23:34:13] [PASSED] drm_test_format_block_width_two_plane
[23:34:13] [PASSED] drm_test_format_block_width_three_plane
[23:34:13] [PASSED] drm_test_format_block_width_tiled
[23:34:13] [PASSED] drm_test_format_block_height_invalid
[23:34:13] [PASSED] drm_test_format_block_height_one_plane
[23:34:13] [PASSED] drm_test_format_block_height_two_plane
[23:34:13] [PASSED] drm_test_format_block_height_three_plane
[23:34:13] [PASSED] drm_test_format_block_height_tiled
[23:34:13] [PASSED] drm_test_format_min_pitch_invalid
[23:34:13] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[23:34:13] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[23:34:13] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[23:34:13] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[23:34:13] [PASSED] drm_test_format_min_pitch_two_plane
[23:34:13] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[23:34:13] [PASSED] drm_test_format_min_pitch_tiled
[23:34:13] =================== [PASSED] drm_format ====================
[23:34:13] ============== drm_framebuffer (10 subtests) ===============
[23:34:13] ========== drm_test_framebuffer_check_src_coords  ==========
[23:34:13] [PASSED] Success: source fits into fb
[23:34:13] [PASSED] Fail: overflowing fb with x-axis coordinate
[23:34:13] [PASSED] Fail: overflowing fb with y-axis coordinate
[23:34:13] [PASSED] Fail: overflowing fb with source width
[23:34:13] [PASSED] Fail: overflowing fb with source height
[23:34:13] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[23:34:13] [PASSED] drm_test_framebuffer_cleanup
[23:34:13] =============== drm_test_framebuffer_create  ===============
[23:34:13] [PASSED] ABGR8888 normal sizes
[23:34:13] [PASSED] ABGR8888 max sizes
[23:34:13] [PASSED] ABGR8888 pitch greater than min required
[23:34:13] [PASSED] ABGR8888 pitch less than min required
[23:34:13] [PASSED] ABGR8888 Invalid width
[23:34:13] [PASSED] ABGR8888 Invalid buffer handle
[23:34:13] [PASSED] No pixel format
[23:34:13] [PASSED] ABGR8888 Width 0
[23:34:13] [PASSED] ABGR8888 Height 0
[23:34:13] [PASSED] ABGR8888 Out of bound height * pitch combination
[23:34:13] [PASSED] ABGR8888 Large buffer offset
[23:34:13] [PASSED] ABGR8888 Buffer offset for inexistent plane
[23:34:13] [PASSED] ABGR8888 Invalid flag
[23:34:13] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[23:34:13] [PASSED] ABGR8888 Valid buffer modifier
[23:34:13] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[23:34:13] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[23:34:13] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[23:34:13] [PASSED] NV12 Normal sizes
[23:34:13] [PASSED] NV12 Max sizes
[23:34:13] [PASSED] NV12 Invalid pitch
[23:34:13] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[23:34:13] [PASSED] NV12 different  modifier per-plane
[23:34:13] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[23:34:13] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[23:34:13] [PASSED] NV12 Modifier for inexistent plane
[23:34:13] [PASSED] NV12 Handle for inexistent plane
[23:34:13] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[23:34:13] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[23:34:13] [PASSED] YVU420 Normal sizes
[23:34:13] [PASSED] YVU420 Max sizes
[23:34:13] [PASSED] YVU420 Invalid pitch
[23:34:13] [PASSED] YVU420 Different pitches
[23:34:13] [PASSED] YVU420 Different buffer offsets/pitches
[23:34:13] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[23:34:13] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[23:34:13] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[23:34:13] [PASSED] YVU420 Valid modifier
[23:34:13] [PASSED] YVU420 Different modifiers per plane
[23:34:13] [PASSED] YVU420 Modifier for inexistent plane
[23:34:13] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[23:34:13] [PASSED] X0L2 Normal sizes
[23:34:13] [PASSED] X0L2 Max sizes
[23:34:13] [PASSED] X0L2 Invalid pitch
[23:34:13] [PASSED] X0L2 Pitch greater than minimum required
[23:34:13] [PASSED] X0L2 Handle for inexistent plane
[23:34:13] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[23:34:13] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[23:34:13] [PASSED] X0L2 Valid modifier
[23:34:13] [PASSED] X0L2 Modifier for inexistent plane
[23:34:13] =========== [PASSED] drm_test_framebuffer_create ===========
[23:34:13] [PASSED] drm_test_framebuffer_free
[23:34:13] [PASSED] drm_test_framebuffer_init
[23:34:13] [PASSED] drm_test_framebuffer_init_bad_format
[23:34:13] [PASSED] drm_test_framebuffer_init_dev_mismatch
[23:34:13] [PASSED] drm_test_framebuffer_lookup
[23:34:13] [PASSED] drm_test_framebuffer_lookup_inexistent
[23:34:13] [PASSED] drm_test_framebuffer_modifiers_not_supported
[23:34:13] ================= [PASSED] drm_framebuffer =================
[23:34:13] ================ drm_gem_shmem (8 subtests) ================
[23:34:13] [PASSED] drm_gem_shmem_test_obj_create
[23:34:13] [PASSED] drm_gem_shmem_test_obj_create_private
[23:34:13] [PASSED] drm_gem_shmem_test_pin_pages
[23:34:13] [PASSED] drm_gem_shmem_test_vmap
[23:34:13] [PASSED] drm_gem_shmem_test_get_sg_table
[23:34:13] [PASSED] drm_gem_shmem_test_get_pages_sgt
[23:34:13] [PASSED] drm_gem_shmem_test_madvise
[23:34:13] [PASSED] drm_gem_shmem_test_purge
[23:34:13] ================== [PASSED] drm_gem_shmem ==================
[23:34:13] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[23:34:13] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[23:34:13] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[23:34:13] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[23:34:13] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[23:34:13] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[23:34:13] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[23:34:13] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[23:34:13] [PASSED] Automatic
[23:34:13] [PASSED] Full
[23:34:13] [PASSED] Limited 16:235
[23:34:13] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[23:34:13] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[23:34:13] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[23:34:13] [PASSED] drm_test_check_disable_connector
[23:34:13] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[23:34:13] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[23:34:13] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[23:34:13] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[23:34:13] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[23:34:13] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[23:34:13] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[23:34:13] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[23:34:13] [PASSED] drm_test_check_output_bpc_dvi
[23:34:13] [PASSED] drm_test_check_output_bpc_format_vic_1
[23:34:13] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[23:34:13] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[23:34:13] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[23:34:13] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[23:34:13] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[23:34:13] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[23:34:13] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[23:34:13] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[23:34:13] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[23:34:13] [PASSED] drm_test_check_broadcast_rgb_value
[23:34:13] [PASSED] drm_test_check_bpc_8_value
[23:34:13] [PASSED] drm_test_check_bpc_10_value
[23:34:13] [PASSED] drm_test_check_bpc_12_value
[23:34:13] [PASSED] drm_test_check_format_value
[23:34:13] [PASSED] drm_test_check_tmds_char_value
[23:34:13] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[23:34:13] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[23:34:13] [PASSED] drm_test_check_mode_valid
[23:34:13] [PASSED] drm_test_check_mode_valid_reject
[23:34:13] [PASSED] drm_test_check_mode_valid_reject_rate
[23:34:13] [PASSED] drm_test_check_mode_valid_reject_max_clock
[23:34:13] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[23:34:13] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[23:34:13] [PASSED] drm_test_check_infoframes
[23:34:13] [PASSED] drm_test_check_reject_avi_infoframe
[23:34:13] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[23:34:13] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[23:34:13] [PASSED] drm_test_check_reject_audio_infoframe
[23:34:13] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[23:34:13] ================= drm_managed (2 subtests) =================
[23:34:13] [PASSED] drm_test_managed_release_action
[23:34:13] [PASSED] drm_test_managed_run_action
[23:34:13] =================== [PASSED] drm_managed ===================
[23:34:13] =================== drm_mm (6 subtests) ====================
[23:34:13] [PASSED] drm_test_mm_init
[23:34:13] [PASSED] drm_test_mm_debug
[23:34:13] [PASSED] drm_test_mm_align32
[23:34:13] [PASSED] drm_test_mm_align64
[23:34:13] [PASSED] drm_test_mm_lowest
[23:34:13] [PASSED] drm_test_mm_highest
[23:34:13] ===================== [PASSED] drm_mm ======================
[23:34:13] ============= drm_modes_analog_tv (5 subtests) =============
[23:34:13] [PASSED] drm_test_modes_analog_tv_mono_576i
[23:34:13] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[23:34:13] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[23:34:13] [PASSED] drm_test_modes_analog_tv_pal_576i
[23:34:13] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[23:34:13] =============== [PASSED] drm_modes_analog_tv ===============
[23:34:13] ============== drm_plane_helper (2 subtests) ===============
[23:34:13] =============== drm_test_check_plane_state  ================
[23:34:13] [PASSED] clipping_simple
[23:34:13] [PASSED] clipping_rotate_reflect
[23:34:13] [PASSED] positioning_simple
[23:34:13] [PASSED] upscaling
[23:34:13] [PASSED] downscaling
[23:34:13] [PASSED] rounding1
[23:34:13] [PASSED] rounding2
[23:34:13] [PASSED] rounding3
[23:34:13] [PASSED] rounding4
[23:34:13] =========== [PASSED] drm_test_check_plane_state ============
[23:34:13] =========== drm_test_check_invalid_plane_state  ============
[23:34:13] [PASSED] positioning_invalid
[23:34:13] [PASSED] upscaling_invalid
[23:34:13] [PASSED] downscaling_invalid
[23:34:13] ======= [PASSED] drm_test_check_invalid_plane_state ========
[23:34:13] ================ [PASSED] drm_plane_helper =================
[23:34:13] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[23:34:13] ====== drm_test_connector_helper_tv_get_modes_check  =======
[23:34:13] [PASSED] None
[23:34:13] [PASSED] PAL
[23:34:13] [PASSED] NTSC
[23:34:13] [PASSED] Both, NTSC Default
[23:34:13] [PASSED] Both, PAL Default
[23:34:13] [PASSED] Both, NTSC Default, with PAL on command-line
[23:34:13] [PASSED] Both, PAL Default, with NTSC on command-line
[23:34:13] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[23:34:13] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[23:34:13] ================== drm_rect (9 subtests) ===================
[23:34:13] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[23:34:13] [PASSED] drm_test_rect_clip_scaled_not_clipped
[23:34:13] [PASSED] drm_test_rect_clip_scaled_clipped
[23:34:13] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[23:34:13] ================= drm_test_rect_intersect  =================
[23:34:13] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[23:34:13] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[23:34:13] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[23:34:13] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[23:34:13] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[23:34:13] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[23:34:13] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[23:34:13] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[23:34:13] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[23:34:13] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[23:34:13] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[23:34:13] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[23:34:13] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[23:34:13] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[23:34:13] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[23:34:13] ============= [PASSED] drm_test_rect_intersect =============
[23:34:13] ================ drm_test_rect_calc_hscale  ================
[23:34:13] [PASSED] normal use
[23:34:13] [PASSED] out of max range
[23:34:13] [PASSED] out of min range
[23:34:13] [PASSED] zero dst
[23:34:13] [PASSED] negative src
[23:34:13] [PASSED] negative dst
[23:34:13] ============ [PASSED] drm_test_rect_calc_hscale ============
[23:34:13] ================ drm_test_rect_calc_vscale  ================
[23:34:13] [PASSED] normal use
[23:34:13] [PASSED] out of max range
[23:34:13] [PASSED] out of min range
[23:34:13] [PASSED] zero dst
[23:34:13] [PASSED] negative src
[23:34:13] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[23:34:13] ============ [PASSED] drm_test_rect_calc_vscale ============
[23:34:13] ================== drm_test_rect_rotate  ===================
[23:34:13] [PASSED] reflect-x
[23:34:13] [PASSED] reflect-y
[23:34:13] [PASSED] rotate-0
[23:34:13] [PASSED] rotate-90
[23:34:13] [PASSED] rotate-180
[23:34:13] [PASSED] rotate-270
[23:34:13] ============== [PASSED] drm_test_rect_rotate ===============
[23:34:13] ================ drm_test_rect_rotate_inv  =================
[23:34:13] [PASSED] reflect-x
[23:34:13] [PASSED] reflect-y
[23:34:13] [PASSED] rotate-0
[23:34:13] [PASSED] rotate-90
[23:34:13] [PASSED] rotate-180
[23:34:13] [PASSED] rotate-270
[23:34:13] ============ [PASSED] drm_test_rect_rotate_inv =============
[23:34:13] ==================== [PASSED] drm_rect =====================
[23:34:13] ============ drm_sysfb_modeset_test (1 subtest) ============
[23:34:13] ============ drm_test_sysfb_build_fourcc_list  =============
[23:34:13] [PASSED] no native formats
[23:34:13] [PASSED] XRGB8888 as native format
[23:34:13] [PASSED] remove duplicates
[23:34:13] [PASSED] convert alpha formats
[23:34:13] [PASSED] random formats
[23:34:13] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[23:34:13] ============= [PASSED] drm_sysfb_modeset_test ==============
[23:34:13] ================== drm_fixp (2 subtests) ===================
[23:34:13] [PASSED] drm_test_int2fixp
[23:34:13] [PASSED] drm_test_sm2fixp
[23:34:13] ==================== [PASSED] drm_fixp =====================
[23:34:13] ============================================================
[23:34:13] Testing complete. Ran 621 tests: passed: 621
[23:34:13] Elapsed time: 27.000s total, 1.603s configuring, 25.265s building, 0.129s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[23:34:13] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:34:15] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:34:24] Starting KUnit Kernel (1/1)...
[23:34:24] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:34:24] ================= ttm_device (5 subtests) ==================
[23:34:24] [PASSED] ttm_device_init_basic
[23:34:24] [PASSED] ttm_device_init_multiple
[23:34:24] [PASSED] ttm_device_fini_basic
[23:34:24] [PASSED] ttm_device_init_no_vma_man
[23:34:24] ================== ttm_device_init_pools  ==================
[23:34:24] [PASSED] No DMA allocations, no DMA32 required
[23:34:24] [PASSED] DMA allocations, DMA32 required
[23:34:24] [PASSED] No DMA allocations, DMA32 required
[23:34:24] [PASSED] DMA allocations, no DMA32 required
[23:34:24] ============== [PASSED] ttm_device_init_pools ==============
[23:34:24] =================== [PASSED] ttm_device ====================
[23:34:24] ================== ttm_pool (8 subtests) ===================
[23:34:24] ================== ttm_pool_alloc_basic  ===================
[23:34:24] [PASSED] One page
[23:34:24] [PASSED] More than one page
[23:34:24] [PASSED] Above the allocation limit
[23:34:24] [PASSED] One page, with coherent DMA mappings enabled
[23:34:24] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[23:34:24] ============== [PASSED] ttm_pool_alloc_basic ===============
[23:34:24] ============== ttm_pool_alloc_basic_dma_addr  ==============
[23:34:24] [PASSED] One page
[23:34:24] [PASSED] More than one page
[23:34:24] [PASSED] Above the allocation limit
[23:34:24] [PASSED] One page, with coherent DMA mappings enabled
[23:34:24] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[23:34:24] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[23:34:24] [PASSED] ttm_pool_alloc_order_caching_match
[23:34:24] [PASSED] ttm_pool_alloc_caching_mismatch
[23:34:24] [PASSED] ttm_pool_alloc_order_mismatch
[23:34:24] [PASSED] ttm_pool_free_dma_alloc
[23:34:24] [PASSED] ttm_pool_free_no_dma_alloc
[23:34:24] [PASSED] ttm_pool_fini_basic
[23:34:24] ==================== [PASSED] ttm_pool =====================
[23:34:24] ================ ttm_resource (8 subtests) =================
[23:34:24] ================= ttm_resource_init_basic  =================
[23:34:24] [PASSED] Init resource in TTM_PL_SYSTEM
[23:34:24] [PASSED] Init resource in TTM_PL_VRAM
[23:34:24] [PASSED] Init resource in a private placement
[23:34:24] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[23:34:24] ============= [PASSED] ttm_resource_init_basic =============
[23:34:24] [PASSED] ttm_resource_init_pinned
[23:34:24] [PASSED] ttm_resource_fini_basic
[23:34:24] [PASSED] ttm_resource_manager_init_basic
[23:34:24] [PASSED] ttm_resource_manager_usage_basic
[23:34:24] [PASSED] ttm_resource_manager_set_used_basic
[23:34:24] [PASSED] ttm_sys_man_alloc_basic
[23:34:24] [PASSED] ttm_sys_man_free_basic
[23:34:24] ================== [PASSED] ttm_resource ===================
[23:34:24] =================== ttm_tt (15 subtests) ===================
[23:34:24] ==================== ttm_tt_init_basic  ====================
[23:34:24] [PASSED] Page-aligned size
[23:34:24] [PASSED] Extra pages requested
[23:34:24] ================ [PASSED] ttm_tt_init_basic ================
[23:34:24] [PASSED] ttm_tt_init_misaligned
[23:34:24] [PASSED] ttm_tt_fini_basic
[23:34:24] [PASSED] ttm_tt_fini_sg
[23:34:24] [PASSED] ttm_tt_fini_shmem
[23:34:24] [PASSED] ttm_tt_create_basic
[23:34:24] [PASSED] ttm_tt_create_invalid_bo_type
[23:34:24] [PASSED] ttm_tt_create_ttm_exists
[23:34:24] [PASSED] ttm_tt_create_failed
[23:34:24] [PASSED] ttm_tt_destroy_basic
[23:34:24] [PASSED] ttm_tt_populate_null_ttm
[23:34:24] [PASSED] ttm_tt_populate_populated_ttm
[23:34:24] [PASSED] ttm_tt_unpopulate_basic
[23:34:24] [PASSED] ttm_tt_unpopulate_empty_ttm
[23:34:24] [PASSED] ttm_tt_swapin_basic
[23:34:24] ===================== [PASSED] ttm_tt ======================
[23:34:24] =================== ttm_bo (14 subtests) ===================
[23:34:24] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[23:34:24] [PASSED] Cannot be interrupted and sleeps
[23:34:24] [PASSED] Cannot be interrupted, locks straight away
[23:34:24] [PASSED] Can be interrupted, sleeps
[23:34:24] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[23:34:24] [PASSED] ttm_bo_reserve_locked_no_sleep
[23:34:24] [PASSED] ttm_bo_reserve_no_wait_ticket
[23:34:24] [PASSED] ttm_bo_reserve_double_resv
[23:34:24] [PASSED] ttm_bo_reserve_interrupted
[23:34:24] [PASSED] ttm_bo_reserve_deadlock
[23:34:24] [PASSED] ttm_bo_unreserve_basic
[23:34:24] [PASSED] ttm_bo_unreserve_pinned
[23:34:24] [PASSED] ttm_bo_unreserve_bulk
[23:34:24] [PASSED] ttm_bo_fini_basic
[23:34:24] [PASSED] ttm_bo_fini_shared_resv
[23:34:24] [PASSED] ttm_bo_pin_basic
[23:34:24] [PASSED] ttm_bo_pin_unpin_resource
[23:34:24] [PASSED] ttm_bo_multiple_pin_one_unpin
[23:34:24] ===================== [PASSED] ttm_bo ======================
[23:34:24] ============== ttm_bo_validate (21 subtests) ===============
[23:34:24] ============== ttm_bo_init_reserved_sys_man  ===============
[23:34:24] [PASSED] Buffer object for userspace
[23:34:24] [PASSED] Kernel buffer object
[23:34:24] [PASSED] Shared buffer object
[23:34:24] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[23:34:24] ============== ttm_bo_init_reserved_mock_man  ==============
[23:34:24] [PASSED] Buffer object for userspace
[23:34:24] [PASSED] Kernel buffer object
[23:34:24] [PASSED] Shared buffer object
[23:34:24] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[23:34:24] [PASSED] ttm_bo_init_reserved_resv
[23:34:24] ================== ttm_bo_validate_basic  ==================
[23:34:24] [PASSED] Buffer object for userspace
[23:34:24] [PASSED] Kernel buffer object
[23:34:24] [PASSED] Shared buffer object
[23:34:24] ============== [PASSED] ttm_bo_validate_basic ==============
[23:34:24] [PASSED] ttm_bo_validate_invalid_placement
[23:34:24] ============= ttm_bo_validate_same_placement  ==============
[23:34:24] [PASSED] System manager
[23:34:24] [PASSED] VRAM manager
[23:34:24] ========= [PASSED] ttm_bo_validate_same_placement ==========
[23:34:24] [PASSED] ttm_bo_validate_failed_alloc
[23:34:24] [PASSED] ttm_bo_validate_pinned
[23:34:24] [PASSED] ttm_bo_validate_busy_placement
[23:34:24] ================ ttm_bo_validate_multihop  =================
[23:34:24] [PASSED] Buffer object for userspace
[23:34:24] [PASSED] Kernel buffer object
[23:34:24] [PASSED] Shared buffer object
[23:34:24] ============ [PASSED] ttm_bo_validate_multihop =============
[23:34:24] ========== ttm_bo_validate_no_placement_signaled  ==========
[23:34:24] [PASSED] Buffer object in system domain, no page vector
[23:34:24] [PASSED] Buffer object in system domain with an existing page vector
[23:34:24] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[23:34:24] ======== ttm_bo_validate_no_placement_not_signaled  ========
[23:34:24] [PASSED] Buffer object for userspace
[23:34:24] [PASSED] Kernel buffer object
[23:34:24] [PASSED] Shared buffer object
[23:34:24] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[23:34:24] [PASSED] ttm_bo_validate_move_fence_signaled
[23:34:24] ========= ttm_bo_validate_move_fence_not_signaled  =========
[23:34:24] [PASSED] Waits for GPU
[23:34:24] [PASSED] Tries to lock straight away
[23:34:24] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[23:34:24] [PASSED] ttm_bo_validate_happy_evict
[23:34:24] [PASSED] ttm_bo_validate_all_pinned_evict
[23:34:24] [PASSED] ttm_bo_validate_allowed_only_evict
[23:34:24] [PASSED] ttm_bo_validate_deleted_evict
[23:34:24] [PASSED] ttm_bo_validate_busy_domain_evict
[23:34:24] [PASSED] ttm_bo_validate_evict_gutting
[23:34:24] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[23:34:24] ================= [PASSED] ttm_bo_validate =================
[23:34:24] ============================================================
[23:34:24] Testing complete. Ran 101 tests: passed: 101
[23:34:24] Elapsed time: 11.482s total, 1.679s configuring, 9.537s building, 0.228s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/xe/vf: Fix exec queue creation during post-migration recovery (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 4971 bytes --]

== Series Details ==

Series: drm/xe/vf: Fix exec queue creation during post-migration recovery (rev2)
URL   : https://patchwork.freedesktop.org/series/161287/
State : success

== Summary ==

CI Bug Log - changes from xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5_BAT -> xe-pw-161287v2_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 14)
------------------------------

  Additional (1): bat-bmg-2 

Known issues
------------

  Here are the changes found in xe-pw-161287v2_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@fbdev@write:
    - bat-bmg-2:          NOTRUN -> [SKIP][1] ([Intel XE#2134]) +4 other tests skip
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/bat-bmg-2/igt@fbdev@write.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - bat-bmg-2:          NOTRUN -> [SKIP][2] ([Intel XE#2233])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/bat-bmg-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
    - bat-bmg-2:          NOTRUN -> [SKIP][3] ([Intel XE#2489] / [Intel XE#3419]) +13 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/bat-bmg-2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html

  * igt@kms_flip@basic-flip-vs-modeset:
    - bat-bmg-2:          NOTRUN -> [SKIP][4] ([Intel XE#2482]) +3 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/bat-bmg-2/igt@kms_flip@basic-flip-vs-modeset.html

  * igt@kms_frontbuffer_tracking@basic:
    - bat-bmg-2:          NOTRUN -> [SKIP][5] ([Intel XE#2434] / [Intel XE#2548] / [Intel XE#6314])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/bat-bmg-2/igt@kms_frontbuffer_tracking@basic.html

  * igt@kms_psr@psr-sprite-plane-onoff:
    - bat-bmg-2:          NOTRUN -> [SKIP][6] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/bat-bmg-2/igt@kms_psr@psr-sprite-plane-onoff.html

  * igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
    - bat-bmg-2:          NOTRUN -> [SKIP][7] ([Intel XE#2229])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/bat-bmg-2/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html

  * igt@xe_pat@pat-index-xehpc:
    - bat-bmg-2:          NOTRUN -> [SKIP][8] ([Intel XE#1420])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/bat-bmg-2/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_pat@pat-index-xelp:
    - bat-bmg-2:          NOTRUN -> [SKIP][9] ([Intel XE#2245])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/bat-bmg-2/igt@xe_pat@pat-index-xelp.html

  * igt@xe_pat@pat-index-xelpg:
    - bat-bmg-2:          NOTRUN -> [SKIP][10] ([Intel XE#2236])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/bat-bmg-2/igt@xe_pat@pat-index-xelpg.html

  
#### Possible fixes ####

  * igt@xe_waitfence@reltime:
    - bat-dg2-oem2:       [FAIL][11] ([Intel XE#6520]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/bat-dg2-oem2/igt@xe_waitfence@reltime.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/bat-dg2-oem2/igt@xe_waitfence@reltime.html

  
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
  [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
  [Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
  [Intel XE#2434]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2434
  [Intel XE#2482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2482
  [Intel XE#2489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2489
  [Intel XE#2548]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2548
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#3419]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3419
  [Intel XE#6314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6314
  [Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520


Build changes
-------------

  * Linux: xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5 -> xe-pw-161287v2

  IGT_8760: 8760
  xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5: 7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5
  xe-pw-161287v2: 161287v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/index.html

[-- Attachment #2: Type: text/html, Size: 5741 bytes --]

✗ Xe.CI.FULL: failure for drm/xe/vf: Fix exec queue creation during post-migration recovery (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 24375 bytes --]

== Series Details ==

Series: drm/xe/vf: Fix exec queue creation during post-migration recovery (rev2)
URL   : https://patchwork.freedesktop.org/series/161287/
State : failure

== Summary ==

CI Bug Log - changes from xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5_FULL -> xe-pw-161287v2_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-161287v2_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-161287v2_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-161287v2_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3:
    - shard-bmg:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-7/igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-3/igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3.html

  * igt@kms_flip@2x-flip-vs-panning:
    - shard-bmg:          [PASS][3] -> [DMESG-WARN][4] +1 other test dmesg-warn
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-6/igt@kms_flip@2x-flip-vs-panning.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-2/igt@kms_flip@2x-flip-vs-panning.html

  
Known issues
------------

  Here are the changes found in xe-pw-161287v2_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@4-tiled-32bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#2327])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-0:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#1124]) +1 other test skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html

  * igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#2314] / [Intel XE#2894])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-8/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html

  * igt@kms_bw@linear-tiling-1-displays-2560x1440p:
    - shard-bmg:          [PASS][8] -> [SKIP][9] ([Intel XE#367])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-5/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html

  * igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2887]) +3 other tests skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#2652] / [Intel XE#787]) +3 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2.html

  * igt@kms_chamelium_hpd@dp-hpd-storm-disable:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2252]) +1 other test skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-8/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html

  * igt@kms_content_protection@atomic:
    - shard-bmg:          NOTRUN -> [FAIL][13] ([Intel XE#1178] / [Intel XE#3304]) +1 other test fail
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@atomic-hdcp14@pipe-a-dp-1:
    - shard-bmg:          NOTRUN -> [FAIL][14] ([Intel XE#3304])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-5/igt@kms_content_protection@atomic-hdcp14@pipe-a-dp-1.html

  * igt@kms_content_protection@uevent:
    - shard-bmg:          NOTRUN -> [FAIL][15] ([Intel XE#6707]) +1 other test fail
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-onscreen-256x85:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#2320])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@kms_cursor_crc@cursor-onscreen-256x85.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-bmg:          [PASS][17] -> [FAIL][18] ([Intel XE#5299])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-7/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_dirtyfb@fbc-dirtyfb-ioctl:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#4210])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@kms_dirtyfb@fbc-dirtyfb-ioctl.html

  * igt@kms_flip@2x-flip-vs-expired-vblank:
    - shard-bmg:          [PASS][20] -> [FAIL][21] ([Intel XE#3321])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-7/igt@kms_flip@2x-flip-vs-expired-vblank.html
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-3/igt@kms_flip@2x-flip-vs-expired-vblank.html

  * igt@kms_flip_scaled_crc@flip-p016-linear-to-p016-linear-reflect-x:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#7179])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-8/igt@kms_flip_scaled_crc@flip-p016-linear-to-p016-linear-reflect-x.html

  * igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#2311]) +6 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#7061])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#4141]) +4 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#2313]) +7 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [PASS][27] -> [SKIP][28] ([Intel XE#1503])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-8/igt@kms_hdr@invalid-hdr.html
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-9/igt@kms_hdr@invalid-hdr.html

  * igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#4090])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html

  * igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#1406] / [Intel XE#1489])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#1406] / [Intel XE#2387])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr@fbc-psr2-sprite-plane-move:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +1 other test skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@kms_psr@fbc-psr2-sprite-plane-move.html

  * igt@kms_rotation_crc@sprite-rotation-90:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#3414] / [Intel XE#3904]) +1 other test skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-8/igt@kms_rotation_crc@sprite-rotation-90.html

  * igt@kms_sharpness_filter@filter-toggle:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#6503])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@kms_sharpness_filter@filter-toggle.html

  * igt@xe_eudebug_online@pagefault-read:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#4837] / [Intel XE#6665])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-8/igt@xe_eudebug_online@pagefault-read.html

  * igt@xe_eudebug_online@pagefault-read-stress:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#6665] / [Intel XE#6681])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@xe_eudebug_online@pagefault-read-stress.html

  * igt@xe_evict@evict-small-external-multi-queue:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#7140])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-8/igt@xe_evict@evict-small-external-multi-queue.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#2322])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html

  * igt@xe_exec_fault_mode@twice-multi-queue-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#7136]) +3 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@xe_exec_fault_mode@twice-multi-queue-userptr.html

  * igt@xe_exec_multi_queue@few-execs-preempt-mode-dyn-priority-smem:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#6874]) +6 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@xe_exec_multi_queue@few-execs-preempt-mode-dyn-priority-smem.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-invalidate-race:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#7138]) +2 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-8/igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-invalidate-race.html

  * igt@xe_module_load@load:
    - shard-bmg:          ([PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66]) -> ([PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72], [PASS][73], [PASS][74], [PASS][75], [PASS][76], [PASS][77], [PASS][78], [PASS][79], [PASS][80], [PASS][81], [PASS][82], [PASS][83], [PASS][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [SKIP][89], [PASS][90], [PASS][91], [PASS][92]) ([Intel XE#2457])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-10/igt@xe_module_load@load.html
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-3/igt@xe_module_load@load.html
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-4/igt@xe_module_load@load.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-1/igt@xe_module_load@load.html
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-1/igt@xe_module_load@load.html
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-1/igt@xe_module_load@load.html
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-7/igt@xe_module_load@load.html
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-7/igt@xe_module_load@load.html
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-2/igt@xe_module_load@load.html
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-2/igt@xe_module_load@load.html
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-8/igt@xe_module_load@load.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-8/igt@xe_module_load@load.html
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-8/igt@xe_module_load@load.html
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-9/igt@xe_module_load@load.html
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-10/igt@xe_module_load@load.html
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-9/igt@xe_module_load@load.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-10/igt@xe_module_load@load.html
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-4/igt@xe_module_load@load.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-3/igt@xe_module_load@load.html
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-3/igt@xe_module_load@load.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-7/igt@xe_module_load@load.html
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-5/igt@xe_module_load@load.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-5/igt@xe_module_load@load.html
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-6/igt@xe_module_load@load.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-6/igt@xe_module_load@load.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-3/igt@xe_module_load@load.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-3/igt@xe_module_load@load.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-8/igt@xe_module_load@load.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-6/igt@xe_module_load@load.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-5/igt@xe_module_load@load.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-9/igt@xe_module_load@load.html
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-9/igt@xe_module_load@load.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-8/igt@xe_module_load@load.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-6/igt@xe_module_load@load.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-6/igt@xe_module_load@load.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-9/igt@xe_module_load@load.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-7/igt@xe_module_load@load.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-7/igt@xe_module_load@load.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-7/igt@xe_module_load@load.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-2/igt@xe_module_load@load.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-4/igt@xe_module_load@load.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-8/igt@xe_module_load@load.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-4/igt@xe_module_load@load.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-1/igt@xe_module_load@load.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-1/igt@xe_module_load@load.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@xe_module_load@load.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-4/igt@xe_module_load@load.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@xe_module_load@load.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@xe_module_load@load.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-2/igt@xe_module_load@load.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-5/igt@xe_module_load@load.html

  * igt@xe_pm@d3hot-i2c:
    - shard-bmg:          NOTRUN -> [SKIP][93] ([Intel XE#5742])
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-8/igt@xe_pm@d3hot-i2c.html

  * igt@xe_pxp@pxp-optout:
    - shard-bmg:          NOTRUN -> [SKIP][94] ([Intel XE#4733]) +1 other test skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@xe_pxp@pxp-optout.html

  
#### Possible fixes ####

  * igt@kms_setmode@basic@pipe-a-edp-1:
    - shard-lnl:          [FAIL][95] ([Intel XE#6361]) -> [PASS][96] +1 other test pass
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-lnl-6/igt@kms_setmode@basic@pipe-a-edp-1.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-lnl-2/igt@kms_setmode@basic@pipe-a-edp-1.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][97] ([Intel XE#6321]) -> [PASS][98]
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-3/igt@xe_evict@evict-mixed-many-threads-small.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-9/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init:
    - shard-bmg:          [ABORT][99] -> [PASS][100]
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-5/igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-10/igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init.html

  
#### Warnings ####

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [SKIP][101] ([Intel XE#2426]) -> [FAIL][102] ([Intel XE#1729])
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4090]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4090
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4210]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4210
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#5299]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5299
  [Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6361
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
  [Intel XE#6681]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6681
  [Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
  [Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787


Build changes
-------------

  * Linux: xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5 -> xe-pw-161287v2

  IGT_8760: 8760
  xe-4573-7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5: 7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5
  xe-pw-161287v2: 161287v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161287v2/index.html

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