Re: [PATCH v2 6/7] drm/xe/migrate: skip bounce buffer path on xe2

[Matthew Auld <matthew.auld@intel.com>]

On 20/10/2025 19:52, Matthew Brost wrote:
> On Mon, Oct 20, 2025 at 01:54:38PM +0100, Matthew Auld wrote:
>> Now that we support MEM_COPY we should be able to use the PAGE_COPY
>> mode, otherwise falling back to BYTE_COPY mode when we have odd
>> sizing/alignment.
>>
>> v2:
>>   - Use info.has_mem_copy_instr
>>   - Rebase on latest changes.
>>
>> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> ---
>>   drivers/gpu/drm/xe/xe_migrate.c | 19 ++++++++++++-------
>>   1 file changed, 12 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
>> index 14ade32b8b69..7819a168ed17 100644
>> --- a/drivers/gpu/drm/xe/xe_migrate.c
>> +++ b/drivers/gpu/drm/xe/xe_migrate.c
>> @@ -1938,8 +1938,9 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
>>   	unsigned long i, j;
>>   	bool use_pde = xe_migrate_vram_use_pde(sram_addr, len + sram_offset);
>>   
>> -	if (drm_WARN_ON(&xe->drm, (len & XE_CACHELINE_MASK) ||
>> -			(sram_offset | vram_addr) & XE_CACHELINE_MASK))
>> +	if (!xe->info.has_mem_copy_instr &&
>> +	    drm_WARN_ON(&xe->drm,
>> +			(len & XE_CACHELINE_MASK) || (sram_offset | vram_addr) & XE_CACHELINE_MASK))
>>   		return ERR_PTR(-EOPNOTSUPP);
>>   
>>   	xe_assert(xe, npages * PAGE_SIZE <= MAX_PREEMPTDISABLE_TRANSFER);
>> @@ -2158,8 +2159,9 @@ int xe_migrate_access_memory(struct xe_migrate *m, struct xe_bo *bo,
>>   	xe_bo_assert_held(bo);
>>   
>>   	/* Use bounce buffer for small access and unaligned access */
>> -	if (!IS_ALIGNED(len, XE_CACHELINE_BYTES) ||
>> -	    !IS_ALIGNED((unsigned long)buf + offset, XE_CACHELINE_BYTES)) {
>> +	if (!xe->info.has_mem_copy_instr &&
>> +	    (!IS_ALIGNED(len, XE_CACHELINE_BYTES) ||
>> +	     !IS_ALIGNED((unsigned long)buf + offset, XE_CACHELINE_BYTES))) {
>>   		int buf_offset = 0;
>>   		void *bounce;
>>   		int err;
>> @@ -2231,9 +2233,12 @@ int xe_migrate_access_memory(struct xe_migrate *m, struct xe_bo *bo,
>>   		if (current_bytes & ~PAGE_MASK) {
>>   			int pitch = 4;
> 
> Shouldn't the pitch be 1 for info.has_mem_copy_instr and / or we use
> linear copy mode for non-256 byte aligned copies?

Ah yes, this is indeed wrong. Thanks for catching that.

> 
> Matt
> 
>>   
>> -			current_bytes = min_t(int, current_bytes,
>> -					      round_down(S16_MAX * pitch,
>> -							 XE_CACHELINE_BYTES));
>> +			if (xe->info.has_mem_copy_instr)
>> +				current_bytes = min_t(int, current_bytes, U16_MAX * pitch);
>> +			else
>> +				current_bytes =
>> +					min_t(int, current_bytes,
>> +					      round_down(S16_MAX * pitch, XE_CACHELINE_BYTES));
>>   		}
>>   
>>   		__fence = xe_migrate_vram(m, current_bytes,
>> -- 
>> 2.51.0
>>