[PATCH v2 0/7] Some migration fixes/improvements

[PATCH v2 0/7] Some migration fixes/improvements

[Matthew Auld]

Notably also cutting over to MEM_COPY instruction.

v2:
  - Various improvements from Matt Brost.
  - Allow easily switching between MEM_COPY and old path with configfs.
-- 
2.51.0

[PATCH v2 1/7] drm/xe/migrate: rework size restrictions for sram pte emit

[Matthew Auld]

We allow the input size to not be aligned to PAGE_SIZE, which leads to
various bugs in build_pt_update_batch_sram() for PAGE_SIZE > 4K systems.
For example if ptes is exactly one gpu_page_size then the chunk size is
rounded down to zero.  The simplest fix looks to be forcing PAGE_SIZE
aligned inputs.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_migrate.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 3112c966c67d..8ff2d3b98e7f 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -1798,6 +1798,8 @@ static void build_pt_update_batch_sram(struct xe_migrate *m,
 	u32 ptes;
 	int i = 0;
 
+	xe_tile_assert(m->tile, PAGE_ALIGNED(size));
+
 	ptes = DIV_ROUND_UP(size, gpu_page_size);
 	while (ptes) {
 		u32 chunk = min(MAX_PTE_PER_SDI, ptes);
@@ -1811,12 +1813,13 @@ static void build_pt_update_batch_sram(struct xe_migrate *m,
 		ptes -= chunk;
 
 		while (chunk--) {
-			u64 addr = sram_addr[i].addr & ~(gpu_page_size - 1);
-			u64 pte, orig_addr = addr;
+			u64 addr = sram_addr[i].addr;
+			u64 pte;
 
 			xe_tile_assert(m->tile, sram_addr[i].proto ==
 				       DRM_INTERCONNECT_SYSTEM);
 			xe_tile_assert(m->tile, addr);
+			xe_tile_assert(m->tile, PAGE_ALIGNED(addr));
 
 again:
 			pte = m->q->vm->pt_ops->pte_encode_addr(m->tile->xe,
@@ -1827,7 +1830,7 @@ static void build_pt_update_batch_sram(struct xe_migrate *m,
 
 			if (gpu_page_size < PAGE_SIZE) {
 				addr += XE_PAGE_SIZE;
-				if (orig_addr + PAGE_SIZE != addr) {
+				if (!PAGE_ALIGNED(addr)) {
 					chunk--;
 					goto again;
 				}
@@ -1918,10 +1921,10 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
 
 	if (use_pde)
 		build_pt_update_batch_sram(m, bb, m->large_page_copy_pdes,
-					   sram_addr, len + sram_offset, 1);
+					   sram_addr, npages << PAGE_SHIFT, 1);
 	else
 		build_pt_update_batch_sram(m, bb, pt_slot * XE_PAGE_SIZE,
-					   sram_addr, len + sram_offset, 0);
+					   sram_addr, npages << PAGE_SHIFT, 0);
 
 	if (dir == XE_MIGRATE_COPY_TO_VRAM) {
 		if (use_pde)
-- 
2.51.0

[PATCH v2 2/7] drm/xe/migrate: fix chunk handling for 2M page emit

[Matthew Auld]

On systems with PAGE_SIZE > 4K the chunk will likely be rounded down to
zero, if say we have single 2M page, so one huge pte, since we also try
to align the chunk to PAGE_SIZE / XE_PAGE_SIZE, which will be 16 on 64K
systems. Make the ALIGN_DOWN conditional for 4K PTEs where we can
encounter gpu_page_size < PAGE_SIZE.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_migrate.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 8ff2d3b98e7f..7643715f63cc 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -1804,7 +1804,9 @@ static void build_pt_update_batch_sram(struct xe_migrate *m,
 	while (ptes) {
 		u32 chunk = min(MAX_PTE_PER_SDI, ptes);
 
-		chunk = ALIGN_DOWN(chunk, PAGE_SIZE / XE_PAGE_SIZE);
+		if (!level)
+			chunk = ALIGN_DOWN(chunk, PAGE_SIZE / XE_PAGE_SIZE);
+
 		bb->cs[bb->len++] = MI_STORE_DATA_IMM | MI_SDI_NUM_QW(chunk);
 		bb->cs[bb->len++] = pt_offset;
 		bb->cs[bb->len++] = 0;
-- 
2.51.0

[PATCH v2 3/7] drm/xe/migrate: fix batch buffer sizing

[Matthew Auld]

In xe_migrate_vram() the copy can straddle page boundaries, so the len
might look like a single page, but actually accounting for the offset
within the page we will need to emit more than one PTE. Otherwise in
some cases the batch buffer will be undersized leading to warnings
later.  We already have npages so use that instead.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_migrate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 7643715f63cc..665ab38b39f1 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -1894,7 +1894,7 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
 
 	xe_assert(xe, npages * PAGE_SIZE <= MAX_PREEMPTDISABLE_TRANSFER);
 
-	batch_size += pte_update_cmd_size(len);
+	batch_size += pte_update_cmd_size(npages << PAGE_SHIFT);
 	batch_size += EMIT_COPY_DW;
 
 	bb = xe_bb_new(gt, batch_size, use_usm_batch);
-- 
2.51.0

[PATCH v2 4/7] drm/xe/migrate: trim batch buffer sizing

[Matthew Auld]

We have an extra two dwords, but it looks like we should only need one
for the extra bb_end. Likely this is just leftover from back when the
arb handling was moved into the ring programming.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_migrate.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 665ab38b39f1..c966b6bad930 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -847,7 +847,7 @@ struct dma_fence *xe_migrate_copy(struct xe_migrate *m,
 				&ccs_it);
 
 	while (size) {
-		u32 batch_size = 2; /* arb_clear() + MI_BATCH_BUFFER_END */
+		u32 batch_size = 1; /* MI_BATCH_BUFFER_END */
 		struct xe_sched_job *job;
 		struct xe_bb *bb;
 		u32 flush_flags = 0;
@@ -1312,7 +1312,7 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m,
 
 		/* Calculate final sizes and batch size.. */
 		pte_flags = clear_vram ? PTE_UPDATE_FLAG_IS_VRAM : 0;
-		batch_size = 2 +
+		batch_size = 1 +
 			pte_update_size(m, pte_flags, src, &src_it,
 					&clear_L0, &clear_L0_ofs, &clear_L0_pt,
 					clear_bo_data ? emit_clear_cmd_len(gt) : 0, 0,
@@ -1876,7 +1876,7 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
 	struct xe_device *xe = gt_to_xe(gt);
 	bool use_usm_batch = xe->info.has_usm;
 	struct dma_fence *fence = NULL;
-	u32 batch_size = 2;
+	u32 batch_size = 1;
 	u64 src_L0_ofs, dst_L0_ofs;
 	struct xe_sched_job *job;
 	struct xe_bb *bb;
-- 
2.51.0

[PATCH v2 5/7] drm/xe/migrate: support MEM_COPY instruction

[Matthew Auld]

Make this the default on xe2+ when doing a copy. This has a few
advantages over the exiting copy instruction:

1) It has a special PAGE_COPY mode that claims to be optimised for
   page-in/page-out, which is the vast majority of current users.

2) It also has a simple BYTE_COPY mode that supports byte granularity
   copying without any restrictions.

With 2) we can now easily skip the bounce buffer flow when copying
buffers with strange sizing/alignment, like for memory_access. But that
is left for the next patch.

v2 (Matt Brost):
  - Use device info to check whether device should use the MEM_COPY
    path. This should fit better with making this a configfs tunable.
  - And with that also keep old path still functional on xe2 for possible
    experimentation.
  - Add a define for PAGE_COPY page-size.

BSpec: 57561
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
 .../gpu/drm/xe/instructions/xe_gpu_commands.h |  6 ++
 drivers/gpu/drm/xe/xe_device_types.h          |  2 +
 drivers/gpu/drm/xe/xe_migrate.c               | 56 ++++++++++++++++++-
 drivers/gpu/drm/xe/xe_pci.c                   |  4 ++
 drivers/gpu/drm/xe/xe_pci_types.h             |  1 +
 5 files changed, 66 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h b/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
index 8cfcd3360896..5d41ca297447 100644
--- a/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
+++ b/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
@@ -31,6 +31,12 @@
 #define   XY_FAST_COPY_BLT_D1_DST_TILE4	REG_BIT(30)
 #define   XE2_XY_FAST_COPY_BLT_MOCS_INDEX_MASK	GENMASK(23, 20)
 
+#define MEM_COPY_CMD (2 << 29 | 0x5a << 22 | 0x8)
+#define   MEM_COPY_PAGE_COPY_MODE REG_BIT(19)
+#define   MEM_COPY_MATRIX_COPY REG_BIT(17)
+#define   MEM_COPY_SRC_MOCS_INDEX_MASK	GENMASK(31, 28)
+#define   MEM_COPY_DST_MOCS_INDEX_MASK	GENMASK(6, 3)
+
 #define	PVC_MEM_SET_CMD		(2 << 29 | 0x5b << 22)
 #define   PVC_MEM_SET_CMD_LEN_DW	7
 #define   PVC_MEM_SET_MATRIX		REG_BIT(17)
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 02c04ad7296e..6a62b520f5b5 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -305,6 +305,8 @@ struct xe_device {
 		 * pcode mailbox commands.
 		 */
 		u8 has_mbx_power_limits:1;
+		/** @info.has_mem_copy_instr: Device supports MEM_COPY instruction */
+		u8 has_mem_copy_instr:1;
 		/** @info.has_pxp: Device has PXP support */
 		u8 has_pxp:1;
 		/** @info.has_range_tlb_inval: Has range based TLB invalidations */
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index c966b6bad930..14ade32b8b69 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -699,9 +699,9 @@ static void emit_copy_ccs(struct xe_gt *gt, struct xe_bb *bb,
 }
 
 #define EMIT_COPY_DW 10
-static void emit_copy(struct xe_gt *gt, struct xe_bb *bb,
-		      u64 src_ofs, u64 dst_ofs, unsigned int size,
-		      unsigned int pitch)
+static void emit_xy_fast_copy(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,
+			      u64 dst_ofs, unsigned int size,
+			      unsigned int pitch)
 {
 	struct xe_device *xe = gt_to_xe(gt);
 	u32 mocs = 0;
@@ -730,6 +730,56 @@ static void emit_copy(struct xe_gt *gt, struct xe_bb *bb,
 	bb->cs[bb->len++] = upper_32_bits(src_ofs);
 }
 
+#define PAGE_COPY_MODE_PS SZ_256 /* hw uses 256 bytes as the page-size */
+static void emit_mem_copy(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,
+			  u64 dst_ofs, unsigned int size, unsigned int pitch)
+{
+	u32 mode, copy_type, width;
+
+	xe_gt_assert(gt, IS_ALIGNED(size, pitch));
+	xe_gt_assert(gt, pitch <= U16_MAX);
+	xe_gt_assert(gt, size);
+
+	if (IS_ALIGNED(size, PAGE_COPY_MODE_PS) &&
+	    IS_ALIGNED(lower_32_bits(src_ofs), PAGE_COPY_MODE_PS) &&
+	    IS_ALIGNED(lower_32_bits(dst_ofs), PAGE_COPY_MODE_PS)) {
+		mode = MEM_COPY_PAGE_COPY_MODE;
+		copy_type = 0; /* linear copy */
+		width = size / PAGE_COPY_MODE_PS;
+	} else {
+		xe_gt_assert(gt, size / pitch <= U16_MAX);
+		mode = 0; /* BYTE_COPY */
+		copy_type = MEM_COPY_MATRIX_COPY;
+		width = pitch;
+	}
+
+	xe_gt_assert(gt, width <= U16_MAX);
+
+	bb->cs[bb->len++] = MEM_COPY_CMD | mode | copy_type;
+	bb->cs[bb->len++] = width - 1;
+	bb->cs[bb->len++] = size / pitch - 1; /* ignored by hw for page copy above */
+	bb->cs[bb->len++] = pitch - 1;
+	bb->cs[bb->len++] = pitch - 1;
+	bb->cs[bb->len++] = lower_32_bits(src_ofs);
+	bb->cs[bb->len++] = upper_32_bits(src_ofs);
+	bb->cs[bb->len++] = lower_32_bits(dst_ofs);
+	bb->cs[bb->len++] = upper_32_bits(dst_ofs);
+	bb->cs[bb->len++] = FIELD_PREP(MEM_COPY_SRC_MOCS_INDEX_MASK, gt->mocs.uc_index) |
+			    FIELD_PREP(MEM_COPY_DST_MOCS_INDEX_MASK, gt->mocs.uc_index);
+}
+
+static void emit_copy(struct xe_gt *gt, struct xe_bb *bb,
+		      u64 src_ofs, u64 dst_ofs, unsigned int size,
+		      unsigned int pitch)
+{
+	struct xe_device *xe = gt_to_xe(gt);
+
+	if (xe->info.has_mem_copy_instr)
+		emit_mem_copy(gt, bb, src_ofs, dst_ofs, size, pitch);
+	else
+		emit_xy_fast_copy(gt, bb, src_ofs, dst_ofs, size, pitch);
+}
+
 static u64 xe_migrate_batch_base(struct xe_migrate *m, bool usm)
 {
 	return usm ? m->usm_batch_base_ofs : m->batch_base_ofs;
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index c3136141a953..8458d4ae8ee7 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -342,6 +342,7 @@ static const struct xe_device_desc lnl_desc = {
 	.has_display = true,
 	.has_flat_ccs = 1,
 	.has_pxp = true,
+	.has_mem_copy_instr = true,
 	.max_gt_per_tile = 2,
 	.needs_scratch = true,
 	.va_bits = 48,
@@ -362,6 +363,7 @@ static const struct xe_device_desc bmg_desc = {
 	.has_heci_cscfi = 1,
 	.has_late_bind = true,
 	.has_sriov = true,
+	.has_mem_copy_instr = true,
 	.max_gt_per_tile = 2,
 	.needs_scratch = true,
 	.subplatforms = (const struct xe_subplatform_desc[]) {
@@ -378,6 +380,7 @@ static const struct xe_device_desc ptl_desc = {
 	.has_display = true,
 	.has_flat_ccs = 1,
 	.has_sriov = true,
+	.has_mem_copy_instr = true,
 	.max_gt_per_tile = 2,
 	.needs_scratch = true,
 	.needs_shared_vf_gt_wq = true,
@@ -657,6 +660,7 @@ static int xe_info_init_early(struct xe_device *xe,
 	xe->info.has_pxp = desc->has_pxp;
 	xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) &&
 		desc->has_sriov;
+	xe->info.has_mem_copy_instr = desc->has_mem_copy_instr;
 	xe->info.skip_guc_pc = desc->skip_guc_pc;
 	xe->info.skip_mtcfg = desc->skip_mtcfg;
 	xe->info.skip_pcode = desc->skip_pcode;
diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index a4451bdc79fb..9892c063a9c5 100644
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -46,6 +46,7 @@ struct xe_device_desc {
 	u8 has_late_bind:1;
 	u8 has_llc:1;
 	u8 has_mbx_power_limits:1;
+	u8 has_mem_copy_instr:1;
 	u8 has_pxp:1;
 	u8 has_sriov:1;
 	u8 needs_scratch:1;
-- 
2.51.0

Re: [PATCH v2 5/7] drm/xe/migrate: support MEM_COPY instruction

[Matthew Brost]

On Mon, Oct 20, 2025 at 01:54:37PM +0100, Matthew Auld wrote:
> Make this the default on xe2+ when doing a copy. This has a few
> advantages over the exiting copy instruction:
> 
> 1) It has a special PAGE_COPY mode that claims to be optimised for
>    page-in/page-out, which is the vast majority of current users.
> 
> 2) It also has a simple BYTE_COPY mode that supports byte granularity
>    copying without any restrictions.
> 
> With 2) we can now easily skip the bounce buffer flow when copying
> buffers with strange sizing/alignment, like for memory_access. But that
> is left for the next patch.
> 
> v2 (Matt Brost):
>   - Use device info to check whether device should use the MEM_COPY
>     path. This should fit better with making this a configfs tunable.
>   - And with that also keep old path still functional on xe2 for possible
>     experimentation.
>   - Add a define for PAGE_COPY page-size.
> 
> BSpec: 57561
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>

Reviewed-by: Matthew Brost <matthew.brost@intel.com>

> ---
>  .../gpu/drm/xe/instructions/xe_gpu_commands.h |  6 ++
>  drivers/gpu/drm/xe/xe_device_types.h          |  2 +
>  drivers/gpu/drm/xe/xe_migrate.c               | 56 ++++++++++++++++++-
>  drivers/gpu/drm/xe/xe_pci.c                   |  4 ++
>  drivers/gpu/drm/xe/xe_pci_types.h             |  1 +
>  5 files changed, 66 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h b/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
> index 8cfcd3360896..5d41ca297447 100644
> --- a/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
> +++ b/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h
> @@ -31,6 +31,12 @@
>  #define   XY_FAST_COPY_BLT_D1_DST_TILE4	REG_BIT(30)
>  #define   XE2_XY_FAST_COPY_BLT_MOCS_INDEX_MASK	GENMASK(23, 20)
>  
> +#define MEM_COPY_CMD (2 << 29 | 0x5a << 22 | 0x8)
> +#define   MEM_COPY_PAGE_COPY_MODE REG_BIT(19)
> +#define   MEM_COPY_MATRIX_COPY REG_BIT(17)
> +#define   MEM_COPY_SRC_MOCS_INDEX_MASK	GENMASK(31, 28)
> +#define   MEM_COPY_DST_MOCS_INDEX_MASK	GENMASK(6, 3)
> +
>  #define	PVC_MEM_SET_CMD		(2 << 29 | 0x5b << 22)
>  #define   PVC_MEM_SET_CMD_LEN_DW	7
>  #define   PVC_MEM_SET_MATRIX		REG_BIT(17)
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 02c04ad7296e..6a62b520f5b5 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -305,6 +305,8 @@ struct xe_device {
>  		 * pcode mailbox commands.
>  		 */
>  		u8 has_mbx_power_limits:1;
> +		/** @info.has_mem_copy_instr: Device supports MEM_COPY instruction */
> +		u8 has_mem_copy_instr:1;
>  		/** @info.has_pxp: Device has PXP support */
>  		u8 has_pxp:1;
>  		/** @info.has_range_tlb_inval: Has range based TLB invalidations */
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index c966b6bad930..14ade32b8b69 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -699,9 +699,9 @@ static void emit_copy_ccs(struct xe_gt *gt, struct xe_bb *bb,
>  }
>  
>  #define EMIT_COPY_DW 10
> -static void emit_copy(struct xe_gt *gt, struct xe_bb *bb,
> -		      u64 src_ofs, u64 dst_ofs, unsigned int size,
> -		      unsigned int pitch)
> +static void emit_xy_fast_copy(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,
> +			      u64 dst_ofs, unsigned int size,
> +			      unsigned int pitch)
>  {
>  	struct xe_device *xe = gt_to_xe(gt);
>  	u32 mocs = 0;
> @@ -730,6 +730,56 @@ static void emit_copy(struct xe_gt *gt, struct xe_bb *bb,
>  	bb->cs[bb->len++] = upper_32_bits(src_ofs);
>  }
>  
> +#define PAGE_COPY_MODE_PS SZ_256 /* hw uses 256 bytes as the page-size */
> +static void emit_mem_copy(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs,
> +			  u64 dst_ofs, unsigned int size, unsigned int pitch)
> +{
> +	u32 mode, copy_type, width;
> +
> +	xe_gt_assert(gt, IS_ALIGNED(size, pitch));
> +	xe_gt_assert(gt, pitch <= U16_MAX);
> +	xe_gt_assert(gt, size);
> +
> +	if (IS_ALIGNED(size, PAGE_COPY_MODE_PS) &&
> +	    IS_ALIGNED(lower_32_bits(src_ofs), PAGE_COPY_MODE_PS) &&
> +	    IS_ALIGNED(lower_32_bits(dst_ofs), PAGE_COPY_MODE_PS)) {
> +		mode = MEM_COPY_PAGE_COPY_MODE;
> +		copy_type = 0; /* linear copy */
> +		width = size / PAGE_COPY_MODE_PS;
> +	} else {
> +		xe_gt_assert(gt, size / pitch <= U16_MAX);
> +		mode = 0; /* BYTE_COPY */
> +		copy_type = MEM_COPY_MATRIX_COPY;
> +		width = pitch;
> +	}
> +
> +	xe_gt_assert(gt, width <= U16_MAX);
> +
> +	bb->cs[bb->len++] = MEM_COPY_CMD | mode | copy_type;
> +	bb->cs[bb->len++] = width - 1;
> +	bb->cs[bb->len++] = size / pitch - 1; /* ignored by hw for page copy above */
> +	bb->cs[bb->len++] = pitch - 1;
> +	bb->cs[bb->len++] = pitch - 1;
> +	bb->cs[bb->len++] = lower_32_bits(src_ofs);
> +	bb->cs[bb->len++] = upper_32_bits(src_ofs);
> +	bb->cs[bb->len++] = lower_32_bits(dst_ofs);
> +	bb->cs[bb->len++] = upper_32_bits(dst_ofs);
> +	bb->cs[bb->len++] = FIELD_PREP(MEM_COPY_SRC_MOCS_INDEX_MASK, gt->mocs.uc_index) |
> +			    FIELD_PREP(MEM_COPY_DST_MOCS_INDEX_MASK, gt->mocs.uc_index);
> +}
> +
> +static void emit_copy(struct xe_gt *gt, struct xe_bb *bb,
> +		      u64 src_ofs, u64 dst_ofs, unsigned int size,
> +		      unsigned int pitch)
> +{
> +	struct xe_device *xe = gt_to_xe(gt);
> +
> +	if (xe->info.has_mem_copy_instr)
> +		emit_mem_copy(gt, bb, src_ofs, dst_ofs, size, pitch);
> +	else
> +		emit_xy_fast_copy(gt, bb, src_ofs, dst_ofs, size, pitch);
> +}
> +
>  static u64 xe_migrate_batch_base(struct xe_migrate *m, bool usm)
>  {
>  	return usm ? m->usm_batch_base_ofs : m->batch_base_ofs;
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index c3136141a953..8458d4ae8ee7 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -342,6 +342,7 @@ static const struct xe_device_desc lnl_desc = {
>  	.has_display = true,
>  	.has_flat_ccs = 1,
>  	.has_pxp = true,
> +	.has_mem_copy_instr = true,
>  	.max_gt_per_tile = 2,
>  	.needs_scratch = true,
>  	.va_bits = 48,
> @@ -362,6 +363,7 @@ static const struct xe_device_desc bmg_desc = {
>  	.has_heci_cscfi = 1,
>  	.has_late_bind = true,
>  	.has_sriov = true,
> +	.has_mem_copy_instr = true,
>  	.max_gt_per_tile = 2,
>  	.needs_scratch = true,
>  	.subplatforms = (const struct xe_subplatform_desc[]) {
> @@ -378,6 +380,7 @@ static const struct xe_device_desc ptl_desc = {
>  	.has_display = true,
>  	.has_flat_ccs = 1,
>  	.has_sriov = true,
> +	.has_mem_copy_instr = true,
>  	.max_gt_per_tile = 2,
>  	.needs_scratch = true,
>  	.needs_shared_vf_gt_wq = true,
> @@ -657,6 +660,7 @@ static int xe_info_init_early(struct xe_device *xe,
>  	xe->info.has_pxp = desc->has_pxp;
>  	xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) &&
>  		desc->has_sriov;
> +	xe->info.has_mem_copy_instr = desc->has_mem_copy_instr;
>  	xe->info.skip_guc_pc = desc->skip_guc_pc;
>  	xe->info.skip_mtcfg = desc->skip_mtcfg;
>  	xe->info.skip_pcode = desc->skip_pcode;
> diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
> index a4451bdc79fb..9892c063a9c5 100644
> --- a/drivers/gpu/drm/xe/xe_pci_types.h
> +++ b/drivers/gpu/drm/xe/xe_pci_types.h
> @@ -46,6 +46,7 @@ struct xe_device_desc {
>  	u8 has_late_bind:1;
>  	u8 has_llc:1;
>  	u8 has_mbx_power_limits:1;
> +	u8 has_mem_copy_instr:1;
>  	u8 has_pxp:1;
>  	u8 has_sriov:1;
>  	u8 needs_scratch:1;
> -- 
> 2.51.0
> 

[PATCH v2 6/7] drm/xe/migrate: skip bounce buffer path on xe2

[Matthew Auld]

Now that we support MEM_COPY we should be able to use the PAGE_COPY
mode, otherwise falling back to BYTE_COPY mode when we have odd
sizing/alignment.

v2:
 - Use info.has_mem_copy_instr
 - Rebase on latest changes.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_migrate.c | 19 ++++++++++++-------
 1 file changed, 12 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 14ade32b8b69..7819a168ed17 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -1938,8 +1938,9 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
 	unsigned long i, j;
 	bool use_pde = xe_migrate_vram_use_pde(sram_addr, len + sram_offset);
 
-	if (drm_WARN_ON(&xe->drm, (len & XE_CACHELINE_MASK) ||
-			(sram_offset | vram_addr) & XE_CACHELINE_MASK))
+	if (!xe->info.has_mem_copy_instr &&
+	    drm_WARN_ON(&xe->drm,
+			(len & XE_CACHELINE_MASK) || (sram_offset | vram_addr) & XE_CACHELINE_MASK))
 		return ERR_PTR(-EOPNOTSUPP);
 
 	xe_assert(xe, npages * PAGE_SIZE <= MAX_PREEMPTDISABLE_TRANSFER);
@@ -2158,8 +2159,9 @@ int xe_migrate_access_memory(struct xe_migrate *m, struct xe_bo *bo,
 	xe_bo_assert_held(bo);
 
 	/* Use bounce buffer for small access and unaligned access */
-	if (!IS_ALIGNED(len, XE_CACHELINE_BYTES) ||
-	    !IS_ALIGNED((unsigned long)buf + offset, XE_CACHELINE_BYTES)) {
+	if (!xe->info.has_mem_copy_instr &&
+	    (!IS_ALIGNED(len, XE_CACHELINE_BYTES) ||
+	     !IS_ALIGNED((unsigned long)buf + offset, XE_CACHELINE_BYTES))) {
 		int buf_offset = 0;
 		void *bounce;
 		int err;
@@ -2231,9 +2233,12 @@ int xe_migrate_access_memory(struct xe_migrate *m, struct xe_bo *bo,
 		if (current_bytes & ~PAGE_MASK) {
 			int pitch = 4;
 
-			current_bytes = min_t(int, current_bytes,
-					      round_down(S16_MAX * pitch,
-							 XE_CACHELINE_BYTES));
+			if (xe->info.has_mem_copy_instr)
+				current_bytes = min_t(int, current_bytes, U16_MAX * pitch);
+			else
+				current_bytes =
+					min_t(int, current_bytes,
+					      round_down(S16_MAX * pitch, XE_CACHELINE_BYTES));
 		}
 
 		__fence = xe_migrate_vram(m, current_bytes,
-- 
2.51.0

Re: [PATCH v2 6/7] drm/xe/migrate: skip bounce buffer path on xe2

[Matthew Brost]

On Mon, Oct 20, 2025 at 01:54:38PM +0100, Matthew Auld wrote:
> Now that we support MEM_COPY we should be able to use the PAGE_COPY
> mode, otherwise falling back to BYTE_COPY mode when we have odd
> sizing/alignment.
> 
> v2:
>  - Use info.has_mem_copy_instr
>  - Rebase on latest changes.
> 
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_migrate.c | 19 ++++++++++++-------
>  1 file changed, 12 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index 14ade32b8b69..7819a168ed17 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -1938,8 +1938,9 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
>  	unsigned long i, j;
>  	bool use_pde = xe_migrate_vram_use_pde(sram_addr, len + sram_offset);
>  
> -	if (drm_WARN_ON(&xe->drm, (len & XE_CACHELINE_MASK) ||
> -			(sram_offset | vram_addr) & XE_CACHELINE_MASK))
> +	if (!xe->info.has_mem_copy_instr &&
> +	    drm_WARN_ON(&xe->drm,
> +			(len & XE_CACHELINE_MASK) || (sram_offset | vram_addr) & XE_CACHELINE_MASK))
>  		return ERR_PTR(-EOPNOTSUPP);
>  
>  	xe_assert(xe, npages * PAGE_SIZE <= MAX_PREEMPTDISABLE_TRANSFER);
> @@ -2158,8 +2159,9 @@ int xe_migrate_access_memory(struct xe_migrate *m, struct xe_bo *bo,
>  	xe_bo_assert_held(bo);
>  
>  	/* Use bounce buffer for small access and unaligned access */
> -	if (!IS_ALIGNED(len, XE_CACHELINE_BYTES) ||
> -	    !IS_ALIGNED((unsigned long)buf + offset, XE_CACHELINE_BYTES)) {
> +	if (!xe->info.has_mem_copy_instr &&
> +	    (!IS_ALIGNED(len, XE_CACHELINE_BYTES) ||
> +	     !IS_ALIGNED((unsigned long)buf + offset, XE_CACHELINE_BYTES))) {
>  		int buf_offset = 0;
>  		void *bounce;
>  		int err;
> @@ -2231,9 +2233,12 @@ int xe_migrate_access_memory(struct xe_migrate *m, struct xe_bo *bo,
>  		if (current_bytes & ~PAGE_MASK) {
>  			int pitch = 4;

Shouldn't the pitch be 1 for info.has_mem_copy_instr and / or we use
linear copy mode for non-256 byte aligned copies?

Matt 

>  
> -			current_bytes = min_t(int, current_bytes,
> -					      round_down(S16_MAX * pitch,
> -							 XE_CACHELINE_BYTES));
> +			if (xe->info.has_mem_copy_instr)
> +				current_bytes = min_t(int, current_bytes, U16_MAX * pitch);
> +			else
> +				current_bytes =
> +					min_t(int, current_bytes,
> +					      round_down(S16_MAX * pitch, XE_CACHELINE_BYTES));
>  		}
>  
>  		__fence = xe_migrate_vram(m, current_bytes,
> -- 
> 2.51.0
> 

Re: [PATCH v2 6/7] drm/xe/migrate: skip bounce buffer path on xe2

[Matthew Auld]

On 20/10/2025 19:52, Matthew Brost wrote:
> On Mon, Oct 20, 2025 at 01:54:38PM +0100, Matthew Auld wrote:
>> Now that we support MEM_COPY we should be able to use the PAGE_COPY
>> mode, otherwise falling back to BYTE_COPY mode when we have odd
>> sizing/alignment.
>>
>> v2:
>>   - Use info.has_mem_copy_instr
>>   - Rebase on latest changes.
>>
>> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> ---
>>   drivers/gpu/drm/xe/xe_migrate.c | 19 ++++++++++++-------
>>   1 file changed, 12 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
>> index 14ade32b8b69..7819a168ed17 100644
>> --- a/drivers/gpu/drm/xe/xe_migrate.c
>> +++ b/drivers/gpu/drm/xe/xe_migrate.c
>> @@ -1938,8 +1938,9 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
>>   	unsigned long i, j;
>>   	bool use_pde = xe_migrate_vram_use_pde(sram_addr, len + sram_offset);
>>   
>> -	if (drm_WARN_ON(&xe->drm, (len & XE_CACHELINE_MASK) ||
>> -			(sram_offset | vram_addr) & XE_CACHELINE_MASK))
>> +	if (!xe->info.has_mem_copy_instr &&
>> +	    drm_WARN_ON(&xe->drm,
>> +			(len & XE_CACHELINE_MASK) || (sram_offset | vram_addr) & XE_CACHELINE_MASK))
>>   		return ERR_PTR(-EOPNOTSUPP);
>>   
>>   	xe_assert(xe, npages * PAGE_SIZE <= MAX_PREEMPTDISABLE_TRANSFER);
>> @@ -2158,8 +2159,9 @@ int xe_migrate_access_memory(struct xe_migrate *m, struct xe_bo *bo,
>>   	xe_bo_assert_held(bo);
>>   
>>   	/* Use bounce buffer for small access and unaligned access */
>> -	if (!IS_ALIGNED(len, XE_CACHELINE_BYTES) ||
>> -	    !IS_ALIGNED((unsigned long)buf + offset, XE_CACHELINE_BYTES)) {
>> +	if (!xe->info.has_mem_copy_instr &&
>> +	    (!IS_ALIGNED(len, XE_CACHELINE_BYTES) ||
>> +	     !IS_ALIGNED((unsigned long)buf + offset, XE_CACHELINE_BYTES))) {
>>   		int buf_offset = 0;
>>   		void *bounce;
>>   		int err;
>> @@ -2231,9 +2233,12 @@ int xe_migrate_access_memory(struct xe_migrate *m, struct xe_bo *bo,
>>   		if (current_bytes & ~PAGE_MASK) {
>>   			int pitch = 4;
> 
> Shouldn't the pitch be 1 for info.has_mem_copy_instr and / or we use
> linear copy mode for non-256 byte aligned copies?

Ah yes, this is indeed wrong. Thanks for catching that.

> 
> Matt
> 
>>   
>> -			current_bytes = min_t(int, current_bytes,
>> -					      round_down(S16_MAX * pitch,
>> -							 XE_CACHELINE_BYTES));
>> +			if (xe->info.has_mem_copy_instr)
>> +				current_bytes = min_t(int, current_bytes, U16_MAX * pitch);
>> +			else
>> +				current_bytes =
>> +					min_t(int, current_bytes,
>> +					      round_down(S16_MAX * pitch, XE_CACHELINE_BYTES));
>>   		}
>>   
>>   		__fence = xe_migrate_vram(m, current_bytes,
>> -- 
>> 2.51.0
>>

[PATCH v2 7/7] drm/xe/configfs: add disable_mem_copy knob

[Matthew Auld]

For easier experimentation/comparison allow turning off the newer
MEM_COPY path, without needing to apply manual hacks and build a new
kernel. This needs to be configured before fully probing the device.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_configfs.c | 65 ++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_configfs.h |  2 +
 drivers/gpu/drm/xe/xe_pci.c      |  4 +-
 3 files changed, 70 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index c1419a270fa4..df459daa0f07 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -236,6 +236,15 @@
  *
  * This setting only takes effect when probing the device.
  *
+ * Disable MEM_COPY path
+ * -----------------------------------------------------
+ * This config will force the use of the older XY_FAST_COPY instruction in the migration code.
+ * Intended only for experimentation.
+ *
+ *	# echo 1 > /sys/kernel/config/xe/0000:03:00.0/disable_mem_copy
+ *
+ * This setting only takes effect when probing the device.
+ *
  * Remove devices
  * ==============
  *
@@ -264,6 +273,9 @@ struct xe_config_group_device {
 		struct {
 			unsigned int max_vfs;
 		} sriov;
+		struct {
+			bool disable_mem_copy;
+		} migrate;
 	} config;
 
 	/* protects attributes */
@@ -282,6 +294,9 @@ static const struct xe_config_device device_defaults = {
 	.sriov = {
 		.max_vfs = UINT_MAX,
 	},
+	.migrate = {
+		.disable_mem_copy = false,
+	},
 };
 
 static void set_device_defaults(struct xe_config_device *config)
@@ -809,8 +824,35 @@ static ssize_t ctx_restore_post_bb_store(struct config_item *item,
 	return wa_bb_store(dev->config.ctx_restore_post_bb, dev, data, sz);
 }
 
+static ssize_t disable_mem_copy_show(struct config_item *item, char *page)
+{
+	struct xe_config_device *dev = to_xe_config_device(item);
+
+	return sprintf(page, "%d\n", dev->migrate.disable_mem_copy);
+}
+
+static ssize_t disable_mem_copy_store(struct config_item *item, const char *page, size_t len)
+{
+	struct xe_config_group_device *dev = to_xe_config_group_device(item);
+	bool val;
+	int ret;
+
+	ret = kstrtobool(page, &val);
+	if (ret)
+		return ret;
+
+	guard(mutex)(&dev->lock);
+	if (is_bound(dev))
+		return -EBUSY;
+
+	dev->config.migrate.disable_mem_copy = val;
+
+	return len;
+}
+
 CONFIGFS_ATTR(, ctx_restore_mid_bb);
 CONFIGFS_ATTR(, ctx_restore_post_bb);
+CONFIGFS_ATTR(, disable_mem_copy);
 CONFIGFS_ATTR(, enable_psmi);
 CONFIGFS_ATTR(, engines_allowed);
 CONFIGFS_ATTR(, gt_types_allowed);
@@ -819,6 +861,7 @@ CONFIGFS_ATTR(, survivability_mode);
 static struct configfs_attribute *xe_config_device_attrs[] = {
 	&attr_ctx_restore_mid_bb,
 	&attr_ctx_restore_post_bb,
+	&attr_disable_mem_copy,
 	&attr_enable_psmi,
 	&attr_engines_allowed,
 	&attr_gt_types_allowed,
@@ -1065,6 +1108,7 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
 	PRI_CUSTOM_ATTR("%llx", engines_allowed);
 	PRI_CUSTOM_ATTR("%d", enable_psmi);
 	PRI_CUSTOM_ATTR("%d", survivability_mode);
+	PRI_CUSTOM_ATTR("%d", migrate.disable_mem_copy);
 
 #undef PRI_CUSTOM_ATTR
 }
@@ -1242,6 +1286,27 @@ u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
 	return len;
 }
 
+/**
+ * xe_configfs_migrate_disable_mem_copy - get configfs disable_mem_copy setting
+ * @pdev: pci device
+ *
+ * Return: True if fast_copy_xy instruction in migration code should be used as the default. False
+ * otherwise.
+ */
+bool xe_configfs_migrate_disable_mem_copy(struct pci_dev *pdev)
+{
+	struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+	bool disable_mem_copy;
+
+	if (!dev)
+		return false;
+
+	disable_mem_copy = dev->config.migrate.disable_mem_copy;
+	config_group_put(&dev->group);
+
+	return disable_mem_copy;
+}
+
 #ifdef CONFIG_PCI_IOV
 /**
  * xe_configfs_get_max_vfs() - Get number of VFs that could be managed
diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
index fed57be0b90e..01f285ce56f2 100644
--- a/drivers/gpu/drm/xe/xe_configfs.h
+++ b/drivers/gpu/drm/xe/xe_configfs.h
@@ -25,6 +25,7 @@ u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev, enum xe_engine_clas
 				       const u32 **cs);
 u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
 					const u32 **cs);
+bool xe_configfs_migrate_disable_mem_copy(struct pci_dev *pdev);
 #ifdef CONFIG_PCI_IOV
 unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev);
 #endif
@@ -42,6 +43,7 @@ static inline u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev, enum
 static inline u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
 						      const u32 **cs) { return 0; }
 static inline unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev) { return UINT_MAX; }
+bool xe_configfs_migrate_disable_mem_copy(struct pci_dev *pdev) { return false; }
 #endif
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 8458d4ae8ee7..9f8a2a298216 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -660,7 +660,9 @@ static int xe_info_init_early(struct xe_device *xe,
 	xe->info.has_pxp = desc->has_pxp;
 	xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) &&
 		desc->has_sriov;
-	xe->info.has_mem_copy_instr = desc->has_mem_copy_instr;
+	xe->info.has_mem_copy_instr =
+		desc->has_mem_copy_instr &&
+		!xe_configfs_migrate_disable_mem_copy(to_pci_dev(xe->drm.dev));
 	xe->info.skip_guc_pc = desc->skip_guc_pc;
 	xe->info.skip_mtcfg = desc->skip_mtcfg;
 	xe->info.skip_pcode = desc->skip_pcode;
-- 
2.51.0

Re: [PATCH v2 7/7] drm/xe/configfs: add disable_mem_copy knob

[Matthew Brost]

On Mon, Oct 20, 2025 at 01:54:39PM +0100, Matthew Auld wrote:
> For easier experimentation/comparison allow turning off the newer
> MEM_COPY path, without needing to apply manual hacks and build a new
> kernel. This needs to be configured before fully probing the device.
> 
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>

Reviewed-by: Matthew Brost <matthew.brost@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_configfs.c | 65 ++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_configfs.h |  2 +
>  drivers/gpu/drm/xe/xe_pci.c      |  4 +-
>  3 files changed, 70 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
> index c1419a270fa4..df459daa0f07 100644
> --- a/drivers/gpu/drm/xe/xe_configfs.c
> +++ b/drivers/gpu/drm/xe/xe_configfs.c
> @@ -236,6 +236,15 @@
>   *
>   * This setting only takes effect when probing the device.
>   *
> + * Disable MEM_COPY path
> + * -----------------------------------------------------
> + * This config will force the use of the older XY_FAST_COPY instruction in the migration code.
> + * Intended only for experimentation.
> + *
> + *	# echo 1 > /sys/kernel/config/xe/0000:03:00.0/disable_mem_copy
> + *
> + * This setting only takes effect when probing the device.
> + *
>   * Remove devices
>   * ==============
>   *
> @@ -264,6 +273,9 @@ struct xe_config_group_device {
>  		struct {
>  			unsigned int max_vfs;
>  		} sriov;
> +		struct {
> +			bool disable_mem_copy;
> +		} migrate;
>  	} config;
>  
>  	/* protects attributes */
> @@ -282,6 +294,9 @@ static const struct xe_config_device device_defaults = {
>  	.sriov = {
>  		.max_vfs = UINT_MAX,
>  	},
> +	.migrate = {
> +		.disable_mem_copy = false,
> +	},
>  };
>  
>  static void set_device_defaults(struct xe_config_device *config)
> @@ -809,8 +824,35 @@ static ssize_t ctx_restore_post_bb_store(struct config_item *item,
>  	return wa_bb_store(dev->config.ctx_restore_post_bb, dev, data, sz);
>  }
>  
> +static ssize_t disable_mem_copy_show(struct config_item *item, char *page)
> +{
> +	struct xe_config_device *dev = to_xe_config_device(item);
> +
> +	return sprintf(page, "%d\n", dev->migrate.disable_mem_copy);
> +}
> +
> +static ssize_t disable_mem_copy_store(struct config_item *item, const char *page, size_t len)
> +{
> +	struct xe_config_group_device *dev = to_xe_config_group_device(item);
> +	bool val;
> +	int ret;
> +
> +	ret = kstrtobool(page, &val);
> +	if (ret)
> +		return ret;
> +
> +	guard(mutex)(&dev->lock);
> +	if (is_bound(dev))
> +		return -EBUSY;
> +
> +	dev->config.migrate.disable_mem_copy = val;
> +
> +	return len;
> +}
> +
>  CONFIGFS_ATTR(, ctx_restore_mid_bb);
>  CONFIGFS_ATTR(, ctx_restore_post_bb);
> +CONFIGFS_ATTR(, disable_mem_copy);
>  CONFIGFS_ATTR(, enable_psmi);
>  CONFIGFS_ATTR(, engines_allowed);
>  CONFIGFS_ATTR(, gt_types_allowed);
> @@ -819,6 +861,7 @@ CONFIGFS_ATTR(, survivability_mode);
>  static struct configfs_attribute *xe_config_device_attrs[] = {
>  	&attr_ctx_restore_mid_bb,
>  	&attr_ctx_restore_post_bb,
> +	&attr_disable_mem_copy,
>  	&attr_enable_psmi,
>  	&attr_engines_allowed,
>  	&attr_gt_types_allowed,
> @@ -1065,6 +1108,7 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
>  	PRI_CUSTOM_ATTR("%llx", engines_allowed);
>  	PRI_CUSTOM_ATTR("%d", enable_psmi);
>  	PRI_CUSTOM_ATTR("%d", survivability_mode);
> +	PRI_CUSTOM_ATTR("%d", migrate.disable_mem_copy);
>  
>  #undef PRI_CUSTOM_ATTR
>  }
> @@ -1242,6 +1286,27 @@ u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
>  	return len;
>  }
>  
> +/**
> + * xe_configfs_migrate_disable_mem_copy - get configfs disable_mem_copy setting
> + * @pdev: pci device
> + *
> + * Return: True if fast_copy_xy instruction in migration code should be used as the default. False
> + * otherwise.
> + */
> +bool xe_configfs_migrate_disable_mem_copy(struct pci_dev *pdev)
> +{
> +	struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
> +	bool disable_mem_copy;
> +
> +	if (!dev)
> +		return false;
> +
> +	disable_mem_copy = dev->config.migrate.disable_mem_copy;
> +	config_group_put(&dev->group);
> +
> +	return disable_mem_copy;
> +}
> +
>  #ifdef CONFIG_PCI_IOV
>  /**
>   * xe_configfs_get_max_vfs() - Get number of VFs that could be managed
> diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
> index fed57be0b90e..01f285ce56f2 100644
> --- a/drivers/gpu/drm/xe/xe_configfs.h
> +++ b/drivers/gpu/drm/xe/xe_configfs.h
> @@ -25,6 +25,7 @@ u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev, enum xe_engine_clas
>  				       const u32 **cs);
>  u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
>  					const u32 **cs);
> +bool xe_configfs_migrate_disable_mem_copy(struct pci_dev *pdev);
>  #ifdef CONFIG_PCI_IOV
>  unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev);
>  #endif
> @@ -42,6 +43,7 @@ static inline u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev, enum
>  static inline u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
>  						      const u32 **cs) { return 0; }
>  static inline unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev) { return UINT_MAX; }
> +bool xe_configfs_migrate_disable_mem_copy(struct pci_dev *pdev) { return false; }
>  #endif
>  
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index 8458d4ae8ee7..9f8a2a298216 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -660,7 +660,9 @@ static int xe_info_init_early(struct xe_device *xe,
>  	xe->info.has_pxp = desc->has_pxp;
>  	xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) &&
>  		desc->has_sriov;
> -	xe->info.has_mem_copy_instr = desc->has_mem_copy_instr;
> +	xe->info.has_mem_copy_instr =
> +		desc->has_mem_copy_instr &&
> +		!xe_configfs_migrate_disable_mem_copy(to_pci_dev(xe->drm.dev));
>  	xe->info.skip_guc_pc = desc->skip_guc_pc;
>  	xe->info.skip_mtcfg = desc->skip_mtcfg;
>  	xe->info.skip_pcode = desc->skip_pcode;
> -- 
> 2.51.0
> 

Re: [PATCH v2 7/7] drm/xe/configfs: add disable_mem_copy knob

[Lucas De Marchi]

On Mon, Oct 20, 2025 at 01:54:39PM +0100, Matthew Auld wrote:
>For easier experimentation/comparison allow turning off the newer
>MEM_COPY path, without needing to apply manual hacks and build a new
>kernel. This needs to be configured before fully probing the device.
>
>Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>Cc: Matthew Brost <matthew.brost@intel.com>
>---
> drivers/gpu/drm/xe/xe_configfs.c | 65 ++++++++++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_configfs.h |  2 +
> drivers/gpu/drm/xe/xe_pci.c      |  4 +-
> 3 files changed, 70 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
>index c1419a270fa4..df459daa0f07 100644
>--- a/drivers/gpu/drm/xe/xe_configfs.c
>+++ b/drivers/gpu/drm/xe/xe_configfs.c
>@@ -236,6 +236,15 @@
>  *
>  * This setting only takes effect when probing the device.
>  *
>+ * Disable MEM_COPY path
>+ * -----------------------------------------------------
>+ * This config will force the use of the older XY_FAST_COPY instruction in the migration code.
>+ * Intended only for experimentation.
>+ *
>+ *	# echo 1 > /sys/kernel/config/xe/0000:03:00.0/disable_mem_copy
>+ *
>+ * This setting only takes effect when probing the device.
>+ *
>  * Remove devices
>  * ==============
>  *
>@@ -264,6 +273,9 @@ struct xe_config_group_device {
> 		struct {
> 			unsigned int max_vfs;
> 		} sriov;
>+		struct {
>+			bool disable_mem_copy;
>+		} migrate;

so this is migrate.disable_mem_copy

...

> CONFIGFS_ATTR(, ctx_restore_mid_bb);
> CONFIGFS_ATTR(, ctx_restore_post_bb);
>+CONFIGFS_ATTR(, disable_mem_copy);

but the attribute is a misleading "disable_mem_copy".

Note that configfs is not a place for hacks so if it's generally useful
we need to think of a name that is not misleading and will be
future-proof. This seems more like "the MEM_COPY for migration is a new
path and we may have bugs or we want to compare them in the short term".
Did I misunderstand the purpose of the patch?

Lucas De Marchi

Re: [PATCH v2 7/7] drm/xe/configfs: add disable_mem_copy knob

[Matthew Auld]

On 21/10/2025 03:18, Lucas De Marchi wrote:
> On Mon, Oct 20, 2025 at 01:54:39PM +0100, Matthew Auld wrote:
>> For easier experimentation/comparison allow turning off the newer
>> MEM_COPY path, without needing to apply manual hacks and build a new
>> kernel. This needs to be configured before fully probing the device.
>>
>> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_configfs.c | 65 ++++++++++++++++++++++++++++++++
>> drivers/gpu/drm/xe/xe_configfs.h |  2 +
>> drivers/gpu/drm/xe/xe_pci.c      |  4 +-
>> 3 files changed, 70 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/ 
>> xe_configfs.c
>> index c1419a270fa4..df459daa0f07 100644
>> --- a/drivers/gpu/drm/xe/xe_configfs.c
>> +++ b/drivers/gpu/drm/xe/xe_configfs.c
>> @@ -236,6 +236,15 @@
>>  *
>>  * This setting only takes effect when probing the device.
>>  *
>> + * Disable MEM_COPY path
>> + * -----------------------------------------------------
>> + * This config will force the use of the older XY_FAST_COPY 
>> instruction in the migration code.
>> + * Intended only for experimentation.
>> + *
>> + *    # echo 1 > /sys/kernel/config/xe/0000:03:00.0/disable_mem_copy
>> + *
>> + * This setting only takes effect when probing the device.
>> + *
>>  * Remove devices
>>  * ==============
>>  *
>> @@ -264,6 +273,9 @@ struct xe_config_group_device {
>>         struct {
>>             unsigned int max_vfs;
>>         } sriov;
>> +        struct {
>> +            bool disable_mem_copy;
>> +        } migrate;
> 
> so this is migrate.disable_mem_copy
> 
> ...
> 
>> CONFIGFS_ATTR(, ctx_restore_mid_bb);
>> CONFIGFS_ATTR(, ctx_restore_post_bb);
>> +CONFIGFS_ATTR(, disable_mem_copy);
> 
> but the attribute is a misleading "disable_mem_copy".

I was just trying to group the migrate related knobs under one struct 
since there could potentially be more in the future. Should that be 
reflected in the attribute? Should we do migrate_disable_mem_copy or did 
you mean something else here?

> 
> Note that configfs is not a place for hacks so if it's generally useful
> we need to think of a name that is not misleading and will be
> future-proof. This seems more like "the MEM_COPY for migration is a new
> path and we may have bugs or we want to compare them in the short term".
> Did I misunderstand the purpose of the patch?

Yeah, it's likely more a short/medium term thing. Although I did also 
use it to quickly test both paths on one machine. Happy to drop this 
one, if this is not a good fit.

> 
> Lucas De Marchi

✗ CI.KUnit: failure for Some migration fixes/improvements (rev2)

[Patchwork]

== Series Details ==

Series: Some migration fixes/improvements (rev2)
URL   : https://patchwork.freedesktop.org/series/155997/
State : failure

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[13:04:10] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:04:14] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
ERROR:root:In file included from ../drivers/gpu/drm/xe/xe_guc.c:20:
../drivers/gpu/drm/xe/xe_configfs.h:46:6: warning: no previous prototype for ‘xe_configfs_migrate_disable_mem_copy’ [-Wmissing-prototypes]
   46 | bool xe_configfs_migrate_disable_mem_copy(struct pci_dev *pdev) { return false; }
      |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_hw_engine.c:20:
../drivers/gpu/drm/xe/xe_configfs.h:46:6: warning: no previous prototype for ‘xe_configfs_migrate_disable_mem_copy’ [-Wmissing-prototypes]
   46 | bool xe_configfs_migrate_disable_mem_copy(struct pci_dev *pdev) { return false; }
      |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_lrc.c:20:
../drivers/gpu/drm/xe/xe_configfs.h:46:6: warning: no previous prototype for ‘xe_configfs_migrate_disable_mem_copy’ [-Wmissing-prototypes]
   46 | bool xe_configfs_migrate_disable_mem_copy(struct pci_dev *pdev) { return false; }
      |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_module.c:14:
../drivers/gpu/drm/xe/xe_configfs.h:46:6: warning: no previous prototype for ‘xe_configfs_migrate_disable_mem_copy’ [-Wmissing-prototypes]
   46 | bool xe_configfs_migrate_disable_mem_copy(struct pci_dev *pdev) { return false; }
      |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_pci.c:21:
../drivers/gpu/drm/xe/xe_configfs.h:46:6: warning: no previous prototype for ‘xe_configfs_migrate_disable_mem_copy’ [-Wmissing-prototypes]
   46 | bool xe_configfs_migrate_disable_mem_copy(struct pci_dev *pdev) { return false; }
      |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_rtp.c:12:
../drivers/gpu/drm/xe/xe_configfs.h:46:6: warning: no previous prototype for ‘xe_configfs_migrate_disable_mem_copy’ [-Wmissing-prototypes]
   46 | bool xe_configfs_migrate_disable_mem_copy(struct pci_dev *pdev) { return false; }
      |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_psmi.c:10:
../drivers/gpu/drm/xe/xe_configfs.h:46:6: warning: no previous prototype for ‘xe_configfs_migrate_disable_mem_copy’ [-Wmissing-prototypes]
   46 | bool xe_configfs_migrate_disable_mem_copy(struct pci_dev *pdev) { return false; }
      |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_survivability_mode.c:13:
../drivers/gpu/drm/xe/xe_configfs.h:46:6: warning: no previous prototype for ‘xe_configfs_migrate_disable_mem_copy’ [-Wmissing-prototypes]
   46 | bool xe_configfs_migrate_disable_mem_copy(struct pci_dev *pdev) { return false; }
      |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../drivers/gpu/drm/xe/xe_sriov_pf.c:11:
../drivers/gpu/drm/xe/xe_configfs.h:46:6: warning: no previous prototype for ‘xe_configfs_migrate_disable_mem_copy’ [-Wmissing-prototypes]
   46 | bool xe_configfs_migrate_disable_mem_copy(struct pci_dev *pdev) { return false; }
      |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
ld: drivers/gpu/drm/xe/xe_hw_engine.o: in function `xe_configfs_migrate_disable_mem_copy':
xe_hw_engine.c:(.text+0x410): multiple definition of `xe_configfs_migrate_disable_mem_copy'; drivers/gpu/drm/xe/xe_guc.o:xe_guc.c:(.text+0x15a0): first defined here
ld: drivers/gpu/drm/xe/xe_lrc.o: in function `xe_configfs_migrate_disable_mem_copy':
xe_lrc.c:(.text+0xbe0): multiple definition of `xe_configfs_migrate_disable_mem_copy'; drivers/gpu/drm/xe/xe_guc.o:xe_guc.c:(.text+0x15a0): first defined here
ld: drivers/gpu/drm/xe/xe_module.o: in function `xe_configfs_migrate_disable_mem_copy':
xe_module.c:(.text+0x40): multiple definition of `xe_configfs_migrate_disable_mem_copy'; drivers/gpu/drm/xe/xe_guc.o:xe_guc.c:(.text+0x15a0): first defined here
ld: drivers/gpu/drm/xe/xe_pci.o: in function `xe_configfs_migrate_disable_mem_copy':
xe_pci.c:(.text+0x23b0): multiple definition of `xe_configfs_migrate_disable_mem_copy'; drivers/gpu/drm/xe/xe_guc.o:xe_guc.c:(.text+0x15a0): first defined here
ld: drivers/gpu/drm/xe/xe_psmi.o: in function `xe_configfs_migrate_disable_mem_copy':
xe_psmi.c:(.text+0x0): multiple definition of `xe_configfs_migrate_disable_mem_copy'; drivers/gpu/drm/xe/xe_guc.o:xe_guc.c:(.text+0x15a0): first defined here
ld: drivers/gpu/drm/xe/xe_rtp.o: in function `xe_configfs_migrate_disable_mem_copy':
xe_rtp.c:(.text+0xbd0): multiple definition of `xe_configfs_migrate_disable_mem_copy'; drivers/gpu/drm/xe/xe_guc.o:xe_guc.c:(.text+0x15a0): first defined here
ld: drivers/gpu/drm/xe/xe_survivability_mode.o: in function `xe_configfs_migrate_disable_mem_copy':
xe_survivability_mode.c:(.text+0x3b0): multiple definition of `xe_configfs_migrate_disable_mem_copy'; drivers/gpu/drm/xe/xe_guc.o:xe_guc.c:(.text+0x15a0): first defined here
ld: drivers/gpu/drm/xe/xe_sriov_pf.o: in function `xe_configfs_migrate_disable_mem_copy':
xe_sriov_pf.c:(.text+0x40): multiple definition of `xe_configfs_migrate_disable_mem_copy'; drivers/gpu/drm/xe/xe_guc.o:xe_guc.c:(.text+0x15a0): first defined here
make[3]: *** [../scripts/Makefile.vmlinux_o:72: vmlinux.o] Error 1
make[2]: *** [/kernel/Makefile:1223: vmlinux_o] Error 2
make[1]: *** [/kernel/Makefile:248: __sub-make] Error 2
make: *** [Makefile:248: __sub-make] Error 2

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel