* [PATCH v3] drm/xe/hwmon: Fix xe_hwmon_power_max_write
@ 2025-06-16 7:11 Karthik Poosa
2025-06-16 7:40 ` Riana Tauro
` (3 more replies)
0 siblings, 4 replies; 8+ messages in thread
From: Karthik Poosa @ 2025-06-16 7:11 UTC (permalink / raw)
To: intel-xe; +Cc: anshuman.gupta, badal.nilawar, riana.tauro, Karthik Poosa
Prevent other bits of mailbox power limit from being overwritten with 0.
This issue was due to a missing read and modify of current power limit,
before setting a requested mailbox power limit, which is added in this
patch.
v2:
- Improve commit message. (Anshuman)
v3:
- Rebase.
- Rephrase commit message. (Riana)
- Add read-modify-write variant of xe_hwmon_pcode_write_power_limit()
i.e. xe_hwmon_pcode_rmw_power_limit(). (Badal)
- Use xe_hwmon_pcode_rmw_power_limit() to set mailbox power limits.
- Remove xe_hwmon_pcode_write_power_limit() as all mailbox power limits
writes use xe_hwmon_pcode_rmw_power_limit() only.
Fixes: 7596d839f6228 ("drm/xe/hwmon: Add support to manage power limits though mailbox")
Reviewed-by: Riana Tauro <riana.tauro@intel.com>
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
drivers/gpu/drm/xe/regs/xe_mchbar_regs.h | 1 +
drivers/gpu/drm/xe/xe_hwmon.c | 48 ++++++++++++------------
2 files changed, 24 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h b/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h
index 5394a1373a6b..ef2bf984723f 100644
--- a/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h
@@ -40,6 +40,7 @@
#define PCU_CR_PACKAGE_RAPL_LIMIT XE_REG(MCHBAR_MIRROR_BASE_SNB + 0x59a0)
#define PWR_LIM_VAL REG_GENMASK(14, 0)
#define PWR_LIM_EN REG_BIT(15)
+#define PWR_LIM REG_GENMASK(15, 0)
#define PWR_LIM_TIME REG_GENMASK(23, 17)
#define PWR_LIM_TIME_X REG_GENMASK(23, 22)
#define PWR_LIM_TIME_Y REG_GENMASK(21, 17)
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 0d32e977537c..fa841311bdcf 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -175,8 +175,8 @@ static int xe_hwmon_pcode_read_power_limit(const struct xe_hwmon *hwmon, u32 att
return ret;
}
-static int xe_hwmon_pcode_write_power_limit(const struct xe_hwmon *hwmon, u32 attr, u8 channel,
- u32 uval)
+static int xe_hwmon_pcode_rmw_power_limit(const struct xe_hwmon *hwmon, u32 attr, u8 channel,
+ u32 clr, u32 set)
{
struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
u32 val0, val1;
@@ -195,9 +195,9 @@ static int xe_hwmon_pcode_write_power_limit(const struct xe_hwmon *hwmon, u32 at
channel, val0, val1, ret);
if (attr == PL1_HWMON_ATTR)
- val0 = uval;
+ val0 = (val0 & ~clr) | set;
else if (attr == PL2_HWMON_ATTR)
- val1 = uval;
+ val1 = (val1 & ~clr) | set;
else
return -EIO;
@@ -342,7 +342,7 @@ static int xe_hwmon_power_max_write(struct xe_hwmon *hwmon, u32 attr, int channe
if (hwmon->xe->info.has_mbx_power_limits) {
drm_dbg(&hwmon->xe->drm, "disabling %s on channel %d\n",
PWR_ATTR_TO_STR(attr), channel);
- xe_hwmon_pcode_write_power_limit(hwmon, attr, channel, 0);
+ xe_hwmon_pcode_rmw_power_limit(hwmon, attr, channel, PWR_LIM_EN, 0);
xe_hwmon_pcode_read_power_limit(hwmon, attr, channel, ®_val);
} else {
reg_val = xe_mmio_rmw32(mmio, rapl_limit, PWR_LIM_EN, 0);
@@ -378,7 +378,8 @@ static int xe_hwmon_power_max_write(struct xe_hwmon *hwmon, u32 attr, int channe
reg_val = PWR_LIM_EN | REG_FIELD_PREP(PWR_LIM_VAL, reg_val);
if (hwmon->xe->info.has_mbx_power_limits)
- ret = xe_hwmon_pcode_write_power_limit(hwmon, attr, channel, reg_val);
+ ret = xe_hwmon_pcode_rmw_power_limit(hwmon, attr, channel, PWR_LIM_EN | PWR_LIM_VAL,
+ reg_val);
else
reg_val = xe_mmio_rmw32(mmio, rapl_limit, PWR_LIM_EN | PWR_LIM_VAL,
reg_val);
@@ -591,14 +592,11 @@ xe_hwmon_power_max_interval_store(struct device *dev, struct device_attribute *a
mutex_lock(&hwmon->hwmon_lock);
- if (hwmon->xe->info.has_mbx_power_limits) {
- ret = xe_hwmon_pcode_read_power_limit(hwmon, power_attr, channel, (u32 *)&r);
- r = (r & ~PWR_LIM_TIME) | rxy;
- xe_hwmon_pcode_write_power_limit(hwmon, power_attr, channel, r);
- } else {
+ if (hwmon->xe->info.has_mbx_power_limits)
+ xe_hwmon_pcode_rmw_power_limit(hwmon, power_attr, channel, PWR_LIM_TIME, rxy);
+ else
r = xe_mmio_rmw32(mmio, xe_hwmon_get_reg(hwmon, REG_PKG_RAPL_LIMIT, channel),
PWR_LIM_TIME, rxy);
- }
mutex_unlock(&hwmon->hwmon_lock);
@@ -1217,25 +1215,25 @@ xe_hwmon_get_preregistration_info(struct xe_hwmon *hwmon)
&hwmon->pl1_on_boot[CHANNEL_PKG]) |
xe_hwmon_pcode_read_power_limit(hwmon, PL2_HWMON_ATTR, CHANNEL_CARD,
&hwmon->pl2_on_boot[CHANNEL_CARD]) |
- xe_hwmon_pcode_read_power_limit(hwmon, PL1_HWMON_ATTR, CHANNEL_PKG,
+ xe_hwmon_pcode_read_power_limit(hwmon, PL2_HWMON_ATTR, CHANNEL_PKG,
&hwmon->pl2_on_boot[CHANNEL_PKG])) {
drm_warn(&hwmon->xe->drm,
"Failed to read power limits, check GPU firmware !\n");
} else {
drm_info(&hwmon->xe->drm, "Using mailbox commands for power limits\n");
/* Write default limits to read from pcode from now on. */
- xe_hwmon_pcode_write_power_limit(hwmon, PL1_HWMON_ATTR,
- CHANNEL_CARD,
- hwmon->pl1_on_boot[CHANNEL_CARD]);
- xe_hwmon_pcode_write_power_limit(hwmon, PL1_HWMON_ATTR,
- CHANNEL_PKG,
- hwmon->pl1_on_boot[CHANNEL_PKG]);
- xe_hwmon_pcode_write_power_limit(hwmon, PL2_HWMON_ATTR,
- CHANNEL_CARD,
- hwmon->pl2_on_boot[CHANNEL_CARD]);
- xe_hwmon_pcode_write_power_limit(hwmon, PL2_HWMON_ATTR,
- CHANNEL_PKG,
- hwmon->pl2_on_boot[CHANNEL_PKG]);
+ xe_hwmon_pcode_rmw_power_limit(hwmon, PL1_HWMON_ATTR,
+ CHANNEL_CARD, PWR_LIM | PWR_LIM_TIME,
+ hwmon->pl1_on_boot[CHANNEL_CARD]);
+ xe_hwmon_pcode_rmw_power_limit(hwmon, PL1_HWMON_ATTR,
+ CHANNEL_PKG, PWR_LIM | PWR_LIM_TIME,
+ hwmon->pl1_on_boot[CHANNEL_PKG]);
+ xe_hwmon_pcode_rmw_power_limit(hwmon, PL2_HWMON_ATTR,
+ CHANNEL_CARD, PWR_LIM | PWR_LIM_TIME,
+ hwmon->pl2_on_boot[CHANNEL_CARD]);
+ xe_hwmon_pcode_rmw_power_limit(hwmon, PL2_HWMON_ATTR,
+ CHANNEL_PKG, PWR_LIM | PWR_LIM_TIME,
+ hwmon->pl2_on_boot[CHANNEL_PKG]);
hwmon->scl_shift_power = PWR_UNIT;
hwmon->scl_shift_energy = ENERGY_UNIT;
hwmon->scl_shift_time = TIME_UNIT;
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v3] drm/xe/hwmon: Fix xe_hwmon_power_max_write
2025-06-16 7:11 [PATCH v3] drm/xe/hwmon: Fix xe_hwmon_power_max_write Karthik Poosa
@ 2025-06-16 7:40 ` Riana Tauro
2025-06-17 10:13 ` Poosa, Karthik
2025-06-16 12:38 ` ✓ CI.KUnit: success for drm/xe/hwmon: Fix xe_hwmon_power_max_write (rev5) Patchwork
` (2 subsequent siblings)
3 siblings, 1 reply; 8+ messages in thread
From: Riana Tauro @ 2025-06-16 7:40 UTC (permalink / raw)
To: Karthik Poosa, intel-xe; +Cc: anshuman.gupta, badal.nilawar
Hi Karthik
On 6/16/2025 12:41 PM, Karthik Poosa wrote:
> Prevent other bits of mailbox power limit from being overwritten with 0.
> This issue was due to a missing read and modify of current power limit,
> before setting a requested mailbox power limit, which is added in this
> patch.
>
Since you are making changes to power interval also .Split the patches
into two. One to add rmw and make changes to existing code. The other as
the new fix.
Thanks
Riana
> v2:
> - Improve commit message. (Anshuman)
>
> v3:
> - Rebase.
> - Rephrase commit message. (Riana)
> - Add read-modify-write variant of xe_hwmon_pcode_write_power_limit()
> i.e. xe_hwmon_pcode_rmw_power_limit(). (Badal)
> - Use xe_hwmon_pcode_rmw_power_limit() to set mailbox power limits.
> - Remove xe_hwmon_pcode_write_power_limit() as all mailbox power limits
> writes use xe_hwmon_pcode_rmw_power_limit() only.
>
> Fixes: 7596d839f6228 ("drm/xe/hwmon: Add support to manage power limits though mailbox")
> Reviewed-by: Riana Tauro <riana.tauro@intel.com>
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> ---
> drivers/gpu/drm/xe/regs/xe_mchbar_regs.h | 1 +
> drivers/gpu/drm/xe/xe_hwmon.c | 48 ++++++++++++------------
> 2 files changed, 24 insertions(+), 25 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h b/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h
> index 5394a1373a6b..ef2bf984723f 100644
> --- a/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h
> @@ -40,6 +40,7 @@
> #define PCU_CR_PACKAGE_RAPL_LIMIT XE_REG(MCHBAR_MIRROR_BASE_SNB + 0x59a0)
> #define PWR_LIM_VAL REG_GENMASK(14, 0)
> #define PWR_LIM_EN REG_BIT(15)
> +#define PWR_LIM REG_GENMASK(15, 0)
> #define PWR_LIM_TIME REG_GENMASK(23, 17)
> #define PWR_LIM_TIME_X REG_GENMASK(23, 22)
> #define PWR_LIM_TIME_Y REG_GENMASK(21, 17)
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 0d32e977537c..fa841311bdcf 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -175,8 +175,8 @@ static int xe_hwmon_pcode_read_power_limit(const struct xe_hwmon *hwmon, u32 att
> return ret;
> }
>
> -static int xe_hwmon_pcode_write_power_limit(const struct xe_hwmon *hwmon, u32 attr, u8 channel,
> - u32 uval)
> +static int xe_hwmon_pcode_rmw_power_limit(const struct xe_hwmon *hwmon, u32 attr, u8 channel,
> + u32 clr, u32 set)
> {
> struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
> u32 val0, val1;
> @@ -195,9 +195,9 @@ static int xe_hwmon_pcode_write_power_limit(const struct xe_hwmon *hwmon, u32 at
> channel, val0, val1, ret);
>
> if (attr == PL1_HWMON_ATTR)
> - val0 = uval;
> + val0 = (val0 & ~clr) | set;
> else if (attr == PL2_HWMON_ATTR)
> - val1 = uval;
> + val1 = (val1 & ~clr) | set;
> else
> return -EIO;
>
> @@ -342,7 +342,7 @@ static int xe_hwmon_power_max_write(struct xe_hwmon *hwmon, u32 attr, int channe
> if (hwmon->xe->info.has_mbx_power_limits) {
> drm_dbg(&hwmon->xe->drm, "disabling %s on channel %d\n",
> PWR_ATTR_TO_STR(attr), channel);
> - xe_hwmon_pcode_write_power_limit(hwmon, attr, channel, 0);
> + xe_hwmon_pcode_rmw_power_limit(hwmon, attr, channel, PWR_LIM_EN, 0);
> xe_hwmon_pcode_read_power_limit(hwmon, attr, channel, ®_val);
> } else {
> reg_val = xe_mmio_rmw32(mmio, rapl_limit, PWR_LIM_EN, 0);
> @@ -378,7 +378,8 @@ static int xe_hwmon_power_max_write(struct xe_hwmon *hwmon, u32 attr, int channe
> reg_val = PWR_LIM_EN | REG_FIELD_PREP(PWR_LIM_VAL, reg_val);
>
> if (hwmon->xe->info.has_mbx_power_limits)
> - ret = xe_hwmon_pcode_write_power_limit(hwmon, attr, channel, reg_val);
> + ret = xe_hwmon_pcode_rmw_power_limit(hwmon, attr, channel, PWR_LIM_EN | PWR_LIM_VAL,
> + reg_val);
> else
> reg_val = xe_mmio_rmw32(mmio, rapl_limit, PWR_LIM_EN | PWR_LIM_VAL,
> reg_val);
> @@ -591,14 +592,11 @@ xe_hwmon_power_max_interval_store(struct device *dev, struct device_attribute *a
>
> mutex_lock(&hwmon->hwmon_lock);
>
> - if (hwmon->xe->info.has_mbx_power_limits) {
> - ret = xe_hwmon_pcode_read_power_limit(hwmon, power_attr, channel, (u32 *)&r);
> - r = (r & ~PWR_LIM_TIME) | rxy;
> - xe_hwmon_pcode_write_power_limit(hwmon, power_attr, channel, r);
> - } else {
> + if (hwmon->xe->info.has_mbx_power_limits)
> + xe_hwmon_pcode_rmw_power_limit(hwmon, power_attr, channel, PWR_LIM_TIME, rxy);
> + else
> r = xe_mmio_rmw32(mmio, xe_hwmon_get_reg(hwmon, REG_PKG_RAPL_LIMIT, channel),
> PWR_LIM_TIME, rxy);
> - }
>
> mutex_unlock(&hwmon->hwmon_lock);
>
> @@ -1217,25 +1215,25 @@ xe_hwmon_get_preregistration_info(struct xe_hwmon *hwmon)
> &hwmon->pl1_on_boot[CHANNEL_PKG]) |
> xe_hwmon_pcode_read_power_limit(hwmon, PL2_HWMON_ATTR, CHANNEL_CARD,
> &hwmon->pl2_on_boot[CHANNEL_CARD]) |
> - xe_hwmon_pcode_read_power_limit(hwmon, PL1_HWMON_ATTR, CHANNEL_PKG,
> + xe_hwmon_pcode_read_power_limit(hwmon, PL2_HWMON_ATTR, CHANNEL_PKG,
> &hwmon->pl2_on_boot[CHANNEL_PKG])) {
> drm_warn(&hwmon->xe->drm,
> "Failed to read power limits, check GPU firmware !\n");
> } else {
> drm_info(&hwmon->xe->drm, "Using mailbox commands for power limits\n");
> /* Write default limits to read from pcode from now on. */
> - xe_hwmon_pcode_write_power_limit(hwmon, PL1_HWMON_ATTR,
> - CHANNEL_CARD,
> - hwmon->pl1_on_boot[CHANNEL_CARD]);
> - xe_hwmon_pcode_write_power_limit(hwmon, PL1_HWMON_ATTR,
> - CHANNEL_PKG,
> - hwmon->pl1_on_boot[CHANNEL_PKG]);
> - xe_hwmon_pcode_write_power_limit(hwmon, PL2_HWMON_ATTR,
> - CHANNEL_CARD,
> - hwmon->pl2_on_boot[CHANNEL_CARD]);
> - xe_hwmon_pcode_write_power_limit(hwmon, PL2_HWMON_ATTR,
> - CHANNEL_PKG,
> - hwmon->pl2_on_boot[CHANNEL_PKG]);
> + xe_hwmon_pcode_rmw_power_limit(hwmon, PL1_HWMON_ATTR,
> + CHANNEL_CARD, PWR_LIM | PWR_LIM_TIME,
> + hwmon->pl1_on_boot[CHANNEL_CARD]);
> + xe_hwmon_pcode_rmw_power_limit(hwmon, PL1_HWMON_ATTR,
> + CHANNEL_PKG, PWR_LIM | PWR_LIM_TIME,
> + hwmon->pl1_on_boot[CHANNEL_PKG]);
> + xe_hwmon_pcode_rmw_power_limit(hwmon, PL2_HWMON_ATTR,
> + CHANNEL_CARD, PWR_LIM | PWR_LIM_TIME,
> + hwmon->pl2_on_boot[CHANNEL_CARD]);
> + xe_hwmon_pcode_rmw_power_limit(hwmon, PL2_HWMON_ATTR,
> + CHANNEL_PKG, PWR_LIM | PWR_LIM_TIME,
> + hwmon->pl2_on_boot[CHANNEL_PKG]);
> hwmon->scl_shift_power = PWR_UNIT;
> hwmon->scl_shift_energy = ENERGY_UNIT;
> hwmon->scl_shift_time = TIME_UNIT;
^ permalink raw reply [flat|nested] 8+ messages in thread
* ✓ CI.KUnit: success for drm/xe/hwmon: Fix xe_hwmon_power_max_write (rev5)
2025-06-16 7:11 [PATCH v3] drm/xe/hwmon: Fix xe_hwmon_power_max_write Karthik Poosa
2025-06-16 7:40 ` Riana Tauro
@ 2025-06-16 12:38 ` Patchwork
2025-06-16 13:30 ` ✓ Xe.CI.BAT: " Patchwork
2025-06-16 19:25 ` ✗ Xe.CI.Full: failure " Patchwork
3 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2025-06-16 12:38 UTC (permalink / raw)
To: Karthik Poosa; +Cc: intel-xe
== Series Details ==
Series: drm/xe/hwmon: Fix xe_hwmon_power_max_write (rev5)
URL : https://patchwork.freedesktop.org/series/149816/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[12:37:42] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:37:47] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:38:13] Starting KUnit Kernel (1/1)...
[12:38:13] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:38:14] ================== guc_buf (11 subtests) ===================
[12:38:14] [PASSED] test_smallest
[12:38:14] [PASSED] test_largest
[12:38:14] [PASSED] test_granular
[12:38:14] [PASSED] test_unique
[12:38:14] [PASSED] test_overlap
[12:38:14] [PASSED] test_reusable
[12:38:14] [PASSED] test_too_big
[12:38:14] [PASSED] test_flush
[12:38:14] [PASSED] test_lookup
[12:38:14] [PASSED] test_data
[12:38:14] [PASSED] test_class
[12:38:14] ===================== [PASSED] guc_buf =====================
[12:38:14] =================== guc_dbm (7 subtests) ===================
[12:38:14] [PASSED] test_empty
[12:38:14] [PASSED] test_default
[12:38:14] ======================== test_size ========================
[12:38:14] [PASSED] 4
[12:38:14] [PASSED] 8
[12:38:14] [PASSED] 32
[12:38:14] [PASSED] 256
[12:38:14] ==================== [PASSED] test_size ====================
[12:38:14] ======================= test_reuse ========================
[12:38:14] [PASSED] 4
[12:38:14] [PASSED] 8
[12:38:14] [PASSED] 32
[12:38:14] [PASSED] 256
[12:38:14] =================== [PASSED] test_reuse ====================
[12:38:14] =================== test_range_overlap ====================
[12:38:14] [PASSED] 4
[12:38:14] [PASSED] 8
[12:38:14] [PASSED] 32
[12:38:14] [PASSED] 256
[12:38:14] =============== [PASSED] test_range_overlap ================
[12:38:14] =================== test_range_compact ====================
[12:38:14] [PASSED] 4
[12:38:14] [PASSED] 8
[12:38:14] [PASSED] 32
[12:38:14] [PASSED] 256
[12:38:14] =============== [PASSED] test_range_compact ================
[12:38:14] ==================== test_range_spare =====================
[12:38:14] [PASSED] 4
[12:38:14] [PASSED] 8
[12:38:14] [PASSED] 32
[12:38:14] [PASSED] 256
[12:38:14] ================ [PASSED] test_range_spare =================
[12:38:14] ===================== [PASSED] guc_dbm =====================
[12:38:14] =================== guc_idm (6 subtests) ===================
[12:38:14] [PASSED] bad_init
[12:38:14] [PASSED] no_init
[12:38:14] [PASSED] init_fini
[12:38:14] [PASSED] check_used
[12:38:14] [PASSED] check_quota
[12:38:14] [PASSED] check_all
[12:38:14] ===================== [PASSED] guc_idm =====================
[12:38:14] ================== no_relay (3 subtests) ===================
[12:38:14] [PASSED] xe_drops_guc2pf_if_not_ready
[12:38:14] [PASSED] xe_drops_guc2vf_if_not_ready
[12:38:14] [PASSED] xe_rejects_send_if_not_ready
[12:38:14] ==================== [PASSED] no_relay =====================
[12:38:14] ================== pf_relay (14 subtests) ==================
[12:38:14] [PASSED] pf_rejects_guc2pf_too_short
[12:38:14] [PASSED] pf_rejects_guc2pf_too_long
[12:38:14] [PASSED] pf_rejects_guc2pf_no_payload
[12:38:14] [PASSED] pf_fails_no_payload
[12:38:14] [PASSED] pf_fails_bad_origin
[12:38:14] [PASSED] pf_fails_bad_type
[12:38:14] [PASSED] pf_txn_reports_error
[12:38:14] [PASSED] pf_txn_sends_pf2guc
[12:38:14] [PASSED] pf_sends_pf2guc
[12:38:14] [SKIPPED] pf_loopback_nop
[12:38:14] [SKIPPED] pf_loopback_echo
[12:38:14] [SKIPPED] pf_loopback_fail
[12:38:14] [SKIPPED] pf_loopback_busy
[12:38:14] [SKIPPED] pf_loopback_retry
[12:38:14] ==================== [PASSED] pf_relay =====================
[12:38:14] ================== vf_relay (3 subtests) ===================
[12:38:14] [PASSED] vf_rejects_guc2vf_too_short
[12:38:14] [PASSED] vf_rejects_guc2vf_too_long
[12:38:14] [PASSED] vf_rejects_guc2vf_no_payload
[12:38:14] ==================== [PASSED] vf_relay =====================
[12:38:14] ================= pf_service (11 subtests) =================
[12:38:14] [PASSED] pf_negotiate_any
[12:38:14] [PASSED] pf_negotiate_base_match
[12:38:14] [PASSED] pf_negotiate_base_newer
[12:38:14] [PASSED] pf_negotiate_base_next
[12:38:14] [SKIPPED] pf_negotiate_base_older
[12:38:14] [PASSED] pf_negotiate_base_prev
[12:38:14] [PASSED] pf_negotiate_latest_match
[12:38:14] [PASSED] pf_negotiate_latest_newer
[12:38:14] [PASSED] pf_negotiate_latest_next
[12:38:14] [SKIPPED] pf_negotiate_latest_older
[12:38:14] [SKIPPED] pf_negotiate_latest_prev
[12:38:14] =================== [PASSED] pf_service ====================
[12:38:14] ===================== lmtt (1 subtest) =====================
[12:38:14] ======================== test_ops =========================
[12:38:14] [PASSED] 2-level
[12:38:14] [PASSED] multi-level
[12:38:14] ==================== [PASSED] test_ops =====================
[12:38:14] ====================== [PASSED] lmtt =======================
[12:38:14] =================== xe_mocs (2 subtests) ===================
[12:38:14] ================ xe_live_mocs_kernel_kunit ================
[12:38:14] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[12:38:14] ================ xe_live_mocs_reset_kunit =================
[12:38:14] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[12:38:14] ==================== [SKIPPED] xe_mocs =====================
[12:38:14] ================= xe_migrate (2 subtests) ==================
[12:38:14] ================= xe_migrate_sanity_kunit =================
[12:38:14] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[12:38:14] ================== xe_validate_ccs_kunit ==================
[12:38:14] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[12:38:14] =================== [SKIPPED] xe_migrate ===================
[12:38:14] ================== xe_dma_buf (1 subtest) ==================
[12:38:14] ==================== xe_dma_buf_kunit =====================
[12:38:14] ================ [SKIPPED] xe_dma_buf_kunit ================
[12:38:14] =================== [SKIPPED] xe_dma_buf ===================
[12:38:14] ================= xe_bo_shrink (1 subtest) =================
[12:38:14] =================== xe_bo_shrink_kunit ====================
[12:38:14] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[12:38:14] ================== [SKIPPED] xe_bo_shrink ==================
[12:38:14] ==================== xe_bo (2 subtests) ====================
[12:38:14] ================== xe_ccs_migrate_kunit ===================
[12:38:14] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[12:38:14] ==================== xe_bo_evict_kunit ====================
[12:38:14] =============== [SKIPPED] xe_bo_evict_kunit ================
[12:38:14] ===================== [SKIPPED] xe_bo ======================
[12:38:14] ==================== args (11 subtests) ====================
[12:38:14] [PASSED] count_args_test
[12:38:14] [PASSED] call_args_example
[12:38:14] [PASSED] call_args_test
[12:38:14] [PASSED] drop_first_arg_example
[12:38:14] [PASSED] drop_first_arg_test
[12:38:14] [PASSED] first_arg_example
[12:38:14] [PASSED] first_arg_test
[12:38:14] [PASSED] last_arg_example
[12:38:14] [PASSED] last_arg_test
[12:38:14] [PASSED] pick_arg_example
[12:38:14] [PASSED] sep_comma_example
[12:38:14] ====================== [PASSED] args =======================
[12:38:14] =================== xe_pci (2 subtests) ====================
[12:38:14] [PASSED] xe_gmdid_graphics_ip
[12:38:14] [PASSED] xe_gmdid_media_ip
[12:38:14] ===================== [PASSED] xe_pci ======================
[12:38:14] =================== xe_rtp (2 subtests) ====================
[12:38:14] =============== xe_rtp_process_to_sr_tests ================
[12:38:14] [PASSED] coalesce-same-reg
[12:38:14] [PASSED] no-match-no-add
[12:38:14] [PASSED] match-or
[12:38:14] [PASSED] match-or-xfail
[12:38:14] [PASSED] no-match-no-add-multiple-rules
[12:38:14] [PASSED] two-regs-two-entries
[12:38:14] [PASSED] clr-one-set-other
[12:38:14] [PASSED] set-field
[12:38:14] [PASSED] conflict-duplicate
[12:38:14] [PASSED] conflict-not-disjoint
stty: 'standard input': Inappropriate ioctl for device
[12:38:14] [PASSED] conflict-reg-type
[12:38:14] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[12:38:14] ================== xe_rtp_process_tests ===================
[12:38:14] [PASSED] active1
[12:38:14] [PASSED] active2
[12:38:14] [PASSED] active-inactive
[12:38:14] [PASSED] inactive-active
[12:38:14] [PASSED] inactive-1st_or_active-inactive
[12:38:14] [PASSED] inactive-2nd_or_active-inactive
[12:38:14] [PASSED] inactive-last_or_active-inactive
[12:38:14] [PASSED] inactive-no_or_active-inactive
[12:38:14] ============== [PASSED] xe_rtp_process_tests ===============
[12:38:14] ===================== [PASSED] xe_rtp ======================
[12:38:14] ==================== xe_wa (1 subtest) =====================
[12:38:14] ======================== xe_wa_gt =========================
[12:38:14] [PASSED] TIGERLAKE (B0)
[12:38:14] [PASSED] DG1 (A0)
[12:38:14] [PASSED] DG1 (B0)
[12:38:14] [PASSED] ALDERLAKE_S (A0)
[12:38:14] [PASSED] ALDERLAKE_S (B0)
[12:38:14] [PASSED] ALDERLAKE_S (C0)
[12:38:14] [PASSED] ALDERLAKE_S (D0)
[12:38:14] [PASSED] ALDERLAKE_P (A0)
[12:38:14] [PASSED] ALDERLAKE_P (B0)
[12:38:14] [PASSED] ALDERLAKE_P (C0)
[12:38:14] [PASSED] ALDERLAKE_S_RPLS (D0)
[12:38:14] [PASSED] ALDERLAKE_P_RPLU (E0)
[12:38:14] [PASSED] DG2_G10 (C0)
[12:38:14] [PASSED] DG2_G11 (B1)
[12:38:14] [PASSED] DG2_G12 (A1)
[12:38:14] [PASSED] METEORLAKE (g:A0, m:A0)
[12:38:14] [PASSED] METEORLAKE (g:A0, m:A0)
[12:38:14] [PASSED] METEORLAKE (g:A0, m:A0)
[12:38:14] [PASSED] LUNARLAKE (g:A0, m:A0)
[12:38:14] [PASSED] LUNARLAKE (g:B0, m:A0)
[12:38:14] [PASSED] BATTLEMAGE (g:A0, m:A1)
[12:38:14] ==================== [PASSED] xe_wa_gt =====================
[12:38:14] ====================== [PASSED] xe_wa ======================
[12:38:14] ============================================================
[12:38:14] Testing complete. Ran 133 tests: passed: 117, skipped: 16
[12:38:14] Elapsed time: 31.347s total, 4.191s configuring, 26.841s building, 0.293s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[12:38:14] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:38:16] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:38:38] Starting KUnit Kernel (1/1)...
[12:38:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:38:38] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[12:38:38] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[12:38:38] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[12:38:38] =========== drm_validate_clone_mode (2 subtests) ===========
[12:38:38] ============== drm_test_check_in_clone_mode ===============
[12:38:38] [PASSED] in_clone_mode
[12:38:38] [PASSED] not_in_clone_mode
[12:38:38] ========== [PASSED] drm_test_check_in_clone_mode ===========
[12:38:38] =============== drm_test_check_valid_clones ===============
[12:38:38] [PASSED] not_in_clone_mode
[12:38:38] [PASSED] valid_clone
[12:38:38] [PASSED] invalid_clone
[12:38:38] =========== [PASSED] drm_test_check_valid_clones ===========
[12:38:38] ============= [PASSED] drm_validate_clone_mode =============
[12:38:38] ============= drm_validate_modeset (1 subtest) =============
[12:38:38] [PASSED] drm_test_check_connector_changed_modeset
[12:38:38] ============== [PASSED] drm_validate_modeset ===============
[12:38:38] ====== drm_test_bridge_get_current_state (2 subtests) ======
[12:38:38] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[12:38:38] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[12:38:38] ======== [PASSED] drm_test_bridge_get_current_state ========
[12:38:38] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[12:38:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[12:38:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[12:38:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[12:38:38] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[12:38:38] ============== drm_bridge_alloc (2 subtests) ===============
[12:38:38] [PASSED] drm_test_drm_bridge_alloc_basic
[12:38:38] [PASSED] drm_test_drm_bridge_alloc_get_put
[12:38:38] ================ [PASSED] drm_bridge_alloc =================
[12:38:38] ================== drm_buddy (7 subtests) ==================
[12:38:38] [PASSED] drm_test_buddy_alloc_limit
[12:38:38] [PASSED] drm_test_buddy_alloc_optimistic
[12:38:38] [PASSED] drm_test_buddy_alloc_pessimistic
[12:38:38] [PASSED] drm_test_buddy_alloc_pathological
[12:38:38] [PASSED] drm_test_buddy_alloc_contiguous
[12:38:38] [PASSED] drm_test_buddy_alloc_clear
[12:38:38] [PASSED] drm_test_buddy_alloc_range_bias
[12:38:38] ==================== [PASSED] drm_buddy ====================
[12:38:38] ============= drm_cmdline_parser (40 subtests) =============
[12:38:38] [PASSED] drm_test_cmdline_force_d_only
[12:38:38] [PASSED] drm_test_cmdline_force_D_only_dvi
[12:38:38] [PASSED] drm_test_cmdline_force_D_only_hdmi
[12:38:38] [PASSED] drm_test_cmdline_force_D_only_not_digital
[12:38:38] [PASSED] drm_test_cmdline_force_e_only
[12:38:38] [PASSED] drm_test_cmdline_res
[12:38:38] [PASSED] drm_test_cmdline_res_vesa
[12:38:38] [PASSED] drm_test_cmdline_res_vesa_rblank
[12:38:38] [PASSED] drm_test_cmdline_res_rblank
[12:38:38] [PASSED] drm_test_cmdline_res_bpp
[12:38:38] [PASSED] drm_test_cmdline_res_refresh
[12:38:38] [PASSED] drm_test_cmdline_res_bpp_refresh
[12:38:38] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[12:38:38] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[12:38:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[12:38:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[12:38:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[12:38:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[12:38:38] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[12:38:38] [PASSED] drm_test_cmdline_res_margins_force_on
[12:38:38] [PASSED] drm_test_cmdline_res_vesa_margins
[12:38:38] [PASSED] drm_test_cmdline_name
[12:38:38] [PASSED] drm_test_cmdline_name_bpp
[12:38:38] [PASSED] drm_test_cmdline_name_option
[12:38:38] [PASSED] drm_test_cmdline_name_bpp_option
[12:38:38] [PASSED] drm_test_cmdline_rotate_0
[12:38:38] [PASSED] drm_test_cmdline_rotate_90
[12:38:38] [PASSED] drm_test_cmdline_rotate_180
[12:38:38] [PASSED] drm_test_cmdline_rotate_270
[12:38:38] [PASSED] drm_test_cmdline_hmirror
[12:38:38] [PASSED] drm_test_cmdline_vmirror
[12:38:38] [PASSED] drm_test_cmdline_margin_options
[12:38:38] [PASSED] drm_test_cmdline_multiple_options
[12:38:38] [PASSED] drm_test_cmdline_bpp_extra_and_option
[12:38:38] [PASSED] drm_test_cmdline_extra_and_option
[12:38:38] [PASSED] drm_test_cmdline_freestanding_options
[12:38:38] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[12:38:38] [PASSED] drm_test_cmdline_panel_orientation
[12:38:38] ================ drm_test_cmdline_invalid =================
[12:38:38] [PASSED] margin_only
[12:38:38] [PASSED] interlace_only
[12:38:38] [PASSED] res_missing_x
[12:38:38] [PASSED] res_missing_y
[12:38:38] [PASSED] res_bad_y
[12:38:38] [PASSED] res_missing_y_bpp
[12:38:38] [PASSED] res_bad_bpp
[12:38:38] [PASSED] res_bad_refresh
[12:38:38] [PASSED] res_bpp_refresh_force_on_off
[12:38:38] [PASSED] res_invalid_mode
[12:38:38] [PASSED] res_bpp_wrong_place_mode
[12:38:38] [PASSED] name_bpp_refresh
[12:38:38] [PASSED] name_refresh
[12:38:38] [PASSED] name_refresh_wrong_mode
[12:38:38] [PASSED] name_refresh_invalid_mode
[12:38:38] [PASSED] rotate_multiple
[12:38:38] [PASSED] rotate_invalid_val
[12:38:38] [PASSED] rotate_truncated
[12:38:38] [PASSED] invalid_option
[12:38:38] [PASSED] invalid_tv_option
[12:38:38] [PASSED] truncated_tv_option
[12:38:38] ============ [PASSED] drm_test_cmdline_invalid =============
[12:38:38] =============== drm_test_cmdline_tv_options ===============
[12:38:38] [PASSED] NTSC
[12:38:38] [PASSED] NTSC_443
[12:38:38] [PASSED] NTSC_J
[12:38:38] [PASSED] PAL
[12:38:38] [PASSED] PAL_M
[12:38:38] [PASSED] PAL_N
[12:38:38] [PASSED] SECAM
[12:38:38] [PASSED] MONO_525
[12:38:38] [PASSED] MONO_625
[12:38:38] =========== [PASSED] drm_test_cmdline_tv_options ===========
[12:38:38] =============== [PASSED] drm_cmdline_parser ================
[12:38:38] ========== drmm_connector_hdmi_init (20 subtests) ==========
[12:38:38] [PASSED] drm_test_connector_hdmi_init_valid
[12:38:38] [PASSED] drm_test_connector_hdmi_init_bpc_8
[12:38:38] [PASSED] drm_test_connector_hdmi_init_bpc_10
[12:38:38] [PASSED] drm_test_connector_hdmi_init_bpc_12
[12:38:38] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[12:38:38] [PASSED] drm_test_connector_hdmi_init_bpc_null
[12:38:38] [PASSED] drm_test_connector_hdmi_init_formats_empty
[12:38:38] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[12:38:38] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:38:38] [PASSED] supported_formats=0x9 yuv420_allowed=1
[12:38:38] [PASSED] supported_formats=0x9 yuv420_allowed=0
[12:38:38] [PASSED] supported_formats=0x3 yuv420_allowed=1
[12:38:38] [PASSED] supported_formats=0x3 yuv420_allowed=0
[12:38:38] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:38:38] [PASSED] drm_test_connector_hdmi_init_null_ddc
[12:38:38] [PASSED] drm_test_connector_hdmi_init_null_product
[12:38:38] [PASSED] drm_test_connector_hdmi_init_null_vendor
[12:38:38] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[12:38:38] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[12:38:38] [PASSED] drm_test_connector_hdmi_init_product_valid
[12:38:38] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[12:38:38] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[12:38:38] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[12:38:38] ========= drm_test_connector_hdmi_init_type_valid =========
[12:38:38] [PASSED] HDMI-A
[12:38:38] [PASSED] HDMI-B
[12:38:38] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[12:38:38] ======== drm_test_connector_hdmi_init_type_invalid ========
[12:38:38] [PASSED] Unknown
[12:38:38] [PASSED] VGA
[12:38:38] [PASSED] DVI-I
[12:38:38] [PASSED] DVI-D
[12:38:38] [PASSED] DVI-A
[12:38:38] [PASSED] Composite
[12:38:38] [PASSED] SVIDEO
[12:38:38] [PASSED] LVDS
[12:38:38] [PASSED] Component
[12:38:38] [PASSED] DIN
[12:38:38] [PASSED] DP
[12:38:38] [PASSED] TV
[12:38:38] [PASSED] eDP
[12:38:38] [PASSED] Virtual
[12:38:38] [PASSED] DSI
[12:38:38] [PASSED] DPI
[12:38:38] [PASSED] Writeback
[12:38:38] [PASSED] SPI
[12:38:38] [PASSED] USB
[12:38:38] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[12:38:38] ============ [PASSED] drmm_connector_hdmi_init =============
[12:38:38] ============= drmm_connector_init (3 subtests) =============
[12:38:38] [PASSED] drm_test_drmm_connector_init
[12:38:38] [PASSED] drm_test_drmm_connector_init_null_ddc
[12:38:38] ========= drm_test_drmm_connector_init_type_valid =========
[12:38:38] [PASSED] Unknown
[12:38:38] [PASSED] VGA
[12:38:38] [PASSED] DVI-I
[12:38:38] [PASSED] DVI-D
[12:38:38] [PASSED] DVI-A
[12:38:38] [PASSED] Composite
[12:38:38] [PASSED] SVIDEO
[12:38:38] [PASSED] LVDS
[12:38:38] [PASSED] Component
[12:38:38] [PASSED] DIN
[12:38:38] [PASSED] DP
[12:38:38] [PASSED] HDMI-A
[12:38:38] [PASSED] HDMI-B
[12:38:38] [PASSED] TV
[12:38:38] [PASSED] eDP
[12:38:38] [PASSED] Virtual
[12:38:38] [PASSED] DSI
[12:38:38] [PASSED] DPI
[12:38:38] [PASSED] Writeback
[12:38:38] [PASSED] SPI
[12:38:38] [PASSED] USB
[12:38:38] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[12:38:38] =============== [PASSED] drmm_connector_init ===============
[12:38:38] ========= drm_connector_dynamic_init (6 subtests) ==========
[12:38:38] [PASSED] drm_test_drm_connector_dynamic_init
[12:38:38] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[12:38:38] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[12:38:38] [PASSED] drm_test_drm_connector_dynamic_init_properties
[12:38:38] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[12:38:38] [PASSED] Unknown
[12:38:38] [PASSED] VGA
[12:38:38] [PASSED] DVI-I
[12:38:38] [PASSED] DVI-D
[12:38:38] [PASSED] DVI-A
[12:38:38] [PASSED] Composite
[12:38:38] [PASSED] SVIDEO
[12:38:38] [PASSED] LVDS
[12:38:38] [PASSED] Component
[12:38:38] [PASSED] DIN
[12:38:38] [PASSED] DP
[12:38:38] [PASSED] HDMI-A
[12:38:38] [PASSED] HDMI-B
[12:38:38] [PASSED] TV
[12:38:38] [PASSED] eDP
[12:38:38] [PASSED] Virtual
[12:38:38] [PASSED] DSI
[12:38:38] [PASSED] DPI
[12:38:38] [PASSED] Writeback
[12:38:38] [PASSED] SPI
[12:38:38] [PASSED] USB
[12:38:38] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[12:38:38] ======== drm_test_drm_connector_dynamic_init_name =========
[12:38:38] [PASSED] Unknown
[12:38:38] [PASSED] VGA
[12:38:38] [PASSED] DVI-I
[12:38:38] [PASSED] DVI-D
[12:38:38] [PASSED] DVI-A
[12:38:38] [PASSED] Composite
[12:38:38] [PASSED] SVIDEO
[12:38:38] [PASSED] LVDS
[12:38:38] [PASSED] Component
[12:38:38] [PASSED] DIN
[12:38:38] [PASSED] DP
[12:38:38] [PASSED] HDMI-A
[12:38:38] [PASSED] HDMI-B
[12:38:38] [PASSED] TV
[12:38:38] [PASSED] eDP
[12:38:38] [PASSED] Virtual
[12:38:38] [PASSED] DSI
[12:38:38] [PASSED] DPI
[12:38:38] [PASSED] Writeback
[12:38:38] [PASSED] SPI
[12:38:38] [PASSED] USB
[12:38:38] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[12:38:38] =========== [PASSED] drm_connector_dynamic_init ============
[12:38:38] ==== drm_connector_dynamic_register_early (4 subtests) =====
[12:38:38] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[12:38:38] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[12:38:38] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[12:38:38] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[12:38:38] ====== [PASSED] drm_connector_dynamic_register_early =======
[12:38:38] ======= drm_connector_dynamic_register (7 subtests) ========
[12:38:38] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[12:38:38] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[12:38:38] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[12:38:38] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[12:38:38] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[12:38:38] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[12:38:38] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[12:38:38] ========= [PASSED] drm_connector_dynamic_register ==========
[12:38:38] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[12:38:38] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[12:38:38] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[12:38:38] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[12:38:38] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[12:38:38] ========== drm_test_get_tv_mode_from_name_valid ===========
[12:38:38] [PASSED] NTSC
[12:38:38] [PASSED] NTSC-443
[12:38:38] [PASSED] NTSC-J
[12:38:38] [PASSED] PAL
[12:38:38] [PASSED] PAL-M
[12:38:38] [PASSED] PAL-N
[12:38:38] [PASSED] SECAM
[12:38:38] [PASSED] Mono
[12:38:38] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[12:38:38] [PASSED] drm_test_get_tv_mode_from_name_truncated
[12:38:38] ============ [PASSED] drm_get_tv_mode_from_name ============
[12:38:38] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[12:38:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[12:38:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[12:38:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[12:38:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[12:38:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[12:38:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[12:38:38] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[12:38:38] [PASSED] VIC 96
[12:38:38] [PASSED] VIC 97
[12:38:38] [PASSED] VIC 101
[12:38:38] [PASSED] VIC 102
[12:38:38] [PASSED] VIC 106
[12:38:38] [PASSED] VIC 107
[12:38:38] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[12:38:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[12:38:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[12:38:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[12:38:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[12:38:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[12:38:38] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[12:38:38] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[12:38:38] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[12:38:38] [PASSED] Automatic
[12:38:38] [PASSED] Full
[12:38:38] [PASSED] Limited 16:235
[12:38:38] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[12:38:38] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[12:38:38] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[12:38:38] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[12:38:38] === drm_test_drm_hdmi_connector_get_output_format_name ====
[12:38:38] [PASSED] RGB
[12:38:38] [PASSED] YUV 4:2:0
[12:38:38] [PASSED] YUV 4:2:2
[12:38:38] [PASSED] YUV 4:4:4
[12:38:38] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[12:38:38] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[12:38:38] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[12:38:38] ============= drm_damage_helper (21 subtests) ==============
[12:38:38] [PASSED] drm_test_damage_iter_no_damage
[12:38:38] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[12:38:38] [PASSED] drm_test_damage_iter_no_damage_src_moved
[12:38:38] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[12:38:38] [PASSED] drm_test_damage_iter_no_damage_not_visible
[12:38:38] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[12:38:38] [PASSED] drm_test_damage_iter_no_damage_no_fb
[12:38:38] [PASSED] drm_test_damage_iter_simple_damage
[12:38:38] [PASSED] drm_test_damage_iter_single_damage
[12:38:38] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[12:38:38] [PASSED] drm_test_damage_iter_single_damage_outside_src
[12:38:38] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[12:38:38] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[12:38:38] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[12:38:38] [PASSED] drm_test_damage_iter_single_damage_src_moved
[12:38:38] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[12:38:38] [PASSED] drm_test_damage_iter_damage
[12:38:38] [PASSED] drm_test_damage_iter_damage_one_intersect
[12:38:38] [PASSED] drm_test_damage_iter_damage_one_outside
[12:38:38] [PASSED] drm_test_damage_iter_damage_src_moved
[12:38:38] [PASSED] drm_test_damage_iter_damage_not_visible
[12:38:38] ================ [PASSED] drm_damage_helper ================
[12:38:38] ============== drm_dp_mst_helper (3 subtests) ==============
[12:38:38] ============== drm_test_dp_mst_calc_pbn_mode ==============
[12:38:38] [PASSED] Clock 154000 BPP 30 DSC disabled
[12:38:38] [PASSED] Clock 234000 BPP 30 DSC disabled
[12:38:38] [PASSED] Clock 297000 BPP 24 DSC disabled
[12:38:38] [PASSED] Clock 332880 BPP 24 DSC enabled
[12:38:38] [PASSED] Clock 324540 BPP 24 DSC enabled
[12:38:38] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[12:38:38] ============== drm_test_dp_mst_calc_pbn_div ===============
[12:38:38] [PASSED] Link rate 2000000 lane count 4
[12:38:38] [PASSED] Link rate 2000000 lane count 2
[12:38:38] [PASSED] Link rate 2000000 lane count 1
[12:38:38] [PASSED] Link rate 1350000 lane count 4
[12:38:38] [PASSED] Link rate 1350000 lane count 2
[12:38:38] [PASSED] Link rate 1350000 lane count 1
[12:38:38] [PASSED] Link rate 1000000 lane count 4
[12:38:38] [PASSED] Link rate 1000000 lane count 2
[12:38:38] [PASSED] Link rate 1000000 lane count 1
[12:38:38] [PASSED] Link rate 810000 lane count 4
[12:38:38] [PASSED] Link rate 810000 lane count 2
[12:38:38] [PASSED] Link rate 810000 lane count 1
[12:38:38] [PASSED] Link rate 540000 lane count 4
[12:38:38] [PASSED] Link rate 540000 lane count 2
[12:38:38] [PASSED] Link rate 540000 lane count 1
[12:38:38] [PASSED] Link rate 270000 lane count 4
[12:38:38] [PASSED] Link rate 270000 lane count 2
[12:38:38] [PASSED] Link rate 270000 lane count 1
[12:38:38] [PASSED] Link rate 162000 lane count 4
[12:38:38] [PASSED] Link rate 162000 lane count 2
[12:38:38] [PASSED] Link rate 162000 lane count 1
[12:38:38] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[12:38:38] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[12:38:38] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[12:38:38] [PASSED] DP_POWER_UP_PHY with port number
[12:38:38] [PASSED] DP_POWER_DOWN_PHY with port number
[12:38:38] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[12:38:38] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[12:38:38] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[12:38:38] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[12:38:38] [PASSED] DP_QUERY_PAYLOAD with port number
[12:38:38] [PASSED] DP_QUERY_PAYLOAD with VCPI
[12:38:38] [PASSED] DP_REMOTE_DPCD_READ with port number
[12:38:38] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[12:38:38] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[12:38:38] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[12:38:38] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[12:38:38] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[12:38:38] [PASSED] DP_REMOTE_I2C_READ with port number
[12:38:38] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[12:38:38] [PASSED] DP_REMOTE_I2C_READ with transactions array
[12:38:38] [PASSED] DP_REMOTE_I2C_WRITE with port number
[12:38:38] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[12:38:38] [PASSED] DP_REMOTE_I2C_WRITE with data array
[12:38:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[12:38:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[12:38:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[12:38:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[12:38:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[12:38:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[12:38:38] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[12:38:38] ================ [PASSED] drm_dp_mst_helper ================
[12:38:38] ================== drm_exec (7 subtests) ===================
[12:38:38] [PASSED] sanitycheck
[12:38:38] [PASSED] test_lock
[12:38:38] [PASSED] test_lock_unlock
[12:38:38] [PASSED] test_duplicates
[12:38:38] [PASSED] test_prepare
[12:38:38] [PASSED] test_prepare_array
[12:38:38] [PASSED] test_multiple_loops
[12:38:38] ==================== [PASSED] drm_exec =====================
[12:38:38] =========== drm_format_helper_test (18 subtests) ===========
[12:38:38] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[12:38:38] [PASSED] single_pixel_source_buffer
[12:38:38] [PASSED] single_pixel_clip_rectangle
[12:38:38] [PASSED] well_known_colors
[12:38:38] [PASSED] destination_pitch
[12:38:38] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[12:38:38] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[12:38:38] [PASSED] single_pixel_source_buffer
[12:38:38] [PASSED] single_pixel_clip_rectangle
[12:38:38] [PASSED] well_known_colors
[12:38:38] [PASSED] destination_pitch
[12:38:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[12:38:38] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[12:38:38] [PASSED] single_pixel_source_buffer
[12:38:38] [PASSED] single_pixel_clip_rectangle
[12:38:38] [PASSED] well_known_colors
[12:38:38] [PASSED] destination_pitch
[12:38:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[12:38:38] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[12:38:38] [PASSED] single_pixel_source_buffer
[12:38:38] [PASSED] single_pixel_clip_rectangle
[12:38:38] [PASSED] well_known_colors
[12:38:38] [PASSED] destination_pitch
[12:38:38] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[12:38:38] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[12:38:38] [PASSED] single_pixel_source_buffer
[12:38:38] [PASSED] single_pixel_clip_rectangle
[12:38:38] [PASSED] well_known_colors
[12:38:38] [PASSED] destination_pitch
[12:38:38] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[12:38:38] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[12:38:38] [PASSED] single_pixel_source_buffer
[12:38:38] [PASSED] single_pixel_clip_rectangle
[12:38:38] [PASSED] well_known_colors
[12:38:38] [PASSED] destination_pitch
[12:38:38] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[12:38:38] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[12:38:38] [PASSED] single_pixel_source_buffer
[12:38:38] [PASSED] single_pixel_clip_rectangle
[12:38:38] [PASSED] well_known_colors
[12:38:38] [PASSED] destination_pitch
[12:38:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[12:38:38] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[12:38:38] [PASSED] single_pixel_source_buffer
[12:38:38] [PASSED] single_pixel_clip_rectangle
[12:38:38] [PASSED] well_known_colors
[12:38:38] [PASSED] destination_pitch
[12:38:38] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[12:38:38] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[12:38:38] [PASSED] single_pixel_source_buffer
[12:38:38] [PASSED] single_pixel_clip_rectangle
[12:38:38] [PASSED] well_known_colors
[12:38:38] [PASSED] destination_pitch
[12:38:38] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[12:38:38] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[12:38:38] [PASSED] single_pixel_source_buffer
[12:38:38] [PASSED] single_pixel_clip_rectangle
[12:38:38] [PASSED] well_known_colors
[12:38:38] [PASSED] destination_pitch
[12:38:38] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[12:38:38] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[12:38:38] [PASSED] single_pixel_source_buffer
[12:38:38] [PASSED] single_pixel_clip_rectangle
[12:38:38] [PASSED] well_known_colors
[12:38:38] [PASSED] destination_pitch
[12:38:38] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[12:38:38] ============== drm_test_fb_xrgb8888_to_mono ===============
[12:38:38] [PASSED] single_pixel_source_buffer
[12:38:38] [PASSED] single_pixel_clip_rectangle
[12:38:38] [PASSED] well_known_colors
[12:38:38] [PASSED] destination_pitch
[12:38:38] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[12:38:38] ==================== drm_test_fb_swab =====================
[12:38:38] [PASSED] single_pixel_source_buffer
[12:38:38] [PASSED] single_pixel_clip_rectangle
[12:38:38] [PASSED] well_known_colors
[12:38:38] [PASSED] destination_pitch
[12:38:38] ================ [PASSED] drm_test_fb_swab =================
[12:38:38] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[12:38:38] [PASSED] single_pixel_source_buffer
[12:38:38] [PASSED] single_pixel_clip_rectangle
[12:38:38] [PASSED] well_known_colors
[12:38:38] [PASSED] destination_pitch
[12:38:38] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[12:38:38] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[12:38:38] [PASSED] single_pixel_source_buffer
[12:38:38] [PASSED] single_pixel_clip_rectangle
[12:38:38] [PASSED] well_known_colors
[12:38:38] [PASSED] destination_pitch
[12:38:38] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[12:38:38] ================= drm_test_fb_clip_offset =================
[12:38:38] [PASSED] pass through
[12:38:38] [PASSED] horizontal offset
[12:38:38] [PASSED] vertical offset
[12:38:38] [PASSED] horizontal and vertical offset
[12:38:38] [PASSED] horizontal offset (custom pitch)
[12:38:38] [PASSED] vertical offset (custom pitch)
[12:38:38] [PASSED] horizontal and vertical offset (custom pitch)
[12:38:38] ============= [PASSED] drm_test_fb_clip_offset =============
[12:38:38] ============== drm_test_fb_build_fourcc_list ==============
[12:38:38] [PASSED] no native formats
[12:38:38] [PASSED] XRGB8888 as native format
[12:38:38] [PASSED] remove duplicates
[12:38:38] [PASSED] convert alpha formats
[12:38:38] [PASSED] random formats
[12:38:38] ========== [PASSED] drm_test_fb_build_fourcc_list ==========
[12:38:38] =================== drm_test_fb_memcpy ====================
[12:38:38] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[12:38:38] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[12:38:38] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[12:38:38] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[12:38:38] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[12:38:38] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[12:38:38] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[12:38:38] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[12:38:38] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[12:38:38] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[12:38:38] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[12:38:38] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[12:38:38] =============== [PASSED] drm_test_fb_memcpy ================
[12:38:38] ============= [PASSED] drm_format_helper_test ==============
[12:38:38] ================= drm_format (18 subtests) =================
[12:38:38] [PASSED] drm_test_format_block_width_invalid
[12:38:38] [PASSED] drm_test_format_block_width_one_plane
[12:38:38] [PASSED] drm_test_format_block_width_two_plane
[12:38:38] [PASSED] drm_test_format_block_width_three_plane
[12:38:38] [PASSED] drm_test_format_block_width_tiled
[12:38:38] [PASSED] drm_test_format_block_height_invalid
[12:38:38] [PASSED] drm_test_format_block_height_one_plane
[12:38:38] [PASSED] drm_test_format_block_height_two_plane
[12:38:38] [PASSED] drm_test_format_block_height_three_plane
[12:38:38] [PASSED] drm_test_format_block_height_tiled
[12:38:38] [PASSED] drm_test_format_min_pitch_invalid
[12:38:38] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[12:38:38] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[12:38:38] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[12:38:38] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[12:38:38] [PASSED] drm_test_format_min_pitch_two_plane
[12:38:38] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[12:38:38] [PASSED] drm_test_format_min_pitch_tiled
[12:38:38] =================== [PASSED] drm_format ====================
[12:38:38] ============== drm_framebuffer (10 subtests) ===============
[12:38:38] ========== drm_test_framebuffer_check_src_coords ==========
[12:38:38] [PASSED] Success: source fits into fb
[12:38:38] [PASSED] Fail: overflowing fb with x-axis coordinate
[12:38:38] [PASSED] Fail: overflowing fb with y-axis coordinate
[12:38:38] [PASSED] Fail: overflowing fb with source width
[12:38:38] [PASSED] Fail: overflowing fb with source height
[12:38:38] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[12:38:38] [PASSED] drm_test_framebuffer_cleanup
[12:38:38] =============== drm_test_framebuffer_create ===============
[12:38:38] [PASSED] ABGR8888 normal sizes
[12:38:38] [PASSED] ABGR8888 max sizes
[12:38:38] [PASSED] ABGR8888 pitch greater than min required
[12:38:38] [PASSED] ABGR8888 pitch less than min required
[12:38:38] [PASSED] ABGR8888 Invalid width
[12:38:38] [PASSED] ABGR8888 Invalid buffer handle
[12:38:38] [PASSED] No pixel format
[12:38:38] [PASSED] ABGR8888 Width 0
[12:38:38] [PASSED] ABGR8888 Height 0
[12:38:38] [PASSED] ABGR8888 Out of bound height * pitch combination
[12:38:38] [PASSED] ABGR8888 Large buffer offset
[12:38:38] [PASSED] ABGR8888 Buffer offset for inexistent plane
[12:38:38] [PASSED] ABGR8888 Invalid flag
[12:38:38] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[12:38:38] [PASSED] ABGR8888 Valid buffer modifier
[12:38:38] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[12:38:38] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[12:38:38] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[12:38:38] [PASSED] NV12 Normal sizes
[12:38:38] [PASSED] NV12 Max sizes
[12:38:38] [PASSED] NV12 Invalid pitch
[12:38:38] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[12:38:38] [PASSED] NV12 different modifier per-plane
[12:38:38] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[12:38:38] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[12:38:38] [PASSED] NV12 Modifier for inexistent plane
[12:38:38] [PASSED] NV12 Handle for inexistent plane
[12:38:38] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[12:38:38] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[12:38:38] [PASSED] YVU420 Normal sizes
[12:38:38] [PASSED] YVU420 Max sizes
[12:38:38] [PASSED] YVU420 Invalid pitch
[12:38:38] [PASSED] YVU420 Different pitches
[12:38:38] [PASSED] YVU420 Different buffer offsets/pitches
[12:38:38] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[12:38:38] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[12:38:38] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[12:38:38] [PASSED] YVU420 Valid modifier
[12:38:38] [PASSED] YVU420 Different modifiers per plane
[12:38:38] [PASSED] YVU420 Modifier for inexistent plane
[12:38:38] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[12:38:38] [PASSED] X0L2 Normal sizes
[12:38:38] [PASSED] X0L2 Max sizes
[12:38:38] [PASSED] X0L2 Invalid pitch
[12:38:38] [PASSED] X0L2 Pitch greater than minimum required
[12:38:38] [PASSED] X0L2 Handle for inexistent plane
[12:38:38] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[12:38:38] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[12:38:38] [PASSED] X0L2 Valid modifier
[12:38:38] [PASSED] X0L2 Modifier for inexistent plane
[12:38:38] =========== [PASSED] drm_test_framebuffer_create ===========
[12:38:38] [PASSED] drm_test_framebuffer_free
[12:38:38] [PASSED] drm_test_framebuffer_init
[12:38:38] [PASSED] drm_test_framebuffer_init_bad_format
[12:38:38] [PASSED] drm_test_framebuffer_init_dev_mismatch
[12:38:38] [PASSED] drm_test_framebuffer_lookup
[12:38:38] [PASSED] drm_test_framebuffer_lookup_inexistent
[12:38:38] [PASSED] drm_test_framebuffer_modifiers_not_supported
[12:38:38] ================= [PASSED] drm_framebuffer =================
[12:38:38] ================ drm_gem_shmem (8 subtests) ================
[12:38:38] [PASSED] drm_gem_shmem_test_obj_create
[12:38:38] [PASSED] drm_gem_shmem_test_obj_create_private
[12:38:38] [PASSED] drm_gem_shmem_test_pin_pages
[12:38:38] [PASSED] drm_gem_shmem_test_vmap
[12:38:38] [PASSED] drm_gem_shmem_test_get_pages_sgt
[12:38:38] [PASSED] drm_gem_shmem_test_get_sg_table
[12:38:38] [PASSED] drm_gem_shmem_test_madvise
[12:38:38] [PASSED] drm_gem_shmem_test_purge
[12:38:38] ================== [PASSED] drm_gem_shmem ==================
[12:38:38] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[12:38:38] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[12:38:38] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[12:38:38] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[12:38:38] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[12:38:38] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[12:38:38] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[12:38:38] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[12:38:38] [PASSED] Automatic
[12:38:38] [PASSED] Full
[12:38:38] [PASSED] Limited 16:235
[12:38:38] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[12:38:38] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[12:38:38] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[12:38:38] [PASSED] drm_test_check_disable_connector
[12:38:38] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[12:38:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[12:38:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[12:38:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[12:38:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[12:38:38] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[12:38:38] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[12:38:38] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[12:38:38] [PASSED] drm_test_check_output_bpc_dvi
[12:38:38] [PASSED] drm_test_check_output_bpc_format_vic_1
[12:38:38] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[12:38:38] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[12:38:38] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[12:38:38] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[12:38:38] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[12:38:38] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[12:38:38] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[12:38:38] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[12:38:38] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[12:38:38] [PASSED] drm_test_check_broadcast_rgb_value
[12:38:38] [PASSED] drm_test_check_bpc_8_value
[12:38:38] [PASSED] drm_test_check_bpc_10_value
[12:38:38] [PASSED] drm_test_check_bpc_12_value
[12:38:38] [PASSED] drm_test_check_format_value
[12:38:38] [PASSED] drm_test_check_tmds_char_value
[12:38:38] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[12:38:38] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[12:38:38] [PASSED] drm_test_check_mode_valid
[12:38:38] [PASSED] drm_test_check_mode_valid_reject
[12:38:38] [PASSED] drm_test_check_mode_valid_reject_rate
[12:38:38] [PASSED] drm_test_check_mode_valid_reject_max_clock
[12:38:38] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[12:38:38] ================= drm_managed (2 subtests) =================
[12:38:38] [PASSED] drm_test_managed_release_action
[12:38:38] [PASSED] drm_test_managed_run_action
[12:38:38] =================== [PASSED] drm_managed ===================
[12:38:38] =================== drm_mm (6 subtests) ====================
[12:38:38] [PASSED] drm_test_mm_init
[12:38:38] [PASSED] drm_test_mm_debug
[12:38:38] [PASSED] drm_test_mm_align32
[12:38:38] [PASSED] drm_test_mm_align64
[12:38:38] [PASSED] drm_test_mm_lowest
[12:38:38] [PASSED] drm_test_mm_highest
[12:38:38] ===================== [PASSED] drm_mm ======================
[12:38:38] ============= drm_modes_analog_tv (5 subtests) =============
[12:38:38] [PASSED] drm_test_modes_analog_tv_mono_576i
[12:38:38] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[12:38:38] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[12:38:38] [PASSED] drm_test_modes_analog_tv_pal_576i
[12:38:38] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[12:38:38] =============== [PASSED] drm_modes_analog_tv ===============
[12:38:38] ============== drm_plane_helper (2 subtests) ===============
[12:38:38] =============== drm_test_check_plane_state ================
[12:38:38] [PASSED] clipping_simple
[12:38:38] [PASSED] clipping_rotate_reflect
[12:38:38] [PASSED] positioning_simple
[12:38:38] [PASSED] upscaling
[12:38:38] [PASSED] downscaling
[12:38:38] [PASSED] rounding1
[12:38:38] [PASSED] rounding2
[12:38:38] [PASSED] rounding3
[12:38:38] [PASSED] rounding4
[12:38:38] =========== [PASSED] drm_test_check_plane_state ============
[12:38:38] =========== drm_test_check_invalid_plane_state ============
[12:38:38] [PASSED] positioning_invalid
[12:38:38] [PASSED] upscaling_invalid
[12:38:38] [PASSED] downscaling_invalid
[12:38:38] ======= [PASSED] drm_test_check_invalid_plane_state ========
[12:38:38] ================ [PASSED] drm_plane_helper =================
[12:38:38] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[12:38:38] ====== drm_test_connector_helper_tv_get_modes_check =======
[12:38:38] [PASSED] None
[12:38:38] [PASSED] PAL
[12:38:38] [PASSED] NTSC
[12:38:38] [PASSED] Both, NTSC Default
[12:38:38] [PASSED] Both, PAL Default
[12:38:38] [PASSED] Both, NTSC Default, with PAL on command-line
[12:38:38] [PASSED] Both, PAL Default, with NTSC on command-line
[12:38:38] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[12:38:38] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[12:38:38] ================== drm_rect (9 subtests) ===================
[12:38:38] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[12:38:38] [PASSED] drm_test_rect_clip_scaled_not_clipped
[12:38:38] [PASSED] drm_test_rect_clip_scaled_clipped
[12:38:38] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[12:38:38] ================= drm_test_rect_intersect =================
[12:38:38] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[12:38:38] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[12:38:38] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[12:38:38] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[12:38:38] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[12:38:38] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[12:38:38] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[12:38:38] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[12:38:38] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[12:38:38] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[12:38:38] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[12:38:38] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[12:38:38] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[12:38:38] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[12:38:38] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[12:38:38] ============= [PASSED] drm_test_rect_intersect =============
[12:38:38] ================ drm_test_rect_calc_hscale ================
[12:38:38] [PASSED] normal use
[12:38:38] [PASSED] out of max range
[12:38:38] [PASSED] out of min range
[12:38:38] [PASSED] zero dst
[12:38:38] [PASSED] negative src
[12:38:38] [PASSED] negative dst
[12:38:38] ============ [PASSED] drm_test_rect_calc_hscale ============
[12:38:38] ================ drm_test_rect_calc_vscale ================
[12:38:38] [PASSED] normal use
[12:38:38] [PASSED] out of max range
[12:38:38] [PASSED] out of min range
[12:38:38] [PASSED] zero dst
[12:38:38] [PASSED] negative src
[12:38:38] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[12:38:38] ============ [PASSED] drm_test_rect_calc_vscale ============
[12:38:38] ================== drm_test_rect_rotate ===================
[12:38:38] [PASSED] reflect-x
[12:38:38] [PASSED] reflect-y
[12:38:38] [PASSED] rotate-0
[12:38:38] [PASSED] rotate-90
[12:38:38] [PASSED] rotate-180
[12:38:38] [PASSED] rotate-270
[12:38:38] ============== [PASSED] drm_test_rect_rotate ===============
[12:38:38] ================ drm_test_rect_rotate_inv =================
[12:38:38] [PASSED] reflect-x
[12:38:38] [PASSED] reflect-y
[12:38:38] [PASSED] rotate-0
[12:38:38] [PASSED] rotate-90
[12:38:38] [PASSED] rotate-180
[12:38:38] [PASSED] rotate-270
[12:38:38] ============ [PASSED] drm_test_rect_rotate_inv =============
[12:38:38] ==================== [PASSED] drm_rect =====================
[12:38:38] ============================================================
[12:38:38] Testing complete. Ran 616 tests: passed: 616
[12:38:38] Elapsed time: 24.011s total, 1.681s configuring, 22.163s building, 0.136s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[12:38:38] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:38:40] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:38:48] Starting KUnit Kernel (1/1)...
[12:38:48] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:38:48] ================= ttm_device (5 subtests) ==================
[12:38:48] [PASSED] ttm_device_init_basic
[12:38:48] [PASSED] ttm_device_init_multiple
[12:38:48] [PASSED] ttm_device_fini_basic
[12:38:48] [PASSED] ttm_device_init_no_vma_man
[12:38:48] ================== ttm_device_init_pools ==================
[12:38:48] [PASSED] No DMA allocations, no DMA32 required
[12:38:48] [PASSED] DMA allocations, DMA32 required
[12:38:48] [PASSED] No DMA allocations, DMA32 required
[12:38:48] [PASSED] DMA allocations, no DMA32 required
[12:38:48] ============== [PASSED] ttm_device_init_pools ==============
[12:38:48] =================== [PASSED] ttm_device ====================
[12:38:48] ================== ttm_pool (8 subtests) ===================
[12:38:48] ================== ttm_pool_alloc_basic ===================
[12:38:48] [PASSED] One page
[12:38:48] [PASSED] More than one page
[12:38:48] [PASSED] Above the allocation limit
[12:38:48] [PASSED] One page, with coherent DMA mappings enabled
[12:38:48] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:38:48] ============== [PASSED] ttm_pool_alloc_basic ===============
[12:38:48] ============== ttm_pool_alloc_basic_dma_addr ==============
[12:38:48] [PASSED] One page
[12:38:48] [PASSED] More than one page
[12:38:48] [PASSED] Above the allocation limit
[12:38:48] [PASSED] One page, with coherent DMA mappings enabled
[12:38:48] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:38:48] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[12:38:48] [PASSED] ttm_pool_alloc_order_caching_match
[12:38:48] [PASSED] ttm_pool_alloc_caching_mismatch
[12:38:48] [PASSED] ttm_pool_alloc_order_mismatch
[12:38:48] [PASSED] ttm_pool_free_dma_alloc
[12:38:48] [PASSED] ttm_pool_free_no_dma_alloc
[12:38:48] [PASSED] ttm_pool_fini_basic
[12:38:48] ==================== [PASSED] ttm_pool =====================
[12:38:48] ================ ttm_resource (8 subtests) =================
[12:38:48] ================= ttm_resource_init_basic =================
[12:38:48] [PASSED] Init resource in TTM_PL_SYSTEM
[12:38:48] [PASSED] Init resource in TTM_PL_VRAM
[12:38:48] [PASSED] Init resource in a private placement
[12:38:48] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[12:38:48] ============= [PASSED] ttm_resource_init_basic =============
[12:38:48] [PASSED] ttm_resource_init_pinned
[12:38:48] [PASSED] ttm_resource_fini_basic
[12:38:48] [PASSED] ttm_resource_manager_init_basic
[12:38:48] [PASSED] ttm_resource_manager_usage_basic
[12:38:48] [PASSED] ttm_resource_manager_set_used_basic
[12:38:48] [PASSED] ttm_sys_man_alloc_basic
[12:38:48] [PASSED] ttm_sys_man_free_basic
[12:38:48] ================== [PASSED] ttm_resource ===================
[12:38:48] =================== ttm_tt (15 subtests) ===================
[12:38:48] ==================== ttm_tt_init_basic ====================
[12:38:48] [PASSED] Page-aligned size
[12:38:48] [PASSED] Extra pages requested
[12:38:48] ================ [PASSED] ttm_tt_init_basic ================
[12:38:48] [PASSED] ttm_tt_init_misaligned
[12:38:48] [PASSED] ttm_tt_fini_basic
[12:38:48] [PASSED] ttm_tt_fini_sg
[12:38:48] [PASSED] ttm_tt_fini_shmem
[12:38:48] [PASSED] ttm_tt_create_basic
[12:38:48] [PASSED] ttm_tt_create_invalid_bo_type
[12:38:48] [PASSED] ttm_tt_create_ttm_exists
[12:38:48] [PASSED] ttm_tt_create_failed
[12:38:48] [PASSED] ttm_tt_destroy_basic
[12:38:48] [PASSED] ttm_tt_populate_null_ttm
[12:38:48] [PASSED] ttm_tt_populate_populated_ttm
[12:38:48] [PASSED] ttm_tt_unpopulate_basic
[12:38:48] [PASSED] ttm_tt_unpopulate_empty_ttm
[12:38:48] [PASSED] ttm_tt_swapin_basic
[12:38:48] ===================== [PASSED] ttm_tt ======================
[12:38:48] =================== ttm_bo (14 subtests) ===================
[12:38:48] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[12:38:48] [PASSED] Cannot be interrupted and sleeps
[12:38:48] [PASSED] Cannot be interrupted, locks straight away
[12:38:48] [PASSED] Can be interrupted, sleeps
[12:38:48] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[12:38:48] [PASSED] ttm_bo_reserve_locked_no_sleep
[12:38:48] [PASSED] ttm_bo_reserve_no_wait_ticket
[12:38:48] [PASSED] ttm_bo_reserve_double_resv
[12:38:48] [PASSED] ttm_bo_reserve_interrupted
[12:38:48] [PASSED] ttm_bo_reserve_deadlock
[12:38:48] [PASSED] ttm_bo_unreserve_basic
[12:38:48] [PASSED] ttm_bo_unreserve_pinned
[12:38:48] [PASSED] ttm_bo_unreserve_bulk
[12:38:48] [PASSED] ttm_bo_put_basic
[12:38:48] [PASSED] ttm_bo_put_shared_resv
[12:38:48] [PASSED] ttm_bo_pin_basic
[12:38:48] [PASSED] ttm_bo_pin_unpin_resource
[12:38:48] [PASSED] ttm_bo_multiple_pin_one_unpin
[12:38:48] ===================== [PASSED] ttm_bo ======================
[12:38:48] ============== ttm_bo_validate (22 subtests) ===============
[12:38:48] ============== ttm_bo_init_reserved_sys_man ===============
[12:38:48] [PASSED] Buffer object for userspace
[12:38:48] [PASSED] Kernel buffer object
[12:38:48] [PASSED] Shared buffer object
[12:38:48] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[12:38:48] ============== ttm_bo_init_reserved_mock_man ==============
[12:38:48] [PASSED] Buffer object for userspace
[12:38:48] [PASSED] Kernel buffer object
[12:38:48] [PASSED] Shared buffer object
[12:38:48] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[12:38:48] [PASSED] ttm_bo_init_reserved_resv
[12:38:48] ================== ttm_bo_validate_basic ==================
[12:38:48] [PASSED] Buffer object for userspace
[12:38:48] [PASSED] Kernel buffer object
[12:38:48] [PASSED] Shared buffer object
[12:38:48] ============== [PASSED] ttm_bo_validate_basic ==============
[12:38:48] [PASSED] ttm_bo_validate_invalid_placement
[12:38:48] ============= ttm_bo_validate_same_placement ==============
[12:38:48] [PASSED] System manager
[12:38:48] [PASSED] VRAM manager
[12:38:48] ========= [PASSED] ttm_bo_validate_same_placement ==========
[12:38:48] [PASSED] ttm_bo_validate_failed_alloc
[12:38:48] [PASSED] ttm_bo_validate_pinned
[12:38:48] [PASSED] ttm_bo_validate_busy_placement
[12:38:48] ================ ttm_bo_validate_multihop =================
[12:38:48] [PASSED] Buffer object for userspace
[12:38:48] [PASSED] Kernel buffer object
[12:38:48] [PASSED] Shared buffer object
[12:38:48] ============ [PASSED] ttm_bo_validate_multihop =============
[12:38:48] ========== ttm_bo_validate_no_placement_signaled ==========
[12:38:48] [PASSED] Buffer object in system domain, no page vector
[12:38:48] [PASSED] Buffer object in system domain with an existing page vector
[12:38:48] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[12:38:48] ======== ttm_bo_validate_no_placement_not_signaled ========
[12:38:48] [PASSED] Buffer object for userspace
[12:38:48] [PASSED] Kernel buffer object
[12:38:48] [PASSED] Shared buffer object
[12:38:48] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[12:38:48] [PASSED] ttm_bo_validate_move_fence_signaled
[12:38:48] ========= ttm_bo_validate_move_fence_not_signaled =========
[12:38:48] [PASSED] Waits for GPU
[12:38:48] [PASSED] Tries to lock straight away
[12:38:48] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[12:38:48] [PASSED] ttm_bo_validate_swapout
[12:38:48] [PASSED] ttm_bo_validate_happy_evict
[12:38:48] [PASSED] ttm_bo_validate_all_pinned_evict
[12:38:48] [PASSED] ttm_bo_validate_allowed_only_evict
[12:38:48] [PASSED] ttm_bo_validate_deleted_evict
[12:38:48] [PASSED] ttm_bo_validate_busy_domain_evict
[12:38:48] [PASSED] ttm_bo_validate_evict_gutting
[12:38:48] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[12:38:48] ================= [PASSED] ttm_bo_validate =================
[12:38:48] ============================================================
[12:38:48] Testing complete. Ran 102 tests: passed: 102
[12:38:48] Elapsed time: 10.187s total, 1.685s configuring, 7.834s building, 0.577s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 8+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe/hwmon: Fix xe_hwmon_power_max_write (rev5)
2025-06-16 7:11 [PATCH v3] drm/xe/hwmon: Fix xe_hwmon_power_max_write Karthik Poosa
2025-06-16 7:40 ` Riana Tauro
2025-06-16 12:38 ` ✓ CI.KUnit: success for drm/xe/hwmon: Fix xe_hwmon_power_max_write (rev5) Patchwork
@ 2025-06-16 13:30 ` Patchwork
2025-06-16 19:25 ` ✗ Xe.CI.Full: failure " Patchwork
3 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2025-06-16 13:30 UTC (permalink / raw)
To: Karthik Poosa; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 961 bytes --]
== Series Details ==
Series: drm/xe/hwmon: Fix xe_hwmon_power_max_write (rev5)
URL : https://patchwork.freedesktop.org/series/149816/
State : success
== Summary ==
CI Bug Log - changes from xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76_BAT -> xe-pw-149816v5_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (8 -> 8)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76 -> xe-pw-149816v5
IGT_8411: d5b5d2bb4f8795a98ea58376a128b74f654b7ec1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76: dea7240e83c9e58ec755a3d68e7db10068df6b76
xe-pw-149816v5: 149816v5
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/index.html
[-- Attachment #2: Type: text/html, Size: 1509 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* ✗ Xe.CI.Full: failure for drm/xe/hwmon: Fix xe_hwmon_power_max_write (rev5)
2025-06-16 7:11 [PATCH v3] drm/xe/hwmon: Fix xe_hwmon_power_max_write Karthik Poosa
` (2 preceding siblings ...)
2025-06-16 13:30 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-06-16 19:25 ` Patchwork
3 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2025-06-16 19:25 UTC (permalink / raw)
To: Karthik Poosa; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 50245 bytes --]
== Series Details ==
Series: drm/xe/hwmon: Fix xe_hwmon_power_max_write (rev5)
URL : https://patchwork.freedesktop.org/series/149816/
State : failure
== Summary ==
CI Bug Log - changes from xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76_FULL -> xe-pw-149816v5_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-149816v5_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-149816v5_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-149816v5_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_rotation_crc@sprite-rotation-180:
- shard-bmg: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-1/igt@kms_rotation_crc@sprite-rotation-180.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-3/igt@kms_rotation_crc@sprite-rotation-180.html
Known issues
------------
Here are the changes found in xe-pw-149816v5_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-d-hdmi-a-2-4-mc-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][3] ([Intel XE#3767]) +15 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-d-hdmi-a-2-4-mc-ccs.html
* igt@kms_big_fb@linear-8bpp-rotate-270:
- shard-dg2-set2: NOTRUN -> [SKIP][4] ([Intel XE#316])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@kms_big_fb@linear-8bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-0:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#1124]) +2 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_big_fb@y-tiled-64bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-180:
- shard-dg2-set2: NOTRUN -> [SKIP][6] ([Intel XE#1124]) +5 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@kms_big_fb@y-tiled-64bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0:
- shard-adlp: NOTRUN -> [DMESG-FAIL][7] ([Intel XE#4543])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-adlp-9/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-adlp: NOTRUN -> [SKIP][8] ([Intel XE#1124])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-adlp-9/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2314] / [Intel XE#2894])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
* igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p:
- shard-dg2-set2: NOTRUN -> [SKIP][10] ([Intel XE#2191])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html
* igt@kms_bw@linear-tiling-2-displays-1920x1080p:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#367])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_bw@linear-tiling-2-displays-1920x1080p.html
- shard-dg2-set2: NOTRUN -> [SKIP][12] ([Intel XE#367])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@kms_bw@linear-tiling-2-displays-1920x1080p.html
* igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][13] ([Intel XE#2907])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-2:
- shard-dg2-set2: NOTRUN -> [SKIP][14] ([Intel XE#455] / [Intel XE#787]) +25 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-2.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#3432])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#2887]) +1 other test skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs@pipe-b-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][17] ([Intel XE#787]) +139 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs@pipe-b-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6:
- shard-dg2-set2: [PASS][18] -> [INCOMPLETE][19] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [PASS][20] -> [INCOMPLETE][21] ([Intel XE#2705] / [Intel XE#4212] / [Intel XE#4345])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][22] ([Intel XE#2705] / [Intel XE#4212])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#2652] / [Intel XE#787]) +7 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-2/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#2724])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_cdclk@mode-transition-all-outputs.html
- shard-dg2-set2: NOTRUN -> [SKIP][25] ([Intel XE#4418])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_chamelium_hpd@dp-hpd-with-enabled-mode:
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#2252]) +1 other test skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_chamelium_hpd@dp-hpd-with-enabled-mode.html
* igt@kms_chamelium_hpd@vga-hpd:
- shard-dg2-set2: NOTRUN -> [SKIP][27] ([Intel XE#373]) +3 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@kms_chamelium_hpd@vga-hpd.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-dg2-set2: NOTRUN -> [SKIP][28] ([Intel XE#307])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@kms_content_protection@dp-mst-lic-type-0.html
- shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#2390])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@srm@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][30] ([Intel XE#1178]) +2 other tests fail
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@kms_content_protection@srm@pipe-a-dp-4.html
* igt@kms_content_protection@uevent@pipe-a-dp-2:
- shard-dg2-set2: NOTRUN -> [FAIL][31] ([Intel XE#1188])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@kms_content_protection@uevent@pipe-a-dp-2.html
- shard-bmg: NOTRUN -> [FAIL][32] ([Intel XE#1188])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-2/igt@kms_content_protection@uevent@pipe-a-dp-2.html
* igt@kms_cursor_crc@cursor-offscreen-512x512:
- shard-dg2-set2: NOTRUN -> [SKIP][33] ([Intel XE#308]) +1 other test skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@kms_cursor_crc@cursor-offscreen-512x512.html
* igt@kms_cursor_crc@cursor-onscreen-max-size:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#2320])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_cursor_crc@cursor-onscreen-max-size.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x170:
- shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#2321])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#2291])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
- shard-bmg: [PASS][37] -> [SKIP][38] ([Intel XE#2291]) +7 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-8/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-dg2-set2: NOTRUN -> [SKIP][39] ([Intel XE#4354])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@kms_dp_link_training@non-uhbr-mst.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#4422])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html
- shard-dg2-set2: NOTRUN -> [SKIP][41] ([Intel XE#4422])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html
* igt@kms_feature_discovery@psr2:
- shard-dg2-set2: NOTRUN -> [SKIP][42] ([Intel XE#1135])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@kms_feature_discovery@psr2.html
* igt@kms_flip@2x-blocking-wf_vblank@ac-dp2-hdmi-a3:
- shard-bmg: NOTRUN -> [FAIL][43] ([Intel XE#2882]) +1 other test fail
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-2/igt@kms_flip@2x-blocking-wf_vblank@ac-dp2-hdmi-a3.html
* igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ab-dp2-hdmi-a3:
- shard-bmg: [PASS][44] -> [FAIL][45] ([Intel XE#2882]) +1 other test fail
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-8/igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ab-dp2-hdmi-a3.html
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-4/igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ab-dp2-hdmi-a3.html
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#2316]) +1 other test skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_flip@2x-flip-vs-expired-vblank.html
* igt@kms_flip@2x-flip-vs-expired-vblank@cd-hdmi-a2-dp2:
- shard-dg2-set2: NOTRUN -> [FAIL][47] ([Intel XE#301]) +10 other tests fail
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@kms_flip@2x-flip-vs-expired-vblank@cd-hdmi-a2-dp2.html
* igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
- shard-bmg: [PASS][48] -> [SKIP][49] ([Intel XE#2316]) +3 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-8/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-5/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
* igt@kms_flip@flip-vs-absolute-wf_vblank@b-hdmi-a1:
- shard-adlp: [PASS][50] -> [FAIL][51] ([Intel XE#2882]) +1 other test fail
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-adlp-4/igt@kms_flip@flip-vs-absolute-wf_vblank@b-hdmi-a1.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-adlp-3/igt@kms_flip@flip-vs-absolute-wf_vblank@b-hdmi-a1.html
* igt@kms_flip@flip-vs-absolute-wf_vblank@c-edp1:
- shard-lnl: [PASS][52] -> [FAIL][53] ([Intel XE#886])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-lnl-6/igt@kms_flip@flip-vs-absolute-wf_vblank@c-edp1.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-lnl-2/igt@kms_flip@flip-vs-absolute-wf_vblank@c-edp1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a6:
- shard-dg2-set2: [PASS][54] -> [FAIL][55] ([Intel XE#301])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-dg2-464/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a6.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-436/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a6.html
* igt@kms_flip@flip-vs-expired-vblank@a-dp4:
- shard-dg2-set2: NOTRUN -> [FAIL][56] ([Intel XE#301] / [Intel XE#3321]) +2 other tests fail
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-433/igt@kms_flip@flip-vs-expired-vblank@a-dp4.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-dg2-set2: NOTRUN -> [FAIL][57] ([Intel XE#2882] / [Intel XE#886])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@a-hdmi-a2:
- shard-dg2-set2: NOTRUN -> [FAIL][58] ([Intel XE#886])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-hdmi-a2.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling:
- shard-bmg: NOTRUN -> [SKIP][59] ([Intel XE#2293] / [Intel XE#2380])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#2293])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling@pipe-a-valid-mode:
- shard-dg2-set2: NOTRUN -> [SKIP][61] ([Intel XE#455]) +8 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#2311]) +4 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][63] ([Intel XE#4141]) +1 other test skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-shrfb-draw-blt:
- shard-adlp: NOTRUN -> [SKIP][64] ([Intel XE#656])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-adlp-9/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-indfb-scaledprimary:
- shard-dg2-set2: NOTRUN -> [SKIP][65] ([Intel XE#651]) +12 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcdrrs-indfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-wc:
- shard-adlp: NOTRUN -> [SKIP][66] ([Intel XE#653])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-adlp-9/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][67] ([Intel XE#2312]) +4 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-slowdraw:
- shard-dg2-set2: NOTRUN -> [SKIP][68] ([Intel XE#653]) +15 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@kms_frontbuffer_tracking@psr-slowdraw.html
- shard-bmg: NOTRUN -> [SKIP][69] ([Intel XE#2313]) +2 other tests skip
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-slowdraw.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-bmg: [PASS][70] -> [SKIP][71] ([Intel XE#1503])
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-7/igt@kms_hdr@invalid-metadata-sizes.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-bmg: [PASS][72] -> [SKIP][73] ([Intel XE#3012]) +1 other test skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-7/igt@kms_joiner@invalid-modeset-force-big-joiner.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-5/igt@kms_joiner@invalid-modeset-force-big-joiner.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-dg2-set2: NOTRUN -> [SKIP][74] ([Intel XE#870])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_pm_rpm@system-suspend-modeset:
- shard-adlp: [PASS][75] -> [DMESG-WARN][76] ([Intel XE#2953] / [Intel XE#4173])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-adlp-8/igt@kms_pm_rpm@system-suspend-modeset.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-adlp-2/igt@kms_pm_rpm@system-suspend-modeset.html
* igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][77] ([Intel XE#1489]) +4 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][78] ([Intel XE#1489]) +2 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr@fbc-psr-suspend:
- shard-bmg: NOTRUN -> [SKIP][79] ([Intel XE#2234] / [Intel XE#2850]) +1 other test skip
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_psr@fbc-psr-suspend.html
* igt@kms_psr@fbc-psr2-cursor-plane-onoff:
- shard-dg2-set2: NOTRUN -> [SKIP][80] ([Intel XE#2850] / [Intel XE#929]) +5 other tests skip
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@kms_psr@fbc-psr2-cursor-plane-onoff.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-bmg: NOTRUN -> [SKIP][81] ([Intel XE#2414])
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
- shard-dg2-set2: NOTRUN -> [SKIP][82] ([Intel XE#2939])
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
- shard-bmg: NOTRUN -> [SKIP][83] ([Intel XE#3414] / [Intel XE#3904]) +1 other test skip
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html
- shard-dg2-set2: NOTRUN -> [SKIP][84] ([Intel XE#3414]) +1 other test skip
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html
* igt@kms_setmode@invalid-clone-single-crtc:
- shard-bmg: NOTRUN -> [SKIP][85] ([Intel XE#1435])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_setmode@invalid-clone-single-crtc.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: NOTRUN -> [SKIP][86] ([Intel XE#2426])
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
- shard-dg2-set2: NOTRUN -> [SKIP][87] ([Intel XE#1500])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_vrr@cmrr:
- shard-dg2-set2: NOTRUN -> [SKIP][88] ([Intel XE#2168])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@kms_vrr@cmrr.html
* igt@kms_vrr@flip-basic:
- shard-bmg: NOTRUN -> [SKIP][89] ([Intel XE#1499])
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_vrr@flip-basic.html
* igt@xe_ccs@suspend-resume@linear-compressed-compfmt0-system-vram01:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][90] ([Intel XE#4358]) +1 other test incomplete
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-436/igt@xe_ccs@suspend-resume@linear-compressed-compfmt0-system-vram01.html
* igt@xe_copy_basic@mem-copy-linear-0xfffe:
- shard-dg2-set2: NOTRUN -> [SKIP][91] ([Intel XE#1123])
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@xe_copy_basic@mem-copy-linear-0xfffe.html
* igt@xe_eudebug@basic-connect:
- shard-bmg: NOTRUN -> [SKIP][92] ([Intel XE#4837]) +2 other tests skip
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@xe_eudebug@basic-connect.html
* igt@xe_eudebug_online@interrupt-all-set-breakpoint:
- shard-dg2-set2: NOTRUN -> [SKIP][93] ([Intel XE#4837]) +5 other tests skip
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@xe_eudebug_online@interrupt-all-set-breakpoint.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr:
- shard-bmg: NOTRUN -> [SKIP][94] ([Intel XE#2322]) +1 other test skip
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html
- shard-dg2-set2: NOTRUN -> [SKIP][95] ([Intel XE#1392]) +1 other test skip
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html
* igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap:
- shard-dg2-set2: [PASS][96] -> [SKIP][97] ([Intel XE#1392]) +3 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-dg2-435/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
* igt@xe_exec_fault_mode@once-userptr-imm:
- shard-adlp: NOTRUN -> [SKIP][98] ([Intel XE#288]) +1 other test skip
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-adlp-9/igt@xe_exec_fault_mode@once-userptr-imm.html
* igt@xe_exec_fault_mode@twice-userptr-rebind-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][99] ([Intel XE#288]) +12 other tests skip
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html
* igt@xe_exec_system_allocator@once-large-new-race:
- shard-adlp: NOTRUN -> [SKIP][100] ([Intel XE#4915]) +10 other tests skip
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-adlp-9/igt@xe_exec_system_allocator@once-large-new-race.html
* igt@xe_exec_system_allocator@partial-middle-remap-no-cpu-fault:
- shard-bmg: [PASS][101] -> [FAIL][102] ([Intel XE#4937])
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-8/igt@xe_exec_system_allocator@partial-middle-remap-no-cpu-fault.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-2/igt@xe_exec_system_allocator@partial-middle-remap-no-cpu-fault.html
* igt@xe_exec_system_allocator@process-many-large-mmap-huge:
- shard-bmg: NOTRUN -> [SKIP][103] ([Intel XE#4943]) +5 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@xe_exec_system_allocator@process-many-large-mmap-huge.html
* igt@xe_exec_system_allocator@process-many-mmap-free-race-nomemset:
- shard-dg2-set2: NOTRUN -> [SKIP][104] ([Intel XE#4915]) +125 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@xe_exec_system_allocator@process-many-mmap-free-race-nomemset.html
* igt@xe_oa@invalid-remove-userspace-config:
- shard-dg2-set2: NOTRUN -> [SKIP][105] ([Intel XE#2541] / [Intel XE#3573]) +1 other test skip
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@xe_oa@invalid-remove-userspace-config.html
* igt@xe_oa@mmio-triggered-reports-read:
- shard-dg2-set2: NOTRUN -> [SKIP][106] ([Intel XE#5103])
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@xe_oa@mmio-triggered-reports-read.html
* igt@xe_oa@syncs-syncobj-cfg:
- shard-dg2-set2: NOTRUN -> [SKIP][107] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501])
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@xe_oa@syncs-syncobj-cfg.html
* igt@xe_pm@s4-mocs:
- shard-adlp: [PASS][108] -> [ABORT][109] ([Intel XE#1794])
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-adlp-1/igt@xe_pm@s4-mocs.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-adlp-9/igt@xe_pm@s4-mocs.html
* igt@xe_pm@s4-vm-bind-userptr:
- shard-lnl: [PASS][110] -> [ABORT][111] ([Intel XE#1794])
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-lnl-6/igt@xe_pm@s4-vm-bind-userptr.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-lnl-2/igt@xe_pm@s4-vm-bind-userptr.html
* igt@xe_pmu@all-fn-engine-activity-load:
- shard-dg2-set2: NOTRUN -> [SKIP][112] ([Intel XE#4650])
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@xe_pmu@all-fn-engine-activity-load.html
* igt@xe_pmu@engine-activity-single-load-idle:
- shard-adlp: NOTRUN -> [ABORT][113] ([Intel XE#5214]) +1 other test abort
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-adlp-9/igt@xe_pmu@engine-activity-single-load-idle.html
* igt@xe_pmu@gt-frequency:
- shard-dg2-set2: [PASS][114] -> [FAIL][115] ([Intel XE#4835]) +1 other test fail
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-dg2-436/igt@xe_pmu@gt-frequency.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-434/igt@xe_pmu@gt-frequency.html
* igt@xe_pxp@display-black-pxp-fb:
- shard-bmg: NOTRUN -> [SKIP][116] ([Intel XE#4733])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@xe_pxp@display-black-pxp-fb.html
- shard-dg2-set2: NOTRUN -> [SKIP][117] ([Intel XE#4733])
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@xe_pxp@display-black-pxp-fb.html
* igt@xe_query@multigpu-query-config:
- shard-bmg: NOTRUN -> [SKIP][118] ([Intel XE#944])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@xe_query@multigpu-query-config.html
* igt@xe_query@multigpu-query-uc-fw-version-huc:
- shard-dg2-set2: NOTRUN -> [SKIP][119] ([Intel XE#944]) +1 other test skip
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-435/igt@xe_query@multigpu-query-uc-fw-version-huc.html
* igt@xe_sriov_flr@flr-vf1-clear:
- shard-dg2-set2: NOTRUN -> [SKIP][120] ([Intel XE#3342])
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-432/igt@xe_sriov_flr@flr-vf1-clear.html
- shard-bmg: NOTRUN -> [SKIP][121] ([Intel XE#3342])
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@xe_sriov_flr@flr-vf1-clear.html
#### Possible fixes ####
* igt@kms_async_flips@invalid-async-flip-atomic@pipe-c-hdmi-a-1:
- shard-adlp: [DMESG-WARN][122] ([Intel XE#4543]) -> [PASS][123] +1 other test pass
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-adlp-4/igt@kms_async_flips@invalid-async-flip-atomic@pipe-c-hdmi-a-1.html
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-adlp-8/igt@kms_async_flips@invalid-async-flip-atomic@pipe-c-hdmi-a-1.html
* igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p:
- shard-bmg: [SKIP][124] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][125]
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-4/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
- shard-bmg: [SKIP][126] ([Intel XE#2291]) -> [PASS][127] +1 other test pass
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-5/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-4/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
* igt@kms_dp_link_training@non-uhbr-sst:
- shard-bmg: [SKIP][128] ([Intel XE#4354]) -> [PASS][129]
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-5/igt@kms_dp_link_training@non-uhbr-sst.html
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-2/igt@kms_dp_link_training@non-uhbr-sst.html
* igt@kms_feature_discovery@display-2x:
- shard-bmg: [SKIP][130] ([Intel XE#2373]) -> [PASS][131]
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-5/igt@kms_feature_discovery@display-2x.html
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-8/igt@kms_feature_discovery@display-2x.html
* igt@kms_flip@2x-plain-flip:
- shard-bmg: [SKIP][132] ([Intel XE#2316]) -> [PASS][133] +6 other tests pass
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-5/igt@kms_flip@2x-plain-flip.html
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-4/igt@kms_flip@2x-plain-flip.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp4:
- shard-dg2-set2: [FAIL][134] ([Intel XE#301]) -> [PASS][135] +5 other tests pass
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-dg2-464/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp4.html
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-436/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp4.html
* igt@kms_flip@flip-vs-suspend@d-hdmi-a1:
- shard-adlp: [DMESG-WARN][136] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][137] +2 other tests pass
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-adlp-4/igt@kms_flip@flip-vs-suspend@d-hdmi-a1.html
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-adlp-3/igt@kms_flip@flip-vs-suspend@d-hdmi-a1.html
* igt@kms_plane_multiple@2x-tiling-x:
- shard-bmg: [SKIP][138] ([Intel XE#4596]) -> [PASS][139]
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-x.html
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-8/igt@kms_plane_multiple@2x-tiling-x.html
* igt@kms_vblank@ts-continuation-idle-hang@pipe-d-dp-4:
- shard-dg2-set2: [INCOMPLETE][140] ([Intel XE#4488] / [Intel XE#4842]) -> [PASS][141] +1 other test pass
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-dg2-463/igt@kms_vblank@ts-continuation-idle-hang@pipe-d-dp-4.html
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-436/igt@kms_vblank@ts-continuation-idle-hang@pipe-d-dp-4.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind:
- shard-dg2-set2: [SKIP][142] ([Intel XE#1392]) -> [PASS][143] +4 other tests pass
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind.html
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-433/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind.html
#### Warnings ####
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
- shard-dg2-set2: [INCOMPLETE][144] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522]) -> [INCOMPLETE][145] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522])
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
* igt@kms_content_protection@uevent:
- shard-bmg: [SKIP][146] ([Intel XE#2341]) -> [FAIL][147] ([Intel XE#1188])
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-5/igt@kms_content_protection@uevent.html
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-2/igt@kms_content_protection@uevent.html
* igt@kms_flip@2x-blocking-wf_vblank:
- shard-bmg: [SKIP][148] ([Intel XE#2316]) -> [FAIL][149] ([Intel XE#2882])
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-5/igt@kms_flip@2x-blocking-wf_vblank.html
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-2/igt@kms_flip@2x-blocking-wf_vblank.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-pgflip-blt:
- shard-bmg: [SKIP][150] ([Intel XE#2312]) -> [SKIP][151] ([Intel XE#2311]) +13 other tests skip
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-pgflip-blt.html
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][152] ([Intel XE#2311]) -> [SKIP][153] ([Intel XE#2312]) +16 other tests skip
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][154] ([Intel XE#4141]) -> [SKIP][155] ([Intel XE#2312]) +4 other tests skip
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc.html
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
- shard-bmg: [SKIP][156] ([Intel XE#2312]) -> [SKIP][157] ([Intel XE#4141]) +8 other tests skip
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-plflip-blt:
- shard-bmg: [SKIP][158] ([Intel XE#2312]) -> [SKIP][159] ([Intel XE#2313]) +15 other tests skip
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-plflip-blt.html
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render:
- shard-bmg: [SKIP][160] ([Intel XE#2313]) -> [SKIP][161] ([Intel XE#2312]) +8 other tests skip
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-dg2-set2: [SKIP][162] ([Intel XE#362]) -> [FAIL][163] ([Intel XE#1729])
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern.html
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-434/igt@kms_tiled_display@basic-test-pattern.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-mmap-remap-ro-dontunmap:
- shard-dg2-set2: [SKIP][164] ([Intel XE#4915]) -> [INCOMPLETE][165] ([Intel XE#2594])
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-dg2-436/igt@xe_exec_system_allocator@threads-shared-vm-many-large-mmap-remap-ro-dontunmap.html
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-dg2-434/igt@xe_exec_system_allocator@threads-shared-vm-many-large-mmap-remap-ro-dontunmap.html
* igt@xe_pmu@engine-activity-load:
- shard-adlp: [ABORT][166] ([Intel XE#5214]) -> [DMESG-WARN][167] ([Intel XE#5214]) +3 other tests dmesg-warn
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-adlp-3/igt@xe_pmu@engine-activity-load.html
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-adlp-6/igt@xe_pmu@engine-activity-load.html
* igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random:
- shard-adlp: [ABORT][168] ([Intel XE#5214]) -> [INCOMPLETE][169] ([Intel XE#5214]) +1 other test incomplete
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76/shard-adlp-3/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/shard-adlp-3/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1135]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1135
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#1794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1794
[Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2414
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
[Intel XE#2594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2594
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2882
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3767]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3767
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4358
[Intel XE#4418]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4418
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#4488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4488
[Intel XE#4501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4501
[Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4835]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4835
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4842]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4842
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4937]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4937
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5103]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5103
[Intel XE#5172]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5172
[Intel XE#5214]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5214
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76 -> xe-pw-149816v5
IGT_8411: d5b5d2bb4f8795a98ea58376a128b74f654b7ec1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3255-dea7240e83c9e58ec755a3d68e7db10068df6b76: dea7240e83c9e58ec755a3d68e7db10068df6b76
xe-pw-149816v5: 149816v5
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149816v5/index.html
[-- Attachment #2: Type: text/html, Size: 59364 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3] drm/xe/hwmon: Fix xe_hwmon_power_max_write
2025-06-16 7:40 ` Riana Tauro
@ 2025-06-17 10:13 ` Poosa, Karthik
2025-06-17 11:33 ` Riana Tauro
0 siblings, 1 reply; 8+ messages in thread
From: Poosa, Karthik @ 2025-06-17 10:13 UTC (permalink / raw)
To: Riana Tauro, intel-xe; +Cc: anshuman.gupta, badal.nilawar, Riana Tauro
On 16-06-2025 13:10, Riana Tauro wrote:
> Hi Karthik
>
> On 6/16/2025 12:41 PM, Karthik Poosa wrote:
>> Prevent other bits of mailbox power limit from being overwritten with 0.
>> This issue was due to a missing read and modify of current power limit,
>> before setting a requested mailbox power limit, which is added in this
>> patch.
>>
>
> Since you are making changes to power interval also .Split the patches
> into two. One to add rmw and make changes to existing code. The other
> as the new fix.
We can't split xe_hwmon_power_max_interval_store changes in separate
patch, as it would cause compilation issue.
>
> Thanks
> Riana
>
>> v2:
>> - Improve commit message. (Anshuman)
>>
>> v3:
>> - Rebase.
>> - Rephrase commit message. (Riana)
>> - Add read-modify-write variant of xe_hwmon_pcode_write_power_limit()
>> i.e. xe_hwmon_pcode_rmw_power_limit(). (Badal)
>> - Use xe_hwmon_pcode_rmw_power_limit() to set mailbox power limits.
>> - Remove xe_hwmon_pcode_write_power_limit() as all mailbox power
>> limits
>> writes use xe_hwmon_pcode_rmw_power_limit() only.
>>
>> Fixes: 7596d839f6228 ("drm/xe/hwmon: Add support to manage power
>> limits though mailbox")
>> Reviewed-by: Riana Tauro <riana.tauro@intel.com>
>> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
>> ---
>> drivers/gpu/drm/xe/regs/xe_mchbar_regs.h | 1 +
>> drivers/gpu/drm/xe/xe_hwmon.c | 48 ++++++++++++------------
>> 2 files changed, 24 insertions(+), 25 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h
>> b/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h
>> index 5394a1373a6b..ef2bf984723f 100644
>> --- a/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h
>> +++ b/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h
>> @@ -40,6 +40,7 @@
>> #define PCU_CR_PACKAGE_RAPL_LIMIT XE_REG(MCHBAR_MIRROR_BASE_SNB +
>> 0x59a0)
>> #define PWR_LIM_VAL REG_GENMASK(14, 0)
>> #define PWR_LIM_EN REG_BIT(15)
>> +#define PWR_LIM REG_GENMASK(15, 0)
>> #define PWR_LIM_TIME REG_GENMASK(23, 17)
>> #define PWR_LIM_TIME_X REG_GENMASK(23, 22)
>> #define PWR_LIM_TIME_Y REG_GENMASK(21, 17)
>> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c
>> b/drivers/gpu/drm/xe/xe_hwmon.c
>> index 0d32e977537c..fa841311bdcf 100644
>> --- a/drivers/gpu/drm/xe/xe_hwmon.c
>> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
>> @@ -175,8 +175,8 @@ static int xe_hwmon_pcode_read_power_limit(const
>> struct xe_hwmon *hwmon, u32 att
>> return ret;
>> }
>> -static int xe_hwmon_pcode_write_power_limit(const struct xe_hwmon
>> *hwmon, u32 attr, u8 channel,
>> - u32 uval)
>> +static int xe_hwmon_pcode_rmw_power_limit(const struct xe_hwmon
>> *hwmon, u32 attr, u8 channel,
>> + u32 clr, u32 set)
>> {
>> struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
>> u32 val0, val1;
>> @@ -195,9 +195,9 @@ static int xe_hwmon_pcode_write_power_limit(const
>> struct xe_hwmon *hwmon, u32 at
>> channel, val0, val1, ret);
>> if (attr == PL1_HWMON_ATTR)
>> - val0 = uval;
>> + val0 = (val0 & ~clr) | set;
>> else if (attr == PL2_HWMON_ATTR)
>> - val1 = uval;
>> + val1 = (val1 & ~clr) | set;
>> else
>> return -EIO;
>> @@ -342,7 +342,7 @@ static int xe_hwmon_power_max_write(struct
>> xe_hwmon *hwmon, u32 attr, int channe
>> if (hwmon->xe->info.has_mbx_power_limits) {
>> drm_dbg(&hwmon->xe->drm, "disabling %s on channel %d\n",
>> PWR_ATTR_TO_STR(attr), channel);
>> - xe_hwmon_pcode_write_power_limit(hwmon, attr, channel, 0);
>> + xe_hwmon_pcode_rmw_power_limit(hwmon, attr, channel,
>> PWR_LIM_EN, 0);
>> xe_hwmon_pcode_read_power_limit(hwmon, attr, channel,
>> ®_val);
>> } else {
>> reg_val = xe_mmio_rmw32(mmio, rapl_limit, PWR_LIM_EN, 0);
>> @@ -378,7 +378,8 @@ static int xe_hwmon_power_max_write(struct
>> xe_hwmon *hwmon, u32 attr, int channe
>> reg_val = PWR_LIM_EN | REG_FIELD_PREP(PWR_LIM_VAL, reg_val);
>> if (hwmon->xe->info.has_mbx_power_limits)
>> - ret = xe_hwmon_pcode_write_power_limit(hwmon, attr, channel,
>> reg_val);
>> + ret = xe_hwmon_pcode_rmw_power_limit(hwmon, attr, channel,
>> PWR_LIM_EN | PWR_LIM_VAL,
>> + reg_val);
>> else
>> reg_val = xe_mmio_rmw32(mmio, rapl_limit, PWR_LIM_EN |
>> PWR_LIM_VAL,
>> reg_val);
>> @@ -591,14 +592,11 @@ xe_hwmon_power_max_interval_store(struct device
>> *dev, struct device_attribute *a
>> mutex_lock(&hwmon->hwmon_lock);
>> - if (hwmon->xe->info.has_mbx_power_limits) {
>> - ret = xe_hwmon_pcode_read_power_limit(hwmon, power_attr,
>> channel, (u32 *)&r);
>> - r = (r & ~PWR_LIM_TIME) | rxy;
>> - xe_hwmon_pcode_write_power_limit(hwmon, power_attr, channel,
>> r);
>> - } else {
>> + if (hwmon->xe->info.has_mbx_power_limits)
>> + xe_hwmon_pcode_rmw_power_limit(hwmon, power_attr, channel,
>> PWR_LIM_TIME, rxy);
>> + else
>> r = xe_mmio_rmw32(mmio, xe_hwmon_get_reg(hwmon,
>> REG_PKG_RAPL_LIMIT, channel),
>> PWR_LIM_TIME, rxy);
>> - }
>> mutex_unlock(&hwmon->hwmon_lock);
>> @@ -1217,25 +1215,25 @@ xe_hwmon_get_preregistration_info(struct
>> xe_hwmon *hwmon)
>> &hwmon->pl1_on_boot[CHANNEL_PKG]) |
>> xe_hwmon_pcode_read_power_limit(hwmon, PL2_HWMON_ATTR,
>> CHANNEL_CARD,
>> &hwmon->pl2_on_boot[CHANNEL_CARD]) |
>> - xe_hwmon_pcode_read_power_limit(hwmon, PL1_HWMON_ATTR,
>> CHANNEL_PKG,
>> + xe_hwmon_pcode_read_power_limit(hwmon, PL2_HWMON_ATTR,
>> CHANNEL_PKG,
>> &hwmon->pl2_on_boot[CHANNEL_PKG])) {
>> drm_warn(&hwmon->xe->drm,
>> "Failed to read power limits, check GPU firmware
>> !\n");
>> } else {
>> drm_info(&hwmon->xe->drm, "Using mailbox commands for
>> power limits\n");
>> /* Write default limits to read from pcode from now on. */
>> - xe_hwmon_pcode_write_power_limit(hwmon, PL1_HWMON_ATTR,
>> - CHANNEL_CARD,
>> - hwmon->pl1_on_boot[CHANNEL_CARD]);
>> - xe_hwmon_pcode_write_power_limit(hwmon, PL1_HWMON_ATTR,
>> - CHANNEL_PKG,
>> - hwmon->pl1_on_boot[CHANNEL_PKG]);
>> - xe_hwmon_pcode_write_power_limit(hwmon, PL2_HWMON_ATTR,
>> - CHANNEL_CARD,
>> - hwmon->pl2_on_boot[CHANNEL_CARD]);
>> - xe_hwmon_pcode_write_power_limit(hwmon, PL2_HWMON_ATTR,
>> - CHANNEL_PKG,
>> - hwmon->pl2_on_boot[CHANNEL_PKG]);
>> + xe_hwmon_pcode_rmw_power_limit(hwmon, PL1_HWMON_ATTR,
>> + CHANNEL_CARD, PWR_LIM | PWR_LIM_TIME,
>> + hwmon->pl1_on_boot[CHANNEL_CARD]);
>> + xe_hwmon_pcode_rmw_power_limit(hwmon, PL1_HWMON_ATTR,
>> + CHANNEL_PKG, PWR_LIM | PWR_LIM_TIME,
>> + hwmon->pl1_on_boot[CHANNEL_PKG]);
>> + xe_hwmon_pcode_rmw_power_limit(hwmon, PL2_HWMON_ATTR,
>> + CHANNEL_CARD, PWR_LIM | PWR_LIM_TIME,
>> + hwmon->pl2_on_boot[CHANNEL_CARD]);
>> + xe_hwmon_pcode_rmw_power_limit(hwmon, PL2_HWMON_ATTR,
>> + CHANNEL_PKG, PWR_LIM | PWR_LIM_TIME,
>> + hwmon->pl2_on_boot[CHANNEL_PKG]);
>> hwmon->scl_shift_power = PWR_UNIT;
>> hwmon->scl_shift_energy = ENERGY_UNIT;
>> hwmon->scl_shift_time = TIME_UNIT;
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3] drm/xe/hwmon: Fix xe_hwmon_power_max_write
2025-06-17 10:13 ` Poosa, Karthik
@ 2025-06-17 11:33 ` Riana Tauro
2025-06-18 9:49 ` Poosa, Karthik
0 siblings, 1 reply; 8+ messages in thread
From: Riana Tauro @ 2025-06-17 11:33 UTC (permalink / raw)
To: Poosa, Karthik, intel-xe; +Cc: anshuman.gupta, badal.nilawar
On 6/17/2025 3:43 PM, Poosa, Karthik wrote:
>
> On 16-06-2025 13:10, Riana Tauro wrote:
>> Hi Karthik
>>
>> On 6/16/2025 12:41 PM, Karthik Poosa wrote:
>>> Prevent other bits of mailbox power limit from being overwritten with 0.
>>> This issue was due to a missing read and modify of current power limit,
>>> before setting a requested mailbox power limit, which is added in this
>>> patch.
>>>
>>
>> Since you are making changes to power interval also .Split the patches
>> into two. One to add rmw and make changes to existing code. The other
>> as the new fix.
>
> We can't split xe_hwmon_power_max_interval_store changes in separate
> patch, as it would cause compilation issue.
Okay.
Use either one across file PWR_LIM or PWR_LIM_EN | PWR_LIM_VAL as its
same bits
You can retain my RB.
Thanks
Riana
>
>>
>> Thanks
>> Riana
>>
>>> v2:
>>> - Improve commit message. (Anshuman)
>>>
>>> v3:
>>> - Rebase.
>>> - Rephrase commit message. (Riana)
>>> - Add read-modify-write variant of xe_hwmon_pcode_write_power_limit()
>>> i.e. xe_hwmon_pcode_rmw_power_limit(). (Badal)
>>> - Use xe_hwmon_pcode_rmw_power_limit() to set mailbox power limits.
>>> - Remove xe_hwmon_pcode_write_power_limit() as all mailbox power
>>> limits
>>> writes use xe_hwmon_pcode_rmw_power_limit() only.
>>>
>>> Fixes: 7596d839f6228 ("drm/xe/hwmon: Add support to manage power
>>> limits though mailbox")
>>> Reviewed-by: Riana Tauro <riana.tauro@intel.com>
>>> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
>>> ---
>>> drivers/gpu/drm/xe/regs/xe_mchbar_regs.h | 1 +
>>> drivers/gpu/drm/xe/xe_hwmon.c | 48 ++++++++++++------------
>>> 2 files changed, 24 insertions(+), 25 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h b/drivers/gpu/
>>> drm/xe/regs/xe_mchbar_regs.h
>>> index 5394a1373a6b..ef2bf984723f 100644
>>> --- a/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h
>>> +++ b/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h
>>> @@ -40,6 +40,7 @@
>>> #define PCU_CR_PACKAGE_RAPL_LIMIT XE_REG(MCHBAR_MIRROR_BASE_SNB +
>>> 0x59a0)
>>> #define PWR_LIM_VAL REG_GENMASK(14, 0)
>>> #define PWR_LIM_EN REG_BIT(15)
>>> +#define PWR_LIM REG_GENMASK(15, 0)
>>> #define PWR_LIM_TIME REG_GENMASK(23, 17)
>>> #define PWR_LIM_TIME_X REG_GENMASK(23, 22)
>>> #define PWR_LIM_TIME_Y REG_GENMASK(21, 17)
>>> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/
>>> xe_hwmon.c
>>> index 0d32e977537c..fa841311bdcf 100644
>>> --- a/drivers/gpu/drm/xe/xe_hwmon.c
>>> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
>>> @@ -175,8 +175,8 @@ static int xe_hwmon_pcode_read_power_limit(const
>>> struct xe_hwmon *hwmon, u32 att
>>> return ret;
>>> }
>>> -static int xe_hwmon_pcode_write_power_limit(const struct xe_hwmon
>>> *hwmon, u32 attr, u8 channel,
>>> - u32 uval)
>>> +static int xe_hwmon_pcode_rmw_power_limit(const struct xe_hwmon
>>> *hwmon, u32 attr, u8 channel,
>>> + u32 clr, u32 set)
>>> {
>>> struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
>>> u32 val0, val1;
>>> @@ -195,9 +195,9 @@ static int xe_hwmon_pcode_write_power_limit(const
>>> struct xe_hwmon *hwmon, u32 at
>>> channel, val0, val1, ret);
>>> if (attr == PL1_HWMON_ATTR)
>>> - val0 = uval;
>>> + val0 = (val0 & ~clr) | set;
>>> else if (attr == PL2_HWMON_ATTR)
>>> - val1 = uval;
>>> + val1 = (val1 & ~clr) | set;
>>> else
>>> return -EIO;
>>> @@ -342,7 +342,7 @@ static int xe_hwmon_power_max_write(struct
>>> xe_hwmon *hwmon, u32 attr, int channe
>>> if (hwmon->xe->info.has_mbx_power_limits) {
>>> drm_dbg(&hwmon->xe->drm, "disabling %s on channel %d\n",
>>> PWR_ATTR_TO_STR(attr), channel);
>>> - xe_hwmon_pcode_write_power_limit(hwmon, attr, channel, 0);
>>> + xe_hwmon_pcode_rmw_power_limit(hwmon, attr, channel,
>>> PWR_LIM_EN, 0);
>>> xe_hwmon_pcode_read_power_limit(hwmon, attr, channel,
>>> ®_val);
>>> } else {
>>> reg_val = xe_mmio_rmw32(mmio, rapl_limit, PWR_LIM_EN, 0);
>>> @@ -378,7 +378,8 @@ static int xe_hwmon_power_max_write(struct
>>> xe_hwmon *hwmon, u32 attr, int channe
>>> reg_val = PWR_LIM_EN | REG_FIELD_PREP(PWR_LIM_VAL, reg_val);
>>> if (hwmon->xe->info.has_mbx_power_limits)
>>> - ret = xe_hwmon_pcode_write_power_limit(hwmon, attr, channel,
>>> reg_val);
>>> + ret = xe_hwmon_pcode_rmw_power_limit(hwmon, attr, channel,
>>> PWR_LIM_EN | PWR_LIM_VAL,
>>> + reg_val);
>>> else
>>> reg_val = xe_mmio_rmw32(mmio, rapl_limit, PWR_LIM_EN |
>>> PWR_LIM_VAL,
>>> reg_val);
>>> @@ -591,14 +592,11 @@ xe_hwmon_power_max_interval_store(struct device
>>> *dev, struct device_attribute *a
>>> mutex_lock(&hwmon->hwmon_lock);
>>> - if (hwmon->xe->info.has_mbx_power_limits) {
>>> - ret = xe_hwmon_pcode_read_power_limit(hwmon, power_attr,
>>> channel, (u32 *)&r);
>>> - r = (r & ~PWR_LIM_TIME) | rxy;
>>> - xe_hwmon_pcode_write_power_limit(hwmon, power_attr, channel,
>>> r);
>>> - } else {
>>> + if (hwmon->xe->info.has_mbx_power_limits)
>>> + xe_hwmon_pcode_rmw_power_limit(hwmon, power_attr, channel,
>>> PWR_LIM_TIME, rxy);
>>> + else
>>> r = xe_mmio_rmw32(mmio, xe_hwmon_get_reg(hwmon,
>>> REG_PKG_RAPL_LIMIT, channel),
>>> PWR_LIM_TIME, rxy);
>>> - }
>>> mutex_unlock(&hwmon->hwmon_lock);
>>> @@ -1217,25 +1215,25 @@ xe_hwmon_get_preregistration_info(struct
>>> xe_hwmon *hwmon)
>>> &hwmon->pl1_on_boot[CHANNEL_PKG]) |
>>> xe_hwmon_pcode_read_power_limit(hwmon, PL2_HWMON_ATTR,
>>> CHANNEL_CARD,
>>> &hwmon->pl2_on_boot[CHANNEL_CARD]) |
>>> - xe_hwmon_pcode_read_power_limit(hwmon, PL1_HWMON_ATTR,
>>> CHANNEL_PKG,
>>> + xe_hwmon_pcode_read_power_limit(hwmon, PL2_HWMON_ATTR,
>>> CHANNEL_PKG,
>>> &hwmon->pl2_on_boot[CHANNEL_PKG])) {
>>> drm_warn(&hwmon->xe->drm,
>>> "Failed to read power limits, check GPU firmware !
>>> \n");
>>> } else {
>>> drm_info(&hwmon->xe->drm, "Using mailbox commands for
>>> power limits\n");
>>> /* Write default limits to read from pcode from now on. */
>>> - xe_hwmon_pcode_write_power_limit(hwmon, PL1_HWMON_ATTR,
>>> - CHANNEL_CARD,
>>> - hwmon->pl1_on_boot[CHANNEL_CARD]);
>>> - xe_hwmon_pcode_write_power_limit(hwmon, PL1_HWMON_ATTR,
>>> - CHANNEL_PKG,
>>> - hwmon->pl1_on_boot[CHANNEL_PKG]);
>>> - xe_hwmon_pcode_write_power_limit(hwmon, PL2_HWMON_ATTR,
>>> - CHANNEL_CARD,
>>> - hwmon->pl2_on_boot[CHANNEL_CARD]);
>>> - xe_hwmon_pcode_write_power_limit(hwmon, PL2_HWMON_ATTR,
>>> - CHANNEL_PKG,
>>> - hwmon->pl2_on_boot[CHANNEL_PKG]);
>>> + xe_hwmon_pcode_rmw_power_limit(hwmon, PL1_HWMON_ATTR,
>>> + CHANNEL_CARD, PWR_LIM | PWR_LIM_TIME,
>>> + hwmon->pl1_on_boot[CHANNEL_CARD]);
>>> + xe_hwmon_pcode_rmw_power_limit(hwmon, PL1_HWMON_ATTR,
>>> + CHANNEL_PKG, PWR_LIM | PWR_LIM_TIME,
>>> + hwmon->pl1_on_boot[CHANNEL_PKG]);
>>> + xe_hwmon_pcode_rmw_power_limit(hwmon, PL2_HWMON_ATTR,
>>> + CHANNEL_CARD, PWR_LIM | PWR_LIM_TIME,
>>> + hwmon->pl2_on_boot[CHANNEL_CARD]);
>>> + xe_hwmon_pcode_rmw_power_limit(hwmon, PL2_HWMON_ATTR,
>>> + CHANNEL_PKG, PWR_LIM | PWR_LIM_TIME,
>>> + hwmon->pl2_on_boot[CHANNEL_PKG]);
>>> hwmon->scl_shift_power = PWR_UNIT;
>>> hwmon->scl_shift_energy = ENERGY_UNIT;
>>> hwmon->scl_shift_time = TIME_UNIT;
>>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3] drm/xe/hwmon: Fix xe_hwmon_power_max_write
2025-06-17 11:33 ` Riana Tauro
@ 2025-06-18 9:49 ` Poosa, Karthik
0 siblings, 0 replies; 8+ messages in thread
From: Poosa, Karthik @ 2025-06-18 9:49 UTC (permalink / raw)
To: Riana Tauro, intel-xe; +Cc: anshuman.gupta, badal.nilawar
On 17-06-2025 17:03, Riana Tauro wrote:
>
>
> On 6/17/2025 3:43 PM, Poosa, Karthik wrote:
>>
>> On 16-06-2025 13:10, Riana Tauro wrote:
>>> Hi Karthik
>>>
>>> On 6/16/2025 12:41 PM, Karthik Poosa wrote:
>>>> Prevent other bits of mailbox power limit from being overwritten
>>>> with 0.
>>>> This issue was due to a missing read and modify of current power
>>>> limit,
>>>> before setting a requested mailbox power limit, which is added in this
>>>> patch.
>>>>
>>>
>>> Since you are making changes to power interval also .Split the
>>> patches into two. One to add rmw and make changes to existing code.
>>> The other as the new fix.
>>
>> We can't split xe_hwmon_power_max_interval_store changes in separate
>> patch, as it would cause compilation issue.
>
> Okay.
>
> Use either one across file PWR_LIM or PWR_LIM_EN | PWR_LIM_VAL as its
> same bits
Changed this to PMR_LIM in next revision.
>
> You can retain my RB.
>
> Thanks
> Riana
>
>>
>>>
>>> Thanks
>>> Riana
>>>
>>>> v2:
>>>> - Improve commit message. (Anshuman)
>>>>
>>>> v3:
>>>> - Rebase.
>>>> - Rephrase commit message. (Riana)
>>>> - Add read-modify-write variant of
>>>> xe_hwmon_pcode_write_power_limit()
>>>> i.e. xe_hwmon_pcode_rmw_power_limit(). (Badal)
>>>> - Use xe_hwmon_pcode_rmw_power_limit() to set mailbox power limits.
>>>> - Remove xe_hwmon_pcode_write_power_limit() as all mailbox power
>>>> limits
>>>> writes use xe_hwmon_pcode_rmw_power_limit() only.
>>>>
>>>> Fixes: 7596d839f6228 ("drm/xe/hwmon: Add support to manage power
>>>> limits though mailbox")
>>>> Reviewed-by: Riana Tauro <riana.tauro@intel.com>
>>>> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
>>>> ---
>>>> drivers/gpu/drm/xe/regs/xe_mchbar_regs.h | 1 +
>>>> drivers/gpu/drm/xe/xe_hwmon.c | 48
>>>> ++++++++++++------------
>>>> 2 files changed, 24 insertions(+), 25 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h
>>>> b/drivers/gpu/ drm/xe/regs/xe_mchbar_regs.h
>>>> index 5394a1373a6b..ef2bf984723f 100644
>>>> --- a/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h
>>>> +++ b/drivers/gpu/drm/xe/regs/xe_mchbar_regs.h
>>>> @@ -40,6 +40,7 @@
>>>> #define PCU_CR_PACKAGE_RAPL_LIMIT XE_REG(MCHBAR_MIRROR_BASE_SNB +
>>>> 0x59a0)
>>>> #define PWR_LIM_VAL REG_GENMASK(14, 0)
>>>> #define PWR_LIM_EN REG_BIT(15)
>>>> +#define PWR_LIM REG_GENMASK(15, 0)
>>>> #define PWR_LIM_TIME REG_GENMASK(23, 17)
>>>> #define PWR_LIM_TIME_X REG_GENMASK(23, 22)
>>>> #define PWR_LIM_TIME_Y REG_GENMASK(21, 17)
>>>> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/
>>>> xe_hwmon.c
>>>> index 0d32e977537c..fa841311bdcf 100644
>>>> --- a/drivers/gpu/drm/xe/xe_hwmon.c
>>>> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
>>>> @@ -175,8 +175,8 @@ static int
>>>> xe_hwmon_pcode_read_power_limit(const struct xe_hwmon *hwmon, u32 att
>>>> return ret;
>>>> }
>>>> -static int xe_hwmon_pcode_write_power_limit(const struct
>>>> xe_hwmon *hwmon, u32 attr, u8 channel,
>>>> - u32 uval)
>>>> +static int xe_hwmon_pcode_rmw_power_limit(const struct xe_hwmon
>>>> *hwmon, u32 attr, u8 channel,
>>>> + u32 clr, u32 set)
>>>> {
>>>> struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
>>>> u32 val0, val1;
>>>> @@ -195,9 +195,9 @@ static int
>>>> xe_hwmon_pcode_write_power_limit(const struct xe_hwmon *hwmon, u32 at
>>>> channel, val0, val1, ret);
>>>> if (attr == PL1_HWMON_ATTR)
>>>> - val0 = uval;
>>>> + val0 = (val0 & ~clr) | set;
>>>> else if (attr == PL2_HWMON_ATTR)
>>>> - val1 = uval;
>>>> + val1 = (val1 & ~clr) | set;
>>>> else
>>>> return -EIO;
>>>> @@ -342,7 +342,7 @@ static int xe_hwmon_power_max_write(struct
>>>> xe_hwmon *hwmon, u32 attr, int channe
>>>> if (hwmon->xe->info.has_mbx_power_limits) {
>>>> drm_dbg(&hwmon->xe->drm, "disabling %s on channel %d\n",
>>>> PWR_ATTR_TO_STR(attr), channel);
>>>> - xe_hwmon_pcode_write_power_limit(hwmon, attr, channel,
>>>> 0);
>>>> + xe_hwmon_pcode_rmw_power_limit(hwmon, attr, channel,
>>>> PWR_LIM_EN, 0);
>>>> xe_hwmon_pcode_read_power_limit(hwmon, attr, channel,
>>>> ®_val);
>>>> } else {
>>>> reg_val = xe_mmio_rmw32(mmio, rapl_limit, PWR_LIM_EN,
>>>> 0);
>>>> @@ -378,7 +378,8 @@ static int xe_hwmon_power_max_write(struct
>>>> xe_hwmon *hwmon, u32 attr, int channe
>>>> reg_val = PWR_LIM_EN | REG_FIELD_PREP(PWR_LIM_VAL, reg_val);
>>>> if (hwmon->xe->info.has_mbx_power_limits)
>>>> - ret = xe_hwmon_pcode_write_power_limit(hwmon, attr,
>>>> channel, reg_val);
>>>> + ret = xe_hwmon_pcode_rmw_power_limit(hwmon, attr, channel,
>>>> PWR_LIM_EN | PWR_LIM_VAL,
>>>> + reg_val);
>>>> else
>>>> reg_val = xe_mmio_rmw32(mmio, rapl_limit, PWR_LIM_EN |
>>>> PWR_LIM_VAL,
>>>> reg_val);
>>>> @@ -591,14 +592,11 @@ xe_hwmon_power_max_interval_store(struct
>>>> device *dev, struct device_attribute *a
>>>> mutex_lock(&hwmon->hwmon_lock);
>>>> - if (hwmon->xe->info.has_mbx_power_limits) {
>>>> - ret = xe_hwmon_pcode_read_power_limit(hwmon, power_attr,
>>>> channel, (u32 *)&r);
>>>> - r = (r & ~PWR_LIM_TIME) | rxy;
>>>> - xe_hwmon_pcode_write_power_limit(hwmon, power_attr,
>>>> channel, r);
>>>> - } else {
>>>> + if (hwmon->xe->info.has_mbx_power_limits)
>>>> + xe_hwmon_pcode_rmw_power_limit(hwmon, power_attr, channel,
>>>> PWR_LIM_TIME, rxy);
>>>> + else
>>>> r = xe_mmio_rmw32(mmio, xe_hwmon_get_reg(hwmon,
>>>> REG_PKG_RAPL_LIMIT, channel),
>>>> PWR_LIM_TIME, rxy);
>>>> - }
>>>> mutex_unlock(&hwmon->hwmon_lock);
>>>> @@ -1217,25 +1215,25 @@ xe_hwmon_get_preregistration_info(struct
>>>> xe_hwmon *hwmon)
>>>> &hwmon->pl1_on_boot[CHANNEL_PKG]) |
>>>> xe_hwmon_pcode_read_power_limit(hwmon,
>>>> PL2_HWMON_ATTR, CHANNEL_CARD,
>>>> &hwmon->pl2_on_boot[CHANNEL_CARD]) |
>>>> - xe_hwmon_pcode_read_power_limit(hwmon, PL1_HWMON_ATTR,
>>>> CHANNEL_PKG,
>>>> + xe_hwmon_pcode_read_power_limit(hwmon, PL2_HWMON_ATTR,
>>>> CHANNEL_PKG,
>>>> &hwmon->pl2_on_boot[CHANNEL_PKG])) {
>>>> drm_warn(&hwmon->xe->drm,
>>>> "Failed to read power limits, check GPU firmware
>>>> ! \n");
>>>> } else {
>>>> drm_info(&hwmon->xe->drm, "Using mailbox commands for
>>>> power limits\n");
>>>> /* Write default limits to read from pcode from now
>>>> on. */
>>>> - xe_hwmon_pcode_write_power_limit(hwmon, PL1_HWMON_ATTR,
>>>> - CHANNEL_CARD,
>>>> - hwmon->pl1_on_boot[CHANNEL_CARD]);
>>>> - xe_hwmon_pcode_write_power_limit(hwmon, PL1_HWMON_ATTR,
>>>> - CHANNEL_PKG,
>>>> - hwmon->pl1_on_boot[CHANNEL_PKG]);
>>>> - xe_hwmon_pcode_write_power_limit(hwmon, PL2_HWMON_ATTR,
>>>> - CHANNEL_CARD,
>>>> - hwmon->pl2_on_boot[CHANNEL_CARD]);
>>>> - xe_hwmon_pcode_write_power_limit(hwmon, PL2_HWMON_ATTR,
>>>> - CHANNEL_PKG,
>>>> - hwmon->pl2_on_boot[CHANNEL_PKG]);
>>>> + xe_hwmon_pcode_rmw_power_limit(hwmon, PL1_HWMON_ATTR,
>>>> + CHANNEL_CARD, PWR_LIM | PWR_LIM_TIME,
>>>> + hwmon->pl1_on_boot[CHANNEL_CARD]);
>>>> + xe_hwmon_pcode_rmw_power_limit(hwmon, PL1_HWMON_ATTR,
>>>> + CHANNEL_PKG, PWR_LIM | PWR_LIM_TIME,
>>>> + hwmon->pl1_on_boot[CHANNEL_PKG]);
>>>> + xe_hwmon_pcode_rmw_power_limit(hwmon, PL2_HWMON_ATTR,
>>>> + CHANNEL_CARD, PWR_LIM | PWR_LIM_TIME,
>>>> + hwmon->pl2_on_boot[CHANNEL_CARD]);
>>>> + xe_hwmon_pcode_rmw_power_limit(hwmon, PL2_HWMON_ATTR,
>>>> + CHANNEL_PKG, PWR_LIM | PWR_LIM_TIME,
>>>> + hwmon->pl2_on_boot[CHANNEL_PKG]);
>>>> hwmon->scl_shift_power = PWR_UNIT;
>>>> hwmon->scl_shift_energy = ENERGY_UNIT;
>>>> hwmon->scl_shift_time = TIME_UNIT;
>>>
>
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2025-06-18 9:49 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-06-16 7:11 [PATCH v3] drm/xe/hwmon: Fix xe_hwmon_power_max_write Karthik Poosa
2025-06-16 7:40 ` Riana Tauro
2025-06-17 10:13 ` Poosa, Karthik
2025-06-17 11:33 ` Riana Tauro
2025-06-18 9:49 ` Poosa, Karthik
2025-06-16 12:38 ` ✓ CI.KUnit: success for drm/xe/hwmon: Fix xe_hwmon_power_max_write (rev5) Patchwork
2025-06-16 13:30 ` ✓ Xe.CI.BAT: " Patchwork
2025-06-16 19:25 ` ✗ Xe.CI.Full: failure " Patchwork
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