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* [PATCH v2 0/7] drm/{i915, xe}/display: another stab at i915_fence_timeout() removal
@ 2026-08-27 12:34 Jani Nikula
  2026-08-27 12:34 ` [PATCH v2 1/7] drm/i915/reset: move gpu_reset_clobbers_display platform property to display Jani Nikula
                   ` (10 more replies)
  0 siblings, 11 replies; 14+ messages in thread
From: Jani Nikula @ 2026-08-27 12:34 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: maarten.lankhorst, ville.syrjala, jani.nikula

Here we go again, v2 of [1].

Add patches 1&2 and replace the last patch with two new ones.

Basically use fixed 10 second timeout on fence waits *only* when GPU
reset clobbers display or we're running forced display reset tests,
otherwise don't timeout, and unify both i915 and xe drivers on this.

BR,
Jani.


[1] https://lore.kernel.org/r/cover.1787148235.git.jani.nikula@intel.com


Jani Nikula (7):
  drm/i915/reset: move gpu_reset_clobbers_display platform property to
    display
  drm/i915/reset: make intel_display_reset_supported() static
  drm/i915/display: use struct intel_atomic_state *state variable naming
  drm/i915/display: reduce indent in intel_atomic_commit_fence_wait()
  drm/i915/display: debug log about fence wait timeouts and other errors
  drm/i915: only timeout on fence waits for display reset
  drm/i915/display: use fixed 10 second timeout for fence wait

 drivers/gpu/drm/i915/display/intel_display.c  | 34 +++++++++++++------
 .../drm/i915/display/intel_display_reset.c    | 10 +++++-
 .../drm/i915/display/intel_display_reset.h    |  2 +-
 drivers/gpu/drm/i915/gt/intel_reset.c         |  7 ++--
 drivers/gpu/drm/i915/i915_pci.c               |  6 ----
 drivers/gpu/drm/i915/intel_device_info.h      |  1 -
 .../drm/xe/compat-i915-headers/i915_config.h  | 16 ---------
 7 files changed, 36 insertions(+), 40 deletions(-)
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_config.h

-- 
2.47.3


^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v2 1/7] drm/i915/reset: move gpu_reset_clobbers_display platform property to display
  2026-08-27 12:34 [PATCH v2 0/7] drm/{i915, xe}/display: another stab at i915_fence_timeout() removal Jani Nikula
@ 2026-08-27 12:34 ` Jani Nikula
  2026-08-27 12:34 ` [PATCH v2 2/7] drm/i915/reset: make intel_display_reset_supported() static Jani Nikula
                   ` (9 subsequent siblings)
  10 siblings, 0 replies; 14+ messages in thread
From: Jani Nikula @ 2026-08-27 12:34 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: maarten.lankhorst, ville.syrjala, jani.nikula, Maarten Lankhorst

Whether the "GPU reset clobbers display" platform property belongs to
i915 core or display is neither here nor there. Move it to display for
the benefit of follow-up changes.

Instead of having a device info flag for it, just express this in terms
of the platforms: up to and including display version 4, except G45 and
GM45. This is historical platform information, and it's not going to
change. The added function actually better answers the question, "On
which platforms a display reset is required after a GPU reset?"

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_reset.c | 8 ++++++++
 drivers/gpu/drm/i915/display/intel_display_reset.h | 1 +
 drivers/gpu/drm/i915/gt/intel_reset.c              | 4 ++--
 drivers/gpu/drm/i915/i915_pci.c                    | 6 ------
 drivers/gpu/drm/i915/intel_device_info.h           | 1 -
 5 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.c b/drivers/gpu/drm/i915/display/intel_display_reset.c
index 504ec7043cd9..6ec1af1c8431 100644
--- a/drivers/gpu/drm/i915/display/intel_display_reset.c
+++ b/drivers/gpu/drm/i915/display/intel_display_reset.c
@@ -23,6 +23,14 @@ bool intel_display_reset_supported(struct intel_display *display)
 	return display && HAS_DISPLAY(display);
 }
 
+bool intel_display_reset_needed_after_gpu_reset(struct intel_display *display)
+{
+	/* aka gpu_reset_clobbers_display */
+	return intel_display_reset_supported(display) &&
+		DISPLAY_VER(display) <= 4 &&
+		!display->platform.g45 && !display->platform.gm45;
+}
+
 bool intel_display_reset_test(struct intel_display *display)
 {
 	return display && HAS_DISPLAY(display) &&
diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.h b/drivers/gpu/drm/i915/display/intel_display_reset.h
index b88c330a3441..68312403904e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_reset.h
+++ b/drivers/gpu/drm/i915/display/intel_display_reset.h
@@ -11,6 +11,7 @@
 struct intel_display;
 
 bool intel_display_reset_supported(struct intel_display *display);
+bool intel_display_reset_needed_after_gpu_reset(struct intel_display *display);
 bool intel_display_reset_test(struct intel_display *display);
 void intel_display_reset_prepare(struct intel_display *display);
 void intel_display_reset_finish(struct intel_display *display, bool test_only);
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 6053f3e8aa27..439635bf94dd 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1180,9 +1180,9 @@ static int resume(struct intel_gt *gt)
 
 bool intel_gt_gpu_reset_clobbers_display(struct intel_gt *gt)
 {
-	struct drm_i915_private *i915 = gt->i915;
+	struct intel_display *display = gt->i915->display;
 
-	return INTEL_INFO(i915)->gpu_reset_clobbers_display;
+	return intel_display_reset_needed_after_gpu_reset(display);
 }
 
 /**
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 82415af47d54..64e8db0f7aed 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -80,7 +80,6 @@ __diag_ignore_all("-Woverride-init", "Allow field initialization overrides for d
 #define I830_FEATURES \
 	GEN(2), \
 	.is_mobile = 1, \
-	.gpu_reset_clobbers_display = true, \
 	.has_3d_pipeline = 1, \
 	.hws_needs_physical = 1, \
 	.unfenced_needs_alignment = 1, \
@@ -96,7 +95,6 @@ __diag_ignore_all("-Woverride-init", "Allow field initialization overrides for d
 #define I845_FEATURES \
 	GEN(2), \
 	.has_3d_pipeline = 1, \
-	.gpu_reset_clobbers_display = true, \
 	.hws_needs_physical = 1, \
 	.unfenced_needs_alignment = 1, \
 	.platform_engine_mask = BIT(RCS0), \
@@ -130,7 +128,6 @@ static const struct intel_device_info i865g_info = {
 
 #define GEN3_FEATURES \
 	GEN(3), \
-	.gpu_reset_clobbers_display = true, \
 	.platform_engine_mask = BIT(RCS0), \
 	.has_3d_pipeline = 1, \
 	.has_snoop = true, \
@@ -193,7 +190,6 @@ static const struct intel_device_info pnv_m_info = {
 
 #define GEN4_FEATURES \
 	GEN(4), \
-	.gpu_reset_clobbers_display = true, \
 	.platform_engine_mask = BIT(RCS0), \
 	.has_3d_pipeline = 1, \
 	.has_snoop = true, \
@@ -223,7 +219,6 @@ static const struct intel_device_info g45_info = {
 	GEN4_FEATURES,
 	PLATFORM(INTEL_G45),
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0),
-	.gpu_reset_clobbers_display = false,
 };
 
 static const struct intel_device_info gm45_info = {
@@ -231,7 +226,6 @@ static const struct intel_device_info gm45_info = {
 	PLATFORM(INTEL_GM45),
 	.is_mobile = 1,
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0),
-	.gpu_reset_clobbers_display = false,
 };
 
 #define GEN5_FEATURES \
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 9387385cb418..7296e7dcf828 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -148,7 +148,6 @@ enum intel_ppgtt_type {
 	/* Keep has_* in alphabetical order */ \
 	func(has_64bit_reloc); \
 	func(has_64k_pages); \
-	func(gpu_reset_clobbers_display); \
 	func(has_reset_engine); \
 	func(has_3d_pipeline); \
 	func(has_flat_ccs); \
-- 
2.47.3


^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v2 2/7] drm/i915/reset: make intel_display_reset_supported() static
  2026-08-27 12:34 [PATCH v2 0/7] drm/{i915, xe}/display: another stab at i915_fence_timeout() removal Jani Nikula
  2026-08-27 12:34 ` [PATCH v2 1/7] drm/i915/reset: move gpu_reset_clobbers_display platform property to display Jani Nikula
@ 2026-08-27 12:34 ` Jani Nikula
  2026-08-27 12:34 ` [PATCH v2 3/7] drm/i915/display: use struct intel_atomic_state *state variable naming Jani Nikula
                   ` (8 subsequent siblings)
  10 siblings, 0 replies; 14+ messages in thread
From: Jani Nikula @ 2026-08-27 12:34 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: maarten.lankhorst, ville.syrjala, jani.nikula, Maarten Lankhorst

intel_display_reset_supported() is included in
intel_display_reset_needed_after_gpu_reset(), so there's really no need
to call both in intel_gt_reset_global(). Simplify, and make
intel_display_reset_supported() static.

Note: For now, keep using intel_gt_gpu_reset_clobbers_display() in most
places, although it's just a thin wrapper around
intel_display_reset_needed_after_gpu_reset().

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_reset.c | 2 +-
 drivers/gpu/drm/i915/display/intel_display_reset.h | 1 -
 drivers/gpu/drm/i915/gt/intel_reset.c              | 3 +--
 3 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.c b/drivers/gpu/drm/i915/display/intel_display_reset.c
index 6ec1af1c8431..323ca0e5e74f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_reset.c
+++ b/drivers/gpu/drm/i915/display/intel_display_reset.c
@@ -18,7 +18,7 @@
 #include "intel_hotplug.h"
 #include "intel_pps.h"
 
-bool intel_display_reset_supported(struct intel_display *display)
+static bool intel_display_reset_supported(struct intel_display *display)
 {
 	return display && HAS_DISPLAY(display);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.h b/drivers/gpu/drm/i915/display/intel_display_reset.h
index 68312403904e..192ff8065a79 100644
--- a/drivers/gpu/drm/i915/display/intel_display_reset.h
+++ b/drivers/gpu/drm/i915/display/intel_display_reset.h
@@ -10,7 +10,6 @@
 
 struct intel_display;
 
-bool intel_display_reset_supported(struct intel_display *display);
 bool intel_display_reset_needed_after_gpu_reset(struct intel_display *display);
 bool intel_display_reset_test(struct intel_display *display);
 void intel_display_reset_prepare(struct intel_display *display);
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 439635bf94dd..1122354239f9 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1424,8 +1424,7 @@ static void intel_gt_reset_global(struct intel_gt *gt,
 		bool reset_display;
 
 		need_display_reset =
-			intel_display_reset_supported(display) &&
-			intel_gt_gpu_reset_clobbers_display(gt) &&
+			intel_display_reset_needed_after_gpu_reset(display) &&
 			intel_has_gpu_reset(gt);
 
 		reset_display =
-- 
2.47.3


^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v2 3/7] drm/i915/display: use struct intel_atomic_state *state variable naming
  2026-08-27 12:34 [PATCH v2 0/7] drm/{i915, xe}/display: another stab at i915_fence_timeout() removal Jani Nikula
  2026-08-27 12:34 ` [PATCH v2 1/7] drm/i915/reset: move gpu_reset_clobbers_display platform property to display Jani Nikula
  2026-08-27 12:34 ` [PATCH v2 2/7] drm/i915/reset: make intel_display_reset_supported() static Jani Nikula
@ 2026-08-27 12:34 ` Jani Nikula
  2026-08-27 12:34 ` [PATCH v2 4/7] drm/i915/display: reduce indent in intel_atomic_commit_fence_wait() Jani Nikula
                   ` (7 subsequent siblings)
  10 siblings, 0 replies; 14+ messages in thread
From: Jani Nikula @ 2026-08-27 12:34 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: maarten.lankhorst, ville.syrjala, jani.nikula, Maarten Lankhorst

The struct intel_atomic_state * pointer variables and parameters are
named "state" everywhere. Follow suit in
intel_atomic_commit_fence_wait().

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 553c60d452dd..12916e313821 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7272,14 +7272,14 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
 	drm_WARN_ON(display->drm, update_pipes);
 }
 
-static void intel_atomic_commit_fence_wait(struct intel_atomic_state *intel_state)
+static void intel_atomic_commit_fence_wait(struct intel_atomic_state *state)
 {
 	struct drm_plane *plane;
 	struct drm_plane_state *new_plane_state;
 	long ret;
 	int i;
 
-	for_each_new_plane_in_state(&intel_state->base, plane, new_plane_state, i) {
+	for_each_new_plane_in_state(&state->base, plane, new_plane_state, i) {
 		if (new_plane_state->fence) {
 			ret = dma_fence_wait_timeout(new_plane_state->fence, false,
 						     i915_fence_timeout());
-- 
2.47.3


^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v2 4/7] drm/i915/display: reduce indent in intel_atomic_commit_fence_wait()
  2026-08-27 12:34 [PATCH v2 0/7] drm/{i915, xe}/display: another stab at i915_fence_timeout() removal Jani Nikula
                   ` (2 preceding siblings ...)
  2026-08-27 12:34 ` [PATCH v2 3/7] drm/i915/display: use struct intel_atomic_state *state variable naming Jani Nikula
@ 2026-08-27 12:34 ` Jani Nikula
  2026-08-27 12:34 ` [PATCH v2 5/7] drm/i915/display: debug log about fence wait timeouts and other errors Jani Nikula
                   ` (6 subsequent siblings)
  10 siblings, 0 replies; 14+ messages in thread
From: Jani Nikula @ 2026-08-27 12:34 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: maarten.lankhorst, ville.syrjala, jani.nikula, Maarten Lankhorst

Continue early in the loop for no fence in order to reduce indent.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

---

Tip: 'git show -w' for easy review
---
 drivers/gpu/drm/i915/display/intel_display.c | 17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 12916e313821..eed906a30749 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7280,15 +7280,16 @@ static void intel_atomic_commit_fence_wait(struct intel_atomic_state *state)
 	int i;
 
 	for_each_new_plane_in_state(&state->base, plane, new_plane_state, i) {
-		if (new_plane_state->fence) {
-			ret = dma_fence_wait_timeout(new_plane_state->fence, false,
-						     i915_fence_timeout());
-			if (ret <= 0)
-				break;
+		if (!new_plane_state->fence)
+			continue;
 
-			dma_fence_put(new_plane_state->fence);
-			new_plane_state->fence = NULL;
-		}
+		ret = dma_fence_wait_timeout(new_plane_state->fence, false,
+					     i915_fence_timeout());
+		if (ret <= 0)
+			break;
+
+		dma_fence_put(new_plane_state->fence);
+		new_plane_state->fence = NULL;
 	}
 }
 
-- 
2.47.3


^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v2 5/7] drm/i915/display: debug log about fence wait timeouts and other errors
  2026-08-27 12:34 [PATCH v2 0/7] drm/{i915, xe}/display: another stab at i915_fence_timeout() removal Jani Nikula
                   ` (3 preceding siblings ...)
  2026-08-27 12:34 ` [PATCH v2 4/7] drm/i915/display: reduce indent in intel_atomic_commit_fence_wait() Jani Nikula
@ 2026-08-27 12:34 ` Jani Nikula
  2026-08-27 12:34 ` [PATCH v2 6/7] drm/i915: only timeout on fence waits for display reset Jani Nikula
                   ` (5 subsequent siblings)
  10 siblings, 0 replies; 14+ messages in thread
From: Jani Nikula @ 2026-08-27 12:34 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: maarten.lankhorst, ville.syrjala, jani.nikula, Maarten Lankhorst

Currently there's no indication if fence wait timed out. Debug log about
timeouts and other errors.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index eed906a30749..aa5d41dac8a9 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7274,6 +7274,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
 
 static void intel_atomic_commit_fence_wait(struct intel_atomic_state *state)
 {
+	struct intel_display *display = to_intel_display(state);
 	struct drm_plane *plane;
 	struct drm_plane_state *new_plane_state;
 	long ret;
@@ -7285,8 +7286,13 @@ static void intel_atomic_commit_fence_wait(struct intel_atomic_state *state)
 
 		ret = dma_fence_wait_timeout(new_plane_state->fence, false,
 					     i915_fence_timeout());
-		if (ret <= 0)
+		if (!ret)
+			ret = -ETIMEDOUT;
+		if (ret < 0) {
+			drm_dbg_kms(display->drm, "[PLANE:%d:%s] fence wait failed (%pe)\n",
+				    plane->base.id, plane->name, ERR_PTR(ret));
 			break;
+		}
 
 		dma_fence_put(new_plane_state->fence);
 		new_plane_state->fence = NULL;
-- 
2.47.3


^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v2 6/7] drm/i915: only timeout on fence waits for display reset
  2026-08-27 12:34 [PATCH v2 0/7] drm/{i915, xe}/display: another stab at i915_fence_timeout() removal Jani Nikula
                   ` (4 preceding siblings ...)
  2026-08-27 12:34 ` [PATCH v2 5/7] drm/i915/display: debug log about fence wait timeouts and other errors Jani Nikula
@ 2026-08-27 12:34 ` Jani Nikula
  2026-08-27 12:49   ` sashiko-bot
  2026-08-29  8:51   ` Maarten Lankhorst
  2026-08-27 12:34 ` [PATCH v2 7/7] drm/i915/display: use fixed 10 second timeout for fence wait Jani Nikula
                   ` (4 subsequent siblings)
  10 siblings, 2 replies; 14+ messages in thread
From: Jani Nikula @ 2026-08-27 12:34 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: maarten.lankhorst, ville.syrjala, jani.nikula, Maarten Lankhorst

As written by Maarten: Not waiting on fences until they're signaled is
an existing issue in i915, and was added as a workaround for a deadlock
when GPU reset has to reset display as well on old platforms. This
requires a modeset to disable everything, which may hang since it could
wait on a fence that may only be signaled after GPU reset completes.

Limit the timeout on fence waits a) to platforms where GPU reset
clobbers display, and b) when we're running forced display reset tests.

This change only impacts i915, as xe has MAX_SCHEDULE_TIMEOUT in any
case.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Suggested-by: Maarten Lankhorst <maarten.lankhorst@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index aa5d41dac8a9..76ec9161aaa3 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -74,6 +74,7 @@
 #include "intel_display_driver.h"
 #include "intel_display_power.h"
 #include "intel_display_regs.h"
+#include "intel_display_reset.h"
 #include "intel_display_rpm.h"
 #include "intel_display_types.h"
 #include "intel_display_utils.h"
@@ -7277,15 +7278,20 @@ static void intel_atomic_commit_fence_wait(struct intel_atomic_state *state)
 	struct intel_display *display = to_intel_display(state);
 	struct drm_plane *plane;
 	struct drm_plane_state *new_plane_state;
-	long ret;
+	long timeout, ret;
 	int i;
 
+	if (intel_display_reset_needed_after_gpu_reset(display) ||
+	    intel_display_reset_test(display))
+		timeout = i915_fence_timeout();
+	else
+		timeout = MAX_SCHEDULE_TIMEOUT;
+
 	for_each_new_plane_in_state(&state->base, plane, new_plane_state, i) {
 		if (!new_plane_state->fence)
 			continue;
 
-		ret = dma_fence_wait_timeout(new_plane_state->fence, false,
-					     i915_fence_timeout());
+		ret = dma_fence_wait_timeout(new_plane_state->fence, false, timeout);
 		if (!ret)
 			ret = -ETIMEDOUT;
 		if (ret < 0) {
-- 
2.47.3


^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v2 7/7] drm/i915/display: use fixed 10 second timeout for fence wait
  2026-08-27 12:34 [PATCH v2 0/7] drm/{i915, xe}/display: another stab at i915_fence_timeout() removal Jani Nikula
                   ` (5 preceding siblings ...)
  2026-08-27 12:34 ` [PATCH v2 6/7] drm/i915: only timeout on fence waits for display reset Jani Nikula
@ 2026-08-27 12:34 ` Jani Nikula
  2026-08-27 12:41 ` ✗ CI.checkpatch: warning for drm/{i915, xe}/display: another stab at i915_fence_timeout() removal (rev2) Patchwork
                   ` (3 subsequent siblings)
  10 siblings, 0 replies; 14+ messages in thread
From: Jani Nikula @ 2026-08-27 12:34 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: maarten.lankhorst, ville.syrjala, jani.nikula, Maarten Lankhorst

i915 has a configurable fence wait timeout, defaulting to 10 seconds,
and xe uses MAX_SCHEDULE_TIMEOUT i.e. it has no timeout.

With the fence wait timeout now limited to a) platforms where GPU reset
clobbers display, and b) force testing display resets, let's unify the
timeouts across drivers. Use a fixed 10 second timeout for both drivers
instead of having them do different things. Ditch the now unused compat
header from xe.

For i915, this means no longer being able to configure the timeout. The
new fixed timeout is the same as the old default.

For xe, this means adding a timeout for forced display reset tests only
(as xe does not support platforms where GPU reset clobbers display).

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c     |  3 +--
 .../gpu/drm/xe/compat-i915-headers/i915_config.h | 16 ----------------
 2 files changed, 1 insertion(+), 18 deletions(-)
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_config.h

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 76ec9161aaa3..aa765d617702 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -50,7 +50,6 @@
 #include "g4x_dp.h"
 #include "g4x_hdmi.h"
 #include "hsw_ips.h"
-#include "i915_config.h"
 #include "i9xx_plane.h"
 #include "i9xx_plane_regs.h"
 #include "i9xx_wm.h"
@@ -7283,7 +7282,7 @@ static void intel_atomic_commit_fence_wait(struct intel_atomic_state *state)
 
 	if (intel_display_reset_needed_after_gpu_reset(display) ||
 	    intel_display_reset_test(display))
-		timeout = i915_fence_timeout();
+		timeout = 10 * HZ;
 	else
 		timeout = MAX_SCHEDULE_TIMEOUT;
 
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_config.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_config.h
deleted file mode 100644
index d4522203e2dd..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_config.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#ifndef __I915_CONFIG_H__
-#define __I915_CONFIG_H__
-
-#include <linux/sched.h>
-
-static inline unsigned long i915_fence_timeout(void)
-{
-	return MAX_SCHEDULE_TIMEOUT;
-}
-
-#endif /* __I915_CONFIG_H__ */
-- 
2.47.3


^ permalink raw reply related	[flat|nested] 14+ messages in thread

* ✗ CI.checkpatch: warning for drm/{i915, xe}/display: another stab at i915_fence_timeout() removal (rev2)
  2026-08-27 12:34 [PATCH v2 0/7] drm/{i915, xe}/display: another stab at i915_fence_timeout() removal Jani Nikula
                   ` (6 preceding siblings ...)
  2026-08-27 12:34 ` [PATCH v2 7/7] drm/i915/display: use fixed 10 second timeout for fence wait Jani Nikula
@ 2026-08-27 12:41 ` Patchwork
  2026-08-27 12:42 ` ✓ CI.KUnit: success " Patchwork
                   ` (2 subsequent siblings)
  10 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2026-08-27 12:41 UTC (permalink / raw)
  To: Jani Nikula; +Cc: intel-xe

== Series Details ==

Series: drm/{i915, xe}/display: another stab at i915_fence_timeout() removal (rev2)
URL   : https://patchwork.freedesktop.org/series/172457/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit a2e7f7aee274869355f897b9113ff9073cd94411
Author: Jani Nikula <jani.nikula@intel.com>
Date:   Thu Aug 27 15:34:57 2026 +0300

    drm/i915/display: use fixed 10 second timeout for fence wait
    
    i915 has a configurable fence wait timeout, defaulting to 10 seconds,
    and xe uses MAX_SCHEDULE_TIMEOUT i.e. it has no timeout.
    
    With the fence wait timeout now limited to a) platforms where GPU reset
    clobbers display, and b) force testing display resets, let's unify the
    timeouts across drivers. Use a fixed 10 second timeout for both drivers
    instead of having them do different things. Ditch the now unused compat
    header from xe.
    
    For i915, this means no longer being able to configure the timeout. The
    new fixed timeout is the same as the old default.
    
    For xe, this means adding a timeout for forced display reset tests only
    (as xe does not support platforms where GPU reset clobbers display).
    
    Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Cc: Maarten Lankhorst <maarten.lankhorst@intel.com>
    Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+ /mt/dim checkpatch c2f7f4803ab7055fa94f87bea53b90257d042c60 drm-intel
f616216514a3 drm/i915/reset: move gpu_reset_clobbers_display platform property to display
4222e0b06d63 drm/i915/reset: make intel_display_reset_supported() static
6efd4452a5e1 drm/i915/display: use struct intel_atomic_state *state variable naming
36844005e8e0 drm/i915/display: reduce indent in intel_atomic_commit_fence_wait()
dee60d432b05 drm/i915/display: debug log about fence wait timeouts and other errors
5431accb4fa4 drm/i915: only timeout on fence waits for display reset
a2e7f7aee274 drm/i915/display: use fixed 10 second timeout for fence wait
-:50: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#50: 
deleted file mode 100644

total: 0 errors, 1 warnings, 0 checks, 15 lines checked



^ permalink raw reply	[flat|nested] 14+ messages in thread

* ✓ CI.KUnit: success for drm/{i915, xe}/display: another stab at i915_fence_timeout() removal (rev2)
  2026-08-27 12:34 [PATCH v2 0/7] drm/{i915, xe}/display: another stab at i915_fence_timeout() removal Jani Nikula
                   ` (7 preceding siblings ...)
  2026-08-27 12:41 ` ✗ CI.checkpatch: warning for drm/{i915, xe}/display: another stab at i915_fence_timeout() removal (rev2) Patchwork
@ 2026-08-27 12:42 ` Patchwork
  2026-08-27 13:42 ` ✓ Xe.CI.BAT: " Patchwork
  2026-08-27 15:02 ` ✓ Xe.CI.FULL: " Patchwork
  10 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2026-08-27 12:42 UTC (permalink / raw)
  To: Jani Nikula; +Cc: intel-xe

== Series Details ==

Series: drm/{i915, xe}/display: another stab at i915_fence_timeout() removal (rev2)
URL   : https://patchwork.freedesktop.org/series/172457/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[12:41:15] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:41:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:41:52] Starting KUnit Kernel (1/1)...
[12:41:52] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:41:52] ================== guc_buf (11 subtests) ===================
[12:41:52] [PASSED] test_smallest
[12:41:52] [PASSED] test_largest
[12:41:52] [PASSED] test_granular
[12:41:52] [PASSED] test_unique
[12:41:52] [PASSED] test_overlap
[12:41:52] [PASSED] test_reusable
[12:41:52] [PASSED] test_too_big
[12:41:52] [PASSED] test_flush
[12:41:52] [PASSED] test_lookup
[12:41:52] [PASSED] test_data
[12:41:52] [PASSED] test_class
[12:41:52] ===================== [PASSED] guc_buf =====================
[12:41:52] =================== guc_dbm (7 subtests) ===================
[12:41:52] [PASSED] test_empty
[12:41:52] [PASSED] test_default
[12:41:52] ======================== test_size  ========================
[12:41:52] [PASSED] 4
[12:41:52] [PASSED] 8
[12:41:52] [PASSED] 32
[12:41:52] [PASSED] 256
[12:41:52] ==================== [PASSED] test_size ====================
[12:41:52] ======================= test_reuse  ========================
[12:41:52] [PASSED] 4
[12:41:52] [PASSED] 8
[12:41:52] [PASSED] 32
[12:41:52] [PASSED] 256
[12:41:52] =================== [PASSED] test_reuse ====================
[12:41:52] =================== test_range_overlap  ====================
[12:41:52] [PASSED] 4
[12:41:52] [PASSED] 8
[12:41:52] [PASSED] 32
[12:41:52] [PASSED] 256
[12:41:52] =============== [PASSED] test_range_overlap ================
[12:41:52] =================== test_range_compact  ====================
[12:41:52] [PASSED] 4
[12:41:52] [PASSED] 8
[12:41:52] [PASSED] 32
[12:41:52] [PASSED] 256
[12:41:52] =============== [PASSED] test_range_compact ================
[12:41:52] ==================== test_range_spare  =====================
[12:41:52] [PASSED] 4
[12:41:52] [PASSED] 8
[12:41:52] [PASSED] 32
[12:41:52] [PASSED] 256
[12:41:52] ================ [PASSED] test_range_spare =================
[12:41:52] ===================== [PASSED] guc_dbm =====================
[12:41:52] =================== guc_idm (6 subtests) ===================
[12:41:52] [PASSED] bad_init
[12:41:52] [PASSED] no_init
[12:41:52] [PASSED] init_fini
[12:41:52] [PASSED] check_used
[12:41:52] [PASSED] check_quota
[12:41:52] [PASSED] check_all
[12:41:52] ===================== [PASSED] guc_idm =====================
[12:41:52] =============== guc_klv_helpers (9 subtests) ===============
[12:41:52] [PASSED] test_count
[12:41:52] [PASSED] test_encode_u32
[12:41:52] [PASSED] test_encode_u64
[12:41:52] [PASSED] test_encode_string
[12:41:52] [PASSED] test_encode_object_raw
[12:41:52] [PASSED] test_encode_object_klv
[12:41:52] [PASSED] test_encode_object_nested
[12:41:52] [PASSED] test_encode_object_basic
[12:41:52] [PASSED] test_print
[12:41:52] ================= [PASSED] guc_klv_helpers =================
[12:41:52] =================== xe_log (4 subtests) ====================
[12:41:52] [PASSED] demo_cper
[12:41:52] [PASSED] demo_dmesg
[12:41:52] ======================= test_dmesg  ========================
[12:41:52] [PASSED] test_fatal
[12:41:52] [PASSED] test_fatal_tile
[12:41:52] [PASSED] test_fatal_gt
[12:41:52] [PASSED] test_fatal_comp
[12:41:52] [PASSED] test_fatal_comp_tile
[12:41:52] [PASSED] test_fatal_comp_gt
[12:41:52] [PASSED] test_fatal_all
[12:41:52] [PASSED] test_recoverable
[12:41:52] [PASSED] test_recoverable_tile
[12:41:52] [PASSED] test_recoverable_gt
[12:41:52] [PASSED] test_recoverable_comp
[12:41:52] [PASSED] test_recoverable_comp_tile
[12:41:52] [PASSED] test_recoverable_comp_gt
[12:41:52] [PASSED] test_recoverable_all
[12:41:52] [PASSED] test_info
[12:41:52] [PASSED] test_info_tile
[12:41:52] [PASSED] test_info_gt
[12:41:52] [PASSED] test_info_err
[12:41:52] [PASSED] test_info_comp
[12:41:52] [PASSED] test_info_comp_tile
[12:41:52] [PASSED] test_info_comp_gt
[12:41:52] [PASSED] test_info_all
[12:41:52] [PASSED] test_hw_fatal
[12:41:52] [PASSED] test_hw_recoverable
[12:41:52] [PASSED] test_hw_corrected
[12:41:52] [PASSED] test_hw_informational
[12:41:52] =================== [PASSED] test_dmesg ====================
[12:41:52] ====================== test_invalid  =======================
[12:41:52] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[12:41:52] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[12:41:52] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[12:41:52] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[12:41:52] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[12:41:52] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[12:41:52] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[12:41:52] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[12:41:52] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[12:41:52] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[12:41:52] ================== [SKIPPED] test_invalid ==================
[12:41:52] ===================== [PASSED] xe_log ======================
[12:41:52] ================== no_relay (3 subtests) ===================
[12:41:52] [PASSED] xe_drops_guc2pf_if_not_ready
[12:41:52] [PASSED] xe_drops_guc2vf_if_not_ready
[12:41:52] [PASSED] xe_rejects_send_if_not_ready
[12:41:52] ==================== [PASSED] no_relay =====================
[12:41:52] ================== pf_relay (14 subtests) ==================
[12:41:52] [PASSED] pf_rejects_guc2pf_too_short
[12:41:52] [PASSED] pf_rejects_guc2pf_too_long
[12:41:52] [PASSED] pf_rejects_guc2pf_no_payload
[12:41:52] [PASSED] pf_fails_no_payload
[12:41:52] [PASSED] pf_fails_bad_origin
[12:41:52] [PASSED] pf_fails_bad_type
[12:41:52] [PASSED] pf_txn_reports_error
[12:41:52] [PASSED] pf_txn_sends_pf2guc
[12:41:52] [PASSED] pf_sends_pf2guc
[12:41:52] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:41:52] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:41:52] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:41:52] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:41:52] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:41:52] ==================== [PASSED] pf_relay =====================
[12:41:52] ================== vf_relay (3 subtests) ===================
[12:41:52] [PASSED] vf_rejects_guc2vf_too_short
[12:41:52] [PASSED] vf_rejects_guc2vf_too_long
[12:41:52] [PASSED] vf_rejects_guc2vf_no_payload
[12:41:52] ==================== [PASSED] vf_relay =====================
[12:41:52] ================ pf_gt_config (9 subtests) =================
[12:41:52] [PASSED] fair_contexts_1vf
[12:41:52] [PASSED] fair_doorbells_1vf
[12:41:52] [PASSED] fair_ggtt_1vf
[12:41:52] ====================== fair_vram_1vf  ======================
[12:41:52] [PASSED] 3.50 GiB
[12:41:52] [PASSED] 11.5 GiB
[12:41:52] [PASSED] 15.5 GiB
[12:41:52] [PASSED] 31.5 GiB
[12:41:52] [PASSED] 63.5 GiB
[12:41:52] [PASSED] 1.91 GiB
[12:41:52] ================== [PASSED] fair_vram_1vf ==================
[12:41:52] ================ fair_vram_1vf_admin_only  =================
[12:41:52] [PASSED] 3.50 GiB
[12:41:52] [PASSED] 11.5 GiB
[12:41:52] [PASSED] 15.5 GiB
[12:41:52] [PASSED] 31.5 GiB
[12:41:52] [PASSED] 63.5 GiB
[12:41:52] [PASSED] 1.91 GiB
[12:41:52] ============ [PASSED] fair_vram_1vf_admin_only =============
[12:41:52] ====================== fair_contexts  ======================
[12:41:52] [PASSED] 1 VF
[12:41:52] [PASSED] 2 VFs
[12:41:52] [PASSED] 3 VFs
[12:41:52] [PASSED] 4 VFs
[12:41:52] [PASSED] 5 VFs
[12:41:52] [PASSED] 6 VFs
[12:41:52] [PASSED] 7 VFs
[12:41:52] [PASSED] 8 VFs
[12:41:52] [PASSED] 9 VFs
[12:41:52] [PASSED] 10 VFs
[12:41:52] [PASSED] 11 VFs
[12:41:52] [PASSED] 12 VFs
[12:41:52] [PASSED] 13 VFs
[12:41:52] [PASSED] 14 VFs
[12:41:52] [PASSED] 15 VFs
[12:41:52] [PASSED] 16 VFs
[12:41:52] [PASSED] 17 VFs
[12:41:52] [PASSED] 18 VFs
[12:41:52] [PASSED] 19 VFs
[12:41:52] [PASSED] 20 VFs
[12:41:52] [PASSED] 21 VFs
[12:41:52] [PASSED] 22 VFs
[12:41:52] [PASSED] 23 VFs
[12:41:52] [PASSED] 24 VFs
[12:41:52] [PASSED] 25 VFs
[12:41:52] [PASSED] 26 VFs
[12:41:52] [PASSED] 27 VFs
[12:41:52] [PASSED] 28 VFs
[12:41:52] [PASSED] 29 VFs
[12:41:52] [PASSED] 30 VFs
[12:41:52] [PASSED] 31 VFs
[12:41:52] [PASSED] 32 VFs
[12:41:52] [PASSED] 33 VFs
[12:41:52] [PASSED] 34 VFs
[12:41:52] [PASSED] 35 VFs
[12:41:52] [PASSED] 36 VFs
[12:41:52] [PASSED] 37 VFs
[12:41:52] [PASSED] 38 VFs
[12:41:52] [PASSED] 39 VFs
[12:41:52] [PASSED] 40 VFs
[12:41:52] [PASSED] 41 VFs
[12:41:52] [PASSED] 42 VFs
[12:41:52] [PASSED] 43 VFs
[12:41:52] [PASSED] 44 VFs
[12:41:52] [PASSED] 45 VFs
[12:41:52] [PASSED] 46 VFs
[12:41:52] [PASSED] 47 VFs
[12:41:52] [PASSED] 48 VFs
[12:41:52] [PASSED] 49 VFs
[12:41:52] [PASSED] 50 VFs
[12:41:52] [PASSED] 51 VFs
[12:41:52] [PASSED] 52 VFs
[12:41:52] [PASSED] 53 VFs
[12:41:52] [PASSED] 54 VFs
[12:41:52] [PASSED] 55 VFs
[12:41:52] [PASSED] 56 VFs
[12:41:52] [PASSED] 57 VFs
[12:41:52] [PASSED] 58 VFs
[12:41:52] [PASSED] 59 VFs
[12:41:52] [PASSED] 60 VFs
[12:41:52] [PASSED] 61 VFs
[12:41:52] [PASSED] 62 VFs
[12:41:52] [PASSED] 63 VFs
[12:41:52] ================== [PASSED] fair_contexts ==================
[12:41:52] ===================== fair_doorbells  ======================
[12:41:52] [PASSED] 1 VF
[12:41:52] [PASSED] 2 VFs
[12:41:52] [PASSED] 3 VFs
[12:41:52] [PASSED] 4 VFs
[12:41:52] [PASSED] 5 VFs
[12:41:52] [PASSED] 6 VFs
[12:41:52] [PASSED] 7 VFs
[12:41:52] [PASSED] 8 VFs
[12:41:52] [PASSED] 9 VFs
[12:41:52] [PASSED] 10 VFs
[12:41:52] [PASSED] 11 VFs
[12:41:52] [PASSED] 12 VFs
[12:41:52] [PASSED] 13 VFs
[12:41:52] [PASSED] 14 VFs
[12:41:52] [PASSED] 15 VFs
[12:41:52] [PASSED] 16 VFs
[12:41:52] [PASSED] 17 VFs
[12:41:52] [PASSED] 18 VFs
[12:41:52] [PASSED] 19 VFs
[12:41:52] [PASSED] 20 VFs
[12:41:52] [PASSED] 21 VFs
[12:41:52] [PASSED] 22 VFs
[12:41:52] [PASSED] 23 VFs
[12:41:52] [PASSED] 24 VFs
[12:41:52] [PASSED] 25 VFs
[12:41:52] [PASSED] 26 VFs
[12:41:52] [PASSED] 27 VFs
[12:41:52] [PASSED] 28 VFs
[12:41:52] [PASSED] 29 VFs
[12:41:52] [PASSED] 30 VFs
[12:41:52] [PASSED] 31 VFs
[12:41:52] [PASSED] 32 VFs
[12:41:52] [PASSED] 33 VFs
[12:41:52] [PASSED] 34 VFs
[12:41:52] [PASSED] 35 VFs
[12:41:52] [PASSED] 36 VFs
[12:41:52] [PASSED] 37 VFs
[12:41:52] [PASSED] 38 VFs
[12:41:52] [PASSED] 39 VFs
[12:41:52] [PASSED] 40 VFs
[12:41:52] [PASSED] 41 VFs
[12:41:52] [PASSED] 42 VFs
[12:41:52] [PASSED] 43 VFs
[12:41:52] [PASSED] 44 VFs
[12:41:52] [PASSED] 45 VFs
[12:41:52] [PASSED] 46 VFs
[12:41:52] [PASSED] 47 VFs
[12:41:52] [PASSED] 48 VFs
[12:41:52] [PASSED] 49 VFs
[12:41:52] [PASSED] 50 VFs
[12:41:52] [PASSED] 51 VFs
[12:41:52] [PASSED] 52 VFs
[12:41:52] [PASSED] 53 VFs
[12:41:52] [PASSED] 54 VFs
[12:41:52] [PASSED] 55 VFs
[12:41:52] [PASSED] 56 VFs
[12:41:52] [PASSED] 57 VFs
[12:41:52] [PASSED] 58 VFs
[12:41:52] [PASSED] 59 VFs
[12:41:52] [PASSED] 60 VFs
[12:41:52] [PASSED] 61 VFs
[12:41:52] [PASSED] 62 VFs
[12:41:52] [PASSED] 63 VFs
[12:41:52] ================= [PASSED] fair_doorbells ==================
[12:41:52] ======================== fair_ggtt  ========================
[12:41:52] [PASSED] 1 VF
[12:41:52] [PASSED] 2 VFs
[12:41:52] [PASSED] 3 VFs
[12:41:52] [PASSED] 4 VFs
[12:41:52] [PASSED] 5 VFs
[12:41:52] [PASSED] 6 VFs
[12:41:52] [PASSED] 7 VFs
[12:41:52] [PASSED] 8 VFs
[12:41:52] [PASSED] 9 VFs
[12:41:52] [PASSED] 10 VFs
[12:41:52] [PASSED] 11 VFs
[12:41:52] [PASSED] 12 VFs
[12:41:52] [PASSED] 13 VFs
[12:41:52] [PASSED] 14 VFs
[12:41:52] [PASSED] 15 VFs
[12:41:52] [PASSED] 16 VFs
[12:41:52] [PASSED] 17 VFs
[12:41:52] [PASSED] 18 VFs
[12:41:52] [PASSED] 19 VFs
[12:41:52] [PASSED] 20 VFs
[12:41:52] [PASSED] 21 VFs
[12:41:52] [PASSED] 22 VFs
[12:41:52] [PASSED] 23 VFs
[12:41:52] [PASSED] 24 VFs
[12:41:52] [PASSED] 25 VFs
[12:41:52] [PASSED] 26 VFs
[12:41:52] [PASSED] 27 VFs
[12:41:52] [PASSED] 28 VFs
[12:41:52] [PASSED] 29 VFs
[12:41:52] [PASSED] 30 VFs
[12:41:52] [PASSED] 31 VFs
[12:41:52] [PASSED] 32 VFs
[12:41:52] [PASSED] 33 VFs
[12:41:52] [PASSED] 34 VFs
[12:41:52] [PASSED] 35 VFs
[12:41:52] [PASSED] 36 VFs
[12:41:52] [PASSED] 37 VFs
[12:41:52] [PASSED] 38 VFs
[12:41:52] [PASSED] 39 VFs
[12:41:52] [PASSED] 40 VFs
[12:41:52] [PASSED] 41 VFs
[12:41:52] [PASSED] 42 VFs
[12:41:52] [PASSED] 43 VFs
[12:41:52] [PASSED] 44 VFs
[12:41:52] [PASSED] 45 VFs
[12:41:52] [PASSED] 46 VFs
[12:41:52] [PASSED] 47 VFs
[12:41:52] [PASSED] 48 VFs
[12:41:52] [PASSED] 49 VFs
[12:41:52] [PASSED] 50 VFs
[12:41:52] [PASSED] 51 VFs
[12:41:52] [PASSED] 52 VFs
[12:41:52] [PASSED] 53 VFs
[12:41:52] [PASSED] 54 VFs
[12:41:52] [PASSED] 55 VFs
[12:41:52] [PASSED] 56 VFs
[12:41:52] [PASSED] 57 VFs
[12:41:52] [PASSED] 58 VFs
[12:41:52] [PASSED] 59 VFs
[12:41:52] [PASSED] 60 VFs
[12:41:52] [PASSED] 61 VFs
[12:41:52] [PASSED] 62 VFs
[12:41:52] [PASSED] 63 VFs
[12:41:52] ==================== [PASSED] fair_ggtt ====================
[12:41:52] ======================== fair_vram  ========================
[12:41:52] [PASSED] 1 VF
[12:41:52] [PASSED] 2 VFs
[12:41:52] [PASSED] 3 VFs
[12:41:52] [PASSED] 4 VFs
[12:41:52] [PASSED] 5 VFs
[12:41:52] [PASSED] 6 VFs
[12:41:52] [PASSED] 7 VFs
[12:41:52] [PASSED] 8 VFs
[12:41:52] [PASSED] 9 VFs
[12:41:52] [PASSED] 10 VFs
[12:41:52] [PASSED] 11 VFs
[12:41:52] [PASSED] 12 VFs
[12:41:52] [PASSED] 13 VFs
[12:41:52] [PASSED] 14 VFs
[12:41:52] [PASSED] 15 VFs
[12:41:52] [PASSED] 16 VFs
[12:41:52] [PASSED] 17 VFs
[12:41:52] [PASSED] 18 VFs
[12:41:52] [PASSED] 19 VFs
[12:41:52] [PASSED] 20 VFs
[12:41:52] [PASSED] 21 VFs
[12:41:52] [PASSED] 22 VFs
[12:41:52] [PASSED] 23 VFs
[12:41:52] [PASSED] 24 VFs
[12:41:52] [PASSED] 25 VFs
[12:41:52] [PASSED] 26 VFs
[12:41:52] [PASSED] 27 VFs
[12:41:52] [PASSED] 28 VFs
[12:41:52] [PASSED] 29 VFs
[12:41:52] [PASSED] 30 VFs
[12:41:52] [PASSED] 31 VFs
[12:41:52] [PASSED] 32 VFs
[12:41:52] [PASSED] 33 VFs
[12:41:52] [PASSED] 34 VFs
[12:41:52] [PASSED] 35 VFs
[12:41:52] [PASSED] 36 VFs
[12:41:52] [PASSED] 37 VFs
[12:41:52] [PASSED] 38 VFs
[12:41:52] [PASSED] 39 VFs
[12:41:52] [PASSED] 40 VFs
[12:41:52] [PASSED] 41 VFs
[12:41:52] [PASSED] 42 VFs
[12:41:52] [PASSED] 43 VFs
[12:41:52] [PASSED] 44 VFs
[12:41:52] [PASSED] 45 VFs
[12:41:52] [PASSED] 46 VFs
[12:41:52] [PASSED] 47 VFs
[12:41:52] [PASSED] 48 VFs
[12:41:52] [PASSED] 49 VFs
[12:41:52] [PASSED] 50 VFs
[12:41:52] [PASSED] 51 VFs
[12:41:52] [PASSED] 52 VFs
[12:41:52] [PASSED] 53 VFs
[12:41:52] [PASSED] 54 VFs
[12:41:52] [PASSED] 55 VFs
[12:41:52] [PASSED] 56 VFs
[12:41:52] [PASSED] 57 VFs
[12:41:52] [PASSED] 58 VFs
[12:41:52] [PASSED] 59 VFs
[12:41:52] [PASSED] 60 VFs
[12:41:52] [PASSED] 61 VFs
[12:41:52] [PASSED] 62 VFs
[12:41:52] [PASSED] 63 VFs
[12:41:52] ==================== [PASSED] fair_vram ====================
[12:41:52] ================== [PASSED] pf_gt_config ===================
[12:41:52] ===================== lmtt (1 subtest) =====================
[12:41:52] ======================== test_ops  =========================
[12:41:52] [PASSED] 2-level
[12:41:52] [PASSED] multi-level
[12:41:52] ==================== [PASSED] test_ops =====================
[12:41:52] ====================== [PASSED] lmtt =======================
[12:41:52] ================= sriov_packet (1 subtest) =================
[12:41:52] [PASSED] test_descriptor_init
[12:41:52] ================== [PASSED] sriov_packet ===================
[12:41:52] ================= pf_service (11 subtests) =================
[12:41:52] [PASSED] pf_negotiate_any
[12:41:52] [PASSED] pf_negotiate_base_match
[12:41:52] [PASSED] pf_negotiate_base_newer
[12:41:52] [PASSED] pf_negotiate_base_next
[12:41:52] [SKIPPED] pf_negotiate_base_older (no older minor)
[12:41:52] [PASSED] pf_negotiate_base_prev
[12:41:52] [PASSED] pf_negotiate_latest_match
[12:41:52] [PASSED] pf_negotiate_latest_newer
[12:41:52] [PASSED] pf_negotiate_latest_next
[12:41:52] [SKIPPED] pf_negotiate_latest_older (no older minor)
[12:41:52] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[12:41:52] =================== [PASSED] pf_service ====================
[12:41:52] ================= xe_guc_g2g (2 subtests) ==================
[12:41:52] ============== xe_live_guc_g2g_kunit_default  ==============
[12:41:52] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[12:41:52] ============== xe_live_guc_g2g_kunit_allmem  ===============
[12:41:52] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[12:41:52] =================== [SKIPPED] xe_guc_g2g ===================
[12:41:52] =================== xe_mocs (2 subtests) ===================
[12:41:52] ================ xe_live_mocs_kernel_kunit  ================
[12:41:52] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[12:41:52] ================ xe_live_mocs_reset_kunit  =================
[12:41:52] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[12:41:52] ==================== [SKIPPED] xe_mocs =====================
[12:41:52] ================= xe_migrate (2 subtests) ==================
[12:41:52] ================= xe_migrate_sanity_kunit  =================
[12:41:52] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[12:41:52] ================== xe_validate_ccs_kunit  ==================
[12:41:52] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[12:41:52] =================== [SKIPPED] xe_migrate ===================
[12:41:52] ================== xe_dma_buf (1 subtest) ==================
[12:41:52] ==================== xe_dma_buf_kunit  =====================
[12:41:52] ================ [SKIPPED] xe_dma_buf_kunit ================
[12:41:52] =================== [SKIPPED] xe_dma_buf ===================
[12:41:52] ================= xe_bo_shrink (1 subtest) =================
[12:41:52] =================== xe_bo_shrink_kunit  ====================
[12:41:52] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[12:41:52] ================== [SKIPPED] xe_bo_shrink ==================
[12:41:52] ==================== xe_bo (2 subtests) ====================
[12:41:52] ================== xe_ccs_migrate_kunit  ===================
[12:41:52] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[12:41:52] ==================== xe_bo_evict_kunit  ====================
[12:41:52] =============== [SKIPPED] xe_bo_evict_kunit ================
[12:41:52] ===================== [SKIPPED] xe_bo ======================
[12:41:52] =================== xe_any (9 subtests) ====================
[12:41:52] [PASSED] test_to_xe
[12:41:52] [PASSED] test_to_dev
[12:41:52] [PASSED] test_to_pdev
[12:41:52] [PASSED] test_to_drm
[12:41:52] [PASSED] test_if_pdev
[12:41:52] [PASSED] test_if_xe
[12:41:52] [PASSED] test_if_tile
[12:41:52] [PASSED] test_if_gt
[12:41:52] [PASSED] test_to_id
[12:41:52] ===================== [PASSED] xe_any ======================
[12:41:52] ==================== args (13 subtests) ====================
[12:41:52] [PASSED] count_args_test
[12:41:52] [PASSED] call_args_example
[12:41:52] [PASSED] call_args_test
[12:41:52] [PASSED] drop_first_arg_example
[12:41:52] [PASSED] drop_first_arg_test
[12:41:52] [PASSED] first_arg_example
[12:41:52] [PASSED] first_arg_test
[12:41:52] [PASSED] last_arg_example
[12:41:52] [PASSED] last_arg_test
[12:41:52] [PASSED] pick_arg_example
[12:41:52] [PASSED] if_args_example
[12:41:52] [PASSED] if_args_test
[12:41:52] [PASSED] sep_comma_example
[12:41:52] ====================== [PASSED] args =======================
[12:41:52] =================== xe_pci (3 subtests) ====================
[12:41:52] ==================== check_graphics_ip  ====================
[12:41:52] [PASSED] 12.00 Xe_LP
[12:41:52] [PASSED] 12.10 Xe_LP+
[12:41:52] [PASSED] 12.55 Xe_HPG
[12:41:52] [PASSED] 12.60 Xe_HPC
[12:41:52] [PASSED] 12.70 Xe_LPG
[12:41:52] [PASSED] 12.71 Xe_LPG
[12:41:52] [PASSED] 12.74 Xe_LPG+
[12:41:52] [PASSED] 20.01 Xe2_HPG
[12:41:52] [PASSED] 20.02 Xe2_HPG
[12:41:52] [PASSED] 20.04 Xe2_LPG
[12:41:52] [PASSED] 30.00 Xe3_LPG
[12:41:52] [PASSED] 30.01 Xe3_LPG
[12:41:52] [PASSED] 30.03 Xe3_LPG
[12:41:52] [PASSED] 30.04 Xe3_LPG
[12:41:52] [PASSED] 30.05 Xe3_LPG
[12:41:52] [PASSED] 35.10 Xe3p_LPG
[12:41:52] [PASSED] 35.11 Xe3p_XPC
[12:41:52] ================ [PASSED] check_graphics_ip ================
[12:41:52] ===================== check_media_ip  ======================
[12:41:52] [PASSED] 12.00 Xe_M
[12:41:52] [PASSED] 12.55 Xe_HPM
[12:41:52] [PASSED] 13.00 Xe_LPM+
[12:41:52] [PASSED] 13.01 Xe2_HPM
[12:41:52] [PASSED] 20.00 Xe2_LPM
[12:41:52] [PASSED] 30.00 Xe3_LPM
[12:41:52] [PASSED] 30.02 Xe3_LPM
[12:41:52] [PASSED] 35.00 Xe3p_LPM
[12:41:52] [PASSED] 35.03 Xe3p_HPM
[12:41:52] ================= [PASSED] check_media_ip ==================
[12:41:52] =================== check_platform_desc  ===================
[12:41:52] [PASSED] 0x9A60 (TIGERLAKE)
[12:41:52] [PASSED] 0x9A68 (TIGERLAKE)
[12:41:52] [PASSED] 0x9A70 (TIGERLAKE)
[12:41:52] [PASSED] 0x9A40 (TIGERLAKE)
[12:41:52] [PASSED] 0x9A49 (TIGERLAKE)
[12:41:52] [PASSED] 0x9A59 (TIGERLAKE)
[12:41:52] [PASSED] 0x9A78 (TIGERLAKE)
[12:41:52] [PASSED] 0x9AC0 (TIGERLAKE)
[12:41:52] [PASSED] 0x9AC9 (TIGERLAKE)
[12:41:52] [PASSED] 0x9AD9 (TIGERLAKE)
[12:41:52] [PASSED] 0x9AF8 (TIGERLAKE)
[12:41:52] [PASSED] 0x4C80 (ROCKETLAKE)
[12:41:52] [PASSED] 0x4C8A (ROCKETLAKE)
[12:41:52] [PASSED] 0x4C8B (ROCKETLAKE)
[12:41:52] [PASSED] 0x4C8C (ROCKETLAKE)
[12:41:52] [PASSED] 0x4C90 (ROCKETLAKE)
[12:41:52] [PASSED] 0x4C9A (ROCKETLAKE)
[12:41:52] [PASSED] 0x4680 (ALDERLAKE_S)
[12:41:52] [PASSED] 0x4682 (ALDERLAKE_S)
[12:41:52] [PASSED] 0x4688 (ALDERLAKE_S)
[12:41:52] [PASSED] 0x468A (ALDERLAKE_S)
[12:41:52] [PASSED] 0x468B (ALDERLAKE_S)
[12:41:52] [PASSED] 0x4690 (ALDERLAKE_S)
[12:41:52] [PASSED] 0x4692 (ALDERLAKE_S)
[12:41:52] [PASSED] 0x4693 (ALDERLAKE_S)
[12:41:52] [PASSED] 0x46A0 (ALDERLAKE_P)
[12:41:52] [PASSED] 0x46A1 (ALDERLAKE_P)
[12:41:52] [PASSED] 0x46A2 (ALDERLAKE_P)
[12:41:52] [PASSED] 0x46A3 (ALDERLAKE_P)
[12:41:52] [PASSED] 0x46A6 (ALDERLAKE_P)
[12:41:52] [PASSED] 0x46A8 (ALDERLAKE_P)
[12:41:52] [PASSED] 0x46AA (ALDERLAKE_P)
[12:41:52] [PASSED] 0x462A (ALDERLAKE_P)
[12:41:52] [PASSED] 0x4626 (ALDERLAKE_P)
[12:41:52] [PASSED] 0x4628 (ALDERLAKE_P)
[12:41:52] [PASSED] 0x46B0 (ALDERLAKE_P)
[12:41:52] [PASSED] 0x46B1 (ALDERLAKE_P)
[12:41:52] [PASSED] 0x46B2 (ALDERLAKE_P)
[12:41:52] [PASSED] 0x46B3 (ALDERLAKE_P)
[12:41:52] [PASSED] 0x46C0 (ALDERLAKE_P)
[12:41:52] [PASSED] 0x46C1 (ALDERLAKE_P)
[12:41:52] [PASSED] 0x46C2 (ALDERLAKE_P)
[12:41:52] [PASSED] 0x46C3 (ALDERLAKE_P)
[12:41:52] [PASSED] 0x46D0 (ALDERLAKE_N)
[12:41:52] [PASSED] 0x46D1 (ALDERLAKE_N)
[12:41:52] [PASSED] 0x46D2 (ALDERLAKE_N)
[12:41:52] [PASSED] 0x46D3 (ALDERLAKE_N)
[12:41:52] [PASSED] 0x46D4 (ALDERLAKE_N)
[12:41:52] [PASSED] 0xA721 (ALDERLAKE_P)
[12:41:52] [PASSED] 0xA7A1 (ALDERLAKE_P)
[12:41:52] [PASSED] 0xA7A9 (ALDERLAKE_P)
[12:41:52] [PASSED] 0xA7AC (ALDERLAKE_P)
[12:41:52] [PASSED] 0xA7AD (ALDERLAKE_P)
[12:41:52] [PASSED] 0xA720 (ALDERLAKE_P)
[12:41:52] [PASSED] 0xA7A0 (ALDERLAKE_P)
[12:41:52] [PASSED] 0xA7A8 (ALDERLAKE_P)
[12:41:52] [PASSED] 0xA7AA (ALDERLAKE_P)
[12:41:52] [PASSED] 0xA7AB (ALDERLAKE_P)
[12:41:52] [PASSED] 0xA780 (ALDERLAKE_S)
[12:41:52] [PASSED] 0xA781 (ALDERLAKE_S)
[12:41:52] [PASSED] 0xA782 (ALDERLAKE_S)
[12:41:52] [PASSED] 0xA783 (ALDERLAKE_S)
[12:41:52] [PASSED] 0xA788 (ALDERLAKE_S)
[12:41:52] [PASSED] 0xA789 (ALDERLAKE_S)
[12:41:52] [PASSED] 0xA78A (ALDERLAKE_S)
[12:41:52] [PASSED] 0xA78B (ALDERLAKE_S)
[12:41:52] [PASSED] 0x4905 (DG1)
[12:41:52] [PASSED] 0x4906 (DG1)
[12:41:52] [PASSED] 0x4907 (DG1)
[12:41:52] [PASSED] 0x4908 (DG1)
[12:41:52] [PASSED] 0x4909 (DG1)
[12:41:52] [PASSED] 0x56C0 (DG2)
[12:41:52] [PASSED] 0x56C2 (DG2)
[12:41:52] [PASSED] 0x56C1 (DG2)
[12:41:52] [PASSED] 0x7D51 (METEORLAKE)
[12:41:52] [PASSED] 0x7DD1 (METEORLAKE)
[12:41:52] [PASSED] 0x7D41 (METEORLAKE)
[12:41:52] [PASSED] 0x7D67 (METEORLAKE)
[12:41:52] [PASSED] 0xB640 (METEORLAKE)
[12:41:52] [PASSED] 0x56A0 (DG2)
[12:41:52] [PASSED] 0x56A1 (DG2)
[12:41:52] [PASSED] 0x56A2 (DG2)
[12:41:52] [PASSED] 0x56BE (DG2)
[12:41:52] [PASSED] 0x56BF (DG2)
[12:41:52] [PASSED] 0x5690 (DG2)
[12:41:52] [PASSED] 0x5691 (DG2)
[12:41:52] [PASSED] 0x5692 (DG2)
[12:41:52] [PASSED] 0x56A5 (DG2)
[12:41:52] [PASSED] 0x56A6 (DG2)
[12:41:52] [PASSED] 0x56B0 (DG2)
[12:41:52] [PASSED] 0x56B1 (DG2)
[12:41:52] [PASSED] 0x56BA (DG2)
[12:41:52] [PASSED] 0x56BB (DG2)
[12:41:52] [PASSED] 0x56BC (DG2)
[12:41:52] [PASSED] 0x56BD (DG2)
[12:41:52] [PASSED] 0x5693 (DG2)
[12:41:52] [PASSED] 0x5694 (DG2)
[12:41:52] [PASSED] 0x5695 (DG2)
[12:41:52] [PASSED] 0x56A3 (DG2)
[12:41:52] [PASSED] 0x56A4 (DG2)
[12:41:52] [PASSED] 0x56B2 (DG2)
[12:41:52] [PASSED] 0x56B3 (DG2)
[12:41:52] [PASSED] 0x5696 (DG2)
[12:41:52] [PASSED] 0x5697 (DG2)
[12:41:52] [PASSED] 0xB69 (PVC)
[12:41:52] [PASSED] 0xB6E (PVC)
[12:41:52] [PASSED] 0xBD4 (PVC)
[12:41:52] [PASSED] 0xBD5 (PVC)
[12:41:52] [PASSED] 0xBD6 (PVC)
[12:41:52] [PASSED] 0xBD7 (PVC)
[12:41:52] [PASSED] 0xBD8 (PVC)
[12:41:52] [PASSED] 0xBD9 (PVC)
[12:41:52] [PASSED] 0xBDA (PVC)
[12:41:52] [PASSED] 0xBDB (PVC)
[12:41:52] [PASSED] 0xBE0 (PVC)
[12:41:52] [PASSED] 0xBE1 (PVC)
[12:41:52] [PASSED] 0xBE5 (PVC)
[12:41:52] [PASSED] 0x7D40 (METEORLAKE)
[12:41:52] [PASSED] 0x7D45 (METEORLAKE)
[12:41:52] [PASSED] 0x7D55 (METEORLAKE)
[12:41:52] [PASSED] 0x7D60 (METEORLAKE)
[12:41:52] [PASSED] 0x7DD5 (METEORLAKE)
[12:41:52] [PASSED] 0x6420 (LUNARLAKE)
[12:41:52] [PASSED] 0x64A0 (LUNARLAKE)
[12:41:52] [PASSED] 0x64B0 (LUNARLAKE)
[12:41:52] [PASSED] 0xE202 (BATTLEMAGE)
[12:41:52] [PASSED] 0xE209 (BATTLEMAGE)
[12:41:52] [PASSED] 0xE20B (BATTLEMAGE)
[12:41:52] [PASSED] 0xE20C (BATTLEMAGE)
[12:41:52] [PASSED] 0xE20D (BATTLEMAGE)
[12:41:52] [PASSED] 0xE210 (BATTLEMAGE)
[12:41:52] [PASSED] 0xE211 (BATTLEMAGE)
[12:41:52] [PASSED] 0xE212 (BATTLEMAGE)
[12:41:52] [PASSED] 0xE216 (BATTLEMAGE)
[12:41:52] [PASSED] 0xE220 (BATTLEMAGE)
[12:41:52] [PASSED] 0xE221 (BATTLEMAGE)
[12:41:52] [PASSED] 0xE222 (BATTLEMAGE)
[12:41:52] [PASSED] 0xE223 (BATTLEMAGE)
[12:41:52] [PASSED] 0xB080 (PANTHERLAKE)
[12:41:52] [PASSED] 0xB081 (PANTHERLAKE)
[12:41:52] [PASSED] 0xB082 (PANTHERLAKE)
[12:41:52] [PASSED] 0xB083 (PANTHERLAKE)
[12:41:52] [PASSED] 0xB084 (PANTHERLAKE)
[12:41:52] [PASSED] 0xB085 (PANTHERLAKE)
[12:41:52] [PASSED] 0xB086 (PANTHERLAKE)
[12:41:52] [PASSED] 0xB087 (PANTHERLAKE)
[12:41:52] [PASSED] 0xB08F (PANTHERLAKE)
[12:41:52] [PASSED] 0xB090 (PANTHERLAKE)
[12:41:52] [PASSED] 0xB0A0 (PANTHERLAKE)
[12:41:52] [PASSED] 0xB0B0 (PANTHERLAKE)
[12:41:52] [PASSED] 0xFD80 (PANTHERLAKE)
[12:41:52] [PASSED] 0xFD81 (PANTHERLAKE)
[12:41:52] [PASSED] 0xD740 (NOVALAKE_S)
[12:41:52] [PASSED] 0xD741 (NOVALAKE_S)
[12:41:52] [PASSED] 0xD742 (NOVALAKE_S)
[12:41:52] [PASSED] 0xD743 (NOVALAKE_S)
[12:41:52] [PASSED] 0xD745 (NOVALAKE_S)
[12:41:52] [PASSED] 0xD74A (NOVALAKE_S)
[12:41:52] [PASSED] 0xD74B (NOVALAKE_S)
[12:41:52] [PASSED] 0x674C (CRESCENTISLAND)
[12:41:52] [PASSED] 0x674D (CRESCENTISLAND)
[12:41:52] [PASSED] 0x674E (CRESCENTISLAND)
[12:41:52] [PASSED] 0x674F (CRESCENTISLAND)
[12:41:52] [PASSED] 0x6750 (CRESCENTISLAND)
[12:41:52] [PASSED] 0xD750 (NOVALAKE_P)
[12:41:52] [PASSED] 0xD751 (NOVALAKE_P)
[12:41:52] [PASSED] 0xD752 (NOVALAKE_P)
[12:41:52] [PASSED] 0xD753 (NOVALAKE_P)
[12:41:52] [PASSED] 0xD754 (NOVALAKE_P)
[12:41:52] [PASSED] 0xD755 (NOVALAKE_P)
[12:41:52] [PASSED] 0xD756 (NOVALAKE_P)
[12:41:52] [PASSED] 0xD757 (NOVALAKE_P)
[12:41:52] [PASSED] 0xD75F (NOVALAKE_P)
[12:41:52] =============== [PASSED] check_platform_desc ===============
[12:41:52] ===================== [PASSED] xe_pci ======================
[12:41:52] ============= xe_rtp_tables_test (5 subtests) ==============
[12:41:52] ================== xe_rtp_table_gt_test  ===================
[12:41:52] [PASSED] gt_was/14011060649
[12:41:52] [PASSED] gt_was/14011059788
[12:41:52] [PASSED] gt_was/14015795083
[12:41:52] [PASSED] gt_was/16021867713
[12:41:52] [PASSED] gt_was/14019449301
[12:41:52] [PASSED] gt_was/16028005424
[12:41:52] [PASSED] gt_was/14026578760
[12:41:52] [PASSED] gt_was/1409420604
[12:41:52] [PASSED] gt_was/1408615072
[12:41:52] [PASSED] gt_was/22010523718
[12:41:52] [PASSED] gt_was/14011006942
[12:41:52] [PASSED] gt_was/14014830051
[12:41:52] [PASSED] gt_was/18018781329
[12:41:52] [PASSED] gt_was/1509235366
[12:41:52] [PASSED] gt_was/18018781329
[12:41:52] [PASSED] gt_was/16016694945
[12:41:52] [PASSED] gt_was/14018575942
[12:41:52] [PASSED] gt_was/22016670082
[12:41:52] [PASSED] gt_was/22016670082
[12:41:52] [PASSED] gt_was/14017421178
[12:41:52] [PASSED] gt_was/16025250150
[12:41:52] [PASSED] gt_was/14021871409
[12:41:52] [PASSED] gt_was/16021865536
[12:41:52] [PASSED] gt_was/14021486841
[12:41:52] [PASSED] gt_was/14025160223
[12:41:52] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[12:41:52] [PASSED] gt_was/14025635424
[12:41:52] [PASSED] gt_was/16028005424
[12:41:52] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:41:52] ================== xe_rtp_table_gt_test  ===================
[12:41:52] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[12:41:52] [PASSED] gt_tunings/Tuning: 32B Access Enable
[12:41:52] [PASSED] gt_tunings/Tuning: L3 cache
[12:41:52] [PASSED] gt_tunings/Tuning: L3 cache - media
[12:41:52] [PASSED] gt_tunings/Tuning: Compression Overfetch
[12:41:52] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[12:41:52] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[12:41:52] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[12:41:52] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[12:41:52] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[12:41:52] [PASSED] gt_tunings/Tuning: Stateless compression control
[12:41:52] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[12:41:52] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[12:41:52] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[12:41:52] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[12:41:52] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:41:52] ================== xe_rtp_table_oob_test  ==================
[12:41:52] [PASSED] oob_was/1607983814
[12:41:52] [PASSED] oob_was/16010904313
[12:41:52] [PASSED] oob_was/18022495364
[12:41:52] [PASSED] oob_was/22012773006
[12:41:52] [PASSED] oob_was/14014475959
[12:41:52] [PASSED] oob_was/22011391025
[12:41:52] [PASSED] oob_was/22012727170
[12:41:52] [PASSED] oob_was/22012727685
[12:41:52] [PASSED] oob_was/22016596838
[12:41:52] [PASSED] oob_was/18020744125
[12:41:52] [PASSED] oob_was/1409600907
[12:41:52] [PASSED] oob_was/22014953428
[12:41:52] [PASSED] oob_was/16017236439
[12:41:52] [PASSED] oob_was/14019821291
[12:41:52] [PASSED] oob_was/14015076503
[12:41:52] [PASSED] oob_was/14018913170
[12:41:52] [PASSED] oob_was/14018094691
[12:41:52] [PASSED] oob_was/18024947630
[12:41:52] [PASSED] oob_was/16022287689
[12:41:52] [PASSED] oob_was/13011645652
[12:41:52] [PASSED] oob_was/14022293748
[12:41:52] [PASSED] oob_was/22019794406
[12:41:52] [PASSED] oob_was/22019338487
[12:41:52] [PASSED] oob_was/16023588340
[12:41:52] [PASSED] oob_was/14019789679
[12:41:52] [PASSED] oob_was/14022866841
[12:41:52] [PASSED] oob_was/16021333562
[12:41:52] [PASSED] oob_was/14016712196
[12:41:52] [PASSED] oob_was/14015568240
[12:41:52] [PASSED] oob_was/18013179988
[12:41:52] [PASSED] oob_was/1508761755
[12:41:52] [PASSED] oob_was/16023105232
[12:41:52] [PASSED] oob_was/16026508708
[12:41:52] [PASSED] oob_was/14020001231
[12:41:52] [PASSED] oob_was/16023683509
[12:41:52] [PASSED] oob_was/14025515070
[12:41:52] [PASSED] oob_was/15015404425_disable
[12:41:52] [PASSED] oob_was/16026007364
[12:41:52] [PASSED] oob_was/14020316580
[12:41:52] [PASSED] oob_was/14025883347
[12:41:52] [PASSED] oob_was/16029380221
[12:41:52] [PASSED] oob_was/22022079272
[12:41:52] [PASSED] oob_was/16029897822
[12:41:52] [PASSED] oob_was/14027054324
[12:41:52] ============== [PASSED] xe_rtp_table_oob_test ==============
[12:41:52] ================ xe_rtp_table_dev_oob_test  ================
[12:41:52] [PASSED] device_oob_was/22010954014
[12:41:52] [PASSED] device_oob_was/15015404425
[12:41:52] [PASSED] device_oob_was/22019338487_display
[12:41:52] [PASSED] device_oob_was/14022085890
[12:41:52] [PASSED] device_oob_was/14026539277
[12:41:52] [PASSED] device_oob_was/14026633728
[12:41:52] [PASSED] device_oob_was/14026746987
[12:41:52] [PASSED] device_oob_was/14026779378
[12:41:52] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[12:41:52] ========== xe_rtp_table_missing_upper_bound_test  ==========
[12:41:52] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[12:41:52] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[12:41:52] [PASSED] register_whitelist/1806527549
[12:41:52] [PASSED] register_whitelist/allow_read_ctx_timestamp
[12:41:52] [PASSED] register_whitelist/allow_read_queue_timestamp
[12:41:52] [PASSED] register_whitelist/16014440446
[12:41:52] [PASSED] register_whitelist/16017236439
[12:41:52] [PASSED] register_whitelist/16020183090
[12:41:52] [PASSED] register_whitelist/14024997852
[12:41:52] [PASSED] register_whitelist/14024997852
[12:41:52] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[12:41:52] =============== [PASSED] xe_rtp_tables_test ================
[12:41:52] =================== xe_rtp (3 subtests) ====================
[12:41:52] =================== xe_rtp_rules_tests  ====================
[12:41:52] [PASSED] no
[12:41:52] [PASSED] yes
[12:41:52] [PASSED] no-and-no
[12:41:52] [PASSED] no-and-yes
[12:41:52] [PASSED] yes-and-no
[12:41:52] [PASSED] yes-and-yes
[12:41:52] [PASSED] no-or-no
[12:41:52] [PASSED] no-or-yes
[12:41:52] [PASSED] yes-or-no
[12:41:52] [PASSED] yes-or-yes
[12:41:52] [PASSED] no-yes-or-yes-no
[12:41:52] [PASSED] no-yes-or-yes-yes
[12:41:52] [PASSED] yes-yes-or-no-yes
[12:41:52] [PASSED] yes-yes-or-yes-yes
[12:41:52] [PASSED] no-no-or-yes-or-no
[12:41:52] [PASSED] or
[12:41:52] [PASSED] or-yes
[12:41:52] [PASSED] or-no
[12:41:52] [PASSED] yes-or
[12:41:52] [PASSED] no-or
[12:41:52] [PASSED] no-or-or-yes
[12:41:52] [PASSED] yes-or-or-no
[12:41:52] [PASSED] no-or-or-no
[12:41:52] [PASSED] missing-context-engine-class
[12:41:52] [PASSED] missing-context-engine-class-or-yes
[12:41:52] [PASSED] missing-context-engine-class-or-or-yes
[12:41:52] =============== [PASSED] xe_rtp_rules_tests ================
[12:41:52] =============== xe_rtp_process_to_sr_tests  ================
[12:41:52] [PASSED] coalesce-same-reg
[12:41:52] [PASSED] coalesce-same-reg-literal-and-func
[12:41:52] [PASSED] no-match-no-add
[12:41:52] [PASSED] two-regs-two-entries
[12:41:52] [PASSED] clr-one-set-other
[12:41:52] [PASSED] set-field
[12:41:52] [PASSED] conflict-duplicate
[12:41:52] [PASSED] conflict-not-disjoint
[12:41:52] [PASSED] conflict-not-disjoint-literal-and-func
[12:41:52] [PASSED] conflict-reg-type
[12:41:52] [PASSED] bad-mcr-reg-forced-to-regular
[12:41:52] [PASSED] bad-regular-reg-forced-to-mcr
[12:41:52] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[12:41:52] ================== xe_rtp_process_tests  ===================
[12:41:52] [PASSED] active1
[12:41:52] [PASSED] active2
[12:41:52] [PASSED] active-inactive
[12:41:52] [PASSED] inactive-active
[12:41:52] [PASSED] inactive-active-inactive
[12:41:52] [PASSED] inactive-inactive-inactive
[12:41:52] ============== [PASSED] xe_rtp_process_tests ===============
[12:41:52] ===================== [PASSED] xe_rtp ======================
[12:41:52] ==================== xe_wa (1 subtest) =====================
[12:41:52] ======================== xe_wa_gt  =========================
[12:41:52] [PASSED] TIGERLAKE B0
[12:41:52] [PASSED] DG1 A0
[12:41:52] [PASSED] DG1 B0
[12:41:52] [PASSED] ALDERLAKE_S A0
[12:41:52] [PASSED] ALDERLAKE_S B0
[12:41:52] [PASSED] ALDERLAKE_S C0
[12:41:52] [PASSED] ALDERLAKE_S D0
[12:41:52] [PASSED] ALDERLAKE_P A0
[12:41:52] [PASSED] ALDERLAKE_P B0
[12:41:52] [PASSED] ALDERLAKE_P C0
[12:41:52] [PASSED] ALDERLAKE_S RPLS D0
[12:41:52] [PASSED] ALDERLAKE_P RPLU E0
[12:41:52] [PASSED] DG2 G10 C0
[12:41:52] [PASSED] DG2 G11 B1
[12:41:52] [PASSED] DG2 G12 A1
[12:41:52] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:41:52] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:41:52] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[12:41:52] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[12:41:52] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[12:41:52] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[12:41:52] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[12:41:52] ==================== [PASSED] xe_wa_gt =====================
[12:41:52] ====================== [PASSED] xe_wa ======================
[12:41:52] ============================================================
[12:41:52] Testing complete. Ran 789 tests: passed: 761, skipped: 28
[12:41:52] Elapsed time: 37.627s total, 4.418s configuring, 32.494s building, 0.683s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[12:41:52] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:41:54] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:42:19] Starting KUnit Kernel (1/1)...
[12:42:19] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:42:19] ============ drm_test_pick_cmdline (2 subtests) ============
[12:42:19] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[12:42:19] =============== drm_test_pick_cmdline_named  ===============
[12:42:19] [PASSED] NTSC
[12:42:19] [PASSED] NTSC-J
[12:42:19] [PASSED] PAL
[12:42:19] [PASSED] PAL-M
[12:42:19] =========== [PASSED] drm_test_pick_cmdline_named ===========
[12:42:19] ============== [PASSED] drm_test_pick_cmdline ==============
[12:42:19] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[12:42:19] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[12:42:19] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[12:42:19] =========== drm_validate_clone_mode (2 subtests) ===========
[12:42:19] ============== drm_test_check_in_clone_mode  ===============
[12:42:19] [PASSED] in_clone_mode
[12:42:19] [PASSED] not_in_clone_mode
[12:42:19] ========== [PASSED] drm_test_check_in_clone_mode ===========
[12:42:19] =============== drm_test_check_valid_clones  ===============
[12:42:19] [PASSED] not_in_clone_mode
[12:42:19] [PASSED] valid_clone
[12:42:19] [PASSED] invalid_clone
[12:42:19] =========== [PASSED] drm_test_check_valid_clones ===========
[12:42:19] ============= [PASSED] drm_validate_clone_mode =============
[12:42:19] ============= drm_validate_modeset (1 subtest) =============
[12:42:19] [PASSED] drm_test_check_connector_changed_modeset
[12:42:19] ============== [PASSED] drm_validate_modeset ===============
[12:42:19] ====== drm_test_bridge_get_current_state (1 subtest) =======
[12:42:19] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[12:42:19] ======== [PASSED] drm_test_bridge_get_current_state ========
[12:42:19] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[12:42:19] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[12:42:19] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[12:42:19] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[12:42:19] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[12:42:19] ============== drm_bridge_alloc (2 subtests) ===============
[12:42:19] [PASSED] drm_test_drm_bridge_alloc_basic
[12:42:19] [PASSED] drm_test_drm_bridge_alloc_get_put
[12:42:19] ================ [PASSED] drm_bridge_alloc =================
[12:42:19] ============= drm_bridge_bus_fmt (5 subtests) ==============
[12:42:19] [PASSED] drm_test_bridge_rgb_yuv_rgb
[12:42:19] [PASSED] drm_test_bridge_must_convert_to_yuv444
[12:42:19] [PASSED] drm_test_bridge_hdmi_auto_rgb
[12:42:19] [PASSED] drm_test_bridge_auto_first
[12:42:19] [PASSED] drm_test_bridge_rgb_yuv_no_path
[12:42:19] =============== [PASSED] drm_bridge_bus_fmt ================
[12:42:19] ============= drm_cmdline_parser (40 subtests) =============
[12:42:19] [PASSED] drm_test_cmdline_force_d_only
[12:42:19] [PASSED] drm_test_cmdline_force_D_only_dvi
[12:42:19] [PASSED] drm_test_cmdline_force_D_only_hdmi
[12:42:19] [PASSED] drm_test_cmdline_force_D_only_not_digital
[12:42:19] [PASSED] drm_test_cmdline_force_e_only
[12:42:19] [PASSED] drm_test_cmdline_res
[12:42:19] [PASSED] drm_test_cmdline_res_vesa
[12:42:19] [PASSED] drm_test_cmdline_res_vesa_rblank
[12:42:19] [PASSED] drm_test_cmdline_res_rblank
[12:42:19] [PASSED] drm_test_cmdline_res_bpp
[12:42:19] [PASSED] drm_test_cmdline_res_refresh
[12:42:19] [PASSED] drm_test_cmdline_res_bpp_refresh
[12:42:19] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[12:42:19] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[12:42:19] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[12:42:19] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[12:42:19] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[12:42:19] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[12:42:19] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[12:42:19] [PASSED] drm_test_cmdline_res_margins_force_on
[12:42:19] [PASSED] drm_test_cmdline_res_vesa_margins
[12:42:19] [PASSED] drm_test_cmdline_name
[12:42:19] [PASSED] drm_test_cmdline_name_bpp
[12:42:19] [PASSED] drm_test_cmdline_name_option
[12:42:19] [PASSED] drm_test_cmdline_name_bpp_option
[12:42:19] [PASSED] drm_test_cmdline_rotate_0
[12:42:19] [PASSED] drm_test_cmdline_rotate_90
[12:42:19] [PASSED] drm_test_cmdline_rotate_180
[12:42:19] [PASSED] drm_test_cmdline_rotate_270
[12:42:19] [PASSED] drm_test_cmdline_hmirror
[12:42:19] [PASSED] drm_test_cmdline_vmirror
[12:42:19] [PASSED] drm_test_cmdline_margin_options
[12:42:19] [PASSED] drm_test_cmdline_multiple_options
[12:42:19] [PASSED] drm_test_cmdline_bpp_extra_and_option
[12:42:19] [PASSED] drm_test_cmdline_extra_and_option
[12:42:19] [PASSED] drm_test_cmdline_freestanding_options
[12:42:19] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[12:42:19] [PASSED] drm_test_cmdline_panel_orientation
[12:42:19] ================ drm_test_cmdline_invalid  =================
[12:42:19] [PASSED] margin_only
[12:42:19] [PASSED] interlace_only
[12:42:19] [PASSED] res_missing_x
[12:42:19] [PASSED] res_missing_y
[12:42:19] [PASSED] res_bad_y
[12:42:19] [PASSED] res_missing_y_bpp
[12:42:19] [PASSED] res_bad_bpp
[12:42:19] [PASSED] res_bad_refresh
[12:42:19] [PASSED] res_bpp_refresh_force_on_off
[12:42:19] [PASSED] res_invalid_mode
[12:42:19] [PASSED] res_bpp_wrong_place_mode
[12:42:19] [PASSED] name_bpp_refresh
[12:42:19] [PASSED] name_refresh
[12:42:19] [PASSED] name_refresh_wrong_mode
[12:42:19] [PASSED] name_refresh_invalid_mode
[12:42:19] [PASSED] rotate_multiple
[12:42:19] [PASSED] rotate_invalid_val
[12:42:19] [PASSED] rotate_truncated
[12:42:19] [PASSED] invalid_option
[12:42:19] [PASSED] invalid_tv_option
[12:42:19] [PASSED] truncated_tv_option
[12:42:19] ============ [PASSED] drm_test_cmdline_invalid =============
[12:42:19] =============== drm_test_cmdline_tv_options  ===============
[12:42:19] [PASSED] NTSC
[12:42:19] [PASSED] NTSC_443
[12:42:19] [PASSED] NTSC_J
[12:42:19] [PASSED] PAL
[12:42:19] [PASSED] PAL_M
[12:42:19] [PASSED] PAL_N
[12:42:19] [PASSED] SECAM
[12:42:19] [PASSED] MONO_525
[12:42:19] [PASSED] MONO_625
[12:42:19] =========== [PASSED] drm_test_cmdline_tv_options ===========
[12:42:19] =============== [PASSED] drm_cmdline_parser ================
[12:42:19] ========== drmm_connector_hdmi_init (20 subtests) ==========
[12:42:19] [PASSED] drm_test_connector_hdmi_init_valid
[12:42:19] [PASSED] drm_test_connector_hdmi_init_bpc_8
[12:42:19] [PASSED] drm_test_connector_hdmi_init_bpc_10
[12:42:19] [PASSED] drm_test_connector_hdmi_init_bpc_12
[12:42:19] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[12:42:19] [PASSED] drm_test_connector_hdmi_init_bpc_null
[12:42:19] [PASSED] drm_test_connector_hdmi_init_formats_empty
[12:42:19] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[12:42:19] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[12:42:19] [PASSED] supported_formats=0x9 yuv420_allowed=1
[12:42:19] [PASSED] supported_formats=0x9 yuv420_allowed=0
[12:42:19] [PASSED] supported_formats=0x5 yuv420_allowed=1
[12:42:19] [PASSED] supported_formats=0x5 yuv420_allowed=0
[12:42:19] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:42:19] [PASSED] drm_test_connector_hdmi_init_null_ddc
[12:42:19] [PASSED] drm_test_connector_hdmi_init_null_product
[12:42:19] [PASSED] drm_test_connector_hdmi_init_null_vendor
[12:42:19] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[12:42:19] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[12:42:19] [PASSED] drm_test_connector_hdmi_init_product_valid
[12:42:19] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[12:42:19] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[12:42:19] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[12:42:19] ========= drm_test_connector_hdmi_init_type_valid  =========
[12:42:19] [PASSED] HDMI-A
[12:42:19] [PASSED] HDMI-B
[12:42:19] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[12:42:19] ======== drm_test_connector_hdmi_init_type_invalid  ========
[12:42:19] [PASSED] Unknown
[12:42:19] [PASSED] VGA
[12:42:19] [PASSED] DVI-I
[12:42:19] [PASSED] DVI-D
[12:42:19] [PASSED] DVI-A
[12:42:19] [PASSED] Composite
[12:42:19] [PASSED] SVIDEO
[12:42:19] [PASSED] LVDS
[12:42:19] [PASSED] Component
[12:42:19] [PASSED] DIN
[12:42:19] [PASSED] DP
[12:42:19] [PASSED] TV
[12:42:19] [PASSED] eDP
[12:42:19] [PASSED] Virtual
[12:42:19] [PASSED] DSI
[12:42:19] [PASSED] DPI
[12:42:19] [PASSED] Writeback
[12:42:19] [PASSED] SPI
[12:42:19] [PASSED] USB
[12:42:19] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[12:42:19] ============ [PASSED] drmm_connector_hdmi_init =============
[12:42:19] ============= drmm_connector_init (3 subtests) =============
[12:42:19] [PASSED] drm_test_drmm_connector_init
[12:42:19] [PASSED] drm_test_drmm_connector_init_null_ddc
[12:42:19] ========= drm_test_drmm_connector_init_type_valid  =========
[12:42:19] [PASSED] Unknown
[12:42:19] [PASSED] VGA
[12:42:19] [PASSED] DVI-I
[12:42:19] [PASSED] DVI-D
[12:42:19] [PASSED] DVI-A
[12:42:19] [PASSED] Composite
[12:42:19] [PASSED] SVIDEO
[12:42:19] [PASSED] LVDS
[12:42:19] [PASSED] Component
[12:42:19] [PASSED] DIN
[12:42:19] [PASSED] DP
[12:42:19] [PASSED] HDMI-A
[12:42:19] [PASSED] HDMI-B
[12:42:19] [PASSED] TV
[12:42:19] [PASSED] eDP
[12:42:19] [PASSED] Virtual
[12:42:19] [PASSED] DSI
[12:42:19] [PASSED] DPI
[12:42:19] [PASSED] Writeback
[12:42:19] [PASSED] SPI
[12:42:19] [PASSED] USB
[12:42:19] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[12:42:19] =============== [PASSED] drmm_connector_init ===============
[12:42:19] ========= drm_connector_dynamic_init (6 subtests) ==========
[12:42:19] [PASSED] drm_test_drm_connector_dynamic_init
[12:42:19] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[12:42:19] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[12:42:19] [PASSED] drm_test_drm_connector_dynamic_init_properties
[12:42:19] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[12:42:19] [PASSED] Unknown
[12:42:19] [PASSED] VGA
[12:42:19] [PASSED] DVI-I
[12:42:19] [PASSED] DVI-D
[12:42:19] [PASSED] DVI-A
[12:42:19] [PASSED] Composite
[12:42:19] [PASSED] SVIDEO
[12:42:19] [PASSED] LVDS
[12:42:19] [PASSED] Component
[12:42:19] [PASSED] DIN
[12:42:19] [PASSED] DP
[12:42:19] [PASSED] HDMI-A
[12:42:19] [PASSED] HDMI-B
[12:42:19] [PASSED] TV
[12:42:19] [PASSED] eDP
[12:42:19] [PASSED] Virtual
[12:42:19] [PASSED] DSI
[12:42:19] [PASSED] DPI
[12:42:19] [PASSED] Writeback
[12:42:19] [PASSED] SPI
[12:42:19] [PASSED] USB
[12:42:19] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[12:42:19] ======== drm_test_drm_connector_dynamic_init_name  =========
[12:42:19] [PASSED] Unknown
[12:42:19] [PASSED] VGA
[12:42:19] [PASSED] DVI-I
[12:42:19] [PASSED] DVI-D
[12:42:19] [PASSED] DVI-A
[12:42:19] [PASSED] Composite
[12:42:19] [PASSED] SVIDEO
[12:42:19] [PASSED] LVDS
[12:42:19] [PASSED] Component
[12:42:19] [PASSED] DIN
[12:42:19] [PASSED] DP
[12:42:19] [PASSED] HDMI-A
[12:42:19] [PASSED] HDMI-B
[12:42:19] [PASSED] TV
[12:42:19] [PASSED] eDP
[12:42:19] [PASSED] Virtual
[12:42:19] [PASSED] DSI
[12:42:19] [PASSED] DPI
[12:42:19] [PASSED] Writeback
[12:42:19] [PASSED] SPI
[12:42:19] [PASSED] USB
[12:42:19] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[12:42:19] =========== [PASSED] drm_connector_dynamic_init ============
[12:42:19] ==== drm_connector_dynamic_register_early (4 subtests) =====
[12:42:19] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[12:42:19] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[12:42:19] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[12:42:19] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[12:42:19] ====== [PASSED] drm_connector_dynamic_register_early =======
[12:42:19] ======= drm_connector_dynamic_register (7 subtests) ========
[12:42:19] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[12:42:19] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[12:42:19] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[12:42:19] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[12:42:19] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[12:42:19] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[12:42:19] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[12:42:19] ========= [PASSED] drm_connector_dynamic_register ==========
[12:42:19] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[12:42:19] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[12:42:19] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[12:42:19] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[12:42:19] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[12:42:19] ========== drm_test_get_tv_mode_from_name_valid  ===========
[12:42:19] [PASSED] NTSC
[12:42:19] [PASSED] NTSC-443
[12:42:19] [PASSED] NTSC-J
[12:42:19] [PASSED] PAL
[12:42:19] [PASSED] PAL-M
[12:42:19] [PASSED] PAL-N
[12:42:19] [PASSED] SECAM
[12:42:19] [PASSED] Mono
[12:42:19] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[12:42:19] [PASSED] drm_test_get_tv_mode_from_name_truncated
[12:42:19] ============ [PASSED] drm_get_tv_mode_from_name ============
[12:42:19] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[12:42:19] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[12:42:19] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[12:42:19] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[12:42:19] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[12:42:19] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[12:42:19] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[12:42:19] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[12:42:19] [PASSED] VIC 96
[12:42:19] [PASSED] VIC 97
[12:42:19] [PASSED] VIC 101
[12:42:19] [PASSED] VIC 102
[12:42:19] [PASSED] VIC 106
[12:42:19] [PASSED] VIC 107
[12:42:19] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[12:42:19] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[12:42:19] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[12:42:19] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[12:42:19] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[12:42:19] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[12:42:19] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[12:42:19] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[12:42:19] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[12:42:19] [PASSED] Automatic
[12:42:19] [PASSED] Full
[12:42:19] [PASSED] Limited 16:235
[12:42:19] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[12:42:19] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[12:42:19] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[12:42:19] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[12:42:19] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[12:42:19] [PASSED] RGB
[12:42:19] [PASSED] YUV 4:2:0
[12:42:19] [PASSED] YUV 4:2:2
[12:42:19] [PASSED] YUV 4:4:4
[12:42:19] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[12:42:19] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[12:42:19] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[12:42:19] ============= drm_damage_helper (21 subtests) ==============
[12:42:19] [PASSED] drm_test_damage_iter_no_damage
[12:42:19] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[12:42:19] [PASSED] drm_test_damage_iter_no_damage_src_moved
[12:42:19] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[12:42:19] [PASSED] drm_test_damage_iter_no_damage_not_visible
[12:42:19] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[12:42:19] [PASSED] drm_test_damage_iter_no_damage_no_fb
[12:42:19] [PASSED] drm_test_damage_iter_simple_damage
[12:42:19] [PASSED] drm_test_damage_iter_single_damage
[12:42:19] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[12:42:19] [PASSED] drm_test_damage_iter_single_damage_outside_src
[12:42:19] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[12:42:19] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[12:42:19] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[12:42:19] [PASSED] drm_test_damage_iter_single_damage_src_moved
[12:42:19] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[12:42:19] [PASSED] drm_test_damage_iter_damage
[12:42:19] [PASSED] drm_test_damage_iter_damage_one_intersect
[12:42:19] [PASSED] drm_test_damage_iter_damage_one_outside
[12:42:19] [PASSED] drm_test_damage_iter_damage_src_moved
[12:42:19] [PASSED] drm_test_damage_iter_damage_not_visible
[12:42:19] ================ [PASSED] drm_damage_helper ================
[12:42:19] ============== drm_dp_mst_helper (3 subtests) ==============
[12:42:19] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[12:42:19] [PASSED] Clock 154000 BPP 30 DSC disabled
[12:42:19] [PASSED] Clock 234000 BPP 30 DSC disabled
[12:42:19] [PASSED] Clock 297000 BPP 24 DSC disabled
[12:42:19] [PASSED] Clock 332880 BPP 24 DSC enabled
[12:42:19] [PASSED] Clock 324540 BPP 24 DSC enabled
[12:42:19] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[12:42:19] ============== drm_test_dp_mst_calc_pbn_div  ===============
[12:42:19] [PASSED] Link rate 2000000 lane count 4
[12:42:19] [PASSED] Link rate 2000000 lane count 2
[12:42:19] [PASSED] Link rate 2000000 lane count 1
[12:42:19] [PASSED] Link rate 1350000 lane count 4
[12:42:19] [PASSED] Link rate 1350000 lane count 2
[12:42:19] [PASSED] Link rate 1350000 lane count 1
[12:42:19] [PASSED] Link rate 1000000 lane count 4
[12:42:19] [PASSED] Link rate 1000000 lane count 2
[12:42:19] [PASSED] Link rate 1000000 lane count 1
[12:42:19] [PASSED] Link rate 810000 lane count 4
[12:42:19] [PASSED] Link rate 810000 lane count 2
[12:42:19] [PASSED] Link rate 810000 lane count 1
[12:42:19] [PASSED] Link rate 540000 lane count 4
[12:42:19] [PASSED] Link rate 540000 lane count 2
[12:42:19] [PASSED] Link rate 540000 lane count 1
[12:42:19] [PASSED] Link rate 270000 lane count 4
[12:42:19] [PASSED] Link rate 270000 lane count 2
[12:42:19] [PASSED] Link rate 270000 lane count 1
[12:42:19] [PASSED] Link rate 162000 lane count 4
[12:42:19] [PASSED] Link rate 162000 lane count 2
[12:42:19] [PASSED] Link rate 162000 lane count 1
[12:42:19] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[12:42:19] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[12:42:19] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[12:42:19] [PASSED] DP_POWER_UP_PHY with port number
[12:42:19] [PASSED] DP_POWER_DOWN_PHY with port number
[12:42:19] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[12:42:19] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[12:42:19] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[12:42:19] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[12:42:19] [PASSED] DP_QUERY_PAYLOAD with port number
[12:42:19] [PASSED] DP_QUERY_PAYLOAD with VCPI
[12:42:19] [PASSED] DP_REMOTE_DPCD_READ with port number
[12:42:19] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[12:42:19] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[12:42:19] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[12:42:19] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[12:42:19] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[12:42:19] [PASSED] DP_REMOTE_I2C_READ with port number
[12:42:19] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[12:42:19] [PASSED] DP_REMOTE_I2C_READ with transactions array
[12:42:19] [PASSED] DP_REMOTE_I2C_WRITE with port number
[12:42:19] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[12:42:19] [PASSED] DP_REMOTE_I2C_WRITE with data array
[12:42:19] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[12:42:19] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[12:42:19] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[12:42:19] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[12:42:19] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[12:42:19] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[12:42:19] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[12:42:19] ================ [PASSED] drm_dp_mst_helper ================
[12:42:19] ================== drm_exec (7 subtests) ===================
[12:42:19] [PASSED] sanitycheck
[12:42:19] [PASSED] test_lock
[12:42:19] [PASSED] test_lock_unlock
[12:42:19] [PASSED] test_duplicates
[12:42:19] [PASSED] test_prepare
[12:42:19] [PASSED] test_prepare_array
[12:42:19] [PASSED] test_multiple_loops
[12:42:19] ==================== [PASSED] drm_exec =====================
[12:42:19] =========== drm_format_helper_test (17 subtests) ===========
[12:42:19] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[12:42:19] [PASSED] single_pixel_source_buffer
[12:42:19] [PASSED] single_pixel_clip_rectangle
[12:42:19] [PASSED] well_known_colors
[12:42:19] [PASSED] destination_pitch
[12:42:19] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[12:42:19] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[12:42:19] [PASSED] single_pixel_source_buffer
[12:42:19] [PASSED] single_pixel_clip_rectangle
[12:42:19] [PASSED] well_known_colors
[12:42:19] [PASSED] destination_pitch
[12:42:19] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[12:42:19] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[12:42:19] [PASSED] single_pixel_source_buffer
[12:42:19] [PASSED] single_pixel_clip_rectangle
[12:42:19] [PASSED] well_known_colors
[12:42:19] [PASSED] destination_pitch
[12:42:19] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[12:42:19] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[12:42:19] [PASSED] single_pixel_source_buffer
[12:42:19] [PASSED] single_pixel_clip_rectangle
[12:42:19] [PASSED] well_known_colors
[12:42:19] [PASSED] destination_pitch
[12:42:19] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[12:42:19] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[12:42:19] [PASSED] single_pixel_source_buffer
[12:42:19] [PASSED] single_pixel_clip_rectangle
[12:42:19] [PASSED] well_known_colors
[12:42:19] [PASSED] destination_pitch
[12:42:19] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[12:42:19] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[12:42:19] [PASSED] single_pixel_source_buffer
[12:42:19] [PASSED] single_pixel_clip_rectangle
[12:42:19] [PASSED] well_known_colors
[12:42:19] [PASSED] destination_pitch
[12:42:19] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[12:42:19] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[12:42:19] [PASSED] single_pixel_source_buffer
[12:42:19] [PASSED] single_pixel_clip_rectangle
[12:42:19] [PASSED] well_known_colors
[12:42:19] [PASSED] destination_pitch
[12:42:19] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[12:42:19] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[12:42:19] [PASSED] single_pixel_source_buffer
[12:42:19] [PASSED] single_pixel_clip_rectangle
[12:42:19] [PASSED] well_known_colors
[12:42:19] [PASSED] destination_pitch
[12:42:19] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[12:42:19] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[12:42:19] [PASSED] single_pixel_source_buffer
[12:42:19] [PASSED] single_pixel_clip_rectangle
[12:42:19] [PASSED] well_known_colors
[12:42:19] [PASSED] destination_pitch
[12:42:19] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[12:42:19] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[12:42:19] [PASSED] single_pixel_source_buffer
[12:42:19] [PASSED] single_pixel_clip_rectangle
[12:42:19] [PASSED] well_known_colors
[12:42:19] [PASSED] destination_pitch
[12:42:19] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[12:42:19] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[12:42:19] [PASSED] single_pixel_source_buffer
[12:42:19] [PASSED] single_pixel_clip_rectangle
[12:42:19] [PASSED] well_known_colors
[12:42:19] [PASSED] destination_pitch
[12:42:19] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[12:42:19] ============== drm_test_fb_xrgb8888_to_mono  ===============
[12:42:19] [PASSED] single_pixel_source_buffer
[12:42:19] [PASSED] single_pixel_clip_rectangle
[12:42:19] [PASSED] well_known_colors
[12:42:19] [PASSED] destination_pitch
[12:42:19] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[12:42:19] ==================== drm_test_fb_swab  =====================
[12:42:19] [PASSED] single_pixel_source_buffer
[12:42:19] [PASSED] single_pixel_clip_rectangle
[12:42:19] [PASSED] well_known_colors
[12:42:19] [PASSED] destination_pitch
[12:42:19] ================ [PASSED] drm_test_fb_swab =================
[12:42:19] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[12:42:19] [PASSED] single_pixel_source_buffer
[12:42:19] [PASSED] single_pixel_clip_rectangle
[12:42:19] [PASSED] well_known_colors
[12:42:19] [PASSED] destination_pitch
[12:42:19] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[12:42:19] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[12:42:19] [PASSED] single_pixel_source_buffer
[12:42:19] [PASSED] single_pixel_clip_rectangle
[12:42:19] [PASSED] well_known_colors
[12:42:19] [PASSED] destination_pitch
[12:42:19] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[12:42:19] ================= drm_test_fb_clip_offset  =================
[12:42:19] [PASSED] pass through
[12:42:19] [PASSED] horizontal offset
[12:42:19] [PASSED] vertical offset
[12:42:19] [PASSED] horizontal and vertical offset
[12:42:19] [PASSED] horizontal offset (custom pitch)
[12:42:19] [PASSED] vertical offset (custom pitch)
[12:42:19] [PASSED] horizontal and vertical offset (custom pitch)
[12:42:19] ============= [PASSED] drm_test_fb_clip_offset =============
[12:42:19] =================== drm_test_fb_memcpy  ====================
[12:42:19] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[12:42:19] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[12:42:19] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[12:42:19] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[12:42:19] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[12:42:19] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[12:42:19] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[12:42:19] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[12:42:19] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[12:42:19] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[12:42:19] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[12:42:19] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[12:42:19] =============== [PASSED] drm_test_fb_memcpy ================
[12:42:19] ============= [PASSED] drm_format_helper_test ==============
[12:42:19] ================= drm_format (18 subtests) =================
[12:42:19] [PASSED] drm_test_format_block_width_invalid
[12:42:19] [PASSED] drm_test_format_block_width_one_plane
[12:42:19] [PASSED] drm_test_format_block_width_two_plane
[12:42:19] [PASSED] drm_test_format_block_width_three_plane
[12:42:19] [PASSED] drm_test_format_block_width_tiled
[12:42:19] [PASSED] drm_test_format_block_height_invalid
[12:42:19] [PASSED] drm_test_format_block_height_one_plane
[12:42:19] [PASSED] drm_test_format_block_height_two_plane
[12:42:19] [PASSED] drm_test_format_block_height_three_plane
[12:42:19] [PASSED] drm_test_format_block_height_tiled
[12:42:19] [PASSED] drm_test_format_min_pitch_invalid
[12:42:19] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[12:42:19] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[12:42:19] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[12:42:19] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[12:42:19] [PASSED] drm_test_format_min_pitch_two_plane
[12:42:19] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[12:42:19] [PASSED] drm_test_format_min_pitch_tiled
[12:42:19] =================== [PASSED] drm_format ====================
[12:42:19] ============== drm_framebuffer (10 subtests) ===============
[12:42:19] ========== drm_test_framebuffer_check_src_coords  ==========
[12:42:19] [PASSED] Success: source fits into fb
[12:42:19] [PASSED] Fail: overflowing fb with x-axis coordinate
[12:42:19] [PASSED] Fail: overflowing fb with y-axis coordinate
[12:42:19] [PASSED] Fail: overflowing fb with source width
[12:42:19] [PASSED] Fail: overflowing fb with source height
[12:42:19] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[12:42:19] [PASSED] drm_test_framebuffer_cleanup
[12:42:19] =============== drm_test_framebuffer_create  ===============
[12:42:19] [PASSED] ABGR8888 normal sizes
[12:42:19] [PASSED] ABGR8888 max sizes
[12:42:19] [PASSED] ABGR8888 pitch greater than min required
[12:42:19] [PASSED] ABGR8888 pitch less than min required
[12:42:19] [PASSED] ABGR8888 Invalid width
[12:42:19] [PASSED] ABGR8888 Invalid buffer handle
[12:42:19] [PASSED] No pixel format
[12:42:19] [PASSED] ABGR8888 Width 0
[12:42:19] [PASSED] ABGR8888 Height 0
[12:42:19] [PASSED] ABGR8888 Out of bound height * pitch combination
[12:42:19] [PASSED] ABGR8888 Large buffer offset
[12:42:19] [PASSED] ABGR8888 Buffer offset for inexistent plane
[12:42:19] [PASSED] ABGR8888 Invalid flag
[12:42:19] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[12:42:19] [PASSED] ABGR8888 Valid buffer modifier
[12:42:19] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[12:42:19] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[12:42:19] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[12:42:19] [PASSED] NV12 Normal sizes
[12:42:19] [PASSED] NV12 Max sizes
[12:42:19] [PASSED] NV12 Invalid pitch
[12:42:19] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[12:42:19] [PASSED] NV12 different  modifier per-plane
[12:42:19] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[12:42:19] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[12:42:19] [PASSED] NV12 Modifier for inexistent plane
[12:42:19] [PASSED] NV12 Handle for inexistent plane
[12:42:19] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[12:42:19] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[12:42:19] [PASSED] YVU420 Normal sizes
[12:42:19] [PASSED] YVU420 Max sizes
[12:42:19] [PASSED] YVU420 Invalid pitch
[12:42:19] [PASSED] YVU420 Different pitches
[12:42:19] [PASSED] YVU420 Different buffer offsets/pitches
[12:42:19] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[12:42:19] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[12:42:19] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[12:42:19] [PASSED] YVU420 Valid modifier
[12:42:19] [PASSED] YVU420 Different modifiers per plane
[12:42:19] [PASSED] YVU420 Modifier for inexistent plane
[12:42:19] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[12:42:19] [PASSED] X0L2 Normal sizes
[12:42:19] [PASSED] X0L2 Max sizes
[12:42:19] [PASSED] X0L2 Invalid pitch
[12:42:19] [PASSED] X0L2 Pitch greater than minimum required
[12:42:19] [PASSED] X0L2 Handle for inexistent plane
[12:42:19] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[12:42:19] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[12:42:19] [PASSED] X0L2 Valid modifier
[12:42:19] [PASSED] X0L2 Modifier for inexistent plane
[12:42:19] =========== [PASSED] drm_test_framebuffer_create ===========
[12:42:19] [PASSED] drm_test_framebuffer_free
[12:42:19] [PASSED] drm_test_framebuffer_init
[12:42:19] [PASSED] drm_test_framebuffer_init_bad_format
[12:42:19] [PASSED] drm_test_framebuffer_init_dev_mismatch
[12:42:19] [PASSED] drm_test_framebuffer_lookup
[12:42:19] [PASSED] drm_test_framebuffer_lookup_inexistent
[12:42:19] [PASSED] drm_test_framebuffer_modifiers_not_supported
[12:42:19] ================= [PASSED] drm_framebuffer =================
[12:42:19] ================ drm_gem_shmem (8 subtests) ================
[12:42:19] [PASSED] drm_gem_shmem_test_obj_create
[12:42:19] [PASSED] drm_gem_shmem_test_obj_create_private
[12:42:19] [PASSED] drm_gem_shmem_test_pin_pages
[12:42:19] [PASSED] drm_gem_shmem_test_vmap
[12:42:19] [PASSED] drm_gem_shmem_test_get_sg_table
[12:42:19] [PASSED] drm_gem_shmem_test_get_pages_sgt
[12:42:19] [PASSED] drm_gem_shmem_test_madvise
[12:42:19] [PASSED] drm_gem_shmem_test_purge
[12:42:19] ================== [PASSED] drm_gem_shmem ==================
[12:42:19] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[12:42:19] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[12:42:19] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[12:42:19] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[12:42:19] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[12:42:19] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[12:42:19] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[12:42:19] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[12:42:19] [PASSED] Automatic
[12:42:19] [PASSED] Full
[12:42:19] [PASSED] Limited 16:235
[12:42:19] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[12:42:19] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[12:42:19] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[12:42:19] [PASSED] drm_test_check_disable_connector
[12:42:19] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[12:42:19] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[12:42:19] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[12:42:19] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[12:42:19] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[12:42:19] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[12:42:19] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[12:42:19] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[12:42:19] [PASSED] drm_test_check_output_bpc_dvi
[12:42:19] [PASSED] drm_test_check_output_bpc_format_vic_1
[12:42:19] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[12:42:19] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[12:42:19] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[12:42:19] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[12:42:19] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[12:42:19] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[12:42:19] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[12:42:19] ============ drm_test_check_hdmi_color_format  =============
[12:42:19] [PASSED] AUTO -> RGB
[12:42:19] [PASSED] YCBCR422 -> YUV422
[12:42:19] [PASSED] YCBCR420 -> YUV420
[12:42:19] [PASSED] YCBCR444 -> YUV444
[12:42:19] [PASSED] RGB -> RGB
[12:42:19] ======== [PASSED] drm_test_check_hdmi_color_format =========
[12:42:19] ======== drm_test_check_hdmi_color_format_420_only  ========
[12:42:19] [PASSED] RGB should fail
[12:42:19] [PASSED] YUV444 should fail
[12:42:19] [PASSED] YUV422 should fail
[12:42:19] [PASSED] YUV420 should work
[12:42:19] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[12:42:19] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[12:42:19] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[12:42:19] [PASSED] drm_test_check_broadcast_rgb_value
[12:42:19] [PASSED] drm_test_check_bpc_8_value
[12:42:19] [PASSED] drm_test_check_bpc_10_value
[12:42:19] [PASSED] drm_test_check_bpc_12_value
[12:42:19] [PASSED] drm_test_check_format_value
[12:42:19] [PASSED] drm_test_check_tmds_char_value
[12:42:19] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[12:42:19] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[12:42:19] [PASSED] drm_test_check_mode_valid
[12:42:19] [PASSED] drm_test_check_mode_valid_reject
[12:42:19] [PASSED] drm_test_check_mode_valid_reject_rate
[12:42:19] [PASSED] drm_test_check_mode_valid_reject_max_clock
[12:42:19] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[12:42:19] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[12:42:19] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[12:42:19] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[12:42:19] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[12:42:19] [PASSED] drm_test_check_infoframes
[12:42:19] [PASSED] drm_test_check_reject_avi_infoframe
[12:42:19] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[12:42:19] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[12:42:19] [PASSED] drm_test_check_reject_audio_infoframe
[12:42:19] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[12:42:19] ================= drm_managed (2 subtests) =================
[12:42:19] [PASSED] drm_test_managed_release_action
[12:42:19] [PASSED] drm_test_managed_run_action
[12:42:19] =================== [PASSED] drm_managed ===================
[12:42:19] =================== drm_mm (6 subtests) ====================
[12:42:19] [PASSED] drm_test_mm_init
[12:42:19] [PASSED] drm_test_mm_debug
[12:42:19] [PASSED] drm_test_mm_align32
[12:42:19] [PASSED] drm_test_mm_align64
[12:42:19] [PASSED] drm_test_mm_lowest
[12:42:19] [PASSED] drm_test_mm_highest
[12:42:19] ===================== [PASSED] drm_mm ======================
[12:42:19] ============= drm_modes_analog_tv (5 subtests) =============
[12:42:19] [PASSED] drm_test_modes_analog_tv_mono_576i
[12:42:19] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[12:42:19] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[12:42:19] [PASSED] drm_test_modes_analog_tv_pal_576i
[12:42:19] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[12:42:19] =============== [PASSED] drm_modes_analog_tv ===============
[12:42:19] ============== drm_plane_helper (2 subtests) ===============
[12:42:19] =============== drm_test_check_plane_state  ================
[12:42:19] [PASSED] clipping_simple
[12:42:19] [PASSED] clipping_rotate_reflect
[12:42:19] [PASSED] positioning_simple
[12:42:19] [PASSED] upscaling
[12:42:19] [PASSED] downscaling
[12:42:19] [PASSED] rounding1
[12:42:19] [PASSED] rounding2
[12:42:19] [PASSED] rounding3
[12:42:19] [PASSED] rounding4
[12:42:19] =========== [PASSED] drm_test_check_plane_state ============
[12:42:19] =========== drm_test_check_invalid_plane_state  ============
[12:42:19] [PASSED] positioning_invalid
[12:42:19] [PASSED] upscaling_invalid
[12:42:19] [PASSED] downscaling_invalid
[12:42:19] ======= [PASSED] drm_test_check_invalid_plane_state ========
[12:42:19] ================ [PASSED] drm_plane_helper =================
[12:42:19] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[12:42:19] ====== drm_test_connector_helper_tv_get_modes_check  =======
[12:42:19] [PASSED] None
[12:42:19] [PASSED] PAL
[12:42:19] [PASSED] NTSC
[12:42:19] [PASSED] Both, NTSC Default
[12:42:19] [PASSED] Both, PAL Default
[12:42:19] [PASSED] Both, NTSC Default, with PAL on command-line
[12:42:19] [PASSED] Both, PAL Default, with NTSC on command-line
[12:42:19] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[12:42:19] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[12:42:19] ================== drm_rect (9 subtests) ===================
[12:42:19] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[12:42:19] [PASSED] drm_test_rect_clip_scaled_not_clipped
[12:42:19] [PASSED] drm_test_rect_clip_scaled_clipped
[12:42:19] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[12:42:19] ================= drm_test_rect_intersect  =================
[12:42:19] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[12:42:19] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[12:42:19] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[12:42:19] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[12:42:19] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[12:42:19] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[12:42:19] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[12:42:19] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[12:42:19] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[12:42:19] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[12:42:19] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[12:42:19] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[12:42:19] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[12:42:19] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[12:42:19] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[12:42:19] ============= [PASSED] drm_test_rect_intersect =============
[12:42:19] ================ drm_test_rect_calc_hscale  ================
[12:42:19] [PASSED] normal use
[12:42:19] [PASSED] out of max range
[12:42:19] [PASSED] out of min range
[12:42:19] [PASSED] zero dst
[12:42:19] [PASSED] negative src
[12:42:19] [PASSED] negative dst
[12:42:19] ============ [PASSED] drm_test_rect_calc_hscale ============
[12:42:19] ================ drm_test_rect_calc_vscale  ================
[12:42:19] [PASSED] normal use
[12:42:19] [PASSED] out of max range
[12:42:19] [PASSED] out of min range
[12:42:19] [PASSED] zero dst
[12:42:19] [PASSED] negative src
[12:42:19] [PASSED] negative dst
[12:42:19] ============ [PASSED] drm_test_rect_calc_vscale ============
[12:42:19] ================== drm_test_rect_rotate  ===================
[12:42:19] [PASSED] reflect-x
[12:42:19] [PASSED] reflect-y
[12:42:19] [PASSED] rotate-0
[12:42:19] [PASSED] rotate-90
[12:42:19] [PASSED] rotate-180
[12:42:19] [PASSED] rotate-270
[12:42:19] ============== [PASSED] drm_test_rect_rotate ===============
[12:42:19] ================ drm_test_rect_rotate_inv  =================
[12:42:19] [PASSED] reflect-x
[12:42:19] [PASSED] reflect-y
[12:42:19] [PASSED] rotate-0
[12:42:19] [PASSED] rotate-90
[12:42:19] [PASSED] rotate-180
[12:42:19] [PASSED] rotate-270
[12:42:19] ============ [PASSED] drm_test_rect_rotate_inv =============
[12:42:19] ==================== [PASSED] drm_rect =====================
[12:42:19] ============ drm_sysfb_modeset_test (1 subtest) ============
[12:42:19] ============ drm_test_sysfb_build_fourcc_list  =============
[12:42:19] [PASSED] no native formats
[12:42:19] [PASSED] XRGB8888 as native format
[12:42:19] [PASSED] remove duplicates
[12:42:19] [PASSED] convert alpha formats
[12:42:19] [PASSED] random formats
[12:42:19] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[12:42:19] ============= [PASSED] drm_sysfb_modeset_test ==============
[12:42:19] ================== drm_fixp (2 subtests) ===================
[12:42:19] [PASSED] drm_test_int2fixp
[12:42:19] [PASSED] drm_test_sm2fixp
[12:42:19] ==================== [PASSED] drm_fixp =====================
[12:42:19] ============================================================
[12:42:19] Testing complete. Ran 637 tests: passed: 637
[12:42:19] Elapsed time: 27.012s total, 1.832s configuring, 25.011s building, 0.156s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[12:42:20] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:42:21] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:42:31] Starting KUnit Kernel (1/1)...
[12:42:31] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:42:32] ================= ttm_device (5 subtests) ==================
[12:42:32] [PASSED] ttm_device_init_basic
[12:42:32] [PASSED] ttm_device_init_multiple
[12:42:32] [PASSED] ttm_device_fini_basic
[12:42:32] [PASSED] ttm_device_init_no_vma_man
[12:42:32] ================== ttm_device_init_pools  ==================
[12:42:32] [PASSED] No DMA allocations, no DMA32 required
[12:42:32] [PASSED] DMA allocations, DMA32 required
[12:42:32] [PASSED] No DMA allocations, DMA32 required
[12:42:32] [PASSED] DMA allocations, no DMA32 required
[12:42:32] ============== [PASSED] ttm_device_init_pools ==============
[12:42:32] =================== [PASSED] ttm_device ====================
[12:42:32] ================== ttm_pool (8 subtests) ===================
[12:42:32] ================== ttm_pool_alloc_basic  ===================
[12:42:32] [PASSED] One page
[12:42:32] [PASSED] More than one page
[12:42:32] [PASSED] Above the allocation limit
[12:42:32] [PASSED] One page, with coherent DMA mappings enabled
[12:42:32] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:42:32] ============== [PASSED] ttm_pool_alloc_basic ===============
[12:42:32] ============== ttm_pool_alloc_basic_dma_addr  ==============
[12:42:32] [PASSED] One page
[12:42:32] [PASSED] More than one page
[12:42:32] [PASSED] Above the allocation limit
[12:42:32] [PASSED] One page, with coherent DMA mappings enabled
[12:42:32] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:42:32] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[12:42:32] [PASSED] ttm_pool_alloc_order_caching_match
[12:42:32] [PASSED] ttm_pool_alloc_caching_mismatch
[12:42:32] [PASSED] ttm_pool_alloc_order_mismatch
[12:42:32] [PASSED] ttm_pool_free_dma_alloc
[12:42:32] [PASSED] ttm_pool_free_no_dma_alloc
[12:42:32] [PASSED] ttm_pool_fini_basic
[12:42:32] ==================== [PASSED] ttm_pool =====================
[12:42:32] ================ ttm_resource (8 subtests) =================
[12:42:32] ================= ttm_resource_init_basic  =================
[12:42:32] [PASSED] Init resource in TTM_PL_SYSTEM
[12:42:32] [PASSED] Init resource in TTM_PL_VRAM
[12:42:32] [PASSED] Init resource in a private placement
[12:42:32] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[12:42:32] ============= [PASSED] ttm_resource_init_basic =============
[12:42:32] [PASSED] ttm_resource_init_pinned
[12:42:32] [PASSED] ttm_resource_fini_basic
[12:42:32] [PASSED] ttm_resource_manager_init_basic
[12:42:32] [PASSED] ttm_resource_manager_usage_basic
[12:42:32] [PASSED] ttm_resource_manager_set_used_basic
[12:42:32] [PASSED] ttm_sys_man_alloc_basic
[12:42:32] [PASSED] ttm_sys_man_free_basic
[12:42:32] ================== [PASSED] ttm_resource ===================
[12:42:32] =================== ttm_tt (15 subtests) ===================
[12:42:32] ==================== ttm_tt_init_basic  ====================
[12:42:32] [PASSED] Page-aligned size
[12:42:32] [PASSED] Extra pages requested
[12:42:32] ================ [PASSED] ttm_tt_init_basic ================
[12:42:32] [PASSED] ttm_tt_init_misaligned
[12:42:32] [PASSED] ttm_tt_fini_basic
[12:42:32] [PASSED] ttm_tt_fini_sg
[12:42:32] [PASSED] ttm_tt_fini_shmem
[12:42:32] [PASSED] ttm_tt_create_basic
[12:42:32] [PASSED] ttm_tt_create_invalid_bo_type
[12:42:32] [PASSED] ttm_tt_create_ttm_exists
[12:42:32] [PASSED] ttm_tt_create_failed
[12:42:32] [PASSED] ttm_tt_destroy_basic
[12:42:32] [PASSED] ttm_tt_populate_null_ttm
[12:42:32] [PASSED] ttm_tt_populate_populated_ttm
[12:42:32] [PASSED] ttm_tt_unpopulate_basic
[12:42:32] [PASSED] ttm_tt_unpopulate_empty_ttm
[12:42:32] [PASSED] ttm_tt_swapin_basic
[12:42:32] ===================== [PASSED] ttm_tt ======================
[12:42:32] =================== ttm_bo (14 subtests) ===================
[12:42:32] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[12:42:32] [PASSED] Cannot be interrupted and sleeps
[12:42:32] [PASSED] Cannot be interrupted, locks straight away
[12:42:32] [PASSED] Can be interrupted, sleeps
[12:42:32] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[12:42:32] [PASSED] ttm_bo_reserve_locked_no_sleep
[12:42:32] [PASSED] ttm_bo_reserve_no_wait_ticket
[12:42:32] [PASSED] ttm_bo_reserve_double_resv
[12:42:32] [PASSED] ttm_bo_reserve_interrupted
[12:42:32] [PASSED] ttm_bo_reserve_deadlock
[12:42:32] [PASSED] ttm_bo_unreserve_basic
[12:42:32] [PASSED] ttm_bo_unreserve_pinned
[12:42:32] [PASSED] ttm_bo_unreserve_bulk
[12:42:32] [PASSED] ttm_bo_fini_basic
[12:42:32] [PASSED] ttm_bo_fini_shared_resv
[12:42:32] [PASSED] ttm_bo_pin_basic
[12:42:32] [PASSED] ttm_bo_pin_unpin_resource
[12:42:32] [PASSED] ttm_bo_multiple_pin_one_unpin
[12:42:32] ===================== [PASSED] ttm_bo ======================
[12:42:32] ============== ttm_bo_validate (22 subtests) ===============
[12:42:32] ============== ttm_bo_init_reserved_sys_man  ===============
[12:42:32] [PASSED] Buffer object for userspace
[12:42:32] [PASSED] Kernel buffer object
[12:42:32] [PASSED] Shared buffer object
[12:42:32] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[12:42:32] ============== ttm_bo_init_reserved_mock_man  ==============
[12:42:32] [PASSED] Buffer object for userspace
[12:42:32] [PASSED] Kernel buffer object
[12:42:32] [PASSED] Shared buffer object
[12:42:32] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[12:42:32] [PASSED] ttm_bo_init_reserved_resv
[12:42:32] ================== ttm_bo_validate_basic  ==================
[12:42:32] [PASSED] Buffer object for userspace
[12:42:32] [PASSED] Kernel buffer object
[12:42:32] [PASSED] Shared buffer object
[12:42:32] ============== [PASSED] ttm_bo_validate_basic ==============
[12:42:32] [PASSED] ttm_bo_validate_invalid_placement
[12:42:32] ============= ttm_bo_validate_same_placement  ==============
[12:42:32] [PASSED] System manager
[12:42:32] [PASSED] VRAM manager
[12:42:32] ========= [PASSED] ttm_bo_validate_same_placement ==========
[12:42:32] [PASSED] ttm_bo_validate_failed_alloc
[12:42:32] [PASSED] ttm_bo_validate_pinned
[12:42:32] [PASSED] ttm_bo_validate_busy_placement
[12:42:32] ================ ttm_bo_validate_multihop  =================
[12:42:32] [PASSED] Buffer object for userspace
[12:42:32] [PASSED] Kernel buffer object
[12:42:32] [PASSED] Shared buffer object
[12:42:32] ============ [PASSED] ttm_bo_validate_multihop =============
[12:42:32] ========== ttm_bo_validate_no_placement_signaled  ==========
[12:42:32] [PASSED] Buffer object in system domain, no page vector
[12:42:32] [PASSED] Buffer object in system domain with an existing page vector
[12:42:32] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[12:42:32] ======== ttm_bo_validate_no_placement_not_signaled  ========
[12:42:32] [PASSED] Buffer object for userspace
[12:42:32] [PASSED] Kernel buffer object
[12:42:32] [PASSED] Shared buffer object
[12:42:32] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[12:42:32] [PASSED] ttm_bo_validate_move_fence_signaled
[12:42:32] ========= ttm_bo_validate_move_fence_not_signaled  =========
[12:42:32] [PASSED] Waits for GPU
[12:42:32] [PASSED] Tries to lock straight away
[12:42:32] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[12:42:32] [PASSED] ttm_bo_validate_swapout
[12:42:32] [PASSED] ttm_bo_validate_happy_evict
[12:42:32] [PASSED] ttm_bo_validate_all_pinned_evict
[12:42:32] [PASSED] ttm_bo_validate_allowed_only_evict
[12:42:32] [PASSED] ttm_bo_validate_deleted_evict
[12:42:32] [PASSED] ttm_bo_validate_busy_domain_evict
[12:42:32] [PASSED] ttm_bo_validate_evict_gutting
[12:42:32] [PASSED] ttm_bo_validate_recrusive_evict
[12:42:32] ================= [PASSED] ttm_bo_validate =================
[12:42:32] ============================================================
[12:42:32] Testing complete. Ran 102 tests: passed: 102
[12:42:32] Elapsed time: 12.137s total, 1.786s configuring, 10.136s building, 0.180s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[12:42:32] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:42:34] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:42:42] Starting KUnit Kernel (1/1)...
[12:42:42] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:42:42] =============== dma-buf-fence (12 subtests) ================
[12:42:42] [PASSED] test_sanitycheck
[12:42:42] [PASSED] test_signaling
[12:42:42] [PASSED] test_add_callback
[12:42:42] [PASSED] test_late_add_callback
[12:42:42] [PASSED] test_rm_callback
[12:42:42] [PASSED] test_late_rm_callback
[12:42:42] [PASSED] test_status
[12:42:42] [PASSED] test_error
[12:42:42] [PASSED] test_wait
[12:42:42] [PASSED] test_wait_timeout
[12:42:42] [PASSED] test_stub
[12:42:42] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[12:42:42] ================== [PASSED] dma-buf-fence ==================
[12:42:42] ============ dma-buf-fence-chain (11 subtests) =============
[12:42:42] [PASSED] test_sanitycheck
[12:42:42] [PASSED] test_find_seqno
[12:42:42] [PASSED] test_find_signaled
[12:42:42] [PASSED] test_find_out_of_order
[12:42:47] [PASSED] test_find_gap
[12:42:47] [PASSED] test_find_race
[12:42:47] [PASSED] test_signal_forward
[12:42:48] [PASSED] test_signal_backward
[12:42:48] [PASSED] test_wait_forward
[12:42:48] [PASSED] test_wait_backward
[12:42:48] [PASSED] test_wait_random
[12:42:48] =============== [PASSED] dma-buf-fence-chain ===============
[12:42:48] ============ dma-buf-fence-unwrap (10 subtests) ============
[12:42:48] [PASSED] test_sanitycheck
[12:42:48] [PASSED] test_unwrap_array
[12:42:48] [PASSED] test_unwrap_chain
[12:42:48] [PASSED] test_unwrap_chain_array
[12:42:48] [PASSED] test_unwrap_merge
[12:42:48] [PASSED] test_unwrap_merge_duplicate
[12:42:48] [PASSED] test_unwrap_merge_seqno
[12:42:48] [PASSED] test_unwrap_merge_order
[12:42:48] [PASSED] test_unwrap_merge_complex
[12:42:48] [PASSED] test_unwrap_merge_complex_seqno
[12:42:48] ============== [PASSED] dma-buf-fence-unwrap ===============
[12:42:48] ================ dma-buf-resv (5 subtests) =================
[12:42:48] [PASSED] test_sanitycheck
[12:42:48] ===================== test_signaling  ======================
[12:42:48] [PASSED] kernel
[12:42:48] [PASSED] write
[12:42:48] [PASSED] read
[12:42:48] [PASSED] bookkeep
[12:42:48] ================= [PASSED] test_signaling ==================
[12:42:48] ====================== test_for_each  ======================
[12:42:48] [PASSED] kernel
[12:42:48] [PASSED] write
[12:42:48] [PASSED] read
[12:42:48] [PASSED] bookkeep
[12:42:48] ================== [PASSED] test_for_each ==================
[12:42:48] ================= test_for_each_unlocked  ==================
[12:42:48] [PASSED] kernel
[12:42:48] [PASSED] write
[12:42:48] [PASSED] read
[12:42:48] [PASSED] bookkeep
[12:42:48] ============= [PASSED] test_for_each_unlocked ==============
[12:42:48] ===================== test_get_fences  =====================
[12:42:48] [PASSED] kernel
[12:42:48] [PASSED] write
[12:42:48] [PASSED] read
[12:42:48] [PASSED] bookkeep
[12:42:48] ================= [PASSED] test_get_fences =================
[12:42:48] ================== [PASSED] dma-buf-resv ===================
[12:42:48] ============================================================
[12:42:48] Testing complete. Ran 50 tests: passed: 49, skipped: 1
[12:42:48] Elapsed time: 15.860s total, 1.800s configuring, 8.688s building, 5.355s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v2 6/7] drm/i915: only timeout on fence waits for display reset
  2026-08-27 12:34 ` [PATCH v2 6/7] drm/i915: only timeout on fence waits for display reset Jani Nikula
@ 2026-08-27 12:49   ` sashiko-bot
  2026-08-29  8:51   ` Maarten Lankhorst
  1 sibling, 0 replies; 14+ messages in thread
From: sashiko-bot @ 2026-08-27 12:49 UTC (permalink / raw)
  To: Jani Nikula; +Cc: intel-xe, intel-gfx

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] Calling a sleeping function (dma_fence_wait_timeout) from an atomic context path (intel_atomic_commit_tail).
--

commit 70671f62d3480e316b53a7ec34d9d047347fa4af
Author: Jani Nikula <jani.nikula@intel.com>

drm/i915: only timeout on fence waits for display reset

This commit restricts the timeout on fence waits to older platforms where
a GPU reset clobbers the display, or when running forced display reset
tests. For other platforms, it switches the timeout to MAX_SCHEDULE_TIMEOUT.

> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 64fa582a64102..42222b930943d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c

[ ... ]

> @@ -7228,15 +7229,20 @@ static void intel_atomic_commit_fence_wait(struct intel_atomic_state *state)
>  	struct intel_display *display = to_intel_display(state);
>  	struct drm_plane *plane;
>  	struct drm_plane_state *new_plane_state;
> -	long ret;
> +	long timeout, ret;
>  	int i;
>  
> +	if (intel_display_reset_needed_after_gpu_reset(display) ||
> +	    intel_display_reset_test(display))
> +		timeout = i915_fence_timeout();
> +	else
> +		timeout = MAX_SCHEDULE_TIMEOUT;
> +
>  	for_each_new_plane_in_state(&state->base, plane, new_plane_state, i) {
>  		if (!new_plane_state->fence)
>  			continue;
>  
> -		ret = dma_fence_wait_timeout(new_plane_state->fence, false,
> -					     i915_fence_timeout());
> +		ret = dma_fence_wait_timeout(new_plane_state->fence, false, timeout);

[Severity: High]
This isn't a bug introduced by this patch, but does this result in calling a
sleeping function from an atomic context?

The DRM subsystem guidelines explicitly define intel_atomic_commit_tail() and
its variants as atomic context paths where sleeping is forbidden. This code
is reached during an atomic display commit via:

intel_atomic_commit_tail()
   intel_atomic_commit_fence_wait()
      dma_fence_wait_timeout() -> might_sleep()

While this patch only modifies the timeout value (which doesn't introduce the
bug), the underlying call to a sleeping function from a forbidden atomic
context remains. Can this cause kernel warnings or potential deadlocks during
userspace modeset or pageflip requests?

>  		if (!ret)
>  			ret = -ETIMEDOUT;
>  		if (ret < 0) {

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1787833879.git.jani.nikula@intel.com?part=6

^ permalink raw reply	[flat|nested] 14+ messages in thread

* ✓ Xe.CI.BAT: success for drm/{i915, xe}/display: another stab at i915_fence_timeout() removal (rev2)
  2026-08-27 12:34 [PATCH v2 0/7] drm/{i915, xe}/display: another stab at i915_fence_timeout() removal Jani Nikula
                   ` (8 preceding siblings ...)
  2026-08-27 12:42 ` ✓ CI.KUnit: success " Patchwork
@ 2026-08-27 13:42 ` Patchwork
  2026-08-27 15:02 ` ✓ Xe.CI.FULL: " Patchwork
  10 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2026-08-27 13:42 UTC (permalink / raw)
  To: Jani Nikula; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 989 bytes --]

== Series Details ==

Series: drm/{i915, xe}/display: another stab at i915_fence_timeout() removal (rev2)
URL   : https://patchwork.freedesktop.org/series/172457/
State : success

== Summary ==

CI Bug Log - changes from xe-5652-098021382451783ea6448fa7f0e2a4cbc395c3d2_BAT -> xe-pw-172457v2_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-5652-098021382451783ea6448fa7f0e2a4cbc395c3d2 -> xe-pw-172457v2

  IGT_9076: 8f42b0189d73d9912ad58c99cfaa4ff46c20fcc3 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5652-098021382451783ea6448fa7f0e2a4cbc395c3d2: 098021382451783ea6448fa7f0e2a4cbc395c3d2
  xe-pw-172457v2: 172457v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/index.html

[-- Attachment #2: Type: text/html, Size: 1537 bytes --]

^ permalink raw reply	[flat|nested] 14+ messages in thread

* ✓ Xe.CI.FULL: success for drm/{i915, xe}/display: another stab at i915_fence_timeout() removal (rev2)
  2026-08-27 12:34 [PATCH v2 0/7] drm/{i915, xe}/display: another stab at i915_fence_timeout() removal Jani Nikula
                   ` (9 preceding siblings ...)
  2026-08-27 13:42 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-08-27 15:02 ` Patchwork
  10 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2026-08-27 15:02 UTC (permalink / raw)
  To: Jani Nikula; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 22923 bytes --]

== Series Details ==

Series: drm/{i915, xe}/display: another stab at i915_fence_timeout() removal (rev2)
URL   : https://patchwork.freedesktop.org/series/172457/
State : success

== Summary ==

CI Bug Log - changes from xe-5652-098021382451783ea6448fa7f0e2a4cbc395c3d2_FULL -> xe-pw-172457v2_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-172457v2_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@x-tiled-32bpp-rotate-90:
    - shard-lnl:          NOTRUN -> [SKIP][1] ([Intel XE#1407])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
    - shard-lnl:          [PASS][2] -> [FAIL][3] ([Intel XE#8628])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5652-098021382451783ea6448fa7f0e2a4cbc395c3d2/shard-lnl-5/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-8/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#1124])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-5/igt@kms_big_fb@y-tiled-16bpp-rotate-270.html

  * igt@kms_bw@linear-tiling-3-displays-target-1920x1080p:
    - shard-lnl:          NOTRUN -> [SKIP][5] ([Intel XE#367])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_bw@linear-tiling-3-displays-target-1920x1080p.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#3432])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][7] ([Intel XE#2887])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs.html

  * igt@kms_chamelium_color@gamma:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2325] / [Intel XE#7358])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-7/igt@kms_chamelium_color@gamma.html

  * igt@kms_chamelium_color_pipeline@plane-ctm3x4-lut1d:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#7358])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-8/igt@kms_chamelium_color_pipeline@plane-ctm3x4-lut1d.html

  * igt@kms_chamelium_hpd@dp-hpd-for-each-pipe:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2252])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-5/igt@kms_chamelium_hpd@dp-hpd-for-each-pipe.html

  * igt@kms_chamelium_hpd@hdmi-hpd:
    - shard-lnl:          NOTRUN -> [SKIP][11] ([Intel XE#373])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_chamelium_hpd@hdmi-hpd.html

  * igt@kms_content_protection@srm:
    - shard-bmg:          NOTRUN -> [FAIL][12] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-5/igt@kms_content_protection@srm.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#2321] / [Intel XE#7355])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-5/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic:
    - shard-lnl:          NOTRUN -> [SKIP][14] ([Intel XE#309] / [Intel XE#7343])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html

  * igt@kms_dsc@dsc-with-bpc-formats-bigjoiner:
    - shard-lnl:          NOTRUN -> [SKIP][15] ([Intel XE#8265])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_dsc@dsc-with-bpc-formats-bigjoiner.html

  * igt@kms_dsc@dsc-with-bpc-formats-ultrajoiner:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#8265])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-7/igt@kms_dsc@dsc-with-bpc-formats-ultrajoiner.html

  * igt@kms_flip@2x-plain-flip-ts-check-interruptible:
    - shard-bmg:          [PASS][17] -> [FAIL][18] ([Intel XE#3098] / [Intel XE#3149]) +1 other test fail
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5652-098021382451783ea6448fa7f0e2a4cbc395c3d2/shard-bmg-8/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-9/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#7178] / [Intel XE#7351])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-7/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-shrfb-msflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][20] ([Intel XE#6312] / [Intel XE#651]) +3 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-shrfb-plflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][21] ([Intel XE#656] / [Intel XE#7905]) +4 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#4141]) +2 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][23] ([Intel XE#7061] / [Intel XE#7356])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcdrrs-argb161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-pri-shrfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#2311]) +8 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#2313]) +16 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-abgr161616f-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#7061] / [Intel XE#7356])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-abgr161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@hdr-argb161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#7061])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-8/igt@kms_frontbuffer_tracking@hdr-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-indfb-plflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][28] ([Intel XE#7865]) +4 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-shrfb-msflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][29] ([Intel XE#7905]) +4 other tests skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][30] ([Intel XE#7061])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#7308])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-8/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping:
    - shard-lnl:          NOTRUN -> [SKIP][32] ([Intel XE#7283])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-modifiers:
    - shard-lnl:          NOTRUN -> [SKIP][33] ([Intel XE#2763] / [Intel XE#6886]) +3 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-modifiers.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-lnl:          NOTRUN -> [SKIP][34] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#1489])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-7/igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area.html

  * igt@kms_psr@fbc-pr-primary-render:
    - shard-lnl:          NOTRUN -> [SKIP][36] ([Intel XE#1406])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_psr@fbc-pr-primary-render.html

  * igt@kms_psr@pr-cursor-plane-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#2234] / [Intel XE#2850]) +3 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-8/igt@kms_psr@pr-cursor-plane-onoff.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
    - shard-lnl:          NOTRUN -> [SKIP][38] ([Intel XE#1127] / [Intel XE#5813])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [PASS][39] -> [INCOMPLETE][40] ([Intel XE#6321] / [Intel XE#8355])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5652-098021382451783ea6448fa7f0e2a4cbc395c3d2/shard-bmg-7/igt@xe_evict@evict-mixed-many-threads-small.html
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-4/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_exec_balancer@many-execqueues-parallel-userptr-invalidate:
    - shard-lnl:          NOTRUN -> [SKIP][41] ([Intel XE#7482]) +2 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@xe_exec_balancer@many-execqueues-parallel-userptr-invalidate.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#2322] / [Intel XE#7372]) +1 other test skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-5/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr.html

  * igt@xe_exec_fault_mode@many-multi-queue-imm:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#8374]) +1 other test skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-5/igt@xe_exec_fault_mode@many-multi-queue-imm.html

  * igt@xe_exec_fault_mode@twice-multi-queue-userptr-invalidate-race-imm:
    - shard-lnl:          NOTRUN -> [SKIP][44] ([Intel XE#8374])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@xe_exec_fault_mode@twice-multi-queue-userptr-invalidate-race-imm.html

  * igt@xe_exec_multi_queue@many-execs-preempt-mode-dyn-priority:
    - shard-lnl:          NOTRUN -> [SKIP][45] ([Intel XE#8364]) +3 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@xe_exec_multi_queue@many-execs-preempt-mode-dyn-priority.html

  * igt@xe_exec_multi_queue@two-queues-basic-smem:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#8364]) +3 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-5/igt@xe_exec_multi_queue@two-queues-basic-smem.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-single-vma:
    - shard-lnl:          NOTRUN -> [SKIP][47] ([Intel XE#6196])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-single-vma.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#8378])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-5/igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind.html

  * igt@xe_exec_threads@threads-multi-queue-cm-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][49] ([Intel XE#8378])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@xe_exec_threads@threads-multi-queue-cm-rebind.html

  * igt@xe_module_load@many-reload:
    - shard-bmg:          [PASS][50] -> [ABORT][51] ([Intel XE#8007]) +1 other test abort
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5652-098021382451783ea6448fa7f0e2a4cbc395c3d2/shard-bmg-4/igt@xe_module_load@many-reload.html
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-10/igt@xe_module_load@many-reload.html

  * igt@xe_multigpu_svm@mgpu-xgpu-access-basic:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#6964])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-7/igt@xe_multigpu_svm@mgpu-xgpu-access-basic.html

  * igt@xe_query@multigpu-query-config:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#944])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-5/igt@xe_query@multigpu-query-config.html

  * igt@xe_sriov_flr@flr-each-isolation:
    - shard-bmg:          NOTRUN -> [FAIL][54] ([Intel XE#7992])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-5/igt@xe_sriov_flr@flr-each-isolation.html

  * igt@xe_sriov_flr@flr-twice:
    - shard-lnl:          NOTRUN -> [SKIP][55] ([Intel XE#4273])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@xe_sriov_flr@flr-twice.html

  
#### Possible fixes ####

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
    - shard-lnl:          [FAIL][56] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][57]
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5652-098021382451783ea6448fa7f0e2a4cbc395c3d2/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [SKIP][58] ([Intel XE#1503]) -> [PASS][59]
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5652-098021382451783ea6448fa7f0e2a4cbc395c3d2/shard-bmg-5/igt@kms_hdr@invalid-hdr.html
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-6/igt@kms_hdr@invalid-hdr.html

  * igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_create:
    - shard-bmg:          [ABORT][60] ([Intel XE#8007]) -> [PASS][61] +1 other test pass
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5652-098021382451783ea6448fa7f0e2a4cbc395c3d2/shard-bmg-3/igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_create.html
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-7/igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_create.html

  
#### Warnings ####

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [FAIL][62] ([Intel XE#301] / [Intel XE#3149]) -> [FAIL][63] ([Intel XE#301])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5652-098021382451783ea6448fa7f0e2a4cbc395c3d2/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][64] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][65] ([Intel XE#3544])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5652-098021382451783ea6448fa7f0e2a4cbc395c3d2/shard-bmg-2/igt@kms_hdr@brightness-with-hdr.html
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html

  * igt@xe_wedged@basic-wedged:
    - shard-lnl:          [ABORT][66] ([Intel XE#8963]) -> [DMESG-WARN][67] ([Intel XE#8963])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5652-098021382451783ea6448fa7f0e2a4cbc395c3d2/shard-lnl-5/igt@xe_wedged@basic-wedged.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/shard-lnl-4/igt@xe_wedged@basic-wedged.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4273]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4273
  [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
  [Intel XE#6196]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6196
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7308
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
  [Intel XE#7992]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7992
  [Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8628]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8628
  [Intel XE#8963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8963
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-5652-098021382451783ea6448fa7f0e2a4cbc395c3d2 -> xe-pw-172457v2

  IGT_9076: 8f42b0189d73d9912ad58c99cfaa4ff46c20fcc3 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5652-098021382451783ea6448fa7f0e2a4cbc395c3d2: 098021382451783ea6448fa7f0e2a4cbc395c3d2
  xe-pw-172457v2: 172457v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-172457v2/index.html

[-- Attachment #2: Type: text/html, Size: 25875 bytes --]

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v2 6/7] drm/i915: only timeout on fence waits for display reset
  2026-08-27 12:34 ` [PATCH v2 6/7] drm/i915: only timeout on fence waits for display reset Jani Nikula
  2026-08-27 12:49   ` sashiko-bot
@ 2026-08-29  8:51   ` Maarten Lankhorst
  1 sibling, 0 replies; 14+ messages in thread
From: Maarten Lankhorst @ 2026-08-29  8:51 UTC (permalink / raw)
  To: Jani Nikula, intel-gfx, intel-xe; +Cc: maarten.lankhorst, ville.syrjala

For whole series:

Acked-by: Maarten Lankhorst <maarten.lankhorst@intel.com>

On 8/27/26 14:34, Jani Nikula wrote:
> As written by Maarten: Not waiting on fences until they're signaled is
> an existing issue in i915, and was added as a workaround for a deadlock
> when GPU reset has to reset display as well on old platforms. This
> requires a modeset to disable everything, which may hang since it could
> wait on a fence that may only be signaled after GPU reset completes.
>
> Limit the timeout on fence waits a) to platforms where GPU reset
> clobbers display, and b) when we're running forced display reset tests.
>
> This change only impacts i915, as xe has MAX_SCHEDULE_TIMEOUT in any
> case.
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Suggested-by: Maarten Lankhorst <maarten.lankhorst@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index aa5d41dac8a9..76ec9161aaa3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -74,6 +74,7 @@
>  #include "intel_display_driver.h"
>  #include "intel_display_power.h"
>  #include "intel_display_regs.h"
> +#include "intel_display_reset.h"
>  #include "intel_display_rpm.h"
>  #include "intel_display_types.h"
>  #include "intel_display_utils.h"
> @@ -7277,15 +7278,20 @@ static void intel_atomic_commit_fence_wait(struct intel_atomic_state *state)
>  	struct intel_display *display = to_intel_display(state);
>  	struct drm_plane *plane;
>  	struct drm_plane_state *new_plane_state;
> -	long ret;
> +	long timeout, ret;
>  	int i;
>  
> +	if (intel_display_reset_needed_after_gpu_reset(display) ||
> +	    intel_display_reset_test(display))
> +		timeout = i915_fence_timeout();
> +	else
> +		timeout = MAX_SCHEDULE_TIMEOUT;
> +
>  	for_each_new_plane_in_state(&state->base, plane, new_plane_state, i) {
>  		if (!new_plane_state->fence)
>  			continue;
>  
> -		ret = dma_fence_wait_timeout(new_plane_state->fence, false,
> -					     i915_fence_timeout());
> +		ret = dma_fence_wait_timeout(new_plane_state->fence, false, timeout);
>  		if (!ret)
>  			ret = -ETIMEDOUT;
>  		if (ret < 0) {


^ permalink raw reply	[flat|nested] 14+ messages in thread

end of thread, other threads:[~2026-08-29  8:49 UTC | newest]

Thread overview: 14+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-08-27 12:34 [PATCH v2 0/7] drm/{i915, xe}/display: another stab at i915_fence_timeout() removal Jani Nikula
2026-08-27 12:34 ` [PATCH v2 1/7] drm/i915/reset: move gpu_reset_clobbers_display platform property to display Jani Nikula
2026-08-27 12:34 ` [PATCH v2 2/7] drm/i915/reset: make intel_display_reset_supported() static Jani Nikula
2026-08-27 12:34 ` [PATCH v2 3/7] drm/i915/display: use struct intel_atomic_state *state variable naming Jani Nikula
2026-08-27 12:34 ` [PATCH v2 4/7] drm/i915/display: reduce indent in intel_atomic_commit_fence_wait() Jani Nikula
2026-08-27 12:34 ` [PATCH v2 5/7] drm/i915/display: debug log about fence wait timeouts and other errors Jani Nikula
2026-08-27 12:34 ` [PATCH v2 6/7] drm/i915: only timeout on fence waits for display reset Jani Nikula
2026-08-27 12:49   ` sashiko-bot
2026-08-29  8:51   ` Maarten Lankhorst
2026-08-27 12:34 ` [PATCH v2 7/7] drm/i915/display: use fixed 10 second timeout for fence wait Jani Nikula
2026-08-27 12:41 ` ✗ CI.checkpatch: warning for drm/{i915, xe}/display: another stab at i915_fence_timeout() removal (rev2) Patchwork
2026-08-27 12:42 ` ✓ CI.KUnit: success " Patchwork
2026-08-27 13:42 ` ✓ Xe.CI.BAT: " Patchwork
2026-08-27 15:02 ` ✓ Xe.CI.FULL: " Patchwork

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