[PATCH v6 0/8] drm/i915: Add drm_panic support

[PATCH v6 0/8] drm/i915: Add drm_panic support

[Jocelyn Falempe]

This is a draft of drm_panic support for i915.

I've tested it on the 4 intel laptops I have at my disposal.
 * Haswell with 128MB of eDRAM.
 * Comet Lake  i7-10850H
 * Raptor Lake i7-1370P (with DPT, and Y-tiling).
 * Lunar Lake Ultra 5 228V (with DPT, and 4-tiling, and using the Xe driver.

I tested panic in both fbdev console and gnome desktop.

Best regards,

v2:
 * Add the proper abstractions to build also for Xe.
 * Fix dim checkpatch issues.

v3:
 * Add support for Y-tiled framebuffer when DPT is enabled.

v4:
 * Add support for Xe driver, which shares most of the code.
 * Add support for 4-tiled framebuffer found in newest GPU.

v5:
 * Rebase on top of git@gitlab.freedesktop.org:drm/i915/kernel.git drm-intel-next
 * Use struct intel_display instead of drm_i915_private.
 * Use iosys_map for intel_bo_panic_map().

v6:
 * Rebase on top of git@gitlab.freedesktop.org:drm/i915/kernel.git drm-intel-next
 * Use struct intel_display instead of drm_i915_private for intel_atomic_plane.c

Jocelyn Falempe (8):
  drm/i915/fbdev: Add intel_fbdev_get_map()
  drm/i915/display/i9xx: Add a disable_tiling() for i9xx planes
  drm/i915/display: Add a disable_tiling() for skl planes
  drm/i915/gem: Add i915_gem_object_panic_map()
  drm/i915/display: Add drm_panic support
  drm/i915/display: Flush the front buffer in panic handler
  drm/i915/display: Add drm_panic support for Y-tiling with DPT
  drm/i915/display: Add drm_panic support for 4-tiling with DPT

 drivers/gpu/drm/i915/display/i9xx_plane.c     |  23 +++
 .../gpu/drm/i915/display/intel_atomic_plane.c | 169 +++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_bo.c       |   5 +
 drivers/gpu/drm/i915/display/intel_bo.h       |   1 +
 .../drm/i915/display/intel_display_types.h    |   2 +
 drivers/gpu/drm/i915/display/intel_fb_pin.c   |   5 +
 drivers/gpu/drm/i915/display/intel_fb_pin.h   |   2 +
 drivers/gpu/drm/i915/display/intel_fbdev.c    |   5 +
 drivers/gpu/drm/i915/display/intel_fbdev.h    |   6 +-
 .../drm/i915/display/skl_universal_plane.c    |  27 +++
 drivers/gpu/drm/i915/gem/i915_gem_object.h    |   2 +
 drivers/gpu/drm/i915/gem/i915_gem_pages.c     |  29 +++
 drivers/gpu/drm/i915/i915_vma.h               |   5 +
 drivers/gpu/drm/xe/display/intel_bo.c         |  10 ++
 drivers/gpu/drm/xe/display/xe_fb_pin.c        |   5 +
 15 files changed, 294 insertions(+), 2 deletions(-)


base-commit: 010363c4618920838ca8777fdabd46871d289bf9
-- 
2.49.0

[PATCH v6 1/8] drm/i915/fbdev: Add intel_fbdev_get_map()

[Jocelyn Falempe]

The vaddr of the fbdev framebuffer is private to the struct
intel_fbdev, so this function is needed to access it for drm_panic.
Also the struct i915_vma is different between i915 and xe, so it
requires a few functions to access fbdev->vma->iomap.

Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
---

v2:
 * Add intel_fb_get_vaddr() and i915_vma_get_iomap() to build with Xe driver.
 
v4:
 * rename to get_map(), and return the struct iosys_map mapping.
 * implement the Xe variant.

 drivers/gpu/drm/i915/display/intel_fb_pin.c | 5 +++++
 drivers/gpu/drm/i915/display/intel_fb_pin.h | 2 ++
 drivers/gpu/drm/i915/display/intel_fbdev.c  | 5 +++++
 drivers/gpu/drm/i915/display/intel_fbdev.h  | 6 +++++-
 drivers/gpu/drm/i915/i915_vma.h             | 5 +++++
 drivers/gpu/drm/xe/display/xe_fb_pin.c      | 5 +++++
 6 files changed, 27 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c
index c648ab8a93d7..7f1c21eb12e0 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
@@ -333,3 +333,8 @@ void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state)
 			intel_dpt_unpin_from_ggtt(fb->dpt_vm);
 	}
 }
+
+void intel_fb_get_map(struct i915_vma *vma, struct iosys_map *map)
+{
+	iosys_map_set_vaddr_iomem(map, i915_vma_get_iomap(vma));
+}
diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
index 01770dbba2e0..81ab79da1af7 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
@@ -12,6 +12,7 @@ struct drm_framebuffer;
 struct i915_vma;
 struct intel_plane_state;
 struct i915_gtt_view;
+struct iosys_map;
 
 struct i915_vma *
 intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
@@ -27,5 +28,6 @@ void intel_fb_unpin_vma(struct i915_vma *vma, unsigned long flags);
 int intel_plane_pin_fb(struct intel_plane_state *new_plane_state,
 		       const struct intel_plane_state *old_plane_state);
 void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state);
+void intel_fb_get_map(struct i915_vma *vma, struct iosys_map *map);
 
 #endif
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index 369f46286e95..5fdf71c3c74e 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -516,3 +516,8 @@ struct i915_vma *intel_fbdev_vma_pointer(struct intel_fbdev *fbdev)
 {
 	return fbdev ? fbdev->vma : NULL;
 }
+
+void intel_fbdev_get_map(struct intel_fbdev *fbdev, struct iosys_map *map)
+{
+	intel_fb_get_map(fbdev->vma, map);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.h b/drivers/gpu/drm/i915/display/intel_fbdev.h
index 89bad3a2b01a..a4b3d6dd538f 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.h
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.h
@@ -13,6 +13,7 @@ struct drm_fb_helper_surface_size;
 struct drm_i915_private;
 struct intel_fbdev;
 struct intel_framebuffer;
+struct iosys_map;
 
 #ifdef CONFIG_DRM_FBDEV_EMULATION
 int intel_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper,
@@ -22,7 +23,7 @@ int intel_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper,
 void intel_fbdev_setup(struct drm_i915_private *dev_priv);
 struct intel_framebuffer *intel_fbdev_framebuffer(struct intel_fbdev *fbdev);
 struct i915_vma *intel_fbdev_vma_pointer(struct intel_fbdev *fbdev);
-
+void intel_fbdev_get_map(struct intel_fbdev *fbdev, struct iosys_map *map);
 #else
 #define INTEL_FBDEV_DRIVER_OPS \
 	.fbdev_probe = NULL
@@ -39,6 +40,9 @@ static inline struct i915_vma *intel_fbdev_vma_pointer(struct intel_fbdev *fbdev
 	return NULL;
 }
 
+static inline void intel_fbdev_get_map(struct intel_fbdev *fbdev, struct iosys_map *map)
+{
+}
 #endif
 
 #endif /* __INTEL_FBDEV_H__ */
diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h
index 6a6be8048aa8..4ae610927fa7 100644
--- a/drivers/gpu/drm/i915/i915_vma.h
+++ b/drivers/gpu/drm/i915/i915_vma.h
@@ -353,6 +353,11 @@ static inline bool i915_node_color_differs(const struct drm_mm_node *node,
 	return drm_mm_node_allocated(node) && node->color != color;
 }
 
+static inline void __iomem *i915_vma_get_iomap(struct i915_vma *vma)
+{
+	return READ_ONCE(vma->iomap);
+}
+
 /**
  * i915_vma_pin_iomap - calls ioremap_wc to map the GGTT VMA via the aperture
  * @vma: VMA to iomap
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index b69896baa20c..b10ab7def601 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -463,3 +463,8 @@ u64 intel_dpt_offset(struct i915_vma *dpt_vma)
 {
 	return 0;
 }
+
+void intel_fb_get_map(struct i915_vma *vma, struct iosys_map *map)
+{
+	*map = vma->bo->vmap;
+}
-- 
2.49.0

[PATCH v6 2/8] drm/i915/display/i9xx: Add a disable_tiling() for i9xx planes

[Jocelyn Falempe]

drm_panic draws in linear framebuffer, so it's easier to re-use the
current framebuffer, and disable tiling in the panic handler, to show
the panic screen.

Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
---
 drivers/gpu/drm/i915/display/i9xx_plane.c     | 23 +++++++++++++++++++
 .../drm/i915/display/intel_display_types.h    |  2 ++
 2 files changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
index 5e8344fdfc28..9c93d5ac7129 100644
--- a/drivers/gpu/drm/i915/display/i9xx_plane.c
+++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
@@ -908,6 +908,27 @@ static const struct drm_plane_funcs i8xx_plane_funcs = {
 	.format_mod_supported = i8xx_plane_format_mod_supported,
 };
 
+static void i9xx_disable_tiling(struct intel_plane *plane)
+{
+	struct intel_display *display = to_intel_display(plane);
+	enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
+	u32 dspcntr;
+	u32 reg;
+
+	dspcntr = intel_de_read_fw(display, DSPCNTR(display, i9xx_plane));
+	dspcntr &= ~DISP_TILED;
+	intel_de_write_fw(display, DSPCNTR(display, i9xx_plane), dspcntr);
+
+	if (DISPLAY_VER(display) >= 4) {
+		reg = intel_de_read_fw(display, DSPSURF(display, i9xx_plane));
+		intel_de_write_fw(display, DSPSURF(display, i9xx_plane), reg);
+
+	} else {
+		reg = intel_de_read_fw(display, DSPADDR(display, i9xx_plane));
+		intel_de_write_fw(display, DSPADDR(display, i9xx_plane), reg);
+	}
+}
+
 struct intel_plane *
 intel_primary_plane_create(struct intel_display *display, enum pipe pipe)
 {
@@ -1050,6 +1071,8 @@ intel_primary_plane_create(struct intel_display *display, enum pipe pipe)
 		}
 	}
 
+	plane->disable_tiling = i9xx_disable_tiling;
+
 	modifiers = intel_fb_plane_get_modifiers(display, INTEL_PLANE_CAP_TILING_X);
 
 	if (DISPLAY_VER(display) >= 5 || display->platform.g4x)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 367b53a9eae2..62d0785c9edf 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1512,6 +1512,8 @@ struct intel_plane {
 			   bool async_flip);
 	void (*enable_flip_done)(struct intel_plane *plane);
 	void (*disable_flip_done)(struct intel_plane *plane);
+	/* For drm_panic */
+	void (*disable_tiling)(struct intel_plane *plane);
 };
 
 #define to_intel_atomic_state(x) container_of(x, struct intel_atomic_state, base)
-- 
2.49.0

Re: [PATCH v6 2/8] drm/i915/display/i9xx: Add a disable_tiling() for i9xx planes

[Ville Syrjälä]

On Tue, Apr 01, 2025 at 02:51:08PM +0200, Jocelyn Falempe wrote:
> drm_panic draws in linear framebuffer, so it's easier to re-use the
> current framebuffer, and disable tiling in the panic handler, to show
> the panic screen.
> 
> Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
> ---
>  drivers/gpu/drm/i915/display/i9xx_plane.c     | 23 +++++++++++++++++++
>  .../drm/i915/display/intel_display_types.h    |  2 ++
>  2 files changed, 25 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
> index 5e8344fdfc28..9c93d5ac7129 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_plane.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
> @@ -908,6 +908,27 @@ static const struct drm_plane_funcs i8xx_plane_funcs = {
>  	.format_mod_supported = i8xx_plane_format_mod_supported,
>  };
>  
> +static void i9xx_disable_tiling(struct intel_plane *plane)
> +{
> +	struct intel_display *display = to_intel_display(plane);
> +	enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
> +	u32 dspcntr;
> +	u32 reg;
> +
> +	dspcntr = intel_de_read_fw(display, DSPCNTR(display, i9xx_plane));
> +	dspcntr &= ~DISP_TILED;
> +	intel_de_write_fw(display, DSPCNTR(display, i9xx_plane), dspcntr);

This fails to account all the different alignment/etc. restrictions
between linear vs. tiled. I don't think we want hacks like this.

> +
> +	if (DISPLAY_VER(display) >= 4) {
> +		reg = intel_de_read_fw(display, DSPSURF(display, i9xx_plane));
> +		intel_de_write_fw(display, DSPSURF(display, i9xx_plane), reg);
> +
> +	} else {
> +		reg = intel_de_read_fw(display, DSPADDR(display, i9xx_plane));
> +		intel_de_write_fw(display, DSPADDR(display, i9xx_plane), reg);
> +	}
> +}
> +
>  struct intel_plane *
>  intel_primary_plane_create(struct intel_display *display, enum pipe pipe)
>  {
> @@ -1050,6 +1071,8 @@ intel_primary_plane_create(struct intel_display *display, enum pipe pipe)
>  		}
>  	}
>  
> +	plane->disable_tiling = i9xx_disable_tiling;
> +
>  	modifiers = intel_fb_plane_get_modifiers(display, INTEL_PLANE_CAP_TILING_X);
>  
>  	if (DISPLAY_VER(display) >= 5 || display->platform.g4x)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 367b53a9eae2..62d0785c9edf 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1512,6 +1512,8 @@ struct intel_plane {
>  			   bool async_flip);
>  	void (*enable_flip_done)(struct intel_plane *plane);
>  	void (*disable_flip_done)(struct intel_plane *plane);
> +	/* For drm_panic */
> +	void (*disable_tiling)(struct intel_plane *plane);
>  };
>  
>  #define to_intel_atomic_state(x) container_of(x, struct intel_atomic_state, base)
> -- 
> 2.49.0

-- 
Ville Syrjälä
Intel

Re: [PATCH v6 2/8] drm/i915/display/i9xx: Add a disable_tiling() for i9xx planes

[Jocelyn Falempe]

On 01/04/2025 19:38, Ville Syrjälä wrote:
> On Tue, Apr 01, 2025 at 02:51:08PM +0200, Jocelyn Falempe wrote:
>> drm_panic draws in linear framebuffer, so it's easier to re-use the
>> current framebuffer, and disable tiling in the panic handler, to show
>> the panic screen.
>>
>> Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
>> ---
>>   drivers/gpu/drm/i915/display/i9xx_plane.c     | 23 +++++++++++++++++++
>>   .../drm/i915/display/intel_display_types.h    |  2 ++
>>   2 files changed, 25 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
>> index 5e8344fdfc28..9c93d5ac7129 100644
>> --- a/drivers/gpu/drm/i915/display/i9xx_plane.c
>> +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
>> @@ -908,6 +908,27 @@ static const struct drm_plane_funcs i8xx_plane_funcs = {
>>   	.format_mod_supported = i8xx_plane_format_mod_supported,
>>   };
>>   
>> +static void i9xx_disable_tiling(struct intel_plane *plane)
>> +{
>> +	struct intel_display *display = to_intel_display(plane);
>> +	enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
>> +	u32 dspcntr;
>> +	u32 reg;
>> +
>> +	dspcntr = intel_de_read_fw(display, DSPCNTR(display, i9xx_plane));
>> +	dspcntr &= ~DISP_TILED;
>> +	intel_de_write_fw(display, DSPCNTR(display, i9xx_plane), dspcntr);
> 
> This fails to account all the different alignment/etc. restrictions
> between linear vs. tiled. I don't think we want hacks like this.

Thanks for taking a look.
I assumed that linear have always less alignment restrictions than 
tiled. I also assumed that the framebuffer size in linear is smaller 
than tiled (as we keep the same pixel format). So going from tiled to 
linear should be safe, the other way is not.

It's done this way in amdgpu [1], but I agree it might be different on 
Intel hardware

The alternative is to draw with tiling, which is what I have done for 
Y-tile and 4-tile format, so it's also a possibility, but more complex 
to maintain.

[1] 
https://elixir.bootlin.com/linux/v6.14-rc6/source/drivers/gpu/drm/amd/display/dc/core/dc_surface.c#L298

Best regards,

-- 

Jocelyn

> 
>> +
>> +	if (DISPLAY_VER(display) >= 4) {
>> +		reg = intel_de_read_fw(display, DSPSURF(display, i9xx_plane));
>> +		intel_de_write_fw(display, DSPSURF(display, i9xx_plane), reg);
>> +
>> +	} else {
>> +		reg = intel_de_read_fw(display, DSPADDR(display, i9xx_plane));
>> +		intel_de_write_fw(display, DSPADDR(display, i9xx_plane), reg);
>> +	}
>> +}
>> +
>>   struct intel_plane *
>>   intel_primary_plane_create(struct intel_display *display, enum pipe pipe)
>>   {
>> @@ -1050,6 +1071,8 @@ intel_primary_plane_create(struct intel_display *display, enum pipe pipe)
>>   		}
>>   	}
>>   
>> +	plane->disable_tiling = i9xx_disable_tiling;
>> +
>>   	modifiers = intel_fb_plane_get_modifiers(display, INTEL_PLANE_CAP_TILING_X);
>>   
>>   	if (DISPLAY_VER(display) >= 5 || display->platform.g4x)
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
>> index 367b53a9eae2..62d0785c9edf 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
>> @@ -1512,6 +1512,8 @@ struct intel_plane {
>>   			   bool async_flip);
>>   	void (*enable_flip_done)(struct intel_plane *plane);
>>   	void (*disable_flip_done)(struct intel_plane *plane);
>> +	/* For drm_panic */
>> +	void (*disable_tiling)(struct intel_plane *plane);
>>   };
>>   
>>   #define to_intel_atomic_state(x) container_of(x, struct intel_atomic_state, base)
>> -- 
>> 2.49.0
> 

[PATCH v6 3/8] drm/i915/display: Add a disable_tiling() for skl planes

[Jocelyn Falempe]

drm_panic draws in linear framebuffer, so it's easier to re-use the
current framebuffer, and disable tiling in the panic handler, to show
the panic screen.

Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
---
 .../drm/i915/display/skl_universal_plane.c    | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 8739195aba69..64a1e8e7122d 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2790,6 +2790,25 @@ static u8 tgl_plane_caps(struct intel_display *display,
 	return caps;
 }
 
+static void skl_disable_tiling(struct intel_plane *plane)
+{
+	struct intel_plane_state *state = to_intel_plane_state(plane->base.state);
+	struct intel_display *display = to_intel_display(plane);
+	u32 stride = state->view.color_plane[0].scanout_stride / 64;
+	u32 plane_ctl;
+
+	plane_ctl = intel_de_read(display, PLANE_CTL(plane->pipe, plane->id));
+	plane_ctl &= ~PLANE_CTL_TILED_MASK;
+
+	intel_de_write_fw(display, PLANE_STRIDE(plane->pipe, plane->id),
+			  PLANE_STRIDE_(stride));
+
+	intel_de_write_fw(display, PLANE_CTL(plane->pipe, plane->id), plane_ctl);
+
+	intel_de_write_fw(display, PLANE_SURF(plane->pipe, plane->id),
+			  skl_plane_surf(state, 0));
+}
+
 struct intel_plane *
 skl_universal_plane_create(struct intel_display *display,
 			   enum pipe pipe, enum plane_id plane_id)
@@ -2836,6 +2855,7 @@ skl_universal_plane_create(struct intel_display *display,
 		plane->max_height = skl_plane_max_height;
 		plane->min_cdclk = skl_plane_min_cdclk;
 	}
+	plane->disable_tiling = skl_disable_tiling;
 
 	if (DISPLAY_VER(display) >= 13)
 		plane->max_stride = adl_plane_max_stride;
-- 
2.49.0

[PATCH v6 4/8] drm/i915/gem: Add i915_gem_object_panic_map()

[Jocelyn Falempe]

Prepare the work for drm_panic support. This is used to map the
current framebuffer, so the CPU can overwrite it with the panic
message.

Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
---

v5:
 * Use iosys_map for intel_bo_panic_map().

 drivers/gpu/drm/i915/display/intel_bo.c    |  5 ++++
 drivers/gpu/drm/i915/display/intel_bo.h    |  1 +
 drivers/gpu/drm/i915/gem/i915_gem_object.h |  2 ++
 drivers/gpu/drm/i915/gem/i915_gem_pages.c  | 29 ++++++++++++++++++++++
 drivers/gpu/drm/xe/display/intel_bo.c      | 10 ++++++++
 5 files changed, 47 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bo.c b/drivers/gpu/drm/i915/display/intel_bo.c
index fbd16d7b58d9..ac904e9ec7d5 100644
--- a/drivers/gpu/drm/i915/display/intel_bo.c
+++ b/drivers/gpu/drm/i915/display/intel_bo.c
@@ -57,3 +57,8 @@ void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj)
 {
 	i915_debugfs_describe_obj(m, to_intel_bo(obj));
 }
+
+void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map)
+{
+	i915_gem_object_panic_map(to_intel_bo(obj), map);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_bo.h b/drivers/gpu/drm/i915/display/intel_bo.h
index ea7a2253aaa5..5b6c63d99786 100644
--- a/drivers/gpu/drm/i915/display/intel_bo.h
+++ b/drivers/gpu/drm/i915/display/intel_bo.h
@@ -23,5 +23,6 @@ struct intel_frontbuffer *intel_bo_set_frontbuffer(struct drm_gem_object *obj,
 						   struct intel_frontbuffer *front);
 
 void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj);
+void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map);
 
 #endif /* __INTEL_BO__ */
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index a5f34542135c..b16092707ea5 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -692,6 +692,8 @@ i915_gem_object_unpin_pages(struct drm_i915_gem_object *obj)
 int __i915_gem_object_put_pages(struct drm_i915_gem_object *obj);
 int i915_gem_object_truncate(struct drm_i915_gem_object *obj);
 
+void i915_gem_object_panic_map(struct drm_i915_gem_object *obj, struct iosys_map *map);
+
 /**
  * i915_gem_object_pin_map - return a contiguous mapping of the entire object
  * @obj: the object to map into kernel address space
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 8780aa243105..718bea6474d7 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -355,6 +355,35 @@ static void *i915_gem_object_map_pfn(struct drm_i915_gem_object *obj,
 	return vaddr ?: ERR_PTR(-ENOMEM);
 }
 
+/* Map the current framebuffer for CPU access. Called from panic handler, so no
+ * need to pin or cleanup.
+ */
+void i915_gem_object_panic_map(struct drm_i915_gem_object *obj, struct iosys_map *map)
+{
+	enum i915_map_type has_type;
+	void *ptr;
+
+	ptr = page_unpack_bits(obj->mm.mapping, &has_type);
+
+
+	if (!ptr) {
+		if (i915_gem_object_has_struct_page(obj))
+			ptr = i915_gem_object_map_page(obj, I915_MAP_WB);
+		else
+			ptr = i915_gem_object_map_pfn(obj, I915_MAP_WB);
+
+		if (IS_ERR(ptr))
+			return;
+
+		obj->mm.mapping = page_pack_bits(ptr, I915_MAP_WB);
+	}
+
+	if (i915_gem_object_has_iomem(obj))
+		iosys_map_set_vaddr_iomem(map, (void __iomem *) ptr);
+	else
+		iosys_map_set_vaddr(map, ptr);
+}
+
 /* get, pin, and map the pages of the object into kernel space */
 void *i915_gem_object_pin_map(struct drm_i915_gem_object *obj,
 			      enum i915_map_type type)
diff --git a/drivers/gpu/drm/xe/display/intel_bo.c b/drivers/gpu/drm/xe/display/intel_bo.c
index 27437c22bd70..c68166a64336 100644
--- a/drivers/gpu/drm/xe/display/intel_bo.c
+++ b/drivers/gpu/drm/xe/display/intel_bo.c
@@ -59,3 +59,13 @@ void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj)
 {
 	/* FIXME */
 }
+
+void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map)
+{
+	struct xe_bo *bo = gem_to_xe_bo(obj);
+	int ret;
+
+	ret = ttm_bo_vmap(&bo->ttm, map);
+	if (ret)
+		iosys_map_clear(map);
+}
-- 
2.49.0

Re: [PATCH v6 4/8] drm/i915/gem: Add i915_gem_object_panic_map()

[Ville Syrjälä]

On Tue, Apr 01, 2025 at 02:51:10PM +0200, Jocelyn Falempe wrote:
> Prepare the work for drm_panic support. This is used to map the
> current framebuffer, so the CPU can overwrite it with the panic
> message.
> 
> Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
> ---
> 
> v5:
>  * Use iosys_map for intel_bo_panic_map().
> 
>  drivers/gpu/drm/i915/display/intel_bo.c    |  5 ++++
>  drivers/gpu/drm/i915/display/intel_bo.h    |  1 +
>  drivers/gpu/drm/i915/gem/i915_gem_object.h |  2 ++
>  drivers/gpu/drm/i915/gem/i915_gem_pages.c  | 29 ++++++++++++++++++++++
>  drivers/gpu/drm/xe/display/intel_bo.c      | 10 ++++++++
>  5 files changed, 47 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bo.c b/drivers/gpu/drm/i915/display/intel_bo.c
> index fbd16d7b58d9..ac904e9ec7d5 100644
> --- a/drivers/gpu/drm/i915/display/intel_bo.c
> +++ b/drivers/gpu/drm/i915/display/intel_bo.c
> @@ -57,3 +57,8 @@ void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj)
>  {
>  	i915_debugfs_describe_obj(m, to_intel_bo(obj));
>  }
> +
> +void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map)
> +{
> +	i915_gem_object_panic_map(to_intel_bo(obj), map);
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_bo.h b/drivers/gpu/drm/i915/display/intel_bo.h
> index ea7a2253aaa5..5b6c63d99786 100644
> --- a/drivers/gpu/drm/i915/display/intel_bo.h
> +++ b/drivers/gpu/drm/i915/display/intel_bo.h
> @@ -23,5 +23,6 @@ struct intel_frontbuffer *intel_bo_set_frontbuffer(struct drm_gem_object *obj,
>  						   struct intel_frontbuffer *front);
>  
>  void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj);
> +void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map);
>  
>  #endif /* __INTEL_BO__ */
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h
> index a5f34542135c..b16092707ea5 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
> @@ -692,6 +692,8 @@ i915_gem_object_unpin_pages(struct drm_i915_gem_object *obj)
>  int __i915_gem_object_put_pages(struct drm_i915_gem_object *obj);
>  int i915_gem_object_truncate(struct drm_i915_gem_object *obj);
>  
> +void i915_gem_object_panic_map(struct drm_i915_gem_object *obj, struct iosys_map *map);
> +
>  /**
>   * i915_gem_object_pin_map - return a contiguous mapping of the entire object
>   * @obj: the object to map into kernel address space
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> index 8780aa243105..718bea6474d7 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> @@ -355,6 +355,35 @@ static void *i915_gem_object_map_pfn(struct drm_i915_gem_object *obj,
>  	return vaddr ?: ERR_PTR(-ENOMEM);
>  }
>  
> +/* Map the current framebuffer for CPU access. Called from panic handler, so no
> + * need to pin or cleanup.
> + */
> +void i915_gem_object_panic_map(struct drm_i915_gem_object *obj, struct iosys_map *map)
> +{
> +	enum i915_map_type has_type;
> +	void *ptr;
> +
> +	ptr = page_unpack_bits(obj->mm.mapping, &has_type);
> +
> +
> +	if (!ptr) {
> +		if (i915_gem_object_has_struct_page(obj))
> +			ptr = i915_gem_object_map_page(obj, I915_MAP_WB);
> +		else
> +			ptr = i915_gem_object_map_pfn(obj, I915_MAP_WB);

WB mapping would require clflushing to make it to the display.
Is that being done somewhere?

> +
> +		if (IS_ERR(ptr))
> +			return;

What happens when the mapping fails?

> +
> +		obj->mm.mapping = page_pack_bits(ptr, I915_MAP_WB);
> +	}
> +
> +	if (i915_gem_object_has_iomem(obj))
> +		iosys_map_set_vaddr_iomem(map, (void __iomem *) ptr);
> +	else
> +		iosys_map_set_vaddr(map, ptr);
> +}
> +
>  /* get, pin, and map the pages of the object into kernel space */
>  void *i915_gem_object_pin_map(struct drm_i915_gem_object *obj,
>  			      enum i915_map_type type)
> diff --git a/drivers/gpu/drm/xe/display/intel_bo.c b/drivers/gpu/drm/xe/display/intel_bo.c
> index 27437c22bd70..c68166a64336 100644
> --- a/drivers/gpu/drm/xe/display/intel_bo.c
> +++ b/drivers/gpu/drm/xe/display/intel_bo.c
> @@ -59,3 +59,13 @@ void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj)
>  {
>  	/* FIXME */
>  }
> +
> +void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map)
> +{
> +	struct xe_bo *bo = gem_to_xe_bo(obj);
> +	int ret;
> +
> +	ret = ttm_bo_vmap(&bo->ttm, map);
> +	if (ret)
> +		iosys_map_clear(map);
> +}
> -- 
> 2.49.0

-- 
Ville Syrjälä
Intel

Re: [PATCH v6 4/8] drm/i915/gem: Add i915_gem_object_panic_map()

[Ville Syrjälä]

On Tue, Apr 01, 2025 at 08:47:50PM +0300, Ville Syrjälä wrote:
> On Tue, Apr 01, 2025 at 02:51:10PM +0200, Jocelyn Falempe wrote:
> > Prepare the work for drm_panic support. This is used to map the
> > current framebuffer, so the CPU can overwrite it with the panic
> > message.
> > 
> > Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
> > ---
> > 
> > v5:
> >  * Use iosys_map for intel_bo_panic_map().
> > 
> >  drivers/gpu/drm/i915/display/intel_bo.c    |  5 ++++
> >  drivers/gpu/drm/i915/display/intel_bo.h    |  1 +
> >  drivers/gpu/drm/i915/gem/i915_gem_object.h |  2 ++
> >  drivers/gpu/drm/i915/gem/i915_gem_pages.c  | 29 ++++++++++++++++++++++
> >  drivers/gpu/drm/xe/display/intel_bo.c      | 10 ++++++++
> >  5 files changed, 47 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_bo.c b/drivers/gpu/drm/i915/display/intel_bo.c
> > index fbd16d7b58d9..ac904e9ec7d5 100644
> > --- a/drivers/gpu/drm/i915/display/intel_bo.c
> > +++ b/drivers/gpu/drm/i915/display/intel_bo.c
> > @@ -57,3 +57,8 @@ void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj)
> >  {
> >  	i915_debugfs_describe_obj(m, to_intel_bo(obj));
> >  }
> > +
> > +void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map)
> > +{
> > +	i915_gem_object_panic_map(to_intel_bo(obj), map);
> > +}
> > diff --git a/drivers/gpu/drm/i915/display/intel_bo.h b/drivers/gpu/drm/i915/display/intel_bo.h
> > index ea7a2253aaa5..5b6c63d99786 100644
> > --- a/drivers/gpu/drm/i915/display/intel_bo.h
> > +++ b/drivers/gpu/drm/i915/display/intel_bo.h
> > @@ -23,5 +23,6 @@ struct intel_frontbuffer *intel_bo_set_frontbuffer(struct drm_gem_object *obj,
> >  						   struct intel_frontbuffer *front);
> >  
> >  void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj);
> > +void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map);
> >  
> >  #endif /* __INTEL_BO__ */
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h
> > index a5f34542135c..b16092707ea5 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
> > @@ -692,6 +692,8 @@ i915_gem_object_unpin_pages(struct drm_i915_gem_object *obj)
> >  int __i915_gem_object_put_pages(struct drm_i915_gem_object *obj);
> >  int i915_gem_object_truncate(struct drm_i915_gem_object *obj);
> >  
> > +void i915_gem_object_panic_map(struct drm_i915_gem_object *obj, struct iosys_map *map);
> > +
> >  /**
> >   * i915_gem_object_pin_map - return a contiguous mapping of the entire object
> >   * @obj: the object to map into kernel address space
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> > index 8780aa243105..718bea6474d7 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> > @@ -355,6 +355,35 @@ static void *i915_gem_object_map_pfn(struct drm_i915_gem_object *obj,
> >  	return vaddr ?: ERR_PTR(-ENOMEM);
> >  }
> >  
> > +/* Map the current framebuffer for CPU access. Called from panic handler, so no
> > + * need to pin or cleanup.
> > + */
> > +void i915_gem_object_panic_map(struct drm_i915_gem_object *obj, struct iosys_map *map)
> > +{
> > +	enum i915_map_type has_type;
> > +	void *ptr;
> > +
> > +	ptr = page_unpack_bits(obj->mm.mapping, &has_type);
> > +
> > +
> > +	if (!ptr) {
> > +		if (i915_gem_object_has_struct_page(obj))
> > +			ptr = i915_gem_object_map_page(obj, I915_MAP_WB);
> > +		else
> > +			ptr = i915_gem_object_map_pfn(obj, I915_MAP_WB);
> 
> WB mapping would require clflushing to make it to the display.
> Is that being done somewhere?

This also seems to have a bunch of race conditions:
- what happens if the oops happens before the pages have
  even been swapped in?
- what happens if the oops happens before we've committed
  the fb to the hardware?

> 
> > +
> > +		if (IS_ERR(ptr))
> > +			return;
> 
> What happens when the mapping fails?
> 
> > +
> > +		obj->mm.mapping = page_pack_bits(ptr, I915_MAP_WB);
> > +	}
> > +
> > +	if (i915_gem_object_has_iomem(obj))
> > +		iosys_map_set_vaddr_iomem(map, (void __iomem *) ptr);
> > +	else
> > +		iosys_map_set_vaddr(map, ptr);
> > +}
> > +
> >  /* get, pin, and map the pages of the object into kernel space */
> >  void *i915_gem_object_pin_map(struct drm_i915_gem_object *obj,
> >  			      enum i915_map_type type)
> > diff --git a/drivers/gpu/drm/xe/display/intel_bo.c b/drivers/gpu/drm/xe/display/intel_bo.c
> > index 27437c22bd70..c68166a64336 100644
> > --- a/drivers/gpu/drm/xe/display/intel_bo.c
> > +++ b/drivers/gpu/drm/xe/display/intel_bo.c
> > @@ -59,3 +59,13 @@ void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj)
> >  {
> >  	/* FIXME */
> >  }
> > +
> > +void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map)
> > +{
> > +	struct xe_bo *bo = gem_to_xe_bo(obj);
> > +	int ret;
> > +
> > +	ret = ttm_bo_vmap(&bo->ttm, map);
> > +	if (ret)
> > +		iosys_map_clear(map);
> > +}
> > -- 
> > 2.49.0
> 
> -- 
> Ville Syrjälä
> Intel

-- 
Ville Syrjälä
Intel

Re: [PATCH v6 4/8] drm/i915/gem: Add i915_gem_object_panic_map()

[Jocelyn Falempe]

On 01/04/2025 19:57, Ville Syrjälä wrote:
> On Tue, Apr 01, 2025 at 08:47:50PM +0300, Ville Syrjälä wrote:
>> On Tue, Apr 01, 2025 at 02:51:10PM +0200, Jocelyn Falempe wrote:
>>> Prepare the work for drm_panic support. This is used to map the
>>> current framebuffer, so the CPU can overwrite it with the panic
>>> message.
>>>
>>> Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
>>> ---
>>>
>>> v5:
>>>   * Use iosys_map for intel_bo_panic_map().
>>>
>>>   drivers/gpu/drm/i915/display/intel_bo.c    |  5 ++++
>>>   drivers/gpu/drm/i915/display/intel_bo.h    |  1 +
>>>   drivers/gpu/drm/i915/gem/i915_gem_object.h |  2 ++
>>>   drivers/gpu/drm/i915/gem/i915_gem_pages.c  | 29 ++++++++++++++++++++++
>>>   drivers/gpu/drm/xe/display/intel_bo.c      | 10 ++++++++
>>>   5 files changed, 47 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_bo.c b/drivers/gpu/drm/i915/display/intel_bo.c
>>> index fbd16d7b58d9..ac904e9ec7d5 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_bo.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_bo.c
>>> @@ -57,3 +57,8 @@ void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj)
>>>   {
>>>   	i915_debugfs_describe_obj(m, to_intel_bo(obj));
>>>   }
>>> +
>>> +void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map)
>>> +{
>>> +	i915_gem_object_panic_map(to_intel_bo(obj), map);
>>> +}
>>> diff --git a/drivers/gpu/drm/i915/display/intel_bo.h b/drivers/gpu/drm/i915/display/intel_bo.h
>>> index ea7a2253aaa5..5b6c63d99786 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_bo.h
>>> +++ b/drivers/gpu/drm/i915/display/intel_bo.h
>>> @@ -23,5 +23,6 @@ struct intel_frontbuffer *intel_bo_set_frontbuffer(struct drm_gem_object *obj,
>>>   						   struct intel_frontbuffer *front);
>>>   
>>>   void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj);
>>> +void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map);
>>>   
>>>   #endif /* __INTEL_BO__ */
>>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h
>>> index a5f34542135c..b16092707ea5 100644
>>> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
>>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
>>> @@ -692,6 +692,8 @@ i915_gem_object_unpin_pages(struct drm_i915_gem_object *obj)
>>>   int __i915_gem_object_put_pages(struct drm_i915_gem_object *obj);
>>>   int i915_gem_object_truncate(struct drm_i915_gem_object *obj);
>>>   
>>> +void i915_gem_object_panic_map(struct drm_i915_gem_object *obj, struct iosys_map *map);
>>> +
>>>   /**
>>>    * i915_gem_object_pin_map - return a contiguous mapping of the entire object
>>>    * @obj: the object to map into kernel address space
>>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
>>> index 8780aa243105..718bea6474d7 100644
>>> --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
>>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
>>> @@ -355,6 +355,35 @@ static void *i915_gem_object_map_pfn(struct drm_i915_gem_object *obj,
>>>   	return vaddr ?: ERR_PTR(-ENOMEM);
>>>   }
>>>   
>>> +/* Map the current framebuffer for CPU access. Called from panic handler, so no
>>> + * need to pin or cleanup.
>>> + */
>>> +void i915_gem_object_panic_map(struct drm_i915_gem_object *obj, struct iosys_map *map)
>>> +{
>>> +	enum i915_map_type has_type;
>>> +	void *ptr;
>>> +
>>> +	ptr = page_unpack_bits(obj->mm.mapping, &has_type);
>>> +
>>> +
>>> +	if (!ptr) {
>>> +		if (i915_gem_object_has_struct_page(obj))
>>> +			ptr = i915_gem_object_map_page(obj, I915_MAP_WB);
>>> +		else
>>> +			ptr = i915_gem_object_map_pfn(obj, I915_MAP_WB);
>>
>> WB mapping would require clflushing to make it to the display.
>> Is that being done somewhere?
> 
> This also seems to have a bunch of race conditions:
> - what happens if the oops happens before the pages have
>    even been swapped in?
> - what happens if the oops happens before we've committed
>    the fb to the hardware?
> 

The panic handler tries to take the panic_lock from the 
device->mode_config, which should ensure we're not in the middle of a 
page swap.

https://elixir.bootlin.com/linux/v6.14-rc6/source/include/drm/drm_panic.h#L70

https://elixir.bootlin.com/linux/v6.14-rc6/source/include/drm/drm_mode_config.h#L500

If the lock is already taken when the panic handler run, it will skip 
this device, and won't draw the panic screen on it.

Best regards,

-- 

Jocelyn

>>
>>> +
>>> +		if (IS_ERR(ptr))
>>> +			return;
>>
>> What happens when the mapping fails?
>>
>>> +
>>> +		obj->mm.mapping = page_pack_bits(ptr, I915_MAP_WB);
>>> +	}
>>> +
>>> +	if (i915_gem_object_has_iomem(obj))
>>> +		iosys_map_set_vaddr_iomem(map, (void __iomem *) ptr);
>>> +	else
>>> +		iosys_map_set_vaddr(map, ptr);
>>> +}
>>> +
>>>   /* get, pin, and map the pages of the object into kernel space */
>>>   void *i915_gem_object_pin_map(struct drm_i915_gem_object *obj,
>>>   			      enum i915_map_type type)
>>> diff --git a/drivers/gpu/drm/xe/display/intel_bo.c b/drivers/gpu/drm/xe/display/intel_bo.c
>>> index 27437c22bd70..c68166a64336 100644
>>> --- a/drivers/gpu/drm/xe/display/intel_bo.c
>>> +++ b/drivers/gpu/drm/xe/display/intel_bo.c
>>> @@ -59,3 +59,13 @@ void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj)
>>>   {
>>>   	/* FIXME */
>>>   }
>>> +
>>> +void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map)
>>> +{
>>> +	struct xe_bo *bo = gem_to_xe_bo(obj);
>>> +	int ret;
>>> +
>>> +	ret = ttm_bo_vmap(&bo->ttm, map);
>>> +	if (ret)
>>> +		iosys_map_clear(map);
>>> +}
>>> -- 
>>> 2.49.0
>>
>> -- 
>> Ville Syrjälä
>> Intel
> 

Re: [PATCH v6 4/8] drm/i915/gem: Add i915_gem_object_panic_map()

[Jocelyn Falempe]

On 01/04/2025 19:47, Ville Syrjälä wrote:
> On Tue, Apr 01, 2025 at 02:51:10PM +0200, Jocelyn Falempe wrote:
>> Prepare the work for drm_panic support. This is used to map the
>> current framebuffer, so the CPU can overwrite it with the panic
>> message.
>>
>> Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
>> ---
>>
>> v5:
>>   * Use iosys_map for intel_bo_panic_map().
>>
>>   drivers/gpu/drm/i915/display/intel_bo.c    |  5 ++++
>>   drivers/gpu/drm/i915/display/intel_bo.h    |  1 +
>>   drivers/gpu/drm/i915/gem/i915_gem_object.h |  2 ++
>>   drivers/gpu/drm/i915/gem/i915_gem_pages.c  | 29 ++++++++++++++++++++++
>>   drivers/gpu/drm/xe/display/intel_bo.c      | 10 ++++++++
>>   5 files changed, 47 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_bo.c b/drivers/gpu/drm/i915/display/intel_bo.c
>> index fbd16d7b58d9..ac904e9ec7d5 100644
>> --- a/drivers/gpu/drm/i915/display/intel_bo.c
>> +++ b/drivers/gpu/drm/i915/display/intel_bo.c
>> @@ -57,3 +57,8 @@ void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj)
>>   {
>>   	i915_debugfs_describe_obj(m, to_intel_bo(obj));
>>   }
>> +
>> +void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map)
>> +{
>> +	i915_gem_object_panic_map(to_intel_bo(obj), map);
>> +}
>> diff --git a/drivers/gpu/drm/i915/display/intel_bo.h b/drivers/gpu/drm/i915/display/intel_bo.h
>> index ea7a2253aaa5..5b6c63d99786 100644
>> --- a/drivers/gpu/drm/i915/display/intel_bo.h
>> +++ b/drivers/gpu/drm/i915/display/intel_bo.h
>> @@ -23,5 +23,6 @@ struct intel_frontbuffer *intel_bo_set_frontbuffer(struct drm_gem_object *obj,
>>   						   struct intel_frontbuffer *front);
>>   
>>   void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj);
>> +void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map);
>>   
>>   #endif /* __INTEL_BO__ */
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h
>> index a5f34542135c..b16092707ea5 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
>> @@ -692,6 +692,8 @@ i915_gem_object_unpin_pages(struct drm_i915_gem_object *obj)
>>   int __i915_gem_object_put_pages(struct drm_i915_gem_object *obj);
>>   int i915_gem_object_truncate(struct drm_i915_gem_object *obj);
>>   
>> +void i915_gem_object_panic_map(struct drm_i915_gem_object *obj, struct iosys_map *map);
>> +
>>   /**
>>    * i915_gem_object_pin_map - return a contiguous mapping of the entire object
>>    * @obj: the object to map into kernel address space
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
>> index 8780aa243105..718bea6474d7 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
>> @@ -355,6 +355,35 @@ static void *i915_gem_object_map_pfn(struct drm_i915_gem_object *obj,
>>   	return vaddr ?: ERR_PTR(-ENOMEM);
>>   }
>>   
>> +/* Map the current framebuffer for CPU access. Called from panic handler, so no
>> + * need to pin or cleanup.
>> + */
>> +void i915_gem_object_panic_map(struct drm_i915_gem_object *obj, struct iosys_map *map)
>> +{
>> +	enum i915_map_type has_type;
>> +	void *ptr;
>> +
>> +	ptr = page_unpack_bits(obj->mm.mapping, &has_type);
>> +
>> +
>> +	if (!ptr) {
>> +		if (i915_gem_object_has_struct_page(obj))
>> +			ptr = i915_gem_object_map_page(obj, I915_MAP_WB);
>> +		else
>> +			ptr = i915_gem_object_map_pfn(obj, I915_MAP_WB);
> 
> WB mapping would require clflushing to make it to the display.
> Is that being done somewhere?

Yes, it's done in intel_panic_flush() in patch 5, otherwise the panic 
screen is not displayed.

> 
>> +
>> +		if (IS_ERR(ptr))
>> +			return;
> 
> What happens when the mapping fails?

In intel_get_scanout_buffer(), the iosys_map is cleared before calling 
this function. Then it checks iosys_map_is_null(), and returns an error 
if it is.
I can add a comment, or I can change the function type to return an int, 
  that would probably be cleaner.

> 
>> +
>> +		obj->mm.mapping = page_pack_bits(ptr, I915_MAP_WB);
>> +	}
>> +
>> +	if (i915_gem_object_has_iomem(obj))
>> +		iosys_map_set_vaddr_iomem(map, (void __iomem *) ptr);
>> +	else
>> +		iosys_map_set_vaddr(map, ptr);
>> +}
>> +
>>   /* get, pin, and map the pages of the object into kernel space */
>>   void *i915_gem_object_pin_map(struct drm_i915_gem_object *obj,
>>   			      enum i915_map_type type)
>> diff --git a/drivers/gpu/drm/xe/display/intel_bo.c b/drivers/gpu/drm/xe/display/intel_bo.c
>> index 27437c22bd70..c68166a64336 100644
>> --- a/drivers/gpu/drm/xe/display/intel_bo.c
>> +++ b/drivers/gpu/drm/xe/display/intel_bo.c
>> @@ -59,3 +59,13 @@ void intel_bo_describe(struct seq_file *m, struct drm_gem_object *obj)
>>   {
>>   	/* FIXME */
>>   }
>> +
>> +void intel_bo_panic_map(struct drm_gem_object *obj, struct iosys_map *map)
>> +{
>> +	struct xe_bo *bo = gem_to_xe_bo(obj);
>> +	int ret;
>> +
>> +	ret = ttm_bo_vmap(&bo->ttm, map);
>> +	if (ret)
>> +		iosys_map_clear(map);
>> +}
>> -- 
>> 2.49.0
> 

[PATCH v6 5/8] drm/i915/display: Add drm_panic support

[Jocelyn Falempe]

This adds drm_panic support for a wide range of Intel GPU. I've
tested it only on 4 laptops, Haswell (with 128MB of eDRAM),
Comet Lake, Raptor Lake, and Lunar Lake.
For hardware using DPT, it's not possible to disable tiling, as you
will need to reconfigure the way the GPU is accessing the
framebuffer.

Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
---

v4:
 * Add support for Xe driver.
 
v6:
 * Use struct intel_display instead of drm_i915_private for intel_atomic_plane.c 

 .../gpu/drm/i915/display/intel_atomic_plane.c | 79 ++++++++++++++++++-
 1 file changed, 78 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 7276179df878..eebf20fafaeb 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -33,13 +33,16 @@
 
 #include <linux/dma-fence-chain.h>
 #include <linux/dma-resv.h>
+#include <linux/iosys-map.h>
 
 #include <drm/drm_atomic_helper.h>
 #include <drm/drm_blend.h>
 #include <drm/drm_damage_helper.h>
+#include <drm/drm_cache.h>
 #include <drm/drm_fourcc.h>
 #include <drm/drm_gem.h>
 #include <drm/drm_gem_atomic_helper.h>
+#include <drm/drm_panic.h>
 
 #include "gem/i915_gem_object.h"
 #include "i915_config.h"
@@ -47,6 +50,7 @@
 #include "i915_vma.h"
 #include "i9xx_plane_regs.h"
 #include "intel_atomic_plane.h"
+#include "intel_bo.h"
 #include "intel_cdclk.h"
 #include "intel_cursor.h"
 #include "intel_display_rps.h"
@@ -54,6 +58,7 @@
 #include "intel_display_types.h"
 #include "intel_fb.h"
 #include "intel_fb_pin.h"
+#include "intel_fbdev.h"
 #include "skl_scaler.h"
 #include "skl_universal_plane.h"
 #include "skl_watermark.h"
@@ -1251,14 +1256,86 @@ intel_cleanup_plane_fb(struct drm_plane *plane,
 	intel_plane_unpin_fb(old_plane_state);
 }
 
+/* Only used by drm_panic get_scanout_buffer() and panic_flush(), so it is
+ * protected by the drm panic spinlock
+ */
+static struct iosys_map panic_map;
+
+static void intel_panic_flush(struct drm_plane *plane)
+{
+	struct intel_plane_state *plane_state = to_intel_plane_state(plane->state);
+	struct intel_plane *iplane = to_intel_plane(plane);
+	struct intel_display *display = to_intel_display(iplane);
+	struct drm_framebuffer *fb = plane_state->hw.fb;
+
+	/* Force a cache flush, otherwise the new pixels won't show up */
+	drm_clflush_virt_range(panic_map.vaddr, fb->height * fb->pitches[0]);
+
+	/* Don't disable tiling if it's the fbdev framebuffer.*/
+	if (to_intel_framebuffer(fb) == intel_fbdev_framebuffer(display->fbdev.fbdev)) {
+		return;
+
+	if (fb->modifier && iplane->disable_tiling)
+		iplane->disable_tiling(iplane);
+}
+
+static int intel_get_scanout_buffer(struct drm_plane *plane,
+				    struct drm_scanout_buffer *sb)
+{
+	struct intel_plane_state *plane_state;
+	struct drm_gem_object *obj;
+	struct drm_framebuffer *fb;
+	struct intel_display *display = to_intel_display(plane->dev);
+
+	if (!plane->state || !plane->state->fb || !plane->state->visible)
+		return -ENODEV;
+
+	plane_state = to_intel_plane_state(plane->state);
+	fb = plane_state->hw.fb;
+	obj = intel_fb_bo(fb);
+	if (!obj)
+		return -ENODEV;
+
+	iosys_map_clear(&panic_map);
+	if (to_intel_framebuffer(fb) == intel_fbdev_framebuffer(display->fbdev.fbdev)) {
+		intel_fbdev_get_map(display->fbdev.fbdev, &panic_map);
+	} else {
+		/* Can't disable tiling if DPT is in use */
+		if (intel_fb_uses_dpt(fb))
+			return -EOPNOTSUPP;
+
+		intel_bo_panic_map(obj, &panic_map);
+	}
+	if (iosys_map_is_null(&panic_map))
+		return -ENOMEM;
+
+	sb->map[0] = panic_map;
+	sb->width = fb->width;
+	sb->height = fb->height;
+	sb->format = fb->format;
+	sb->pitch[0] = fb->pitches[0];
+
+	return 0;
+}
+
 static const struct drm_plane_helper_funcs intel_plane_helper_funcs = {
 	.prepare_fb = intel_prepare_plane_fb,
 	.cleanup_fb = intel_cleanup_plane_fb,
 };
 
+static const struct drm_plane_helper_funcs intel_primary_plane_helper_funcs = {
+	.prepare_fb = intel_prepare_plane_fb,
+	.cleanup_fb = intel_cleanup_plane_fb,
+	.get_scanout_buffer = intel_get_scanout_buffer,
+	.panic_flush = intel_panic_flush,
+};
+
 void intel_plane_helper_add(struct intel_plane *plane)
 {
-	drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs);
+	if (plane->base.type == DRM_PLANE_TYPE_PRIMARY)
+		drm_plane_helper_add(&plane->base, &intel_primary_plane_helper_funcs);
+	else
+		drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs);
 }
 
 void intel_plane_init_cursor_vblank_work(struct intel_plane_state *old_plane_state,
-- 
2.49.0

Re: [PATCH v6 5/8] drm/i915/display: Add drm_panic support

[Jani Nikula]

On Tue, 01 Apr 2025, Jocelyn Falempe <jfalempe@redhat.com> wrote:
> This adds drm_panic support for a wide range of Intel GPU. I've
> tested it only on 4 laptops, Haswell (with 128MB of eDRAM),
> Comet Lake, Raptor Lake, and Lunar Lake.
> For hardware using DPT, it's not possible to disable tiling, as you
> will need to reconfigure the way the GPU is accessing the
> framebuffer.
>
> Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
> ---
>
> v4:
>  * Add support for Xe driver.
>  
> v6:
>  * Use struct intel_display instead of drm_i915_private for intel_atomic_plane.c 
>
>  .../gpu/drm/i915/display/intel_atomic_plane.c | 79 ++++++++++++++++++-
>  1 file changed, 78 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index 7276179df878..eebf20fafaeb 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -33,13 +33,16 @@
>  
>  #include <linux/dma-fence-chain.h>
>  #include <linux/dma-resv.h>
> +#include <linux/iosys-map.h>
>  
>  #include <drm/drm_atomic_helper.h>
>  #include <drm/drm_blend.h>
>  #include <drm/drm_damage_helper.h>
> +#include <drm/drm_cache.h>
>  #include <drm/drm_fourcc.h>
>  #include <drm/drm_gem.h>
>  #include <drm/drm_gem_atomic_helper.h>
> +#include <drm/drm_panic.h>
>  
>  #include "gem/i915_gem_object.h"
>  #include "i915_config.h"
> @@ -47,6 +50,7 @@
>  #include "i915_vma.h"
>  #include "i9xx_plane_regs.h"
>  #include "intel_atomic_plane.h"
> +#include "intel_bo.h"
>  #include "intel_cdclk.h"
>  #include "intel_cursor.h"
>  #include "intel_display_rps.h"
> @@ -54,6 +58,7 @@
>  #include "intel_display_types.h"
>  #include "intel_fb.h"
>  #include "intel_fb_pin.h"
> +#include "intel_fbdev.h"
>  #include "skl_scaler.h"
>  #include "skl_universal_plane.h"
>  #include "skl_watermark.h"
> @@ -1251,14 +1256,86 @@ intel_cleanup_plane_fb(struct drm_plane *plane,
>  	intel_plane_unpin_fb(old_plane_state);
>  }
>  
> +/* Only used by drm_panic get_scanout_buffer() and panic_flush(), so it is
> + * protected by the drm panic spinlock
> + */
> +static struct iosys_map panic_map;
> +
> +static void intel_panic_flush(struct drm_plane *plane)
> +{
> +	struct intel_plane_state *plane_state = to_intel_plane_state(plane->state);
> +	struct intel_plane *iplane = to_intel_plane(plane);
> +	struct intel_display *display = to_intel_display(iplane);
> +	struct drm_framebuffer *fb = plane_state->hw.fb;
> +
> +	/* Force a cache flush, otherwise the new pixels won't show up */
> +	drm_clflush_virt_range(panic_map.vaddr, fb->height * fb->pitches[0]);
> +
> +	/* Don't disable tiling if it's the fbdev framebuffer.*/
> +	if (to_intel_framebuffer(fb) == intel_fbdev_framebuffer(display->fbdev.fbdev)) {
> +		return;
> +

Mismatched {}


> +	if (fb->modifier && iplane->disable_tiling)
> +		iplane->disable_tiling(iplane);
> +}
> +
> +static int intel_get_scanout_buffer(struct drm_plane *plane,
> +				    struct drm_scanout_buffer *sb)
> +{
> +	struct intel_plane_state *plane_state;
> +	struct drm_gem_object *obj;
> +	struct drm_framebuffer *fb;
> +	struct intel_display *display = to_intel_display(plane->dev);
> +
> +	if (!plane->state || !plane->state->fb || !plane->state->visible)
> +		return -ENODEV;
> +
> +	plane_state = to_intel_plane_state(plane->state);
> +	fb = plane_state->hw.fb;
> +	obj = intel_fb_bo(fb);
> +	if (!obj)
> +		return -ENODEV;
> +
> +	iosys_map_clear(&panic_map);
> +	if (to_intel_framebuffer(fb) == intel_fbdev_framebuffer(display->fbdev.fbdev)) {
> +		intel_fbdev_get_map(display->fbdev.fbdev, &panic_map);
> +	} else {
> +		/* Can't disable tiling if DPT is in use */
> +		if (intel_fb_uses_dpt(fb))
> +			return -EOPNOTSUPP;
> +
> +		intel_bo_panic_map(obj, &panic_map);
> +	}
> +	if (iosys_map_is_null(&panic_map))
> +		return -ENOMEM;
> +
> +	sb->map[0] = panic_map;
> +	sb->width = fb->width;
> +	sb->height = fb->height;
> +	sb->format = fb->format;
> +	sb->pitch[0] = fb->pitches[0];
> +
> +	return 0;
> +}
> +
>  static const struct drm_plane_helper_funcs intel_plane_helper_funcs = {
>  	.prepare_fb = intel_prepare_plane_fb,
>  	.cleanup_fb = intel_cleanup_plane_fb,
>  };
>  
> +static const struct drm_plane_helper_funcs intel_primary_plane_helper_funcs = {
> +	.prepare_fb = intel_prepare_plane_fb,
> +	.cleanup_fb = intel_cleanup_plane_fb,
> +	.get_scanout_buffer = intel_get_scanout_buffer,
> +	.panic_flush = intel_panic_flush,
> +};
> +
>  void intel_plane_helper_add(struct intel_plane *plane)
>  {
> -	drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs);
> +	if (plane->base.type == DRM_PLANE_TYPE_PRIMARY)
> +		drm_plane_helper_add(&plane->base, &intel_primary_plane_helper_funcs);
> +	else
> +		drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs);
>  }
>  
>  void intel_plane_init_cursor_vblank_work(struct intel_plane_state *old_plane_state,

-- 
Jani Nikula, Intel

[PATCH v6 6/8] drm/i915/display: Flush the front buffer in panic handler

[Jocelyn Falempe]

On Lunar Lake, if the panic occurs when fbcon is active, the panic
screen is only partially visible on the screen. Adding this
intel_frontbuffer_flush() call solves the issue.
It's probably not safe to do that in the panic handler, but that's
still better than nothing.

Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
---
 drivers/gpu/drm/i915/display/intel_atomic_plane.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index eebf20fafaeb..5dc880b963fd 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -59,6 +59,7 @@
 #include "intel_fb.h"
 #include "intel_fb_pin.h"
 #include "intel_fbdev.h"
+#include "intel_frontbuffer.h"
 #include "skl_scaler.h"
 #include "skl_universal_plane.h"
 #include "skl_watermark.h"
@@ -1273,7 +1274,13 @@ static void intel_panic_flush(struct drm_plane *plane)
 
 	/* Don't disable tiling if it's the fbdev framebuffer.*/
 	if (to_intel_framebuffer(fb) == intel_fbdev_framebuffer(display->fbdev.fbdev)) {
+		struct intel_frontbuffer *front = to_intel_frontbuffer(fb);
+		struct drm_gem_object *obj = intel_fb_bo(fb);
+
+		intel_bo_flush_if_display(obj);
+		intel_frontbuffer_flush(front, ORIGIN_DIRTYFB);
 		return;
+	}
 
 	if (fb->modifier && iplane->disable_tiling)
 		iplane->disable_tiling(iplane);
-- 
2.49.0

[PATCH v6 7/8] drm/i915/display: Add drm_panic support for Y-tiling with DPT

[Jocelyn Falempe]

On Alder Lake and later, it's not possible to disable tiling when DPT
is enabled.
So this commit implements Y-Tiling support, to still be able to draw
the panic screen.

Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
---
 .../gpu/drm/i915/display/intel_atomic_plane.c | 69 ++++++++++++++++++-
 .../drm/i915/display/skl_universal_plane.c    | 15 ++--
 2 files changed, 77 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 5dc880b963fd..76c10555c10e 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -1262,6 +1262,33 @@ intel_cleanup_plane_fb(struct drm_plane *plane,
  */
 static struct iosys_map panic_map;
 
+/* Handle Y-tiling, only if DPT is enabled (otherwise disabling tiling is easier)
+ * All DPT hardware have 128-bytes width tiling, so Y-tile dimension is 32x32
+ * pixels for 32bits pixels.
+ */
+#define YTILE_WIDTH	32
+#define YTILE_HEIGHT	32
+#define YTILE_SIZE (YTILE_WIDTH * YTILE_HEIGHT * 4)
+
+static void intel_ytile_set_pixel(struct drm_scanout_buffer *sb, unsigned int x, unsigned int y,
+				  u32 color)
+{
+	u32 offset;
+	unsigned int swizzle;
+	unsigned int width_in_blocks = DIV_ROUND_UP(sb->width, 32);
+
+	/* Block offset */
+	offset = ((y / YTILE_HEIGHT) * width_in_blocks + (x / YTILE_WIDTH)) * YTILE_SIZE;
+
+	x = x % YTILE_WIDTH;
+	y = y % YTILE_HEIGHT;
+
+	/* bit order inside a block is x4 x3 x2 y4 y3 y2 y1 y0 x1 x0 */
+	swizzle = (x & 3) | ((y & 0x1f) << 2) | ((x & 0x1c) << 5);
+	offset += swizzle * 4;
+	iosys_map_wr(&sb->map[0], offset, u32, color);
+}
+
 static void intel_panic_flush(struct drm_plane *plane)
 {
 	struct intel_plane_state *plane_state = to_intel_plane_state(plane->state);
@@ -1286,6 +1313,34 @@ static void intel_panic_flush(struct drm_plane *plane)
 		iplane->disable_tiling(iplane);
 }
 
+static void (*intel_get_tiling_func(u64 fb_modifier))(struct drm_scanout_buffer *sb, unsigned int x,
+						      unsigned int y, u32 color)
+{
+	switch (fb_modifier) {
+	case I915_FORMAT_MOD_Y_TILED:
+	case I915_FORMAT_MOD_Y_TILED_CCS:
+	case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
+	case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
+	case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
+		return intel_ytile_set_pixel;
+	case I915_FORMAT_MOD_X_TILED:
+	case I915_FORMAT_MOD_4_TILED:
+	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
+	case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
+	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC:
+	case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS:
+	case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC:
+	case I915_FORMAT_MOD_4_TILED_MTL_MC_CCS:
+	case I915_FORMAT_MOD_4_TILED_BMG_CCS:
+	case I915_FORMAT_MOD_4_TILED_LNL_CCS:
+	case I915_FORMAT_MOD_Yf_TILED:
+	case I915_FORMAT_MOD_Yf_TILED_CCS:
+	default:
+	/* Not supported yet */
+		return NULL;
+	}
+}
+
 static int intel_get_scanout_buffer(struct drm_plane *plane,
 				    struct drm_scanout_buffer *sb)
 {
@@ -1308,8 +1363,13 @@ static int intel_get_scanout_buffer(struct drm_plane *plane,
 		intel_fbdev_get_map(display->fbdev.fbdev, &panic_map);
 	} else {
 		/* Can't disable tiling if DPT is in use */
-		if (intel_fb_uses_dpt(fb))
-			return -EOPNOTSUPP;
+		if (intel_fb_uses_dpt(fb)) {
+			if (fb->format->cpp[0] != 4)
+				return -EOPNOTSUPP;
+			sb->set_pixel = intel_get_tiling_func(fb->modifier);
+			if (!sb->set_pixel)
+				return -EOPNOTSUPP;
+		}
 
 		intel_bo_panic_map(obj, &panic_map);
 	}
@@ -1319,7 +1379,10 @@ static int intel_get_scanout_buffer(struct drm_plane *plane,
 	sb->map[0] = panic_map;
 	sb->width = fb->width;
 	sb->height = fb->height;
-	sb->format = fb->format;
+	/* Use the generic linear format, because tiling, RC, CCS, CC
+	 * will be disabled in disable_tiling()
+	 */
+	sb->format = drm_format_info(fb->format->format);
 	sb->pitch[0] = fb->pitches[0];
 
 	return 0;
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 64a1e8e7122d..9d84e9aecd93 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2794,15 +2794,22 @@ static void skl_disable_tiling(struct intel_plane *plane)
 {
 	struct intel_plane_state *state = to_intel_plane_state(plane->base.state);
 	struct intel_display *display = to_intel_display(plane);
-	u32 stride = state->view.color_plane[0].scanout_stride / 64;
+	const struct drm_framebuffer *fb = state->hw.fb;
 	u32 plane_ctl;
 
 	plane_ctl = intel_de_read(display, PLANE_CTL(plane->pipe, plane->id));
-	plane_ctl &= ~PLANE_CTL_TILED_MASK;
 
-	intel_de_write_fw(display, PLANE_STRIDE(plane->pipe, plane->id),
-			  PLANE_STRIDE_(stride));
+	if (intel_fb_uses_dpt(fb)) {
+		/* if DPT is enabled, keep tiling, but disable compression */
+		plane_ctl &= ~PLANE_CTL_RENDER_DECOMPRESSION_ENABLE;
+	} else {
+		/* if DPT is not supported, disable tiling, and update stride */
+		u32 stride = state->view.color_plane[0].scanout_stride / 64;
 
+		plane_ctl &= ~PLANE_CTL_TILED_MASK;
+		intel_de_write_fw(display, PLANE_STRIDE(plane->pipe, plane->id),
+				  PLANE_STRIDE_(stride));
+	}
 	intel_de_write_fw(display, PLANE_CTL(plane->pipe, plane->id), plane_ctl);
 
 	intel_de_write_fw(display, PLANE_SURF(plane->pipe, plane->id),
-- 
2.49.0

[PATCH v6 8/8] drm/i915/display: Add drm_panic support for 4-tiling with DPT

[Jocelyn Falempe]

On Alder Lake and later, it's not possible to disable tiling when DPT
is enabled.
So this commit implements 4-Tiling support, to still be able to draw
the panic screen.

Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
---
 .../gpu/drm/i915/display/intel_atomic_plane.c | 22 ++++++++++++++++++-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 76c10555c10e..68deffe3aa9a 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -1289,6 +1289,25 @@ static void intel_ytile_set_pixel(struct drm_scanout_buffer *sb, unsigned int x,
 	iosys_map_wr(&sb->map[0], offset, u32, color);
 }
 
+static void intel_4tile_set_pixel(struct drm_scanout_buffer *sb, unsigned int x, unsigned int y,
+				  u32 color)
+{
+	u32 offset;
+	unsigned int swizzle;
+	unsigned int width_in_blocks = DIV_ROUND_UP(sb->width, 32);
+
+	/* Block offset */
+	offset = ((y / YTILE_HEIGHT) * width_in_blocks + (x / YTILE_WIDTH)) * YTILE_SIZE;
+
+	x = x % YTILE_WIDTH;
+	y = y % YTILE_HEIGHT;
+
+	/* bit order inside a block is y4 y3 x4 y2 x3 x2 y1 y0 x1 x0 */
+	swizzle = (x & 3) | ((y & 3) << 2) | ((x & 0xc) << 2) | (y & 4) << 4 | ((x & 0x10) << 3) | ((y & 0x18) << 5);
+	offset += swizzle * 4;
+	iosys_map_wr(&sb->map[0], offset, u32, color);
+}
+
 static void intel_panic_flush(struct drm_plane *plane)
 {
 	struct intel_plane_state *plane_state = to_intel_plane_state(plane->state);
@@ -1323,7 +1342,6 @@ static void (*intel_get_tiling_func(u64 fb_modifier))(struct drm_scanout_buffer
 	case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
 	case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
 		return intel_ytile_set_pixel;
-	case I915_FORMAT_MOD_X_TILED:
 	case I915_FORMAT_MOD_4_TILED:
 	case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
 	case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
@@ -1333,6 +1351,8 @@ static void (*intel_get_tiling_func(u64 fb_modifier))(struct drm_scanout_buffer
 	case I915_FORMAT_MOD_4_TILED_MTL_MC_CCS:
 	case I915_FORMAT_MOD_4_TILED_BMG_CCS:
 	case I915_FORMAT_MOD_4_TILED_LNL_CCS:
+		return intel_4tile_set_pixel;
+	case I915_FORMAT_MOD_X_TILED:
 	case I915_FORMAT_MOD_Yf_TILED:
 	case I915_FORMAT_MOD_Yf_TILED_CCS:
 	default:
-- 
2.49.0

✓ CI.Patch_applied: success for drm/i915: Add drm_panic support (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915: Add drm_panic support (rev6)
URL   : https://patchwork.freedesktop.org/series/141937/
State : success

== Summary ==

=== Applying kernel patches on branch 'drm-tip' with base: ===
Base commit: 9368766ece6c drm-tip: 2025y-04m-01d-08h-58m-05s UTC integration manifest
=== git am output follows ===
Applying: drm/i915/fbdev: Add intel_fbdev_get_map()
Applying: drm/i915/display/i9xx: Add a disable_tiling() for i9xx planes
Applying: drm/i915/display: Add a disable_tiling() for skl planes
Applying: drm/i915/gem: Add i915_gem_object_panic_map()
Applying: drm/i915/display: Add drm_panic support
Applying: drm/i915/display: Flush the front buffer in panic handler
Applying: drm/i915/display: Add drm_panic support for Y-tiling with DPT
Applying: drm/i915/display: Add drm_panic support for 4-tiling with DPT

✗ CI.checkpatch: warning for drm/i915: Add drm_panic support (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915: Add drm_panic support (rev6)
URL   : https://patchwork.freedesktop.org/series/141937/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
99e5a866b5e13f134e606a3e29d9508d97826fb3
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit c0fd23cdd77331d808824a604cee5580420d9c97
Author: Jocelyn Falempe <jfalempe@redhat.com>
Date:   Tue Apr 1 14:51:14 2025 +0200

    drm/i915/display: Add drm_panic support for 4-tiling with DPT
    
    On Alder Lake and later, it's not possible to disable tiling when DPT
    is enabled.
    So this commit implements 4-Tiling support, to still be able to draw
    the panic screen.
    
    Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
+ /mt/dim checkpatch 9368766ece6c78cc0001f9b53037563fe521f887 drm-intel
979b142038b3 drm/i915/fbdev: Add intel_fbdev_get_map()
223435309562 drm/i915/display/i9xx: Add a disable_tiling() for i9xx planes
fc258b14f414 drm/i915/display: Add a disable_tiling() for skl planes
297dd77e73de drm/i915/gem: Add i915_gem_object_panic_map()
-:67: CHECK:LINE_SPACING: Please don't use multiple blank lines
#67: FILE: drivers/gpu/drm/i915/gem/i915_gem_pages.c:367:
+
+

-:81: CHECK:SPACING: No space is necessary after a cast
#81: FILE: drivers/gpu/drm/i915/gem/i915_gem_pages.c:381:
+		iosys_map_set_vaddr_iomem(map, (void __iomem *) ptr);

total: 0 errors, 0 warnings, 2 checks, 70 lines checked
e05cd3c5553c drm/i915/display: Add drm_panic support
b2993528ab2c drm/i915/display: Flush the front buffer in panic handler
347668525891 drm/i915/display: Add drm_panic support for Y-tiling with DPT
c0fd23cdd773 drm/i915/display: Add drm_panic support for 4-tiling with DPT
-:35: WARNING:LONG_LINE: line length of 117 exceeds 100 columns
#35: FILE: drivers/gpu/drm/i915/display/intel_atomic_plane.c:1306:
+	swizzle = (x & 3) | ((y & 3) << 2) | ((x & 0xc) << 2) | (y & 4) << 4 | ((x & 0x10) << 3) | ((y & 0x18) << 5);

total: 0 errors, 1 warnings, 0 checks, 40 lines checked

✓ CI.KUnit: success for drm/i915: Add drm_panic support (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915: Add drm_panic support (rev6)
URL   : https://patchwork.freedesktop.org/series/141937/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[13:06:04] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:06:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json ARCH=um O=.kunit --jobs=48
../lib/iomap.c:156:5: warning: no previous prototype for ‘ioread64_lo_hi’ [-Wmissing-prototypes]
  156 | u64 ioread64_lo_hi(const void __iomem *addr)
      |     ^~~~~~~~~~~~~~
../lib/iomap.c:163:5: warning: no previous prototype for ‘ioread64_hi_lo’ [-Wmissing-prototypes]
  163 | u64 ioread64_hi_lo(const void __iomem *addr)
      |     ^~~~~~~~~~~~~~
../lib/iomap.c:170:5: warning: no previous prototype for ‘ioread64be_lo_hi’ [-Wmissing-prototypes]
  170 | u64 ioread64be_lo_hi(const void __iomem *addr)
      |     ^~~~~~~~~~~~~~~~
../lib/iomap.c:178:5: warning: no previous prototype for ‘ioread64be_hi_lo’ [-Wmissing-prototypes]
  178 | u64 ioread64be_hi_lo(const void __iomem *addr)
      |     ^~~~~~~~~~~~~~~~
../lib/iomap.c:264:6: warning: no previous prototype for ‘iowrite64_lo_hi’ [-Wmissing-prototypes]
  264 | void iowrite64_lo_hi(u64 val, void __iomem *addr)
      |      ^~~~~~~~~~~~~~~
../lib/iomap.c:272:6: warning: no previous prototype for ‘iowrite64_hi_lo’ [-Wmissing-prototypes]
  272 | void iowrite64_hi_lo(u64 val, void __iomem *addr)
      |      ^~~~~~~~~~~~~~~
../lib/iomap.c:280:6: warning: no previous prototype for ‘iowrite64be_lo_hi’ [-Wmissing-prototypes]
  280 | void iowrite64be_lo_hi(u64 val, void __iomem *addr)
      |      ^~~~~~~~~~~~~~~~~
../lib/iomap.c:288:6: warning: no previous prototype for ‘iowrite64be_hi_lo’ [-Wmissing-prototypes]
  288 | void iowrite64be_hi_lo(u64 val, void __iomem *addr)
      |      ^~~~~~~~~~~~~~~~~

[13:06:34] Starting KUnit Kernel (1/1)...
[13:06:34] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:06:34] ================== guc_buf (11 subtests) ===================
[13:06:34] [PASSED] test_smallest
[13:06:34] [PASSED] test_largest
[13:06:35] [PASSED] test_granular
[13:06:35] [PASSED] test_unique
[13:06:35] [PASSED] test_overlap
[13:06:35] [PASSED] test_reusable
[13:06:35] [PASSED] test_too_big
[13:06:35] [PASSED] test_flush
[13:06:35] [PASSED] test_lookup
[13:06:35] [PASSED] test_data
[13:06:35] [PASSED] test_class
[13:06:35] ===================== [PASSED] guc_buf =====================
[13:06:35] =================== guc_dbm (7 subtests) ===================
[13:06:35] [PASSED] test_empty
[13:06:35] [PASSED] test_default
[13:06:35] ======================== test_size  ========================
[13:06:35] [PASSED] 4
[13:06:35] [PASSED] 8
[13:06:35] [PASSED] 32
[13:06:35] [PASSED] 256
[13:06:35] ==================== [PASSED] test_size ====================
[13:06:35] ======================= test_reuse  ========================
[13:06:35] [PASSED] 4
[13:06:35] [PASSED] 8
[13:06:35] [PASSED] 32
[13:06:35] [PASSED] 256
[13:06:35] =================== [PASSED] test_reuse ====================
[13:06:35] =================== test_range_overlap  ====================
[13:06:35] [PASSED] 4
[13:06:35] [PASSED] 8
[13:06:35] [PASSED] 32
[13:06:35] [PASSED] 256
[13:06:35] =============== [PASSED] test_range_overlap ================
[13:06:35] =================== test_range_compact  ====================
[13:06:35] [PASSED] 4
[13:06:35] [PASSED] 8
[13:06:35] [PASSED] 32
[13:06:35] [PASSED] 256
[13:06:35] =============== [PASSED] test_range_compact ================
[13:06:35] ==================== test_range_spare  =====================
[13:06:35] [PASSED] 4
[13:06:35] [PASSED] 8
[13:06:35] [PASSED] 32
[13:06:35] [PASSED] 256
[13:06:35] ================ [PASSED] test_range_spare =================
[13:06:35] ===================== [PASSED] guc_dbm =====================
[13:06:35] =================== guc_idm (6 subtests) ===================
[13:06:35] [PASSED] bad_init
[13:06:35] [PASSED] no_init
[13:06:35] [PASSED] init_fini
[13:06:35] [PASSED] check_used
[13:06:35] [PASSED] check_quota
[13:06:35] [PASSED] check_all
[13:06:35] ===================== [PASSED] guc_idm =====================
[13:06:35] ================== no_relay (3 subtests) ===================
[13:06:35] [PASSED] xe_drops_guc2pf_if_not_ready
[13:06:35] [PASSED] xe_drops_guc2vf_if_not_ready
[13:06:35] [PASSED] xe_rejects_send_if_not_ready
[13:06:35] ==================== [PASSED] no_relay =====================
[13:06:35] ================== pf_relay (14 subtests) ==================
[13:06:35] [PASSED] pf_rejects_guc2pf_too_short
[13:06:35] [PASSED] pf_rejects_guc2pf_too_long
[13:06:35] [PASSED] pf_rejects_guc2pf_no_payload
[13:06:35] [PASSED] pf_fails_no_payload
[13:06:35] [PASSED] pf_fails_bad_origin
[13:06:35] [PASSED] pf_fails_bad_type
[13:06:35] [PASSED] pf_txn_reports_error
[13:06:35] [PASSED] pf_txn_sends_pf2guc
[13:06:35] [PASSED] pf_sends_pf2guc
[13:06:35] [SKIPPED] pf_loopback_nop
[13:06:35] [SKIPPED] pf_loopback_echo
[13:06:35] [SKIPPED] pf_loopback_fail
[13:06:35] [SKIPPED] pf_loopback_busy
[13:06:35] [SKIPPED] pf_loopback_retry
[13:06:35] ==================== [PASSED] pf_relay =====================
[13:06:35] ================== vf_relay (3 subtests) ===================
[13:06:35] [PASSED] vf_rejects_guc2vf_too_short
[13:06:35] [PASSED] vf_rejects_guc2vf_too_long
[13:06:35] [PASSED] vf_rejects_guc2vf_no_payload
[13:06:35] ==================== [PASSED] vf_relay =====================
[13:06:35] ================= pf_service (11 subtests) =================
[13:06:35] [PASSED] pf_negotiate_any
[13:06:35] [PASSED] pf_negotiate_base_match
[13:06:35] [PASSED] pf_negotiate_base_newer
[13:06:35] [PASSED] pf_negotiate_base_next
[13:06:35] [SKIPPED] pf_negotiate_base_older
[13:06:35] [PASSED] pf_negotiate_base_prev
[13:06:35] [PASSED] pf_negotiate_latest_match
[13:06:35] [PASSED] pf_negotiate_latest_newer
[13:06:35] [PASSED] pf_negotiate_latest_next
[13:06:35] [SKIPPED] pf_negotiate_latest_older
[13:06:35] [SKIPPED] pf_negotiate_latest_prev
[13:06:35] =================== [PASSED] pf_service ====================
[13:06:35] ===================== lmtt (1 subtest) =====================
[13:06:35] ======================== test_ops  =========================
[13:06:35] [PASSED] 2-level
[13:06:35] [PASSED] multi-level
[13:06:35] ==================== [PASSED] test_ops =====================
[13:06:35] ====================== [PASSED] lmtt =======================
[13:06:35] =================== xe_mocs (2 subtests) ===================
[13:06:35] ================ xe_live_mocs_kernel_kunit  ================
[13:06:35] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[13:06:35] ================ xe_live_mocs_reset_kunit  =================
[13:06:35] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[13:06:35] ==================== [SKIPPED] xe_mocs =====================
[13:06:35] ================= xe_migrate (2 subtests) ==================
[13:06:35] ================= xe_migrate_sanity_kunit  =================
[13:06:35] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[13:06:35] ================== xe_validate_ccs_kunit  ==================
[13:06:35] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[13:06:35] =================== [SKIPPED] xe_migrate ===================
[13:06:35] ================== xe_dma_buf (1 subtest) ==================
[13:06:35] ==================== xe_dma_buf_kunit  =====================
[13:06:35] ================ [SKIPPED] xe_dma_buf_kunit ================
[13:06:35] =================== [SKIPPED] xe_dma_buf ===================
[13:06:35] ================= xe_bo_shrink (1 subtest) =================
[13:06:35] =================== xe_bo_shrink_kunit  ====================
[13:06:35] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[13:06:35] ================== [SKIPPED] xe_bo_shrink ==================
[13:06:35] ==================== xe_bo (2 subtests) ====================
[13:06:35] ================== xe_ccs_migrate_kunit  ===================
[13:06:35] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
stty: 'standard input': Inappropriate ioctl for device
[13:06:35] ==================== xe_bo_evict_kunit  ====================
[13:06:35] =============== [SKIPPED] xe_bo_evict_kunit ================
[13:06:35] ===================== [SKIPPED] xe_bo ======================
[13:06:35] ==================== args (11 subtests) ====================
[13:06:35] [PASSED] count_args_test
[13:06:35] [PASSED] call_args_example
[13:06:35] [PASSED] call_args_test
[13:06:35] [PASSED] drop_first_arg_example
[13:06:35] [PASSED] drop_first_arg_test
[13:06:35] [PASSED] first_arg_example
[13:06:35] [PASSED] first_arg_test
[13:06:35] [PASSED] last_arg_example
[13:06:35] [PASSED] last_arg_test
[13:06:35] [PASSED] pick_arg_example
[13:06:35] [PASSED] sep_comma_example
[13:06:35] ====================== [PASSED] args =======================
[13:06:35] =================== xe_pci (2 subtests) ====================
[13:06:35] [PASSED] xe_gmdid_graphics_ip
[13:06:35] [PASSED] xe_gmdid_media_ip
[13:06:35] ===================== [PASSED] xe_pci ======================
[13:06:35] =================== xe_rtp (2 subtests) ====================
[13:06:35] =============== xe_rtp_process_to_sr_tests  ================
[13:06:35] [PASSED] coalesce-same-reg
[13:06:35] [PASSED] no-match-no-add
[13:06:35] [PASSED] match-or
[13:06:35] [PASSED] match-or-xfail
[13:06:35] [PASSED] no-match-no-add-multiple-rules
[13:06:35] [PASSED] two-regs-two-entries
[13:06:35] [PASSED] clr-one-set-other
[13:06:35] [PASSED] set-field
[13:06:35] [PASSED] conflict-duplicate
[13:06:35] [PASSED] conflict-not-disjoint
[13:06:35] [PASSED] conflict-reg-type
[13:06:35] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[13:06:35] ================== xe_rtp_process_tests  ===================
[13:06:35] [PASSED] active1
[13:06:35] [PASSED] active2
[13:06:35] [PASSED] active-inactive
[13:06:35] [PASSED] inactive-active
[13:06:35] [PASSED] inactive-1st_or_active-inactive
[13:06:35] [PASSED] inactive-2nd_or_active-inactive
[13:06:35] [PASSED] inactive-last_or_active-inactive
[13:06:35] [PASSED] inactive-no_or_active-inactive
[13:06:35] ============== [PASSED] xe_rtp_process_tests ===============
[13:06:35] ===================== [PASSED] xe_rtp ======================
[13:06:35] ==================== xe_wa (1 subtest) =====================
[13:06:35] ======================== xe_wa_gt  =========================
[13:06:35] [PASSED] TIGERLAKE (B0)
[13:06:35] [PASSED] DG1 (A0)
[13:06:35] [PASSED] DG1 (B0)
[13:06:35] [PASSED] ALDERLAKE_S (A0)
[13:06:35] [PASSED] ALDERLAKE_S (B0)
[13:06:35] [PASSED] ALDERLAKE_S (C0)
[13:06:35] [PASSED] ALDERLAKE_S (D0)
[13:06:35] [PASSED] ALDERLAKE_P (A0)
[13:06:35] [PASSED] ALDERLAKE_P (B0)
[13:06:35] [PASSED] ALDERLAKE_P (C0)
[13:06:35] [PASSED] ALDERLAKE_S_RPLS (D0)
[13:06:35] [PASSED] ALDERLAKE_P_RPLU (E0)
[13:06:35] [PASSED] DG2_G10 (C0)
[13:06:35] [PASSED] DG2_G11 (B1)
[13:06:35] [PASSED] DG2_G12 (A1)
[13:06:35] [PASSED] METEORLAKE (g:A0, m:A0)
[13:06:35] [PASSED] METEORLAKE (g:A0, m:A0)
[13:06:35] [PASSED] METEORLAKE (g:A0, m:A0)
[13:06:35] [PASSED] LUNARLAKE (g:A0, m:A0)
[13:06:35] [PASSED] LUNARLAKE (g:B0, m:A0)
[13:06:35] [PASSED] BATTLEMAGE (g:A0, m:A1)
[13:06:35] ==================== [PASSED] xe_wa_gt =====================
[13:06:35] ====================== [PASSED] xe_wa ======================
[13:06:35] ============================================================
[13:06:35] Testing complete. Ran 133 tests: passed: 117, skipped: 16
[13:06:35] Elapsed time: 30.705s total, 4.144s configuring, 26.294s building, 0.247s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[13:06:35] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:06:36] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json ARCH=um O=.kunit --jobs=48
../lib/iomap.c:156:5: warning: no previous prototype for ‘ioread64_lo_hi’ [-Wmissing-prototypes]
  156 | u64 ioread64_lo_hi(const void __iomem *addr)
      |     ^~~~~~~~~~~~~~
../lib/iomap.c:163:5: warning: no previous prototype for ‘ioread64_hi_lo’ [-Wmissing-prototypes]
  163 | u64 ioread64_hi_lo(const void __iomem *addr)
      |     ^~~~~~~~~~~~~~
../lib/iomap.c:170:5: warning: no previous prototype for ‘ioread64be_lo_hi’ [-Wmissing-prototypes]
  170 | u64 ioread64be_lo_hi(const void __iomem *addr)
      |     ^~~~~~~~~~~~~~~~
../lib/iomap.c:178:5: warning: no previous prototype for ‘ioread64be_hi_lo’ [-Wmissing-prototypes]
  178 | u64 ioread64be_hi_lo(const void __iomem *addr)
      |     ^~~~~~~~~~~~~~~~
../lib/iomap.c:264:6: warning: no previous prototype for ‘iowrite64_lo_hi’ [-Wmissing-prototypes]
  264 | void iowrite64_lo_hi(u64 val, void __iomem *addr)
      |      ^~~~~~~~~~~~~~~
../lib/iomap.c:272:6: warning: no previous prototype for ‘iowrite64_hi_lo’ [-Wmissing-prototypes]
  272 | void iowrite64_hi_lo(u64 val, void __iomem *addr)
      |      ^~~~~~~~~~~~~~~
../lib/iomap.c:280:6: warning: no previous prototype for ‘iowrite64be_lo_hi’ [-Wmissing-prototypes]
  280 | void iowrite64be_lo_hi(u64 val, void __iomem *addr)
      |      ^~~~~~~~~~~~~~~~~
../lib/iomap.c:288:6: warning: no previous prototype for ‘iowrite64be_hi_lo’ [-Wmissing-prototypes]
  288 | void iowrite64be_hi_lo(u64 val, void __iomem *addr)
      |      ^~~~~~~~~~~~~~~~~

[13:06:58] Starting KUnit Kernel (1/1)...
[13:06:58] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:06:58] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[13:06:58] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[13:06:58] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[13:06:58] =========== drm_validate_clone_mode (2 subtests) ===========
[13:06:58] ============== drm_test_check_in_clone_mode  ===============
[13:06:58] [PASSED] in_clone_mode
[13:06:58] [PASSED] not_in_clone_mode
[13:06:58] ========== [PASSED] drm_test_check_in_clone_mode ===========
[13:06:58] =============== drm_test_check_valid_clones  ===============
[13:06:58] [PASSED] not_in_clone_mode
[13:06:58] [PASSED] valid_clone
[13:06:58] [PASSED] invalid_clone
[13:06:58] =========== [PASSED] drm_test_check_valid_clones ===========
[13:06:58] ============= [PASSED] drm_validate_clone_mode =============
[13:06:58] ============= drm_validate_modeset (1 subtest) =============
[13:06:58] [PASSED] drm_test_check_connector_changed_modeset
[13:06:58] ============== [PASSED] drm_validate_modeset ===============
[13:06:58] ====== drm_test_bridge_get_current_state (2 subtests) ======
[13:06:58] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[13:06:58] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[13:06:58] ======== [PASSED] drm_test_bridge_get_current_state ========
[13:06:58] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[13:06:58] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[13:06:58] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[13:06:58] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[13:06:58] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[13:06:58] ================== drm_buddy (7 subtests) ==================
[13:06:58] [PASSED] drm_test_buddy_alloc_limit
[13:06:58] [PASSED] drm_test_buddy_alloc_optimistic
[13:06:58] [PASSED] drm_test_buddy_alloc_pessimistic
[13:06:58] [PASSED] drm_test_buddy_alloc_pathological
[13:06:58] [PASSED] drm_test_buddy_alloc_contiguous
[13:06:58] [PASSED] drm_test_buddy_alloc_clear
[13:06:58] [PASSED] drm_test_buddy_alloc_range_bias
[13:06:58] ==================== [PASSED] drm_buddy ====================
[13:06:58] ============= drm_cmdline_parser (40 subtests) =============
[13:06:58] [PASSED] drm_test_cmdline_force_d_only
[13:06:58] [PASSED] drm_test_cmdline_force_D_only_dvi
[13:06:58] [PASSED] drm_test_cmdline_force_D_only_hdmi
[13:06:58] [PASSED] drm_test_cmdline_force_D_only_not_digital
[13:06:58] [PASSED] drm_test_cmdline_force_e_only
[13:06:58] [PASSED] drm_test_cmdline_res
[13:06:58] [PASSED] drm_test_cmdline_res_vesa
[13:06:58] [PASSED] drm_test_cmdline_res_vesa_rblank
[13:06:58] [PASSED] drm_test_cmdline_res_rblank
[13:06:58] [PASSED] drm_test_cmdline_res_bpp
[13:06:58] [PASSED] drm_test_cmdline_res_refresh
[13:06:58] [PASSED] drm_test_cmdline_res_bpp_refresh
[13:06:58] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[13:06:58] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[13:06:58] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[13:06:58] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[13:06:58] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[13:06:58] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[13:06:58] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[13:06:58] [PASSED] drm_test_cmdline_res_margins_force_on
[13:06:58] [PASSED] drm_test_cmdline_res_vesa_margins
[13:06:58] [PASSED] drm_test_cmdline_name
[13:06:58] [PASSED] drm_test_cmdline_name_bpp
[13:06:58] [PASSED] drm_test_cmdline_name_option
[13:06:58] [PASSED] drm_test_cmdline_name_bpp_option
[13:06:58] [PASSED] drm_test_cmdline_rotate_0
[13:06:58] [PASSED] drm_test_cmdline_rotate_90
[13:06:58] [PASSED] drm_test_cmdline_rotate_180
[13:06:58] [PASSED] drm_test_cmdline_rotate_270
[13:06:58] [PASSED] drm_test_cmdline_hmirror
[13:06:58] [PASSED] drm_test_cmdline_vmirror
[13:06:58] [PASSED] drm_test_cmdline_margin_options
[13:06:58] [PASSED] drm_test_cmdline_multiple_options
[13:06:58] [PASSED] drm_test_cmdline_bpp_extra_and_option
[13:06:58] [PASSED] drm_test_cmdline_extra_and_option
[13:06:58] [PASSED] drm_test_cmdline_freestanding_options
[13:06:58] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[13:06:58] [PASSED] drm_test_cmdline_panel_orientation
[13:06:58] ================ drm_test_cmdline_invalid  =================
[13:06:58] [PASSED] margin_only
[13:06:58] [PASSED] interlace_only
[13:06:58] [PASSED] res_missing_x
[13:06:58] [PASSED] res_missing_y
[13:06:58] [PASSED] res_bad_y
[13:06:58] [PASSED] res_missing_y_bpp
[13:06:58] [PASSED] res_bad_bpp
[13:06:58] [PASSED] res_bad_refresh
[13:06:58] [PASSED] res_bpp_refresh_force_on_off
[13:06:58] [PASSED] res_invalid_mode
[13:06:58] [PASSED] res_bpp_wrong_place_mode
[13:06:58] [PASSED] name_bpp_refresh
[13:06:58] [PASSED] name_refresh
[13:06:58] [PASSED] name_refresh_wrong_mode
[13:06:58] [PASSED] name_refresh_invalid_mode
[13:06:58] [PASSED] rotate_multiple
[13:06:58] [PASSED] rotate_invalid_val
[13:06:58] [PASSED] rotate_truncated
[13:06:58] [PASSED] invalid_option
[13:06:58] [PASSED] invalid_tv_option
[13:06:58] [PASSED] truncated_tv_option
[13:06:58] ============ [PASSED] drm_test_cmdline_invalid =============
[13:06:58] =============== drm_test_cmdline_tv_options  ===============
[13:06:58] [PASSED] NTSC
[13:06:58] [PASSED] NTSC_443
[13:06:58] [PASSED] NTSC_J
[13:06:58] [PASSED] PAL
[13:06:58] [PASSED] PAL_M
[13:06:58] [PASSED] PAL_N
[13:06:58] [PASSED] SECAM
[13:06:58] [PASSED] MONO_525
[13:06:58] [PASSED] MONO_625
[13:06:58] =========== [PASSED] drm_test_cmdline_tv_options ===========
[13:06:58] =============== [PASSED] drm_cmdline_parser ================
[13:06:58] ========== drmm_connector_hdmi_init (20 subtests) ==========
[13:06:58] [PASSED] drm_test_connector_hdmi_init_valid
[13:06:58] [PASSED] drm_test_connector_hdmi_init_bpc_8
[13:06:58] [PASSED] drm_test_connector_hdmi_init_bpc_10
[13:06:58] [PASSED] drm_test_connector_hdmi_init_bpc_12
[13:06:58] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[13:06:58] [PASSED] drm_test_connector_hdmi_init_bpc_null
[13:06:58] [PASSED] drm_test_connector_hdmi_init_formats_empty
[13:06:58] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[13:06:58] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[13:06:58] [PASSED] supported_formats=0x9 yuv420_allowed=1
[13:06:58] [PASSED] supported_formats=0x9 yuv420_allowed=0
[13:06:58] [PASSED] supported_formats=0x3 yuv420_allowed=1
[13:06:58] [PASSED] supported_formats=0x3 yuv420_allowed=0
[13:06:58] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[13:06:58] [PASSED] drm_test_connector_hdmi_init_null_ddc
[13:06:58] [PASSED] drm_test_connector_hdmi_init_null_product
[13:06:58] [PASSED] drm_test_connector_hdmi_init_null_vendor
[13:06:58] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[13:06:58] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[13:06:58] [PASSED] drm_test_connector_hdmi_init_product_valid
[13:06:58] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[13:06:58] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[13:06:58] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[13:06:58] ========= drm_test_connector_hdmi_init_type_valid  =========
[13:06:58] [PASSED] HDMI-A
[13:06:58] [PASSED] HDMI-B
[13:06:58] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[13:06:58] ======== drm_test_connector_hdmi_init_type_invalid  ========
[13:06:58] [PASSED] Unknown
[13:06:58] [PASSED] VGA
[13:06:58] [PASSED] DVI-I
[13:06:58] [PASSED] DVI-D
[13:06:58] [PASSED] DVI-A
[13:06:58] [PASSED] Composite
[13:06:58] [PASSED] SVIDEO
[13:06:58] [PASSED] LVDS
[13:06:58] [PASSED] Component
[13:06:58] [PASSED] DIN
[13:06:58] [PASSED] DP
[13:06:58] [PASSED] TV
[13:06:58] [PASSED] eDP
[13:06:58] [PASSED] Virtual
[13:06:58] [PASSED] DSI
[13:06:58] [PASSED] DPI
[13:06:58] [PASSED] Writeback
[13:06:58] [PASSED] SPI
[13:06:58] [PASSED] USB
[13:06:58] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[13:06:58] ============ [PASSED] drmm_connector_hdmi_init =============
[13:06:58] ============= drmm_connector_init (3 subtests) =============
[13:06:58] [PASSED] drm_test_drmm_connector_init
[13:06:58] [PASSED] drm_test_drmm_connector_init_null_ddc
[13:06:58] ========= drm_test_drmm_connector_init_type_valid  =========
[13:06:58] [PASSED] Unknown
[13:06:58] [PASSED] VGA
[13:06:58] [PASSED] DVI-I
[13:06:58] [PASSED] DVI-D
[13:06:58] [PASSED] DVI-A
[13:06:58] [PASSED] Composite
[13:06:58] [PASSED] SVIDEO
[13:06:58] [PASSED] LVDS
[13:06:58] [PASSED] Component
[13:06:58] [PASSED] DIN
[13:06:58] [PASSED] DP
[13:06:58] [PASSED] HDMI-A
[13:06:58] [PASSED] HDMI-B
[13:06:58] [PASSED] TV
[13:06:58] [PASSED] eDP
[13:06:58] [PASSED] Virtual
[13:06:58] [PASSED] DSI
[13:06:58] [PASSED] DPI
[13:06:58] [PASSED] Writeback
[13:06:58] [PASSED] SPI
[13:06:58] [PASSED] USB
[13:06:58] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[13:06:58] =============== [PASSED] drmm_connector_init ===============
[13:06:58] ========= drm_connector_dynamic_init (6 subtests) ==========
[13:06:58] [PASSED] drm_test_drm_connector_dynamic_init
[13:06:58] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[13:06:58] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[13:06:58] [PASSED] drm_test_drm_connector_dynamic_init_properties
[13:06:58] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[13:06:58] [PASSED] Unknown
[13:06:58] [PASSED] VGA
[13:06:58] [PASSED] DVI-I
[13:06:58] [PASSED] DVI-D
[13:06:58] [PASSED] DVI-A
[13:06:58] [PASSED] Composite
[13:06:58] [PASSED] SVIDEO
[13:06:58] [PASSED] LVDS
[13:06:58] [PASSED] Component
[13:06:58] [PASSED] DIN
[13:06:58] [PASSED] DP
[13:06:58] [PASSED] HDMI-A
[13:06:58] [PASSED] HDMI-B
[13:06:58] [PASSED] TV
[13:06:58] [PASSED] eDP
[13:06:58] [PASSED] Virtual
[13:06:58] [PASSED] DSI
[13:06:58] [PASSED] DPI
[13:06:58] [PASSED] Writeback
[13:06:58] [PASSED] SPI
[13:06:58] [PASSED] USB
[13:06:58] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[13:06:58] ======== drm_test_drm_connector_dynamic_init_name  =========
[13:06:58] [PASSED] Unknown
[13:06:58] [PASSED] VGA
[13:06:58] [PASSED] DVI-I
[13:06:58] [PASSED] DVI-D
[13:06:58] [PASSED] DVI-A
[13:06:58] [PASSED] Composite
[13:06:58] [PASSED] SVIDEO
[13:06:58] [PASSED] LVDS
[13:06:58] [PASSED] Component
[13:06:58] [PASSED] DIN
[13:06:58] [PASSED] DP
[13:06:58] [PASSED] HDMI-A
[13:06:58] [PASSED] HDMI-B
[13:06:58] [PASSED] TV
[13:06:58] [PASSED] eDP
[13:06:58] [PASSED] Virtual
[13:06:58] [PASSED] DSI
[13:06:58] [PASSED] DPI
[13:06:58] [PASSED] Writeback
[13:06:58] [PASSED] SPI
[13:06:58] [PASSED] USB
[13:06:58] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[13:06:58] =========== [PASSED] drm_connector_dynamic_init ============
[13:06:58] ==== drm_connector_dynamic_register_early (4 subtests) =====
[13:06:58] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[13:06:58] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[13:06:58] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[13:06:58] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[13:06:58] ====== [PASSED] drm_connector_dynamic_register_early =======
[13:06:58] ======= drm_connector_dynamic_register (7 subtests) ========
[13:06:58] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[13:06:58] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[13:06:58] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[13:06:58] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[13:06:58] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[13:06:58] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[13:06:58] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[13:06:58] ========= [PASSED] drm_connector_dynamic_register ==========
[13:06:58] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[13:06:58] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[13:06:58] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[13:06:58] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[13:06:58] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[13:06:58] ========== drm_test_get_tv_mode_from_name_valid  ===========
[13:06:58] [PASSED] NTSC
[13:06:58] [PASSED] NTSC-443
[13:06:58] [PASSED] NTSC-J
[13:06:58] [PASSED] PAL
[13:06:58] [PASSED] PAL-M
[13:06:58] [PASSED] PAL-N
[13:06:58] [PASSED] SECAM
[13:06:58] [PASSED] Mono
[13:06:58] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[13:06:58] [PASSED] drm_test_get_tv_mode_from_name_truncated
[13:06:58] ============ [PASSED] drm_get_tv_mode_from_name ============
[13:06:58] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[13:06:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[13:06:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[13:06:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[13:06:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[13:06:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[13:06:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[13:06:58] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[13:06:58] [PASSED] VIC 96
[13:06:58] [PASSED] VIC 97
[13:06:58] [PASSED] VIC 101
[13:06:58] [PASSED] VIC 102
[13:06:58] [PASSED] VIC 106
[13:06:58] [PASSED] VIC 107
[13:06:58] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[13:06:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[13:06:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[13:06:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[13:06:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[13:06:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[13:06:58] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[13:06:58] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[13:06:58] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[13:06:58] [PASSED] Automatic
[13:06:58] [PASSED] Full
[13:06:58] [PASSED] Limited 16:235
[13:06:58] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[13:06:58] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[13:06:58] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[13:06:58] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[13:06:58] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[13:06:58] [PASSED] RGB
[13:06:58] [PASSED] YUV 4:2:0
[13:06:58] [PASSED] YUV 4:2:2
[13:06:58] [PASSED] YUV 4:4:4
[13:06:58] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[13:06:58] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[13:06:58] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[13:06:58] ============= drm_damage_helper (21 subtests) ==============
[13:06:58] [PASSED] drm_test_damage_iter_no_damage
[13:06:58] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[13:06:58] [PASSED] drm_test_damage_iter_no_damage_src_moved
[13:06:58] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[13:06:58] [PASSED] drm_test_damage_iter_no_damage_not_visible
[13:06:58] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[13:06:58] [PASSED] drm_test_damage_iter_no_damage_no_fb
[13:06:58] [PASSED] drm_test_damage_iter_simple_damage
[13:06:58] [PASSED] drm_test_damage_iter_single_damage
[13:06:58] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[13:06:58] [PASSED] drm_test_damage_iter_single_damage_outside_src
[13:06:58] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[13:06:58] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[13:06:58] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[13:06:58] [PASSED] drm_test_damage_iter_single_damage_src_moved
[13:06:58] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[13:06:58] [PASSED] drm_test_damage_iter_damage
[13:06:58] [PASSED] drm_test_damage_iter_damage_one_intersect
[13:06:58] [PASSED] drm_test_damage_iter_damage_one_outside
[13:06:58] [PASSED] drm_test_damage_iter_damage_src_moved
[13:06:58] [PASSED] drm_test_damage_iter_damage_not_visible
[13:06:58] ================ [PASSED] drm_damage_helper ================
[13:06:58] ============== drm_dp_mst_helper (3 subtests) ==============
[13:06:58] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[13:06:58] [PASSED] Clock 154000 BPP 30 DSC disabled
[13:06:58] [PASSED] Clock 234000 BPP 30 DSC disabled
[13:06:58] [PASSED] Clock 297000 BPP 24 DSC disabled
[13:06:58] [PASSED] Clock 332880 BPP 24 DSC enabled
[13:06:58] [PASSED] Clock 324540 BPP 24 DSC enabled
[13:06:58] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[13:06:58] ============== drm_test_dp_mst_calc_pbn_div  ===============
[13:06:58] [PASSED] Link rate 2000000 lane count 4
[13:06:58] [PASSED] Link rate 2000000 lane count 2
[13:06:58] [PASSED] Link rate 2000000 lane count 1
[13:06:58] [PASSED] Link rate 1350000 lane count 4
[13:06:58] [PASSED] Link rate 1350000 lane count 2
[13:06:58] [PASSED] Link rate 1350000 lane count 1
[13:06:58] [PASSED] Link rate 1000000 lane count 4
[13:06:58] [PASSED] Link rate 1000000 lane count 2
[13:06:58] [PASSED] Link rate 1000000 lane count 1
[13:06:58] [PASSED] Link rate 810000 lane count 4
[13:06:58] [PASSED] Link rate 810000 lane count 2
[13:06:58] [PASSED] Link rate 810000 lane count 1
[13:06:58] [PASSED] Link rate 540000 lane count 4
[13:06:58] [PASSED] Link rate 540000 lane count 2
[13:06:58] [PASSED] Link rate 540000 lane count 1
[13:06:58] [PASSED] Link rate 270000 lane count 4
[13:06:58] [PASSED] Link rate 270000 lane count 2
[13:06:58] [PASSED] Link rate 270000 lane count 1
[13:06:58] [PASSED] Link rate 162000 lane count 4
[13:06:58] [PASSED] Link rate 162000 lane count 2
[13:06:58] [PASSED] Link rate 162000 lane count 1
[13:06:58] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[13:06:58] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[13:06:58] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[13:06:58] [PASSED] DP_POWER_UP_PHY with port number
[13:06:58] [PASSED] DP_POWER_DOWN_PHY with port number
[13:06:58] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[13:06:58] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[13:06:58] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[13:06:58] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[13:06:58] [PASSED] DP_QUERY_PAYLOAD with port number
[13:06:58] [PASSED] DP_QUERY_PAYLOAD with VCPI
[13:06:58] [PASSED] DP_REMOTE_DPCD_READ with port number
[13:06:58] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[13:06:58] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[13:06:58] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[13:06:58] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[13:06:58] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[13:06:58] [PASSED] DP_REMOTE_I2C_READ with port number
[13:06:58] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[13:06:58] [PASSED] DP_REMOTE_I2C_READ with transactions array
[13:06:58] [PASSED] DP_REMOTE_I2C_WRITE with port number
[13:06:58] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[13:06:58] [PASSED] DP_REMOTE_I2C_WRITE with data array
[13:06:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[13:06:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[13:06:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[13:06:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[13:06:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[13:06:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[13:06:58] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[13:06:58] ================ [PASSED] drm_dp_mst_helper ================
[13:06:58] ================== drm_exec (7 subtests) ===================
[13:06:58] [PASSED] sanitycheck
[13:06:58] [PASSED] test_lock
[13:06:58] [PASSED] test_lock_unlock
[13:06:58] [PASSED] test_duplicates
[13:06:58] [PASSED] test_prepare
[13:06:58] [PASSED] test_prepare_array
[13:06:58] [PASSED] test_multiple_loops
[13:06:58] ==================== [PASSED] drm_exec =====================
[13:06:58] =========== drm_format_helper_test (18 subtests) ===========
[13:06:58] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[13:06:58] [PASSED] single_pixel_source_buffer
[13:06:58] [PASSED] single_pixel_clip_rectangle
[13:06:58] [PASSED] well_known_colors
[13:06:58] [PASSED] destination_pitch
[13:06:58] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[13:06:58] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[13:06:58] [PASSED] single_pixel_source_buffer
[13:06:58] [PASSED] single_pixel_clip_rectangle
[13:06:58] [PASSED] well_known_colors
[13:06:58] [PASSED] destination_pitch
[13:06:58] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[13:06:58] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[13:06:58] [PASSED] single_pixel_source_buffer
[13:06:58] [PASSED] single_pixel_clip_rectangle
[13:06:58] [PASSED] well_known_colors
[13:06:58] [PASSED] destination_pitch
[13:06:58] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[13:06:58] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[13:06:58] [PASSED] single_pixel_source_buffer
[13:06:58] [PASSED] single_pixel_clip_rectangle
[13:06:58] [PASSED] well_known_colors
[13:06:58] [PASSED] destination_pitch
[13:06:58] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[13:06:58] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[13:06:58] [PASSED] single_pixel_source_buffer
[13:06:58] [PASSED] single_pixel_clip_rectangle
[13:06:58] [PASSED] well_known_colors
[13:06:58] [PASSED] destination_pitch
[13:06:58] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[13:06:58] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[13:06:58] [PASSED] single_pixel_source_buffer
[13:06:58] [PASSED] single_pixel_clip_rectangle
[13:06:58] [PASSED] well_known_colors
[13:06:58] [PASSED] destination_pitch
[13:06:58] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[13:06:58] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[13:06:58] [PASSED] single_pixel_source_buffer
[13:06:58] [PASSED] single_pixel_clip_rectangle
[13:06:58] [PASSED] well_known_colors
[13:06:58] [PASSED] destination_pitch
[13:06:58] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[13:06:58] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[13:06:58] [PASSED] single_pixel_source_buffer
[13:06:58] [PASSED] single_pixel_clip_rectangle
[13:06:58] [PASSED] well_known_colors
[13:06:58] [PASSED] destination_pitch
[13:06:58] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[13:06:58] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[13:06:58] [PASSED] single_pixel_source_buffer
[13:06:58] [PASSED] single_pixel_clip_rectangle
[13:06:58] [PASSED] well_known_colors
[13:06:58] [PASSED] destination_pitch
[13:06:58] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[13:06:58] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[13:06:58] [PASSED] single_pixel_source_buffer
[13:06:58] [PASSED] single_pixel_clip_rectangle
[13:06:58] [PASSED] well_known_colors
[13:06:58] [PASSED] destination_pitch
[13:06:58] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[13:06:58] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[13:06:58] [PASSED] single_pixel_source_buffer
[13:06:58] [PASSED] single_pixel_clip_rectangle
[13:06:58] [PASSED] well_known_colors
[13:06:58] [PASSED] destination_pitch
[13:06:58] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[13:06:58] ============== drm_test_fb_xrgb8888_to_mono  ===============
[13:06:58] [PASSED] single_pixel_source_buffer
[13:06:58] [PASSED] single_pixel_clip_rectangle
[13:06:58] [PASSED] well_known_colors
[13:06:58] [PASSED] destination_pitch
[13:06:58] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[13:06:58] ==================== drm_test_fb_swab  =====================
[13:06:58] [PASSED] single_pixel_source_buffer
[13:06:58] [PASSED] single_pixel_clip_rectangle
[13:06:58] [PASSED] well_known_colors
[13:06:58] [PASSED] destination_pitch
[13:06:58] ================ [PASSED] drm_test_fb_swab =================
[13:06:58] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[13:06:58] [PASSED] single_pixel_source_buffer
[13:06:58] [PASSED] single_pixel_clip_rectangle
[13:06:58] [PASSED] well_known_colors
[13:06:58] [PASSED] destination_pitch
[13:06:58] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[13:06:58] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[13:06:58] [PASSED] single_pixel_source_buffer
[13:06:58] [PASSED] single_pixel_clip_rectangle
[13:06:58] [PASSED] well_known_colors
[13:06:58] [PASSED] destination_pitch
[13:06:58] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[13:06:58] ================= drm_test_fb_clip_offset  =================
[13:06:58] [PASSED] pass through
[13:06:58] [PASSED] horizontal offset
[13:06:58] [PASSED] vertical offset
[13:06:58] [PASSED] horizontal and vertical offset
[13:06:58] [PASSED] horizontal offset (custom pitch)
[13:06:58] [PASSED] vertical offset (custom pitch)
[13:06:58] [PASSED] horizontal and vertical offset (custom pitch)
[13:06:58] ============= [PASSED] drm_test_fb_clip_offset =============
[13:06:58] ============== drm_test_fb_build_fourcc_list  ==============
[13:06:58] [PASSED] no native formats
[13:06:58] [PASSED] XRGB8888 as native format
[13:06:58] [PASSED] remove duplicates
[13:06:58] [PASSED] convert alpha formats
[13:06:58] [PASSED] random formats
[13:06:58] ========== [PASSED] drm_test_fb_build_fourcc_list ==========
[13:06:58] =================== drm_test_fb_memcpy  ====================
[13:06:58] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[13:06:58] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[13:06:58] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[13:06:58] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[13:06:58] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[13:06:58] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[13:06:58] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[13:06:58] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[13:06:58] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[13:06:58] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[13:06:58] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[13:06:58] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[13:06:58] =============== [PASSED] drm_test_fb_memcpy ================
[13:06:58] ============= [PASSED] drm_format_helper_test ==============
[13:06:58] ================= drm_format (18 subtests) =================
[13:06:58] [PASSED] drm_test_format_block_width_invalid
[13:06:58] [PASSED] drm_test_format_block_width_one_plane
[13:06:58] [PASSED] drm_test_format_block_width_two_plane
[13:06:58] [PASSED] drm_test_format_block_width_three_plane
[13:06:58] [PASSED] drm_test_format_block_width_tiled
[13:06:58] [PASSED] drm_test_format_block_height_invalid
[13:06:58] [PASSED] drm_test_format_block_height_one_plane
[13:06:58] [PASSED] drm_test_format_block_height_two_plane
[13:06:58] [PASSED] drm_test_format_block_height_three_plane
[13:06:58] [PASSED] drm_test_format_block_height_tiled
[13:06:58] [PASSED] drm_test_format_min_pitch_invalid
[13:06:58] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[13:06:58] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[13:06:58] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[13:06:58] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[13:06:58] [PASSED] drm_test_format_min_pitch_two_plane
[13:06:58] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[13:06:58] [PASSED] drm_test_format_min_pitch_tiled
[13:06:58] =================== [PASSED] drm_format ====================
[13:06:58] ============== drm_framebuffer (10 subtests) ===============
[13:06:58] ========== drm_test_framebuffer_check_src_coords  ==========
[13:06:58] [PASSED] Success: source fits into fb
[13:06:58] [PASSED] Fail: overflowing fb with x-axis coordinate
[13:06:58] [PASSED] Fail: overflowing fb with y-axis coordinate
[13:06:58] [PASSED] Fail: overflowing fb with source width
[13:06:58] [PASSED] Fail: overflowing fb with source height
[13:06:58] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[13:06:58] [PASSED] drm_test_framebuffer_cleanup
[13:06:58] =============== drm_test_framebuffer_create  ===============
[13:06:58] [PASSED] ABGR8888 normal sizes
[13:06:58] [PASSED] ABGR8888 max sizes
[13:06:58] [PASSED] ABGR8888 pitch greater than min required
[13:06:58] [PASSED] ABGR8888 pitch less than min required
[13:06:58] [PASSED] ABGR8888 Invalid width
[13:06:58] [PASSED] ABGR8888 Invalid buffer handle
[13:06:58] [PASSED] No pixel format
[13:06:58] [PASSED] ABGR8888 Width 0
[13:06:58] [PASSED] ABGR8888 Height 0
[13:06:58] [PASSED] ABGR8888 Out of bound height * pitch combination
[13:06:58] [PASSED] ABGR8888 Large buffer offset
[13:06:58] [PASSED] ABGR8888 Buffer offset for inexistent plane
[13:06:58] [PASSED] ABGR8888 Invalid flag
[13:06:58] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[13:06:58] [PASSED] ABGR8888 Valid buffer modifier
[13:06:58] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[13:06:58] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[13:06:58] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[13:06:58] [PASSED] NV12 Normal sizes
[13:06:58] [PASSED] NV12 Max sizes
[13:06:58] [PASSED] NV12 Invalid pitch
[13:06:58] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[13:06:58] [PASSED] NV12 different  modifier per-plane
[13:06:58] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[13:06:58] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[13:06:58] [PASSED] NV12 Modifier for inexistent plane
[13:06:58] [PASSED] NV12 Handle for inexistent plane
[13:06:58] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[13:06:58] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[13:06:58] [PASSED] YVU420 Normal sizes
[13:06:58] [PASSED] YVU420 Max sizes
[13:06:58] [PASSED] YVU420 Invalid pitch
[13:06:58] [PASSED] YVU420 Different pitches
[13:06:58] [PASSED] YVU420 Different buffer offsets/pitches
[13:06:58] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[13:06:58] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[13:06:58] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[13:06:58] [PASSED] YVU420 Valid modifier
[13:06:58] [PASSED] YVU420 Different modifiers per plane
[13:06:58] [PASSED] YVU420 Modifier for inexistent plane
[13:06:58] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[13:06:58] [PASSED] X0L2 Normal sizes
[13:06:58] [PASSED] X0L2 Max sizes
[13:06:58] [PASSED] X0L2 Invalid pitch
[13:06:58] [PASSED] X0L2 Pitch greater than minimum required
[13:06:58] [PASSED] X0L2 Handle for inexistent plane
[13:06:58] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[13:06:58] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[13:06:58] [PASSED] X0L2 Valid modifier
[13:06:58] [PASSED] X0L2 Modifier for inexistent plane
[13:06:58] =========== [PASSED] drm_test_framebuffer_create ===========
[13:06:58] [PASSED] drm_test_framebuffer_free
[13:06:58] [PASSED] drm_test_framebuffer_init
[13:06:58] [PASSED] drm_test_framebuffer_init_bad_format
[13:06:58] [PASSED] drm_test_framebuffer_init_dev_mismatch
[13:06:58] [PASSED] drm_test_framebuffer_lookup
[13:06:58] [PASSED] drm_test_framebuffer_lookup_inexistent
[13:06:58] [PASSED] drm_test_framebuffer_modifiers_not_supported
[13:06:58] ================= [PASSED] drm_framebuffer =================
[13:06:58] ================ drm_gem_shmem (8 subtests) ================
[13:06:58] [PASSED] drm_gem_shmem_test_obj_create
[13:06:58] [PASSED] drm_gem_shmem_test_obj_create_private
[13:06:58] [PASSED] drm_gem_shmem_test_pin_pages
[13:06:58] [PASSED] drm_gem_shmem_test_vmap
[13:06:58] [PASSED] drm_gem_shmem_test_get_pages_sgt
[13:06:58] [PASSED] drm_gem_shmem_test_get_sg_table
[13:06:58] [PASSED] drm_gem_shmem_test_madvise
[13:06:58] [PASSED] drm_gem_shmem_test_purge
[13:06:58] ================== [PASSED] drm_gem_shmem ==================
[13:06:58] === drm_atomic_helper_connector_hdmi_check (23 subtests) ===
[13:06:58] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[13:06:58] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[13:06:58] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[13:06:58] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[13:06:58] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[13:06:58] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[13:06:58] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[13:06:58] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[13:06:58] [PASSED] drm_test_check_disable_connector
[13:06:58] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[13:06:58] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback
[13:06:58] [PASSED] drm_test_check_max_tmds_rate_format_fallback
[13:06:58] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[13:06:58] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[13:06:58] [PASSED] drm_test_check_output_bpc_dvi
[13:06:58] [PASSED] drm_test_check_output_bpc_format_vic_1
[13:06:58] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[13:06:58] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[13:06:58] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[13:06:58] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[13:06:58] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[13:06:58] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[13:06:58] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[13:06:58] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[13:06:58] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[13:06:58] [PASSED] drm_test_check_broadcast_rgb_value
[13:06:58] [PASSED] drm_test_check_bpc_8_value
[13:06:58] [PASSED] drm_test_check_bpc_10_value
[13:06:58] [PASSED] drm_test_check_bpc_12_value
[13:06:58] [PASSED] drm_test_check_format_value
[13:06:58] [PASSED] drm_test_check_tmds_char_value
[13:06:58] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[13:06:58] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[13:06:58] [PASSED] drm_test_check_mode_valid
[13:06:58] [PASSED] drm_test_check_mode_valid_reject
[13:06:58] [PASSED] drm_test_check_mode_valid_reject_rate
[13:06:58] [PASSED] drm_test_check_mode_valid_reject_max_clock
[13:06:58] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[13:06:58] ================= drm_managed (2 subtests) =================
[13:06:58] [PASSED] drm_test_managed_release_action
[13:06:58] [PASSED] drm_test_managed_run_action
[13:06:58] =================== [PASSED] drm_managed ===================
[13:06:58] =================== drm_mm (6 subtests) ====================
[13:06:58] [PASSED] drm_test_mm_init
[13:06:58] [PASSED] drm_test_mm_debug
[13:06:58] [PASSED] drm_test_mm_align32
[13:06:58] [PASSED] drm_test_mm_align64
[13:06:58] [PASSED] drm_test_mm_lowest
[13:06:58] [PASSED] drm_test_mm_highest
[13:06:58] ===================== [PASSED] drm_mm ======================
[13:06:58] ============= drm_modes_analog_tv (5 subtests) =============
[13:06:58] [PASSED] drm_test_modes_analog_tv_mono_576i
[13:06:58] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[13:06:58] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[13:06:58] [PASSED] drm_test_modes_analog_tv_pal_576i
[13:06:58] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[13:06:58] =============== [PASSED] drm_modes_analog_tv ===============
[13:06:58] ============== drm_plane_helper (2 subtests) ===============
[13:06:58] =============== drm_test_check_plane_state  ================
[13:06:58] [PASSED] clipping_simple
[13:06:58] [PASSED] clipping_rotate_reflect
[13:06:58] [PASSED] positioning_simple
[13:06:58] [PASSED] upscaling
[13:06:58] [PASSED] downscaling
[13:06:58] [PASSED] rounding1
[13:06:58] [PASSED] rounding2
[13:06:58] [PASSED] rounding3
[13:06:58] [PASSED] rounding4
[13:06:58] =========== [PASSED] drm_test_check_plane_state ============
[13:06:58] =========== drm_test_check_invalid_plane_state  ============
[13:06:58] [PASSED] positioning_invalid
[13:06:58] [PASSED] upscaling_invalid
[13:06:58] [PASSED] downscaling_invalid
[13:06:58] ======= [PASSED] drm_test_check_invalid_plane_state ========
[13:06:58] ================ [PASSED] drm_plane_helper =================
[13:06:58] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[13:06:58] ====== drm_test_connector_helper_tv_get_modes_check  =======
[13:06:58] [PASSED] None
[13:06:58] [PASSED] PAL
[13:06:58] [PASSED] NTSC
[13:06:58] [PASSED] Both, NTSC Default
[13:06:58] [PASSED] Both, PAL Default
[13:06:58] [PASSED] Both, NTSC Default, with PAL on command-line
[13:06:58] [PASSED] Both, PAL Default, with NTSC on command-line
[13:06:58] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[13:06:58] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[13:06:58] ================== drm_rect (9 subtests) ===================
[13:06:58] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[13:06:58] [PASSED] drm_test_rect_clip_scaled_not_clipped
[13:06:58] [PASSED] drm_test_rect_clip_scaled_clipped
[13:06:58] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[13:06:58] ================= drm_test_rect_intersect  =================
[13:06:58] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[13:06:58] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[13:06:58] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[13:06:58] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[13:06:58] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[13:06:58] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[13:06:58] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[13:06:58] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[13:06:58] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[13:06:58] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[13:06:58] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[13:06:58] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[13:06:58] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[13:06:58] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
stty: 'standard input': Inappropriate ioctl for device
[13:06:58] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[13:06:58] ============= [PASSED] drm_test_rect_intersect =============
[13:06:58] ================ drm_test_rect_calc_hscale  ================
[13:06:58] [PASSED] normal use
[13:06:58] [PASSED] out of max range
[13:06:58] [PASSED] out of min range
[13:06:58] [PASSED] zero dst
[13:06:58] [PASSED] negative src
[13:06:58] [PASSED] negative dst
[13:06:58] ============ [PASSED] drm_test_rect_calc_hscale ============
[13:06:58] ================ drm_test_rect_calc_vscale  ================
[13:06:58] [PASSED] normal use
[13:06:58] [PASSED] out of max range
[13:06:58] [PASSED] out of min range
[13:06:58] [PASSED] zero dst
[13:06:58] [PASSED] negative src
[13:06:58] [PASSED] negative dst
[13:06:58] ============ [PASSED] drm_test_rect_calc_vscale ============
[13:06:58] ================== drm_test_rect_rotate  ===================
[13:06:58] [PASSED] reflect-x
[13:06:58] [PASSED] reflect-y
[13:06:58] [PASSED] rotate-0
[13:06:58] [PASSED] rotate-90
[13:06:58] [PASSED] rotate-180
[13:06:58] [PASSED] rotate-270
[13:06:58] ============== [PASSED] drm_test_rect_rotate ===============
[13:06:58] ================ drm_test_rect_rotate_inv  =================
[13:06:58] [PASSED] reflect-x
[13:06:58] [PASSED] reflect-y
[13:06:58] [PASSED] rotate-0
[13:06:58] [PASSED] rotate-90
[13:06:58] [PASSED] rotate-180
[13:06:58] [PASSED] rotate-270
[13:06:58] ============ [PASSED] drm_test_rect_rotate_inv =============
[13:06:58] ==================== [PASSED] drm_rect =====================
[13:06:58] ============================================================
[13:06:58] Testing complete. Ran 608 tests: passed: 608
[13:06:58] Elapsed time: 23.220s total, 1.715s configuring, 21.334s building, 0.146s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[13:06:58] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:07:00] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json ARCH=um O=.kunit --jobs=48
[13:07:07] Starting KUnit Kernel (1/1)...
[13:07:07] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:07:08] ================= ttm_device (5 subtests) ==================
[13:07:08] [PASSED] ttm_device_init_basic
[13:07:08] [PASSED] ttm_device_init_multiple
[13:07:08] [PASSED] ttm_device_fini_basic
[13:07:08] [PASSED] ttm_device_init_no_vma_man
[13:07:08] ================== ttm_device_init_pools  ==================
[13:07:08] [PASSED] No DMA allocations, no DMA32 required
[13:07:08] [PASSED] DMA allocations, DMA32 required
[13:07:08] [PASSED] No DMA allocations, DMA32 required
[13:07:08] [PASSED] DMA allocations, no DMA32 required
[13:07:08] ============== [PASSED] ttm_device_init_pools ==============
[13:07:08] =================== [PASSED] ttm_device ====================
[13:07:08] ================== ttm_pool (8 subtests) ===================
[13:07:08] ================== ttm_pool_alloc_basic  ===================
[13:07:08] [PASSED] One page
[13:07:08] [PASSED] More than one page
[13:07:08] [PASSED] Above the allocation limit
[13:07:08] [PASSED] One page, with coherent DMA mappings enabled
[13:07:08] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:07:08] ============== [PASSED] ttm_pool_alloc_basic ===============
[13:07:08] ============== ttm_pool_alloc_basic_dma_addr  ==============
[13:07:08] [PASSED] One page
[13:07:08] [PASSED] More than one page
[13:07:08] [PASSED] Above the allocation limit
[13:07:08] [PASSED] One page, with coherent DMA mappings enabled
[13:07:08] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:07:08] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[13:07:08] [PASSED] ttm_pool_alloc_order_caching_match
[13:07:08] [PASSED] ttm_pool_alloc_caching_mismatch
[13:07:08] [PASSED] ttm_pool_alloc_order_mismatch
[13:07:08] [PASSED] ttm_pool_free_dma_alloc
[13:07:08] [PASSED] ttm_pool_free_no_dma_alloc
[13:07:08] [PASSED] ttm_pool_fini_basic
[13:07:08] ==================== [PASSED] ttm_pool =====================
[13:07:08] ================ ttm_resource (8 subtests) =================
[13:07:08] ================= ttm_resource_init_basic  =================
[13:07:08] [PASSED] Init resource in TTM_PL_SYSTEM
[13:07:08] [PASSED] Init resource in TTM_PL_VRAM
[13:07:08] [PASSED] Init resource in a private placement
[13:07:08] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[13:07:08] ============= [PASSED] ttm_resource_init_basic =============
[13:07:08] [PASSED] ttm_resource_init_pinned
[13:07:08] [PASSED] ttm_resource_fini_basic
[13:07:08] [PASSED] ttm_resource_manager_init_basic
[13:07:08] [PASSED] ttm_resource_manager_usage_basic
[13:07:08] [PASSED] ttm_resource_manager_set_used_basic
[13:07:08] [PASSED] ttm_sys_man_alloc_basic
[13:07:08] [PASSED] ttm_sys_man_free_basic
[13:07:08] ================== [PASSED] ttm_resource ===================
[13:07:08] =================== ttm_tt (15 subtests) ===================
[13:07:08] ==================== ttm_tt_init_basic  ====================
[13:07:08] [PASSED] Page-aligned size
[13:07:08] [PASSED] Extra pages requested
[13:07:08] ================ [PASSED] ttm_tt_init_basic ================
[13:07:08] [PASSED] ttm_tt_init_misaligned
[13:07:08] [PASSED] ttm_tt_fini_basic
[13:07:08] [PASSED] ttm_tt_fini_sg
[13:07:08] [PASSED] ttm_tt_fini_shmem
[13:07:08] [PASSED] ttm_tt_create_basic
[13:07:08] [PASSED] ttm_tt_create_invalid_bo_type
[13:07:08] [PASSED] ttm_tt_create_ttm_exists
[13:07:08] [PASSED] ttm_tt_create_failed
[13:07:08] [PASSED] ttm_tt_destroy_basic
[13:07:08] [PASSED] ttm_tt_populate_null_ttm
[13:07:08] [PASSED] ttm_tt_populate_populated_ttm
[13:07:08] [PASSED] ttm_tt_unpopulate_basic
[13:07:08] [PASSED] ttm_tt_unpopulate_empty_ttm
[13:07:08] [PASSED] ttm_tt_swapin_basic
[13:07:08] ===================== [PASSED] ttm_tt ======================
[13:07:08] =================== ttm_bo (14 subtests) ===================
[13:07:08] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[13:07:08] [PASSED] Cannot be interrupted and sleeps
[13:07:08] [PASSED] Cannot be interrupted, locks straight away
[13:07:08] [PASSED] Can be interrupted, sleeps
[13:07:08] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[13:07:08] [PASSED] ttm_bo_reserve_locked_no_sleep
[13:07:08] [PASSED] ttm_bo_reserve_no_wait_ticket
[13:07:08] [PASSED] ttm_bo_reserve_double_resv
[13:07:08] [PASSED] ttm_bo_reserve_interrupted
[13:07:08] [PASSED] ttm_bo_reserve_deadlock
[13:07:08] [PASSED] ttm_bo_unreserve_basic
[13:07:08] [PASSED] ttm_bo_unreserve_pinned
[13:07:08] [PASSED] ttm_bo_unreserve_bulk
[13:07:08] [PASSED] ttm_bo_put_basic
[13:07:08] [PASSED] ttm_bo_put_shared_resv
[13:07:08] [PASSED] ttm_bo_pin_basic
[13:07:08] [PASSED] ttm_bo_pin_unpin_resource
[13:07:08] [PASSED] ttm_bo_multiple_pin_one_unpin
[13:07:08] ===================== [PASSED] ttm_bo ======================
[13:07:08] ============== ttm_bo_validate (22 subtests) ===============
[13:07:08] ============== ttm_bo_init_reserved_sys_man  ===============
[13:07:08] [PASSED] Buffer object for userspace
[13:07:08] [PASSED] Kernel buffer object
[13:07:08] [PASSED] Shared buffer object
[13:07:08] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[13:07:08] ============== ttm_bo_init_reserved_mock_man  ==============
[13:07:08] [PASSED] Buffer object for userspace
[13:07:08] [PASSED] Kernel buffer object
[13:07:08] [PASSED] Shared buffer object
[13:07:08] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[13:07:08] [PASSED] ttm_bo_init_reserved_resv
[13:07:08] ================== ttm_bo_validate_basic  ==================
[13:07:08] [PASSED] Buffer object for userspace
[13:07:08] [PASSED] Kernel buffer object
[13:07:08] [PASSED] Shared buffer object
[13:07:08] ============== [PASSED] ttm_bo_validate_basic ==============
[13:07:08] [PASSED] ttm_bo_validate_invalid_placement
[13:07:08] ============= ttm_bo_validate_same_placement  ==============
[13:07:08] [PASSED] System manager
[13:07:08] [PASSED] VRAM manager
[13:07:08] ========= [PASSED] ttm_bo_validate_same_placement ==========
[13:07:08] [PASSED] ttm_bo_validate_failed_alloc
[13:07:08] [PASSED] ttm_bo_validate_pinned
[13:07:08] [PASSED] ttm_bo_validate_busy_placement
[13:07:08] ================ ttm_bo_validate_multihop  =================
[13:07:08] [PASSED] Buffer object for userspace
[13:07:08] [PASSED] Kernel buffer object
[13:07:08] [PASSED] Shared buffer object
[13:07:08] ============ [PASSED] ttm_bo_validate_multihop =============
[13:07:08] ========== ttm_bo_validate_no_placement_signaled  ==========
[13:07:08] [PASSED] Buffer object in system domain, no page vector
[13:07:08] [PASSED] Buffer object in system domain with an existing page vector
[13:07:08] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[13:07:08] ======== ttm_bo_validate_no_placement_not_signaled  ========
[13:07:08] [PASSED] Buffer object for userspace
[13:07:08] [PASSED] Kernel buffer object
[13:07:08] [PASSED] Shared buffer object
[13:07:08] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[13:07:08] [PASSED] ttm_bo_validate_move_fence_signaled
[13:07:08] ========= ttm_bo_validate_move_fence_not_signaled  =========
[13:07:08] [PASSED] Waits for GPU
[13:07:08] [PASSED] Tries to lock straight away
[13:07:08] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[13:07:08] [PASSED] ttm_bo_validate_swapout
[13:07:08] [PASSED] ttm_bo_validate_happy_evict
[13:07:08] [PASSED] ttm_bo_validate_all_pinned_evict
[13:07:08] [PASSED] ttm_bo_validate_allowed_only_evict
[13:07:08] [PASSED] ttm_bo_validate_deleted_evict
[13:07:08] [PASSED] ttm_bo_validate_busy_domain_evict
[13:07:08] [PASSED] ttm_bo_validate_evict_gutting
[13:07:08] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[13:07:08] ================= [PASSED] ttm_bo_validate =================
[13:07:08] ============================================================
[13:07:08] Testing complete. Ran 102 tests: passed: 102
[13:07:08] Elapsed time: 10.014s total, 1.698s configuring, 7.700s building, 0.518s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ CI.Build: failure for drm/i915: Add drm_panic support (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915: Add drm_panic support (rev6)
URL   : https://patchwork.freedesktop.org/series/141937/
State : failure

== Summary ==

CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_top/dml2_top_interfaces.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/inc/dml2_debug.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_core/dml2_core_factory.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_factory.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_mcg/dml2_mcg_dcn4.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_mcg/dml2_mcg_factory.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn3.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_factory.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_standalone_libraries/lib_float_math.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/dml21_translation_helper.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/dml21_wrapper.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/dml21_utils.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_compressor.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_compressor.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_opp_regamma_v.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_opp_csc_v.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_timing_generator_v.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_mem_input_v.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_opp_v.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_transform_v.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_timing_generator.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_timing_generator.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_hw_sequencer.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dce60/dce60_resource.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/hdcp/hdcp_msg.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/sspl/dc_spl.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/sspl/dc_spl_scl_filters.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/sspl/dc_spl_scl_easf_filters.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/sspl/dc_spl_isharp_filters.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/sspl/dc_spl_filters.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/sspl/spl_fixpt31_32.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/sspl/spl_custom_float.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_stat.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_resource.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_hw_sequencer.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_sink.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_surface.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_debug.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_stream.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_enc_cfg.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_exports.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_state.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_vm_helper.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dc_helper.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dmub_srv.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dc_edid_parser.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dc/dc_spl_translate.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/modules/freesync/freesync.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/modules/color/color_gamma.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/modules/color/color_table.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/modules/info_packet/info_packet.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/modules/power/power_helpers.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_srv.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_srv_stat.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_reg.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn20.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn21.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn30.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn301.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn302.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn303.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn31.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn314.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn315.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn316.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn32.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn35.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn351.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn36.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn401.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp_ddc.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp_log.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp_psp.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp1_execution.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp1_transition.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp2_execution.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp2_transition.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/amdgpu_isp.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/isp_v4_1_0.o
  CC [M]  drivers/gpu/drm/amd/amdgpu/isp_v4_1_1.o
  LD [M]  drivers/gpu/drm/amd/amdgpu/amdgpu.o
make[5]: *** [../scripts/Makefile.build:465: drivers/gpu/drm] Error 2
make[4]: *** [../scripts/Makefile.build:465: drivers/gpu] Error 2
make[3]: *** [../scripts/Makefile.build:465: drivers] Error 2
make[2]: *** [/kernel/Makefile:1994: .] Error 2
make[1]: *** [/kernel/Makefile:251: __sub-make] Error 2
make[1]: Leaving directory '/kernel/build64-default'
make: *** [Makefile:251: __sub-make] Error 2
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel