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From: Michal Wajdeczko <michal.wajdeczko@intel.com>
To: "Anoop, Vijay" <anoop.c.vijay@intel.com>,
	<intel-xe@lists.freedesktop.org>
Cc: <rodrigo.vivi@intel.com>, <aravind.iddamsetty@intel.com>,
	<riana.tauro@intel.com>, <badal.nilawar@intel.com>,
	<anshuman.gupta@intel.com>, <umesh.nerlige.ramappa@intel.com>,
	<matthew.d.roper@intel.com>, <michael.j.ruhl@intel.com>,
	<mohamed.mansoor.v@intel.com>, <kam.nasim@intel.com>
Subject: Re: [RFC 2/5] drm/xe/soc_remapper: Use SoC remapper herlper from VSEC code
Date: Sat, 22 Nov 2025 19:57:11 +0100	[thread overview]
Message-ID: <48299251-5f13-4377-a42c-213a2a325fa2@intel.com> (raw)
In-Reply-To: <20251122045803.3616201-9-anoop.c.vijay@intel.com>



On 11/22/2025 5:58 AM, Anoop, Vijay wrote:
> From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> 
> Since different drivers can use SoC remapper, modify VSEC code to
> access SoC remapper via a helper that would synchronize such accesses.
> 
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> ---
>  drivers/gpu/drm/xe/regs/xe_pmt.h               |  3 ---
>  drivers/gpu/drm/xe/regs/xe_soc_remapper_regs.h | 13 +++++++++++++
>  drivers/gpu/drm/xe/xe_soc_remapper.c           | 18 ++++++++++++++++++
>  drivers/gpu/drm/xe/xe_soc_remapper.h           |  1 +
>  drivers/gpu/drm/xe/xe_vsec.c                   |  4 ++--
>  5 files changed, 34 insertions(+), 5 deletions(-)
>  create mode 100644 drivers/gpu/drm/xe/regs/xe_soc_remapper_regs.h
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_pmt.h b/drivers/gpu/drm/xe/regs/xe_pmt.h
> index 0f79c0714454..240d57993ea6 100644
> --- a/drivers/gpu/drm/xe/regs/xe_pmt.h
> +++ b/drivers/gpu/drm/xe/regs/xe_pmt.h
> @@ -18,9 +18,6 @@
>  #define BMG_TELEMETRY_BASE_OFFSET	0xE0000
>  #define BMG_TELEMETRY_OFFSET		(SOC_BASE + BMG_TELEMETRY_BASE_OFFSET)
>  
> -#define SG_REMAP_INDEX1			XE_REG(SOC_BASE + 0x08)
> -#define   SG_REMAP_BITS			REG_GENMASK(31, 24)
> -
>  #define BMG_MODS_RESIDENCY_OFFSET		(0x4D0)
>  #define BMG_G2_RESIDENCY_OFFSET		(0x530)
>  #define BMG_G6_RESIDENCY_OFFSET		(0x538)
> diff --git a/drivers/gpu/drm/xe/regs/xe_soc_remapper_regs.h b/drivers/gpu/drm/xe/regs/xe_soc_remapper_regs.h
> new file mode 100644
> index 000000000000..9edf234227a9
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/regs/xe_soc_remapper_regs.h
> @@ -0,0 +1,13 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +#ifndef _XE_SOC_REMAPPER_REGS_H_
> +#define _XE_SOC_REMAPPER_REGS_H_
> +
> +#include "xe_regs.h"
> +
> +#define SG_REMAP_INDEX1			XE_REG(SOC_BASE + 0x08)
> +#define   SG_REMAP_TELEM_MASK		REG_GENMASK(31, 24)
> +
> +#endif
> diff --git a/drivers/gpu/drm/xe/xe_soc_remapper.c b/drivers/gpu/drm/xe/xe_soc_remapper.c
> index f5a02abd6ab1..85d37a86117a 100644
> --- a/drivers/gpu/drm/xe/xe_soc_remapper.c
> +++ b/drivers/gpu/drm/xe/xe_soc_remapper.c
> @@ -5,8 +5,26 @@
>  
>  #include <linux/spinlock.h>
>  
> +#include "regs/xe_soc_remapper_regs.h"
> +#include "xe_mmio.h"
>  #include "xe_soc_remapper.h"
>  
> +static void xe_soc_remapper_set_region(struct xe_device *xe, struct xe_reg reg,
> +				       u32 mask, u32 val)
> +{
> +	unsigned long flags;
> +
> +	spin_lock_irqsave(&xe->soc_remapper.lock, flags);

we are converting Xe to scoped based locks, so:

	guard(spinlock_irqsave)(&xe->soc_remapper.lock);

> +	xe_mmio_rmw32(xe_root_tile_mmio(xe), reg, mask, val);
> +	spin_unlock_irqrestore(&xe->soc_remapper.lock, flags);
> +}
> +

btw, all public functions must have kernel-doc

> +void xe_soc_remapper_set_telem_region(struct xe_device *xe, u32 index)
> +{
> +	xe_soc_remapper_set_region(xe, SG_REMAP_INDEX1, SG_REMAP_TELEM_MASK,
> +				   REG_FIELD_PREP(SG_REMAP_TELEM_MASK, index));
> +}
> +
>  int xe_soc_remapper_init(struct xe_device *xe)
>  {
>  	spin_lock_init(&xe->soc_remapper.lock);
> diff --git a/drivers/gpu/drm/xe/xe_soc_remapper.h b/drivers/gpu/drm/xe/xe_soc_remapper.h
> index 3cfd44f1fd74..75431b94e66a 100644
> --- a/drivers/gpu/drm/xe/xe_soc_remapper.h
> +++ b/drivers/gpu/drm/xe/xe_soc_remapper.h
> @@ -11,5 +11,6 @@
>  #include "xe_device_types.h"
>  
>  int xe_soc_remapper_init(struct xe_device *xe);
> +void xe_soc_remapper_set_telem_region(struct xe_device *xe, u32 index);
>  
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index 8f23a27871b6..3e217fb75394 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> @@ -16,6 +16,7 @@
>  #include "xe_mmio.h"
>  #include "xe_platform_types.h"
>  #include "xe_pm.h"
> +#include "xe_soc_remapper.h"
>  #include "xe_vsec.h"
>  
>  #include "regs/xe_pmt.h"
> @@ -163,8 +164,7 @@ int xe_pmt_telem_read(struct pci_dev *pdev, u32 guid, u64 *data, loff_t user_off
>  		return -ENODATA;
>  
>  	/* set SoC re-mapper index register based on GUID memory region */
> -	xe_mmio_rmw32(xe_root_tile_mmio(xe), SG_REMAP_INDEX1, SG_REMAP_BITS,
> -		      REG_FIELD_PREP(SG_REMAP_BITS, mem_region));
> +	xe_soc_remapper_set_telem_region(xe, mem_region);
>  
>  	memcpy_fromio(data, telem_addr, count);
>  	xe_pm_runtime_put(xe);


  reply	other threads:[~2025-11-22 18:57 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-22  4:58 [RFC 0/5] drm/xe: Add System Controller support for Xe3p dGPU platforms Anoop, Vijay
2025-11-22  4:58 ` [RFC 1/5] drm/xe/soc_remapper: Initialize SoC remapper during Xe probe Anoop, Vijay
2025-11-22 18:51   ` Michal Wajdeczko
2025-11-22  4:58 ` [RFC 2/5] drm/xe/soc_remapper: Use SoC remapper herlper from VSEC code Anoop, Vijay
2025-11-22 18:57   ` Michal Wajdeczko [this message]
2025-11-22  4:58 ` [RFC 3/5] drm/xe/soc_remapper: Add system controller config for SoC remapper Anoop, Vijay
2025-11-22  4:58 ` [RFC 4/5] drm/xe/remapper: Reprogram remapper index on PM resume events Anoop, Vijay
2025-11-22  4:58 ` [RFC 5/5] drm/xe/sc: Add system controller component for Xe3p dGPU platforms Anoop, Vijay
2025-11-22  5:14   ` Matthew Brost
2025-11-22  5:21     ` Matthew Brost
2025-11-22 19:18   ` Michal Wajdeczko
2025-12-03  0:52   ` Umesh Nerlige Ramappa
2025-12-04  0:34   ` Umesh Nerlige Ramappa
2025-12-18  5:43   ` Nilawar, Badal
2025-11-24 22:25 ` ✗ CI.checkpatch: warning for drm/xe: Add System Controller support " Patchwork
2025-11-24 22:26 ` ✓ CI.KUnit: success " Patchwork
2025-11-24 23:11 ` ✓ Xe.CI.BAT: " Patchwork
2025-11-25  1:20 ` ✗ Xe.CI.Full: failure " Patchwork

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