* [PATCH v2] drm/i915/display: Mask RO bits in gen9_write_dc_state()
[not found] <<20260506130321.487414-1-dibin.moolakadan.subrahmanian@intel.com>
@ 2026-06-01 9:01 ` Dibin Moolakadan Subrahmanian
2026-06-01 9:38 ` Jani Nikula
2026-06-02 11:31 ` [PATCH v3] " Dibin Moolakadan Subrahmanian
2026-06-01 11:38 ` ✓ CI.KUnit: success for " Patchwork
` (5 subsequent siblings)
6 siblings, 2 replies; 20+ messages in thread
From: Dibin Moolakadan Subrahmanian @ 2026-06-01 9:01 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: imre.deak, uma.shankar
The DC_STATE_EN register has read-only status bits that are set by
hardware on some platforms. These bits may cause the read-back
verification loop in gen9_write_dc_state() to spuriously retry.
Mask the RO bits from both the write value and the read-back comparison
to prevent unnecessary retries.
Changes in v2:
- Rename patch from
"drm/i915/display: Use rmw in gen9_write_dc_state() to preserve non-DC
bits"
to
"drm/i915/display: Mask RO bits in gen9_write_dc_state()"
- Mask only RO bits rather than masking all non DC state bits
in DC_STATE_EN. As the register has also some clear-on-write flags,
like 'Display DC*CO State Status DSI'(Imre Deak)
BSpec: 49437,69115
Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
---
.../i915/display/intel_display_power_well.c | 29 +++++++++++++++----
1 file changed, 24 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index 04bd0dde5bed..4bc9e3ef738e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -726,14 +726,33 @@ static void assert_can_disable_dc9(struct intel_display *display)
*/
}
+static u32 dc_state_ro_mask(struct intel_display *display)
+{
+ if (DISPLAY_VER(display) >= 20)
+ return BIT(10) | BIT(11);
+ else if (DISPLAY_VER(display) >= 13 && !display->platform.dg2)
+ return BIT(10);
+
+ return 0;
+}
+
static void gen9_write_dc_state(struct intel_display *display,
u32 state)
{
int rewrites = 0;
int rereads = 0;
u32 v;
+ u32 ro_mask = dc_state_ro_mask(display);
+ u32 val = state;
+
+ /*
+ * Mask out RO status bits from both the write value and the read-back
+ * comparison. HW may set these bits independently, so exclude them
+ * to prevent the verify loop from retrying due to RO bits mismatch.
+ */
+ val &= ~ro_mask;
- intel_de_write(display, DC_STATE_EN, state);
+ intel_de_write(display, DC_STATE_EN, val);
/* It has been observed that disabling the dc6 state sometimes
* doesn't stick and dmc keeps returning old value. Make sure
@@ -741,10 +760,10 @@ static void gen9_write_dc_state(struct intel_display *display,
* we are confident that state is exactly what we want.
*/
do {
- v = intel_de_read(display, DC_STATE_EN);
+ v = intel_de_read(display, DC_STATE_EN) & ~ro_mask;
- if (v != state) {
- intel_de_write(display, DC_STATE_EN, state);
+ if (v != val) {
+ intel_de_write(display, DC_STATE_EN, val);
rewrites++;
rereads = 0;
} else if (rereads++ > 5) {
@@ -753,7 +772,7 @@ static void gen9_write_dc_state(struct intel_display *display,
} while (rewrites < 100);
- if (v != state)
+ if (v != val)
drm_err(display->drm,
"Writing dc state to 0x%x failed, now 0x%x\n",
state, v);
--
2.43.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v2] drm/i915/display: Mask RO bits in gen9_write_dc_state()
2026-06-01 9:01 ` [PATCH v2] drm/i915/display: Mask RO bits in gen9_write_dc_state() Dibin Moolakadan Subrahmanian
@ 2026-06-01 9:38 ` Jani Nikula
2026-06-01 11:47 ` Imre Deak
2026-06-02 11:31 ` [PATCH v3] " Dibin Moolakadan Subrahmanian
1 sibling, 1 reply; 20+ messages in thread
From: Jani Nikula @ 2026-06-01 9:38 UTC (permalink / raw)
To: Dibin Moolakadan Subrahmanian, intel-gfx, intel-xe; +Cc: imre.deak, uma.shankar
On Mon, 01 Jun 2026, Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com> wrote:
> The DC_STATE_EN register has read-only status bits that are set by
> hardware on some platforms. These bits may cause the read-back
> verification loop in gen9_write_dc_state() to spuriously retry.
>
> Mask the RO bits from both the write value and the read-back comparison
> to prevent unnecessary retries.
>
> Changes in v2:
> - Rename patch from
> "drm/i915/display: Use rmw in gen9_write_dc_state() to preserve non-DC
> bits"
> to
> "drm/i915/display: Mask RO bits in gen9_write_dc_state()"
> - Mask only RO bits rather than masking all non DC state bits
> in DC_STATE_EN. As the register has also some clear-on-write flags,
> like 'Display DC*CO State Status DSI'(Imre Deak)
>
> BSpec: 49437,69115
> Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
> ---
> .../i915/display/intel_display_power_well.c | 29 +++++++++++++++----
> 1 file changed, 24 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index 04bd0dde5bed..4bc9e3ef738e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -726,14 +726,33 @@ static void assert_can_disable_dc9(struct intel_display *display)
> */
> }
>
> +static u32 dc_state_ro_mask(struct intel_display *display)
> +{
> + if (DISPLAY_VER(display) >= 20)
> + return BIT(10) | BIT(11);
> + else if (DISPLAY_VER(display) >= 13 && !display->platform.dg2)
> + return BIT(10);
> +
> + return 0;
> +}
> +
> static void gen9_write_dc_state(struct intel_display *display,
> u32 state)
The caller already has the platform specific mask, please just pass that
in and use it.
BR,
Jani.
> {
> int rewrites = 0;
> int rereads = 0;
> u32 v;
> + u32 ro_mask = dc_state_ro_mask(display);
> + u32 val = state;
> +
> + /*
> + * Mask out RO status bits from both the write value and the read-back
> + * comparison. HW may set these bits independently, so exclude them
> + * to prevent the verify loop from retrying due to RO bits mismatch.
> + */
> + val &= ~ro_mask;
>
> - intel_de_write(display, DC_STATE_EN, state);
> + intel_de_write(display, DC_STATE_EN, val);
>
> /* It has been observed that disabling the dc6 state sometimes
> * doesn't stick and dmc keeps returning old value. Make sure
> @@ -741,10 +760,10 @@ static void gen9_write_dc_state(struct intel_display *display,
> * we are confident that state is exactly what we want.
> */
> do {
> - v = intel_de_read(display, DC_STATE_EN);
> + v = intel_de_read(display, DC_STATE_EN) & ~ro_mask;
>
> - if (v != state) {
> - intel_de_write(display, DC_STATE_EN, state);
> + if (v != val) {
> + intel_de_write(display, DC_STATE_EN, val);
> rewrites++;
> rereads = 0;
> } else if (rereads++ > 5) {
> @@ -753,7 +772,7 @@ static void gen9_write_dc_state(struct intel_display *display,
>
> } while (rewrites < 100);
>
> - if (v != state)
> + if (v != val)
> drm_err(display->drm,
> "Writing dc state to 0x%x failed, now 0x%x\n",
> state, v);
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH v2] drm/i915/display: Mask RO bits in gen9_write_dc_state()
2026-06-01 9:38 ` Jani Nikula
@ 2026-06-01 11:47 ` Imre Deak
2026-06-02 4:51 ` Dibin Moolakadan Subrahmanian
0 siblings, 1 reply; 20+ messages in thread
From: Imre Deak @ 2026-06-01 11:47 UTC (permalink / raw)
To: Jani Nikula
Cc: Dibin Moolakadan Subrahmanian, intel-gfx, intel-xe, uma.shankar
On Mon, Jun 01, 2026 at 12:38:31PM +0300, Jani Nikula wrote:
> On Mon, 01 Jun 2026, Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com> wrote:
> > The DC_STATE_EN register has read-only status bits that are set by
> > hardware on some platforms. These bits may cause the read-back
> > verification loop in gen9_write_dc_state() to spuriously retry.
> >
> > Mask the RO bits from both the write value and the read-back comparison
> > to prevent unnecessary retries.
> >
> > Changes in v2:
> > - Rename patch from
> > "drm/i915/display: Use rmw in gen9_write_dc_state() to preserve non-DC
> > bits"
> > to
> > "drm/i915/display: Mask RO bits in gen9_write_dc_state()"
> > - Mask only RO bits rather than masking all non DC state bits
> > in DC_STATE_EN. As the register has also some clear-on-write flags,
> > like 'Display DC*CO State Status DSI'(Imre Deak)
> >
> > BSpec: 49437,69115
> > Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
> > ---
> > .../i915/display/intel_display_power_well.c | 29 +++++++++++++++----
> > 1 file changed, 24 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > index 04bd0dde5bed..4bc9e3ef738e 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > @@ -726,14 +726,33 @@ static void assert_can_disable_dc9(struct intel_display *display)
> > */
> > }
> >
> > +static u32 dc_state_ro_mask(struct intel_display *display)
> > +{
> > + if (DISPLAY_VER(display) >= 20)
> > + return BIT(10) | BIT(11);
> > + else if (DISPLAY_VER(display) >= 13 && !display->platform.dg2)
> > + return BIT(10);
> > +
> > + return 0;
> > +}
> > +
> > static void gen9_write_dc_state(struct intel_display *display,
> > u32 state)
>
> The caller already has the platform specific mask, please just pass that
> in and use it.
Imo it's better to read-back verify all the bits written to the
DC_STATE_EN register, not only those that the caller changed. The only
exception should be the bits that are expected to be changed by the
firmware randomly (the read-only bits).
> BR,
> Jani.
>
> > {
> > int rewrites = 0;
> > int rereads = 0;
> > u32 v;
> > + u32 ro_mask = dc_state_ro_mask(display);
> > + u32 val = state;
> > +
> > + /*
> > + * Mask out RO status bits from both the write value and the read-back
> > + * comparison. HW may set these bits independently, so exclude them
> > + * to prevent the verify loop from retrying due to RO bits mismatch.
> > + */
> > + val &= ~ro_mask;
> >
> > - intel_de_write(display, DC_STATE_EN, state);
> > + intel_de_write(display, DC_STATE_EN, val);
I would not change what is written to the register, rather use the mask
only for comparison.
> >
> > /* It has been observed that disabling the dc6 state sometimes
> > * doesn't stick and dmc keeps returning old value. Make sure
> > @@ -741,10 +760,10 @@ static void gen9_write_dc_state(struct intel_display *display,
> > * we are confident that state is exactly what we want.
> > */
> > do {
> > - v = intel_de_read(display, DC_STATE_EN);
> > + v = intel_de_read(display, DC_STATE_EN) & ~ro_mask;
> >
> > - if (v != state) {
I.e. here instead of the above masking:
if (v & ~ro_mask != state & ~ro_mask)
> > - intel_de_write(display, DC_STATE_EN, state);
> > + if (v != val) {
> > + intel_de_write(display, DC_STATE_EN, val);
> > rewrites++;
> > rereads = 0;
> > } else if (rereads++ > 5) {
> > @@ -753,7 +772,7 @@ static void gen9_write_dc_state(struct intel_display *display,
> >
> > } while (rewrites < 100);
> >
> > - if (v != state)
> > + if (v != val)
> > drm_err(display->drm,
> > "Writing dc state to 0x%x failed, now 0x%x\n",
This could also print the ro_mask.
> > state, v);
>
> --
> Jani Nikula, Intel
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH v2] drm/i915/display: Mask RO bits in gen9_write_dc_state()
2026-06-01 11:47 ` Imre Deak
@ 2026-06-02 4:51 ` Dibin Moolakadan Subrahmanian
0 siblings, 0 replies; 20+ messages in thread
From: Dibin Moolakadan Subrahmanian @ 2026-06-02 4:51 UTC (permalink / raw)
To: imre.deak, Jani Nikula; +Cc: intel-gfx, intel-xe, uma.shankar
On 01-06-2026 17:17, Imre Deak wrote:
> On Mon, Jun 01, 2026 at 12:38:31PM +0300, Jani Nikula wrote:
>> On Mon, 01 Jun 2026, Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com> wrote:
>>> The DC_STATE_EN register has read-only status bits that are set by
>>> hardware on some platforms. These bits may cause the read-back
>>> verification loop in gen9_write_dc_state() to spuriously retry.
>>>
>>> Mask the RO bits from both the write value and the read-back comparison
>>> to prevent unnecessary retries.
>>>
>>> Changes in v2:
>>> - Rename patch from
>>> "drm/i915/display: Use rmw in gen9_write_dc_state() to preserve non-DC
>>> bits"
>>> to
>>> "drm/i915/display: Mask RO bits in gen9_write_dc_state()"
>>> - Mask only RO bits rather than masking all non DC state bits
>>> in DC_STATE_EN. As the register has also some clear-on-write flags,
>>> like 'Display DC*CO State Status DSI'(Imre Deak)
>>>
>>> BSpec: 49437,69115
>>> Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
>>> ---
>>> .../i915/display/intel_display_power_well.c | 29 +++++++++++++++----
>>> 1 file changed, 24 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
>>> index 04bd0dde5bed..4bc9e3ef738e 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
>>> @@ -726,14 +726,33 @@ static void assert_can_disable_dc9(struct intel_display *display)
>>> */
>>> }
>>>
>>> +static u32 dc_state_ro_mask(struct intel_display *display)
>>> +{
>>> + if (DISPLAY_VER(display) >= 20)
>>> + return BIT(10) | BIT(11);
>>> + else if (DISPLAY_VER(display) >= 13 && !display->platform.dg2)
>>> + return BIT(10);
>>> +
>>> + return 0;
>>> +}
>>> +
>>> static void gen9_write_dc_state(struct intel_display *display,
>>> u32 state)
>> The caller already has the platform specific mask, please just pass that
>> in and use it.
> Imo it's better to read-back verify all the bits written to the
> DC_STATE_EN register, not only those that the caller changed. The only
> exception should be the bits that are expected to be changed by the
> firmware randomly (the read-only bits).
>
>> BR,
>> Jani.
>>
>>> {
>>> int rewrites = 0;
>>> int rereads = 0;
>>> u32 v;
>>> + u32 ro_mask = dc_state_ro_mask(display);
>>> + u32 val = state;
>>> +
>>> + /*
>>> + * Mask out RO status bits from both the write value and the read-back
>>> + * comparison. HW may set these bits independently, so exclude them
>>> + * to prevent the verify loop from retrying due to RO bits mismatch.
>>> + */
>>> + val &= ~ro_mask;
>>>
>>> - intel_de_write(display, DC_STATE_EN, state);
>>> + intel_de_write(display, DC_STATE_EN, val);
Thanks Jani and Imre for the review.
> I would not change what is written to the register, rather use the mask
> only for comparison.
Agreed, will use mask only for comparison.
>>>
>>> /* It has been observed that disabling the dc6 state sometimes
>>> * doesn't stick and dmc keeps returning old value. Make sure
>>> @@ -741,10 +760,10 @@ static void gen9_write_dc_state(struct intel_display *display,
>>> * we are confident that state is exactly what we want.
>>> */
>>> do {
>>> - v = intel_de_read(display, DC_STATE_EN);
>>> + v = intel_de_read(display, DC_STATE_EN) & ~ro_mask;
>>>
>>> - if (v != state) {
> I.e. here instead of the above masking:
>
> if (v & ~ro_mask != state & ~ro_mask)
>
>>> - intel_de_write(display, DC_STATE_EN, state);
>>> + if (v != val) {
>>> + intel_de_write(display, DC_STATE_EN, val);
>>> rewrites++;
>>> rereads = 0;
>>> } else if (rereads++ > 5) {
>>> @@ -753,7 +772,7 @@ static void gen9_write_dc_state(struct intel_display *display,
>>>
>>> } while (rewrites < 100);
>>>
>>> - if (v != state)
>>> + if (v != val)
>>> drm_err(display->drm,
>>> "Writing dc state to 0x%x failed, now 0x%x\n",
> This could also print the ro_mask.
I will add ro_mask to print in the next version.
>>> state, v);
>> --
>> Jani Nikula, Intel
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v3] drm/i915/display: Mask RO bits in gen9_write_dc_state()
2026-06-01 9:01 ` [PATCH v2] drm/i915/display: Mask RO bits in gen9_write_dc_state() Dibin Moolakadan Subrahmanian
2026-06-01 9:38 ` Jani Nikula
@ 2026-06-02 11:31 ` Dibin Moolakadan Subrahmanian
2026-06-03 8:30 ` Jani Nikula
1 sibling, 1 reply; 20+ messages in thread
From: Dibin Moolakadan Subrahmanian @ 2026-06-02 11:31 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: imre.deak, uma.shankar, jani.nikula
The DC_STATE_EN register has read-only status bits that are set by
hardware on some platforms. These bits may cause the read-back
verification loop in gen9_write_dc_state() to spuriously retry.
Mask the RO bits from the read-back comparison to prevent
unnecessary retries.
Changes in v2:
- Rename patch from
"drm/i915/display: Use rmw in gen9_write_dc_state() to preserve non-DC
bits"
to
"drm/i915/display: Mask RO bits in gen9_write_dc_state()"
- Mask only RO bits rather than masking all non DC state bits
in DC_STATE_EN. As the register has also some clear-on-write flags,
like 'Display DC*CO State Status DSI'(Imre Deak)
Changes in v3:
- Limit ro mask to read-back comparison.
BSpec: 49437,69115
Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
---
.../i915/display/intel_display_power_well.c | 24 +++++++++++++++----
1 file changed, 20 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index 04bd0dde5bed..ab0200701a73 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -726,12 +726,28 @@ static void assert_can_disable_dc9(struct intel_display *display)
*/
}
+static u32 dc_state_ro_mask(struct intel_display *display)
+{
+ if (DISPLAY_VER(display) >= 20)
+ return BIT(10) | BIT(11);
+ else if (DISPLAY_VER(display) >= 13 && !display->platform.dg2)
+ return BIT(10);
+
+ return 0;
+}
+
static void gen9_write_dc_state(struct intel_display *display,
u32 state)
{
int rewrites = 0;
int rereads = 0;
u32 v;
+ /*
+ * Mask out RO status bits from read-back comparison.
+ * HW may set these bits independently, so exclude them
+ * to prevent the verify loop from retrying due to RO bits mismatch.
+ */
+ u32 ro_mask = dc_state_ro_mask(display);
intel_de_write(display, DC_STATE_EN, state);
@@ -743,7 +759,7 @@ static void gen9_write_dc_state(struct intel_display *display,
do {
v = intel_de_read(display, DC_STATE_EN);
- if (v != state) {
+ if ((v & ~ro_mask) != (state & ~ro_mask)) {
intel_de_write(display, DC_STATE_EN, state);
rewrites++;
rereads = 0;
@@ -753,10 +769,10 @@ static void gen9_write_dc_state(struct intel_display *display,
} while (rewrites < 100);
- if (v != state)
+ if ((v & ~ro_mask) != (state & ~ro_mask))
drm_err(display->drm,
- "Writing dc state to 0x%x failed, now 0x%x\n",
- state, v);
+ "Writing dc state to 0x%x failed, now 0x%x (ro_mask=0x%x)\n",
+ state, v, ro_mask);
/* Most of the times we need one retry, avoid spam */
if (rewrites > 1)
--
2.43.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v3] drm/i915/display: Mask RO bits in gen9_write_dc_state()
2026-06-02 11:31 ` [PATCH v3] " Dibin Moolakadan Subrahmanian
@ 2026-06-03 8:30 ` Jani Nikula
2026-06-03 11:45 ` Imre Deak
0 siblings, 1 reply; 20+ messages in thread
From: Jani Nikula @ 2026-06-03 8:30 UTC (permalink / raw)
To: Dibin Moolakadan Subrahmanian, intel-gfx, intel-xe; +Cc: imre.deak, uma.shankar
On Tue, 02 Jun 2026, Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com> wrote:
> The DC_STATE_EN register has read-only status bits that are set by
> hardware on some platforms. These bits may cause the read-back
> verification loop in gen9_write_dc_state() to spuriously retry.
>
> Mask the RO bits from the read-back comparison to prevent
> unnecessary retries.
>
> Changes in v2:
> - Rename patch from
> "drm/i915/display: Use rmw in gen9_write_dc_state() to preserve non-DC
> bits"
> to
> "drm/i915/display: Mask RO bits in gen9_write_dc_state()"
> - Mask only RO bits rather than masking all non DC state bits
> in DC_STATE_EN. As the register has also some clear-on-write flags,
> like 'Display DC*CO State Status DSI'(Imre Deak)
>
> Changes in v3:
> - Limit ro mask to read-back comparison.
>
> BSpec: 49437,69115
> Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
> ---
> .../i915/display/intel_display_power_well.c | 24 +++++++++++++++----
> 1 file changed, 20 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index 04bd0dde5bed..ab0200701a73 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -726,12 +726,28 @@ static void assert_can_disable_dc9(struct intel_display *display)
> */
> }
>
> +static u32 dc_state_ro_mask(struct intel_display *display)
> +{
> + if (DISPLAY_VER(display) >= 20)
> + return BIT(10) | BIT(11);
> + else if (DISPLAY_VER(display) >= 13 && !display->platform.dg2)
> + return BIT(10);
Register contents need to be defined next to the register definition.
But even so, the caller already has the mask we want to change, I
already suggested passing that in. What's wrong with that?
BR,
Jani.
> +
> + return 0;
> +}
> +
> static void gen9_write_dc_state(struct intel_display *display,
> u32 state)
> {
> int rewrites = 0;
> int rereads = 0;
> u32 v;
> + /*
> + * Mask out RO status bits from read-back comparison.
> + * HW may set these bits independently, so exclude them
> + * to prevent the verify loop from retrying due to RO bits mismatch.
> + */
> + u32 ro_mask = dc_state_ro_mask(display);
>
> intel_de_write(display, DC_STATE_EN, state);
>
> @@ -743,7 +759,7 @@ static void gen9_write_dc_state(struct intel_display *display,
> do {
> v = intel_de_read(display, DC_STATE_EN);
>
> - if (v != state) {
> + if ((v & ~ro_mask) != (state & ~ro_mask)) {
> intel_de_write(display, DC_STATE_EN, state);
> rewrites++;
> rereads = 0;
> @@ -753,10 +769,10 @@ static void gen9_write_dc_state(struct intel_display *display,
>
> } while (rewrites < 100);
>
> - if (v != state)
> + if ((v & ~ro_mask) != (state & ~ro_mask))
> drm_err(display->drm,
> - "Writing dc state to 0x%x failed, now 0x%x\n",
> - state, v);
> + "Writing dc state to 0x%x failed, now 0x%x (ro_mask=0x%x)\n",
> + state, v, ro_mask);
>
> /* Most of the times we need one retry, avoid spam */
> if (rewrites > 1)
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH v3] drm/i915/display: Mask RO bits in gen9_write_dc_state()
2026-06-03 8:30 ` Jani Nikula
@ 2026-06-03 11:45 ` Imre Deak
2026-06-03 15:16 ` Jani Nikula
0 siblings, 1 reply; 20+ messages in thread
From: Imre Deak @ 2026-06-03 11:45 UTC (permalink / raw)
To: Jani Nikula
Cc: Dibin Moolakadan Subrahmanian, intel-gfx, intel-xe, uma.shankar
On Wed, Jun 03, 2026 at 11:30:04AM +0300, Jani Nikula wrote:
> On Tue, 02 Jun 2026, Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com> wrote:
> > The DC_STATE_EN register has read-only status bits that are set by
> > hardware on some platforms. These bits may cause the read-back
> > verification loop in gen9_write_dc_state() to spuriously retry.
> >
> > Mask the RO bits from the read-back comparison to prevent
> > unnecessary retries.
> >
> > Changes in v2:
> > - Rename patch from
> > "drm/i915/display: Use rmw in gen9_write_dc_state() to preserve non-DC
> > bits"
> > to
> > "drm/i915/display: Mask RO bits in gen9_write_dc_state()"
> > - Mask only RO bits rather than masking all non DC state bits
> > in DC_STATE_EN. As the register has also some clear-on-write flags,
> > like 'Display DC*CO State Status DSI'(Imre Deak)
> >
> > Changes in v3:
> > - Limit ro mask to read-back comparison.
> >
> > BSpec: 49437,69115
> > Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
> > ---
> > .../i915/display/intel_display_power_well.c | 24 +++++++++++++++----
> > 1 file changed, 20 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > index 04bd0dde5bed..ab0200701a73 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > @@ -726,12 +726,28 @@ static void assert_can_disable_dc9(struct intel_display *display)
> > */
> > }
> >
> > +static u32 dc_state_ro_mask(struct intel_display *display)
> > +{
> > + if (DISPLAY_VER(display) >= 20)
> > + return BIT(10) | BIT(11);
> > + else if (DISPLAY_VER(display) >= 13 && !display->platform.dg2)
> > + return BIT(10);
>
> Register contents need to be defined next to the register definition.
>
> But even so, the caller already has the mask we want to change, I
> already suggested passing that in. What's wrong with that?
The mask used by the caller only contains the bits which the driver
changes. However I would like to know that writing all the other bits in
the register also take their effect, reflected by the read-back after the
write.
> BR,
> Jani.
>
>
> > +
> > + return 0;
> > +}
> > +
> > static void gen9_write_dc_state(struct intel_display *display,
> > u32 state)
> > {
> > int rewrites = 0;
> > int rereads = 0;
> > u32 v;
> > + /*
> > + * Mask out RO status bits from read-back comparison.
> > + * HW may set these bits independently, so exclude them
> > + * to prevent the verify loop from retrying due to RO bits mismatch.
> > + */
> > + u32 ro_mask = dc_state_ro_mask(display);
> >
> > intel_de_write(display, DC_STATE_EN, state);
> >
> > @@ -743,7 +759,7 @@ static void gen9_write_dc_state(struct intel_display *display,
> > do {
> > v = intel_de_read(display, DC_STATE_EN);
> >
> > - if (v != state) {
> > + if ((v & ~ro_mask) != (state & ~ro_mask)) {
> > intel_de_write(display, DC_STATE_EN, state);
> > rewrites++;
> > rereads = 0;
> > @@ -753,10 +769,10 @@ static void gen9_write_dc_state(struct intel_display *display,
> >
> > } while (rewrites < 100);
> >
> > - if (v != state)
> > + if ((v & ~ro_mask) != (state & ~ro_mask))
> > drm_err(display->drm,
> > - "Writing dc state to 0x%x failed, now 0x%x\n",
> > - state, v);
> > + "Writing dc state to 0x%x failed, now 0x%x (ro_mask=0x%x)\n",
> > + state, v, ro_mask);
> >
> > /* Most of the times we need one retry, avoid spam */
> > if (rewrites > 1)
>
> --
> Jani Nikula, Intel
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH v3] drm/i915/display: Mask RO bits in gen9_write_dc_state()
2026-06-03 11:45 ` Imre Deak
@ 2026-06-03 15:16 ` Jani Nikula
2026-06-05 7:52 ` Dibin Moolakadan Subrahmanian
0 siblings, 1 reply; 20+ messages in thread
From: Jani Nikula @ 2026-06-03 15:16 UTC (permalink / raw)
To: imre.deak; +Cc: Dibin Moolakadan Subrahmanian, intel-gfx, intel-xe, uma.shankar
On Wed, 03 Jun 2026, Imre Deak <imre.deak@intel.com> wrote:
> On Wed, Jun 03, 2026 at 11:30:04AM +0300, Jani Nikula wrote:
>> On Tue, 02 Jun 2026, Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com> wrote:
>> > +static u32 dc_state_ro_mask(struct intel_display *display)
>> > +{
>> > + if (DISPLAY_VER(display) >= 20)
>> > + return BIT(10) | BIT(11);
>> > + else if (DISPLAY_VER(display) >= 13 && !display->platform.dg2)
>> > + return BIT(10);
>>
>> Register contents need to be defined next to the register definition.
>>
>> But even so, the caller already has the mask we want to change, I
>> already suggested passing that in. What's wrong with that?
>
> The mask used by the caller only contains the bits which the driver
> changes. However I would like to know that writing all the other bits in
> the register also take their effect, reflected by the read-back after the
> write.
Fair enough. The first comment still stands, let's not hardcode the bits
here inline.
BR,
Jani.
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH v3] drm/i915/display: Mask RO bits in gen9_write_dc_state()
2026-06-03 15:16 ` Jani Nikula
@ 2026-06-05 7:52 ` Dibin Moolakadan Subrahmanian
0 siblings, 0 replies; 20+ messages in thread
From: Dibin Moolakadan Subrahmanian @ 2026-06-05 7:52 UTC (permalink / raw)
To: Jani Nikula, imre.deak; +Cc: intel-gfx, intel-xe, uma.shankar
On 6/3/2026 8:46 PM, Jani Nikula wrote:
> On Wed, 03 Jun 2026, Imre Deak <imre.deak@intel.com> wrote:
>> On Wed, Jun 03, 2026 at 11:30:04AM +0300, Jani Nikula wrote:
>>> On Tue, 02 Jun 2026, Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com> wrote:
>>>> +static u32 dc_state_ro_mask(struct intel_display *display)
>>>> +{
>>>> + if (DISPLAY_VER(display) >= 20)
>>>> + return BIT(10) | BIT(11);
>>>> + else if (DISPLAY_VER(display) >= 13 && !display->platform.dg2)
>>>> + return BIT(10);
>>> Register contents need to be defined next to the register definition.
>>>
>>> But even so, the caller already has the mask we want to change, I
>>> already suggested passing that in. What's wrong with that?
>> The mask used by the caller only contains the bits which the driver
>> changes. However I would like to know that writing all the other bits in
>> the register also take their effect, reflected by the read-back after the
>> write.
> Fair enough. The first comment still stands, let's not hardcode the bits
> here inline.
Thank you Imre, Jani for confirming mask logic.
I will keep the mask logic as is for next version and add bit definitions
next to DC_STATE_EN register.
> BR,
> Jani.
>
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* ✓ CI.KUnit: success for drm/i915/display: Mask RO bits in gen9_write_dc_state()
[not found] <<20260506130321.487414-1-dibin.moolakadan.subrahmanian@intel.com>
2026-06-01 9:01 ` [PATCH v2] drm/i915/display: Mask RO bits in gen9_write_dc_state() Dibin Moolakadan Subrahmanian
@ 2026-06-01 11:38 ` Patchwork
2026-06-01 12:18 ` ✓ Xe.CI.BAT: " Patchwork
` (4 subsequent siblings)
6 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-06-01 11:38 UTC (permalink / raw)
To: Dibin Moolakadan Subrahmanian; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: Mask RO bits in gen9_write_dc_state()
URL : https://patchwork.freedesktop.org/series/167642/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[11:37:12] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:37:16] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:37:48] Starting KUnit Kernel (1/1)...
[11:37:48] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:37:48] ================== guc_buf (11 subtests) ===================
[11:37:48] [PASSED] test_smallest
[11:37:48] [PASSED] test_largest
[11:37:48] [PASSED] test_granular
[11:37:48] [PASSED] test_unique
[11:37:48] [PASSED] test_overlap
[11:37:48] [PASSED] test_reusable
[11:37:48] [PASSED] test_too_big
[11:37:48] [PASSED] test_flush
[11:37:48] [PASSED] test_lookup
[11:37:48] [PASSED] test_data
[11:37:48] [PASSED] test_class
[11:37:48] ===================== [PASSED] guc_buf =====================
[11:37:48] =================== guc_dbm (7 subtests) ===================
[11:37:48] [PASSED] test_empty
[11:37:48] [PASSED] test_default
[11:37:48] ======================== test_size ========================
[11:37:48] [PASSED] 4
[11:37:48] [PASSED] 8
[11:37:48] [PASSED] 32
[11:37:48] [PASSED] 256
[11:37:48] ==================== [PASSED] test_size ====================
[11:37:48] ======================= test_reuse ========================
[11:37:48] [PASSED] 4
[11:37:48] [PASSED] 8
[11:37:48] [PASSED] 32
[11:37:48] [PASSED] 256
[11:37:48] =================== [PASSED] test_reuse ====================
[11:37:48] =================== test_range_overlap ====================
[11:37:48] [PASSED] 4
[11:37:48] [PASSED] 8
[11:37:48] [PASSED] 32
[11:37:48] [PASSED] 256
[11:37:48] =============== [PASSED] test_range_overlap ================
[11:37:48] =================== test_range_compact ====================
[11:37:48] [PASSED] 4
[11:37:48] [PASSED] 8
[11:37:48] [PASSED] 32
[11:37:48] [PASSED] 256
[11:37:48] =============== [PASSED] test_range_compact ================
[11:37:48] ==================== test_range_spare =====================
[11:37:48] [PASSED] 4
[11:37:48] [PASSED] 8
[11:37:48] [PASSED] 32
[11:37:48] [PASSED] 256
[11:37:48] ================ [PASSED] test_range_spare =================
[11:37:48] ===================== [PASSED] guc_dbm =====================
[11:37:48] =================== guc_idm (6 subtests) ===================
[11:37:48] [PASSED] bad_init
[11:37:48] [PASSED] no_init
[11:37:48] [PASSED] init_fini
[11:37:48] [PASSED] check_used
[11:37:48] [PASSED] check_quota
[11:37:48] [PASSED] check_all
[11:37:48] ===================== [PASSED] guc_idm =====================
[11:37:48] ================== no_relay (3 subtests) ===================
[11:37:48] [PASSED] xe_drops_guc2pf_if_not_ready
[11:37:48] [PASSED] xe_drops_guc2vf_if_not_ready
[11:37:48] [PASSED] xe_rejects_send_if_not_ready
[11:37:48] ==================== [PASSED] no_relay =====================
[11:37:48] ================== pf_relay (14 subtests) ==================
[11:37:48] [PASSED] pf_rejects_guc2pf_too_short
[11:37:48] [PASSED] pf_rejects_guc2pf_too_long
[11:37:48] [PASSED] pf_rejects_guc2pf_no_payload
[11:37:48] [PASSED] pf_fails_no_payload
[11:37:48] [PASSED] pf_fails_bad_origin
[11:37:48] [PASSED] pf_fails_bad_type
[11:37:48] [PASSED] pf_txn_reports_error
[11:37:48] [PASSED] pf_txn_sends_pf2guc
[11:37:48] [PASSED] pf_sends_pf2guc
[11:37:48] [SKIPPED] pf_loopback_nop
[11:37:48] [SKIPPED] pf_loopback_echo
[11:37:48] [SKIPPED] pf_loopback_fail
[11:37:48] [SKIPPED] pf_loopback_busy
[11:37:48] [SKIPPED] pf_loopback_retry
[11:37:48] ==================== [PASSED] pf_relay =====================
[11:37:48] ================== vf_relay (3 subtests) ===================
[11:37:48] [PASSED] vf_rejects_guc2vf_too_short
[11:37:48] [PASSED] vf_rejects_guc2vf_too_long
[11:37:48] [PASSED] vf_rejects_guc2vf_no_payload
[11:37:48] ==================== [PASSED] vf_relay =====================
[11:37:48] ================ pf_gt_config (9 subtests) =================
[11:37:48] [PASSED] fair_contexts_1vf
[11:37:48] [PASSED] fair_doorbells_1vf
[11:37:48] [PASSED] fair_ggtt_1vf
[11:37:48] ====================== fair_vram_1vf ======================
[11:37:48] [PASSED] 3.50 GiB
[11:37:48] [PASSED] 11.5 GiB
[11:37:48] [PASSED] 15.5 GiB
[11:37:48] [PASSED] 31.5 GiB
[11:37:48] [PASSED] 63.5 GiB
[11:37:48] [PASSED] 1.91 GiB
[11:37:48] ================== [PASSED] fair_vram_1vf ==================
[11:37:48] ================ fair_vram_1vf_admin_only =================
[11:37:48] [PASSED] 3.50 GiB
[11:37:48] [PASSED] 11.5 GiB
[11:37:48] [PASSED] 15.5 GiB
[11:37:48] [PASSED] 31.5 GiB
[11:37:48] [PASSED] 63.5 GiB
[11:37:48] [PASSED] 1.91 GiB
[11:37:48] ============ [PASSED] fair_vram_1vf_admin_only =============
[11:37:48] ====================== fair_contexts ======================
[11:37:48] [PASSED] 1 VF
[11:37:48] [PASSED] 2 VFs
[11:37:48] [PASSED] 3 VFs
[11:37:48] [PASSED] 4 VFs
[11:37:48] [PASSED] 5 VFs
[11:37:48] [PASSED] 6 VFs
[11:37:48] [PASSED] 7 VFs
[11:37:48] [PASSED] 8 VFs
[11:37:48] [PASSED] 9 VFs
[11:37:48] [PASSED] 10 VFs
[11:37:48] [PASSED] 11 VFs
[11:37:48] [PASSED] 12 VFs
[11:37:48] [PASSED] 13 VFs
[11:37:48] [PASSED] 14 VFs
[11:37:48] [PASSED] 15 VFs
[11:37:48] [PASSED] 16 VFs
[11:37:48] [PASSED] 17 VFs
[11:37:48] [PASSED] 18 VFs
[11:37:48] [PASSED] 19 VFs
[11:37:48] [PASSED] 20 VFs
[11:37:48] [PASSED] 21 VFs
[11:37:48] [PASSED] 22 VFs
[11:37:48] [PASSED] 23 VFs
[11:37:48] [PASSED] 24 VFs
[11:37:48] [PASSED] 25 VFs
[11:37:48] [PASSED] 26 VFs
[11:37:48] [PASSED] 27 VFs
[11:37:48] [PASSED] 28 VFs
[11:37:48] [PASSED] 29 VFs
[11:37:48] [PASSED] 30 VFs
[11:37:48] [PASSED] 31 VFs
[11:37:48] [PASSED] 32 VFs
[11:37:48] [PASSED] 33 VFs
[11:37:48] [PASSED] 34 VFs
[11:37:48] [PASSED] 35 VFs
[11:37:48] [PASSED] 36 VFs
[11:37:48] [PASSED] 37 VFs
[11:37:48] [PASSED] 38 VFs
[11:37:48] [PASSED] 39 VFs
[11:37:48] [PASSED] 40 VFs
[11:37:48] [PASSED] 41 VFs
[11:37:48] [PASSED] 42 VFs
[11:37:48] [PASSED] 43 VFs
[11:37:48] [PASSED] 44 VFs
[11:37:48] [PASSED] 45 VFs
[11:37:48] [PASSED] 46 VFs
[11:37:48] [PASSED] 47 VFs
[11:37:48] [PASSED] 48 VFs
[11:37:48] [PASSED] 49 VFs
[11:37:48] [PASSED] 50 VFs
[11:37:48] [PASSED] 51 VFs
[11:37:48] [PASSED] 52 VFs
[11:37:48] [PASSED] 53 VFs
[11:37:48] [PASSED] 54 VFs
[11:37:48] [PASSED] 55 VFs
[11:37:48] [PASSED] 56 VFs
[11:37:48] [PASSED] 57 VFs
[11:37:48] [PASSED] 58 VFs
[11:37:48] [PASSED] 59 VFs
[11:37:48] [PASSED] 60 VFs
[11:37:48] [PASSED] 61 VFs
[11:37:48] [PASSED] 62 VFs
[11:37:48] [PASSED] 63 VFs
[11:37:48] ================== [PASSED] fair_contexts ==================
[11:37:48] ===================== fair_doorbells ======================
[11:37:48] [PASSED] 1 VF
[11:37:48] [PASSED] 2 VFs
[11:37:48] [PASSED] 3 VFs
[11:37:48] [PASSED] 4 VFs
[11:37:48] [PASSED] 5 VFs
[11:37:48] [PASSED] 6 VFs
[11:37:48] [PASSED] 7 VFs
[11:37:48] [PASSED] 8 VFs
[11:37:48] [PASSED] 9 VFs
[11:37:48] [PASSED] 10 VFs
[11:37:48] [PASSED] 11 VFs
[11:37:48] [PASSED] 12 VFs
[11:37:48] [PASSED] 13 VFs
[11:37:48] [PASSED] 14 VFs
[11:37:48] [PASSED] 15 VFs
[11:37:48] [PASSED] 16 VFs
[11:37:48] [PASSED] 17 VFs
[11:37:48] [PASSED] 18 VFs
[11:37:48] [PASSED] 19 VFs
[11:37:48] [PASSED] 20 VFs
[11:37:48] [PASSED] 21 VFs
[11:37:48] [PASSED] 22 VFs
[11:37:48] [PASSED] 23 VFs
[11:37:48] [PASSED] 24 VFs
[11:37:48] [PASSED] 25 VFs
[11:37:48] [PASSED] 26 VFs
[11:37:48] [PASSED] 27 VFs
[11:37:48] [PASSED] 28 VFs
[11:37:48] [PASSED] 29 VFs
[11:37:48] [PASSED] 30 VFs
[11:37:48] [PASSED] 31 VFs
[11:37:48] [PASSED] 32 VFs
[11:37:48] [PASSED] 33 VFs
[11:37:48] [PASSED] 34 VFs
[11:37:48] [PASSED] 35 VFs
[11:37:48] [PASSED] 36 VFs
[11:37:48] [PASSED] 37 VFs
[11:37:48] [PASSED] 38 VFs
[11:37:48] [PASSED] 39 VFs
[11:37:48] [PASSED] 40 VFs
[11:37:48] [PASSED] 41 VFs
[11:37:48] [PASSED] 42 VFs
[11:37:48] [PASSED] 43 VFs
[11:37:48] [PASSED] 44 VFs
[11:37:48] [PASSED] 45 VFs
[11:37:48] [PASSED] 46 VFs
[11:37:48] [PASSED] 47 VFs
[11:37:48] [PASSED] 48 VFs
[11:37:48] [PASSED] 49 VFs
[11:37:48] [PASSED] 50 VFs
[11:37:48] [PASSED] 51 VFs
[11:37:48] [PASSED] 52 VFs
[11:37:48] [PASSED] 53 VFs
[11:37:48] [PASSED] 54 VFs
[11:37:48] [PASSED] 55 VFs
[11:37:48] [PASSED] 56 VFs
[11:37:48] [PASSED] 57 VFs
[11:37:48] [PASSED] 58 VFs
[11:37:48] [PASSED] 59 VFs
[11:37:48] [PASSED] 60 VFs
[11:37:48] [PASSED] 61 VFs
[11:37:48] [PASSED] 62 VFs
[11:37:48] [PASSED] 63 VFs
[11:37:48] ================= [PASSED] fair_doorbells ==================
[11:37:48] ======================== fair_ggtt ========================
[11:37:48] [PASSED] 1 VF
[11:37:48] [PASSED] 2 VFs
[11:37:48] [PASSED] 3 VFs
[11:37:48] [PASSED] 4 VFs
[11:37:48] [PASSED] 5 VFs
[11:37:48] [PASSED] 6 VFs
[11:37:48] [PASSED] 7 VFs
[11:37:48] [PASSED] 8 VFs
[11:37:48] [PASSED] 9 VFs
[11:37:48] [PASSED] 10 VFs
[11:37:48] [PASSED] 11 VFs
[11:37:48] [PASSED] 12 VFs
[11:37:48] [PASSED] 13 VFs
[11:37:48] [PASSED] 14 VFs
[11:37:48] [PASSED] 15 VFs
[11:37:48] [PASSED] 16 VFs
[11:37:48] [PASSED] 17 VFs
[11:37:48] [PASSED] 18 VFs
[11:37:48] [PASSED] 19 VFs
[11:37:48] [PASSED] 20 VFs
[11:37:48] [PASSED] 21 VFs
[11:37:48] [PASSED] 22 VFs
[11:37:48] [PASSED] 23 VFs
[11:37:48] [PASSED] 24 VFs
[11:37:48] [PASSED] 25 VFs
[11:37:48] [PASSED] 26 VFs
[11:37:48] [PASSED] 27 VFs
[11:37:48] [PASSED] 28 VFs
[11:37:48] [PASSED] 29 VFs
[11:37:48] [PASSED] 30 VFs
[11:37:48] [PASSED] 31 VFs
[11:37:48] [PASSED] 32 VFs
[11:37:48] [PASSED] 33 VFs
[11:37:48] [PASSED] 34 VFs
[11:37:48] [PASSED] 35 VFs
[11:37:48] [PASSED] 36 VFs
[11:37:48] [PASSED] 37 VFs
[11:37:48] [PASSED] 38 VFs
[11:37:48] [PASSED] 39 VFs
[11:37:48] [PASSED] 40 VFs
[11:37:48] [PASSED] 41 VFs
[11:37:48] [PASSED] 42 VFs
[11:37:48] [PASSED] 43 VFs
[11:37:48] [PASSED] 44 VFs
[11:37:48] [PASSED] 45 VFs
[11:37:48] [PASSED] 46 VFs
[11:37:48] [PASSED] 47 VFs
[11:37:48] [PASSED] 48 VFs
[11:37:48] [PASSED] 49 VFs
[11:37:48] [PASSED] 50 VFs
[11:37:48] [PASSED] 51 VFs
[11:37:48] [PASSED] 52 VFs
[11:37:48] [PASSED] 53 VFs
[11:37:48] [PASSED] 54 VFs
[11:37:48] [PASSED] 55 VFs
[11:37:48] [PASSED] 56 VFs
[11:37:48] [PASSED] 57 VFs
[11:37:48] [PASSED] 58 VFs
[11:37:48] [PASSED] 59 VFs
[11:37:48] [PASSED] 60 VFs
[11:37:48] [PASSED] 61 VFs
[11:37:48] [PASSED] 62 VFs
[11:37:48] [PASSED] 63 VFs
[11:37:48] ==================== [PASSED] fair_ggtt ====================
[11:37:48] ======================== fair_vram ========================
[11:37:48] [PASSED] 1 VF
[11:37:48] [PASSED] 2 VFs
[11:37:48] [PASSED] 3 VFs
[11:37:48] [PASSED] 4 VFs
[11:37:48] [PASSED] 5 VFs
[11:37:48] [PASSED] 6 VFs
[11:37:48] [PASSED] 7 VFs
[11:37:48] [PASSED] 8 VFs
[11:37:48] [PASSED] 9 VFs
[11:37:48] [PASSED] 10 VFs
[11:37:48] [PASSED] 11 VFs
[11:37:48] [PASSED] 12 VFs
[11:37:48] [PASSED] 13 VFs
[11:37:48] [PASSED] 14 VFs
[11:37:48] [PASSED] 15 VFs
[11:37:48] [PASSED] 16 VFs
[11:37:48] [PASSED] 17 VFs
[11:37:48] [PASSED] 18 VFs
[11:37:48] [PASSED] 19 VFs
[11:37:48] [PASSED] 20 VFs
[11:37:48] [PASSED] 21 VFs
[11:37:48] [PASSED] 22 VFs
[11:37:48] [PASSED] 23 VFs
[11:37:48] [PASSED] 24 VFs
[11:37:48] [PASSED] 25 VFs
[11:37:48] [PASSED] 26 VFs
[11:37:48] [PASSED] 27 VFs
[11:37:48] [PASSED] 28 VFs
[11:37:48] [PASSED] 29 VFs
[11:37:48] [PASSED] 30 VFs
[11:37:48] [PASSED] 31 VFs
[11:37:48] [PASSED] 32 VFs
[11:37:48] [PASSED] 33 VFs
[11:37:48] [PASSED] 34 VFs
[11:37:48] [PASSED] 35 VFs
[11:37:48] [PASSED] 36 VFs
[11:37:48] [PASSED] 37 VFs
[11:37:48] [PASSED] 38 VFs
[11:37:48] [PASSED] 39 VFs
[11:37:48] [PASSED] 40 VFs
[11:37:48] [PASSED] 41 VFs
[11:37:48] [PASSED] 42 VFs
[11:37:48] [PASSED] 43 VFs
[11:37:48] [PASSED] 44 VFs
[11:37:48] [PASSED] 45 VFs
[11:37:48] [PASSED] 46 VFs
[11:37:48] [PASSED] 47 VFs
[11:37:48] [PASSED] 48 VFs
[11:37:48] [PASSED] 49 VFs
[11:37:48] [PASSED] 50 VFs
[11:37:48] [PASSED] 51 VFs
[11:37:48] [PASSED] 52 VFs
[11:37:48] [PASSED] 53 VFs
[11:37:48] [PASSED] 54 VFs
[11:37:48] [PASSED] 55 VFs
[11:37:48] [PASSED] 56 VFs
[11:37:48] [PASSED] 57 VFs
[11:37:48] [PASSED] 58 VFs
[11:37:48] [PASSED] 59 VFs
[11:37:48] [PASSED] 60 VFs
[11:37:48] [PASSED] 61 VFs
[11:37:48] [PASSED] 62 VFs
[11:37:48] [PASSED] 63 VFs
[11:37:48] ==================== [PASSED] fair_vram ====================
[11:37:48] ================== [PASSED] pf_gt_config ===================
[11:37:48] ===================== lmtt (1 subtest) =====================
[11:37:48] ======================== test_ops =========================
[11:37:48] [PASSED] 2-level
[11:37:48] [PASSED] multi-level
[11:37:48] ==================== [PASSED] test_ops =====================
[11:37:48] ====================== [PASSED] lmtt =======================
[11:37:48] ================= pf_service (11 subtests) =================
[11:37:48] [PASSED] pf_negotiate_any
[11:37:48] [PASSED] pf_negotiate_base_match
[11:37:48] [PASSED] pf_negotiate_base_newer
[11:37:48] [PASSED] pf_negotiate_base_next
[11:37:48] [SKIPPED] pf_negotiate_base_older
[11:37:48] [PASSED] pf_negotiate_base_prev
[11:37:48] [PASSED] pf_negotiate_latest_match
[11:37:48] [PASSED] pf_negotiate_latest_newer
[11:37:48] [PASSED] pf_negotiate_latest_next
[11:37:48] [SKIPPED] pf_negotiate_latest_older
[11:37:48] [SKIPPED] pf_negotiate_latest_prev
[11:37:48] =================== [PASSED] pf_service ====================
[11:37:48] ================= xe_guc_g2g (2 subtests) ==================
[11:37:48] ============== xe_live_guc_g2g_kunit_default ==============
[11:37:48] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[11:37:48] ============== xe_live_guc_g2g_kunit_allmem ===============
[11:37:48] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[11:37:48] =================== [SKIPPED] xe_guc_g2g ===================
[11:37:48] =================== xe_mocs (2 subtests) ===================
[11:37:48] ================ xe_live_mocs_kernel_kunit ================
[11:37:48] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[11:37:48] ================ xe_live_mocs_reset_kunit =================
[11:37:48] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[11:37:48] ==================== [SKIPPED] xe_mocs =====================
[11:37:48] ================= xe_migrate (2 subtests) ==================
[11:37:48] ================= xe_migrate_sanity_kunit =================
[11:37:48] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[11:37:48] ================== xe_validate_ccs_kunit ==================
[11:37:48] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[11:37:48] =================== [SKIPPED] xe_migrate ===================
[11:37:48] ================== xe_dma_buf (1 subtest) ==================
[11:37:48] ==================== xe_dma_buf_kunit =====================
[11:37:48] ================ [SKIPPED] xe_dma_buf_kunit ================
[11:37:48] =================== [SKIPPED] xe_dma_buf ===================
[11:37:48] ================= xe_bo_shrink (1 subtest) =================
[11:37:48] =================== xe_bo_shrink_kunit ====================
[11:37:48] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[11:37:48] ================== [SKIPPED] xe_bo_shrink ==================
[11:37:48] ==================== xe_bo (2 subtests) ====================
[11:37:48] ================== xe_ccs_migrate_kunit ===================
[11:37:48] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[11:37:48] ==================== xe_bo_evict_kunit ====================
[11:37:48] =============== [SKIPPED] xe_bo_evict_kunit ================
[11:37:48] ===================== [SKIPPED] xe_bo ======================
[11:37:48] ==================== args (13 subtests) ====================
[11:37:48] [PASSED] count_args_test
[11:37:48] [PASSED] call_args_example
[11:37:48] [PASSED] call_args_test
[11:37:48] [PASSED] drop_first_arg_example
[11:37:48] [PASSED] drop_first_arg_test
[11:37:48] [PASSED] first_arg_example
[11:37:48] [PASSED] first_arg_test
[11:37:48] [PASSED] last_arg_example
[11:37:48] [PASSED] last_arg_test
[11:37:48] [PASSED] pick_arg_example
[11:37:48] [PASSED] if_args_example
[11:37:48] [PASSED] if_args_test
[11:37:48] [PASSED] sep_comma_example
[11:37:48] ====================== [PASSED] args =======================
[11:37:48] =================== xe_pci (3 subtests) ====================
[11:37:48] ==================== check_graphics_ip ====================
[11:37:48] [PASSED] 12.00 Xe_LP
[11:37:48] [PASSED] 12.10 Xe_LP+
[11:37:48] [PASSED] 12.55 Xe_HPG
[11:37:48] [PASSED] 12.60 Xe_HPC
[11:37:48] [PASSED] 12.70 Xe_LPG
[11:37:48] [PASSED] 12.71 Xe_LPG
[11:37:48] [PASSED] 12.74 Xe_LPG+
[11:37:48] [PASSED] 20.01 Xe2_HPG
[11:37:48] [PASSED] 20.02 Xe2_HPG
[11:37:48] [PASSED] 20.04 Xe2_LPG
[11:37:48] [PASSED] 30.00 Xe3_LPG
[11:37:48] [PASSED] 30.01 Xe3_LPG
[11:37:48] [PASSED] 30.03 Xe3_LPG
[11:37:48] [PASSED] 30.04 Xe3_LPG
[11:37:48] [PASSED] 30.05 Xe3_LPG
[11:37:48] [PASSED] 35.10 Xe3p_LPG
[11:37:48] [PASSED] 35.11 Xe3p_XPC
[11:37:48] ================ [PASSED] check_graphics_ip ================
[11:37:48] ===================== check_media_ip ======================
[11:37:48] [PASSED] 12.00 Xe_M
[11:37:48] [PASSED] 12.55 Xe_HPM
[11:37:48] [PASSED] 13.00 Xe_LPM+
[11:37:48] [PASSED] 13.01 Xe2_HPM
[11:37:48] [PASSED] 20.00 Xe2_LPM
[11:37:48] [PASSED] 30.00 Xe3_LPM
[11:37:48] [PASSED] 30.02 Xe3_LPM
[11:37:48] [PASSED] 35.00 Xe3p_LPM
[11:37:48] [PASSED] 35.03 Xe3p_HPM
[11:37:48] ================= [PASSED] check_media_ip ==================
[11:37:48] =================== check_platform_desc ===================
[11:37:48] [PASSED] 0x9A60 (TIGERLAKE)
[11:37:48] [PASSED] 0x9A68 (TIGERLAKE)
[11:37:48] [PASSED] 0x9A70 (TIGERLAKE)
[11:37:48] [PASSED] 0x9A40 (TIGERLAKE)
[11:37:48] [PASSED] 0x9A49 (TIGERLAKE)
[11:37:48] [PASSED] 0x9A59 (TIGERLAKE)
[11:37:48] [PASSED] 0x9A78 (TIGERLAKE)
[11:37:48] [PASSED] 0x9AC0 (TIGERLAKE)
[11:37:48] [PASSED] 0x9AC9 (TIGERLAKE)
[11:37:48] [PASSED] 0x9AD9 (TIGERLAKE)
[11:37:48] [PASSED] 0x9AF8 (TIGERLAKE)
[11:37:48] [PASSED] 0x4C80 (ROCKETLAKE)
[11:37:48] [PASSED] 0x4C8A (ROCKETLAKE)
[11:37:48] [PASSED] 0x4C8B (ROCKETLAKE)
[11:37:48] [PASSED] 0x4C8C (ROCKETLAKE)
[11:37:48] [PASSED] 0x4C90 (ROCKETLAKE)
[11:37:48] [PASSED] 0x4C9A (ROCKETLAKE)
[11:37:48] [PASSED] 0x4680 (ALDERLAKE_S)
[11:37:48] [PASSED] 0x4682 (ALDERLAKE_S)
[11:37:48] [PASSED] 0x4688 (ALDERLAKE_S)
[11:37:48] [PASSED] 0x468A (ALDERLAKE_S)
[11:37:48] [PASSED] 0x468B (ALDERLAKE_S)
[11:37:48] [PASSED] 0x4690 (ALDERLAKE_S)
[11:37:48] [PASSED] 0x4692 (ALDERLAKE_S)
[11:37:48] [PASSED] 0x4693 (ALDERLAKE_S)
[11:37:48] [PASSED] 0x46A0 (ALDERLAKE_P)
[11:37:48] [PASSED] 0x46A1 (ALDERLAKE_P)
[11:37:48] [PASSED] 0x46A2 (ALDERLAKE_P)
[11:37:48] [PASSED] 0x46A3 (ALDERLAKE_P)
[11:37:48] [PASSED] 0x46A6 (ALDERLAKE_P)
[11:37:48] [PASSED] 0x46A8 (ALDERLAKE_P)
[11:37:48] [PASSED] 0x46AA (ALDERLAKE_P)
[11:37:48] [PASSED] 0x462A (ALDERLAKE_P)
[11:37:48] [PASSED] 0x4626 (ALDERLAKE_P)
[11:37:48] [PASSED] 0x4628 (ALDERLAKE_P)
[11:37:48] [PASSED] 0x46B0 (ALDERLAKE_P)
[11:37:48] [PASSED] 0x46B1 (ALDERLAKE_P)
[11:37:48] [PASSED] 0x46B2 (ALDERLAKE_P)
[11:37:48] [PASSED] 0x46B3 (ALDERLAKE_P)
[11:37:48] [PASSED] 0x46C0 (ALDERLAKE_P)
[11:37:48] [PASSED] 0x46C1 (ALDERLAKE_P)
[11:37:48] [PASSED] 0x46C2 (ALDERLAKE_P)
[11:37:48] [PASSED] 0x46C3 (ALDERLAKE_P)
[11:37:48] [PASSED] 0x46D0 (ALDERLAKE_N)
[11:37:48] [PASSED] 0x46D1 (ALDERLAKE_N)
[11:37:48] [PASSED] 0x46D2 (ALDERLAKE_N)
[11:37:48] [PASSED] 0x46D3 (ALDERLAKE_N)
[11:37:48] [PASSED] 0x46D4 (ALDERLAKE_N)
[11:37:48] [PASSED] 0xA721 (ALDERLAKE_P)
[11:37:48] [PASSED] 0xA7A1 (ALDERLAKE_P)
[11:37:48] [PASSED] 0xA7A9 (ALDERLAKE_P)
[11:37:48] [PASSED] 0xA7AC (ALDERLAKE_P)
[11:37:48] [PASSED] 0xA7AD (ALDERLAKE_P)
[11:37:48] [PASSED] 0xA720 (ALDERLAKE_P)
[11:37:48] [PASSED] 0xA7A0 (ALDERLAKE_P)
[11:37:48] [PASSED] 0xA7A8 (ALDERLAKE_P)
[11:37:48] [PASSED] 0xA7AA (ALDERLAKE_P)
[11:37:48] [PASSED] 0xA7AB (ALDERLAKE_P)
[11:37:48] [PASSED] 0xA780 (ALDERLAKE_S)
[11:37:48] [PASSED] 0xA781 (ALDERLAKE_S)
[11:37:48] [PASSED] 0xA782 (ALDERLAKE_S)
[11:37:48] [PASSED] 0xA783 (ALDERLAKE_S)
[11:37:48] [PASSED] 0xA788 (ALDERLAKE_S)
[11:37:48] [PASSED] 0xA789 (ALDERLAKE_S)
[11:37:48] [PASSED] 0xA78A (ALDERLAKE_S)
[11:37:48] [PASSED] 0xA78B (ALDERLAKE_S)
[11:37:48] [PASSED] 0x4905 (DG1)
[11:37:48] [PASSED] 0x4906 (DG1)
[11:37:48] [PASSED] 0x4907 (DG1)
[11:37:48] [PASSED] 0x4908 (DG1)
[11:37:48] [PASSED] 0x4909 (DG1)
[11:37:48] [PASSED] 0x56C0 (DG2)
[11:37:48] [PASSED] 0x56C2 (DG2)
[11:37:48] [PASSED] 0x56C1 (DG2)
[11:37:48] [PASSED] 0x7D51 (METEORLAKE)
[11:37:48] [PASSED] 0x7DD1 (METEORLAKE)
[11:37:48] [PASSED] 0x7D41 (METEORLAKE)
[11:37:48] [PASSED] 0x7D67 (METEORLAKE)
[11:37:48] [PASSED] 0xB640 (METEORLAKE)
[11:37:48] [PASSED] 0x56A0 (DG2)
[11:37:48] [PASSED] 0x56A1 (DG2)
[11:37:48] [PASSED] 0x56A2 (DG2)
[11:37:48] [PASSED] 0x56BE (DG2)
[11:37:48] [PASSED] 0x56BF (DG2)
[11:37:48] [PASSED] 0x5690 (DG2)
[11:37:48] [PASSED] 0x5691 (DG2)
[11:37:48] [PASSED] 0x5692 (DG2)
[11:37:48] [PASSED] 0x56A5 (DG2)
[11:37:48] [PASSED] 0x56A6 (DG2)
[11:37:48] [PASSED] 0x56B0 (DG2)
[11:37:48] [PASSED] 0x56B1 (DG2)
[11:37:48] [PASSED] 0x56BA (DG2)
[11:37:48] [PASSED] 0x56BB (DG2)
[11:37:48] [PASSED] 0x56BC (DG2)
[11:37:48] [PASSED] 0x56BD (DG2)
[11:37:48] [PASSED] 0x5693 (DG2)
[11:37:48] [PASSED] 0x5694 (DG2)
[11:37:48] [PASSED] 0x5695 (DG2)
[11:37:48] [PASSED] 0x56A3 (DG2)
[11:37:48] [PASSED] 0x56A4 (DG2)
[11:37:48] [PASSED] 0x56B2 (DG2)
[11:37:48] [PASSED] 0x56B3 (DG2)
[11:37:48] [PASSED] 0x5696 (DG2)
[11:37:48] [PASSED] 0x5697 (DG2)
[11:37:48] [PASSED] 0xB69 (PVC)
[11:37:48] [PASSED] 0xB6E (PVC)
[11:37:48] [PASSED] 0xBD4 (PVC)
[11:37:48] [PASSED] 0xBD5 (PVC)
[11:37:48] [PASSED] 0xBD6 (PVC)
[11:37:48] [PASSED] 0xBD7 (PVC)
[11:37:48] [PASSED] 0xBD8 (PVC)
[11:37:48] [PASSED] 0xBD9 (PVC)
[11:37:48] [PASSED] 0xBDA (PVC)
[11:37:48] [PASSED] 0xBDB (PVC)
[11:37:48] [PASSED] 0xBE0 (PVC)
[11:37:48] [PASSED] 0xBE1 (PVC)
[11:37:48] [PASSED] 0xBE5 (PVC)
[11:37:48] [PASSED] 0x7D40 (METEORLAKE)
[11:37:48] [PASSED] 0x7D45 (METEORLAKE)
[11:37:48] [PASSED] 0x7D55 (METEORLAKE)
[11:37:48] [PASSED] 0x7D60 (METEORLAKE)
[11:37:48] [PASSED] 0x7DD5 (METEORLAKE)
[11:37:48] [PASSED] 0x6420 (LUNARLAKE)
[11:37:48] [PASSED] 0x64A0 (LUNARLAKE)
[11:37:48] [PASSED] 0x64B0 (LUNARLAKE)
[11:37:48] [PASSED] 0xE202 (BATTLEMAGE)
[11:37:48] [PASSED] 0xE209 (BATTLEMAGE)
[11:37:48] [PASSED] 0xE20B (BATTLEMAGE)
[11:37:48] [PASSED] 0xE20C (BATTLEMAGE)
[11:37:48] [PASSED] 0xE20D (BATTLEMAGE)
[11:37:48] [PASSED] 0xE210 (BATTLEMAGE)
[11:37:48] [PASSED] 0xE211 (BATTLEMAGE)
[11:37:48] [PASSED] 0xE212 (BATTLEMAGE)
[11:37:48] [PASSED] 0xE216 (BATTLEMAGE)
[11:37:48] [PASSED] 0xE220 (BATTLEMAGE)
[11:37:48] [PASSED] 0xE221 (BATTLEMAGE)
[11:37:48] [PASSED] 0xE222 (BATTLEMAGE)
[11:37:48] [PASSED] 0xE223 (BATTLEMAGE)
[11:37:48] [PASSED] 0xB080 (PANTHERLAKE)
[11:37:48] [PASSED] 0xB081 (PANTHERLAKE)
[11:37:48] [PASSED] 0xB082 (PANTHERLAKE)
[11:37:48] [PASSED] 0xB083 (PANTHERLAKE)
[11:37:48] [PASSED] 0xB084 (PANTHERLAKE)
[11:37:48] [PASSED] 0xB085 (PANTHERLAKE)
[11:37:48] [PASSED] 0xB086 (PANTHERLAKE)
[11:37:48] [PASSED] 0xB087 (PANTHERLAKE)
[11:37:48] [PASSED] 0xB08F (PANTHERLAKE)
[11:37:48] [PASSED] 0xB090 (PANTHERLAKE)
[11:37:48] [PASSED] 0xB0A0 (PANTHERLAKE)
[11:37:48] [PASSED] 0xB0B0 (PANTHERLAKE)
[11:37:48] [PASSED] 0xFD80 (PANTHERLAKE)
[11:37:48] [PASSED] 0xFD81 (PANTHERLAKE)
[11:37:48] [PASSED] 0xD740 (NOVALAKE_S)
[11:37:48] [PASSED] 0xD741 (NOVALAKE_S)
[11:37:48] [PASSED] 0xD742 (NOVALAKE_S)
[11:37:48] [PASSED] 0xD743 (NOVALAKE_S)
[11:37:48] [PASSED] 0xD744 (NOVALAKE_S)
[11:37:48] [PASSED] 0xD745 (NOVALAKE_S)
[11:37:48] [PASSED] 0x674C (CRESCENTISLAND)
[11:37:48] [PASSED] 0x674D (CRESCENTISLAND)
[11:37:48] [PASSED] 0x674E (CRESCENTISLAND)
[11:37:48] [PASSED] 0x674F (CRESCENTISLAND)
[11:37:48] [PASSED] 0x6750 (CRESCENTISLAND)
[11:37:48] [PASSED] 0xD750 (NOVALAKE_P)
[11:37:48] [PASSED] 0xD751 (NOVALAKE_P)
[11:37:48] [PASSED] 0xD752 (NOVALAKE_P)
[11:37:48] [PASSED] 0xD753 (NOVALAKE_P)
[11:37:48] [PASSED] 0xD754 (NOVALAKE_P)
[11:37:48] [PASSED] 0xD755 (NOVALAKE_P)
[11:37:48] [PASSED] 0xD756 (NOVALAKE_P)
[11:37:48] [PASSED] 0xD757 (NOVALAKE_P)
[11:37:48] [PASSED] 0xD75F (NOVALAKE_P)
[11:37:48] =============== [PASSED] check_platform_desc ===============
[11:37:48] ===================== [PASSED] xe_pci ======================
[11:37:48] =================== xe_rtp (3 subtests) ====================
[11:37:48] =================== xe_rtp_rules_tests ====================
[11:37:48] [PASSED] no
[11:37:48] [PASSED] yes
[11:37:48] [PASSED] no-and-no
[11:37:48] [PASSED] no-and-yes
[11:37:48] [PASSED] yes-and-no
[11:37:48] [PASSED] yes-and-yes
[11:37:48] [PASSED] no-or-no
[11:37:48] [PASSED] no-or-yes
[11:37:48] [PASSED] yes-or-no
[11:37:48] [PASSED] yes-or-yes
[11:37:48] [PASSED] no-yes-or-yes-no
[11:37:48] [PASSED] no-yes-or-yes-yes
[11:37:48] [PASSED] yes-yes-or-no-yes
[11:37:48] [PASSED] yes-yes-or-yes-yes
[11:37:48] [PASSED] no-no-or-yes-or-no
[11:37:48] [PASSED] or
[11:37:48] [PASSED] or-yes
[11:37:48] [PASSED] or-no
[11:37:48] [PASSED] yes-or
[11:37:48] [PASSED] no-or
[11:37:48] [PASSED] no-or-or-yes
[11:37:48] [PASSED] yes-or-or-no
[11:37:48] [PASSED] no-or-or-no
[11:37:48] [PASSED] missing-context-engine-class
[11:37:48] [PASSED] missing-context-engine-class-or-yes
[11:37:48] [PASSED] missing-context-engine-class-or-or-yes
[11:37:48] =============== [PASSED] xe_rtp_rules_tests ================
[11:37:48] =============== xe_rtp_process_to_sr_tests ================
[11:37:48] [PASSED] coalesce-same-reg
[11:37:48] [PASSED] no-match-no-add
[11:37:48] [PASSED] two-regs-two-entries
[11:37:48] [PASSED] clr-one-set-other
[11:37:48] [PASSED] set-field
[11:37:48] [PASSED] conflict-duplicate
[11:37:48] [PASSED] conflict-not-disjoint
[11:37:48] [PASSED] conflict-reg-type
[11:37:48] [PASSED] bad-mcr-reg-forced-to-regular
[11:37:48] [PASSED] bad-regular-reg-forced-to-mcr
[11:37:48] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[11:37:48] ================== xe_rtp_process_tests ===================
[11:37:48] [PASSED] active1
[11:37:48] [PASSED] active2
[11:37:48] [PASSED] active-inactive
[11:37:48] [PASSED] inactive-active
[11:37:48] [PASSED] inactive-active-inactive
[11:37:48] [PASSED] inactive-inactive-inactive
[11:37:48] ============== [PASSED] xe_rtp_process_tests ===============
[11:37:48] ===================== [PASSED] xe_rtp ======================
[11:37:48] ==================== xe_wa (1 subtest) =====================
[11:37:48] ======================== xe_wa_gt =========================
[11:37:48] [PASSED] TIGERLAKE B0
[11:37:48] [PASSED] DG1 A0
[11:37:48] [PASSED] DG1 B0
[11:37:48] [PASSED] ALDERLAKE_S A0
[11:37:48] [PASSED] ALDERLAKE_S B0
[11:37:48] [PASSED] ALDERLAKE_S C0
[11:37:48] [PASSED] ALDERLAKE_S D0
[11:37:48] [PASSED] ALDERLAKE_P A0
[11:37:48] [PASSED] ALDERLAKE_P B0
[11:37:48] [PASSED] ALDERLAKE_P C0
[11:37:48] [PASSED] ALDERLAKE_S RPLS D0
[11:37:48] [PASSED] ALDERLAKE_P RPLU E0
[11:37:48] [PASSED] DG2 G10 C0
[11:37:48] [PASSED] DG2 G11 B1
[11:37:48] [PASSED] DG2 G12 A1
[11:37:48] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:37:48] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:37:48] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[11:37:48] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[11:37:48] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[11:37:48] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[11:37:48] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[11:37:48] ==================== [PASSED] xe_wa_gt =====================
[11:37:48] ====================== [PASSED] xe_wa ======================
[11:37:48] ============================================================
[11:37:48] Testing complete. Ran 624 tests: passed: 606, skipped: 18
[11:37:48] Elapsed time: 36.393s total, 4.341s configuring, 31.386s building, 0.620s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[11:37:48] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:37:50] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:38:14] Starting KUnit Kernel (1/1)...
[11:38:14] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:38:15] ============ drm_test_pick_cmdline (2 subtests) ============
[11:38:15] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[11:38:15] =============== drm_test_pick_cmdline_named ===============
[11:38:15] [PASSED] NTSC
[11:38:15] [PASSED] NTSC-J
[11:38:15] [PASSED] PAL
[11:38:15] [PASSED] PAL-M
[11:38:15] =========== [PASSED] drm_test_pick_cmdline_named ===========
[11:38:15] ============== [PASSED] drm_test_pick_cmdline ==============
[11:38:15] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[11:38:15] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[11:38:15] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[11:38:15] =========== drm_validate_clone_mode (2 subtests) ===========
[11:38:15] ============== drm_test_check_in_clone_mode ===============
[11:38:15] [PASSED] in_clone_mode
[11:38:15] [PASSED] not_in_clone_mode
[11:38:15] ========== [PASSED] drm_test_check_in_clone_mode ===========
[11:38:15] =============== drm_test_check_valid_clones ===============
[11:38:15] [PASSED] not_in_clone_mode
[11:38:15] [PASSED] valid_clone
[11:38:15] [PASSED] invalid_clone
[11:38:15] =========== [PASSED] drm_test_check_valid_clones ===========
[11:38:15] ============= [PASSED] drm_validate_clone_mode =============
[11:38:15] ============= drm_validate_modeset (1 subtest) =============
[11:38:15] [PASSED] drm_test_check_connector_changed_modeset
[11:38:15] ============== [PASSED] drm_validate_modeset ===============
[11:38:15] ====== drm_test_bridge_get_current_state (2 subtests) ======
[11:38:15] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[11:38:15] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[11:38:15] ======== [PASSED] drm_test_bridge_get_current_state ========
[11:38:15] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[11:38:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[11:38:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[11:38:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[11:38:15] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[11:38:15] ============== drm_bridge_alloc (2 subtests) ===============
[11:38:15] [PASSED] drm_test_drm_bridge_alloc_basic
[11:38:15] [PASSED] drm_test_drm_bridge_alloc_get_put
[11:38:15] ================ [PASSED] drm_bridge_alloc =================
[11:38:15] ============= drm_cmdline_parser (40 subtests) =============
[11:38:15] [PASSED] drm_test_cmdline_force_d_only
[11:38:15] [PASSED] drm_test_cmdline_force_D_only_dvi
[11:38:15] [PASSED] drm_test_cmdline_force_D_only_hdmi
[11:38:15] [PASSED] drm_test_cmdline_force_D_only_not_digital
[11:38:15] [PASSED] drm_test_cmdline_force_e_only
[11:38:15] [PASSED] drm_test_cmdline_res
[11:38:15] [PASSED] drm_test_cmdline_res_vesa
[11:38:15] [PASSED] drm_test_cmdline_res_vesa_rblank
[11:38:15] [PASSED] drm_test_cmdline_res_rblank
[11:38:15] [PASSED] drm_test_cmdline_res_bpp
[11:38:15] [PASSED] drm_test_cmdline_res_refresh
[11:38:15] [PASSED] drm_test_cmdline_res_bpp_refresh
[11:38:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[11:38:15] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[11:38:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[11:38:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[11:38:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[11:38:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[11:38:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[11:38:15] [PASSED] drm_test_cmdline_res_margins_force_on
[11:38:15] [PASSED] drm_test_cmdline_res_vesa_margins
[11:38:15] [PASSED] drm_test_cmdline_name
[11:38:15] [PASSED] drm_test_cmdline_name_bpp
[11:38:15] [PASSED] drm_test_cmdline_name_option
[11:38:15] [PASSED] drm_test_cmdline_name_bpp_option
[11:38:15] [PASSED] drm_test_cmdline_rotate_0
[11:38:15] [PASSED] drm_test_cmdline_rotate_90
[11:38:15] [PASSED] drm_test_cmdline_rotate_180
[11:38:15] [PASSED] drm_test_cmdline_rotate_270
[11:38:15] [PASSED] drm_test_cmdline_hmirror
[11:38:15] [PASSED] drm_test_cmdline_vmirror
[11:38:15] [PASSED] drm_test_cmdline_margin_options
[11:38:15] [PASSED] drm_test_cmdline_multiple_options
[11:38:15] [PASSED] drm_test_cmdline_bpp_extra_and_option
[11:38:15] [PASSED] drm_test_cmdline_extra_and_option
[11:38:15] [PASSED] drm_test_cmdline_freestanding_options
[11:38:15] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[11:38:15] [PASSED] drm_test_cmdline_panel_orientation
[11:38:15] ================ drm_test_cmdline_invalid =================
[11:38:15] [PASSED] margin_only
[11:38:15] [PASSED] interlace_only
[11:38:15] [PASSED] res_missing_x
[11:38:15] [PASSED] res_missing_y
[11:38:15] [PASSED] res_bad_y
[11:38:15] [PASSED] res_missing_y_bpp
[11:38:15] [PASSED] res_bad_bpp
[11:38:15] [PASSED] res_bad_refresh
[11:38:15] [PASSED] res_bpp_refresh_force_on_off
[11:38:15] [PASSED] res_invalid_mode
[11:38:15] [PASSED] res_bpp_wrong_place_mode
[11:38:15] [PASSED] name_bpp_refresh
[11:38:15] [PASSED] name_refresh
[11:38:15] [PASSED] name_refresh_wrong_mode
[11:38:15] [PASSED] name_refresh_invalid_mode
[11:38:15] [PASSED] rotate_multiple
[11:38:15] [PASSED] rotate_invalid_val
[11:38:15] [PASSED] rotate_truncated
[11:38:15] [PASSED] invalid_option
[11:38:15] [PASSED] invalid_tv_option
[11:38:15] [PASSED] truncated_tv_option
[11:38:15] ============ [PASSED] drm_test_cmdline_invalid =============
[11:38:15] =============== drm_test_cmdline_tv_options ===============
[11:38:15] [PASSED] NTSC
[11:38:15] [PASSED] NTSC_443
[11:38:15] [PASSED] NTSC_J
[11:38:15] [PASSED] PAL
[11:38:15] [PASSED] PAL_M
[11:38:15] [PASSED] PAL_N
[11:38:15] [PASSED] SECAM
[11:38:15] [PASSED] MONO_525
[11:38:15] [PASSED] MONO_625
[11:38:15] =========== [PASSED] drm_test_cmdline_tv_options ===========
[11:38:15] =============== [PASSED] drm_cmdline_parser ================
[11:38:15] ========== drmm_connector_hdmi_init (20 subtests) ==========
[11:38:15] [PASSED] drm_test_connector_hdmi_init_valid
[11:38:15] [PASSED] drm_test_connector_hdmi_init_bpc_8
[11:38:15] [PASSED] drm_test_connector_hdmi_init_bpc_10
[11:38:15] [PASSED] drm_test_connector_hdmi_init_bpc_12
[11:38:15] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[11:38:15] [PASSED] drm_test_connector_hdmi_init_bpc_null
[11:38:15] [PASSED] drm_test_connector_hdmi_init_formats_empty
[11:38:15] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[11:38:15] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:38:15] [PASSED] supported_formats=0x9 yuv420_allowed=1
[11:38:15] [PASSED] supported_formats=0x9 yuv420_allowed=0
[11:38:15] [PASSED] supported_formats=0x5 yuv420_allowed=1
[11:38:15] [PASSED] supported_formats=0x5 yuv420_allowed=0
[11:38:15] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:38:15] [PASSED] drm_test_connector_hdmi_init_null_ddc
[11:38:15] [PASSED] drm_test_connector_hdmi_init_null_product
[11:38:15] [PASSED] drm_test_connector_hdmi_init_null_vendor
[11:38:15] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[11:38:15] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[11:38:15] [PASSED] drm_test_connector_hdmi_init_product_valid
[11:38:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[11:38:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[11:38:15] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[11:38:15] ========= drm_test_connector_hdmi_init_type_valid =========
[11:38:15] [PASSED] HDMI-A
[11:38:15] [PASSED] HDMI-B
[11:38:15] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[11:38:15] ======== drm_test_connector_hdmi_init_type_invalid ========
[11:38:15] [PASSED] Unknown
[11:38:15] [PASSED] VGA
[11:38:15] [PASSED] DVI-I
[11:38:15] [PASSED] DVI-D
[11:38:15] [PASSED] DVI-A
[11:38:15] [PASSED] Composite
[11:38:15] [PASSED] SVIDEO
[11:38:15] [PASSED] LVDS
[11:38:15] [PASSED] Component
[11:38:15] [PASSED] DIN
[11:38:15] [PASSED] DP
[11:38:15] [PASSED] TV
[11:38:15] [PASSED] eDP
[11:38:15] [PASSED] Virtual
[11:38:15] [PASSED] DSI
[11:38:15] [PASSED] DPI
[11:38:15] [PASSED] Writeback
[11:38:15] [PASSED] SPI
[11:38:15] [PASSED] USB
[11:38:15] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[11:38:15] ============ [PASSED] drmm_connector_hdmi_init =============
[11:38:15] ============= drmm_connector_init (3 subtests) =============
[11:38:15] [PASSED] drm_test_drmm_connector_init
[11:38:15] [PASSED] drm_test_drmm_connector_init_null_ddc
[11:38:15] ========= drm_test_drmm_connector_init_type_valid =========
[11:38:15] [PASSED] Unknown
[11:38:15] [PASSED] VGA
[11:38:15] [PASSED] DVI-I
[11:38:15] [PASSED] DVI-D
[11:38:15] [PASSED] DVI-A
[11:38:15] [PASSED] Composite
[11:38:15] [PASSED] SVIDEO
[11:38:15] [PASSED] LVDS
[11:38:15] [PASSED] Component
[11:38:15] [PASSED] DIN
[11:38:15] [PASSED] DP
[11:38:15] [PASSED] HDMI-A
[11:38:15] [PASSED] HDMI-B
[11:38:15] [PASSED] TV
[11:38:15] [PASSED] eDP
[11:38:15] [PASSED] Virtual
[11:38:15] [PASSED] DSI
[11:38:15] [PASSED] DPI
[11:38:15] [PASSED] Writeback
[11:38:15] [PASSED] SPI
[11:38:15] [PASSED] USB
[11:38:15] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[11:38:15] =============== [PASSED] drmm_connector_init ===============
[11:38:15] ========= drm_connector_dynamic_init (6 subtests) ==========
[11:38:15] [PASSED] drm_test_drm_connector_dynamic_init
[11:38:15] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[11:38:15] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[11:38:15] [PASSED] drm_test_drm_connector_dynamic_init_properties
[11:38:15] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[11:38:15] [PASSED] Unknown
[11:38:15] [PASSED] VGA
[11:38:15] [PASSED] DVI-I
[11:38:15] [PASSED] DVI-D
[11:38:15] [PASSED] DVI-A
[11:38:15] [PASSED] Composite
[11:38:15] [PASSED] SVIDEO
[11:38:15] [PASSED] LVDS
[11:38:15] [PASSED] Component
[11:38:15] [PASSED] DIN
[11:38:15] [PASSED] DP
[11:38:15] [PASSED] HDMI-A
[11:38:15] [PASSED] HDMI-B
[11:38:15] [PASSED] TV
[11:38:15] [PASSED] eDP
[11:38:15] [PASSED] Virtual
[11:38:15] [PASSED] DSI
[11:38:15] [PASSED] DPI
[11:38:15] [PASSED] Writeback
[11:38:15] [PASSED] SPI
[11:38:15] [PASSED] USB
[11:38:15] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[11:38:15] ======== drm_test_drm_connector_dynamic_init_name =========
[11:38:15] [PASSED] Unknown
[11:38:15] [PASSED] VGA
[11:38:15] [PASSED] DVI-I
[11:38:15] [PASSED] DVI-D
[11:38:15] [PASSED] DVI-A
[11:38:15] [PASSED] Composite
[11:38:15] [PASSED] SVIDEO
[11:38:15] [PASSED] LVDS
[11:38:15] [PASSED] Component
[11:38:15] [PASSED] DIN
[11:38:15] [PASSED] DP
[11:38:15] [PASSED] HDMI-A
[11:38:15] [PASSED] HDMI-B
[11:38:15] [PASSED] TV
[11:38:15] [PASSED] eDP
[11:38:15] [PASSED] Virtual
[11:38:15] [PASSED] DSI
[11:38:15] [PASSED] DPI
[11:38:15] [PASSED] Writeback
[11:38:15] [PASSED] SPI
[11:38:15] [PASSED] USB
[11:38:15] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[11:38:15] =========== [PASSED] drm_connector_dynamic_init ============
[11:38:15] ==== drm_connector_dynamic_register_early (4 subtests) =====
[11:38:15] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[11:38:15] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[11:38:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[11:38:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[11:38:15] ====== [PASSED] drm_connector_dynamic_register_early =======
[11:38:15] ======= drm_connector_dynamic_register (7 subtests) ========
[11:38:15] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[11:38:15] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[11:38:15] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[11:38:15] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[11:38:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[11:38:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[11:38:15] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[11:38:15] ========= [PASSED] drm_connector_dynamic_register ==========
[11:38:15] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[11:38:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[11:38:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[11:38:15] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[11:38:15] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[11:38:15] ========== drm_test_get_tv_mode_from_name_valid ===========
[11:38:15] [PASSED] NTSC
[11:38:15] [PASSED] NTSC-443
[11:38:15] [PASSED] NTSC-J
[11:38:15] [PASSED] PAL
[11:38:15] [PASSED] PAL-M
[11:38:15] [PASSED] PAL-N
[11:38:15] [PASSED] SECAM
[11:38:15] [PASSED] Mono
[11:38:15] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[11:38:15] [PASSED] drm_test_get_tv_mode_from_name_truncated
[11:38:15] ============ [PASSED] drm_get_tv_mode_from_name ============
[11:38:15] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[11:38:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[11:38:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[11:38:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[11:38:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[11:38:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[11:38:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[11:38:15] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[11:38:15] [PASSED] VIC 96
[11:38:15] [PASSED] VIC 97
[11:38:15] [PASSED] VIC 101
[11:38:15] [PASSED] VIC 102
[11:38:15] [PASSED] VIC 106
[11:38:15] [PASSED] VIC 107
[11:38:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[11:38:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[11:38:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[11:38:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[11:38:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[11:38:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[11:38:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[11:38:15] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[11:38:15] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[11:38:15] [PASSED] Automatic
[11:38:15] [PASSED] Full
[11:38:15] [PASSED] Limited 16:235
[11:38:15] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[11:38:15] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[11:38:15] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[11:38:15] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[11:38:15] === drm_test_drm_hdmi_connector_get_output_format_name ====
[11:38:15] [PASSED] RGB
[11:38:15] [PASSED] YUV 4:2:0
[11:38:15] [PASSED] YUV 4:2:2
[11:38:15] [PASSED] YUV 4:4:4
[11:38:15] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[11:38:15] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[11:38:15] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[11:38:15] ============= drm_damage_helper (21 subtests) ==============
[11:38:15] [PASSED] drm_test_damage_iter_no_damage
[11:38:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[11:38:15] [PASSED] drm_test_damage_iter_no_damage_src_moved
[11:38:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[11:38:15] [PASSED] drm_test_damage_iter_no_damage_not_visible
[11:38:15] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[11:38:15] [PASSED] drm_test_damage_iter_no_damage_no_fb
[11:38:15] [PASSED] drm_test_damage_iter_simple_damage
[11:38:15] [PASSED] drm_test_damage_iter_single_damage
[11:38:15] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[11:38:15] [PASSED] drm_test_damage_iter_single_damage_outside_src
[11:38:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[11:38:15] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[11:38:15] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[11:38:15] [PASSED] drm_test_damage_iter_single_damage_src_moved
[11:38:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[11:38:15] [PASSED] drm_test_damage_iter_damage
[11:38:15] [PASSED] drm_test_damage_iter_damage_one_intersect
[11:38:15] [PASSED] drm_test_damage_iter_damage_one_outside
[11:38:15] [PASSED] drm_test_damage_iter_damage_src_moved
[11:38:15] [PASSED] drm_test_damage_iter_damage_not_visible
[11:38:15] ================ [PASSED] drm_damage_helper ================
[11:38:15] ============== drm_dp_mst_helper (3 subtests) ==============
[11:38:15] ============== drm_test_dp_mst_calc_pbn_mode ==============
[11:38:15] [PASSED] Clock 154000 BPP 30 DSC disabled
[11:38:15] [PASSED] Clock 234000 BPP 30 DSC disabled
[11:38:15] [PASSED] Clock 297000 BPP 24 DSC disabled
[11:38:15] [PASSED] Clock 332880 BPP 24 DSC enabled
[11:38:15] [PASSED] Clock 324540 BPP 24 DSC enabled
[11:38:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[11:38:15] ============== drm_test_dp_mst_calc_pbn_div ===============
[11:38:15] [PASSED] Link rate 2000000 lane count 4
[11:38:15] [PASSED] Link rate 2000000 lane count 2
[11:38:15] [PASSED] Link rate 2000000 lane count 1
[11:38:15] [PASSED] Link rate 1350000 lane count 4
[11:38:15] [PASSED] Link rate 1350000 lane count 2
[11:38:15] [PASSED] Link rate 1350000 lane count 1
[11:38:15] [PASSED] Link rate 1000000 lane count 4
[11:38:15] [PASSED] Link rate 1000000 lane count 2
[11:38:15] [PASSED] Link rate 1000000 lane count 1
[11:38:15] [PASSED] Link rate 810000 lane count 4
[11:38:15] [PASSED] Link rate 810000 lane count 2
[11:38:15] [PASSED] Link rate 810000 lane count 1
[11:38:15] [PASSED] Link rate 540000 lane count 4
[11:38:15] [PASSED] Link rate 540000 lane count 2
[11:38:15] [PASSED] Link rate 540000 lane count 1
[11:38:15] [PASSED] Link rate 270000 lane count 4
[11:38:15] [PASSED] Link rate 270000 lane count 2
[11:38:15] [PASSED] Link rate 270000 lane count 1
[11:38:15] [PASSED] Link rate 162000 lane count 4
[11:38:15] [PASSED] Link rate 162000 lane count 2
[11:38:15] [PASSED] Link rate 162000 lane count 1
[11:38:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[11:38:15] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[11:38:15] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[11:38:15] [PASSED] DP_POWER_UP_PHY with port number
[11:38:15] [PASSED] DP_POWER_DOWN_PHY with port number
[11:38:15] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[11:38:15] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[11:38:15] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[11:38:15] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[11:38:15] [PASSED] DP_QUERY_PAYLOAD with port number
[11:38:15] [PASSED] DP_QUERY_PAYLOAD with VCPI
[11:38:15] [PASSED] DP_REMOTE_DPCD_READ with port number
[11:38:15] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[11:38:15] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[11:38:15] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[11:38:15] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[11:38:15] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[11:38:15] [PASSED] DP_REMOTE_I2C_READ with port number
[11:38:15] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[11:38:15] [PASSED] DP_REMOTE_I2C_READ with transactions array
[11:38:15] [PASSED] DP_REMOTE_I2C_WRITE with port number
[11:38:15] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[11:38:15] [PASSED] DP_REMOTE_I2C_WRITE with data array
[11:38:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[11:38:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[11:38:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[11:38:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[11:38:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[11:38:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[11:38:15] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[11:38:15] ================ [PASSED] drm_dp_mst_helper ================
[11:38:15] ================== drm_exec (7 subtests) ===================
[11:38:15] [PASSED] sanitycheck
[11:38:15] [PASSED] test_lock
[11:38:15] [PASSED] test_lock_unlock
[11:38:15] [PASSED] test_duplicates
[11:38:15] [PASSED] test_prepare
[11:38:15] [PASSED] test_prepare_array
[11:38:15] [PASSED] test_multiple_loops
[11:38:15] ==================== [PASSED] drm_exec =====================
[11:38:15] =========== drm_format_helper_test (17 subtests) ===========
[11:38:15] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[11:38:15] [PASSED] single_pixel_source_buffer
[11:38:15] [PASSED] single_pixel_clip_rectangle
[11:38:15] [PASSED] well_known_colors
[11:38:15] [PASSED] destination_pitch
[11:38:15] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[11:38:15] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[11:38:15] [PASSED] single_pixel_source_buffer
[11:38:15] [PASSED] single_pixel_clip_rectangle
[11:38:15] [PASSED] well_known_colors
[11:38:15] [PASSED] destination_pitch
[11:38:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[11:38:15] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[11:38:15] [PASSED] single_pixel_source_buffer
[11:38:15] [PASSED] single_pixel_clip_rectangle
[11:38:15] [PASSED] well_known_colors
[11:38:15] [PASSED] destination_pitch
[11:38:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[11:38:15] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[11:38:15] [PASSED] single_pixel_source_buffer
[11:38:15] [PASSED] single_pixel_clip_rectangle
[11:38:15] [PASSED] well_known_colors
[11:38:15] [PASSED] destination_pitch
[11:38:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[11:38:15] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[11:38:15] [PASSED] single_pixel_source_buffer
[11:38:15] [PASSED] single_pixel_clip_rectangle
[11:38:15] [PASSED] well_known_colors
[11:38:15] [PASSED] destination_pitch
[11:38:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[11:38:15] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[11:38:15] [PASSED] single_pixel_source_buffer
[11:38:15] [PASSED] single_pixel_clip_rectangle
[11:38:15] [PASSED] well_known_colors
[11:38:15] [PASSED] destination_pitch
[11:38:15] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[11:38:15] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[11:38:15] [PASSED] single_pixel_source_buffer
[11:38:15] [PASSED] single_pixel_clip_rectangle
[11:38:15] [PASSED] well_known_colors
[11:38:15] [PASSED] destination_pitch
[11:38:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[11:38:15] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[11:38:15] [PASSED] single_pixel_source_buffer
[11:38:15] [PASSED] single_pixel_clip_rectangle
[11:38:15] [PASSED] well_known_colors
[11:38:15] [PASSED] destination_pitch
[11:38:15] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[11:38:15] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[11:38:15] [PASSED] single_pixel_source_buffer
[11:38:15] [PASSED] single_pixel_clip_rectangle
[11:38:15] [PASSED] well_known_colors
[11:38:15] [PASSED] destination_pitch
[11:38:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[11:38:15] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[11:38:15] [PASSED] single_pixel_source_buffer
[11:38:15] [PASSED] single_pixel_clip_rectangle
[11:38:15] [PASSED] well_known_colors
[11:38:15] [PASSED] destination_pitch
[11:38:15] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[11:38:15] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[11:38:15] [PASSED] single_pixel_source_buffer
[11:38:15] [PASSED] single_pixel_clip_rectangle
[11:38:15] [PASSED] well_known_colors
[11:38:15] [PASSED] destination_pitch
[11:38:15] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[11:38:15] ============== drm_test_fb_xrgb8888_to_mono ===============
[11:38:15] [PASSED] single_pixel_source_buffer
[11:38:15] [PASSED] single_pixel_clip_rectangle
[11:38:15] [PASSED] well_known_colors
[11:38:15] [PASSED] destination_pitch
[11:38:15] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[11:38:15] ==================== drm_test_fb_swab =====================
[11:38:15] [PASSED] single_pixel_source_buffer
[11:38:15] [PASSED] single_pixel_clip_rectangle
[11:38:15] [PASSED] well_known_colors
[11:38:15] [PASSED] destination_pitch
[11:38:15] ================ [PASSED] drm_test_fb_swab =================
[11:38:15] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[11:38:15] [PASSED] single_pixel_source_buffer
[11:38:15] [PASSED] single_pixel_clip_rectangle
[11:38:15] [PASSED] well_known_colors
[11:38:15] [PASSED] destination_pitch
[11:38:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[11:38:15] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[11:38:15] [PASSED] single_pixel_source_buffer
[11:38:15] [PASSED] single_pixel_clip_rectangle
[11:38:15] [PASSED] well_known_colors
[11:38:15] [PASSED] destination_pitch
[11:38:15] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[11:38:15] ================= drm_test_fb_clip_offset =================
[11:38:15] [PASSED] pass through
[11:38:15] [PASSED] horizontal offset
[11:38:15] [PASSED] vertical offset
[11:38:15] [PASSED] horizontal and vertical offset
[11:38:15] [PASSED] horizontal offset (custom pitch)
[11:38:15] [PASSED] vertical offset (custom pitch)
[11:38:15] [PASSED] horizontal and vertical offset (custom pitch)
[11:38:15] ============= [PASSED] drm_test_fb_clip_offset =============
[11:38:15] =================== drm_test_fb_memcpy ====================
[11:38:15] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[11:38:15] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[11:38:15] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[11:38:15] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[11:38:15] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[11:38:15] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[11:38:15] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[11:38:15] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[11:38:15] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[11:38:15] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[11:38:15] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[11:38:15] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[11:38:15] =============== [PASSED] drm_test_fb_memcpy ================
[11:38:15] ============= [PASSED] drm_format_helper_test ==============
[11:38:15] ================= drm_format (18 subtests) =================
[11:38:15] [PASSED] drm_test_format_block_width_invalid
[11:38:15] [PASSED] drm_test_format_block_width_one_plane
[11:38:15] [PASSED] drm_test_format_block_width_two_plane
[11:38:15] [PASSED] drm_test_format_block_width_three_plane
[11:38:15] [PASSED] drm_test_format_block_width_tiled
[11:38:15] [PASSED] drm_test_format_block_height_invalid
[11:38:15] [PASSED] drm_test_format_block_height_one_plane
[11:38:15] [PASSED] drm_test_format_block_height_two_plane
[11:38:15] [PASSED] drm_test_format_block_height_three_plane
[11:38:15] [PASSED] drm_test_format_block_height_tiled
[11:38:15] [PASSED] drm_test_format_min_pitch_invalid
[11:38:15] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[11:38:15] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[11:38:15] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[11:38:15] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[11:38:15] [PASSED] drm_test_format_min_pitch_two_plane
[11:38:15] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[11:38:15] [PASSED] drm_test_format_min_pitch_tiled
[11:38:15] =================== [PASSED] drm_format ====================
[11:38:15] ============== drm_framebuffer (10 subtests) ===============
[11:38:15] ========== drm_test_framebuffer_check_src_coords ==========
[11:38:15] [PASSED] Success: source fits into fb
[11:38:15] [PASSED] Fail: overflowing fb with x-axis coordinate
[11:38:15] [PASSED] Fail: overflowing fb with y-axis coordinate
[11:38:15] [PASSED] Fail: overflowing fb with source width
[11:38:15] [PASSED] Fail: overflowing fb with source height
[11:38:15] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[11:38:15] [PASSED] drm_test_framebuffer_cleanup
[11:38:15] =============== drm_test_framebuffer_create ===============
[11:38:15] [PASSED] ABGR8888 normal sizes
[11:38:15] [PASSED] ABGR8888 max sizes
[11:38:15] [PASSED] ABGR8888 pitch greater than min required
[11:38:15] [PASSED] ABGR8888 pitch less than min required
[11:38:15] [PASSED] ABGR8888 Invalid width
[11:38:15] [PASSED] ABGR8888 Invalid buffer handle
[11:38:15] [PASSED] No pixel format
[11:38:15] [PASSED] ABGR8888 Width 0
[11:38:15] [PASSED] ABGR8888 Height 0
[11:38:15] [PASSED] ABGR8888 Out of bound height * pitch combination
[11:38:15] [PASSED] ABGR8888 Large buffer offset
[11:38:15] [PASSED] ABGR8888 Buffer offset for inexistent plane
[11:38:15] [PASSED] ABGR8888 Invalid flag
[11:38:15] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[11:38:15] [PASSED] ABGR8888 Valid buffer modifier
[11:38:15] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[11:38:15] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[11:38:15] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[11:38:15] [PASSED] NV12 Normal sizes
[11:38:15] [PASSED] NV12 Max sizes
[11:38:15] [PASSED] NV12 Invalid pitch
[11:38:15] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[11:38:15] [PASSED] NV12 different modifier per-plane
[11:38:15] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[11:38:15] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[11:38:15] [PASSED] NV12 Modifier for inexistent plane
[11:38:15] [PASSED] NV12 Handle for inexistent plane
[11:38:15] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[11:38:15] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[11:38:15] [PASSED] YVU420 Normal sizes
[11:38:15] [PASSED] YVU420 Max sizes
[11:38:15] [PASSED] YVU420 Invalid pitch
[11:38:15] [PASSED] YVU420 Different pitches
[11:38:15] [PASSED] YVU420 Different buffer offsets/pitches
[11:38:15] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[11:38:15] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[11:38:15] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[11:38:15] [PASSED] YVU420 Valid modifier
[11:38:15] [PASSED] YVU420 Different modifiers per plane
[11:38:15] [PASSED] YVU420 Modifier for inexistent plane
[11:38:15] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[11:38:15] [PASSED] X0L2 Normal sizes
[11:38:15] [PASSED] X0L2 Max sizes
[11:38:15] [PASSED] X0L2 Invalid pitch
[11:38:15] [PASSED] X0L2 Pitch greater than minimum required
[11:38:15] [PASSED] X0L2 Handle for inexistent plane
[11:38:15] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[11:38:15] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[11:38:15] [PASSED] X0L2 Valid modifier
[11:38:15] [PASSED] X0L2 Modifier for inexistent plane
[11:38:15] =========== [PASSED] drm_test_framebuffer_create ===========
[11:38:15] [PASSED] drm_test_framebuffer_free
[11:38:15] [PASSED] drm_test_framebuffer_init
[11:38:15] [PASSED] drm_test_framebuffer_init_bad_format
[11:38:15] [PASSED] drm_test_framebuffer_init_dev_mismatch
[11:38:15] [PASSED] drm_test_framebuffer_lookup
[11:38:15] [PASSED] drm_test_framebuffer_lookup_inexistent
[11:38:15] [PASSED] drm_test_framebuffer_modifiers_not_supported
[11:38:15] ================= [PASSED] drm_framebuffer =================
[11:38:15] ================ drm_gem_shmem (8 subtests) ================
[11:38:15] [PASSED] drm_gem_shmem_test_obj_create
[11:38:15] [PASSED] drm_gem_shmem_test_obj_create_private
[11:38:15] [PASSED] drm_gem_shmem_test_pin_pages
[11:38:15] [PASSED] drm_gem_shmem_test_vmap
[11:38:15] [PASSED] drm_gem_shmem_test_get_sg_table
[11:38:15] [PASSED] drm_gem_shmem_test_get_pages_sgt
[11:38:15] [PASSED] drm_gem_shmem_test_madvise
[11:38:15] [PASSED] drm_gem_shmem_test_purge
[11:38:15] ================== [PASSED] drm_gem_shmem ==================
[11:38:15] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[11:38:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[11:38:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[11:38:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[11:38:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[11:38:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[11:38:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[11:38:15] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[11:38:15] [PASSED] Automatic
[11:38:15] [PASSED] Full
[11:38:15] [PASSED] Limited 16:235
[11:38:15] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[11:38:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[11:38:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[11:38:15] [PASSED] drm_test_check_disable_connector
[11:38:15] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[11:38:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[11:38:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[11:38:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[11:38:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[11:38:15] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[11:38:15] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[11:38:15] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[11:38:15] [PASSED] drm_test_check_output_bpc_dvi
[11:38:15] [PASSED] drm_test_check_output_bpc_format_vic_1
[11:38:15] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[11:38:15] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[11:38:15] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[11:38:15] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[11:38:15] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[11:38:15] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[11:38:15] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[11:38:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[11:38:15] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[11:38:15] [PASSED] drm_test_check_broadcast_rgb_value
[11:38:15] [PASSED] drm_test_check_bpc_8_value
[11:38:15] [PASSED] drm_test_check_bpc_10_value
[11:38:15] [PASSED] drm_test_check_bpc_12_value
[11:38:15] [PASSED] drm_test_check_format_value
[11:38:15] [PASSED] drm_test_check_tmds_char_value
[11:38:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[11:38:15] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[11:38:15] [PASSED] drm_test_check_mode_valid
[11:38:15] [PASSED] drm_test_check_mode_valid_reject
[11:38:15] [PASSED] drm_test_check_mode_valid_reject_rate
[11:38:15] [PASSED] drm_test_check_mode_valid_reject_max_clock
[11:38:15] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[11:38:15] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[11:38:15] [PASSED] drm_test_check_infoframes
[11:38:15] [PASSED] drm_test_check_reject_avi_infoframe
[11:38:15] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[11:38:15] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[11:38:15] [PASSED] drm_test_check_reject_audio_infoframe
[11:38:15] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[11:38:15] ================= drm_managed (2 subtests) =================
[11:38:15] [PASSED] drm_test_managed_release_action
[11:38:15] [PASSED] drm_test_managed_run_action
[11:38:15] =================== [PASSED] drm_managed ===================
[11:38:15] =================== drm_mm (6 subtests) ====================
[11:38:15] [PASSED] drm_test_mm_init
[11:38:15] [PASSED] drm_test_mm_debug
[11:38:15] [PASSED] drm_test_mm_align32
[11:38:15] [PASSED] drm_test_mm_align64
[11:38:15] [PASSED] drm_test_mm_lowest
[11:38:15] [PASSED] drm_test_mm_highest
[11:38:15] ===================== [PASSED] drm_mm ======================
[11:38:15] ============= drm_modes_analog_tv (5 subtests) =============
[11:38:15] [PASSED] drm_test_modes_analog_tv_mono_576i
[11:38:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[11:38:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[11:38:15] [PASSED] drm_test_modes_analog_tv_pal_576i
[11:38:15] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[11:38:15] =============== [PASSED] drm_modes_analog_tv ===============
[11:38:15] ============== drm_plane_helper (2 subtests) ===============
[11:38:15] =============== drm_test_check_plane_state ================
[11:38:15] [PASSED] clipping_simple
[11:38:15] [PASSED] clipping_rotate_reflect
[11:38:15] [PASSED] positioning_simple
[11:38:15] [PASSED] upscaling
[11:38:15] [PASSED] downscaling
[11:38:15] [PASSED] rounding1
[11:38:15] [PASSED] rounding2
[11:38:15] [PASSED] rounding3
[11:38:15] [PASSED] rounding4
[11:38:15] =========== [PASSED] drm_test_check_plane_state ============
[11:38:15] =========== drm_test_check_invalid_plane_state ============
[11:38:15] [PASSED] positioning_invalid
[11:38:15] [PASSED] upscaling_invalid
[11:38:15] [PASSED] downscaling_invalid
[11:38:15] ======= [PASSED] drm_test_check_invalid_plane_state ========
[11:38:15] ================ [PASSED] drm_plane_helper =================
[11:38:15] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[11:38:15] ====== drm_test_connector_helper_tv_get_modes_check =======
[11:38:15] [PASSED] None
[11:38:15] [PASSED] PAL
[11:38:15] [PASSED] NTSC
[11:38:15] [PASSED] Both, NTSC Default
[11:38:15] [PASSED] Both, PAL Default
[11:38:15] [PASSED] Both, NTSC Default, with PAL on command-line
[11:38:15] [PASSED] Both, PAL Default, with NTSC on command-line
[11:38:15] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[11:38:15] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[11:38:15] ================== drm_rect (9 subtests) ===================
[11:38:15] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[11:38:15] [PASSED] drm_test_rect_clip_scaled_not_clipped
[11:38:15] [PASSED] drm_test_rect_clip_scaled_clipped
[11:38:15] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[11:38:15] ================= drm_test_rect_intersect =================
[11:38:15] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[11:38:15] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[11:38:15] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[11:38:15] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[11:38:15] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[11:38:15] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[11:38:15] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[11:38:15] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[11:38:15] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[11:38:15] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[11:38:15] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[11:38:15] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[11:38:15] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[11:38:15] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[11:38:15] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[11:38:15] ============= [PASSED] drm_test_rect_intersect =============
[11:38:15] ================ drm_test_rect_calc_hscale ================
[11:38:15] [PASSED] normal use
[11:38:15] [PASSED] out of max range
[11:38:15] [PASSED] out of min range
[11:38:15] [PASSED] zero dst
[11:38:15] [PASSED] negative src
[11:38:15] [PASSED] negative dst
[11:38:15] ============ [PASSED] drm_test_rect_calc_hscale ============
[11:38:15] ================ drm_test_rect_calc_vscale ================
[11:38:15] [PASSED] normal use
[11:38:15] [PASSED] out of max range
[11:38:15] [PASSED] out of min range
[11:38:15] [PASSED] zero dst
[11:38:15] [PASSED] negative src
[11:38:15] [PASSED] negative dst
[11:38:15] ============ [PASSED] drm_test_rect_calc_vscale ============
[11:38:15] ================== drm_test_rect_rotate ===================
[11:38:15] [PASSED] reflect-x
[11:38:15] [PASSED] reflect-y
[11:38:15] [PASSED] rotate-0
[11:38:15] [PASSED] rotate-90
[11:38:15] [PASSED] rotate-180
[11:38:15] [PASSED] rotate-270
[11:38:15] ============== [PASSED] drm_test_rect_rotate ===============
[11:38:15] ================ drm_test_rect_rotate_inv =================
[11:38:15] [PASSED] reflect-x
[11:38:15] [PASSED] reflect-y
[11:38:15] [PASSED] rotate-0
[11:38:15] [PASSED] rotate-90
[11:38:15] [PASSED] rotate-180
[11:38:15] [PASSED] rotate-270
[11:38:15] ============ [PASSED] drm_test_rect_rotate_inv =============
[11:38:15] ==================== [PASSED] drm_rect =====================
[11:38:15] ============ drm_sysfb_modeset_test (1 subtest) ============
[11:38:15] ============ drm_test_sysfb_build_fourcc_list =============
[11:38:15] [PASSED] no native formats
[11:38:15] [PASSED] XRGB8888 as native format
[11:38:15] [PASSED] remove duplicates
[11:38:15] [PASSED] convert alpha formats
[11:38:15] [PASSED] random formats
[11:38:15] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[11:38:15] ============= [PASSED] drm_sysfb_modeset_test ==============
[11:38:15] ================== drm_fixp (2 subtests) ===================
[11:38:15] [PASSED] drm_test_int2fixp
[11:38:15] [PASSED] drm_test_sm2fixp
[11:38:15] ==================== [PASSED] drm_fixp =====================
[11:38:15] ============================================================
[11:38:15] Testing complete. Ran 621 tests: passed: 621
[11:38:15] Elapsed time: 26.214s total, 1.745s configuring, 24.299s building, 0.137s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[11:38:15] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:38:16] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:38:26] Starting KUnit Kernel (1/1)...
[11:38:26] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:38:26] ================= ttm_device (5 subtests) ==================
[11:38:26] [PASSED] ttm_device_init_basic
[11:38:26] [PASSED] ttm_device_init_multiple
[11:38:26] [PASSED] ttm_device_fini_basic
[11:38:26] [PASSED] ttm_device_init_no_vma_man
[11:38:26] ================== ttm_device_init_pools ==================
[11:38:26] [PASSED] No DMA allocations, no DMA32 required
[11:38:26] [PASSED] DMA allocations, DMA32 required
[11:38:26] [PASSED] No DMA allocations, DMA32 required
[11:38:26] [PASSED] DMA allocations, no DMA32 required
[11:38:26] ============== [PASSED] ttm_device_init_pools ==============
[11:38:26] =================== [PASSED] ttm_device ====================
[11:38:26] ================== ttm_pool (8 subtests) ===================
[11:38:26] ================== ttm_pool_alloc_basic ===================
[11:38:26] [PASSED] One page
[11:38:26] [PASSED] More than one page
[11:38:26] [PASSED] Above the allocation limit
[11:38:26] [PASSED] One page, with coherent DMA mappings enabled
[11:38:26] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:38:26] ============== [PASSED] ttm_pool_alloc_basic ===============
[11:38:26] ============== ttm_pool_alloc_basic_dma_addr ==============
[11:38:26] [PASSED] One page
[11:38:26] [PASSED] More than one page
[11:38:26] [PASSED] Above the allocation limit
[11:38:26] [PASSED] One page, with coherent DMA mappings enabled
[11:38:26] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:38:26] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[11:38:26] [PASSED] ttm_pool_alloc_order_caching_match
[11:38:26] [PASSED] ttm_pool_alloc_caching_mismatch
[11:38:26] [PASSED] ttm_pool_alloc_order_mismatch
[11:38:26] [PASSED] ttm_pool_free_dma_alloc
[11:38:26] [PASSED] ttm_pool_free_no_dma_alloc
[11:38:26] [PASSED] ttm_pool_fini_basic
[11:38:26] ==================== [PASSED] ttm_pool =====================
[11:38:26] ================ ttm_resource (8 subtests) =================
[11:38:26] ================= ttm_resource_init_basic =================
[11:38:26] [PASSED] Init resource in TTM_PL_SYSTEM
[11:38:26] [PASSED] Init resource in TTM_PL_VRAM
[11:38:26] [PASSED] Init resource in a private placement
[11:38:26] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[11:38:26] ============= [PASSED] ttm_resource_init_basic =============
[11:38:26] [PASSED] ttm_resource_init_pinned
[11:38:26] [PASSED] ttm_resource_fini_basic
[11:38:26] [PASSED] ttm_resource_manager_init_basic
[11:38:26] [PASSED] ttm_resource_manager_usage_basic
[11:38:26] [PASSED] ttm_resource_manager_set_used_basic
[11:38:26] [PASSED] ttm_sys_man_alloc_basic
[11:38:26] [PASSED] ttm_sys_man_free_basic
[11:38:26] ================== [PASSED] ttm_resource ===================
[11:38:26] =================== ttm_tt (15 subtests) ===================
[11:38:26] ==================== ttm_tt_init_basic ====================
[11:38:26] [PASSED] Page-aligned size
[11:38:26] [PASSED] Extra pages requested
[11:38:26] ================ [PASSED] ttm_tt_init_basic ================
[11:38:26] [PASSED] ttm_tt_init_misaligned
[11:38:26] [PASSED] ttm_tt_fini_basic
[11:38:26] [PASSED] ttm_tt_fini_sg
[11:38:26] [PASSED] ttm_tt_fini_shmem
[11:38:26] [PASSED] ttm_tt_create_basic
[11:38:26] [PASSED] ttm_tt_create_invalid_bo_type
[11:38:26] [PASSED] ttm_tt_create_ttm_exists
[11:38:26] [PASSED] ttm_tt_create_failed
[11:38:26] [PASSED] ttm_tt_destroy_basic
[11:38:26] [PASSED] ttm_tt_populate_null_ttm
[11:38:26] [PASSED] ttm_tt_populate_populated_ttm
[11:38:26] [PASSED] ttm_tt_unpopulate_basic
[11:38:26] [PASSED] ttm_tt_unpopulate_empty_ttm
[11:38:26] [PASSED] ttm_tt_swapin_basic
[11:38:26] ===================== [PASSED] ttm_tt ======================
[11:38:26] =================== ttm_bo (14 subtests) ===================
[11:38:26] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[11:38:26] [PASSED] Cannot be interrupted and sleeps
[11:38:26] [PASSED] Cannot be interrupted, locks straight away
[11:38:26] [PASSED] Can be interrupted, sleeps
[11:38:26] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[11:38:26] [PASSED] ttm_bo_reserve_locked_no_sleep
[11:38:26] [PASSED] ttm_bo_reserve_no_wait_ticket
[11:38:26] [PASSED] ttm_bo_reserve_double_resv
[11:38:26] [PASSED] ttm_bo_reserve_interrupted
[11:38:26] [PASSED] ttm_bo_reserve_deadlock
[11:38:26] [PASSED] ttm_bo_unreserve_basic
[11:38:26] [PASSED] ttm_bo_unreserve_pinned
[11:38:26] [PASSED] ttm_bo_unreserve_bulk
[11:38:26] [PASSED] ttm_bo_fini_basic
[11:38:26] [PASSED] ttm_bo_fini_shared_resv
[11:38:26] [PASSED] ttm_bo_pin_basic
[11:38:26] [PASSED] ttm_bo_pin_unpin_resource
[11:38:26] [PASSED] ttm_bo_multiple_pin_one_unpin
[11:38:26] ===================== [PASSED] ttm_bo ======================
[11:38:26] ============== ttm_bo_validate (22 subtests) ===============
[11:38:26] ============== ttm_bo_init_reserved_sys_man ===============
[11:38:26] [PASSED] Buffer object for userspace
[11:38:26] [PASSED] Kernel buffer object
[11:38:26] [PASSED] Shared buffer object
[11:38:26] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[11:38:26] ============== ttm_bo_init_reserved_mock_man ==============
[11:38:26] [PASSED] Buffer object for userspace
[11:38:26] [PASSED] Kernel buffer object
[11:38:26] [PASSED] Shared buffer object
[11:38:26] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[11:38:26] [PASSED] ttm_bo_init_reserved_resv
[11:38:26] ================== ttm_bo_validate_basic ==================
[11:38:26] [PASSED] Buffer object for userspace
[11:38:26] [PASSED] Kernel buffer object
[11:38:26] [PASSED] Shared buffer object
[11:38:26] ============== [PASSED] ttm_bo_validate_basic ==============
[11:38:26] [PASSED] ttm_bo_validate_invalid_placement
[11:38:26] ============= ttm_bo_validate_same_placement ==============
[11:38:26] [PASSED] System manager
[11:38:26] [PASSED] VRAM manager
[11:38:26] ========= [PASSED] ttm_bo_validate_same_placement ==========
[11:38:26] [PASSED] ttm_bo_validate_failed_alloc
[11:38:26] [PASSED] ttm_bo_validate_pinned
[11:38:26] [PASSED] ttm_bo_validate_busy_placement
[11:38:26] ================ ttm_bo_validate_multihop =================
[11:38:26] [PASSED] Buffer object for userspace
[11:38:26] [PASSED] Kernel buffer object
[11:38:26] [PASSED] Shared buffer object
[11:38:26] ============ [PASSED] ttm_bo_validate_multihop =============
[11:38:26] ========== ttm_bo_validate_no_placement_signaled ==========
[11:38:26] [PASSED] Buffer object in system domain, no page vector
[11:38:26] [PASSED] Buffer object in system domain with an existing page vector
[11:38:26] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[11:38:26] ======== ttm_bo_validate_no_placement_not_signaled ========
[11:38:26] [PASSED] Buffer object for userspace
[11:38:26] [PASSED] Kernel buffer object
[11:38:26] [PASSED] Shared buffer object
[11:38:26] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[11:38:26] [PASSED] ttm_bo_validate_move_fence_signaled
[11:38:26] ========= ttm_bo_validate_move_fence_not_signaled =========
[11:38:26] [PASSED] Waits for GPU
[11:38:26] [PASSED] Tries to lock straight away
[11:38:26] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[11:38:26] [PASSED] ttm_bo_validate_swapout
[11:38:26] [PASSED] ttm_bo_validate_happy_evict
[11:38:26] [PASSED] ttm_bo_validate_all_pinned_evict
[11:38:26] [PASSED] ttm_bo_validate_allowed_only_evict
[11:38:26] [PASSED] ttm_bo_validate_deleted_evict
[11:38:26] [PASSED] ttm_bo_validate_busy_domain_evict
[11:38:26] [PASSED] ttm_bo_validate_evict_gutting
[11:38:26] [PASSED] ttm_bo_validate_recrusive_evict
[11:38:26] ================= [PASSED] ttm_bo_validate =================
[11:38:26] ============================================================
[11:38:26] Testing complete. Ran 102 tests: passed: 102
[11:38:26] Elapsed time: 11.616s total, 1.752s configuring, 9.650s building, 0.183s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 20+ messages in thread* ✓ Xe.CI.BAT: success for drm/i915/display: Mask RO bits in gen9_write_dc_state()
[not found] <<20260506130321.487414-1-dibin.moolakadan.subrahmanian@intel.com>
2026-06-01 9:01 ` [PATCH v2] drm/i915/display: Mask RO bits in gen9_write_dc_state() Dibin Moolakadan Subrahmanian
2026-06-01 11:38 ` ✓ CI.KUnit: success for " Patchwork
@ 2026-06-01 12:18 ` Patchwork
2026-06-01 14:51 ` ✓ Xe.CI.FULL: " Patchwork
` (3 subsequent siblings)
6 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-06-01 12:18 UTC (permalink / raw)
To: Dibin Moolakadan Subrahmanian; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 878 bytes --]
== Series Details ==
Series: drm/i915/display: Mask RO bits in gen9_write_dc_state()
URL : https://patchwork.freedesktop.org/series/167642/
State : success
== Summary ==
CI Bug Log - changes from xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f_BAT -> xe-pw-167642v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f -> xe-pw-167642v1
IGT_8943: 8943
xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f: 8133a9f4c4fd407e81df71530490836a1170bb2f
xe-pw-167642v1: 167642v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/index.html
[-- Attachment #2: Type: text/html, Size: 1426 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread* ✓ Xe.CI.FULL: success for drm/i915/display: Mask RO bits in gen9_write_dc_state()
[not found] <<20260506130321.487414-1-dibin.moolakadan.subrahmanian@intel.com>
` (2 preceding siblings ...)
2026-06-01 12:18 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-06-01 14:51 ` Patchwork
2026-06-02 12:15 ` ✓ CI.KUnit: success for drm/i915/display: Mask RO bits in gen9_write_dc_state() (rev2) Patchwork
` (2 subsequent siblings)
6 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-06-01 14:51 UTC (permalink / raw)
To: Dibin Moolakadan Subrahmanian; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 41727 bytes --]
== Series Details ==
Series: drm/i915/display: Mask RO bits in gen9_write_dc_state()
URL : https://patchwork.freedesktop.org/series/167642/
State : success
== Summary ==
CI Bug Log - changes from xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f_FULL -> xe-pw-167642v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-167642v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
- shard-lnl: NOTRUN -> [SKIP][1] ([Intel XE#3279])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-270:
- shard-lnl: NOTRUN -> [SKIP][2] ([Intel XE#1407]) +1 other test skip
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-2/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-lnl: NOTRUN -> [SKIP][3] ([Intel XE#3658] / [Intel XE#7360])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip:
- shard-lnl: NOTRUN -> [SKIP][4] ([Intel XE#7059] / [Intel XE#7085])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#7059] / [Intel XE#7085])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#1124]) +2 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-90:
- shard-lnl: NOTRUN -> [SKIP][7] ([Intel XE#1124]) +2 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_big_fb@yf-tiled-16bpp-rotate-90.html
* igt@kms_bw@linear-tiling-2-displays-target-2560x1440p:
- shard-lnl: NOTRUN -> [SKIP][8] ([Intel XE#367])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_bw@linear-tiling-2-displays-target-2560x1440p.html
* igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs@pipe-c-edp-1:
- shard-lnl: NOTRUN -> [SKIP][9] ([Intel XE#2669] / [Intel XE#7389]) +3 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-2/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs@pipe-c-edp-1.html
* igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2887]) +1 other test skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-d-hdmi-a-3:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2652]) +8 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs-cc:
- shard-lnl: NOTRUN -> [SKIP][12] ([Intel XE#2887]) +4 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_chamelium_color@ctm-blue-to-red:
- shard-lnl: NOTRUN -> [SKIP][13] ([Intel XE#306] / [Intel XE#7358])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_chamelium_color@ctm-blue-to-red.html
* igt@kms_chamelium_color@gamma:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#2325] / [Intel XE#7358])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_chamelium_color@gamma.html
* igt@kms_chamelium_hpd@common-hpd-after-hibernate:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#2252])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_chamelium_hpd@common-hpd-after-hibernate.html
* igt@kms_chamelium_hpd@hdmi-hpd-after-suspend:
- shard-lnl: NOTRUN -> [SKIP][16] ([Intel XE#373])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_chamelium_hpd@hdmi-hpd-after-suspend.html
* igt@kms_content_protection@atomic:
- shard-lnl: NOTRUN -> [SKIP][17] ([Intel XE#7642])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-2/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@dp-mst-type-1-suspend-resume:
- shard-lnl: NOTRUN -> [SKIP][18] ([Intel XE#6974])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_content_protection@dp-mst-type-1-suspend-resume.html
* igt@kms_cursor_crc@cursor-sliding-32x32:
- shard-lnl: NOTRUN -> [SKIP][19] ([Intel XE#1424]) +1 other test skip
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_cursor_crc@cursor-sliding-32x32.html
* igt@kms_cursor_crc@cursor-sliding-512x512:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2321] / [Intel XE#7355]) +1 other test skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_cursor_crc@cursor-sliding-512x512.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
- shard-lnl: NOTRUN -> [SKIP][21] ([Intel XE#323] / [Intel XE#6035])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
* igt@kms_dp_link_training@non-uhbr-sst:
- shard-lnl: NOTRUN -> [SKIP][22] ([Intel XE#4354] / [Intel XE#7450])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_dp_link_training@non-uhbr-sst.html
* igt@kms_dp_link_training@uhbr-mst:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#4354] / [Intel XE#7386])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_dp_link_training@uhbr-mst.html
* igt@kms_feature_discovery@dp-mst:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#2375])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_feature_discovery@dp-mst.html
* igt@kms_flip@2x-plain-flip-fb-recreate:
- shard-lnl: NOTRUN -> [SKIP][25] ([Intel XE#1421]) +1 other test skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_flip@2x-plain-flip-fb-recreate.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-lnl: [PASS][26] -> [FAIL][27] ([Intel XE#301])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [PASS][28] -> [FAIL][29] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
- shard-lnl: NOTRUN -> [SKIP][30] ([Intel XE#7178] / [Intel XE#7351])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling:
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling:
- shard-lnl: NOTRUN -> [SKIP][32] ([Intel XE#1397] / [Intel XE#1745] / [Intel XE#7385]) +1 other test skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][33] ([Intel XE#1397] / [Intel XE#7385]) +1 other test skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#2311]) +10 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-indfb-msflip-blt:
- shard-lnl: NOTRUN -> [SKIP][35] ([Intel XE#6312]) +4 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@drrshdr-argb161616f-draw-render:
- shard-lnl: NOTRUN -> [SKIP][36] ([Intel XE#7061]) +2 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_frontbuffer_tracking@drrshdr-argb161616f-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#4141]) +2 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][38] ([Intel XE#7061] / [Intel XE#7356])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-shrfb-scaledprimary:
- shard-lnl: NOTRUN -> [SKIP][39] ([Intel XE#6312] / [Intel XE#651]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrs-shrfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-cur-indfb-draw-render:
- shard-lnl: NOTRUN -> [SKIP][40] ([Intel XE#7905]) +18 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-render:
- shard-lnl: NOTRUN -> [SKIP][41] ([Intel XE#656] / [Intel XE#7905]) +12 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][42] ([Intel XE#7865]) +7 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-2/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#7061]) +1 other test skip
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-msflip-blt:
- shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#2313]) +7 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-msflip-blt.html
* igt@kms_hdr@static-toggle-suspend:
- shard-lnl: NOTRUN -> [SKIP][45] ([Intel XE#1503] / [Intel XE#7915])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_hdr@static-toggle-suspend@pipe-a-edp-1-xrgb2101010:
- shard-lnl: NOTRUN -> [SKIP][46] ([Intel XE#7915]) +1 other test skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_hdr@static-toggle-suspend@pipe-a-edp-1-xrgb2101010.html
* igt@kms_hdr@static-toggle-suspend@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-bmg: [PASS][47] -> [SKIP][48] ([Intel XE#7915]) +1 other test skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f/shard-bmg-6/igt@kms_hdr@static-toggle-suspend@pipe-a-hdmi-a-3-xrgb16161616f.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-8/igt@kms_hdr@static-toggle-suspend@pipe-a-hdmi-a-3-xrgb16161616f.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-lnl: NOTRUN -> [SKIP][49] ([Intel XE#6900] / [Intel XE#7362])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_pipe_crc_basic@nonblocking-crc:
- shard-lnl: NOTRUN -> [ABORT][50] ([Intel XE#8007]) +1 other test abort
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-7/igt@kms_pipe_crc_basic@nonblocking-crc.html
* igt@kms_pipe_stress@stress-xrgb8888-ytiled:
- shard-lnl: NOTRUN -> [SKIP][51] ([Intel XE#4329] / [Intel XE#6912] / [Intel XE#7375])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
* igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier:
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#7283])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier.html
* igt@kms_plane_multiple@2x-tiling-yf:
- shard-lnl: NOTRUN -> [SKIP][53] ([Intel XE#4596] / [Intel XE#5854]) +1 other test skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-2/igt@kms_plane_multiple@2x-tiling-yf.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c:
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c.html
* igt@kms_pm_dc@dc5-retention-flops:
- shard-bmg: NOTRUN -> [SKIP][55] ([Intel XE#3309] / [Intel XE#7368])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_pm_dc@dc5-retention-flops.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf:
- shard-bmg: NOTRUN -> [SKIP][56] ([Intel XE#1489])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
- shard-lnl: NOTRUN -> [SKIP][57] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][58] ([Intel XE#4608])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-a-edp-1.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [SKIP][59] ([Intel XE#4608] / [Intel XE#7304])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-b-edp-1.html
* igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [FAIL][60] ([Intel XE#8229]) +2 other tests fail
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb@pipe-b-edp-1.html
* igt@kms_psr2_su@page_flip-p010:
- shard-bmg: NOTRUN -> [SKIP][61] ([Intel XE#2387] / [Intel XE#7429])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_psr2_su@page_flip-p010.html
* igt@kms_psr@fbc-psr2-primary-render:
- shard-lnl: NOTRUN -> [SKIP][62] ([Intel XE#1406] / [Intel XE#7345])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-2/igt@kms_psr@fbc-psr2-primary-render.html
* igt@kms_psr@fbc-psr2-primary-render@edp-1:
- shard-lnl: NOTRUN -> [SKIP][63] ([Intel XE#1406] / [Intel XE#4609])
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-2/igt@kms_psr@fbc-psr2-primary-render@edp-1.html
* igt@kms_psr@pr-no-drrs:
- shard-lnl: NOTRUN -> [SKIP][64] ([Intel XE#1406]) +2 other tests skip
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_psr@pr-no-drrs.html
* igt@kms_psr@psr2-primary-page-flip:
- shard-bmg: NOTRUN -> [SKIP][65] ([Intel XE#2234] / [Intel XE#2850])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_psr@psr2-primary-page-flip.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
- shard-lnl: NOTRUN -> [SKIP][66] ([Intel XE#1127] / [Intel XE#5813])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-bmg: NOTRUN -> [SKIP][67] ([Intel XE#3904] / [Intel XE#7342])
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_sharpness_filter@filter-basic:
- shard-bmg: NOTRUN -> [SKIP][68] ([Intel XE#6503])
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@kms_sharpness_filter@filter-basic.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-lnl: NOTRUN -> [SKIP][69] ([Intel XE#362] / [Intel XE#5848])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_vrr@lobf:
- shard-lnl: NOTRUN -> [SKIP][70] ([Intel XE#1499])
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_vrr@lobf.html
* igt@kms_vrr@lobf@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][71] ([Intel XE#7638])
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@kms_vrr@lobf@pipe-a-edp-1.html
* igt@xe_compute@ccs-mode-basic:
- shard-bmg: NOTRUN -> [SKIP][72] ([Intel XE#6599])
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@xe_compute@ccs-mode-basic.html
* igt@xe_eudebug@basic-read-event:
- shard-bmg: NOTRUN -> [SKIP][73] ([Intel XE#7636]) +3 other tests skip
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@xe_eudebug@basic-read-event.html
* igt@xe_eudebug_online@breakpoint-many-sessions-tiles:
- shard-lnl: NOTRUN -> [SKIP][74] ([Intel XE#7636]) +3 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@xe_eudebug_online@breakpoint-many-sessions-tiles.html
* igt@xe_evict@evict-beng-mixed-many-threads-large:
- shard-lnl: NOTRUN -> [SKIP][75] ([Intel XE#6540] / [Intel XE#688]) +2 other tests skip
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@xe_evict@evict-beng-mixed-many-threads-large.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [PASS][76] -> [INCOMPLETE][77] ([Intel XE#6321])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f/shard-bmg-7/igt@xe_evict@evict-mixed-many-threads-small.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-10/igt@xe_evict@evict-mixed-many-threads-small.html
* igt@xe_evict@evict-small-multi-queue-priority-cm:
- shard-bmg: NOTRUN -> [SKIP][78] ([Intel XE#7140])
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@xe_evict@evict-small-multi-queue-priority-cm.html
* igt@xe_exec_balancer@twice-cm-parallel-basic:
- shard-lnl: NOTRUN -> [SKIP][79] ([Intel XE#7482]) +3 other tests skip
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@xe_exec_balancer@twice-cm-parallel-basic.html
* igt@xe_exec_basic@multigpu-no-exec-basic-defer-bind:
- shard-bmg: NOTRUN -> [SKIP][80] ([Intel XE#2322] / [Intel XE#7372]) +1 other test skip
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@xe_exec_basic@multigpu-no-exec-basic-defer-bind.html
* igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap:
- shard-lnl: NOTRUN -> [SKIP][81] ([Intel XE#1392]) +2 other tests skip
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
* igt@xe_exec_fault_mode@once-multi-queue-imm:
- shard-bmg: NOTRUN -> [SKIP][82] ([Intel XE#7136]) +1 other test skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@xe_exec_fault_mode@once-multi-queue-imm.html
* igt@xe_exec_fault_mode@twice-multi-queue-userptr-invalidate-imm:
- shard-lnl: NOTRUN -> [SKIP][83] ([Intel XE#7136]) +3 other tests skip
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@xe_exec_fault_mode@twice-multi-queue-userptr-invalidate-imm.html
* igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-close-fd-smem:
- shard-lnl: NOTRUN -> [SKIP][84] ([Intel XE#6874]) +10 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-close-fd-smem.html
* igt@xe_exec_multi_queue@many-queues-userptr-invalidate:
- shard-bmg: NOTRUN -> [SKIP][85] ([Intel XE#6874]) +4 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@xe_exec_multi_queue@many-queues-userptr-invalidate.html
* igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind:
- shard-bmg: NOTRUN -> [SKIP][86] ([Intel XE#7138]) +2 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind.html
* igt@xe_exec_threads@threads-multi-queue-cm-userptr-invalidate-race:
- shard-lnl: NOTRUN -> [SKIP][87] ([Intel XE#7138]) +2 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-2/igt@xe_exec_threads@threads-multi-queue-cm-userptr-invalidate-race.html
* igt@xe_gpgpu_fill@offset-4x4:
- shard-bmg: NOTRUN -> [SKIP][88] ([Intel XE#7954])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@xe_gpgpu_fill@offset-4x4.html
* igt@xe_multigpu_svm@mgpu-xgpu-access-basic:
- shard-lnl: NOTRUN -> [SKIP][89] ([Intel XE#6964])
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-2/igt@xe_multigpu_svm@mgpu-xgpu-access-basic.html
* igt@xe_pm@d3hot-i2c:
- shard-lnl: NOTRUN -> [SKIP][90] ([Intel XE#5742] / [Intel XE#7328] / [Intel XE#7400])
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@xe_pm@d3hot-i2c.html
* igt@xe_pmu@fn-engine-activity-load:
- shard-lnl: NOTRUN -> [SKIP][91] ([Intel XE#4650] / [Intel XE#7347])
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@xe_pmu@fn-engine-activity-load.html
* igt@xe_pxp@display-pxp-fb:
- shard-bmg: NOTRUN -> [SKIP][92] ([Intel XE#4733] / [Intel XE#7417])
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@xe_pxp@display-pxp-fb.html
* igt@xe_query@multigpu-query-uc-fw-version-guc:
- shard-bmg: NOTRUN -> [SKIP][93] ([Intel XE#944])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-5/igt@xe_query@multigpu-query-uc-fw-version-guc.html
* igt@xe_sriov_admin@bulk-exec-quantum-vfs-disabled:
- shard-lnl: NOTRUN -> [SKIP][94] ([Intel XE#7174])
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@xe_sriov_admin@bulk-exec-quantum-vfs-disabled.html
* igt@xe_sriov_flr@flr-basic:
- shard-lnl: NOTRUN -> [SKIP][95] ([Intel XE#7569])
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-2/igt@xe_sriov_flr@flr-basic.html
* igt@xe_sriov_scheduling@equal-throughput:
- shard-lnl: NOTRUN -> [SKIP][96] ([Intel XE#4351] / [Intel XE#7357])
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@xe_sriov_scheduling@equal-throughput.html
* igt@xe_vm@overcommit-fault-vram-lr:
- shard-lnl: NOTRUN -> [SKIP][97] ([Intel XE#7892])
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-8/igt@xe_vm@overcommit-fault-vram-lr.html
* igt@xe_wedged@wedged-mode-toggle:
- shard-bmg: [PASS][98] -> [ABORT][99] ([Intel XE#8007])
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f/shard-bmg-3/igt@xe_wedged@wedged-mode-toggle.html
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-6/igt@xe_wedged@wedged-mode-toggle.html
#### Possible fixes ####
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-lnl: [FAIL][100] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][101]
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][102] ([Intel XE#1503]) -> [PASS][103]
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f/shard-bmg-4/igt@kms_hdr@invalid-hdr.html
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-8/igt@kms_hdr@invalid-hdr.html
* igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010:
- shard-bmg: [SKIP][104] ([Intel XE#7922]) -> [PASS][105] +1 other test pass
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f/shard-bmg-4/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-8/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
* igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-bmg: [SKIP][106] ([Intel XE#7915]) -> [PASS][107] +7 other tests pass
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f/shard-bmg-7/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-10/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
* igt@kms_pm_dc@deep-pkgc:
- shard-lnl: [FAIL][108] ([Intel XE#2029] / [Intel XE#7395]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f/shard-lnl-4/igt@kms_pm_dc@deep-pkgc.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-3/igt@kms_pm_dc@deep-pkgc.html
* igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
- shard-lnl: [FAIL][110] ([Intel XE#2142]) -> [PASS][111] +1 other test pass
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f/shard-lnl-8/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-2/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
* igt@xe_exec_reset@long-spin-reuse-many-preempt-threads:
- shard-bmg: [FAIL][112] ([Intel XE#7850]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f/shard-bmg-5/igt@xe_exec_reset@long-spin-reuse-many-preempt-threads.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-4/igt@xe_exec_reset@long-spin-reuse-many-preempt-threads.html
* igt@xe_wedged@wedged-mode-toggle:
- shard-lnl: [ABORT][114] ([Intel XE#8007]) -> [PASS][115]
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f/shard-lnl-1/igt@xe_wedged@wedged-mode-toggle.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-7/igt@xe_wedged@wedged-mode-toggle.html
#### Warnings ####
* igt@kms_big_fb@linear-8bpp-rotate-0:
- shard-lnl: [ABORT][116] ([Intel XE#4760]) -> [FAIL][117] ([Intel XE#8228])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f/shard-lnl-8/igt@kms_big_fb@linear-8bpp-rotate-0.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-2/igt@kms_big_fb@linear-8bpp-rotate-0.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [FAIL][118] ([Intel XE#301] / [Intel XE#3149]) -> [FAIL][119] ([Intel XE#301])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [SKIP][120] ([Intel XE#2426] / [Intel XE#5848]) -> [FAIL][121] ([Intel XE#1729] / [Intel XE#7424])
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-10/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][122] ([Intel XE#2509] / [Intel XE#7437]) -> [SKIP][123] ([Intel XE#2426] / [Intel XE#5848])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
[Intel XE#2029]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2029
[Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#3279]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3279
[Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#3658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3658
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4329
[Intel XE#4351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4351
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
[Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
[Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4760
[Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
[Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#5854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5854
[Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
[Intel XE#6900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6900
[Intel XE#6912]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6912
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
[Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
[Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
[Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
[Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
[Intel XE#7174]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7174
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
[Intel XE#7328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7328
[Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
[Intel XE#7345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7345
[Intel XE#7347]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7347
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7357]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7357
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7360
[Intel XE#7362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7362
[Intel XE#7368]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7368
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7375
[Intel XE#7385]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7385
[Intel XE#7386]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7386
[Intel XE#7389]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7389
[Intel XE#7395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7395
[Intel XE#7400]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7400
[Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
[Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
[Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7450
[Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
[Intel XE#7569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7569
[Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
[Intel XE#7638]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7638
[Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
[Intel XE#7850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7850
[Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
[Intel XE#7892]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7892
[Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
[Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
[Intel XE#7922]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7922
[Intel XE#7954]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7954
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8228]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8228
[Intel XE#8229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8229
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f -> xe-pw-167642v1
IGT_8943: 8943
xe-5171-8133a9f4c4fd407e81df71530490836a1170bb2f: 8133a9f4c4fd407e81df71530490836a1170bb2f
xe-pw-167642v1: 167642v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v1/index.html
[-- Attachment #2: Type: text/html, Size: 47089 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread* ✓ CI.KUnit: success for drm/i915/display: Mask RO bits in gen9_write_dc_state() (rev2)
[not found] <<20260506130321.487414-1-dibin.moolakadan.subrahmanian@intel.com>
` (3 preceding siblings ...)
2026-06-01 14:51 ` ✓ Xe.CI.FULL: " Patchwork
@ 2026-06-02 12:15 ` Patchwork
2026-06-02 12:53 ` ✓ Xe.CI.BAT: " Patchwork
2026-06-02 21:31 ` ✓ Xe.CI.FULL: " Patchwork
6 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-06-02 12:15 UTC (permalink / raw)
To: Dibin Moolakadan Subrahmanian; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: Mask RO bits in gen9_write_dc_state() (rev2)
URL : https://patchwork.freedesktop.org/series/167642/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[12:13:55] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:13:59] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:14:31] Starting KUnit Kernel (1/1)...
[12:14:31] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:14:31] ================== guc_buf (11 subtests) ===================
[12:14:31] [PASSED] test_smallest
[12:14:31] [PASSED] test_largest
[12:14:31] [PASSED] test_granular
[12:14:31] [PASSED] test_unique
[12:14:31] [PASSED] test_overlap
[12:14:31] [PASSED] test_reusable
[12:14:31] [PASSED] test_too_big
[12:14:31] [PASSED] test_flush
[12:14:31] [PASSED] test_lookup
[12:14:31] [PASSED] test_data
[12:14:31] [PASSED] test_class
[12:14:31] ===================== [PASSED] guc_buf =====================
[12:14:31] =================== guc_dbm (7 subtests) ===================
[12:14:31] [PASSED] test_empty
[12:14:31] [PASSED] test_default
[12:14:31] ======================== test_size ========================
[12:14:31] [PASSED] 4
[12:14:31] [PASSED] 8
[12:14:31] [PASSED] 32
[12:14:31] [PASSED] 256
[12:14:31] ==================== [PASSED] test_size ====================
[12:14:31] ======================= test_reuse ========================
[12:14:31] [PASSED] 4
[12:14:31] [PASSED] 8
[12:14:31] [PASSED] 32
[12:14:31] [PASSED] 256
[12:14:31] =================== [PASSED] test_reuse ====================
[12:14:31] =================== test_range_overlap ====================
[12:14:31] [PASSED] 4
[12:14:31] [PASSED] 8
[12:14:31] [PASSED] 32
[12:14:31] [PASSED] 256
[12:14:31] =============== [PASSED] test_range_overlap ================
[12:14:31] =================== test_range_compact ====================
[12:14:31] [PASSED] 4
[12:14:31] [PASSED] 8
[12:14:31] [PASSED] 32
[12:14:31] [PASSED] 256
[12:14:31] =============== [PASSED] test_range_compact ================
[12:14:31] ==================== test_range_spare =====================
[12:14:31] [PASSED] 4
[12:14:31] [PASSED] 8
[12:14:31] [PASSED] 32
[12:14:31] [PASSED] 256
[12:14:31] ================ [PASSED] test_range_spare =================
[12:14:31] ===================== [PASSED] guc_dbm =====================
[12:14:31] =================== guc_idm (6 subtests) ===================
[12:14:31] [PASSED] bad_init
[12:14:31] [PASSED] no_init
[12:14:31] [PASSED] init_fini
[12:14:31] [PASSED] check_used
[12:14:31] [PASSED] check_quota
[12:14:31] [PASSED] check_all
[12:14:31] ===================== [PASSED] guc_idm =====================
[12:14:31] ================== no_relay (3 subtests) ===================
[12:14:31] [PASSED] xe_drops_guc2pf_if_not_ready
[12:14:31] [PASSED] xe_drops_guc2vf_if_not_ready
[12:14:31] [PASSED] xe_rejects_send_if_not_ready
[12:14:31] ==================== [PASSED] no_relay =====================
[12:14:31] ================== pf_relay (14 subtests) ==================
[12:14:31] [PASSED] pf_rejects_guc2pf_too_short
[12:14:31] [PASSED] pf_rejects_guc2pf_too_long
[12:14:31] [PASSED] pf_rejects_guc2pf_no_payload
[12:14:31] [PASSED] pf_fails_no_payload
[12:14:31] [PASSED] pf_fails_bad_origin
[12:14:31] [PASSED] pf_fails_bad_type
[12:14:31] [PASSED] pf_txn_reports_error
[12:14:31] [PASSED] pf_txn_sends_pf2guc
[12:14:31] [PASSED] pf_sends_pf2guc
[12:14:31] [SKIPPED] pf_loopback_nop
[12:14:31] [SKIPPED] pf_loopback_echo
[12:14:31] [SKIPPED] pf_loopback_fail
[12:14:31] [SKIPPED] pf_loopback_busy
[12:14:31] [SKIPPED] pf_loopback_retry
[12:14:31] ==================== [PASSED] pf_relay =====================
[12:14:31] ================== vf_relay (3 subtests) ===================
[12:14:31] [PASSED] vf_rejects_guc2vf_too_short
[12:14:31] [PASSED] vf_rejects_guc2vf_too_long
[12:14:31] [PASSED] vf_rejects_guc2vf_no_payload
[12:14:31] ==================== [PASSED] vf_relay =====================
[12:14:31] ================ pf_gt_config (9 subtests) =================
[12:14:31] [PASSED] fair_contexts_1vf
[12:14:31] [PASSED] fair_doorbells_1vf
[12:14:31] [PASSED] fair_ggtt_1vf
[12:14:31] ====================== fair_vram_1vf ======================
[12:14:31] [PASSED] 3.50 GiB
[12:14:31] [PASSED] 11.5 GiB
[12:14:31] [PASSED] 15.5 GiB
[12:14:31] [PASSED] 31.5 GiB
[12:14:31] [PASSED] 63.5 GiB
[12:14:31] [PASSED] 1.91 GiB
[12:14:31] ================== [PASSED] fair_vram_1vf ==================
[12:14:31] ================ fair_vram_1vf_admin_only =================
[12:14:31] [PASSED] 3.50 GiB
[12:14:31] [PASSED] 11.5 GiB
[12:14:31] [PASSED] 15.5 GiB
[12:14:31] [PASSED] 31.5 GiB
[12:14:31] [PASSED] 63.5 GiB
[12:14:31] [PASSED] 1.91 GiB
[12:14:31] ============ [PASSED] fair_vram_1vf_admin_only =============
[12:14:31] ====================== fair_contexts ======================
[12:14:31] [PASSED] 1 VF
[12:14:31] [PASSED] 2 VFs
[12:14:31] [PASSED] 3 VFs
[12:14:31] [PASSED] 4 VFs
[12:14:31] [PASSED] 5 VFs
[12:14:31] [PASSED] 6 VFs
[12:14:31] [PASSED] 7 VFs
[12:14:31] [PASSED] 8 VFs
[12:14:31] [PASSED] 9 VFs
[12:14:31] [PASSED] 10 VFs
[12:14:31] [PASSED] 11 VFs
[12:14:31] [PASSED] 12 VFs
[12:14:31] [PASSED] 13 VFs
[12:14:31] [PASSED] 14 VFs
[12:14:31] [PASSED] 15 VFs
[12:14:31] [PASSED] 16 VFs
[12:14:31] [PASSED] 17 VFs
[12:14:31] [PASSED] 18 VFs
[12:14:31] [PASSED] 19 VFs
[12:14:31] [PASSED] 20 VFs
[12:14:31] [PASSED] 21 VFs
[12:14:31] [PASSED] 22 VFs
[12:14:31] [PASSED] 23 VFs
[12:14:31] [PASSED] 24 VFs
[12:14:31] [PASSED] 25 VFs
[12:14:31] [PASSED] 26 VFs
[12:14:31] [PASSED] 27 VFs
[12:14:31] [PASSED] 28 VFs
[12:14:31] [PASSED] 29 VFs
[12:14:31] [PASSED] 30 VFs
[12:14:31] [PASSED] 31 VFs
[12:14:31] [PASSED] 32 VFs
[12:14:31] [PASSED] 33 VFs
[12:14:31] [PASSED] 34 VFs
[12:14:31] [PASSED] 35 VFs
[12:14:31] [PASSED] 36 VFs
[12:14:31] [PASSED] 37 VFs
[12:14:31] [PASSED] 38 VFs
[12:14:31] [PASSED] 39 VFs
[12:14:31] [PASSED] 40 VFs
[12:14:31] [PASSED] 41 VFs
[12:14:31] [PASSED] 42 VFs
[12:14:31] [PASSED] 43 VFs
[12:14:31] [PASSED] 44 VFs
[12:14:31] [PASSED] 45 VFs
[12:14:31] [PASSED] 46 VFs
[12:14:31] [PASSED] 47 VFs
[12:14:31] [PASSED] 48 VFs
[12:14:31] [PASSED] 49 VFs
[12:14:31] [PASSED] 50 VFs
[12:14:31] [PASSED] 51 VFs
[12:14:31] [PASSED] 52 VFs
[12:14:31] [PASSED] 53 VFs
[12:14:31] [PASSED] 54 VFs
[12:14:31] [PASSED] 55 VFs
[12:14:31] [PASSED] 56 VFs
[12:14:31] [PASSED] 57 VFs
[12:14:31] [PASSED] 58 VFs
[12:14:31] [PASSED] 59 VFs
[12:14:31] [PASSED] 60 VFs
[12:14:31] [PASSED] 61 VFs
[12:14:31] [PASSED] 62 VFs
[12:14:31] [PASSED] 63 VFs
[12:14:31] ================== [PASSED] fair_contexts ==================
[12:14:31] ===================== fair_doorbells ======================
[12:14:31] [PASSED] 1 VF
[12:14:31] [PASSED] 2 VFs
[12:14:31] [PASSED] 3 VFs
[12:14:31] [PASSED] 4 VFs
[12:14:31] [PASSED] 5 VFs
[12:14:31] [PASSED] 6 VFs
[12:14:31] [PASSED] 7 VFs
[12:14:31] [PASSED] 8 VFs
[12:14:31] [PASSED] 9 VFs
[12:14:31] [PASSED] 10 VFs
[12:14:31] [PASSED] 11 VFs
[12:14:31] [PASSED] 12 VFs
[12:14:31] [PASSED] 13 VFs
[12:14:31] [PASSED] 14 VFs
[12:14:31] [PASSED] 15 VFs
[12:14:31] [PASSED] 16 VFs
[12:14:31] [PASSED] 17 VFs
[12:14:31] [PASSED] 18 VFs
[12:14:31] [PASSED] 19 VFs
[12:14:31] [PASSED] 20 VFs
[12:14:31] [PASSED] 21 VFs
[12:14:31] [PASSED] 22 VFs
[12:14:31] [PASSED] 23 VFs
[12:14:31] [PASSED] 24 VFs
[12:14:31] [PASSED] 25 VFs
[12:14:31] [PASSED] 26 VFs
[12:14:31] [PASSED] 27 VFs
[12:14:31] [PASSED] 28 VFs
[12:14:31] [PASSED] 29 VFs
[12:14:31] [PASSED] 30 VFs
[12:14:31] [PASSED] 31 VFs
[12:14:31] [PASSED] 32 VFs
[12:14:31] [PASSED] 33 VFs
[12:14:31] [PASSED] 34 VFs
[12:14:31] [PASSED] 35 VFs
[12:14:31] [PASSED] 36 VFs
[12:14:31] [PASSED] 37 VFs
[12:14:31] [PASSED] 38 VFs
[12:14:31] [PASSED] 39 VFs
[12:14:31] [PASSED] 40 VFs
[12:14:31] [PASSED] 41 VFs
[12:14:31] [PASSED] 42 VFs
[12:14:31] [PASSED] 43 VFs
[12:14:31] [PASSED] 44 VFs
[12:14:31] [PASSED] 45 VFs
[12:14:31] [PASSED] 46 VFs
[12:14:31] [PASSED] 47 VFs
[12:14:31] [PASSED] 48 VFs
[12:14:31] [PASSED] 49 VFs
[12:14:31] [PASSED] 50 VFs
[12:14:31] [PASSED] 51 VFs
[12:14:31] [PASSED] 52 VFs
[12:14:31] [PASSED] 53 VFs
[12:14:31] [PASSED] 54 VFs
[12:14:31] [PASSED] 55 VFs
[12:14:31] [PASSED] 56 VFs
[12:14:31] [PASSED] 57 VFs
[12:14:31] [PASSED] 58 VFs
[12:14:31] [PASSED] 59 VFs
[12:14:31] [PASSED] 60 VFs
[12:14:31] [PASSED] 61 VFs
[12:14:31] [PASSED] 62 VFs
[12:14:31] [PASSED] 63 VFs
[12:14:31] ================= [PASSED] fair_doorbells ==================
[12:14:31] ======================== fair_ggtt ========================
[12:14:31] [PASSED] 1 VF
[12:14:31] [PASSED] 2 VFs
[12:14:31] [PASSED] 3 VFs
[12:14:31] [PASSED] 4 VFs
[12:14:31] [PASSED] 5 VFs
[12:14:31] [PASSED] 6 VFs
[12:14:31] [PASSED] 7 VFs
[12:14:31] [PASSED] 8 VFs
[12:14:31] [PASSED] 9 VFs
[12:14:31] [PASSED] 10 VFs
[12:14:31] [PASSED] 11 VFs
[12:14:31] [PASSED] 12 VFs
[12:14:31] [PASSED] 13 VFs
[12:14:31] [PASSED] 14 VFs
[12:14:31] [PASSED] 15 VFs
[12:14:31] [PASSED] 16 VFs
[12:14:31] [PASSED] 17 VFs
[12:14:31] [PASSED] 18 VFs
[12:14:31] [PASSED] 19 VFs
[12:14:31] [PASSED] 20 VFs
[12:14:31] [PASSED] 21 VFs
[12:14:31] [PASSED] 22 VFs
[12:14:31] [PASSED] 23 VFs
[12:14:31] [PASSED] 24 VFs
[12:14:31] [PASSED] 25 VFs
[12:14:31] [PASSED] 26 VFs
[12:14:31] [PASSED] 27 VFs
[12:14:31] [PASSED] 28 VFs
[12:14:31] [PASSED] 29 VFs
[12:14:31] [PASSED] 30 VFs
[12:14:31] [PASSED] 31 VFs
[12:14:31] [PASSED] 32 VFs
[12:14:31] [PASSED] 33 VFs
[12:14:31] [PASSED] 34 VFs
[12:14:31] [PASSED] 35 VFs
[12:14:31] [PASSED] 36 VFs
[12:14:31] [PASSED] 37 VFs
[12:14:31] [PASSED] 38 VFs
[12:14:31] [PASSED] 39 VFs
[12:14:31] [PASSED] 40 VFs
[12:14:31] [PASSED] 41 VFs
[12:14:31] [PASSED] 42 VFs
[12:14:31] [PASSED] 43 VFs
[12:14:31] [PASSED] 44 VFs
[12:14:31] [PASSED] 45 VFs
[12:14:31] [PASSED] 46 VFs
[12:14:31] [PASSED] 47 VFs
[12:14:31] [PASSED] 48 VFs
[12:14:31] [PASSED] 49 VFs
[12:14:31] [PASSED] 50 VFs
[12:14:31] [PASSED] 51 VFs
[12:14:31] [PASSED] 52 VFs
[12:14:31] [PASSED] 53 VFs
[12:14:31] [PASSED] 54 VFs
[12:14:31] [PASSED] 55 VFs
[12:14:31] [PASSED] 56 VFs
[12:14:31] [PASSED] 57 VFs
[12:14:31] [PASSED] 58 VFs
[12:14:31] [PASSED] 59 VFs
[12:14:31] [PASSED] 60 VFs
[12:14:31] [PASSED] 61 VFs
[12:14:31] [PASSED] 62 VFs
[12:14:31] [PASSED] 63 VFs
[12:14:31] ==================== [PASSED] fair_ggtt ====================
[12:14:31] ======================== fair_vram ========================
[12:14:31] [PASSED] 1 VF
[12:14:31] [PASSED] 2 VFs
[12:14:31] [PASSED] 3 VFs
[12:14:31] [PASSED] 4 VFs
[12:14:31] [PASSED] 5 VFs
[12:14:31] [PASSED] 6 VFs
[12:14:31] [PASSED] 7 VFs
[12:14:31] [PASSED] 8 VFs
[12:14:31] [PASSED] 9 VFs
[12:14:31] [PASSED] 10 VFs
[12:14:31] [PASSED] 11 VFs
[12:14:31] [PASSED] 12 VFs
[12:14:31] [PASSED] 13 VFs
[12:14:31] [PASSED] 14 VFs
[12:14:31] [PASSED] 15 VFs
[12:14:31] [PASSED] 16 VFs
[12:14:31] [PASSED] 17 VFs
[12:14:31] [PASSED] 18 VFs
[12:14:31] [PASSED] 19 VFs
[12:14:31] [PASSED] 20 VFs
[12:14:31] [PASSED] 21 VFs
[12:14:31] [PASSED] 22 VFs
[12:14:31] [PASSED] 23 VFs
[12:14:31] [PASSED] 24 VFs
[12:14:31] [PASSED] 25 VFs
[12:14:31] [PASSED] 26 VFs
[12:14:31] [PASSED] 27 VFs
[12:14:31] [PASSED] 28 VFs
[12:14:31] [PASSED] 29 VFs
[12:14:31] [PASSED] 30 VFs
[12:14:31] [PASSED] 31 VFs
[12:14:31] [PASSED] 32 VFs
[12:14:31] [PASSED] 33 VFs
[12:14:31] [PASSED] 34 VFs
[12:14:31] [PASSED] 35 VFs
[12:14:31] [PASSED] 36 VFs
[12:14:31] [PASSED] 37 VFs
[12:14:31] [PASSED] 38 VFs
[12:14:31] [PASSED] 39 VFs
[12:14:31] [PASSED] 40 VFs
[12:14:31] [PASSED] 41 VFs
[12:14:31] [PASSED] 42 VFs
[12:14:31] [PASSED] 43 VFs
[12:14:31] [PASSED] 44 VFs
[12:14:31] [PASSED] 45 VFs
[12:14:31] [PASSED] 46 VFs
[12:14:31] [PASSED] 47 VFs
[12:14:31] [PASSED] 48 VFs
[12:14:31] [PASSED] 49 VFs
[12:14:31] [PASSED] 50 VFs
[12:14:31] [PASSED] 51 VFs
[12:14:31] [PASSED] 52 VFs
[12:14:31] [PASSED] 53 VFs
[12:14:31] [PASSED] 54 VFs
[12:14:31] [PASSED] 55 VFs
[12:14:31] [PASSED] 56 VFs
[12:14:31] [PASSED] 57 VFs
[12:14:31] [PASSED] 58 VFs
[12:14:31] [PASSED] 59 VFs
[12:14:31] [PASSED] 60 VFs
[12:14:31] [PASSED] 61 VFs
[12:14:31] [PASSED] 62 VFs
[12:14:31] [PASSED] 63 VFs
[12:14:31] ==================== [PASSED] fair_vram ====================
[12:14:31] ================== [PASSED] pf_gt_config ===================
[12:14:31] ===================== lmtt (1 subtest) =====================
[12:14:31] ======================== test_ops =========================
[12:14:31] [PASSED] 2-level
[12:14:31] [PASSED] multi-level
[12:14:31] ==================== [PASSED] test_ops =====================
[12:14:31] ====================== [PASSED] lmtt =======================
[12:14:31] ================= pf_service (11 subtests) =================
[12:14:31] [PASSED] pf_negotiate_any
[12:14:31] [PASSED] pf_negotiate_base_match
[12:14:31] [PASSED] pf_negotiate_base_newer
[12:14:31] [PASSED] pf_negotiate_base_next
[12:14:31] [SKIPPED] pf_negotiate_base_older
[12:14:31] [PASSED] pf_negotiate_base_prev
[12:14:31] [PASSED] pf_negotiate_latest_match
[12:14:31] [PASSED] pf_negotiate_latest_newer
[12:14:31] [PASSED] pf_negotiate_latest_next
[12:14:31] [SKIPPED] pf_negotiate_latest_older
[12:14:31] [SKIPPED] pf_negotiate_latest_prev
[12:14:31] =================== [PASSED] pf_service ====================
[12:14:31] ================= xe_guc_g2g (2 subtests) ==================
[12:14:31] ============== xe_live_guc_g2g_kunit_default ==============
[12:14:31] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[12:14:31] ============== xe_live_guc_g2g_kunit_allmem ===============
[12:14:31] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[12:14:31] =================== [SKIPPED] xe_guc_g2g ===================
[12:14:31] =================== xe_mocs (2 subtests) ===================
[12:14:31] ================ xe_live_mocs_kernel_kunit ================
[12:14:31] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[12:14:31] ================ xe_live_mocs_reset_kunit =================
[12:14:31] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[12:14:31] ==================== [SKIPPED] xe_mocs =====================
[12:14:31] ================= xe_migrate (2 subtests) ==================
[12:14:31] ================= xe_migrate_sanity_kunit =================
[12:14:31] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[12:14:31] ================== xe_validate_ccs_kunit ==================
[12:14:31] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[12:14:31] =================== [SKIPPED] xe_migrate ===================
[12:14:31] ================== xe_dma_buf (1 subtest) ==================
[12:14:31] ==================== xe_dma_buf_kunit =====================
[12:14:31] ================ [SKIPPED] xe_dma_buf_kunit ================
[12:14:31] =================== [SKIPPED] xe_dma_buf ===================
[12:14:31] ================= xe_bo_shrink (1 subtest) =================
[12:14:31] =================== xe_bo_shrink_kunit ====================
[12:14:31] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[12:14:31] ================== [SKIPPED] xe_bo_shrink ==================
[12:14:31] ==================== xe_bo (2 subtests) ====================
[12:14:31] ================== xe_ccs_migrate_kunit ===================
[12:14:31] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[12:14:31] ==================== xe_bo_evict_kunit ====================
[12:14:31] =============== [SKIPPED] xe_bo_evict_kunit ================
[12:14:31] ===================== [SKIPPED] xe_bo ======================
[12:14:31] ==================== args (13 subtests) ====================
[12:14:31] [PASSED] count_args_test
[12:14:31] [PASSED] call_args_example
[12:14:31] [PASSED] call_args_test
[12:14:31] [PASSED] drop_first_arg_example
[12:14:31] [PASSED] drop_first_arg_test
[12:14:31] [PASSED] first_arg_example
[12:14:31] [PASSED] first_arg_test
[12:14:31] [PASSED] last_arg_example
[12:14:31] [PASSED] last_arg_test
[12:14:31] [PASSED] pick_arg_example
[12:14:31] [PASSED] if_args_example
[12:14:31] [PASSED] if_args_test
[12:14:31] [PASSED] sep_comma_example
[12:14:31] ====================== [PASSED] args =======================
[12:14:31] =================== xe_pci (3 subtests) ====================
[12:14:31] ==================== check_graphics_ip ====================
[12:14:31] [PASSED] 12.00 Xe_LP
[12:14:31] [PASSED] 12.10 Xe_LP+
[12:14:31] [PASSED] 12.55 Xe_HPG
[12:14:31] [PASSED] 12.60 Xe_HPC
[12:14:31] [PASSED] 12.70 Xe_LPG
[12:14:31] [PASSED] 12.71 Xe_LPG
[12:14:31] [PASSED] 12.74 Xe_LPG+
[12:14:31] [PASSED] 20.01 Xe2_HPG
[12:14:31] [PASSED] 20.02 Xe2_HPG
[12:14:31] [PASSED] 20.04 Xe2_LPG
[12:14:31] [PASSED] 30.00 Xe3_LPG
[12:14:31] [PASSED] 30.01 Xe3_LPG
[12:14:31] [PASSED] 30.03 Xe3_LPG
[12:14:31] [PASSED] 30.04 Xe3_LPG
[12:14:31] [PASSED] 30.05 Xe3_LPG
[12:14:31] [PASSED] 35.10 Xe3p_LPG
[12:14:31] [PASSED] 35.11 Xe3p_XPC
[12:14:31] ================ [PASSED] check_graphics_ip ================
[12:14:31] ===================== check_media_ip ======================
[12:14:31] [PASSED] 12.00 Xe_M
[12:14:31] [PASSED] 12.55 Xe_HPM
[12:14:31] [PASSED] 13.00 Xe_LPM+
[12:14:31] [PASSED] 13.01 Xe2_HPM
[12:14:31] [PASSED] 20.00 Xe2_LPM
[12:14:31] [PASSED] 30.00 Xe3_LPM
[12:14:31] [PASSED] 30.02 Xe3_LPM
[12:14:31] [PASSED] 35.00 Xe3p_LPM
[12:14:31] [PASSED] 35.03 Xe3p_HPM
[12:14:31] ================= [PASSED] check_media_ip ==================
[12:14:31] =================== check_platform_desc ===================
[12:14:31] [PASSED] 0x9A60 (TIGERLAKE)
[12:14:31] [PASSED] 0x9A68 (TIGERLAKE)
[12:14:31] [PASSED] 0x9A70 (TIGERLAKE)
[12:14:31] [PASSED] 0x9A40 (TIGERLAKE)
[12:14:31] [PASSED] 0x9A49 (TIGERLAKE)
[12:14:31] [PASSED] 0x9A59 (TIGERLAKE)
[12:14:31] [PASSED] 0x9A78 (TIGERLAKE)
[12:14:31] [PASSED] 0x9AC0 (TIGERLAKE)
[12:14:31] [PASSED] 0x9AC9 (TIGERLAKE)
[12:14:31] [PASSED] 0x9AD9 (TIGERLAKE)
[12:14:31] [PASSED] 0x9AF8 (TIGERLAKE)
[12:14:31] [PASSED] 0x4C80 (ROCKETLAKE)
[12:14:31] [PASSED] 0x4C8A (ROCKETLAKE)
[12:14:31] [PASSED] 0x4C8B (ROCKETLAKE)
[12:14:31] [PASSED] 0x4C8C (ROCKETLAKE)
[12:14:31] [PASSED] 0x4C90 (ROCKETLAKE)
[12:14:31] [PASSED] 0x4C9A (ROCKETLAKE)
[12:14:31] [PASSED] 0x4680 (ALDERLAKE_S)
[12:14:31] [PASSED] 0x4682 (ALDERLAKE_S)
[12:14:31] [PASSED] 0x4688 (ALDERLAKE_S)
[12:14:31] [PASSED] 0x468A (ALDERLAKE_S)
[12:14:31] [PASSED] 0x468B (ALDERLAKE_S)
[12:14:31] [PASSED] 0x4690 (ALDERLAKE_S)
[12:14:31] [PASSED] 0x4692 (ALDERLAKE_S)
[12:14:31] [PASSED] 0x4693 (ALDERLAKE_S)
[12:14:31] [PASSED] 0x46A0 (ALDERLAKE_P)
[12:14:31] [PASSED] 0x46A1 (ALDERLAKE_P)
[12:14:31] [PASSED] 0x46A2 (ALDERLAKE_P)
[12:14:31] [PASSED] 0x46A3 (ALDERLAKE_P)
[12:14:31] [PASSED] 0x46A6 (ALDERLAKE_P)
[12:14:31] [PASSED] 0x46A8 (ALDERLAKE_P)
[12:14:31] [PASSED] 0x46AA (ALDERLAKE_P)
[12:14:31] [PASSED] 0x462A (ALDERLAKE_P)
[12:14:31] [PASSED] 0x4626 (ALDERLAKE_P)
[12:14:31] [PASSED] 0x4628 (ALDERLAKE_P)
[12:14:31] [PASSED] 0x46B0 (ALDERLAKE_P)
[12:14:31] [PASSED] 0x46B1 (ALDERLAKE_P)
[12:14:31] [PASSED] 0x46B2 (ALDERLAKE_P)
[12:14:31] [PASSED] 0x46B3 (ALDERLAKE_P)
[12:14:31] [PASSED] 0x46C0 (ALDERLAKE_P)
[12:14:31] [PASSED] 0x46C1 (ALDERLAKE_P)
[12:14:31] [PASSED] 0x46C2 (ALDERLAKE_P)
[12:14:31] [PASSED] 0x46C3 (ALDERLAKE_P)
[12:14:31] [PASSED] 0x46D0 (ALDERLAKE_N)
[12:14:31] [PASSED] 0x46D1 (ALDERLAKE_N)
[12:14:31] [PASSED] 0x46D2 (ALDERLAKE_N)
[12:14:31] [PASSED] 0x46D3 (ALDERLAKE_N)
[12:14:31] [PASSED] 0x46D4 (ALDERLAKE_N)
[12:14:31] [PASSED] 0xA721 (ALDERLAKE_P)
[12:14:31] [PASSED] 0xA7A1 (ALDERLAKE_P)
[12:14:31] [PASSED] 0xA7A9 (ALDERLAKE_P)
[12:14:31] [PASSED] 0xA7AC (ALDERLAKE_P)
[12:14:31] [PASSED] 0xA7AD (ALDERLAKE_P)
[12:14:31] [PASSED] 0xA720 (ALDERLAKE_P)
[12:14:31] [PASSED] 0xA7A0 (ALDERLAKE_P)
[12:14:31] [PASSED] 0xA7A8 (ALDERLAKE_P)
[12:14:31] [PASSED] 0xA7AA (ALDERLAKE_P)
[12:14:31] [PASSED] 0xA7AB (ALDERLAKE_P)
[12:14:31] [PASSED] 0xA780 (ALDERLAKE_S)
[12:14:31] [PASSED] 0xA781 (ALDERLAKE_S)
[12:14:31] [PASSED] 0xA782 (ALDERLAKE_S)
[12:14:31] [PASSED] 0xA783 (ALDERLAKE_S)
[12:14:31] [PASSED] 0xA788 (ALDERLAKE_S)
[12:14:31] [PASSED] 0xA789 (ALDERLAKE_S)
[12:14:31] [PASSED] 0xA78A (ALDERLAKE_S)
[12:14:31] [PASSED] 0xA78B (ALDERLAKE_S)
[12:14:31] [PASSED] 0x4905 (DG1)
[12:14:31] [PASSED] 0x4906 (DG1)
[12:14:31] [PASSED] 0x4907 (DG1)
[12:14:31] [PASSED] 0x4908 (DG1)
[12:14:31] [PASSED] 0x4909 (DG1)
[12:14:31] [PASSED] 0x56C0 (DG2)
[12:14:31] [PASSED] 0x56C2 (DG2)
[12:14:31] [PASSED] 0x56C1 (DG2)
[12:14:31] [PASSED] 0x7D51 (METEORLAKE)
[12:14:31] [PASSED] 0x7DD1 (METEORLAKE)
[12:14:31] [PASSED] 0x7D41 (METEORLAKE)
[12:14:31] [PASSED] 0x7D67 (METEORLAKE)
[12:14:31] [PASSED] 0xB640 (METEORLAKE)
[12:14:31] [PASSED] 0x56A0 (DG2)
[12:14:31] [PASSED] 0x56A1 (DG2)
[12:14:31] [PASSED] 0x56A2 (DG2)
[12:14:31] [PASSED] 0x56BE (DG2)
[12:14:31] [PASSED] 0x56BF (DG2)
[12:14:31] [PASSED] 0x5690 (DG2)
[12:14:31] [PASSED] 0x5691 (DG2)
[12:14:31] [PASSED] 0x5692 (DG2)
[12:14:31] [PASSED] 0x56A5 (DG2)
[12:14:31] [PASSED] 0x56A6 (DG2)
[12:14:31] [PASSED] 0x56B0 (DG2)
[12:14:31] [PASSED] 0x56B1 (DG2)
[12:14:31] [PASSED] 0x56BA (DG2)
[12:14:31] [PASSED] 0x56BB (DG2)
[12:14:31] [PASSED] 0x56BC (DG2)
[12:14:31] [PASSED] 0x56BD (DG2)
[12:14:31] [PASSED] 0x5693 (DG2)
[12:14:31] [PASSED] 0x5694 (DG2)
[12:14:32] [PASSED] 0x5695 (DG2)
[12:14:32] [PASSED] 0x56A3 (DG2)
[12:14:32] [PASSED] 0x56A4 (DG2)
[12:14:32] [PASSED] 0x56B2 (DG2)
[12:14:32] [PASSED] 0x56B3 (DG2)
[12:14:32] [PASSED] 0x5696 (DG2)
[12:14:32] [PASSED] 0x5697 (DG2)
[12:14:32] [PASSED] 0xB69 (PVC)
[12:14:32] [PASSED] 0xB6E (PVC)
[12:14:32] [PASSED] 0xBD4 (PVC)
[12:14:32] [PASSED] 0xBD5 (PVC)
[12:14:32] [PASSED] 0xBD6 (PVC)
[12:14:32] [PASSED] 0xBD7 (PVC)
[12:14:32] [PASSED] 0xBD8 (PVC)
[12:14:32] [PASSED] 0xBD9 (PVC)
[12:14:32] [PASSED] 0xBDA (PVC)
[12:14:32] [PASSED] 0xBDB (PVC)
[12:14:32] [PASSED] 0xBE0 (PVC)
[12:14:32] [PASSED] 0xBE1 (PVC)
[12:14:32] [PASSED] 0xBE5 (PVC)
[12:14:32] [PASSED] 0x7D40 (METEORLAKE)
[12:14:32] [PASSED] 0x7D45 (METEORLAKE)
[12:14:32] [PASSED] 0x7D55 (METEORLAKE)
[12:14:32] [PASSED] 0x7D60 (METEORLAKE)
[12:14:32] [PASSED] 0x7DD5 (METEORLAKE)
[12:14:32] [PASSED] 0x6420 (LUNARLAKE)
[12:14:32] [PASSED] 0x64A0 (LUNARLAKE)
[12:14:32] [PASSED] 0x64B0 (LUNARLAKE)
[12:14:32] [PASSED] 0xE202 (BATTLEMAGE)
[12:14:32] [PASSED] 0xE209 (BATTLEMAGE)
[12:14:32] [PASSED] 0xE20B (BATTLEMAGE)
[12:14:32] [PASSED] 0xE20C (BATTLEMAGE)
[12:14:32] [PASSED] 0xE20D (BATTLEMAGE)
[12:14:32] [PASSED] 0xE210 (BATTLEMAGE)
[12:14:32] [PASSED] 0xE211 (BATTLEMAGE)
[12:14:32] [PASSED] 0xE212 (BATTLEMAGE)
[12:14:32] [PASSED] 0xE216 (BATTLEMAGE)
[12:14:32] [PASSED] 0xE220 (BATTLEMAGE)
[12:14:32] [PASSED] 0xE221 (BATTLEMAGE)
[12:14:32] [PASSED] 0xE222 (BATTLEMAGE)
[12:14:32] [PASSED] 0xE223 (BATTLEMAGE)
[12:14:32] [PASSED] 0xB080 (PANTHERLAKE)
[12:14:32] [PASSED] 0xB081 (PANTHERLAKE)
[12:14:32] [PASSED] 0xB082 (PANTHERLAKE)
[12:14:32] [PASSED] 0xB083 (PANTHERLAKE)
[12:14:32] [PASSED] 0xB084 (PANTHERLAKE)
[12:14:32] [PASSED] 0xB085 (PANTHERLAKE)
[12:14:32] [PASSED] 0xB086 (PANTHERLAKE)
[12:14:32] [PASSED] 0xB087 (PANTHERLAKE)
[12:14:32] [PASSED] 0xB08F (PANTHERLAKE)
[12:14:32] [PASSED] 0xB090 (PANTHERLAKE)
[12:14:32] [PASSED] 0xB0A0 (PANTHERLAKE)
[12:14:32] [PASSED] 0xB0B0 (PANTHERLAKE)
[12:14:32] [PASSED] 0xFD80 (PANTHERLAKE)
[12:14:32] [PASSED] 0xFD81 (PANTHERLAKE)
[12:14:32] [PASSED] 0xD740 (NOVALAKE_S)
[12:14:32] [PASSED] 0xD741 (NOVALAKE_S)
[12:14:32] [PASSED] 0xD742 (NOVALAKE_S)
[12:14:32] [PASSED] 0xD743 (NOVALAKE_S)
[12:14:32] [PASSED] 0xD744 (NOVALAKE_S)
[12:14:32] [PASSED] 0xD745 (NOVALAKE_S)
[12:14:32] [PASSED] 0x674C (CRESCENTISLAND)
[12:14:32] [PASSED] 0x674D (CRESCENTISLAND)
[12:14:32] [PASSED] 0x674E (CRESCENTISLAND)
[12:14:32] [PASSED] 0x674F (CRESCENTISLAND)
[12:14:32] [PASSED] 0x6750 (CRESCENTISLAND)
[12:14:32] [PASSED] 0xD750 (NOVALAKE_P)
[12:14:32] [PASSED] 0xD751 (NOVALAKE_P)
[12:14:32] [PASSED] 0xD752 (NOVALAKE_P)
[12:14:32] [PASSED] 0xD753 (NOVALAKE_P)
[12:14:32] [PASSED] 0xD754 (NOVALAKE_P)
[12:14:32] [PASSED] 0xD755 (NOVALAKE_P)
[12:14:32] [PASSED] 0xD756 (NOVALAKE_P)
[12:14:32] [PASSED] 0xD757 (NOVALAKE_P)
[12:14:32] [PASSED] 0xD75F (NOVALAKE_P)
[12:14:32] =============== [PASSED] check_platform_desc ===============
[12:14:32] ===================== [PASSED] xe_pci ======================
[12:14:32] =================== xe_rtp (3 subtests) ====================
[12:14:32] =================== xe_rtp_rules_tests ====================
[12:14:32] [PASSED] no
[12:14:32] [PASSED] yes
[12:14:32] [PASSED] no-and-no
[12:14:32] [PASSED] no-and-yes
[12:14:32] [PASSED] yes-and-no
[12:14:32] [PASSED] yes-and-yes
[12:14:32] [PASSED] no-or-no
[12:14:32] [PASSED] no-or-yes
[12:14:32] [PASSED] yes-or-no
[12:14:32] [PASSED] yes-or-yes
[12:14:32] [PASSED] no-yes-or-yes-no
[12:14:32] [PASSED] no-yes-or-yes-yes
[12:14:32] [PASSED] yes-yes-or-no-yes
[12:14:32] [PASSED] yes-yes-or-yes-yes
[12:14:32] [PASSED] no-no-or-yes-or-no
[12:14:32] [PASSED] or
[12:14:32] [PASSED] or-yes
[12:14:32] [PASSED] or-no
[12:14:32] [PASSED] yes-or
[12:14:32] [PASSED] no-or
[12:14:32] [PASSED] no-or-or-yes
[12:14:32] [PASSED] yes-or-or-no
[12:14:32] [PASSED] no-or-or-no
[12:14:32] [PASSED] missing-context-engine-class
[12:14:32] [PASSED] missing-context-engine-class-or-yes
[12:14:32] [PASSED] missing-context-engine-class-or-or-yes
[12:14:32] =============== [PASSED] xe_rtp_rules_tests ================
[12:14:32] =============== xe_rtp_process_to_sr_tests ================
[12:14:32] [PASSED] coalesce-same-reg
[12:14:32] [PASSED] no-match-no-add
[12:14:32] [PASSED] two-regs-two-entries
[12:14:32] [PASSED] clr-one-set-other
[12:14:32] [PASSED] set-field
[12:14:32] [PASSED] conflict-duplicate
[12:14:32] [PASSED] conflict-not-disjoint
[12:14:32] [PASSED] conflict-reg-type
[12:14:32] [PASSED] bad-mcr-reg-forced-to-regular
[12:14:32] [PASSED] bad-regular-reg-forced-to-mcr
[12:14:32] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[12:14:32] ================== xe_rtp_process_tests ===================
[12:14:32] [PASSED] active1
[12:14:32] [PASSED] active2
[12:14:32] [PASSED] active-inactive
[12:14:32] [PASSED] inactive-active
[12:14:32] [PASSED] inactive-active-inactive
[12:14:32] [PASSED] inactive-inactive-inactive
[12:14:32] ============== [PASSED] xe_rtp_process_tests ===============
[12:14:32] ===================== [PASSED] xe_rtp ======================
[12:14:32] ==================== xe_wa (1 subtest) =====================
[12:14:32] ======================== xe_wa_gt =========================
[12:14:32] [PASSED] TIGERLAKE B0
[12:14:32] [PASSED] DG1 A0
[12:14:32] [PASSED] DG1 B0
[12:14:32] [PASSED] ALDERLAKE_S A0
[12:14:32] [PASSED] ALDERLAKE_S B0
[12:14:32] [PASSED] ALDERLAKE_S C0
[12:14:32] [PASSED] ALDERLAKE_S D0
[12:14:32] [PASSED] ALDERLAKE_P A0
[12:14:32] [PASSED] ALDERLAKE_P B0
[12:14:32] [PASSED] ALDERLAKE_P C0
[12:14:32] [PASSED] ALDERLAKE_S RPLS D0
[12:14:32] [PASSED] ALDERLAKE_P RPLU E0
[12:14:32] [PASSED] DG2 G10 C0
[12:14:32] [PASSED] DG2 G11 B1
[12:14:32] [PASSED] DG2 G12 A1
[12:14:32] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:14:32] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:14:32] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[12:14:32] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[12:14:32] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[12:14:32] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[12:14:32] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[12:14:32] ==================== [PASSED] xe_wa_gt =====================
[12:14:32] ====================== [PASSED] xe_wa ======================
[12:14:32] ============================================================
[12:14:32] Testing complete. Ran 624 tests: passed: 606, skipped: 18
[12:14:32] Elapsed time: 36.716s total, 4.393s configuring, 31.657s building, 0.647s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[12:14:32] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:14:33] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:14:58] Starting KUnit Kernel (1/1)...
[12:14:58] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:14:58] ============ drm_test_pick_cmdline (2 subtests) ============
[12:14:58] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[12:14:58] =============== drm_test_pick_cmdline_named ===============
[12:14:58] [PASSED] NTSC
[12:14:58] [PASSED] NTSC-J
[12:14:58] [PASSED] PAL
[12:14:58] [PASSED] PAL-M
[12:14:58] =========== [PASSED] drm_test_pick_cmdline_named ===========
[12:14:58] ============== [PASSED] drm_test_pick_cmdline ==============
[12:14:58] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[12:14:58] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[12:14:58] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[12:14:58] =========== drm_validate_clone_mode (2 subtests) ===========
[12:14:58] ============== drm_test_check_in_clone_mode ===============
[12:14:58] [PASSED] in_clone_mode
[12:14:58] [PASSED] not_in_clone_mode
[12:14:58] ========== [PASSED] drm_test_check_in_clone_mode ===========
[12:14:58] =============== drm_test_check_valid_clones ===============
[12:14:58] [PASSED] not_in_clone_mode
[12:14:58] [PASSED] valid_clone
[12:14:58] [PASSED] invalid_clone
[12:14:58] =========== [PASSED] drm_test_check_valid_clones ===========
[12:14:58] ============= [PASSED] drm_validate_clone_mode =============
[12:14:58] ============= drm_validate_modeset (1 subtest) =============
[12:14:58] [PASSED] drm_test_check_connector_changed_modeset
[12:14:58] ============== [PASSED] drm_validate_modeset ===============
[12:14:58] ====== drm_test_bridge_get_current_state (2 subtests) ======
[12:14:58] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[12:14:58] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[12:14:58] ======== [PASSED] drm_test_bridge_get_current_state ========
[12:14:58] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[12:14:58] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[12:14:58] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[12:14:58] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[12:14:58] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[12:14:58] ============== drm_bridge_alloc (2 subtests) ===============
[12:14:58] [PASSED] drm_test_drm_bridge_alloc_basic
[12:14:58] [PASSED] drm_test_drm_bridge_alloc_get_put
[12:14:58] ================ [PASSED] drm_bridge_alloc =================
[12:14:58] ============= drm_cmdline_parser (40 subtests) =============
[12:14:58] [PASSED] drm_test_cmdline_force_d_only
[12:14:58] [PASSED] drm_test_cmdline_force_D_only_dvi
[12:14:58] [PASSED] drm_test_cmdline_force_D_only_hdmi
[12:14:58] [PASSED] drm_test_cmdline_force_D_only_not_digital
[12:14:58] [PASSED] drm_test_cmdline_force_e_only
[12:14:58] [PASSED] drm_test_cmdline_res
[12:14:58] [PASSED] drm_test_cmdline_res_vesa
[12:14:58] [PASSED] drm_test_cmdline_res_vesa_rblank
[12:14:58] [PASSED] drm_test_cmdline_res_rblank
[12:14:58] [PASSED] drm_test_cmdline_res_bpp
[12:14:58] [PASSED] drm_test_cmdline_res_refresh
[12:14:58] [PASSED] drm_test_cmdline_res_bpp_refresh
[12:14:58] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[12:14:58] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[12:14:58] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[12:14:58] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[12:14:58] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[12:14:58] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[12:14:58] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[12:14:58] [PASSED] drm_test_cmdline_res_margins_force_on
[12:14:58] [PASSED] drm_test_cmdline_res_vesa_margins
[12:14:58] [PASSED] drm_test_cmdline_name
[12:14:58] [PASSED] drm_test_cmdline_name_bpp
[12:14:58] [PASSED] drm_test_cmdline_name_option
[12:14:58] [PASSED] drm_test_cmdline_name_bpp_option
[12:14:58] [PASSED] drm_test_cmdline_rotate_0
[12:14:58] [PASSED] drm_test_cmdline_rotate_90
[12:14:58] [PASSED] drm_test_cmdline_rotate_180
[12:14:58] [PASSED] drm_test_cmdline_rotate_270
[12:14:58] [PASSED] drm_test_cmdline_hmirror
[12:14:58] [PASSED] drm_test_cmdline_vmirror
[12:14:58] [PASSED] drm_test_cmdline_margin_options
[12:14:58] [PASSED] drm_test_cmdline_multiple_options
[12:14:58] [PASSED] drm_test_cmdline_bpp_extra_and_option
[12:14:58] [PASSED] drm_test_cmdline_extra_and_option
[12:14:58] [PASSED] drm_test_cmdline_freestanding_options
[12:14:58] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[12:14:58] [PASSED] drm_test_cmdline_panel_orientation
[12:14:58] ================ drm_test_cmdline_invalid =================
[12:14:58] [PASSED] margin_only
[12:14:58] [PASSED] interlace_only
[12:14:58] [PASSED] res_missing_x
[12:14:58] [PASSED] res_missing_y
[12:14:58] [PASSED] res_bad_y
[12:14:58] [PASSED] res_missing_y_bpp
[12:14:58] [PASSED] res_bad_bpp
[12:14:58] [PASSED] res_bad_refresh
[12:14:58] [PASSED] res_bpp_refresh_force_on_off
[12:14:58] [PASSED] res_invalid_mode
[12:14:58] [PASSED] res_bpp_wrong_place_mode
[12:14:58] [PASSED] name_bpp_refresh
[12:14:58] [PASSED] name_refresh
[12:14:58] [PASSED] name_refresh_wrong_mode
[12:14:58] [PASSED] name_refresh_invalid_mode
[12:14:58] [PASSED] rotate_multiple
[12:14:58] [PASSED] rotate_invalid_val
[12:14:58] [PASSED] rotate_truncated
[12:14:58] [PASSED] invalid_option
[12:14:58] [PASSED] invalid_tv_option
[12:14:58] [PASSED] truncated_tv_option
[12:14:58] ============ [PASSED] drm_test_cmdline_invalid =============
[12:14:58] =============== drm_test_cmdline_tv_options ===============
[12:14:58] [PASSED] NTSC
[12:14:58] [PASSED] NTSC_443
[12:14:58] [PASSED] NTSC_J
[12:14:58] [PASSED] PAL
[12:14:58] [PASSED] PAL_M
[12:14:58] [PASSED] PAL_N
[12:14:58] [PASSED] SECAM
[12:14:58] [PASSED] MONO_525
[12:14:58] [PASSED] MONO_625
[12:14:58] =========== [PASSED] drm_test_cmdline_tv_options ===========
[12:14:58] =============== [PASSED] drm_cmdline_parser ================
[12:14:58] ========== drmm_connector_hdmi_init (20 subtests) ==========
[12:14:58] [PASSED] drm_test_connector_hdmi_init_valid
[12:14:58] [PASSED] drm_test_connector_hdmi_init_bpc_8
[12:14:58] [PASSED] drm_test_connector_hdmi_init_bpc_10
[12:14:58] [PASSED] drm_test_connector_hdmi_init_bpc_12
[12:14:58] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[12:14:58] [PASSED] drm_test_connector_hdmi_init_bpc_null
[12:14:58] [PASSED] drm_test_connector_hdmi_init_formats_empty
[12:14:58] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[12:14:58] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:14:58] [PASSED] supported_formats=0x9 yuv420_allowed=1
[12:14:58] [PASSED] supported_formats=0x9 yuv420_allowed=0
[12:14:58] [PASSED] supported_formats=0x5 yuv420_allowed=1
[12:14:58] [PASSED] supported_formats=0x5 yuv420_allowed=0
[12:14:58] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:14:58] [PASSED] drm_test_connector_hdmi_init_null_ddc
[12:14:58] [PASSED] drm_test_connector_hdmi_init_null_product
[12:14:58] [PASSED] drm_test_connector_hdmi_init_null_vendor
[12:14:58] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[12:14:58] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[12:14:58] [PASSED] drm_test_connector_hdmi_init_product_valid
[12:14:58] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[12:14:58] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[12:14:58] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[12:14:58] ========= drm_test_connector_hdmi_init_type_valid =========
[12:14:58] [PASSED] HDMI-A
[12:14:58] [PASSED] HDMI-B
[12:14:58] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[12:14:58] ======== drm_test_connector_hdmi_init_type_invalid ========
[12:14:58] [PASSED] Unknown
[12:14:58] [PASSED] VGA
[12:14:58] [PASSED] DVI-I
[12:14:58] [PASSED] DVI-D
[12:14:58] [PASSED] DVI-A
[12:14:58] [PASSED] Composite
[12:14:58] [PASSED] SVIDEO
[12:14:58] [PASSED] LVDS
[12:14:58] [PASSED] Component
[12:14:58] [PASSED] DIN
[12:14:58] [PASSED] DP
[12:14:58] [PASSED] TV
[12:14:58] [PASSED] eDP
[12:14:58] [PASSED] Virtual
[12:14:58] [PASSED] DSI
[12:14:58] [PASSED] DPI
[12:14:58] [PASSED] Writeback
[12:14:58] [PASSED] SPI
[12:14:58] [PASSED] USB
[12:14:58] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[12:14:58] ============ [PASSED] drmm_connector_hdmi_init =============
[12:14:58] ============= drmm_connector_init (3 subtests) =============
[12:14:58] [PASSED] drm_test_drmm_connector_init
[12:14:58] [PASSED] drm_test_drmm_connector_init_null_ddc
[12:14:58] ========= drm_test_drmm_connector_init_type_valid =========
[12:14:58] [PASSED] Unknown
[12:14:58] [PASSED] VGA
[12:14:58] [PASSED] DVI-I
[12:14:58] [PASSED] DVI-D
[12:14:58] [PASSED] DVI-A
[12:14:58] [PASSED] Composite
[12:14:58] [PASSED] SVIDEO
[12:14:58] [PASSED] LVDS
[12:14:58] [PASSED] Component
[12:14:58] [PASSED] DIN
[12:14:58] [PASSED] DP
[12:14:58] [PASSED] HDMI-A
[12:14:58] [PASSED] HDMI-B
[12:14:58] [PASSED] TV
[12:14:58] [PASSED] eDP
[12:14:58] [PASSED] Virtual
[12:14:58] [PASSED] DSI
[12:14:58] [PASSED] DPI
[12:14:58] [PASSED] Writeback
[12:14:58] [PASSED] SPI
[12:14:58] [PASSED] USB
[12:14:58] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[12:14:58] =============== [PASSED] drmm_connector_init ===============
[12:14:58] ========= drm_connector_dynamic_init (6 subtests) ==========
[12:14:58] [PASSED] drm_test_drm_connector_dynamic_init
[12:14:58] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[12:14:58] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[12:14:58] [PASSED] drm_test_drm_connector_dynamic_init_properties
[12:14:58] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[12:14:58] [PASSED] Unknown
[12:14:58] [PASSED] VGA
[12:14:58] [PASSED] DVI-I
[12:14:58] [PASSED] DVI-D
[12:14:58] [PASSED] DVI-A
[12:14:58] [PASSED] Composite
[12:14:58] [PASSED] SVIDEO
[12:14:58] [PASSED] LVDS
[12:14:58] [PASSED] Component
[12:14:58] [PASSED] DIN
[12:14:58] [PASSED] DP
[12:14:58] [PASSED] HDMI-A
[12:14:58] [PASSED] HDMI-B
[12:14:58] [PASSED] TV
[12:14:58] [PASSED] eDP
[12:14:58] [PASSED] Virtual
[12:14:58] [PASSED] DSI
[12:14:58] [PASSED] DPI
[12:14:58] [PASSED] Writeback
[12:14:58] [PASSED] SPI
[12:14:58] [PASSED] USB
[12:14:58] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[12:14:58] ======== drm_test_drm_connector_dynamic_init_name =========
[12:14:58] [PASSED] Unknown
[12:14:58] [PASSED] VGA
[12:14:58] [PASSED] DVI-I
[12:14:58] [PASSED] DVI-D
[12:14:58] [PASSED] DVI-A
[12:14:58] [PASSED] Composite
[12:14:58] [PASSED] SVIDEO
[12:14:58] [PASSED] LVDS
[12:14:58] [PASSED] Component
[12:14:58] [PASSED] DIN
[12:14:58] [PASSED] DP
[12:14:58] [PASSED] HDMI-A
[12:14:58] [PASSED] HDMI-B
[12:14:58] [PASSED] TV
[12:14:58] [PASSED] eDP
[12:14:58] [PASSED] Virtual
[12:14:58] [PASSED] DSI
[12:14:58] [PASSED] DPI
[12:14:58] [PASSED] Writeback
[12:14:58] [PASSED] SPI
[12:14:58] [PASSED] USB
[12:14:58] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[12:14:58] =========== [PASSED] drm_connector_dynamic_init ============
[12:14:58] ==== drm_connector_dynamic_register_early (4 subtests) =====
[12:14:58] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[12:14:58] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[12:14:58] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[12:14:58] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[12:14:58] ====== [PASSED] drm_connector_dynamic_register_early =======
[12:14:58] ======= drm_connector_dynamic_register (7 subtests) ========
[12:14:58] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[12:14:58] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[12:14:58] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[12:14:58] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[12:14:58] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[12:14:58] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[12:14:58] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[12:14:58] ========= [PASSED] drm_connector_dynamic_register ==========
[12:14:58] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[12:14:58] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[12:14:58] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[12:14:58] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[12:14:58] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[12:14:58] ========== drm_test_get_tv_mode_from_name_valid ===========
[12:14:58] [PASSED] NTSC
[12:14:58] [PASSED] NTSC-443
[12:14:58] [PASSED] NTSC-J
[12:14:58] [PASSED] PAL
[12:14:58] [PASSED] PAL-M
[12:14:58] [PASSED] PAL-N
[12:14:58] [PASSED] SECAM
[12:14:58] [PASSED] Mono
[12:14:58] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[12:14:58] [PASSED] drm_test_get_tv_mode_from_name_truncated
[12:14:58] ============ [PASSED] drm_get_tv_mode_from_name ============
[12:14:58] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[12:14:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[12:14:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[12:14:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[12:14:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[12:14:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[12:14:58] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[12:14:58] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[12:14:58] [PASSED] VIC 96
[12:14:58] [PASSED] VIC 97
[12:14:58] [PASSED] VIC 101
[12:14:58] [PASSED] VIC 102
[12:14:58] [PASSED] VIC 106
[12:14:58] [PASSED] VIC 107
[12:14:58] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[12:14:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[12:14:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[12:14:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[12:14:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[12:14:58] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[12:14:58] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[12:14:58] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[12:14:58] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[12:14:58] [PASSED] Automatic
[12:14:58] [PASSED] Full
[12:14:58] [PASSED] Limited 16:235
[12:14:58] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[12:14:58] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[12:14:58] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[12:14:58] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[12:14:58] === drm_test_drm_hdmi_connector_get_output_format_name ====
[12:14:58] [PASSED] RGB
[12:14:58] [PASSED] YUV 4:2:0
[12:14:58] [PASSED] YUV 4:2:2
[12:14:58] [PASSED] YUV 4:4:4
[12:14:58] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[12:14:58] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[12:14:58] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[12:14:58] ============= drm_damage_helper (21 subtests) ==============
[12:14:58] [PASSED] drm_test_damage_iter_no_damage
[12:14:58] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[12:14:58] [PASSED] drm_test_damage_iter_no_damage_src_moved
[12:14:58] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[12:14:58] [PASSED] drm_test_damage_iter_no_damage_not_visible
[12:14:58] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[12:14:58] [PASSED] drm_test_damage_iter_no_damage_no_fb
[12:14:58] [PASSED] drm_test_damage_iter_simple_damage
[12:14:58] [PASSED] drm_test_damage_iter_single_damage
[12:14:58] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[12:14:58] [PASSED] drm_test_damage_iter_single_damage_outside_src
[12:14:58] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[12:14:58] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[12:14:58] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[12:14:58] [PASSED] drm_test_damage_iter_single_damage_src_moved
[12:14:58] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[12:14:58] [PASSED] drm_test_damage_iter_damage
[12:14:58] [PASSED] drm_test_damage_iter_damage_one_intersect
[12:14:58] [PASSED] drm_test_damage_iter_damage_one_outside
[12:14:58] [PASSED] drm_test_damage_iter_damage_src_moved
[12:14:58] [PASSED] drm_test_damage_iter_damage_not_visible
[12:14:58] ================ [PASSED] drm_damage_helper ================
[12:14:58] ============== drm_dp_mst_helper (3 subtests) ==============
[12:14:58] ============== drm_test_dp_mst_calc_pbn_mode ==============
[12:14:58] [PASSED] Clock 154000 BPP 30 DSC disabled
[12:14:58] [PASSED] Clock 234000 BPP 30 DSC disabled
[12:14:58] [PASSED] Clock 297000 BPP 24 DSC disabled
[12:14:58] [PASSED] Clock 332880 BPP 24 DSC enabled
[12:14:58] [PASSED] Clock 324540 BPP 24 DSC enabled
[12:14:58] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[12:14:58] ============== drm_test_dp_mst_calc_pbn_div ===============
[12:14:58] [PASSED] Link rate 2000000 lane count 4
[12:14:58] [PASSED] Link rate 2000000 lane count 2
[12:14:58] [PASSED] Link rate 2000000 lane count 1
[12:14:58] [PASSED] Link rate 1350000 lane count 4
[12:14:58] [PASSED] Link rate 1350000 lane count 2
[12:14:58] [PASSED] Link rate 1350000 lane count 1
[12:14:58] [PASSED] Link rate 1000000 lane count 4
[12:14:58] [PASSED] Link rate 1000000 lane count 2
[12:14:58] [PASSED] Link rate 1000000 lane count 1
[12:14:58] [PASSED] Link rate 810000 lane count 4
[12:14:58] [PASSED] Link rate 810000 lane count 2
[12:14:58] [PASSED] Link rate 810000 lane count 1
[12:14:58] [PASSED] Link rate 540000 lane count 4
[12:14:58] [PASSED] Link rate 540000 lane count 2
[12:14:58] [PASSED] Link rate 540000 lane count 1
[12:14:58] [PASSED] Link rate 270000 lane count 4
[12:14:58] [PASSED] Link rate 270000 lane count 2
[12:14:58] [PASSED] Link rate 270000 lane count 1
[12:14:58] [PASSED] Link rate 162000 lane count 4
[12:14:58] [PASSED] Link rate 162000 lane count 2
[12:14:58] [PASSED] Link rate 162000 lane count 1
[12:14:58] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[12:14:58] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[12:14:58] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[12:14:58] [PASSED] DP_POWER_UP_PHY with port number
[12:14:58] [PASSED] DP_POWER_DOWN_PHY with port number
[12:14:58] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[12:14:58] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[12:14:58] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[12:14:58] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[12:14:58] [PASSED] DP_QUERY_PAYLOAD with port number
[12:14:58] [PASSED] DP_QUERY_PAYLOAD with VCPI
[12:14:58] [PASSED] DP_REMOTE_DPCD_READ with port number
[12:14:58] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[12:14:58] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[12:14:58] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[12:14:58] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[12:14:58] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[12:14:58] [PASSED] DP_REMOTE_I2C_READ with port number
[12:14:58] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[12:14:58] [PASSED] DP_REMOTE_I2C_READ with transactions array
[12:14:58] [PASSED] DP_REMOTE_I2C_WRITE with port number
[12:14:58] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[12:14:58] [PASSED] DP_REMOTE_I2C_WRITE with data array
[12:14:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[12:14:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[12:14:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[12:14:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[12:14:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[12:14:58] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[12:14:58] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[12:14:58] ================ [PASSED] drm_dp_mst_helper ================
[12:14:58] ================== drm_exec (7 subtests) ===================
[12:14:58] [PASSED] sanitycheck
[12:14:58] [PASSED] test_lock
[12:14:58] [PASSED] test_lock_unlock
[12:14:58] [PASSED] test_duplicates
[12:14:58] [PASSED] test_prepare
[12:14:58] [PASSED] test_prepare_array
[12:14:58] [PASSED] test_multiple_loops
[12:14:58] ==================== [PASSED] drm_exec =====================
[12:14:58] =========== drm_format_helper_test (17 subtests) ===========
[12:14:58] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[12:14:58] [PASSED] single_pixel_source_buffer
[12:14:58] [PASSED] single_pixel_clip_rectangle
[12:14:58] [PASSED] well_known_colors
[12:14:58] [PASSED] destination_pitch
[12:14:58] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[12:14:58] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[12:14:58] [PASSED] single_pixel_source_buffer
[12:14:58] [PASSED] single_pixel_clip_rectangle
[12:14:58] [PASSED] well_known_colors
[12:14:58] [PASSED] destination_pitch
[12:14:58] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[12:14:58] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[12:14:58] [PASSED] single_pixel_source_buffer
[12:14:58] [PASSED] single_pixel_clip_rectangle
[12:14:58] [PASSED] well_known_colors
[12:14:58] [PASSED] destination_pitch
[12:14:58] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[12:14:58] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[12:14:58] [PASSED] single_pixel_source_buffer
[12:14:58] [PASSED] single_pixel_clip_rectangle
[12:14:58] [PASSED] well_known_colors
[12:14:58] [PASSED] destination_pitch
[12:14:58] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[12:14:58] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[12:14:58] [PASSED] single_pixel_source_buffer
[12:14:58] [PASSED] single_pixel_clip_rectangle
[12:14:58] [PASSED] well_known_colors
[12:14:58] [PASSED] destination_pitch
[12:14:58] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[12:14:58] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[12:14:58] [PASSED] single_pixel_source_buffer
[12:14:58] [PASSED] single_pixel_clip_rectangle
[12:14:58] [PASSED] well_known_colors
[12:14:58] [PASSED] destination_pitch
[12:14:58] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[12:14:58] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[12:14:58] [PASSED] single_pixel_source_buffer
[12:14:58] [PASSED] single_pixel_clip_rectangle
[12:14:58] [PASSED] well_known_colors
[12:14:58] [PASSED] destination_pitch
[12:14:58] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[12:14:58] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[12:14:58] [PASSED] single_pixel_source_buffer
[12:14:58] [PASSED] single_pixel_clip_rectangle
[12:14:58] [PASSED] well_known_colors
[12:14:58] [PASSED] destination_pitch
[12:14:58] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[12:14:58] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[12:14:58] [PASSED] single_pixel_source_buffer
[12:14:58] [PASSED] single_pixel_clip_rectangle
[12:14:58] [PASSED] well_known_colors
[12:14:58] [PASSED] destination_pitch
[12:14:58] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[12:14:58] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[12:14:58] [PASSED] single_pixel_source_buffer
[12:14:58] [PASSED] single_pixel_clip_rectangle
[12:14:58] [PASSED] well_known_colors
[12:14:58] [PASSED] destination_pitch
[12:14:58] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[12:14:58] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[12:14:58] [PASSED] single_pixel_source_buffer
[12:14:58] [PASSED] single_pixel_clip_rectangle
[12:14:58] [PASSED] well_known_colors
[12:14:58] [PASSED] destination_pitch
[12:14:58] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[12:14:58] ============== drm_test_fb_xrgb8888_to_mono ===============
[12:14:58] [PASSED] single_pixel_source_buffer
[12:14:58] [PASSED] single_pixel_clip_rectangle
[12:14:58] [PASSED] well_known_colors
[12:14:58] [PASSED] destination_pitch
[12:14:58] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[12:14:58] ==================== drm_test_fb_swab =====================
[12:14:58] [PASSED] single_pixel_source_buffer
[12:14:58] [PASSED] single_pixel_clip_rectangle
[12:14:58] [PASSED] well_known_colors
[12:14:58] [PASSED] destination_pitch
[12:14:58] ================ [PASSED] drm_test_fb_swab =================
[12:14:58] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[12:14:58] [PASSED] single_pixel_source_buffer
[12:14:58] [PASSED] single_pixel_clip_rectangle
[12:14:58] [PASSED] well_known_colors
[12:14:58] [PASSED] destination_pitch
[12:14:58] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[12:14:58] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[12:14:58] [PASSED] single_pixel_source_buffer
[12:14:58] [PASSED] single_pixel_clip_rectangle
[12:14:58] [PASSED] well_known_colors
[12:14:58] [PASSED] destination_pitch
[12:14:58] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[12:14:58] ================= drm_test_fb_clip_offset =================
[12:14:58] [PASSED] pass through
[12:14:58] [PASSED] horizontal offset
[12:14:58] [PASSED] vertical offset
[12:14:58] [PASSED] horizontal and vertical offset
[12:14:58] [PASSED] horizontal offset (custom pitch)
[12:14:58] [PASSED] vertical offset (custom pitch)
[12:14:58] [PASSED] horizontal and vertical offset (custom pitch)
[12:14:58] ============= [PASSED] drm_test_fb_clip_offset =============
[12:14:58] =================== drm_test_fb_memcpy ====================
[12:14:58] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[12:14:58] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[12:14:58] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[12:14:58] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[12:14:58] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[12:14:58] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[12:14:58] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[12:14:58] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[12:14:58] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[12:14:58] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[12:14:58] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[12:14:58] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[12:14:58] =============== [PASSED] drm_test_fb_memcpy ================
[12:14:58] ============= [PASSED] drm_format_helper_test ==============
[12:14:58] ================= drm_format (18 subtests) =================
[12:14:58] [PASSED] drm_test_format_block_width_invalid
[12:14:58] [PASSED] drm_test_format_block_width_one_plane
[12:14:58] [PASSED] drm_test_format_block_width_two_plane
[12:14:58] [PASSED] drm_test_format_block_width_three_plane
[12:14:58] [PASSED] drm_test_format_block_width_tiled
[12:14:58] [PASSED] drm_test_format_block_height_invalid
[12:14:58] [PASSED] drm_test_format_block_height_one_plane
[12:14:58] [PASSED] drm_test_format_block_height_two_plane
[12:14:58] [PASSED] drm_test_format_block_height_three_plane
[12:14:58] [PASSED] drm_test_format_block_height_tiled
[12:14:58] [PASSED] drm_test_format_min_pitch_invalid
[12:14:58] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[12:14:58] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[12:14:58] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[12:14:58] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[12:14:58] [PASSED] drm_test_format_min_pitch_two_plane
[12:14:58] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[12:14:58] [PASSED] drm_test_format_min_pitch_tiled
[12:14:58] =================== [PASSED] drm_format ====================
[12:14:58] ============== drm_framebuffer (10 subtests) ===============
[12:14:58] ========== drm_test_framebuffer_check_src_coords ==========
[12:14:58] [PASSED] Success: source fits into fb
[12:14:58] [PASSED] Fail: overflowing fb with x-axis coordinate
[12:14:58] [PASSED] Fail: overflowing fb with y-axis coordinate
[12:14:58] [PASSED] Fail: overflowing fb with source width
[12:14:58] [PASSED] Fail: overflowing fb with source height
[12:14:58] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[12:14:58] [PASSED] drm_test_framebuffer_cleanup
[12:14:58] =============== drm_test_framebuffer_create ===============
[12:14:58] [PASSED] ABGR8888 normal sizes
[12:14:58] [PASSED] ABGR8888 max sizes
[12:14:58] [PASSED] ABGR8888 pitch greater than min required
[12:14:58] [PASSED] ABGR8888 pitch less than min required
[12:14:58] [PASSED] ABGR8888 Invalid width
[12:14:58] [PASSED] ABGR8888 Invalid buffer handle
[12:14:58] [PASSED] No pixel format
[12:14:58] [PASSED] ABGR8888 Width 0
[12:14:58] [PASSED] ABGR8888 Height 0
[12:14:58] [PASSED] ABGR8888 Out of bound height * pitch combination
[12:14:58] [PASSED] ABGR8888 Large buffer offset
[12:14:58] [PASSED] ABGR8888 Buffer offset for inexistent plane
[12:14:58] [PASSED] ABGR8888 Invalid flag
[12:14:58] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[12:14:58] [PASSED] ABGR8888 Valid buffer modifier
[12:14:58] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[12:14:58] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[12:14:58] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[12:14:58] [PASSED] NV12 Normal sizes
[12:14:58] [PASSED] NV12 Max sizes
[12:14:58] [PASSED] NV12 Invalid pitch
[12:14:58] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[12:14:58] [PASSED] NV12 different modifier per-plane
[12:14:58] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[12:14:58] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[12:14:58] [PASSED] NV12 Modifier for inexistent plane
[12:14:58] [PASSED] NV12 Handle for inexistent plane
[12:14:58] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[12:14:58] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[12:14:58] [PASSED] YVU420 Normal sizes
[12:14:58] [PASSED] YVU420 Max sizes
[12:14:58] [PASSED] YVU420 Invalid pitch
[12:14:58] [PASSED] YVU420 Different pitches
[12:14:58] [PASSED] YVU420 Different buffer offsets/pitches
[12:14:58] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[12:14:58] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[12:14:58] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[12:14:58] [PASSED] YVU420 Valid modifier
[12:14:58] [PASSED] YVU420 Different modifiers per plane
[12:14:58] [PASSED] YVU420 Modifier for inexistent plane
[12:14:58] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[12:14:58] [PASSED] X0L2 Normal sizes
[12:14:58] [PASSED] X0L2 Max sizes
[12:14:58] [PASSED] X0L2 Invalid pitch
[12:14:58] [PASSED] X0L2 Pitch greater than minimum required
[12:14:58] [PASSED] X0L2 Handle for inexistent plane
[12:14:58] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[12:14:58] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[12:14:58] [PASSED] X0L2 Valid modifier
[12:14:58] [PASSED] X0L2 Modifier for inexistent plane
[12:14:58] =========== [PASSED] drm_test_framebuffer_create ===========
[12:14:58] [PASSED] drm_test_framebuffer_free
[12:14:58] [PASSED] drm_test_framebuffer_init
[12:14:58] [PASSED] drm_test_framebuffer_init_bad_format
[12:14:58] [PASSED] drm_test_framebuffer_init_dev_mismatch
[12:14:58] [PASSED] drm_test_framebuffer_lookup
[12:14:58] [PASSED] drm_test_framebuffer_lookup_inexistent
[12:14:58] [PASSED] drm_test_framebuffer_modifiers_not_supported
[12:14:58] ================= [PASSED] drm_framebuffer =================
[12:14:58] ================ drm_gem_shmem (8 subtests) ================
[12:14:58] [PASSED] drm_gem_shmem_test_obj_create
[12:14:58] [PASSED] drm_gem_shmem_test_obj_create_private
[12:14:58] [PASSED] drm_gem_shmem_test_pin_pages
[12:14:58] [PASSED] drm_gem_shmem_test_vmap
[12:14:58] [PASSED] drm_gem_shmem_test_get_sg_table
[12:14:58] [PASSED] drm_gem_shmem_test_get_pages_sgt
[12:14:58] [PASSED] drm_gem_shmem_test_madvise
[12:14:58] [PASSED] drm_gem_shmem_test_purge
[12:14:58] ================== [PASSED] drm_gem_shmem ==================
[12:14:58] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[12:14:58] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[12:14:58] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[12:14:58] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[12:14:58] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[12:14:58] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[12:14:58] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[12:14:58] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[12:14:58] [PASSED] Automatic
[12:14:58] [PASSED] Full
[12:14:58] [PASSED] Limited 16:235
[12:14:58] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[12:14:58] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[12:14:58] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[12:14:58] [PASSED] drm_test_check_disable_connector
[12:14:58] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[12:14:58] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[12:14:58] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[12:14:58] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[12:14:58] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[12:14:58] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[12:14:58] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[12:14:58] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[12:14:58] [PASSED] drm_test_check_output_bpc_dvi
[12:14:58] [PASSED] drm_test_check_output_bpc_format_vic_1
[12:14:58] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[12:14:58] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[12:14:58] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[12:14:58] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[12:14:58] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[12:14:58] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[12:14:58] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[12:14:58] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[12:14:58] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[12:14:58] [PASSED] drm_test_check_broadcast_rgb_value
[12:14:58] [PASSED] drm_test_check_bpc_8_value
[12:14:58] [PASSED] drm_test_check_bpc_10_value
[12:14:58] [PASSED] drm_test_check_bpc_12_value
[12:14:58] [PASSED] drm_test_check_format_value
[12:14:58] [PASSED] drm_test_check_tmds_char_value
[12:14:58] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[12:14:58] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[12:14:58] [PASSED] drm_test_check_mode_valid
[12:14:58] [PASSED] drm_test_check_mode_valid_reject
[12:14:58] [PASSED] drm_test_check_mode_valid_reject_rate
[12:14:58] [PASSED] drm_test_check_mode_valid_reject_max_clock
[12:14:58] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[12:14:58] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[12:14:58] [PASSED] drm_test_check_infoframes
[12:14:58] [PASSED] drm_test_check_reject_avi_infoframe
[12:14:58] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[12:14:58] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[12:14:58] [PASSED] drm_test_check_reject_audio_infoframe
[12:14:58] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[12:14:58] ================= drm_managed (2 subtests) =================
[12:14:58] [PASSED] drm_test_managed_release_action
[12:14:58] [PASSED] drm_test_managed_run_action
[12:14:58] =================== [PASSED] drm_managed ===================
[12:14:58] =================== drm_mm (6 subtests) ====================
[12:14:58] [PASSED] drm_test_mm_init
[12:14:58] [PASSED] drm_test_mm_debug
[12:14:58] [PASSED] drm_test_mm_align32
[12:14:58] [PASSED] drm_test_mm_align64
[12:14:58] [PASSED] drm_test_mm_lowest
[12:14:58] [PASSED] drm_test_mm_highest
[12:14:58] ===================== [PASSED] drm_mm ======================
[12:14:58] ============= drm_modes_analog_tv (5 subtests) =============
[12:14:58] [PASSED] drm_test_modes_analog_tv_mono_576i
[12:14:58] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[12:14:58] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[12:14:58] [PASSED] drm_test_modes_analog_tv_pal_576i
[12:14:58] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[12:14:58] =============== [PASSED] drm_modes_analog_tv ===============
[12:14:58] ============== drm_plane_helper (2 subtests) ===============
[12:14:58] =============== drm_test_check_plane_state ================
[12:14:58] [PASSED] clipping_simple
[12:14:58] [PASSED] clipping_rotate_reflect
[12:14:58] [PASSED] positioning_simple
[12:14:58] [PASSED] upscaling
[12:14:58] [PASSED] downscaling
[12:14:58] [PASSED] rounding1
[12:14:58] [PASSED] rounding2
[12:14:58] [PASSED] rounding3
[12:14:58] [PASSED] rounding4
[12:14:58] =========== [PASSED] drm_test_check_plane_state ============
[12:14:58] =========== drm_test_check_invalid_plane_state ============
[12:14:58] [PASSED] positioning_invalid
[12:14:58] [PASSED] upscaling_invalid
[12:14:58] [PASSED] downscaling_invalid
[12:14:58] ======= [PASSED] drm_test_check_invalid_plane_state ========
[12:14:58] ================ [PASSED] drm_plane_helper =================
[12:14:58] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[12:14:58] ====== drm_test_connector_helper_tv_get_modes_check =======
[12:14:58] [PASSED] None
[12:14:58] [PASSED] PAL
[12:14:58] [PASSED] NTSC
[12:14:58] [PASSED] Both, NTSC Default
[12:14:58] [PASSED] Both, PAL Default
[12:14:58] [PASSED] Both, NTSC Default, with PAL on command-line
[12:14:58] [PASSED] Both, PAL Default, with NTSC on command-line
[12:14:58] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[12:14:58] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[12:14:58] ================== drm_rect (9 subtests) ===================
[12:14:58] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[12:14:58] [PASSED] drm_test_rect_clip_scaled_not_clipped
[12:14:58] [PASSED] drm_test_rect_clip_scaled_clipped
[12:14:58] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[12:14:58] ================= drm_test_rect_intersect =================
[12:14:58] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[12:14:58] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[12:14:58] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[12:14:58] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[12:14:58] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[12:14:58] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[12:14:58] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[12:14:58] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[12:14:58] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[12:14:58] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[12:14:58] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[12:14:58] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[12:14:58] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[12:14:58] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[12:14:58] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[12:14:58] ============= [PASSED] drm_test_rect_intersect =============
[12:14:58] ================ drm_test_rect_calc_hscale ================
[12:14:58] [PASSED] normal use
[12:14:58] [PASSED] out of max range
[12:14:58] [PASSED] out of min range
[12:14:58] [PASSED] zero dst
[12:14:58] [PASSED] negative src
[12:14:58] [PASSED] negative dst
[12:14:58] ============ [PASSED] drm_test_rect_calc_hscale ============
[12:14:58] ================ drm_test_rect_calc_vscale ================
[12:14:58] [PASSED] normal use
[12:14:58] [PASSED] out of max range
[12:14:58] [PASSED] out of min range
[12:14:58] [PASSED] zero dst
[12:14:58] [PASSED] negative src
[12:14:58] [PASSED] negative dst
[12:14:58] ============ [PASSED] drm_test_rect_calc_vscale ============
[12:14:58] ================== drm_test_rect_rotate ===================
[12:14:58] [PASSED] reflect-x
[12:14:58] [PASSED] reflect-y
[12:14:58] [PASSED] rotate-0
[12:14:58] [PASSED] rotate-90
[12:14:58] [PASSED] rotate-180
[12:14:58] [PASSED] rotate-270
[12:14:58] ============== [PASSED] drm_test_rect_rotate ===============
[12:14:58] ================ drm_test_rect_rotate_inv =================
[12:14:58] [PASSED] reflect-x
[12:14:58] [PASSED] reflect-y
[12:14:58] [PASSED] rotate-0
[12:14:58] [PASSED] rotate-90
[12:14:58] [PASSED] rotate-180
[12:14:58] [PASSED] rotate-270
[12:14:58] ============ [PASSED] drm_test_rect_rotate_inv =============
[12:14:58] ==================== [PASSED] drm_rect =====================
[12:14:58] ============ drm_sysfb_modeset_test (1 subtest) ============
[12:14:58] ============ drm_test_sysfb_build_fourcc_list =============
[12:14:58] [PASSED] no native formats
[12:14:58] [PASSED] XRGB8888 as native format
[12:14:58] [PASSED] remove duplicates
[12:14:58] [PASSED] convert alpha formats
[12:14:58] [PASSED] random formats
[12:14:58] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[12:14:58] ============= [PASSED] drm_sysfb_modeset_test ==============
[12:14:58] ================== drm_fixp (2 subtests) ===================
[12:14:58] [PASSED] drm_test_int2fixp
[12:14:58] [PASSED] drm_test_sm2fixp
[12:14:58] ==================== [PASSED] drm_fixp =====================
[12:14:58] ============================================================
[12:14:58] Testing complete. Ran 621 tests: passed: 621
[12:14:58] Elapsed time: 26.536s total, 1.766s configuring, 24.642s building, 0.126s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[12:14:58] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:15:00] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:15:10] Starting KUnit Kernel (1/1)...
[12:15:10] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:15:10] ================= ttm_device (5 subtests) ==================
[12:15:10] [PASSED] ttm_device_init_basic
[12:15:10] [PASSED] ttm_device_init_multiple
[12:15:10] [PASSED] ttm_device_fini_basic
[12:15:10] [PASSED] ttm_device_init_no_vma_man
[12:15:10] ================== ttm_device_init_pools ==================
[12:15:10] [PASSED] No DMA allocations, no DMA32 required
[12:15:10] [PASSED] DMA allocations, DMA32 required
[12:15:10] [PASSED] No DMA allocations, DMA32 required
[12:15:10] [PASSED] DMA allocations, no DMA32 required
[12:15:10] ============== [PASSED] ttm_device_init_pools ==============
[12:15:10] =================== [PASSED] ttm_device ====================
[12:15:10] ================== ttm_pool (8 subtests) ===================
[12:15:10] ================== ttm_pool_alloc_basic ===================
[12:15:10] [PASSED] One page
[12:15:10] [PASSED] More than one page
[12:15:10] [PASSED] Above the allocation limit
[12:15:10] [PASSED] One page, with coherent DMA mappings enabled
[12:15:10] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:15:10] ============== [PASSED] ttm_pool_alloc_basic ===============
[12:15:10] ============== ttm_pool_alloc_basic_dma_addr ==============
[12:15:10] [PASSED] One page
[12:15:10] [PASSED] More than one page
[12:15:10] [PASSED] Above the allocation limit
[12:15:10] [PASSED] One page, with coherent DMA mappings enabled
[12:15:10] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:15:10] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[12:15:10] [PASSED] ttm_pool_alloc_order_caching_match
[12:15:10] [PASSED] ttm_pool_alloc_caching_mismatch
[12:15:10] [PASSED] ttm_pool_alloc_order_mismatch
[12:15:10] [PASSED] ttm_pool_free_dma_alloc
[12:15:10] [PASSED] ttm_pool_free_no_dma_alloc
[12:15:10] [PASSED] ttm_pool_fini_basic
[12:15:10] ==================== [PASSED] ttm_pool =====================
[12:15:10] ================ ttm_resource (8 subtests) =================
[12:15:10] ================= ttm_resource_init_basic =================
[12:15:10] [PASSED] Init resource in TTM_PL_SYSTEM
[12:15:10] [PASSED] Init resource in TTM_PL_VRAM
[12:15:10] [PASSED] Init resource in a private placement
[12:15:10] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[12:15:10] ============= [PASSED] ttm_resource_init_basic =============
[12:15:10] [PASSED] ttm_resource_init_pinned
[12:15:10] [PASSED] ttm_resource_fini_basic
[12:15:10] [PASSED] ttm_resource_manager_init_basic
[12:15:10] [PASSED] ttm_resource_manager_usage_basic
[12:15:10] [PASSED] ttm_resource_manager_set_used_basic
[12:15:10] [PASSED] ttm_sys_man_alloc_basic
[12:15:10] [PASSED] ttm_sys_man_free_basic
[12:15:10] ================== [PASSED] ttm_resource ===================
[12:15:10] =================== ttm_tt (15 subtests) ===================
[12:15:10] ==================== ttm_tt_init_basic ====================
[12:15:10] [PASSED] Page-aligned size
[12:15:10] [PASSED] Extra pages requested
[12:15:10] ================ [PASSED] ttm_tt_init_basic ================
[12:15:10] [PASSED] ttm_tt_init_misaligned
[12:15:10] [PASSED] ttm_tt_fini_basic
[12:15:10] [PASSED] ttm_tt_fini_sg
[12:15:10] [PASSED] ttm_tt_fini_shmem
[12:15:10] [PASSED] ttm_tt_create_basic
[12:15:10] [PASSED] ttm_tt_create_invalid_bo_type
[12:15:10] [PASSED] ttm_tt_create_ttm_exists
[12:15:10] [PASSED] ttm_tt_create_failed
[12:15:10] [PASSED] ttm_tt_destroy_basic
[12:15:10] [PASSED] ttm_tt_populate_null_ttm
[12:15:10] [PASSED] ttm_tt_populate_populated_ttm
[12:15:10] [PASSED] ttm_tt_unpopulate_basic
[12:15:10] [PASSED] ttm_tt_unpopulate_empty_ttm
[12:15:10] [PASSED] ttm_tt_swapin_basic
[12:15:10] ===================== [PASSED] ttm_tt ======================
[12:15:10] =================== ttm_bo (14 subtests) ===================
[12:15:10] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[12:15:10] [PASSED] Cannot be interrupted and sleeps
[12:15:10] [PASSED] Cannot be interrupted, locks straight away
[12:15:10] [PASSED] Can be interrupted, sleeps
[12:15:10] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[12:15:10] [PASSED] ttm_bo_reserve_locked_no_sleep
[12:15:10] [PASSED] ttm_bo_reserve_no_wait_ticket
[12:15:10] [PASSED] ttm_bo_reserve_double_resv
[12:15:10] [PASSED] ttm_bo_reserve_interrupted
[12:15:10] [PASSED] ttm_bo_reserve_deadlock
[12:15:10] [PASSED] ttm_bo_unreserve_basic
[12:15:10] [PASSED] ttm_bo_unreserve_pinned
[12:15:10] [PASSED] ttm_bo_unreserve_bulk
[12:15:10] [PASSED] ttm_bo_fini_basic
[12:15:10] [PASSED] ttm_bo_fini_shared_resv
[12:15:10] [PASSED] ttm_bo_pin_basic
[12:15:10] [PASSED] ttm_bo_pin_unpin_resource
[12:15:10] [PASSED] ttm_bo_multiple_pin_one_unpin
[12:15:10] ===================== [PASSED] ttm_bo ======================
[12:15:10] ============== ttm_bo_validate (22 subtests) ===============
[12:15:10] ============== ttm_bo_init_reserved_sys_man ===============
[12:15:10] [PASSED] Buffer object for userspace
[12:15:10] [PASSED] Kernel buffer object
[12:15:10] [PASSED] Shared buffer object
[12:15:10] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[12:15:10] ============== ttm_bo_init_reserved_mock_man ==============
[12:15:10] [PASSED] Buffer object for userspace
[12:15:10] [PASSED] Kernel buffer object
[12:15:10] [PASSED] Shared buffer object
[12:15:10] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[12:15:10] [PASSED] ttm_bo_init_reserved_resv
[12:15:10] ================== ttm_bo_validate_basic ==================
[12:15:10] [PASSED] Buffer object for userspace
[12:15:10] [PASSED] Kernel buffer object
[12:15:10] [PASSED] Shared buffer object
[12:15:10] ============== [PASSED] ttm_bo_validate_basic ==============
[12:15:10] [PASSED] ttm_bo_validate_invalid_placement
[12:15:10] ============= ttm_bo_validate_same_placement ==============
[12:15:10] [PASSED] System manager
[12:15:10] [PASSED] VRAM manager
[12:15:10] ========= [PASSED] ttm_bo_validate_same_placement ==========
[12:15:10] [PASSED] ttm_bo_validate_failed_alloc
[12:15:10] [PASSED] ttm_bo_validate_pinned
[12:15:10] [PASSED] ttm_bo_validate_busy_placement
[12:15:10] ================ ttm_bo_validate_multihop =================
[12:15:10] [PASSED] Buffer object for userspace
[12:15:10] [PASSED] Kernel buffer object
[12:15:10] [PASSED] Shared buffer object
[12:15:10] ============ [PASSED] ttm_bo_validate_multihop =============
[12:15:10] ========== ttm_bo_validate_no_placement_signaled ==========
[12:15:10] [PASSED] Buffer object in system domain, no page vector
[12:15:10] [PASSED] Buffer object in system domain with an existing page vector
[12:15:10] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[12:15:10] ======== ttm_bo_validate_no_placement_not_signaled ========
[12:15:10] [PASSED] Buffer object for userspace
[12:15:10] [PASSED] Kernel buffer object
[12:15:10] [PASSED] Shared buffer object
[12:15:10] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[12:15:10] [PASSED] ttm_bo_validate_move_fence_signaled
[12:15:10] ========= ttm_bo_validate_move_fence_not_signaled =========
[12:15:10] [PASSED] Waits for GPU
[12:15:10] [PASSED] Tries to lock straight away
[12:15:10] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[12:15:10] [PASSED] ttm_bo_validate_swapout
[12:15:10] [PASSED] ttm_bo_validate_happy_evict
[12:15:10] [PASSED] ttm_bo_validate_all_pinned_evict
[12:15:10] [PASSED] ttm_bo_validate_allowed_only_evict
[12:15:10] [PASSED] ttm_bo_validate_deleted_evict
[12:15:10] [PASSED] ttm_bo_validate_busy_domain_evict
[12:15:10] [PASSED] ttm_bo_validate_evict_gutting
[12:15:10] [PASSED] ttm_bo_validate_recrusive_evict
[12:15:10] ================= [PASSED] ttm_bo_validate =================
[12:15:10] ============================================================
[12:15:10] Testing complete. Ran 102 tests: passed: 102
[12:15:10] Elapsed time: 12.049s total, 1.701s configuring, 10.133s building, 0.175s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 20+ messages in thread* ✓ Xe.CI.BAT: success for drm/i915/display: Mask RO bits in gen9_write_dc_state() (rev2)
[not found] <<20260506130321.487414-1-dibin.moolakadan.subrahmanian@intel.com>
` (4 preceding siblings ...)
2026-06-02 12:15 ` ✓ CI.KUnit: success for drm/i915/display: Mask RO bits in gen9_write_dc_state() (rev2) Patchwork
@ 2026-06-02 12:53 ` Patchwork
2026-06-02 21:31 ` ✓ Xe.CI.FULL: " Patchwork
6 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-06-02 12:53 UTC (permalink / raw)
To: Dibin Moolakadan Subrahmanian; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 885 bytes --]
== Series Details ==
Series: drm/i915/display: Mask RO bits in gen9_write_dc_state() (rev2)
URL : https://patchwork.freedesktop.org/series/167642/
State : success
== Summary ==
CI Bug Log - changes from xe-5179-5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a_BAT -> xe-pw-167642v2_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-5179-5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a -> xe-pw-167642v2
IGT_8946: 8946
xe-5179-5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a: 5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a
xe-pw-167642v2: 167642v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v2/index.html
[-- Attachment #2: Type: text/html, Size: 1433 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread* ✓ Xe.CI.FULL: success for drm/i915/display: Mask RO bits in gen9_write_dc_state() (rev2)
[not found] <<20260506130321.487414-1-dibin.moolakadan.subrahmanian@intel.com>
` (5 preceding siblings ...)
2026-06-02 12:53 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-06-02 21:31 ` Patchwork
6 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-06-02 21:31 UTC (permalink / raw)
To: Dibin Moolakadan Subrahmanian; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 7371 bytes --]
== Series Details ==
Series: drm/i915/display: Mask RO bits in gen9_write_dc_state() (rev2)
URL : https://patchwork.freedesktop.org/series/167642/
State : success
== Summary ==
CI Bug Log - changes from xe-5179-5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a_FULL -> xe-pw-167642v2_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-167642v2_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-bmg: [PASS][1] -> [FAIL][2] ([Intel XE#7571])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5179-5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a/shard-bmg-6/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v2/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [PASS][3] -> [SKIP][4] ([Intel XE#1503])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5179-5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a/shard-bmg-7/igt@kms_hdr@invalid-hdr.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v2/shard-bmg-6/igt@kms_hdr@invalid-hdr.html
* igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010:
- shard-bmg: [PASS][5] -> [SKIP][6] ([Intel XE#7922]) +1 other test skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5179-5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a/shard-bmg-7/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v2/shard-bmg-6/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
* igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-bmg: [PASS][7] -> [SKIP][8] ([Intel XE#7915]) +5 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5179-5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a/shard-bmg-10/igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v2/shard-bmg-7/igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f.html
* igt@xe_evict@evict-beng-mixed-many-threads-small:
- shard-bmg: [PASS][9] -> [INCOMPLETE][10] ([Intel XE#6321])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5179-5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a/shard-bmg-5/igt@xe_evict@evict-beng-mixed-many-threads-small.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v2/shard-bmg-7/igt@xe_evict@evict-beng-mixed-many-threads-small.html
* igt@xe_exec_reset@long-spin-sys-reuse-many-preempt-threads:
- shard-bmg: [PASS][11] -> [FAIL][12] ([Intel XE#7850])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5179-5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a/shard-bmg-9/igt@xe_exec_reset@long-spin-sys-reuse-many-preempt-threads.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v2/shard-bmg-4/igt@xe_exec_reset@long-spin-sys-reuse-many-preempt-threads.html
* igt@xe_wedged@wedged-mode-toggle:
- shard-bmg: [PASS][13] -> [ABORT][14] ([Intel XE#8007])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5179-5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a/shard-bmg-4/igt@xe_wedged@wedged-mode-toggle.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v2/shard-bmg-8/igt@xe_wedged@wedged-mode-toggle.html
#### Possible fixes ####
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [FAIL][15] ([Intel XE#301]) -> [PASS][16] +1 other test pass
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5179-5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v2/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-bmg: [SKIP][17] ([Intel XE#7915]) -> [PASS][18] +3 other tests pass
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5179-5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a/shard-bmg-7/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v2/shard-bmg-6/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
#### Warnings ####
* igt@kms_chamelium_audio@dp-audio:
- shard-lnl: [SKIP][19] ([Intel XE#373]) -> [ABORT][20] ([Intel XE#8007])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5179-5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a/shard-lnl-7/igt@kms_chamelium_audio@dp-audio.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v2/shard-lnl-6/igt@kms_chamelium_audio@dp-audio.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [FAIL][21] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][22] ([Intel XE#2426] / [Intel XE#5848])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5179-5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a/shard-bmg-10/igt@kms_tiled_display@basic-test-pattern.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v2/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][23] ([Intel XE#2426] / [Intel XE#5848]) -> [SKIP][24] ([Intel XE#2509] / [Intel XE#7437])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5179-5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a/shard-bmg-9/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v2/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7571
[Intel XE#7850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7850
[Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
[Intel XE#7922]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7922
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
Build changes
-------------
* Linux: xe-5179-5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a -> xe-pw-167642v2
IGT_8946: 8946
xe-5179-5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a: 5ffc4d14699b2de05ebbaa8d838f83dcf5da2b6a
xe-pw-167642v2: 167642v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167642v2/index.html
[-- Attachment #2: Type: text/html, Size: 8459 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread
* ✓ CI.KUnit: success for drm/i915/display: Use rmw in gen9_write_dc_state() to preserve non-DC bits
2026-05-06 13:03 [PATCH] drm/i915/display: Use rmw in gen9_write_dc_state() to preserve non-DC bits Dibin Moolakadan Subrahmanian
@ 2026-05-06 13:10 ` Patchwork
2026-05-06 13:35 ` [PATCH] " Imre Deak
1 sibling, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-05-06 13:10 UTC (permalink / raw)
To: Dibin Moolakadan Subrahmanian; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: Use rmw in gen9_write_dc_state() to preserve non-DC bits
URL : https://patchwork.freedesktop.org/series/166053/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[13:09:09] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:09:13] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:09:45] Starting KUnit Kernel (1/1)...
[13:09:45] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:09:45] ================== guc_buf (11 subtests) ===================
[13:09:45] [PASSED] test_smallest
[13:09:45] [PASSED] test_largest
[13:09:45] [PASSED] test_granular
[13:09:45] [PASSED] test_unique
[13:09:45] [PASSED] test_overlap
[13:09:45] [PASSED] test_reusable
[13:09:45] [PASSED] test_too_big
[13:09:45] [PASSED] test_flush
[13:09:45] [PASSED] test_lookup
[13:09:45] [PASSED] test_data
[13:09:45] [PASSED] test_class
[13:09:45] ===================== [PASSED] guc_buf =====================
[13:09:45] =================== guc_dbm (7 subtests) ===================
[13:09:45] [PASSED] test_empty
[13:09:45] [PASSED] test_default
[13:09:45] ======================== test_size ========================
[13:09:45] [PASSED] 4
[13:09:45] [PASSED] 8
[13:09:45] [PASSED] 32
[13:09:45] [PASSED] 256
[13:09:45] ==================== [PASSED] test_size ====================
[13:09:45] ======================= test_reuse ========================
[13:09:45] [PASSED] 4
[13:09:45] [PASSED] 8
[13:09:45] [PASSED] 32
[13:09:45] [PASSED] 256
[13:09:45] =================== [PASSED] test_reuse ====================
[13:09:45] =================== test_range_overlap ====================
[13:09:45] [PASSED] 4
[13:09:45] [PASSED] 8
[13:09:45] [PASSED] 32
[13:09:45] [PASSED] 256
[13:09:45] =============== [PASSED] test_range_overlap ================
[13:09:45] =================== test_range_compact ====================
[13:09:45] [PASSED] 4
[13:09:45] [PASSED] 8
[13:09:45] [PASSED] 32
[13:09:45] [PASSED] 256
[13:09:45] =============== [PASSED] test_range_compact ================
[13:09:45] ==================== test_range_spare =====================
[13:09:45] [PASSED] 4
[13:09:45] [PASSED] 8
[13:09:45] [PASSED] 32
[13:09:45] [PASSED] 256
[13:09:45] ================ [PASSED] test_range_spare =================
[13:09:45] ===================== [PASSED] guc_dbm =====================
[13:09:45] =================== guc_idm (6 subtests) ===================
[13:09:45] [PASSED] bad_init
[13:09:45] [PASSED] no_init
[13:09:45] [PASSED] init_fini
[13:09:45] [PASSED] check_used
[13:09:45] [PASSED] check_quota
[13:09:45] [PASSED] check_all
[13:09:45] ===================== [PASSED] guc_idm =====================
[13:09:45] ================== no_relay (3 subtests) ===================
[13:09:45] [PASSED] xe_drops_guc2pf_if_not_ready
[13:09:45] [PASSED] xe_drops_guc2vf_if_not_ready
[13:09:45] [PASSED] xe_rejects_send_if_not_ready
[13:09:45] ==================== [PASSED] no_relay =====================
[13:09:45] ================== pf_relay (14 subtests) ==================
[13:09:45] [PASSED] pf_rejects_guc2pf_too_short
[13:09:45] [PASSED] pf_rejects_guc2pf_too_long
[13:09:45] [PASSED] pf_rejects_guc2pf_no_payload
[13:09:45] [PASSED] pf_fails_no_payload
[13:09:45] [PASSED] pf_fails_bad_origin
[13:09:45] [PASSED] pf_fails_bad_type
[13:09:45] [PASSED] pf_txn_reports_error
[13:09:45] [PASSED] pf_txn_sends_pf2guc
[13:09:45] [PASSED] pf_sends_pf2guc
[13:09:45] [SKIPPED] pf_loopback_nop
[13:09:45] [SKIPPED] pf_loopback_echo
[13:09:45] [SKIPPED] pf_loopback_fail
[13:09:45] [SKIPPED] pf_loopback_busy
[13:09:45] [SKIPPED] pf_loopback_retry
[13:09:45] ==================== [PASSED] pf_relay =====================
[13:09:45] ================== vf_relay (3 subtests) ===================
[13:09:45] [PASSED] vf_rejects_guc2vf_too_short
[13:09:45] [PASSED] vf_rejects_guc2vf_too_long
[13:09:45] [PASSED] vf_rejects_guc2vf_no_payload
[13:09:45] ==================== [PASSED] vf_relay =====================
[13:09:45] ================ pf_gt_config (9 subtests) =================
[13:09:45] [PASSED] fair_contexts_1vf
[13:09:45] [PASSED] fair_doorbells_1vf
[13:09:45] [PASSED] fair_ggtt_1vf
[13:09:45] ====================== fair_vram_1vf ======================
[13:09:45] [PASSED] 3.50 GiB
[13:09:45] [PASSED] 11.5 GiB
[13:09:45] [PASSED] 15.5 GiB
[13:09:45] [PASSED] 31.5 GiB
[13:09:45] [PASSED] 63.5 GiB
[13:09:45] [PASSED] 1.91 GiB
[13:09:45] ================== [PASSED] fair_vram_1vf ==================
[13:09:45] ================ fair_vram_1vf_admin_only =================
[13:09:45] [PASSED] 3.50 GiB
[13:09:45] [PASSED] 11.5 GiB
[13:09:45] [PASSED] 15.5 GiB
[13:09:45] [PASSED] 31.5 GiB
[13:09:45] [PASSED] 63.5 GiB
[13:09:45] [PASSED] 1.91 GiB
[13:09:45] ============ [PASSED] fair_vram_1vf_admin_only =============
[13:09:45] ====================== fair_contexts ======================
[13:09:45] [PASSED] 1 VF
[13:09:45] [PASSED] 2 VFs
[13:09:45] [PASSED] 3 VFs
[13:09:45] [PASSED] 4 VFs
[13:09:45] [PASSED] 5 VFs
[13:09:45] [PASSED] 6 VFs
[13:09:45] [PASSED] 7 VFs
[13:09:45] [PASSED] 8 VFs
[13:09:45] [PASSED] 9 VFs
[13:09:45] [PASSED] 10 VFs
[13:09:45] [PASSED] 11 VFs
[13:09:45] [PASSED] 12 VFs
[13:09:45] [PASSED] 13 VFs
[13:09:45] [PASSED] 14 VFs
[13:09:45] [PASSED] 15 VFs
[13:09:45] [PASSED] 16 VFs
[13:09:45] [PASSED] 17 VFs
[13:09:45] [PASSED] 18 VFs
[13:09:45] [PASSED] 19 VFs
[13:09:45] [PASSED] 20 VFs
[13:09:45] [PASSED] 21 VFs
[13:09:45] [PASSED] 22 VFs
[13:09:45] [PASSED] 23 VFs
[13:09:45] [PASSED] 24 VFs
[13:09:45] [PASSED] 25 VFs
[13:09:45] [PASSED] 26 VFs
[13:09:45] [PASSED] 27 VFs
[13:09:45] [PASSED] 28 VFs
[13:09:45] [PASSED] 29 VFs
[13:09:45] [PASSED] 30 VFs
[13:09:45] [PASSED] 31 VFs
[13:09:45] [PASSED] 32 VFs
[13:09:45] [PASSED] 33 VFs
[13:09:45] [PASSED] 34 VFs
[13:09:45] [PASSED] 35 VFs
[13:09:45] [PASSED] 36 VFs
[13:09:45] [PASSED] 37 VFs
[13:09:45] [PASSED] 38 VFs
[13:09:45] [PASSED] 39 VFs
[13:09:45] [PASSED] 40 VFs
[13:09:45] [PASSED] 41 VFs
[13:09:45] [PASSED] 42 VFs
[13:09:45] [PASSED] 43 VFs
[13:09:45] [PASSED] 44 VFs
[13:09:45] [PASSED] 45 VFs
[13:09:45] [PASSED] 46 VFs
[13:09:45] [PASSED] 47 VFs
[13:09:45] [PASSED] 48 VFs
[13:09:45] [PASSED] 49 VFs
[13:09:45] [PASSED] 50 VFs
[13:09:45] [PASSED] 51 VFs
[13:09:45] [PASSED] 52 VFs
[13:09:45] [PASSED] 53 VFs
[13:09:45] [PASSED] 54 VFs
[13:09:45] [PASSED] 55 VFs
[13:09:45] [PASSED] 56 VFs
[13:09:45] [PASSED] 57 VFs
[13:09:45] [PASSED] 58 VFs
[13:09:45] [PASSED] 59 VFs
[13:09:45] [PASSED] 60 VFs
[13:09:45] [PASSED] 61 VFs
[13:09:45] [PASSED] 62 VFs
[13:09:45] [PASSED] 63 VFs
[13:09:45] ================== [PASSED] fair_contexts ==================
[13:09:45] ===================== fair_doorbells ======================
[13:09:45] [PASSED] 1 VF
[13:09:45] [PASSED] 2 VFs
[13:09:45] [PASSED] 3 VFs
[13:09:45] [PASSED] 4 VFs
[13:09:45] [PASSED] 5 VFs
[13:09:45] [PASSED] 6 VFs
[13:09:45] [PASSED] 7 VFs
[13:09:45] [PASSED] 8 VFs
[13:09:45] [PASSED] 9 VFs
[13:09:45] [PASSED] 10 VFs
[13:09:45] [PASSED] 11 VFs
[13:09:45] [PASSED] 12 VFs
[13:09:45] [PASSED] 13 VFs
[13:09:45] [PASSED] 14 VFs
[13:09:45] [PASSED] 15 VFs
[13:09:45] [PASSED] 16 VFs
[13:09:45] [PASSED] 17 VFs
[13:09:45] [PASSED] 18 VFs
[13:09:45] [PASSED] 19 VFs
[13:09:45] [PASSED] 20 VFs
[13:09:45] [PASSED] 21 VFs
[13:09:45] [PASSED] 22 VFs
[13:09:45] [PASSED] 23 VFs
[13:09:45] [PASSED] 24 VFs
[13:09:45] [PASSED] 25 VFs
[13:09:45] [PASSED] 26 VFs
[13:09:45] [PASSED] 27 VFs
[13:09:45] [PASSED] 28 VFs
[13:09:45] [PASSED] 29 VFs
[13:09:45] [PASSED] 30 VFs
[13:09:45] [PASSED] 31 VFs
[13:09:45] [PASSED] 32 VFs
[13:09:45] [PASSED] 33 VFs
[13:09:45] [PASSED] 34 VFs
[13:09:45] [PASSED] 35 VFs
[13:09:45] [PASSED] 36 VFs
[13:09:45] [PASSED] 37 VFs
[13:09:45] [PASSED] 38 VFs
[13:09:45] [PASSED] 39 VFs
[13:09:45] [PASSED] 40 VFs
[13:09:45] [PASSED] 41 VFs
[13:09:45] [PASSED] 42 VFs
[13:09:45] [PASSED] 43 VFs
[13:09:45] [PASSED] 44 VFs
[13:09:45] [PASSED] 45 VFs
[13:09:45] [PASSED] 46 VFs
[13:09:45] [PASSED] 47 VFs
[13:09:45] [PASSED] 48 VFs
[13:09:45] [PASSED] 49 VFs
[13:09:45] [PASSED] 50 VFs
[13:09:45] [PASSED] 51 VFs
[13:09:45] [PASSED] 52 VFs
[13:09:45] [PASSED] 53 VFs
[13:09:45] [PASSED] 54 VFs
[13:09:45] [PASSED] 55 VFs
[13:09:45] [PASSED] 56 VFs
[13:09:45] [PASSED] 57 VFs
[13:09:45] [PASSED] 58 VFs
[13:09:45] [PASSED] 59 VFs
[13:09:45] [PASSED] 60 VFs
[13:09:45] [PASSED] 61 VFs
[13:09:45] [PASSED] 62 VFs
[13:09:45] [PASSED] 63 VFs
[13:09:45] ================= [PASSED] fair_doorbells ==================
[13:09:45] ======================== fair_ggtt ========================
[13:09:45] [PASSED] 1 VF
[13:09:45] [PASSED] 2 VFs
[13:09:45] [PASSED] 3 VFs
[13:09:45] [PASSED] 4 VFs
[13:09:45] [PASSED] 5 VFs
[13:09:45] [PASSED] 6 VFs
[13:09:45] [PASSED] 7 VFs
[13:09:45] [PASSED] 8 VFs
[13:09:45] [PASSED] 9 VFs
[13:09:45] [PASSED] 10 VFs
[13:09:45] [PASSED] 11 VFs
[13:09:45] [PASSED] 12 VFs
[13:09:45] [PASSED] 13 VFs
[13:09:45] [PASSED] 14 VFs
[13:09:45] [PASSED] 15 VFs
[13:09:45] [PASSED] 16 VFs
[13:09:45] [PASSED] 17 VFs
[13:09:45] [PASSED] 18 VFs
[13:09:45] [PASSED] 19 VFs
[13:09:45] [PASSED] 20 VFs
[13:09:45] [PASSED] 21 VFs
[13:09:45] [PASSED] 22 VFs
[13:09:45] [PASSED] 23 VFs
[13:09:45] [PASSED] 24 VFs
[13:09:45] [PASSED] 25 VFs
[13:09:45] [PASSED] 26 VFs
[13:09:45] [PASSED] 27 VFs
[13:09:45] [PASSED] 28 VFs
[13:09:45] [PASSED] 29 VFs
[13:09:45] [PASSED] 30 VFs
[13:09:45] [PASSED] 31 VFs
[13:09:45] [PASSED] 32 VFs
[13:09:45] [PASSED] 33 VFs
[13:09:45] [PASSED] 34 VFs
[13:09:45] [PASSED] 35 VFs
[13:09:45] [PASSED] 36 VFs
[13:09:45] [PASSED] 37 VFs
[13:09:45] [PASSED] 38 VFs
[13:09:45] [PASSED] 39 VFs
[13:09:45] [PASSED] 40 VFs
[13:09:45] [PASSED] 41 VFs
[13:09:45] [PASSED] 42 VFs
[13:09:45] [PASSED] 43 VFs
[13:09:45] [PASSED] 44 VFs
[13:09:45] [PASSED] 45 VFs
[13:09:45] [PASSED] 46 VFs
[13:09:45] [PASSED] 47 VFs
[13:09:45] [PASSED] 48 VFs
[13:09:45] [PASSED] 49 VFs
[13:09:45] [PASSED] 50 VFs
[13:09:45] [PASSED] 51 VFs
[13:09:45] [PASSED] 52 VFs
[13:09:45] [PASSED] 53 VFs
[13:09:45] [PASSED] 54 VFs
[13:09:45] [PASSED] 55 VFs
[13:09:45] [PASSED] 56 VFs
[13:09:45] [PASSED] 57 VFs
[13:09:45] [PASSED] 58 VFs
[13:09:45] [PASSED] 59 VFs
[13:09:45] [PASSED] 60 VFs
[13:09:45] [PASSED] 61 VFs
[13:09:45] [PASSED] 62 VFs
[13:09:45] [PASSED] 63 VFs
[13:09:45] ==================== [PASSED] fair_ggtt ====================
[13:09:45] ======================== fair_vram ========================
[13:09:45] [PASSED] 1 VF
[13:09:45] [PASSED] 2 VFs
[13:09:45] [PASSED] 3 VFs
[13:09:45] [PASSED] 4 VFs
[13:09:45] [PASSED] 5 VFs
[13:09:45] [PASSED] 6 VFs
[13:09:45] [PASSED] 7 VFs
[13:09:45] [PASSED] 8 VFs
[13:09:45] [PASSED] 9 VFs
[13:09:45] [PASSED] 10 VFs
[13:09:45] [PASSED] 11 VFs
[13:09:45] [PASSED] 12 VFs
[13:09:45] [PASSED] 13 VFs
[13:09:45] [PASSED] 14 VFs
[13:09:45] [PASSED] 15 VFs
[13:09:45] [PASSED] 16 VFs
[13:09:45] [PASSED] 17 VFs
[13:09:45] [PASSED] 18 VFs
[13:09:45] [PASSED] 19 VFs
[13:09:45] [PASSED] 20 VFs
[13:09:45] [PASSED] 21 VFs
[13:09:45] [PASSED] 22 VFs
[13:09:45] [PASSED] 23 VFs
[13:09:45] [PASSED] 24 VFs
[13:09:45] [PASSED] 25 VFs
[13:09:45] [PASSED] 26 VFs
[13:09:45] [PASSED] 27 VFs
[13:09:45] [PASSED] 28 VFs
[13:09:45] [PASSED] 29 VFs
[13:09:45] [PASSED] 30 VFs
[13:09:45] [PASSED] 31 VFs
[13:09:45] [PASSED] 32 VFs
[13:09:45] [PASSED] 33 VFs
[13:09:45] [PASSED] 34 VFs
[13:09:45] [PASSED] 35 VFs
[13:09:45] [PASSED] 36 VFs
[13:09:45] [PASSED] 37 VFs
[13:09:45] [PASSED] 38 VFs
[13:09:45] [PASSED] 39 VFs
[13:09:45] [PASSED] 40 VFs
[13:09:45] [PASSED] 41 VFs
[13:09:45] [PASSED] 42 VFs
[13:09:45] [PASSED] 43 VFs
[13:09:45] [PASSED] 44 VFs
[13:09:45] [PASSED] 45 VFs
[13:09:45] [PASSED] 46 VFs
[13:09:45] [PASSED] 47 VFs
[13:09:45] [PASSED] 48 VFs
[13:09:45] [PASSED] 49 VFs
[13:09:45] [PASSED] 50 VFs
[13:09:45] [PASSED] 51 VFs
[13:09:45] [PASSED] 52 VFs
[13:09:45] [PASSED] 53 VFs
[13:09:45] [PASSED] 54 VFs
[13:09:45] [PASSED] 55 VFs
[13:09:45] [PASSED] 56 VFs
[13:09:45] [PASSED] 57 VFs
[13:09:45] [PASSED] 58 VFs
[13:09:45] [PASSED] 59 VFs
[13:09:45] [PASSED] 60 VFs
[13:09:45] [PASSED] 61 VFs
[13:09:45] [PASSED] 62 VFs
[13:09:45] [PASSED] 63 VFs
[13:09:45] ==================== [PASSED] fair_vram ====================
[13:09:45] ================== [PASSED] pf_gt_config ===================
[13:09:45] ===================== lmtt (1 subtest) =====================
[13:09:45] ======================== test_ops =========================
[13:09:45] [PASSED] 2-level
[13:09:45] [PASSED] multi-level
[13:09:45] ==================== [PASSED] test_ops =====================
[13:09:45] ====================== [PASSED] lmtt =======================
[13:09:45] ================= pf_service (11 subtests) =================
[13:09:45] [PASSED] pf_negotiate_any
[13:09:45] [PASSED] pf_negotiate_base_match
[13:09:45] [PASSED] pf_negotiate_base_newer
[13:09:45] [PASSED] pf_negotiate_base_next
[13:09:45] [SKIPPED] pf_negotiate_base_older
[13:09:45] [PASSED] pf_negotiate_base_prev
[13:09:45] [PASSED] pf_negotiate_latest_match
[13:09:45] [PASSED] pf_negotiate_latest_newer
[13:09:45] [PASSED] pf_negotiate_latest_next
[13:09:45] [SKIPPED] pf_negotiate_latest_older
[13:09:45] [SKIPPED] pf_negotiate_latest_prev
[13:09:45] =================== [PASSED] pf_service ====================
[13:09:45] ================= xe_guc_g2g (2 subtests) ==================
[13:09:45] ============== xe_live_guc_g2g_kunit_default ==============
[13:09:45] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[13:09:45] ============== xe_live_guc_g2g_kunit_allmem ===============
[13:09:45] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[13:09:45] =================== [SKIPPED] xe_guc_g2g ===================
[13:09:45] =================== xe_mocs (2 subtests) ===================
[13:09:45] ================ xe_live_mocs_kernel_kunit ================
[13:09:45] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[13:09:45] ================ xe_live_mocs_reset_kunit =================
[13:09:45] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[13:09:45] ==================== [SKIPPED] xe_mocs =====================
[13:09:45] ================= xe_migrate (2 subtests) ==================
[13:09:45] ================= xe_migrate_sanity_kunit =================
[13:09:45] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[13:09:45] ================== xe_validate_ccs_kunit ==================
[13:09:45] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[13:09:45] =================== [SKIPPED] xe_migrate ===================
[13:09:45] ================== xe_dma_buf (1 subtest) ==================
[13:09:45] ==================== xe_dma_buf_kunit =====================
[13:09:45] ================ [SKIPPED] xe_dma_buf_kunit ================
[13:09:45] =================== [SKIPPED] xe_dma_buf ===================
[13:09:45] ================= xe_bo_shrink (1 subtest) =================
[13:09:45] =================== xe_bo_shrink_kunit ====================
[13:09:45] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[13:09:45] ================== [SKIPPED] xe_bo_shrink ==================
[13:09:45] ==================== xe_bo (2 subtests) ====================
[13:09:45] ================== xe_ccs_migrate_kunit ===================
[13:09:45] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[13:09:45] ==================== xe_bo_evict_kunit ====================
[13:09:45] =============== [SKIPPED] xe_bo_evict_kunit ================
[13:09:45] ===================== [SKIPPED] xe_bo ======================
[13:09:45] ==================== args (13 subtests) ====================
[13:09:45] [PASSED] count_args_test
[13:09:45] [PASSED] call_args_example
[13:09:45] [PASSED] call_args_test
[13:09:45] [PASSED] drop_first_arg_example
[13:09:45] [PASSED] drop_first_arg_test
[13:09:45] [PASSED] first_arg_example
[13:09:45] [PASSED] first_arg_test
[13:09:45] [PASSED] last_arg_example
[13:09:45] [PASSED] last_arg_test
[13:09:45] [PASSED] pick_arg_example
[13:09:45] [PASSED] if_args_example
[13:09:45] [PASSED] if_args_test
[13:09:45] [PASSED] sep_comma_example
[13:09:45] ====================== [PASSED] args =======================
[13:09:45] =================== xe_pci (3 subtests) ====================
[13:09:45] ==================== check_graphics_ip ====================
[13:09:45] [PASSED] 12.00 Xe_LP
[13:09:45] [PASSED] 12.10 Xe_LP+
[13:09:45] [PASSED] 12.55 Xe_HPG
[13:09:45] [PASSED] 12.60 Xe_HPC
[13:09:45] [PASSED] 12.70 Xe_LPG
[13:09:45] [PASSED] 12.71 Xe_LPG
[13:09:45] [PASSED] 12.74 Xe_LPG+
[13:09:45] [PASSED] 20.01 Xe2_HPG
[13:09:45] [PASSED] 20.02 Xe2_HPG
[13:09:45] [PASSED] 20.04 Xe2_LPG
[13:09:45] [PASSED] 30.00 Xe3_LPG
[13:09:45] [PASSED] 30.01 Xe3_LPG
[13:09:45] [PASSED] 30.03 Xe3_LPG
[13:09:45] [PASSED] 30.04 Xe3_LPG
[13:09:45] [PASSED] 30.05 Xe3_LPG
[13:09:45] [PASSED] 35.10 Xe3p_LPG
[13:09:45] [PASSED] 35.11 Xe3p_XPC
[13:09:45] ================ [PASSED] check_graphics_ip ================
[13:09:45] ===================== check_media_ip ======================
[13:09:45] [PASSED] 12.00 Xe_M
[13:09:45] [PASSED] 12.55 Xe_HPM
[13:09:45] [PASSED] 13.00 Xe_LPM+
[13:09:45] [PASSED] 13.01 Xe2_HPM
[13:09:45] [PASSED] 20.00 Xe2_LPM
[13:09:45] [PASSED] 30.00 Xe3_LPM
[13:09:45] [PASSED] 30.02 Xe3_LPM
[13:09:45] [PASSED] 35.00 Xe3p_LPM
[13:09:45] [PASSED] 35.03 Xe3p_HPM
[13:09:45] ================= [PASSED] check_media_ip ==================
[13:09:45] =================== check_platform_desc ===================
[13:09:45] [PASSED] 0x9A60 (TIGERLAKE)
[13:09:45] [PASSED] 0x9A68 (TIGERLAKE)
[13:09:45] [PASSED] 0x9A70 (TIGERLAKE)
[13:09:45] [PASSED] 0x9A40 (TIGERLAKE)
[13:09:45] [PASSED] 0x9A49 (TIGERLAKE)
[13:09:45] [PASSED] 0x9A59 (TIGERLAKE)
[13:09:45] [PASSED] 0x9A78 (TIGERLAKE)
[13:09:45] [PASSED] 0x9AC0 (TIGERLAKE)
[13:09:45] [PASSED] 0x9AC9 (TIGERLAKE)
[13:09:45] [PASSED] 0x9AD9 (TIGERLAKE)
[13:09:45] [PASSED] 0x9AF8 (TIGERLAKE)
[13:09:45] [PASSED] 0x4C80 (ROCKETLAKE)
[13:09:45] [PASSED] 0x4C8A (ROCKETLAKE)
[13:09:45] [PASSED] 0x4C8B (ROCKETLAKE)
[13:09:45] [PASSED] 0x4C8C (ROCKETLAKE)
[13:09:45] [PASSED] 0x4C90 (ROCKETLAKE)
[13:09:45] [PASSED] 0x4C9A (ROCKETLAKE)
[13:09:45] [PASSED] 0x4680 (ALDERLAKE_S)
[13:09:45] [PASSED] 0x4682 (ALDERLAKE_S)
[13:09:45] [PASSED] 0x4688 (ALDERLAKE_S)
[13:09:45] [PASSED] 0x468A (ALDERLAKE_S)
[13:09:45] [PASSED] 0x468B (ALDERLAKE_S)
[13:09:45] [PASSED] 0x4690 (ALDERLAKE_S)
[13:09:45] [PASSED] 0x4692 (ALDERLAKE_S)
[13:09:45] [PASSED] 0x4693 (ALDERLAKE_S)
[13:09:45] [PASSED] 0x46A0 (ALDERLAKE_P)
[13:09:45] [PASSED] 0x46A1 (ALDERLAKE_P)
[13:09:45] [PASSED] 0x46A2 (ALDERLAKE_P)
[13:09:45] [PASSED] 0x46A3 (ALDERLAKE_P)
[13:09:45] [PASSED] 0x46A6 (ALDERLAKE_P)
[13:09:45] [PASSED] 0x46A8 (ALDERLAKE_P)
[13:09:45] [PASSED] 0x46AA (ALDERLAKE_P)
[13:09:45] [PASSED] 0x462A (ALDERLAKE_P)
[13:09:45] [PASSED] 0x4626 (ALDERLAKE_P)
[13:09:45] [PASSED] 0x4628 (ALDERLAKE_P)
[13:09:45] [PASSED] 0x46B0 (ALDERLAKE_P)
[13:09:45] [PASSED] 0x46B1 (ALDERLAKE_P)
[13:09:45] [PASSED] 0x46B2 (ALDERLAKE_P)
[13:09:45] [PASSED] 0x46B3 (ALDERLAKE_P)
[13:09:45] [PASSED] 0x46C0 (ALDERLAKE_P)
[13:09:45] [PASSED] 0x46C1 (ALDERLAKE_P)
[13:09:45] [PASSED] 0x46C2 (ALDERLAKE_P)
[13:09:45] [PASSED] 0x46C3 (ALDERLAKE_P)
[13:09:45] [PASSED] 0x46D0 (ALDERLAKE_N)
[13:09:45] [PASSED] 0x46D1 (ALDERLAKE_N)
[13:09:45] [PASSED] 0x46D2 (ALDERLAKE_N)
[13:09:45] [PASSED] 0x46D3 (ALDERLAKE_N)
[13:09:45] [PASSED] 0x46D4 (ALDERLAKE_N)
[13:09:45] [PASSED] 0xA721 (ALDERLAKE_P)
[13:09:45] [PASSED] 0xA7A1 (ALDERLAKE_P)
[13:09:45] [PASSED] 0xA7A9 (ALDERLAKE_P)
[13:09:45] [PASSED] 0xA7AC (ALDERLAKE_P)
[13:09:45] [PASSED] 0xA7AD (ALDERLAKE_P)
[13:09:45] [PASSED] 0xA720 (ALDERLAKE_P)
[13:09:45] [PASSED] 0xA7A0 (ALDERLAKE_P)
[13:09:45] [PASSED] 0xA7A8 (ALDERLAKE_P)
[13:09:45] [PASSED] 0xA7AA (ALDERLAKE_P)
[13:09:45] [PASSED] 0xA7AB (ALDERLAKE_P)
[13:09:45] [PASSED] 0xA780 (ALDERLAKE_S)
[13:09:45] [PASSED] 0xA781 (ALDERLAKE_S)
[13:09:45] [PASSED] 0xA782 (ALDERLAKE_S)
[13:09:45] [PASSED] 0xA783 (ALDERLAKE_S)
[13:09:45] [PASSED] 0xA788 (ALDERLAKE_S)
[13:09:45] [PASSED] 0xA789 (ALDERLAKE_S)
[13:09:45] [PASSED] 0xA78A (ALDERLAKE_S)
[13:09:45] [PASSED] 0xA78B (ALDERLAKE_S)
[13:09:45] [PASSED] 0x4905 (DG1)
[13:09:45] [PASSED] 0x4906 (DG1)
[13:09:45] [PASSED] 0x4907 (DG1)
[13:09:45] [PASSED] 0x4908 (DG1)
[13:09:45] [PASSED] 0x4909 (DG1)
[13:09:45] [PASSED] 0x56C0 (DG2)
[13:09:45] [PASSED] 0x56C2 (DG2)
[13:09:45] [PASSED] 0x56C1 (DG2)
[13:09:45] [PASSED] 0x7D51 (METEORLAKE)
[13:09:45] [PASSED] 0x7DD1 (METEORLAKE)
[13:09:45] [PASSED] 0x7D41 (METEORLAKE)
[13:09:45] [PASSED] 0x7D67 (METEORLAKE)
[13:09:45] [PASSED] 0xB640 (METEORLAKE)
[13:09:45] [PASSED] 0x56A0 (DG2)
[13:09:45] [PASSED] 0x56A1 (DG2)
[13:09:45] [PASSED] 0x56A2 (DG2)
[13:09:45] [PASSED] 0x56BE (DG2)
[13:09:45] [PASSED] 0x56BF (DG2)
[13:09:45] [PASSED] 0x5690 (DG2)
[13:09:45] [PASSED] 0x5691 (DG2)
[13:09:45] [PASSED] 0x5692 (DG2)
[13:09:45] [PASSED] 0x56A5 (DG2)
[13:09:45] [PASSED] 0x56A6 (DG2)
[13:09:45] [PASSED] 0x56B0 (DG2)
[13:09:45] [PASSED] 0x56B1 (DG2)
[13:09:45] [PASSED] 0x56BA (DG2)
[13:09:45] [PASSED] 0x56BB (DG2)
[13:09:45] [PASSED] 0x56BC (DG2)
[13:09:45] [PASSED] 0x56BD (DG2)
[13:09:45] [PASSED] 0x5693 (DG2)
[13:09:45] [PASSED] 0x5694 (DG2)
[13:09:45] [PASSED] 0x5695 (DG2)
[13:09:45] [PASSED] 0x56A3 (DG2)
[13:09:45] [PASSED] 0x56A4 (DG2)
[13:09:45] [PASSED] 0x56B2 (DG2)
[13:09:45] [PASSED] 0x56B3 (DG2)
[13:09:45] [PASSED] 0x5696 (DG2)
[13:09:45] [PASSED] 0x5697 (DG2)
[13:09:45] [PASSED] 0xB69 (PVC)
[13:09:45] [PASSED] 0xB6E (PVC)
[13:09:45] [PASSED] 0xBD4 (PVC)
[13:09:45] [PASSED] 0xBD5 (PVC)
[13:09:45] [PASSED] 0xBD6 (PVC)
[13:09:45] [PASSED] 0xBD7 (PVC)
[13:09:45] [PASSED] 0xBD8 (PVC)
[13:09:45] [PASSED] 0xBD9 (PVC)
[13:09:45] [PASSED] 0xBDA (PVC)
[13:09:45] [PASSED] 0xBDB (PVC)
[13:09:45] [PASSED] 0xBE0 (PVC)
[13:09:45] [PASSED] 0xBE1 (PVC)
[13:09:45] [PASSED] 0xBE5 (PVC)
[13:09:45] [PASSED] 0x7D40 (METEORLAKE)
[13:09:45] [PASSED] 0x7D45 (METEORLAKE)
[13:09:45] [PASSED] 0x7D55 (METEORLAKE)
[13:09:45] [PASSED] 0x7D60 (METEORLAKE)
[13:09:45] [PASSED] 0x7DD5 (METEORLAKE)
[13:09:45] [PASSED] 0x6420 (LUNARLAKE)
[13:09:45] [PASSED] 0x64A0 (LUNARLAKE)
[13:09:45] [PASSED] 0x64B0 (LUNARLAKE)
[13:09:45] [PASSED] 0xE202 (BATTLEMAGE)
[13:09:45] [PASSED] 0xE209 (BATTLEMAGE)
[13:09:45] [PASSED] 0xE20B (BATTLEMAGE)
[13:09:45] [PASSED] 0xE20C (BATTLEMAGE)
[13:09:45] [PASSED] 0xE20D (BATTLEMAGE)
[13:09:45] [PASSED] 0xE210 (BATTLEMAGE)
[13:09:45] [PASSED] 0xE211 (BATTLEMAGE)
[13:09:45] [PASSED] 0xE212 (BATTLEMAGE)
[13:09:45] [PASSED] 0xE216 (BATTLEMAGE)
[13:09:45] [PASSED] 0xE220 (BATTLEMAGE)
[13:09:45] [PASSED] 0xE221 (BATTLEMAGE)
[13:09:45] [PASSED] 0xE222 (BATTLEMAGE)
[13:09:45] [PASSED] 0xE223 (BATTLEMAGE)
[13:09:45] [PASSED] 0xB080 (PANTHERLAKE)
[13:09:45] [PASSED] 0xB081 (PANTHERLAKE)
[13:09:45] [PASSED] 0xB082 (PANTHERLAKE)
[13:09:45] [PASSED] 0xB083 (PANTHERLAKE)
[13:09:45] [PASSED] 0xB084 (PANTHERLAKE)
[13:09:45] [PASSED] 0xB085 (PANTHERLAKE)
[13:09:45] [PASSED] 0xB086 (PANTHERLAKE)
[13:09:45] [PASSED] 0xB087 (PANTHERLAKE)
[13:09:45] [PASSED] 0xB08F (PANTHERLAKE)
[13:09:45] [PASSED] 0xB090 (PANTHERLAKE)
[13:09:45] [PASSED] 0xB0A0 (PANTHERLAKE)
[13:09:45] [PASSED] 0xB0B0 (PANTHERLAKE)
[13:09:45] [PASSED] 0xFD80 (PANTHERLAKE)
[13:09:45] [PASSED] 0xFD81 (PANTHERLAKE)
[13:09:45] [PASSED] 0xD740 (NOVALAKE_S)
[13:09:45] [PASSED] 0xD741 (NOVALAKE_S)
[13:09:45] [PASSED] 0xD742 (NOVALAKE_S)
[13:09:45] [PASSED] 0xD743 (NOVALAKE_S)
[13:09:45] [PASSED] 0xD744 (NOVALAKE_S)
[13:09:45] [PASSED] 0xD745 (NOVALAKE_S)
[13:09:45] [PASSED] 0x674C (CRESCENTISLAND)
[13:09:45] [PASSED] 0xD750 (NOVALAKE_P)
[13:09:45] [PASSED] 0xD751 (NOVALAKE_P)
[13:09:45] [PASSED] 0xD752 (NOVALAKE_P)
[13:09:45] [PASSED] 0xD753 (NOVALAKE_P)
[13:09:45] [PASSED] 0xD754 (NOVALAKE_P)
[13:09:45] [PASSED] 0xD755 (NOVALAKE_P)
[13:09:45] [PASSED] 0xD756 (NOVALAKE_P)
[13:09:45] [PASSED] 0xD757 (NOVALAKE_P)
[13:09:45] [PASSED] 0xD75F (NOVALAKE_P)
[13:09:45] =============== [PASSED] check_platform_desc ===============
[13:09:45] ===================== [PASSED] xe_pci ======================
[13:09:45] =================== xe_rtp (2 subtests) ====================
[13:09:45] =============== xe_rtp_process_to_sr_tests ================
[13:09:45] [PASSED] coalesce-same-reg
[13:09:45] [PASSED] no-match-no-add
[13:09:45] [PASSED] match-or
[13:09:45] [PASSED] match-or-xfail
[13:09:45] [PASSED] no-match-no-add-multiple-rules
[13:09:45] [PASSED] two-regs-two-entries
[13:09:45] [PASSED] clr-one-set-other
[13:09:45] [PASSED] set-field
[13:09:45] [PASSED] conflict-duplicate
[13:09:45] [PASSED] conflict-not-disjoint
[13:09:45] [PASSED] conflict-reg-type
[13:09:45] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[13:09:45] ================== xe_rtp_process_tests ===================
[13:09:45] [PASSED] active1
[13:09:45] [PASSED] active2
[13:09:45] [PASSED] active-inactive
[13:09:45] [PASSED] inactive-active
[13:09:45] [PASSED] inactive-1st_or_active-inactive
[13:09:45] [PASSED] inactive-2nd_or_active-inactive
[13:09:45] [PASSED] inactive-last_or_active-inactive
[13:09:45] [PASSED] inactive-no_or_active-inactive
[13:09:45] ============== [PASSED] xe_rtp_process_tests ===============
[13:09:45] ===================== [PASSED] xe_rtp ======================
[13:09:45] ==================== xe_wa (1 subtest) =====================
[13:09:45] ======================== xe_wa_gt =========================
[13:09:45] [PASSED] TIGERLAKE B0
[13:09:45] [PASSED] DG1 A0
[13:09:45] [PASSED] DG1 B0
[13:09:45] [PASSED] ALDERLAKE_S A0
[13:09:45] [PASSED] ALDERLAKE_S B0
[13:09:45] [PASSED] ALDERLAKE_S C0
[13:09:45] [PASSED] ALDERLAKE_S D0
[13:09:45] [PASSED] ALDERLAKE_P A0
[13:09:45] [PASSED] ALDERLAKE_P B0
[13:09:45] [PASSED] ALDERLAKE_P C0
[13:09:45] [PASSED] ALDERLAKE_S RPLS D0
[13:09:45] [PASSED] ALDERLAKE_P RPLU E0
[13:09:45] [PASSED] DG2 G10 C0
[13:09:45] [PASSED] DG2 G11 B1
[13:09:45] [PASSED] DG2 G12 A1
[13:09:45] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[13:09:45] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[13:09:45] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[13:09:45] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[13:09:45] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[13:09:45] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[13:09:45] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[13:09:45] ==================== [PASSED] xe_wa_gt =====================
[13:09:45] ====================== [PASSED] xe_wa ======================
[13:09:45] ============================================================
[13:09:45] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[13:09:45] Elapsed time: 36.043s total, 4.278s configuring, 31.148s building, 0.612s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[13:09:45] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:09:47] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:10:11] Starting KUnit Kernel (1/1)...
[13:10:11] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:10:11] ============ drm_test_pick_cmdline (2 subtests) ============
[13:10:11] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[13:10:11] =============== drm_test_pick_cmdline_named ===============
[13:10:11] [PASSED] NTSC
[13:10:11] [PASSED] NTSC-J
[13:10:11] [PASSED] PAL
[13:10:11] [PASSED] PAL-M
[13:10:11] =========== [PASSED] drm_test_pick_cmdline_named ===========
[13:10:11] ============== [PASSED] drm_test_pick_cmdline ==============
[13:10:11] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[13:10:11] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[13:10:11] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[13:10:11] =========== drm_validate_clone_mode (2 subtests) ===========
[13:10:11] ============== drm_test_check_in_clone_mode ===============
[13:10:11] [PASSED] in_clone_mode
[13:10:11] [PASSED] not_in_clone_mode
[13:10:11] ========== [PASSED] drm_test_check_in_clone_mode ===========
[13:10:11] =============== drm_test_check_valid_clones ===============
[13:10:11] [PASSED] not_in_clone_mode
[13:10:11] [PASSED] valid_clone
[13:10:11] [PASSED] invalid_clone
[13:10:11] =========== [PASSED] drm_test_check_valid_clones ===========
[13:10:11] ============= [PASSED] drm_validate_clone_mode =============
[13:10:11] ============= drm_validate_modeset (1 subtest) =============
[13:10:11] [PASSED] drm_test_check_connector_changed_modeset
[13:10:11] ============== [PASSED] drm_validate_modeset ===============
[13:10:11] ====== drm_test_bridge_get_current_state (2 subtests) ======
[13:10:11] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[13:10:11] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[13:10:11] ======== [PASSED] drm_test_bridge_get_current_state ========
[13:10:11] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[13:10:11] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[13:10:11] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[13:10:11] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[13:10:11] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[13:10:11] ============== drm_bridge_alloc (2 subtests) ===============
[13:10:11] [PASSED] drm_test_drm_bridge_alloc_basic
[13:10:11] [PASSED] drm_test_drm_bridge_alloc_get_put
[13:10:11] ================ [PASSED] drm_bridge_alloc =================
[13:10:11] ============= drm_cmdline_parser (40 subtests) =============
[13:10:11] [PASSED] drm_test_cmdline_force_d_only
[13:10:11] [PASSED] drm_test_cmdline_force_D_only_dvi
[13:10:11] [PASSED] drm_test_cmdline_force_D_only_hdmi
[13:10:11] [PASSED] drm_test_cmdline_force_D_only_not_digital
[13:10:11] [PASSED] drm_test_cmdline_force_e_only
[13:10:11] [PASSED] drm_test_cmdline_res
[13:10:11] [PASSED] drm_test_cmdline_res_vesa
[13:10:11] [PASSED] drm_test_cmdline_res_vesa_rblank
[13:10:11] [PASSED] drm_test_cmdline_res_rblank
[13:10:11] [PASSED] drm_test_cmdline_res_bpp
[13:10:11] [PASSED] drm_test_cmdline_res_refresh
[13:10:11] [PASSED] drm_test_cmdline_res_bpp_refresh
[13:10:11] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[13:10:11] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[13:10:11] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[13:10:11] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[13:10:11] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[13:10:11] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[13:10:11] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[13:10:11] [PASSED] drm_test_cmdline_res_margins_force_on
[13:10:11] [PASSED] drm_test_cmdline_res_vesa_margins
[13:10:11] [PASSED] drm_test_cmdline_name
[13:10:11] [PASSED] drm_test_cmdline_name_bpp
[13:10:11] [PASSED] drm_test_cmdline_name_option
[13:10:11] [PASSED] drm_test_cmdline_name_bpp_option
[13:10:11] [PASSED] drm_test_cmdline_rotate_0
[13:10:11] [PASSED] drm_test_cmdline_rotate_90
[13:10:11] [PASSED] drm_test_cmdline_rotate_180
[13:10:11] [PASSED] drm_test_cmdline_rotate_270
[13:10:11] [PASSED] drm_test_cmdline_hmirror
[13:10:11] [PASSED] drm_test_cmdline_vmirror
[13:10:11] [PASSED] drm_test_cmdline_margin_options
[13:10:11] [PASSED] drm_test_cmdline_multiple_options
[13:10:11] [PASSED] drm_test_cmdline_bpp_extra_and_option
[13:10:11] [PASSED] drm_test_cmdline_extra_and_option
[13:10:11] [PASSED] drm_test_cmdline_freestanding_options
[13:10:11] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[13:10:11] [PASSED] drm_test_cmdline_panel_orientation
[13:10:11] ================ drm_test_cmdline_invalid =================
[13:10:11] [PASSED] margin_only
[13:10:11] [PASSED] interlace_only
[13:10:11] [PASSED] res_missing_x
[13:10:11] [PASSED] res_missing_y
[13:10:11] [PASSED] res_bad_y
[13:10:11] [PASSED] res_missing_y_bpp
[13:10:11] [PASSED] res_bad_bpp
[13:10:11] [PASSED] res_bad_refresh
[13:10:11] [PASSED] res_bpp_refresh_force_on_off
[13:10:11] [PASSED] res_invalid_mode
[13:10:11] [PASSED] res_bpp_wrong_place_mode
[13:10:11] [PASSED] name_bpp_refresh
[13:10:11] [PASSED] name_refresh
[13:10:11] [PASSED] name_refresh_wrong_mode
[13:10:11] [PASSED] name_refresh_invalid_mode
[13:10:11] [PASSED] rotate_multiple
[13:10:11] [PASSED] rotate_invalid_val
[13:10:11] [PASSED] rotate_truncated
[13:10:11] [PASSED] invalid_option
[13:10:11] [PASSED] invalid_tv_option
[13:10:11] [PASSED] truncated_tv_option
[13:10:11] ============ [PASSED] drm_test_cmdline_invalid =============
[13:10:11] =============== drm_test_cmdline_tv_options ===============
[13:10:11] [PASSED] NTSC
[13:10:11] [PASSED] NTSC_443
[13:10:11] [PASSED] NTSC_J
[13:10:11] [PASSED] PAL
[13:10:11] [PASSED] PAL_M
[13:10:11] [PASSED] PAL_N
[13:10:11] [PASSED] SECAM
[13:10:11] [PASSED] MONO_525
[13:10:11] [PASSED] MONO_625
[13:10:11] =========== [PASSED] drm_test_cmdline_tv_options ===========
[13:10:11] =============== [PASSED] drm_cmdline_parser ================
[13:10:11] ========== drmm_connector_hdmi_init (20 subtests) ==========
[13:10:11] [PASSED] drm_test_connector_hdmi_init_valid
[13:10:11] [PASSED] drm_test_connector_hdmi_init_bpc_8
[13:10:11] [PASSED] drm_test_connector_hdmi_init_bpc_10
[13:10:11] [PASSED] drm_test_connector_hdmi_init_bpc_12
[13:10:11] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[13:10:11] [PASSED] drm_test_connector_hdmi_init_bpc_null
[13:10:11] [PASSED] drm_test_connector_hdmi_init_formats_empty
[13:10:11] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[13:10:11] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[13:10:11] [PASSED] supported_formats=0x9 yuv420_allowed=1
[13:10:11] [PASSED] supported_formats=0x9 yuv420_allowed=0
[13:10:11] [PASSED] supported_formats=0x5 yuv420_allowed=1
[13:10:11] [PASSED] supported_formats=0x5 yuv420_allowed=0
[13:10:11] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[13:10:11] [PASSED] drm_test_connector_hdmi_init_null_ddc
[13:10:11] [PASSED] drm_test_connector_hdmi_init_null_product
[13:10:11] [PASSED] drm_test_connector_hdmi_init_null_vendor
[13:10:11] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[13:10:11] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[13:10:11] [PASSED] drm_test_connector_hdmi_init_product_valid
[13:10:11] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[13:10:11] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[13:10:11] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[13:10:11] ========= drm_test_connector_hdmi_init_type_valid =========
[13:10:11] [PASSED] HDMI-A
[13:10:11] [PASSED] HDMI-B
[13:10:11] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[13:10:11] ======== drm_test_connector_hdmi_init_type_invalid ========
[13:10:11] [PASSED] Unknown
[13:10:11] [PASSED] VGA
[13:10:11] [PASSED] DVI-I
[13:10:11] [PASSED] DVI-D
[13:10:11] [PASSED] DVI-A
[13:10:11] [PASSED] Composite
[13:10:11] [PASSED] SVIDEO
[13:10:11] [PASSED] LVDS
[13:10:11] [PASSED] Component
[13:10:11] [PASSED] DIN
[13:10:11] [PASSED] DP
[13:10:11] [PASSED] TV
[13:10:11] [PASSED] eDP
[13:10:11] [PASSED] Virtual
[13:10:11] [PASSED] DSI
[13:10:11] [PASSED] DPI
[13:10:11] [PASSED] Writeback
[13:10:11] [PASSED] SPI
[13:10:11] [PASSED] USB
[13:10:11] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[13:10:11] ============ [PASSED] drmm_connector_hdmi_init =============
[13:10:11] ============= drmm_connector_init (3 subtests) =============
[13:10:11] [PASSED] drm_test_drmm_connector_init
[13:10:11] [PASSED] drm_test_drmm_connector_init_null_ddc
[13:10:11] ========= drm_test_drmm_connector_init_type_valid =========
[13:10:11] [PASSED] Unknown
[13:10:11] [PASSED] VGA
[13:10:11] [PASSED] DVI-I
[13:10:11] [PASSED] DVI-D
[13:10:11] [PASSED] DVI-A
[13:10:11] [PASSED] Composite
[13:10:11] [PASSED] SVIDEO
[13:10:11] [PASSED] LVDS
[13:10:11] [PASSED] Component
[13:10:11] [PASSED] DIN
[13:10:11] [PASSED] DP
[13:10:11] [PASSED] HDMI-A
[13:10:11] [PASSED] HDMI-B
[13:10:11] [PASSED] TV
[13:10:11] [PASSED] eDP
[13:10:11] [PASSED] Virtual
[13:10:11] [PASSED] DSI
[13:10:11] [PASSED] DPI
[13:10:11] [PASSED] Writeback
[13:10:11] [PASSED] SPI
[13:10:11] [PASSED] USB
[13:10:11] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[13:10:11] =============== [PASSED] drmm_connector_init ===============
[13:10:11] ========= drm_connector_dynamic_init (6 subtests) ==========
[13:10:11] [PASSED] drm_test_drm_connector_dynamic_init
[13:10:11] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[13:10:11] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[13:10:11] [PASSED] drm_test_drm_connector_dynamic_init_properties
[13:10:11] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[13:10:11] [PASSED] Unknown
[13:10:11] [PASSED] VGA
[13:10:11] [PASSED] DVI-I
[13:10:11] [PASSED] DVI-D
[13:10:11] [PASSED] DVI-A
[13:10:11] [PASSED] Composite
[13:10:11] [PASSED] SVIDEO
[13:10:11] [PASSED] LVDS
[13:10:11] [PASSED] Component
[13:10:11] [PASSED] DIN
[13:10:11] [PASSED] DP
[13:10:11] [PASSED] HDMI-A
[13:10:11] [PASSED] HDMI-B
[13:10:11] [PASSED] TV
[13:10:11] [PASSED] eDP
[13:10:11] [PASSED] Virtual
[13:10:11] [PASSED] DSI
[13:10:11] [PASSED] DPI
[13:10:11] [PASSED] Writeback
[13:10:11] [PASSED] SPI
[13:10:11] [PASSED] USB
[13:10:11] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[13:10:11] ======== drm_test_drm_connector_dynamic_init_name =========
[13:10:11] [PASSED] Unknown
[13:10:11] [PASSED] VGA
[13:10:11] [PASSED] DVI-I
[13:10:11] [PASSED] DVI-D
[13:10:11] [PASSED] DVI-A
[13:10:11] [PASSED] Composite
[13:10:11] [PASSED] SVIDEO
[13:10:11] [PASSED] LVDS
[13:10:11] [PASSED] Component
[13:10:11] [PASSED] DIN
[13:10:11] [PASSED] DP
[13:10:11] [PASSED] HDMI-A
[13:10:11] [PASSED] HDMI-B
[13:10:11] [PASSED] TV
[13:10:11] [PASSED] eDP
[13:10:11] [PASSED] Virtual
[13:10:11] [PASSED] DSI
[13:10:11] [PASSED] DPI
[13:10:11] [PASSED] Writeback
[13:10:11] [PASSED] SPI
[13:10:11] [PASSED] USB
[13:10:11] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[13:10:11] =========== [PASSED] drm_connector_dynamic_init ============
[13:10:11] ==== drm_connector_dynamic_register_early (4 subtests) =====
[13:10:11] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[13:10:11] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[13:10:11] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[13:10:11] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[13:10:11] ====== [PASSED] drm_connector_dynamic_register_early =======
[13:10:11] ======= drm_connector_dynamic_register (7 subtests) ========
[13:10:11] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[13:10:11] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[13:10:11] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[13:10:11] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[13:10:11] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[13:10:11] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[13:10:11] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[13:10:11] ========= [PASSED] drm_connector_dynamic_register ==========
[13:10:11] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[13:10:11] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[13:10:11] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[13:10:11] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[13:10:11] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[13:10:11] ========== drm_test_get_tv_mode_from_name_valid ===========
[13:10:11] [PASSED] NTSC
[13:10:11] [PASSED] NTSC-443
[13:10:11] [PASSED] NTSC-J
[13:10:11] [PASSED] PAL
[13:10:11] [PASSED] PAL-M
[13:10:11] [PASSED] PAL-N
[13:10:11] [PASSED] SECAM
[13:10:11] [PASSED] Mono
[13:10:11] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[13:10:11] [PASSED] drm_test_get_tv_mode_from_name_truncated
[13:10:11] ============ [PASSED] drm_get_tv_mode_from_name ============
[13:10:11] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[13:10:11] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[13:10:11] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[13:10:11] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[13:10:11] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[13:10:11] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[13:10:11] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[13:10:11] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[13:10:11] [PASSED] VIC 96
[13:10:11] [PASSED] VIC 97
[13:10:11] [PASSED] VIC 101
[13:10:11] [PASSED] VIC 102
[13:10:11] [PASSED] VIC 106
[13:10:11] [PASSED] VIC 107
[13:10:11] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[13:10:11] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[13:10:11] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[13:10:11] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[13:10:11] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[13:10:11] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[13:10:11] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[13:10:11] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[13:10:11] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[13:10:11] [PASSED] Automatic
[13:10:11] [PASSED] Full
[13:10:11] [PASSED] Limited 16:235
[13:10:11] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[13:10:11] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[13:10:11] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[13:10:11] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[13:10:11] === drm_test_drm_hdmi_connector_get_output_format_name ====
[13:10:11] [PASSED] RGB
[13:10:11] [PASSED] YUV 4:2:0
[13:10:11] [PASSED] YUV 4:2:2
[13:10:11] [PASSED] YUV 4:4:4
[13:10:11] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[13:10:11] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[13:10:11] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[13:10:11] ============= drm_damage_helper (21 subtests) ==============
[13:10:11] [PASSED] drm_test_damage_iter_no_damage
[13:10:11] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[13:10:11] [PASSED] drm_test_damage_iter_no_damage_src_moved
[13:10:11] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[13:10:11] [PASSED] drm_test_damage_iter_no_damage_not_visible
[13:10:11] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[13:10:11] [PASSED] drm_test_damage_iter_no_damage_no_fb
[13:10:11] [PASSED] drm_test_damage_iter_simple_damage
[13:10:11] [PASSED] drm_test_damage_iter_single_damage
[13:10:11] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[13:10:11] [PASSED] drm_test_damage_iter_single_damage_outside_src
[13:10:11] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[13:10:11] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[13:10:11] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[13:10:11] [PASSED] drm_test_damage_iter_single_damage_src_moved
[13:10:11] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[13:10:11] [PASSED] drm_test_damage_iter_damage
[13:10:11] [PASSED] drm_test_damage_iter_damage_one_intersect
[13:10:11] [PASSED] drm_test_damage_iter_damage_one_outside
[13:10:11] [PASSED] drm_test_damage_iter_damage_src_moved
[13:10:11] [PASSED] drm_test_damage_iter_damage_not_visible
[13:10:11] ================ [PASSED] drm_damage_helper ================
[13:10:11] ============== drm_dp_mst_helper (3 subtests) ==============
[13:10:11] ============== drm_test_dp_mst_calc_pbn_mode ==============
[13:10:11] [PASSED] Clock 154000 BPP 30 DSC disabled
[13:10:11] [PASSED] Clock 234000 BPP 30 DSC disabled
[13:10:11] [PASSED] Clock 297000 BPP 24 DSC disabled
[13:10:11] [PASSED] Clock 332880 BPP 24 DSC enabled
[13:10:11] [PASSED] Clock 324540 BPP 24 DSC enabled
[13:10:11] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[13:10:11] ============== drm_test_dp_mst_calc_pbn_div ===============
[13:10:11] [PASSED] Link rate 2000000 lane count 4
[13:10:11] [PASSED] Link rate 2000000 lane count 2
[13:10:11] [PASSED] Link rate 2000000 lane count 1
[13:10:11] [PASSED] Link rate 1350000 lane count 4
[13:10:11] [PASSED] Link rate 1350000 lane count 2
[13:10:11] [PASSED] Link rate 1350000 lane count 1
[13:10:11] [PASSED] Link rate 1000000 lane count 4
[13:10:11] [PASSED] Link rate 1000000 lane count 2
[13:10:11] [PASSED] Link rate 1000000 lane count 1
[13:10:11] [PASSED] Link rate 810000 lane count 4
[13:10:11] [PASSED] Link rate 810000 lane count 2
[13:10:11] [PASSED] Link rate 810000 lane count 1
[13:10:11] [PASSED] Link rate 540000 lane count 4
[13:10:11] [PASSED] Link rate 540000 lane count 2
[13:10:11] [PASSED] Link rate 540000 lane count 1
[13:10:11] [PASSED] Link rate 270000 lane count 4
[13:10:11] [PASSED] Link rate 270000 lane count 2
[13:10:11] [PASSED] Link rate 270000 lane count 1
[13:10:11] [PASSED] Link rate 162000 lane count 4
[13:10:11] [PASSED] Link rate 162000 lane count 2
[13:10:11] [PASSED] Link rate 162000 lane count 1
[13:10:11] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[13:10:11] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[13:10:11] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[13:10:11] [PASSED] DP_POWER_UP_PHY with port number
[13:10:11] [PASSED] DP_POWER_DOWN_PHY with port number
[13:10:11] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[13:10:11] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[13:10:11] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[13:10:11] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[13:10:11] [PASSED] DP_QUERY_PAYLOAD with port number
[13:10:11] [PASSED] DP_QUERY_PAYLOAD with VCPI
[13:10:11] [PASSED] DP_REMOTE_DPCD_READ with port number
[13:10:11] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[13:10:11] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[13:10:11] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[13:10:11] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[13:10:11] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[13:10:11] [PASSED] DP_REMOTE_I2C_READ with port number
[13:10:11] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[13:10:11] [PASSED] DP_REMOTE_I2C_READ with transactions array
[13:10:11] [PASSED] DP_REMOTE_I2C_WRITE with port number
[13:10:11] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[13:10:11] [PASSED] DP_REMOTE_I2C_WRITE with data array
[13:10:11] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[13:10:11] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[13:10:11] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[13:10:11] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[13:10:11] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[13:10:11] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[13:10:11] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[13:10:11] ================ [PASSED] drm_dp_mst_helper ================
[13:10:11] ================== drm_exec (7 subtests) ===================
[13:10:11] [PASSED] sanitycheck
[13:10:11] [PASSED] test_lock
[13:10:11] [PASSED] test_lock_unlock
[13:10:11] [PASSED] test_duplicates
[13:10:11] [PASSED] test_prepare
[13:10:11] [PASSED] test_prepare_array
[13:10:11] [PASSED] test_multiple_loops
[13:10:11] ==================== [PASSED] drm_exec =====================
[13:10:11] =========== drm_format_helper_test (17 subtests) ===========
[13:10:11] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[13:10:11] [PASSED] single_pixel_source_buffer
[13:10:11] [PASSED] single_pixel_clip_rectangle
[13:10:11] [PASSED] well_known_colors
[13:10:11] [PASSED] destination_pitch
[13:10:11] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[13:10:11] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[13:10:11] [PASSED] single_pixel_source_buffer
[13:10:11] [PASSED] single_pixel_clip_rectangle
[13:10:11] [PASSED] well_known_colors
[13:10:11] [PASSED] destination_pitch
[13:10:11] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[13:10:11] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[13:10:11] [PASSED] single_pixel_source_buffer
[13:10:11] [PASSED] single_pixel_clip_rectangle
[13:10:11] [PASSED] well_known_colors
[13:10:11] [PASSED] destination_pitch
[13:10:11] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[13:10:11] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[13:10:11] [PASSED] single_pixel_source_buffer
[13:10:11] [PASSED] single_pixel_clip_rectangle
[13:10:11] [PASSED] well_known_colors
[13:10:11] [PASSED] destination_pitch
[13:10:11] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[13:10:11] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[13:10:11] [PASSED] single_pixel_source_buffer
[13:10:11] [PASSED] single_pixel_clip_rectangle
[13:10:11] [PASSED] well_known_colors
[13:10:11] [PASSED] destination_pitch
[13:10:11] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[13:10:11] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[13:10:11] [PASSED] single_pixel_source_buffer
[13:10:11] [PASSED] single_pixel_clip_rectangle
[13:10:11] [PASSED] well_known_colors
[13:10:11] [PASSED] destination_pitch
[13:10:11] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[13:10:11] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[13:10:11] [PASSED] single_pixel_source_buffer
[13:10:11] [PASSED] single_pixel_clip_rectangle
[13:10:11] [PASSED] well_known_colors
[13:10:11] [PASSED] destination_pitch
[13:10:11] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[13:10:11] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[13:10:11] [PASSED] single_pixel_source_buffer
[13:10:11] [PASSED] single_pixel_clip_rectangle
[13:10:11] [PASSED] well_known_colors
[13:10:11] [PASSED] destination_pitch
[13:10:11] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[13:10:11] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[13:10:11] [PASSED] single_pixel_source_buffer
[13:10:11] [PASSED] single_pixel_clip_rectangle
[13:10:11] [PASSED] well_known_colors
[13:10:11] [PASSED] destination_pitch
[13:10:11] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[13:10:11] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[13:10:11] [PASSED] single_pixel_source_buffer
[13:10:11] [PASSED] single_pixel_clip_rectangle
[13:10:11] [PASSED] well_known_colors
[13:10:11] [PASSED] destination_pitch
[13:10:11] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[13:10:11] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[13:10:11] [PASSED] single_pixel_source_buffer
[13:10:11] [PASSED] single_pixel_clip_rectangle
[13:10:11] [PASSED] well_known_colors
[13:10:11] [PASSED] destination_pitch
[13:10:11] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[13:10:11] ============== drm_test_fb_xrgb8888_to_mono ===============
[13:10:11] [PASSED] single_pixel_source_buffer
[13:10:11] [PASSED] single_pixel_clip_rectangle
[13:10:11] [PASSED] well_known_colors
[13:10:11] [PASSED] destination_pitch
[13:10:11] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[13:10:11] ==================== drm_test_fb_swab =====================
[13:10:11] [PASSED] single_pixel_source_buffer
[13:10:11] [PASSED] single_pixel_clip_rectangle
[13:10:11] [PASSED] well_known_colors
[13:10:11] [PASSED] destination_pitch
[13:10:11] ================ [PASSED] drm_test_fb_swab =================
[13:10:11] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[13:10:11] [PASSED] single_pixel_source_buffer
[13:10:11] [PASSED] single_pixel_clip_rectangle
[13:10:11] [PASSED] well_known_colors
[13:10:11] [PASSED] destination_pitch
[13:10:11] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[13:10:11] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[13:10:11] [PASSED] single_pixel_source_buffer
[13:10:11] [PASSED] single_pixel_clip_rectangle
[13:10:11] [PASSED] well_known_colors
[13:10:11] [PASSED] destination_pitch
[13:10:11] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[13:10:11] ================= drm_test_fb_clip_offset =================
[13:10:11] [PASSED] pass through
[13:10:11] [PASSED] horizontal offset
[13:10:11] [PASSED] vertical offset
[13:10:11] [PASSED] horizontal and vertical offset
[13:10:11] [PASSED] horizontal offset (custom pitch)
[13:10:11] [PASSED] vertical offset (custom pitch)
[13:10:11] [PASSED] horizontal and vertical offset (custom pitch)
[13:10:11] ============= [PASSED] drm_test_fb_clip_offset =============
[13:10:11] =================== drm_test_fb_memcpy ====================
[13:10:11] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[13:10:11] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[13:10:11] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[13:10:11] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[13:10:11] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[13:10:11] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[13:10:11] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[13:10:11] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[13:10:11] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[13:10:11] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[13:10:11] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[13:10:11] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[13:10:11] =============== [PASSED] drm_test_fb_memcpy ================
[13:10:11] ============= [PASSED] drm_format_helper_test ==============
[13:10:11] ================= drm_format (18 subtests) =================
[13:10:11] [PASSED] drm_test_format_block_width_invalid
[13:10:11] [PASSED] drm_test_format_block_width_one_plane
[13:10:11] [PASSED] drm_test_format_block_width_two_plane
[13:10:11] [PASSED] drm_test_format_block_width_three_plane
[13:10:11] [PASSED] drm_test_format_block_width_tiled
[13:10:11] [PASSED] drm_test_format_block_height_invalid
[13:10:11] [PASSED] drm_test_format_block_height_one_plane
[13:10:11] [PASSED] drm_test_format_block_height_two_plane
[13:10:11] [PASSED] drm_test_format_block_height_three_plane
[13:10:11] [PASSED] drm_test_format_block_height_tiled
[13:10:11] [PASSED] drm_test_format_min_pitch_invalid
[13:10:11] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[13:10:11] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[13:10:11] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[13:10:11] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[13:10:11] [PASSED] drm_test_format_min_pitch_two_plane
[13:10:11] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[13:10:11] [PASSED] drm_test_format_min_pitch_tiled
[13:10:11] =================== [PASSED] drm_format ====================
[13:10:11] ============== drm_framebuffer (10 subtests) ===============
[13:10:11] ========== drm_test_framebuffer_check_src_coords ==========
[13:10:11] [PASSED] Success: source fits into fb
[13:10:11] [PASSED] Fail: overflowing fb with x-axis coordinate
[13:10:11] [PASSED] Fail: overflowing fb with y-axis coordinate
[13:10:11] [PASSED] Fail: overflowing fb with source width
[13:10:11] [PASSED] Fail: overflowing fb with source height
[13:10:11] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[13:10:11] [PASSED] drm_test_framebuffer_cleanup
[13:10:11] =============== drm_test_framebuffer_create ===============
[13:10:11] [PASSED] ABGR8888 normal sizes
[13:10:11] [PASSED] ABGR8888 max sizes
[13:10:11] [PASSED] ABGR8888 pitch greater than min required
[13:10:11] [PASSED] ABGR8888 pitch less than min required
[13:10:11] [PASSED] ABGR8888 Invalid width
[13:10:11] [PASSED] ABGR8888 Invalid buffer handle
[13:10:11] [PASSED] No pixel format
[13:10:11] [PASSED] ABGR8888 Width 0
[13:10:11] [PASSED] ABGR8888 Height 0
[13:10:11] [PASSED] ABGR8888 Out of bound height * pitch combination
[13:10:11] [PASSED] ABGR8888 Large buffer offset
[13:10:11] [PASSED] ABGR8888 Buffer offset for inexistent plane
[13:10:11] [PASSED] ABGR8888 Invalid flag
[13:10:11] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[13:10:11] [PASSED] ABGR8888 Valid buffer modifier
[13:10:11] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[13:10:11] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[13:10:11] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[13:10:11] [PASSED] NV12 Normal sizes
[13:10:11] [PASSED] NV12 Max sizes
[13:10:11] [PASSED] NV12 Invalid pitch
[13:10:11] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[13:10:11] [PASSED] NV12 different modifier per-plane
[13:10:11] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[13:10:11] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[13:10:11] [PASSED] NV12 Modifier for inexistent plane
[13:10:11] [PASSED] NV12 Handle for inexistent plane
[13:10:11] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[13:10:11] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[13:10:11] [PASSED] YVU420 Normal sizes
[13:10:11] [PASSED] YVU420 Max sizes
[13:10:11] [PASSED] YVU420 Invalid pitch
[13:10:11] [PASSED] YVU420 Different pitches
[13:10:11] [PASSED] YVU420 Different buffer offsets/pitches
[13:10:11] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[13:10:11] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[13:10:11] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[13:10:11] [PASSED] YVU420 Valid modifier
[13:10:11] [PASSED] YVU420 Different modifiers per plane
[13:10:11] [PASSED] YVU420 Modifier for inexistent plane
[13:10:11] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[13:10:11] [PASSED] X0L2 Normal sizes
[13:10:11] [PASSED] X0L2 Max sizes
[13:10:11] [PASSED] X0L2 Invalid pitch
[13:10:11] [PASSED] X0L2 Pitch greater than minimum required
[13:10:11] [PASSED] X0L2 Handle for inexistent plane
[13:10:11] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[13:10:11] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[13:10:11] [PASSED] X0L2 Valid modifier
[13:10:11] [PASSED] X0L2 Modifier for inexistent plane
[13:10:11] =========== [PASSED] drm_test_framebuffer_create ===========
[13:10:11] [PASSED] drm_test_framebuffer_free
[13:10:11] [PASSED] drm_test_framebuffer_init
[13:10:11] [PASSED] drm_test_framebuffer_init_bad_format
[13:10:11] [PASSED] drm_test_framebuffer_init_dev_mismatch
[13:10:11] [PASSED] drm_test_framebuffer_lookup
[13:10:11] [PASSED] drm_test_framebuffer_lookup_inexistent
[13:10:11] [PASSED] drm_test_framebuffer_modifiers_not_supported
[13:10:11] ================= [PASSED] drm_framebuffer =================
[13:10:11] ================ drm_gem_shmem (8 subtests) ================
[13:10:11] [PASSED] drm_gem_shmem_test_obj_create
[13:10:11] [PASSED] drm_gem_shmem_test_obj_create_private
[13:10:11] [PASSED] drm_gem_shmem_test_pin_pages
[13:10:11] [PASSED] drm_gem_shmem_test_vmap
[13:10:11] [PASSED] drm_gem_shmem_test_get_sg_table
[13:10:11] [PASSED] drm_gem_shmem_test_get_pages_sgt
[13:10:11] [PASSED] drm_gem_shmem_test_madvise
[13:10:11] [PASSED] drm_gem_shmem_test_purge
[13:10:11] ================== [PASSED] drm_gem_shmem ==================
[13:10:11] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[13:10:11] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[13:10:11] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[13:10:11] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[13:10:11] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[13:10:11] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[13:10:11] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[13:10:11] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[13:10:11] [PASSED] Automatic
[13:10:11] [PASSED] Full
[13:10:11] [PASSED] Limited 16:235
[13:10:11] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[13:10:11] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[13:10:11] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[13:10:11] [PASSED] drm_test_check_disable_connector
[13:10:11] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[13:10:11] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[13:10:11] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[13:10:11] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[13:10:11] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[13:10:11] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[13:10:11] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[13:10:11] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[13:10:11] [PASSED] drm_test_check_output_bpc_dvi
[13:10:11] [PASSED] drm_test_check_output_bpc_format_vic_1
[13:10:11] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[13:10:11] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[13:10:11] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[13:10:11] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[13:10:11] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[13:10:11] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[13:10:11] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[13:10:11] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[13:10:11] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[13:10:11] [PASSED] drm_test_check_broadcast_rgb_value
[13:10:11] [PASSED] drm_test_check_bpc_8_value
[13:10:11] [PASSED] drm_test_check_bpc_10_value
[13:10:11] [PASSED] drm_test_check_bpc_12_value
[13:10:11] [PASSED] drm_test_check_format_value
[13:10:11] [PASSED] drm_test_check_tmds_char_value
[13:10:11] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[13:10:11] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[13:10:11] [PASSED] drm_test_check_mode_valid
[13:10:11] [PASSED] drm_test_check_mode_valid_reject
[13:10:11] [PASSED] drm_test_check_mode_valid_reject_rate
[13:10:11] [PASSED] drm_test_check_mode_valid_reject_max_clock
[13:10:11] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[13:10:11] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[13:10:11] [PASSED] drm_test_check_infoframes
[13:10:11] [PASSED] drm_test_check_reject_avi_infoframe
[13:10:11] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[13:10:11] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[13:10:11] [PASSED] drm_test_check_reject_audio_infoframe
[13:10:11] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[13:10:11] ================= drm_managed (2 subtests) =================
[13:10:11] [PASSED] drm_test_managed_release_action
[13:10:11] [PASSED] drm_test_managed_run_action
[13:10:11] =================== [PASSED] drm_managed ===================
[13:10:11] =================== drm_mm (6 subtests) ====================
[13:10:11] [PASSED] drm_test_mm_init
[13:10:11] [PASSED] drm_test_mm_debug
[13:10:11] [PASSED] drm_test_mm_align32
[13:10:11] [PASSED] drm_test_mm_align64
[13:10:11] [PASSED] drm_test_mm_lowest
[13:10:11] [PASSED] drm_test_mm_highest
[13:10:11] ===================== [PASSED] drm_mm ======================
[13:10:11] ============= drm_modes_analog_tv (5 subtests) =============
[13:10:11] [PASSED] drm_test_modes_analog_tv_mono_576i
[13:10:11] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[13:10:11] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[13:10:11] [PASSED] drm_test_modes_analog_tv_pal_576i
[13:10:11] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[13:10:11] =============== [PASSED] drm_modes_analog_tv ===============
[13:10:11] ============== drm_plane_helper (2 subtests) ===============
[13:10:11] =============== drm_test_check_plane_state ================
[13:10:11] [PASSED] clipping_simple
[13:10:11] [PASSED] clipping_rotate_reflect
[13:10:11] [PASSED] positioning_simple
[13:10:11] [PASSED] upscaling
[13:10:11] [PASSED] downscaling
[13:10:11] [PASSED] rounding1
[13:10:11] [PASSED] rounding2
[13:10:11] [PASSED] rounding3
[13:10:11] [PASSED] rounding4
[13:10:11] =========== [PASSED] drm_test_check_plane_state ============
[13:10:11] =========== drm_test_check_invalid_plane_state ============
[13:10:11] [PASSED] positioning_invalid
[13:10:11] [PASSED] upscaling_invalid
[13:10:11] [PASSED] downscaling_invalid
[13:10:11] ======= [PASSED] drm_test_check_invalid_plane_state ========
[13:10:11] ================ [PASSED] drm_plane_helper =================
[13:10:11] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[13:10:11] ====== drm_test_connector_helper_tv_get_modes_check =======
[13:10:11] [PASSED] None
[13:10:11] [PASSED] PAL
[13:10:11] [PASSED] NTSC
[13:10:11] [PASSED] Both, NTSC Default
[13:10:11] [PASSED] Both, PAL Default
[13:10:11] [PASSED] Both, NTSC Default, with PAL on command-line
[13:10:11] [PASSED] Both, PAL Default, with NTSC on command-line
[13:10:11] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[13:10:11] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[13:10:11] ================== drm_rect (9 subtests) ===================
[13:10:11] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[13:10:11] [PASSED] drm_test_rect_clip_scaled_not_clipped
[13:10:11] [PASSED] drm_test_rect_clip_scaled_clipped
[13:10:11] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[13:10:11] ================= drm_test_rect_intersect =================
[13:10:11] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[13:10:11] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[13:10:11] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[13:10:11] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[13:10:11] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[13:10:11] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[13:10:11] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[13:10:11] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[13:10:11] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[13:10:11] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[13:10:11] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[13:10:11] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[13:10:11] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[13:10:11] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[13:10:11] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[13:10:11] ============= [PASSED] drm_test_rect_intersect =============
[13:10:11] ================ drm_test_rect_calc_hscale ================
[13:10:11] [PASSED] normal use
[13:10:11] [PASSED] out of max range
[13:10:11] [PASSED] out of min range
[13:10:11] [PASSED] zero dst
[13:10:11] [PASSED] negative src
[13:10:11] [PASSED] negative dst
[13:10:11] ============ [PASSED] drm_test_rect_calc_hscale ============
[13:10:11] ================ drm_test_rect_calc_vscale ================
[13:10:11] [PASSED] normal use
[13:10:11] [PASSED] out of max range
[13:10:11] [PASSED] out of min range
[13:10:11] [PASSED] zero dst
[13:10:11] [PASSED] negative src
[13:10:11] [PASSED] negative dst
[13:10:11] ============ [PASSED] drm_test_rect_calc_vscale ============
[13:10:11] ================== drm_test_rect_rotate ===================
[13:10:11] [PASSED] reflect-x
[13:10:11] [PASSED] reflect-y
[13:10:11] [PASSED] rotate-0
[13:10:11] [PASSED] rotate-90
[13:10:11] [PASSED] rotate-180
[13:10:11] [PASSED] rotate-270
[13:10:11] ============== [PASSED] drm_test_rect_rotate ===============
[13:10:11] ================ drm_test_rect_rotate_inv =================
[13:10:11] [PASSED] reflect-x
[13:10:11] [PASSED] reflect-y
[13:10:11] [PASSED] rotate-0
[13:10:11] [PASSED] rotate-90
[13:10:11] [PASSED] rotate-180
[13:10:11] [PASSED] rotate-270
[13:10:11] ============ [PASSED] drm_test_rect_rotate_inv =============
[13:10:11] ==================== [PASSED] drm_rect =====================
[13:10:11] ============ drm_sysfb_modeset_test (1 subtest) ============
[13:10:11] ============ drm_test_sysfb_build_fourcc_list =============
[13:10:11] [PASSED] no native formats
[13:10:11] [PASSED] XRGB8888 as native format
[13:10:11] [PASSED] remove duplicates
[13:10:11] [PASSED] convert alpha formats
[13:10:11] [PASSED] random formats
[13:10:11] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[13:10:11] ============= [PASSED] drm_sysfb_modeset_test ==============
[13:10:11] ================== drm_fixp (2 subtests) ===================
[13:10:11] [PASSED] drm_test_int2fixp
[13:10:11] [PASSED] drm_test_sm2fixp
[13:10:11] ==================== [PASSED] drm_fixp =====================
[13:10:11] ============================================================
[13:10:11] Testing complete. Ran 621 tests: passed: 621
[13:10:11] Elapsed time: 25.970s total, 1.762s configuring, 24.041s building, 0.133s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[13:10:11] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:10:13] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:10:23] Starting KUnit Kernel (1/1)...
[13:10:23] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:10:23] ================= ttm_device (5 subtests) ==================
[13:10:23] [PASSED] ttm_device_init_basic
[13:10:23] [PASSED] ttm_device_init_multiple
[13:10:23] [PASSED] ttm_device_fini_basic
[13:10:23] [PASSED] ttm_device_init_no_vma_man
[13:10:23] ================== ttm_device_init_pools ==================
[13:10:23] [PASSED] No DMA allocations, no DMA32 required
[13:10:23] [PASSED] DMA allocations, DMA32 required
[13:10:23] [PASSED] No DMA allocations, DMA32 required
[13:10:23] [PASSED] DMA allocations, no DMA32 required
[13:10:23] ============== [PASSED] ttm_device_init_pools ==============
[13:10:23] =================== [PASSED] ttm_device ====================
[13:10:23] ================== ttm_pool (8 subtests) ===================
[13:10:23] ================== ttm_pool_alloc_basic ===================
[13:10:23] [PASSED] One page
[13:10:23] [PASSED] More than one page
[13:10:23] [PASSED] Above the allocation limit
[13:10:23] [PASSED] One page, with coherent DMA mappings enabled
[13:10:23] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:10:23] ============== [PASSED] ttm_pool_alloc_basic ===============
[13:10:23] ============== ttm_pool_alloc_basic_dma_addr ==============
[13:10:23] [PASSED] One page
[13:10:23] [PASSED] More than one page
[13:10:23] [PASSED] Above the allocation limit
[13:10:23] [PASSED] One page, with coherent DMA mappings enabled
[13:10:23] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:10:23] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[13:10:23] [PASSED] ttm_pool_alloc_order_caching_match
[13:10:23] [PASSED] ttm_pool_alloc_caching_mismatch
[13:10:23] [PASSED] ttm_pool_alloc_order_mismatch
[13:10:23] [PASSED] ttm_pool_free_dma_alloc
[13:10:23] [PASSED] ttm_pool_free_no_dma_alloc
[13:10:23] [PASSED] ttm_pool_fini_basic
[13:10:23] ==================== [PASSED] ttm_pool =====================
[13:10:23] ================ ttm_resource (8 subtests) =================
[13:10:23] ================= ttm_resource_init_basic =================
[13:10:23] [PASSED] Init resource in TTM_PL_SYSTEM
[13:10:23] [PASSED] Init resource in TTM_PL_VRAM
[13:10:23] [PASSED] Init resource in a private placement
[13:10:23] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[13:10:23] ============= [PASSED] ttm_resource_init_basic =============
[13:10:23] [PASSED] ttm_resource_init_pinned
[13:10:23] [PASSED] ttm_resource_fini_basic
[13:10:23] [PASSED] ttm_resource_manager_init_basic
[13:10:23] [PASSED] ttm_resource_manager_usage_basic
[13:10:23] [PASSED] ttm_resource_manager_set_used_basic
[13:10:23] [PASSED] ttm_sys_man_alloc_basic
[13:10:23] [PASSED] ttm_sys_man_free_basic
[13:10:23] ================== [PASSED] ttm_resource ===================
[13:10:23] =================== ttm_tt (15 subtests) ===================
[13:10:23] ==================== ttm_tt_init_basic ====================
[13:10:23] [PASSED] Page-aligned size
[13:10:23] [PASSED] Extra pages requested
[13:10:23] ================ [PASSED] ttm_tt_init_basic ================
[13:10:23] [PASSED] ttm_tt_init_misaligned
[13:10:23] [PASSED] ttm_tt_fini_basic
[13:10:23] [PASSED] ttm_tt_fini_sg
[13:10:23] [PASSED] ttm_tt_fini_shmem
[13:10:23] [PASSED] ttm_tt_create_basic
[13:10:23] [PASSED] ttm_tt_create_invalid_bo_type
[13:10:23] [PASSED] ttm_tt_create_ttm_exists
[13:10:23] [PASSED] ttm_tt_create_failed
[13:10:23] [PASSED] ttm_tt_destroy_basic
[13:10:23] [PASSED] ttm_tt_populate_null_ttm
[13:10:23] [PASSED] ttm_tt_populate_populated_ttm
[13:10:23] [PASSED] ttm_tt_unpopulate_basic
[13:10:23] [PASSED] ttm_tt_unpopulate_empty_ttm
[13:10:23] [PASSED] ttm_tt_swapin_basic
[13:10:23] ===================== [PASSED] ttm_tt ======================
[13:10:23] =================== ttm_bo (14 subtests) ===================
[13:10:23] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[13:10:23] [PASSED] Cannot be interrupted and sleeps
[13:10:23] [PASSED] Cannot be interrupted, locks straight away
[13:10:23] [PASSED] Can be interrupted, sleeps
[13:10:23] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[13:10:23] [PASSED] ttm_bo_reserve_locked_no_sleep
[13:10:23] [PASSED] ttm_bo_reserve_no_wait_ticket
[13:10:23] [PASSED] ttm_bo_reserve_double_resv
[13:10:23] [PASSED] ttm_bo_reserve_interrupted
[13:10:23] [PASSED] ttm_bo_reserve_deadlock
[13:10:23] [PASSED] ttm_bo_unreserve_basic
[13:10:23] [PASSED] ttm_bo_unreserve_pinned
[13:10:23] [PASSED] ttm_bo_unreserve_bulk
[13:10:23] [PASSED] ttm_bo_fini_basic
[13:10:23] [PASSED] ttm_bo_fini_shared_resv
[13:10:23] [PASSED] ttm_bo_pin_basic
[13:10:23] [PASSED] ttm_bo_pin_unpin_resource
[13:10:23] [PASSED] ttm_bo_multiple_pin_one_unpin
[13:10:23] ===================== [PASSED] ttm_bo ======================
[13:10:23] ============== ttm_bo_validate (22 subtests) ===============
[13:10:23] ============== ttm_bo_init_reserved_sys_man ===============
[13:10:23] [PASSED] Buffer object for userspace
[13:10:23] [PASSED] Kernel buffer object
[13:10:23] [PASSED] Shared buffer object
[13:10:23] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[13:10:23] ============== ttm_bo_init_reserved_mock_man ==============
[13:10:23] [PASSED] Buffer object for userspace
[13:10:23] [PASSED] Kernel buffer object
[13:10:23] [PASSED] Shared buffer object
[13:10:23] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[13:10:23] [PASSED] ttm_bo_init_reserved_resv
[13:10:23] ================== ttm_bo_validate_basic ==================
[13:10:23] [PASSED] Buffer object for userspace
[13:10:23] [PASSED] Kernel buffer object
[13:10:23] [PASSED] Shared buffer object
[13:10:23] ============== [PASSED] ttm_bo_validate_basic ==============
[13:10:23] [PASSED] ttm_bo_validate_invalid_placement
[13:10:23] ============= ttm_bo_validate_same_placement ==============
[13:10:23] [PASSED] System manager
[13:10:23] [PASSED] VRAM manager
[13:10:23] ========= [PASSED] ttm_bo_validate_same_placement ==========
[13:10:23] [PASSED] ttm_bo_validate_failed_alloc
[13:10:23] [PASSED] ttm_bo_validate_pinned
[13:10:23] [PASSED] ttm_bo_validate_busy_placement
[13:10:23] ================ ttm_bo_validate_multihop =================
[13:10:23] [PASSED] Buffer object for userspace
[13:10:23] [PASSED] Kernel buffer object
[13:10:23] [PASSED] Shared buffer object
[13:10:23] ============ [PASSED] ttm_bo_validate_multihop =============
[13:10:23] ========== ttm_bo_validate_no_placement_signaled ==========
[13:10:23] [PASSED] Buffer object in system domain, no page vector
[13:10:23] [PASSED] Buffer object in system domain with an existing page vector
[13:10:23] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[13:10:23] ======== ttm_bo_validate_no_placement_not_signaled ========
[13:10:23] [PASSED] Buffer object for userspace
[13:10:23] [PASSED] Kernel buffer object
[13:10:23] [PASSED] Shared buffer object
[13:10:23] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[13:10:23] [PASSED] ttm_bo_validate_move_fence_signaled
[13:10:23] ========= ttm_bo_validate_move_fence_not_signaled =========
[13:10:23] [PASSED] Waits for GPU
[13:10:23] [PASSED] Tries to lock straight away
[13:10:23] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[13:10:23] [PASSED] ttm_bo_validate_swapout
[13:10:23] [PASSED] ttm_bo_validate_happy_evict
[13:10:23] [PASSED] ttm_bo_validate_all_pinned_evict
[13:10:23] [PASSED] ttm_bo_validate_allowed_only_evict
[13:10:23] [PASSED] ttm_bo_validate_deleted_evict
[13:10:23] [PASSED] ttm_bo_validate_busy_domain_evict
[13:10:23] [PASSED] ttm_bo_validate_evict_gutting
[13:10:23] [PASSED] ttm_bo_validate_recrusive_evict
[13:10:23] ================= [PASSED] ttm_bo_validate =================
[13:10:23] ============================================================
[13:10:23] Testing complete. Ran 102 tests: passed: 102
[13:10:23] Elapsed time: 11.422s total, 1.728s configuring, 9.478s building, 0.188s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH] drm/i915/display: Use rmw in gen9_write_dc_state() to preserve non-DC bits
2026-05-06 13:03 [PATCH] drm/i915/display: Use rmw in gen9_write_dc_state() to preserve non-DC bits Dibin Moolakadan Subrahmanian
2026-05-06 13:10 ` ✓ CI.KUnit: success for " Patchwork
@ 2026-05-06 13:35 ` Imre Deak
2026-05-07 5:47 ` Dibin Moolakadan Subrahmanian
1 sibling, 1 reply; 20+ messages in thread
From: Imre Deak @ 2026-05-06 13:35 UTC (permalink / raw)
To: Dibin Moolakadan Subrahmanian
Cc: intel-gfx, intel-xe, ankit.k.nautiyal, uma.shankar
On Wed, May 06, 2026 at 06:33:21PM +0530, Dibin Moolakadan Subrahmanian wrote:
> gen9_write_dc_state() verifies DC_STATE_EN by reading it back, but it
> was comparing the full register value instead of only the DC state bits.
> That could trigger false failure messages and unnecessary retries when
> unrelated bits differed.
>
> Use intel_de_rmw() to update only the DC state bits and compare only
> the masked DC state bits in the read-back check and retry logic.
>
> BSpec: 49437,69115
> Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
> ---
> .../i915/display/intel_display_power_well.c | 21 ++++++++-----------
> 1 file changed, 9 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index 6fbfd46461b0..75471898e323 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -727,13 +727,13 @@ static void assert_can_disable_dc9(struct intel_display *display)
> }
>
> static void gen9_write_dc_state(struct intel_display *display,
> - u32 state)
> + u32 state, u32 mask)
> {
> int rewrites = 0;
> int rereads = 0;
> u32 v;
>
> - intel_de_write(display, DC_STATE_EN, state);
> + intel_de_rmw(display, DC_STATE_EN, mask, state);
There is no need to change this to an RMW, since gen9_set_dc_state()
computed the state passed to this function by the equivalent
(intel_de_read(display, DC_STATE_EN) & ~mask) | state
>
> /* It has been observed that disabling the dc6 state sometimes
> * doesn't stick and dmc keeps returning old value. Make sure
> @@ -742,9 +742,8 @@ static void gen9_write_dc_state(struct intel_display *display,
> */
> do {
> v = intel_de_read(display, DC_STATE_EN);
> -
> - if (v != state) {
> - intel_de_write(display, DC_STATE_EN, state);
> + if ((v & mask) != (state & mask)) {
> + intel_de_rmw(display, DC_STATE_EN, mask, state);
Could you provide the flags in the register causing an unexpected
mismatch? I can only see bits that should preserve their state as
written by the driver. The register has also some clear-on-write flags,
like 'Display DC*CO State Status DSI', but not sure how even those can
lead to a mismatch.
> rewrites++;
> rereads = 0;
> } else if (rereads++ > 5) {
> @@ -753,16 +752,16 @@ static void gen9_write_dc_state(struct intel_display *display,
>
> } while (rewrites < 100);
>
> - if (v != state)
> + if ((v & mask) != (state & mask))
> drm_err(display->drm,
> "Writing dc state to 0x%x failed, now 0x%x\n",
> - state, v);
> + state & mask, v & mask);
>
> /* Most of the times we need one retry, avoid spam */
> if (rewrites > 1)
> drm_dbg_kms(display->drm,
> "Rewrote dc state to 0x%x %d times\n",
> - state, rewrites);
> + state & mask, rewrites);
> }
>
> static u32 gen9_dc_mask(struct intel_display *display)
> @@ -855,15 +854,13 @@ void gen9_set_dc_state(struct intel_display *display, u32 state)
> if (!dc6_was_enabled && enable_dc6)
> intel_dmc_update_dc6_allowed_count(display, true);
>
> - val &= ~mask;
> - val |= state;
>
> - gen9_write_dc_state(display, val);
> + gen9_write_dc_state(display, state, mask);
>
> if (!enable_dc6 && dc6_was_enabled)
> intel_dmc_update_dc6_allowed_count(display, false);
>
> - power_domains->dc_state = val & mask;
> + power_domains->dc_state = state & mask;
> }
>
> static void tgl_enable_dc3co(struct intel_display *display)
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH] drm/i915/display: Use rmw in gen9_write_dc_state() to preserve non-DC bits
2026-05-06 13:35 ` [PATCH] " Imre Deak
@ 2026-05-07 5:47 ` Dibin Moolakadan Subrahmanian
2026-05-07 6:36 ` Imre Deak
0 siblings, 1 reply; 20+ messages in thread
From: Dibin Moolakadan Subrahmanian @ 2026-05-07 5:47 UTC (permalink / raw)
To: imre.deak; +Cc: intel-gfx, intel-xe, ankit.k.nautiyal, uma.shankar
On 06-05-2026 19:05, Imre Deak wrote:
> On Wed, May 06, 2026 at 06:33:21PM +0530, Dibin Moolakadan Subrahmanian wrote:
>> gen9_write_dc_state() verifies DC_STATE_EN by reading it back, but it
>> was comparing the full register value instead of only the DC state bits.
>> That could trigger false failure messages and unnecessary retries when
>> unrelated bits differed.
>>
>> Use intel_de_rmw() to update only the DC state bits and compare only
>> the masked DC state bits in the read-back check and retry logic.
>>
>> BSpec: 49437,69115
>> Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
>> ---
>> .../i915/display/intel_display_power_well.c | 21 ++++++++-----------
>> 1 file changed, 9 insertions(+), 12 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
>> index 6fbfd46461b0..75471898e323 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
>> @@ -727,13 +727,13 @@ static void assert_can_disable_dc9(struct intel_display *display)
>> }
>>
>> static void gen9_write_dc_state(struct intel_display *display,
>> - u32 state)
>> + u32 state, u32 mask)
>> {
>> int rewrites = 0;
>> int rereads = 0;
>> u32 v;
>>
>> - intel_de_write(display, DC_STATE_EN, state);
>> + intel_de_rmw(display, DC_STATE_EN, mask, state);
> There is no need to change this to an RMW, since gen9_set_dc_state()
> computed the state passed to this function by the equivalent
>
> (intel_de_read(display, DC_STATE_EN) & ~mask) | state
>
>>
>> /* It has been observed that disabling the dc6 state sometimes
>> * doesn't stick and dmc keeps returning old value. Make sure
>> @@ -742,9 +742,8 @@ static void gen9_write_dc_state(struct intel_display *display,
>> */
>> do {
>> v = intel_de_read(display, DC_STATE_EN);
>> -
>> - if (v != state) {
>> - intel_de_write(display, DC_STATE_EN, state);
>> + if ((v & mask) != (state & mask)) {
>> + intel_de_rmw(display, DC_STATE_EN, mask, state);
>
> Could you provide the flags in the register causing an unexpected
> mismatch? I can only see bits that should preserve their state as
> written by the driver. The register has also some clear-on-write flags,
> like 'Display DC*CO State Status DSI', but not sure how even those can
> lead to a mismatch.
>
Thanks for the review.
I can see some RO bits status getting changed while read back.
In one case, I can see register read back value as 0x400 while
writing DC state 0.
In this case I can see DC state is 0,but other bit have changed.
>> rewrites++;
>> rereads = 0;
>> } else if (rereads++ > 5) {
>> @@ -753,16 +752,16 @@ static void gen9_write_dc_state(struct intel_display *display,
>>
>> } while (rewrites < 100);
>>
>> - if (v != state)
>> + if ((v & mask) != (state & mask))
>> drm_err(display->drm,
>> "Writing dc state to 0x%x failed, now 0x%x\n",
>> - state, v);
>> + state & mask, v & mask);
>>
>> /* Most of the times we need one retry, avoid spam */
>> if (rewrites > 1)
>> drm_dbg_kms(display->drm,
>> "Rewrote dc state to 0x%x %d times\n",
>> - state, rewrites);
>> + state & mask, rewrites);
>> }
>>
>> static u32 gen9_dc_mask(struct intel_display *display)
>> @@ -855,15 +854,13 @@ void gen9_set_dc_state(struct intel_display *display, u32 state)
>> if (!dc6_was_enabled && enable_dc6)
>> intel_dmc_update_dc6_allowed_count(display, true);
>>
>> - val &= ~mask;
>> - val |= state;
>>
>> - gen9_write_dc_state(display, val);
>> + gen9_write_dc_state(display, state, mask);
>>
>> if (!enable_dc6 && dc6_was_enabled)
>> intel_dmc_update_dc6_allowed_count(display, false);
>>
>> - power_domains->dc_state = val & mask;
>> + power_domains->dc_state = state & mask;
>> }
>>
>> static void tgl_enable_dc3co(struct intel_display *display)
>> --
>> 2.43.0
>>
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH] drm/i915/display: Use rmw in gen9_write_dc_state() to preserve non-DC bits
2026-05-07 5:47 ` Dibin Moolakadan Subrahmanian
@ 2026-05-07 6:36 ` Imre Deak
0 siblings, 0 replies; 20+ messages in thread
From: Imre Deak @ 2026-05-07 6:36 UTC (permalink / raw)
To: Dibin Moolakadan Subrahmanian
Cc: intel-gfx, intel-xe, ankit.k.nautiyal, uma.shankar
On Thu, May 07, 2026 at 11:17:36AM +0530, Dibin Moolakadan Subrahmanian wrote:
>
> On 06-05-2026 19:05, Imre Deak wrote:
> > On Wed, May 06, 2026 at 06:33:21PM +0530, Dibin Moolakadan Subrahmanian wrote:
> > > gen9_write_dc_state() verifies DC_STATE_EN by reading it back, but it
> > > was comparing the full register value instead of only the DC state bits.
> > > That could trigger false failure messages and unnecessary retries when
> > > unrelated bits differed.
> > >
> > > Use intel_de_rmw() to update only the DC state bits and compare only
> > > the masked DC state bits in the read-back check and retry logic.
> > >
> > > BSpec: 49437,69115
> > > Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
> > > ---
> > > .../i915/display/intel_display_power_well.c | 21 ++++++++-----------
> > > 1 file changed, 9 insertions(+), 12 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > > index 6fbfd46461b0..75471898e323 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > > @@ -727,13 +727,13 @@ static void assert_can_disable_dc9(struct intel_display *display)
> > > }
> > > static void gen9_write_dc_state(struct intel_display *display,
> > > - u32 state)
> > > + u32 state, u32 mask)
> > > {
> > > int rewrites = 0;
> > > int rereads = 0;
> > > u32 v;
> > > - intel_de_write(display, DC_STATE_EN, state);
> > > + intel_de_rmw(display, DC_STATE_EN, mask, state);
> > There is no need to change this to an RMW, since gen9_set_dc_state()
> > computed the state passed to this function by the equivalent
> >
> > (intel_de_read(display, DC_STATE_EN) & ~mask) | state
> >
> > > /* It has been observed that disabling the dc6 state sometimes
> > > * doesn't stick and dmc keeps returning old value. Make sure
> > > @@ -742,9 +742,8 @@ static void gen9_write_dc_state(struct intel_display *display,
> > > */
> > > do {
> > > v = intel_de_read(display, DC_STATE_EN);
> > > -
> > > - if (v != state) {
> > > - intel_de_write(display, DC_STATE_EN, state);
> > > + if ((v & mask) != (state & mask)) {
> > > + intel_de_rmw(display, DC_STATE_EN, mask, state);
> >
> > Could you provide the flags in the register causing an unexpected
> > mismatch? I can only see bits that should preserve their state as
> > written by the driver. The register has also some clear-on-write flags,
> > like 'Display DC*CO State Status DSI', but not sure how even those can
> > lead to a mismatch.
> >
> Thanks for the review. I can see some RO bits status getting changed
> while read back. In one case, I can see register read back value as
> 0x400 while writing DC state 0. In this case I can see DC state is
> 0,but other bit have changed.
I think there is no good reason to ignore spurious changes to any of the
non-RO flags. So I'd only mask out RO flags here before the comparison.
> > > rewrites++;
> > > rereads = 0;
> > > } else if (rereads++ > 5) {
> > > @@ -753,16 +752,16 @@ static void gen9_write_dc_state(struct intel_display *display,
> > > } while (rewrites < 100);
> > > - if (v != state)
> > > + if ((v & mask) != (state & mask))
> > > drm_err(display->drm,
> > > "Writing dc state to 0x%x failed, now 0x%x\n",
> > > - state, v);
> > > + state & mask, v & mask);
> > > /* Most of the times we need one retry, avoid spam */
> > > if (rewrites > 1)
> > > drm_dbg_kms(display->drm,
> > > "Rewrote dc state to 0x%x %d times\n",
> > > - state, rewrites);
> > > + state & mask, rewrites);
> > > }
> > > static u32 gen9_dc_mask(struct intel_display *display)
> > > @@ -855,15 +854,13 @@ void gen9_set_dc_state(struct intel_display *display, u32 state)
> > > if (!dc6_was_enabled && enable_dc6)
> > > intel_dmc_update_dc6_allowed_count(display, true);
> > > - val &= ~mask;
> > > - val |= state;
> > > - gen9_write_dc_state(display, val);
> > > + gen9_write_dc_state(display, state, mask);
> > > if (!enable_dc6 && dc6_was_enabled)
> > > intel_dmc_update_dc6_allowed_count(display, false);
> > > - power_domains->dc_state = val & mask;
> > > + power_domains->dc_state = state & mask;
> > > }
> > > static void tgl_enable_dc3co(struct intel_display *display)
> > > --
> > > 2.43.0
> > >
^ permalink raw reply [flat|nested] 20+ messages in thread