* [PATCH] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd
@ 2026-01-28 4:49 Suraj Kandpal
2026-01-28 4:56 ` ✓ CI.KUnit: success for " Patchwork
` (8 more replies)
0 siblings, 9 replies; 13+ messages in thread
From: Suraj Kandpal @ 2026-01-28 4:49 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: ankit.k.nautiyal, arun.r.murthy, Suraj Kandpal
Add a meaningful return to intel_dp_read_dsc_dpcd so tha we avoid
unwanted DPCD reads which are not needed once we know DSC DPCD
read fails. While we are at it remove the drm_err since we do not
shout error during intel_dp_detect phase since it may take time
to come up after pps_on is called for eDP scenario.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 24 +++++++++++++++---------
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 79fd3b8d8b25..d2ed8ec145a2 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4281,20 +4281,21 @@ static bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp)
return dprx & DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED;
}
-static void intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux,
- u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
+static int intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux,
+ u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
{
if (drm_dp_dpcd_read(aux, DP_DSC_SUPPORT, dsc_dpcd,
DP_DSC_RECEIVER_CAP_SIZE) < 0) {
- drm_err(aux->drm_dev,
- "Failed to read DPCD register 0x%x\n",
- DP_DSC_SUPPORT);
- return;
+ drm_dbg_kms(aux->drm_dev,
+ "Could not read DSC DPCD register 0x%x\n",
+ DP_DSC_SUPPORT);
+ return -EINVAL;
}
drm_dbg_kms(aux->drm_dev, "DSC DPCD: %*ph\n",
DP_DSC_RECEIVER_CAP_SIZE,
dsc_dpcd);
+ return 0;
}
static void init_dsc_overall_throughput_limits(struct intel_connector *connector, bool is_branch)
@@ -4345,8 +4346,11 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
if (dpcd_rev < DP_DPCD_REV_14)
return;
- intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
- connector->dp.dsc_dpcd);
+ if (intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
+ connector->dp.dsc_dpcd) < 0) {
+ drm_err(display->drm, "Failed to read DSC DPCD register\n");
+ return;
+ }
if (drm_dp_dpcd_readb(connector->dp.dsc_decompression_aux, DP_FEC_CAPABILITY,
&connector->dp.fec_capability) < 0) {
@@ -4376,7 +4380,9 @@ static void intel_edp_get_dsc_sink_cap(u8 edp_dpcd_rev, struct intel_connector *
if (edp_dpcd_rev < DP_EDP_14)
return;
- intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux, connector->dp.dsc_dpcd);
+ if (intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
+ connector->dp.dsc_dpcd) < 0)
+ return;
if (connector->dp.dsc_dpcd[0] & DP_DSC_DECOMPRESSION_IS_SUPPORTED)
init_dsc_overall_throughput_limits(connector, false);
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* ✓ CI.KUnit: success for drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd
2026-01-28 4:49 [PATCH] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd Suraj Kandpal
@ 2026-01-28 4:56 ` Patchwork
2026-01-28 5:31 ` ✓ Xe.CI.BAT: " Patchwork
` (7 subsequent siblings)
8 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-01-28 4:56 UTC (permalink / raw)
To: Suraj Kandpal; +Cc: intel-xe
== Series Details ==
Series: drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd
URL : https://patchwork.freedesktop.org/series/160734/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[04:55:09] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[04:55:14] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[04:55:45] Starting KUnit Kernel (1/1)...
[04:55:45] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[04:55:45] ================== guc_buf (11 subtests) ===================
[04:55:45] [PASSED] test_smallest
[04:55:45] [PASSED] test_largest
[04:55:45] [PASSED] test_granular
[04:55:45] [PASSED] test_unique
[04:55:45] [PASSED] test_overlap
[04:55:45] [PASSED] test_reusable
[04:55:45] [PASSED] test_too_big
[04:55:45] [PASSED] test_flush
[04:55:45] [PASSED] test_lookup
[04:55:45] [PASSED] test_data
[04:55:45] [PASSED] test_class
[04:55:45] ===================== [PASSED] guc_buf =====================
[04:55:45] =================== guc_dbm (7 subtests) ===================
[04:55:45] [PASSED] test_empty
[04:55:45] [PASSED] test_default
[04:55:45] ======================== test_size ========================
[04:55:45] [PASSED] 4
[04:55:45] [PASSED] 8
[04:55:45] [PASSED] 32
[04:55:45] [PASSED] 256
[04:55:45] ==================== [PASSED] test_size ====================
[04:55:45] ======================= test_reuse ========================
[04:55:45] [PASSED] 4
[04:55:45] [PASSED] 8
[04:55:45] [PASSED] 32
[04:55:45] [PASSED] 256
[04:55:45] =================== [PASSED] test_reuse ====================
[04:55:45] =================== test_range_overlap ====================
[04:55:45] [PASSED] 4
[04:55:45] [PASSED] 8
[04:55:45] [PASSED] 32
[04:55:45] [PASSED] 256
[04:55:45] =============== [PASSED] test_range_overlap ================
[04:55:45] =================== test_range_compact ====================
[04:55:45] [PASSED] 4
[04:55:45] [PASSED] 8
[04:55:45] [PASSED] 32
[04:55:45] [PASSED] 256
[04:55:45] =============== [PASSED] test_range_compact ================
[04:55:45] ==================== test_range_spare =====================
[04:55:45] [PASSED] 4
[04:55:45] [PASSED] 8
[04:55:45] [PASSED] 32
[04:55:45] [PASSED] 256
[04:55:45] ================ [PASSED] test_range_spare =================
[04:55:45] ===================== [PASSED] guc_dbm =====================
[04:55:45] =================== guc_idm (6 subtests) ===================
[04:55:45] [PASSED] bad_init
[04:55:45] [PASSED] no_init
[04:55:45] [PASSED] init_fini
[04:55:45] [PASSED] check_used
[04:55:45] [PASSED] check_quota
[04:55:45] [PASSED] check_all
[04:55:45] ===================== [PASSED] guc_idm =====================
[04:55:45] ================== no_relay (3 subtests) ===================
[04:55:45] [PASSED] xe_drops_guc2pf_if_not_ready
[04:55:45] [PASSED] xe_drops_guc2vf_if_not_ready
[04:55:45] [PASSED] xe_rejects_send_if_not_ready
[04:55:45] ==================== [PASSED] no_relay =====================
[04:55:45] ================== pf_relay (14 subtests) ==================
[04:55:45] [PASSED] pf_rejects_guc2pf_too_short
[04:55:45] [PASSED] pf_rejects_guc2pf_too_long
[04:55:45] [PASSED] pf_rejects_guc2pf_no_payload
[04:55:45] [PASSED] pf_fails_no_payload
[04:55:45] [PASSED] pf_fails_bad_origin
[04:55:45] [PASSED] pf_fails_bad_type
[04:55:45] [PASSED] pf_txn_reports_error
[04:55:45] [PASSED] pf_txn_sends_pf2guc
[04:55:45] [PASSED] pf_sends_pf2guc
[04:55:45] [SKIPPED] pf_loopback_nop
[04:55:45] [SKIPPED] pf_loopback_echo
[04:55:45] [SKIPPED] pf_loopback_fail
[04:55:45] [SKIPPED] pf_loopback_busy
[04:55:45] [SKIPPED] pf_loopback_retry
[04:55:45] ==================== [PASSED] pf_relay =====================
[04:55:45] ================== vf_relay (3 subtests) ===================
[04:55:45] [PASSED] vf_rejects_guc2vf_too_short
[04:55:45] [PASSED] vf_rejects_guc2vf_too_long
[04:55:45] [PASSED] vf_rejects_guc2vf_no_payload
[04:55:45] ==================== [PASSED] vf_relay =====================
[04:55:45] ================ pf_gt_config (6 subtests) =================
[04:55:45] [PASSED] fair_contexts_1vf
[04:55:45] [PASSED] fair_doorbells_1vf
[04:55:45] [PASSED] fair_ggtt_1vf
[04:55:45] ====================== fair_contexts ======================
[04:55:45] [PASSED] 1 VF
[04:55:45] [PASSED] 2 VFs
[04:55:45] [PASSED] 3 VFs
[04:55:45] [PASSED] 4 VFs
[04:55:45] [PASSED] 5 VFs
[04:55:45] [PASSED] 6 VFs
[04:55:45] [PASSED] 7 VFs
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[04:55:45] [PASSED] 9 VFs
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[04:55:45] [PASSED] 36 VFs
[04:55:45] [PASSED] 37 VFs
[04:55:45] [PASSED] 38 VFs
[04:55:45] [PASSED] 39 VFs
[04:55:45] [PASSED] 40 VFs
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[04:55:45] [PASSED] 42 VFs
[04:55:45] [PASSED] 43 VFs
[04:55:45] [PASSED] 44 VFs
[04:55:45] [PASSED] 45 VFs
[04:55:45] [PASSED] 46 VFs
[04:55:45] [PASSED] 47 VFs
[04:55:45] [PASSED] 48 VFs
[04:55:45] [PASSED] 49 VFs
[04:55:45] [PASSED] 50 VFs
[04:55:45] [PASSED] 51 VFs
[04:55:45] [PASSED] 52 VFs
[04:55:45] [PASSED] 53 VFs
[04:55:45] [PASSED] 54 VFs
[04:55:45] [PASSED] 55 VFs
[04:55:45] [PASSED] 56 VFs
[04:55:45] [PASSED] 57 VFs
[04:55:45] [PASSED] 58 VFs
[04:55:45] [PASSED] 59 VFs
[04:55:45] [PASSED] 60 VFs
[04:55:45] [PASSED] 61 VFs
[04:55:45] [PASSED] 62 VFs
[04:55:45] [PASSED] 63 VFs
[04:55:45] ================== [PASSED] fair_contexts ==================
[04:55:45] ===================== fair_doorbells ======================
[04:55:45] [PASSED] 1 VF
[04:55:45] [PASSED] 2 VFs
[04:55:45] [PASSED] 3 VFs
[04:55:45] [PASSED] 4 VFs
[04:55:45] [PASSED] 5 VFs
[04:55:45] [PASSED] 6 VFs
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[04:55:45] [PASSED] 8 VFs
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[04:55:45] [PASSED] 11 VFs
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[04:55:45] [PASSED] 33 VFs
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[04:55:45] [PASSED] 36 VFs
[04:55:45] [PASSED] 37 VFs
[04:55:45] [PASSED] 38 VFs
[04:55:45] [PASSED] 39 VFs
[04:55:45] [PASSED] 40 VFs
[04:55:45] [PASSED] 41 VFs
[04:55:45] [PASSED] 42 VFs
[04:55:45] [PASSED] 43 VFs
[04:55:45] [PASSED] 44 VFs
[04:55:45] [PASSED] 45 VFs
[04:55:45] [PASSED] 46 VFs
[04:55:45] [PASSED] 47 VFs
[04:55:45] [PASSED] 48 VFs
[04:55:45] [PASSED] 49 VFs
[04:55:45] [PASSED] 50 VFs
[04:55:45] [PASSED] 51 VFs
[04:55:45] [PASSED] 52 VFs
[04:55:45] [PASSED] 53 VFs
[04:55:45] [PASSED] 54 VFs
[04:55:45] [PASSED] 55 VFs
[04:55:45] [PASSED] 56 VFs
[04:55:45] [PASSED] 57 VFs
[04:55:45] [PASSED] 58 VFs
[04:55:45] [PASSED] 59 VFs
[04:55:45] [PASSED] 60 VFs
[04:55:45] [PASSED] 61 VFs
[04:55:45] [PASSED] 62 VFs
[04:55:45] [PASSED] 63 VFs
[04:55:45] ================= [PASSED] fair_doorbells ==================
[04:55:45] ======================== fair_ggtt ========================
[04:55:45] [PASSED] 1 VF
[04:55:45] [PASSED] 2 VFs
[04:55:45] [PASSED] 3 VFs
[04:55:45] [PASSED] 4 VFs
[04:55:45] [PASSED] 5 VFs
[04:55:45] [PASSED] 6 VFs
[04:55:45] [PASSED] 7 VFs
[04:55:45] [PASSED] 8 VFs
[04:55:45] [PASSED] 9 VFs
[04:55:45] [PASSED] 10 VFs
[04:55:45] [PASSED] 11 VFs
[04:55:45] [PASSED] 12 VFs
[04:55:45] [PASSED] 13 VFs
[04:55:45] [PASSED] 14 VFs
[04:55:45] [PASSED] 15 VFs
[04:55:45] [PASSED] 16 VFs
[04:55:45] [PASSED] 17 VFs
[04:55:45] [PASSED] 18 VFs
[04:55:45] [PASSED] 19 VFs
[04:55:45] [PASSED] 20 VFs
[04:55:45] [PASSED] 21 VFs
[04:55:45] [PASSED] 22 VFs
[04:55:45] [PASSED] 23 VFs
[04:55:45] [PASSED] 24 VFs
[04:55:45] [PASSED] 25 VFs
[04:55:45] [PASSED] 26 VFs
[04:55:45] [PASSED] 27 VFs
[04:55:45] [PASSED] 28 VFs
[04:55:45] [PASSED] 29 VFs
[04:55:45] [PASSED] 30 VFs
[04:55:45] [PASSED] 31 VFs
[04:55:45] [PASSED] 32 VFs
[04:55:45] [PASSED] 33 VFs
[04:55:45] [PASSED] 34 VFs
[04:55:45] [PASSED] 35 VFs
[04:55:45] [PASSED] 36 VFs
[04:55:45] [PASSED] 37 VFs
[04:55:45] [PASSED] 38 VFs
[04:55:45] [PASSED] 39 VFs
[04:55:45] [PASSED] 40 VFs
[04:55:45] [PASSED] 41 VFs
[04:55:45] [PASSED] 42 VFs
[04:55:45] [PASSED] 43 VFs
[04:55:45] [PASSED] 44 VFs
[04:55:45] [PASSED] 45 VFs
[04:55:45] [PASSED] 46 VFs
[04:55:45] [PASSED] 47 VFs
[04:55:45] [PASSED] 48 VFs
[04:55:45] [PASSED] 49 VFs
[04:55:45] [PASSED] 50 VFs
[04:55:45] [PASSED] 51 VFs
[04:55:45] [PASSED] 52 VFs
[04:55:45] [PASSED] 53 VFs
[04:55:45] [PASSED] 54 VFs
[04:55:45] [PASSED] 55 VFs
[04:55:45] [PASSED] 56 VFs
[04:55:45] [PASSED] 57 VFs
[04:55:45] [PASSED] 58 VFs
[04:55:45] [PASSED] 59 VFs
[04:55:45] [PASSED] 60 VFs
[04:55:45] [PASSED] 61 VFs
[04:55:45] [PASSED] 62 VFs
[04:55:45] [PASSED] 63 VFs
[04:55:45] ==================== [PASSED] fair_ggtt ====================
[04:55:45] ================== [PASSED] pf_gt_config ===================
[04:55:45] ===================== lmtt (1 subtest) =====================
[04:55:45] ======================== test_ops =========================
[04:55:45] [PASSED] 2-level
[04:55:45] [PASSED] multi-level
[04:55:45] ==================== [PASSED] test_ops =====================
[04:55:45] ====================== [PASSED] lmtt =======================
[04:55:45] ================= pf_service (11 subtests) =================
[04:55:45] [PASSED] pf_negotiate_any
[04:55:45] [PASSED] pf_negotiate_base_match
[04:55:45] [PASSED] pf_negotiate_base_newer
[04:55:45] [PASSED] pf_negotiate_base_next
[04:55:45] [SKIPPED] pf_negotiate_base_older
[04:55:45] [PASSED] pf_negotiate_base_prev
[04:55:45] [PASSED] pf_negotiate_latest_match
[04:55:45] [PASSED] pf_negotiate_latest_newer
[04:55:45] [PASSED] pf_negotiate_latest_next
[04:55:45] [SKIPPED] pf_negotiate_latest_older
[04:55:45] [SKIPPED] pf_negotiate_latest_prev
[04:55:45] =================== [PASSED] pf_service ====================
[04:55:45] ================= xe_guc_g2g (2 subtests) ==================
[04:55:45] ============== xe_live_guc_g2g_kunit_default ==============
[04:55:45] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[04:55:45] ============== xe_live_guc_g2g_kunit_allmem ===============
[04:55:45] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[04:55:45] =================== [SKIPPED] xe_guc_g2g ===================
[04:55:45] =================== xe_mocs (2 subtests) ===================
[04:55:45] ================ xe_live_mocs_kernel_kunit ================
[04:55:45] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[04:55:45] ================ xe_live_mocs_reset_kunit =================
[04:55:45] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[04:55:45] ==================== [SKIPPED] xe_mocs =====================
[04:55:45] ================= xe_migrate (2 subtests) ==================
[04:55:45] ================= xe_migrate_sanity_kunit =================
[04:55:45] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[04:55:45] ================== xe_validate_ccs_kunit ==================
[04:55:45] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[04:55:45] =================== [SKIPPED] xe_migrate ===================
[04:55:45] ================== xe_dma_buf (1 subtest) ==================
[04:55:45] ==================== xe_dma_buf_kunit =====================
[04:55:45] ================ [SKIPPED] xe_dma_buf_kunit ================
[04:55:45] =================== [SKIPPED] xe_dma_buf ===================
[04:55:45] ================= xe_bo_shrink (1 subtest) =================
[04:55:45] =================== xe_bo_shrink_kunit ====================
[04:55:45] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[04:55:45] ================== [SKIPPED] xe_bo_shrink ==================
[04:55:45] ==================== xe_bo (2 subtests) ====================
[04:55:45] ================== xe_ccs_migrate_kunit ===================
[04:55:45] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[04:55:45] ==================== xe_bo_evict_kunit ====================
[04:55:45] =============== [SKIPPED] xe_bo_evict_kunit ================
[04:55:45] ===================== [SKIPPED] xe_bo ======================
[04:55:45] ==================== args (13 subtests) ====================
[04:55:45] [PASSED] count_args_test
[04:55:45] [PASSED] call_args_example
[04:55:45] [PASSED] call_args_test
[04:55:45] [PASSED] drop_first_arg_example
[04:55:45] [PASSED] drop_first_arg_test
[04:55:45] [PASSED] first_arg_example
[04:55:45] [PASSED] first_arg_test
[04:55:45] [PASSED] last_arg_example
[04:55:45] [PASSED] last_arg_test
[04:55:45] [PASSED] pick_arg_example
[04:55:45] [PASSED] if_args_example
[04:55:45] [PASSED] if_args_test
[04:55:45] [PASSED] sep_comma_example
[04:55:45] ====================== [PASSED] args =======================
[04:55:45] =================== xe_pci (3 subtests) ====================
[04:55:45] ==================== check_graphics_ip ====================
[04:55:45] [PASSED] 12.00 Xe_LP
[04:55:45] [PASSED] 12.10 Xe_LP+
[04:55:45] [PASSED] 12.55 Xe_HPG
[04:55:45] [PASSED] 12.60 Xe_HPC
[04:55:45] [PASSED] 12.70 Xe_LPG
[04:55:45] [PASSED] 12.71 Xe_LPG
[04:55:45] [PASSED] 12.74 Xe_LPG+
[04:55:45] [PASSED] 20.01 Xe2_HPG
[04:55:45] [PASSED] 20.02 Xe2_HPG
[04:55:45] [PASSED] 20.04 Xe2_LPG
[04:55:45] [PASSED] 30.00 Xe3_LPG
[04:55:45] [PASSED] 30.01 Xe3_LPG
[04:55:45] [PASSED] 30.03 Xe3_LPG
[04:55:45] [PASSED] 30.04 Xe3_LPG
[04:55:45] [PASSED] 30.05 Xe3_LPG
[04:55:45] [PASSED] 35.11 Xe3p_XPC
[04:55:45] ================ [PASSED] check_graphics_ip ================
[04:55:45] ===================== check_media_ip ======================
[04:55:45] [PASSED] 12.00 Xe_M
[04:55:45] [PASSED] 12.55 Xe_HPM
[04:55:45] [PASSED] 13.00 Xe_LPM+
[04:55:45] [PASSED] 13.01 Xe2_HPM
[04:55:45] [PASSED] 20.00 Xe2_LPM
[04:55:45] [PASSED] 30.00 Xe3_LPM
[04:55:45] [PASSED] 30.02 Xe3_LPM
[04:55:45] [PASSED] 35.00 Xe3p_LPM
[04:55:45] [PASSED] 35.03 Xe3p_HPM
[04:55:45] ================= [PASSED] check_media_ip ==================
[04:55:45] =================== check_platform_desc ===================
[04:55:45] [PASSED] 0x9A60 (TIGERLAKE)
[04:55:45] [PASSED] 0x9A68 (TIGERLAKE)
[04:55:45] [PASSED] 0x9A70 (TIGERLAKE)
[04:55:45] [PASSED] 0x9A40 (TIGERLAKE)
[04:55:45] [PASSED] 0x9A49 (TIGERLAKE)
[04:55:45] [PASSED] 0x9A59 (TIGERLAKE)
[04:55:45] [PASSED] 0x9A78 (TIGERLAKE)
[04:55:45] [PASSED] 0x9AC0 (TIGERLAKE)
[04:55:45] [PASSED] 0x9AC9 (TIGERLAKE)
[04:55:45] [PASSED] 0x9AD9 (TIGERLAKE)
[04:55:45] [PASSED] 0x9AF8 (TIGERLAKE)
[04:55:45] [PASSED] 0x4C80 (ROCKETLAKE)
[04:55:45] [PASSED] 0x4C8A (ROCKETLAKE)
[04:55:45] [PASSED] 0x4C8B (ROCKETLAKE)
[04:55:45] [PASSED] 0x4C8C (ROCKETLAKE)
[04:55:45] [PASSED] 0x4C90 (ROCKETLAKE)
[04:55:45] [PASSED] 0x4C9A (ROCKETLAKE)
[04:55:45] [PASSED] 0x4680 (ALDERLAKE_S)
[04:55:45] [PASSED] 0x4682 (ALDERLAKE_S)
[04:55:45] [PASSED] 0x4688 (ALDERLAKE_S)
[04:55:45] [PASSED] 0x468A (ALDERLAKE_S)
[04:55:45] [PASSED] 0x468B (ALDERLAKE_S)
[04:55:45] [PASSED] 0x4690 (ALDERLAKE_S)
[04:55:45] [PASSED] 0x4692 (ALDERLAKE_S)
[04:55:45] [PASSED] 0x4693 (ALDERLAKE_S)
[04:55:45] [PASSED] 0x46A0 (ALDERLAKE_P)
[04:55:45] [PASSED] 0x46A1 (ALDERLAKE_P)
[04:55:45] [PASSED] 0x46A2 (ALDERLAKE_P)
[04:55:45] [PASSED] 0x46A3 (ALDERLAKE_P)
[04:55:45] [PASSED] 0x46A6 (ALDERLAKE_P)
[04:55:45] [PASSED] 0x46A8 (ALDERLAKE_P)
[04:55:45] [PASSED] 0x46AA (ALDERLAKE_P)
[04:55:45] [PASSED] 0x462A (ALDERLAKE_P)
[04:55:45] [PASSED] 0x4626 (ALDERLAKE_P)
[04:55:45] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[04:55:45] [PASSED] 0x46B0 (ALDERLAKE_P)
[04:55:45] [PASSED] 0x46B1 (ALDERLAKE_P)
[04:55:45] [PASSED] 0x46B2 (ALDERLAKE_P)
[04:55:45] [PASSED] 0x46B3 (ALDERLAKE_P)
[04:55:45] [PASSED] 0x46C0 (ALDERLAKE_P)
[04:55:45] [PASSED] 0x46C1 (ALDERLAKE_P)
[04:55:45] [PASSED] 0x46C2 (ALDERLAKE_P)
[04:55:45] [PASSED] 0x46C3 (ALDERLAKE_P)
[04:55:45] [PASSED] 0x46D0 (ALDERLAKE_N)
[04:55:45] [PASSED] 0x46D1 (ALDERLAKE_N)
[04:55:45] [PASSED] 0x46D2 (ALDERLAKE_N)
[04:55:45] [PASSED] 0x46D3 (ALDERLAKE_N)
[04:55:45] [PASSED] 0x46D4 (ALDERLAKE_N)
[04:55:45] [PASSED] 0xA721 (ALDERLAKE_P)
[04:55:45] [PASSED] 0xA7A1 (ALDERLAKE_P)
[04:55:45] [PASSED] 0xA7A9 (ALDERLAKE_P)
[04:55:45] [PASSED] 0xA7AC (ALDERLAKE_P)
[04:55:45] [PASSED] 0xA7AD (ALDERLAKE_P)
[04:55:45] [PASSED] 0xA720 (ALDERLAKE_P)
[04:55:45] [PASSED] 0xA7A0 (ALDERLAKE_P)
[04:55:45] [PASSED] 0xA7A8 (ALDERLAKE_P)
[04:55:45] [PASSED] 0xA7AA (ALDERLAKE_P)
[04:55:45] [PASSED] 0xA7AB (ALDERLAKE_P)
[04:55:45] [PASSED] 0xA780 (ALDERLAKE_S)
[04:55:45] [PASSED] 0xA781 (ALDERLAKE_S)
[04:55:45] [PASSED] 0xA782 (ALDERLAKE_S)
[04:55:45] [PASSED] 0xA783 (ALDERLAKE_S)
[04:55:45] [PASSED] 0xA788 (ALDERLAKE_S)
[04:55:45] [PASSED] 0xA789 (ALDERLAKE_S)
[04:55:45] [PASSED] 0xA78A (ALDERLAKE_S)
[04:55:45] [PASSED] 0xA78B (ALDERLAKE_S)
[04:55:45] [PASSED] 0x4905 (DG1)
[04:55:45] [PASSED] 0x4906 (DG1)
[04:55:45] [PASSED] 0x4907 (DG1)
[04:55:45] [PASSED] 0x4908 (DG1)
[04:55:45] [PASSED] 0x4909 (DG1)
[04:55:45] [PASSED] 0x56C0 (DG2)
[04:55:45] [PASSED] 0x56C2 (DG2)
[04:55:45] [PASSED] 0x56C1 (DG2)
[04:55:45] [PASSED] 0x7D51 (METEORLAKE)
[04:55:45] [PASSED] 0x7DD1 (METEORLAKE)
[04:55:45] [PASSED] 0x7D41 (METEORLAKE)
[04:55:45] [PASSED] 0x7D67 (METEORLAKE)
[04:55:45] [PASSED] 0xB640 (METEORLAKE)
[04:55:45] [PASSED] 0x56A0 (DG2)
[04:55:45] [PASSED] 0x56A1 (DG2)
[04:55:45] [PASSED] 0x56A2 (DG2)
[04:55:45] [PASSED] 0x56BE (DG2)
[04:55:45] [PASSED] 0x56BF (DG2)
[04:55:45] [PASSED] 0x5690 (DG2)
[04:55:45] [PASSED] 0x5691 (DG2)
[04:55:45] [PASSED] 0x5692 (DG2)
[04:55:45] [PASSED] 0x56A5 (DG2)
[04:55:45] [PASSED] 0x56A6 (DG2)
[04:55:45] [PASSED] 0x56B0 (DG2)
[04:55:45] [PASSED] 0x56B1 (DG2)
[04:55:45] [PASSED] 0x56BA (DG2)
[04:55:45] [PASSED] 0x56BB (DG2)
[04:55:45] [PASSED] 0x56BC (DG2)
[04:55:45] [PASSED] 0x56BD (DG2)
[04:55:45] [PASSED] 0x5693 (DG2)
[04:55:45] [PASSED] 0x5694 (DG2)
[04:55:45] [PASSED] 0x5695 (DG2)
[04:55:45] [PASSED] 0x56A3 (DG2)
[04:55:45] [PASSED] 0x56A4 (DG2)
[04:55:45] [PASSED] 0x56B2 (DG2)
[04:55:45] [PASSED] 0x56B3 (DG2)
[04:55:45] [PASSED] 0x5696 (DG2)
[04:55:45] [PASSED] 0x5697 (DG2)
[04:55:45] [PASSED] 0xB69 (PVC)
[04:55:45] [PASSED] 0xB6E (PVC)
[04:55:45] [PASSED] 0xBD4 (PVC)
[04:55:45] [PASSED] 0xBD5 (PVC)
[04:55:45] [PASSED] 0xBD6 (PVC)
[04:55:45] [PASSED] 0xBD7 (PVC)
[04:55:45] [PASSED] 0xBD8 (PVC)
[04:55:45] [PASSED] 0xBD9 (PVC)
[04:55:45] [PASSED] 0xBDA (PVC)
[04:55:45] [PASSED] 0xBDB (PVC)
[04:55:45] [PASSED] 0xBE0 (PVC)
[04:55:45] [PASSED] 0xBE1 (PVC)
[04:55:45] [PASSED] 0xBE5 (PVC)
[04:55:45] [PASSED] 0x7D40 (METEORLAKE)
[04:55:45] [PASSED] 0x7D45 (METEORLAKE)
[04:55:45] [PASSED] 0x7D55 (METEORLAKE)
[04:55:45] [PASSED] 0x7D60 (METEORLAKE)
[04:55:45] [PASSED] 0x7DD5 (METEORLAKE)
[04:55:45] [PASSED] 0x6420 (LUNARLAKE)
[04:55:45] [PASSED] 0x64A0 (LUNARLAKE)
[04:55:45] [PASSED] 0x64B0 (LUNARLAKE)
[04:55:45] [PASSED] 0xE202 (BATTLEMAGE)
[04:55:45] [PASSED] 0xE209 (BATTLEMAGE)
[04:55:45] [PASSED] 0xE20B (BATTLEMAGE)
[04:55:45] [PASSED] 0xE20C (BATTLEMAGE)
[04:55:45] [PASSED] 0xE20D (BATTLEMAGE)
[04:55:45] [PASSED] 0xE210 (BATTLEMAGE)
[04:55:45] [PASSED] 0xE211 (BATTLEMAGE)
[04:55:45] [PASSED] 0xE212 (BATTLEMAGE)
[04:55:45] [PASSED] 0xE216 (BATTLEMAGE)
[04:55:45] [PASSED] 0xE220 (BATTLEMAGE)
[04:55:45] [PASSED] 0xE221 (BATTLEMAGE)
[04:55:45] [PASSED] 0xE222 (BATTLEMAGE)
[04:55:45] [PASSED] 0xE223 (BATTLEMAGE)
[04:55:45] [PASSED] 0xB080 (PANTHERLAKE)
[04:55:45] [PASSED] 0xB081 (PANTHERLAKE)
[04:55:45] [PASSED] 0xB082 (PANTHERLAKE)
[04:55:45] [PASSED] 0xB083 (PANTHERLAKE)
[04:55:45] [PASSED] 0xB084 (PANTHERLAKE)
[04:55:45] [PASSED] 0xB085 (PANTHERLAKE)
[04:55:45] [PASSED] 0xB086 (PANTHERLAKE)
[04:55:45] [PASSED] 0xB087 (PANTHERLAKE)
[04:55:45] [PASSED] 0xB08F (PANTHERLAKE)
[04:55:45] [PASSED] 0xB090 (PANTHERLAKE)
[04:55:45] [PASSED] 0xB0A0 (PANTHERLAKE)
[04:55:45] [PASSED] 0xB0B0 (PANTHERLAKE)
[04:55:45] [PASSED] 0xFD80 (PANTHERLAKE)
[04:55:45] [PASSED] 0xFD81 (PANTHERLAKE)
[04:55:45] [PASSED] 0xD740 (NOVALAKE_S)
[04:55:45] [PASSED] 0xD741 (NOVALAKE_S)
[04:55:45] [PASSED] 0xD742 (NOVALAKE_S)
[04:55:45] [PASSED] 0xD743 (NOVALAKE_S)
[04:55:45] [PASSED] 0xD744 (NOVALAKE_S)
[04:55:45] [PASSED] 0xD745 (NOVALAKE_S)
[04:55:45] [PASSED] 0x674C (CRESCENTISLAND)
[04:55:45] =============== [PASSED] check_platform_desc ===============
[04:55:45] ===================== [PASSED] xe_pci ======================
[04:55:45] =================== xe_rtp (2 subtests) ====================
[04:55:45] =============== xe_rtp_process_to_sr_tests ================
[04:55:45] [PASSED] coalesce-same-reg
[04:55:45] [PASSED] no-match-no-add
[04:55:45] [PASSED] match-or
[04:55:45] [PASSED] match-or-xfail
[04:55:45] [PASSED] no-match-no-add-multiple-rules
[04:55:45] [PASSED] two-regs-two-entries
[04:55:45] [PASSED] clr-one-set-other
[04:55:45] [PASSED] set-field
[04:55:45] [PASSED] conflict-duplicate
[04:55:45] [PASSED] conflict-not-disjoint
[04:55:45] [PASSED] conflict-reg-type
[04:55:45] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[04:55:45] ================== xe_rtp_process_tests ===================
[04:55:45] [PASSED] active1
[04:55:45] [PASSED] active2
[04:55:45] [PASSED] active-inactive
[04:55:45] [PASSED] inactive-active
[04:55:45] [PASSED] inactive-1st_or_active-inactive
[04:55:45] [PASSED] inactive-2nd_or_active-inactive
[04:55:45] [PASSED] inactive-last_or_active-inactive
[04:55:45] [PASSED] inactive-no_or_active-inactive
[04:55:45] ============== [PASSED] xe_rtp_process_tests ===============
[04:55:45] ===================== [PASSED] xe_rtp ======================
[04:55:45] ==================== xe_wa (1 subtest) =====================
[04:55:45] ======================== xe_wa_gt =========================
[04:55:45] [PASSED] TIGERLAKE B0
[04:55:45] [PASSED] DG1 A0
[04:55:45] [PASSED] DG1 B0
[04:55:45] [PASSED] ALDERLAKE_S A0
[04:55:45] [PASSED] ALDERLAKE_S B0
[04:55:45] [PASSED] ALDERLAKE_S C0
[04:55:45] [PASSED] ALDERLAKE_S D0
[04:55:45] [PASSED] ALDERLAKE_P A0
[04:55:45] [PASSED] ALDERLAKE_P B0
[04:55:45] [PASSED] ALDERLAKE_P C0
[04:55:45] [PASSED] ALDERLAKE_S RPLS D0
[04:55:45] [PASSED] ALDERLAKE_P RPLU E0
[04:55:45] [PASSED] DG2 G10 C0
[04:55:45] [PASSED] DG2 G11 B1
[04:55:45] [PASSED] DG2 G12 A1
[04:55:45] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[04:55:45] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[04:55:45] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[04:55:45] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[04:55:45] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[04:55:45] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[04:55:45] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[04:55:45] ==================== [PASSED] xe_wa_gt =====================
[04:55:45] ====================== [PASSED] xe_wa ======================
[04:55:45] ============================================================
[04:55:45] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[04:55:46] Elapsed time: 36.150s total, 4.203s configuring, 31.480s building, 0.423s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[04:55:46] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[04:55:47] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[04:56:13] Starting KUnit Kernel (1/1)...
[04:56:13] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[04:56:13] ============ drm_test_pick_cmdline (2 subtests) ============
[04:56:13] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[04:56:13] =============== drm_test_pick_cmdline_named ===============
[04:56:13] [PASSED] NTSC
[04:56:13] [PASSED] NTSC-J
[04:56:13] [PASSED] PAL
[04:56:13] [PASSED] PAL-M
[04:56:13] =========== [PASSED] drm_test_pick_cmdline_named ===========
[04:56:13] ============== [PASSED] drm_test_pick_cmdline ==============
[04:56:13] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[04:56:13] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[04:56:13] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[04:56:13] =========== drm_validate_clone_mode (2 subtests) ===========
[04:56:13] ============== drm_test_check_in_clone_mode ===============
[04:56:13] [PASSED] in_clone_mode
[04:56:13] [PASSED] not_in_clone_mode
[04:56:13] ========== [PASSED] drm_test_check_in_clone_mode ===========
[04:56:13] =============== drm_test_check_valid_clones ===============
[04:56:13] [PASSED] not_in_clone_mode
[04:56:13] [PASSED] valid_clone
[04:56:13] [PASSED] invalid_clone
[04:56:13] =========== [PASSED] drm_test_check_valid_clones ===========
[04:56:13] ============= [PASSED] drm_validate_clone_mode =============
[04:56:13] ============= drm_validate_modeset (1 subtest) =============
[04:56:13] [PASSED] drm_test_check_connector_changed_modeset
[04:56:13] ============== [PASSED] drm_validate_modeset ===============
[04:56:13] ====== drm_test_bridge_get_current_state (2 subtests) ======
[04:56:13] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[04:56:13] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[04:56:13] ======== [PASSED] drm_test_bridge_get_current_state ========
[04:56:13] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[04:56:13] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[04:56:13] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[04:56:13] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[04:56:13] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[04:56:13] ============== drm_bridge_alloc (2 subtests) ===============
[04:56:13] [PASSED] drm_test_drm_bridge_alloc_basic
[04:56:13] [PASSED] drm_test_drm_bridge_alloc_get_put
[04:56:13] ================ [PASSED] drm_bridge_alloc =================
[04:56:13] ================== drm_buddy (9 subtests) ==================
[04:56:13] [PASSED] drm_test_buddy_alloc_limit
[04:56:13] [PASSED] drm_test_buddy_alloc_optimistic
[04:56:13] [PASSED] drm_test_buddy_alloc_pessimistic
[04:56:13] [PASSED] drm_test_buddy_alloc_pathological
[04:56:13] [PASSED] drm_test_buddy_alloc_contiguous
[04:56:13] [PASSED] drm_test_buddy_alloc_clear
[04:56:13] [PASSED] drm_test_buddy_alloc_range_bias
[04:56:13] [PASSED] drm_test_buddy_fragmentation_performance
[04:56:13] [PASSED] drm_test_buddy_alloc_exceeds_max_order
[04:56:13] ==================== [PASSED] drm_buddy ====================
[04:56:13] ============= drm_cmdline_parser (40 subtests) =============
[04:56:13] [PASSED] drm_test_cmdline_force_d_only
[04:56:13] [PASSED] drm_test_cmdline_force_D_only_dvi
[04:56:13] [PASSED] drm_test_cmdline_force_D_only_hdmi
[04:56:13] [PASSED] drm_test_cmdline_force_D_only_not_digital
[04:56:13] [PASSED] drm_test_cmdline_force_e_only
[04:56:13] [PASSED] drm_test_cmdline_res
[04:56:13] [PASSED] drm_test_cmdline_res_vesa
[04:56:13] [PASSED] drm_test_cmdline_res_vesa_rblank
[04:56:13] [PASSED] drm_test_cmdline_res_rblank
[04:56:13] [PASSED] drm_test_cmdline_res_bpp
[04:56:13] [PASSED] drm_test_cmdline_res_refresh
[04:56:13] [PASSED] drm_test_cmdline_res_bpp_refresh
[04:56:13] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[04:56:13] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[04:56:13] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[04:56:13] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[04:56:13] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[04:56:13] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[04:56:13] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[04:56:13] [PASSED] drm_test_cmdline_res_margins_force_on
[04:56:13] [PASSED] drm_test_cmdline_res_vesa_margins
[04:56:13] [PASSED] drm_test_cmdline_name
[04:56:13] [PASSED] drm_test_cmdline_name_bpp
[04:56:13] [PASSED] drm_test_cmdline_name_option
[04:56:13] [PASSED] drm_test_cmdline_name_bpp_option
[04:56:13] [PASSED] drm_test_cmdline_rotate_0
[04:56:13] [PASSED] drm_test_cmdline_rotate_90
[04:56:13] [PASSED] drm_test_cmdline_rotate_180
[04:56:13] [PASSED] drm_test_cmdline_rotate_270
[04:56:13] [PASSED] drm_test_cmdline_hmirror
[04:56:13] [PASSED] drm_test_cmdline_vmirror
[04:56:13] [PASSED] drm_test_cmdline_margin_options
[04:56:13] [PASSED] drm_test_cmdline_multiple_options
[04:56:13] [PASSED] drm_test_cmdline_bpp_extra_and_option
[04:56:13] [PASSED] drm_test_cmdline_extra_and_option
[04:56:13] [PASSED] drm_test_cmdline_freestanding_options
[04:56:13] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[04:56:13] [PASSED] drm_test_cmdline_panel_orientation
[04:56:13] ================ drm_test_cmdline_invalid =================
[04:56:13] [PASSED] margin_only
[04:56:13] [PASSED] interlace_only
[04:56:13] [PASSED] res_missing_x
[04:56:13] [PASSED] res_missing_y
[04:56:13] [PASSED] res_bad_y
[04:56:13] [PASSED] res_missing_y_bpp
[04:56:13] [PASSED] res_bad_bpp
[04:56:13] [PASSED] res_bad_refresh
[04:56:13] [PASSED] res_bpp_refresh_force_on_off
[04:56:13] [PASSED] res_invalid_mode
[04:56:13] [PASSED] res_bpp_wrong_place_mode
[04:56:13] [PASSED] name_bpp_refresh
[04:56:13] [PASSED] name_refresh
[04:56:13] [PASSED] name_refresh_wrong_mode
[04:56:13] [PASSED] name_refresh_invalid_mode
[04:56:13] [PASSED] rotate_multiple
[04:56:13] [PASSED] rotate_invalid_val
[04:56:13] [PASSED] rotate_truncated
[04:56:13] [PASSED] invalid_option
[04:56:13] [PASSED] invalid_tv_option
[04:56:13] [PASSED] truncated_tv_option
[04:56:13] ============ [PASSED] drm_test_cmdline_invalid =============
[04:56:13] =============== drm_test_cmdline_tv_options ===============
[04:56:13] [PASSED] NTSC
[04:56:13] [PASSED] NTSC_443
[04:56:13] [PASSED] NTSC_J
[04:56:13] [PASSED] PAL
[04:56:13] [PASSED] PAL_M
[04:56:13] [PASSED] PAL_N
[04:56:13] [PASSED] SECAM
[04:56:13] [PASSED] MONO_525
[04:56:13] [PASSED] MONO_625
[04:56:13] =========== [PASSED] drm_test_cmdline_tv_options ===========
[04:56:13] =============== [PASSED] drm_cmdline_parser ================
[04:56:13] ========== drmm_connector_hdmi_init (20 subtests) ==========
[04:56:13] [PASSED] drm_test_connector_hdmi_init_valid
[04:56:13] [PASSED] drm_test_connector_hdmi_init_bpc_8
[04:56:13] [PASSED] drm_test_connector_hdmi_init_bpc_10
[04:56:13] [PASSED] drm_test_connector_hdmi_init_bpc_12
[04:56:13] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[04:56:13] [PASSED] drm_test_connector_hdmi_init_bpc_null
[04:56:13] [PASSED] drm_test_connector_hdmi_init_formats_empty
[04:56:13] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[04:56:13] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[04:56:13] [PASSED] supported_formats=0x9 yuv420_allowed=1
[04:56:13] [PASSED] supported_formats=0x9 yuv420_allowed=0
[04:56:13] [PASSED] supported_formats=0x3 yuv420_allowed=1
[04:56:13] [PASSED] supported_formats=0x3 yuv420_allowed=0
[04:56:13] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[04:56:13] [PASSED] drm_test_connector_hdmi_init_null_ddc
[04:56:13] [PASSED] drm_test_connector_hdmi_init_null_product
[04:56:13] [PASSED] drm_test_connector_hdmi_init_null_vendor
[04:56:13] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[04:56:13] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[04:56:13] [PASSED] drm_test_connector_hdmi_init_product_valid
[04:56:13] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[04:56:13] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[04:56:13] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[04:56:13] ========= drm_test_connector_hdmi_init_type_valid =========
[04:56:13] [PASSED] HDMI-A
[04:56:13] [PASSED] HDMI-B
[04:56:13] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[04:56:13] ======== drm_test_connector_hdmi_init_type_invalid ========
[04:56:13] [PASSED] Unknown
[04:56:13] [PASSED] VGA
[04:56:13] [PASSED] DVI-I
[04:56:13] [PASSED] DVI-D
[04:56:13] [PASSED] DVI-A
[04:56:13] [PASSED] Composite
[04:56:13] [PASSED] SVIDEO
[04:56:13] [PASSED] LVDS
[04:56:13] [PASSED] Component
[04:56:13] [PASSED] DIN
[04:56:13] [PASSED] DP
[04:56:13] [PASSED] TV
[04:56:13] [PASSED] eDP
[04:56:13] [PASSED] Virtual
[04:56:13] [PASSED] DSI
[04:56:13] [PASSED] DPI
[04:56:13] [PASSED] Writeback
[04:56:13] [PASSED] SPI
[04:56:13] [PASSED] USB
[04:56:13] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[04:56:13] ============ [PASSED] drmm_connector_hdmi_init =============
[04:56:13] ============= drmm_connector_init (3 subtests) =============
[04:56:13] [PASSED] drm_test_drmm_connector_init
[04:56:13] [PASSED] drm_test_drmm_connector_init_null_ddc
[04:56:13] ========= drm_test_drmm_connector_init_type_valid =========
[04:56:13] [PASSED] Unknown
[04:56:13] [PASSED] VGA
[04:56:13] [PASSED] DVI-I
[04:56:13] [PASSED] DVI-D
[04:56:13] [PASSED] DVI-A
[04:56:13] [PASSED] Composite
[04:56:13] [PASSED] SVIDEO
[04:56:13] [PASSED] LVDS
[04:56:13] [PASSED] Component
[04:56:13] [PASSED] DIN
[04:56:13] [PASSED] DP
[04:56:13] [PASSED] HDMI-A
[04:56:13] [PASSED] HDMI-B
[04:56:13] [PASSED] TV
[04:56:13] [PASSED] eDP
[04:56:13] [PASSED] Virtual
[04:56:13] [PASSED] DSI
[04:56:13] [PASSED] DPI
[04:56:13] [PASSED] Writeback
[04:56:13] [PASSED] SPI
[04:56:13] [PASSED] USB
[04:56:13] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[04:56:13] =============== [PASSED] drmm_connector_init ===============
[04:56:13] ========= drm_connector_dynamic_init (6 subtests) ==========
[04:56:13] [PASSED] drm_test_drm_connector_dynamic_init
[04:56:13] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[04:56:13] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[04:56:13] [PASSED] drm_test_drm_connector_dynamic_init_properties
[04:56:13] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[04:56:13] [PASSED] Unknown
[04:56:13] [PASSED] VGA
[04:56:13] [PASSED] DVI-I
[04:56:13] [PASSED] DVI-D
[04:56:13] [PASSED] DVI-A
[04:56:13] [PASSED] Composite
[04:56:13] [PASSED] SVIDEO
[04:56:13] [PASSED] LVDS
[04:56:13] [PASSED] Component
[04:56:13] [PASSED] DIN
[04:56:13] [PASSED] DP
[04:56:13] [PASSED] HDMI-A
[04:56:13] [PASSED] HDMI-B
[04:56:13] [PASSED] TV
[04:56:13] [PASSED] eDP
[04:56:13] [PASSED] Virtual
[04:56:13] [PASSED] DSI
[04:56:13] [PASSED] DPI
[04:56:13] [PASSED] Writeback
[04:56:13] [PASSED] SPI
[04:56:13] [PASSED] USB
[04:56:13] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[04:56:13] ======== drm_test_drm_connector_dynamic_init_name =========
[04:56:13] [PASSED] Unknown
[04:56:13] [PASSED] VGA
[04:56:13] [PASSED] DVI-I
[04:56:13] [PASSED] DVI-D
[04:56:13] [PASSED] DVI-A
[04:56:13] [PASSED] Composite
[04:56:13] [PASSED] SVIDEO
[04:56:13] [PASSED] LVDS
[04:56:13] [PASSED] Component
[04:56:13] [PASSED] DIN
[04:56:13] [PASSED] DP
[04:56:13] [PASSED] HDMI-A
[04:56:13] [PASSED] HDMI-B
[04:56:13] [PASSED] TV
[04:56:13] [PASSED] eDP
[04:56:13] [PASSED] Virtual
[04:56:13] [PASSED] DSI
[04:56:13] [PASSED] DPI
[04:56:13] [PASSED] Writeback
[04:56:13] [PASSED] SPI
[04:56:13] [PASSED] USB
[04:56:13] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[04:56:13] =========== [PASSED] drm_connector_dynamic_init ============
[04:56:13] ==== drm_connector_dynamic_register_early (4 subtests) =====
[04:56:13] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[04:56:13] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[04:56:13] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[04:56:13] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[04:56:13] ====== [PASSED] drm_connector_dynamic_register_early =======
[04:56:13] ======= drm_connector_dynamic_register (7 subtests) ========
[04:56:13] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[04:56:13] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[04:56:13] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[04:56:13] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[04:56:13] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[04:56:13] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[04:56:13] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[04:56:13] ========= [PASSED] drm_connector_dynamic_register ==========
[04:56:13] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[04:56:13] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[04:56:13] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[04:56:13] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[04:56:13] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[04:56:13] ========== drm_test_get_tv_mode_from_name_valid ===========
[04:56:13] [PASSED] NTSC
[04:56:13] [PASSED] NTSC-443
[04:56:13] [PASSED] NTSC-J
[04:56:13] [PASSED] PAL
[04:56:13] [PASSED] PAL-M
[04:56:13] [PASSED] PAL-N
[04:56:13] [PASSED] SECAM
[04:56:13] [PASSED] Mono
[04:56:13] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[04:56:13] [PASSED] drm_test_get_tv_mode_from_name_truncated
[04:56:13] ============ [PASSED] drm_get_tv_mode_from_name ============
[04:56:13] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[04:56:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[04:56:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[04:56:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[04:56:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[04:56:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[04:56:13] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[04:56:13] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[04:56:13] [PASSED] VIC 96
[04:56:13] [PASSED] VIC 97
[04:56:13] [PASSED] VIC 101
[04:56:13] [PASSED] VIC 102
[04:56:13] [PASSED] VIC 106
[04:56:13] [PASSED] VIC 107
[04:56:13] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[04:56:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[04:56:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[04:56:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[04:56:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[04:56:13] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[04:56:13] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[04:56:13] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[04:56:13] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[04:56:13] [PASSED] Automatic
[04:56:13] [PASSED] Full
[04:56:13] [PASSED] Limited 16:235
[04:56:13] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[04:56:13] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[04:56:13] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[04:56:13] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[04:56:13] === drm_test_drm_hdmi_connector_get_output_format_name ====
[04:56:13] [PASSED] RGB
[04:56:13] [PASSED] YUV 4:2:0
[04:56:13] [PASSED] YUV 4:2:2
[04:56:13] [PASSED] YUV 4:4:4
[04:56:13] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[04:56:13] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[04:56:13] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[04:56:13] ============= drm_damage_helper (21 subtests) ==============
[04:56:13] [PASSED] drm_test_damage_iter_no_damage
[04:56:13] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[04:56:13] [PASSED] drm_test_damage_iter_no_damage_src_moved
[04:56:13] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[04:56:13] [PASSED] drm_test_damage_iter_no_damage_not_visible
[04:56:13] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[04:56:13] [PASSED] drm_test_damage_iter_no_damage_no_fb
[04:56:13] [PASSED] drm_test_damage_iter_simple_damage
[04:56:13] [PASSED] drm_test_damage_iter_single_damage
[04:56:13] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[04:56:13] [PASSED] drm_test_damage_iter_single_damage_outside_src
[04:56:13] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[04:56:13] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[04:56:13] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[04:56:13] [PASSED] drm_test_damage_iter_single_damage_src_moved
[04:56:13] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[04:56:13] [PASSED] drm_test_damage_iter_damage
[04:56:13] [PASSED] drm_test_damage_iter_damage_one_intersect
[04:56:13] [PASSED] drm_test_damage_iter_damage_one_outside
[04:56:13] [PASSED] drm_test_damage_iter_damage_src_moved
[04:56:13] [PASSED] drm_test_damage_iter_damage_not_visible
[04:56:13] ================ [PASSED] drm_damage_helper ================
[04:56:13] ============== drm_dp_mst_helper (3 subtests) ==============
[04:56:13] ============== drm_test_dp_mst_calc_pbn_mode ==============
[04:56:13] [PASSED] Clock 154000 BPP 30 DSC disabled
[04:56:13] [PASSED] Clock 234000 BPP 30 DSC disabled
[04:56:13] [PASSED] Clock 297000 BPP 24 DSC disabled
[04:56:13] [PASSED] Clock 332880 BPP 24 DSC enabled
[04:56:13] [PASSED] Clock 324540 BPP 24 DSC enabled
[04:56:13] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[04:56:13] ============== drm_test_dp_mst_calc_pbn_div ===============
[04:56:13] [PASSED] Link rate 2000000 lane count 4
[04:56:13] [PASSED] Link rate 2000000 lane count 2
[04:56:13] [PASSED] Link rate 2000000 lane count 1
[04:56:13] [PASSED] Link rate 1350000 lane count 4
[04:56:13] [PASSED] Link rate 1350000 lane count 2
[04:56:13] [PASSED] Link rate 1350000 lane count 1
[04:56:13] [PASSED] Link rate 1000000 lane count 4
[04:56:13] [PASSED] Link rate 1000000 lane count 2
[04:56:13] [PASSED] Link rate 1000000 lane count 1
[04:56:13] [PASSED] Link rate 810000 lane count 4
[04:56:13] [PASSED] Link rate 810000 lane count 2
[04:56:13] [PASSED] Link rate 810000 lane count 1
[04:56:13] [PASSED] Link rate 540000 lane count 4
[04:56:13] [PASSED] Link rate 540000 lane count 2
[04:56:13] [PASSED] Link rate 540000 lane count 1
[04:56:13] [PASSED] Link rate 270000 lane count 4
[04:56:13] [PASSED] Link rate 270000 lane count 2
[04:56:13] [PASSED] Link rate 270000 lane count 1
[04:56:13] [PASSED] Link rate 162000 lane count 4
[04:56:13] [PASSED] Link rate 162000 lane count 2
[04:56:13] [PASSED] Link rate 162000 lane count 1
[04:56:13] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[04:56:13] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[04:56:13] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[04:56:13] [PASSED] DP_POWER_UP_PHY with port number
[04:56:13] [PASSED] DP_POWER_DOWN_PHY with port number
[04:56:13] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[04:56:13] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[04:56:13] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[04:56:13] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[04:56:13] [PASSED] DP_QUERY_PAYLOAD with port number
[04:56:13] [PASSED] DP_QUERY_PAYLOAD with VCPI
[04:56:13] [PASSED] DP_REMOTE_DPCD_READ with port number
[04:56:13] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[04:56:13] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[04:56:13] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[04:56:13] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[04:56:13] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[04:56:13] [PASSED] DP_REMOTE_I2C_READ with port number
[04:56:13] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[04:56:13] [PASSED] DP_REMOTE_I2C_READ with transactions array
[04:56:13] [PASSED] DP_REMOTE_I2C_WRITE with port number
[04:56:13] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[04:56:13] [PASSED] DP_REMOTE_I2C_WRITE with data array
[04:56:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[04:56:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[04:56:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[04:56:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[04:56:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[04:56:13] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[04:56:13] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[04:56:13] ================ [PASSED] drm_dp_mst_helper ================
[04:56:13] ================== drm_exec (7 subtests) ===================
[04:56:13] [PASSED] sanitycheck
[04:56:13] [PASSED] test_lock
[04:56:13] [PASSED] test_lock_unlock
[04:56:13] [PASSED] test_duplicates
[04:56:13] [PASSED] test_prepare
[04:56:13] [PASSED] test_prepare_array
[04:56:13] [PASSED] test_multiple_loops
[04:56:13] ==================== [PASSED] drm_exec =====================
[04:56:13] =========== drm_format_helper_test (17 subtests) ===========
[04:56:13] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[04:56:13] [PASSED] single_pixel_source_buffer
[04:56:13] [PASSED] single_pixel_clip_rectangle
[04:56:13] [PASSED] well_known_colors
[04:56:13] [PASSED] destination_pitch
[04:56:13] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[04:56:13] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[04:56:13] [PASSED] single_pixel_source_buffer
[04:56:13] [PASSED] single_pixel_clip_rectangle
[04:56:13] [PASSED] well_known_colors
[04:56:13] [PASSED] destination_pitch
[04:56:13] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[04:56:13] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[04:56:13] [PASSED] single_pixel_source_buffer
[04:56:13] [PASSED] single_pixel_clip_rectangle
[04:56:13] [PASSED] well_known_colors
[04:56:13] [PASSED] destination_pitch
[04:56:13] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[04:56:13] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[04:56:13] [PASSED] single_pixel_source_buffer
[04:56:13] [PASSED] single_pixel_clip_rectangle
[04:56:13] [PASSED] well_known_colors
[04:56:13] [PASSED] destination_pitch
[04:56:13] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[04:56:13] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[04:56:13] [PASSED] single_pixel_source_buffer
[04:56:13] [PASSED] single_pixel_clip_rectangle
[04:56:13] [PASSED] well_known_colors
[04:56:13] [PASSED] destination_pitch
[04:56:13] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[04:56:13] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[04:56:13] [PASSED] single_pixel_source_buffer
[04:56:13] [PASSED] single_pixel_clip_rectangle
[04:56:13] [PASSED] well_known_colors
[04:56:13] [PASSED] destination_pitch
[04:56:13] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[04:56:13] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[04:56:13] [PASSED] single_pixel_source_buffer
[04:56:13] [PASSED] single_pixel_clip_rectangle
[04:56:13] [PASSED] well_known_colors
[04:56:13] [PASSED] destination_pitch
[04:56:13] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[04:56:13] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[04:56:13] [PASSED] single_pixel_source_buffer
[04:56:13] [PASSED] single_pixel_clip_rectangle
[04:56:13] [PASSED] well_known_colors
[04:56:13] [PASSED] destination_pitch
[04:56:13] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[04:56:13] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[04:56:13] [PASSED] single_pixel_source_buffer
[04:56:13] [PASSED] single_pixel_clip_rectangle
[04:56:13] [PASSED] well_known_colors
[04:56:13] [PASSED] destination_pitch
[04:56:13] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[04:56:13] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[04:56:13] [PASSED] single_pixel_source_buffer
[04:56:13] [PASSED] single_pixel_clip_rectangle
[04:56:13] [PASSED] well_known_colors
[04:56:13] [PASSED] destination_pitch
[04:56:13] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[04:56:13] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[04:56:13] [PASSED] single_pixel_source_buffer
[04:56:13] [PASSED] single_pixel_clip_rectangle
[04:56:13] [PASSED] well_known_colors
[04:56:13] [PASSED] destination_pitch
[04:56:13] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[04:56:13] ============== drm_test_fb_xrgb8888_to_mono ===============
[04:56:13] [PASSED] single_pixel_source_buffer
[04:56:13] [PASSED] single_pixel_clip_rectangle
[04:56:13] [PASSED] well_known_colors
[04:56:13] [PASSED] destination_pitch
[04:56:13] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[04:56:13] ==================== drm_test_fb_swab =====================
[04:56:13] [PASSED] single_pixel_source_buffer
[04:56:13] [PASSED] single_pixel_clip_rectangle
[04:56:13] [PASSED] well_known_colors
[04:56:13] [PASSED] destination_pitch
[04:56:13] ================ [PASSED] drm_test_fb_swab =================
[04:56:13] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[04:56:13] [PASSED] single_pixel_source_buffer
[04:56:13] [PASSED] single_pixel_clip_rectangle
[04:56:13] [PASSED] well_known_colors
[04:56:13] [PASSED] destination_pitch
[04:56:13] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[04:56:13] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[04:56:13] [PASSED] single_pixel_source_buffer
[04:56:13] [PASSED] single_pixel_clip_rectangle
[04:56:13] [PASSED] well_known_colors
[04:56:13] [PASSED] destination_pitch
[04:56:13] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[04:56:13] ================= drm_test_fb_clip_offset =================
[04:56:13] [PASSED] pass through
[04:56:13] [PASSED] horizontal offset
[04:56:13] [PASSED] vertical offset
[04:56:13] [PASSED] horizontal and vertical offset
[04:56:13] [PASSED] horizontal offset (custom pitch)
[04:56:13] [PASSED] vertical offset (custom pitch)
[04:56:13] [PASSED] horizontal and vertical offset (custom pitch)
[04:56:13] ============= [PASSED] drm_test_fb_clip_offset =============
[04:56:13] =================== drm_test_fb_memcpy ====================
[04:56:13] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[04:56:13] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[04:56:13] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[04:56:13] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[04:56:13] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[04:56:13] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[04:56:13] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[04:56:13] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[04:56:13] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[04:56:13] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[04:56:13] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[04:56:13] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[04:56:13] =============== [PASSED] drm_test_fb_memcpy ================
[04:56:13] ============= [PASSED] drm_format_helper_test ==============
[04:56:13] ================= drm_format (18 subtests) =================
[04:56:13] [PASSED] drm_test_format_block_width_invalid
[04:56:13] [PASSED] drm_test_format_block_width_one_plane
[04:56:13] [PASSED] drm_test_format_block_width_two_plane
[04:56:13] [PASSED] drm_test_format_block_width_three_plane
[04:56:13] [PASSED] drm_test_format_block_width_tiled
[04:56:13] [PASSED] drm_test_format_block_height_invalid
[04:56:13] [PASSED] drm_test_format_block_height_one_plane
[04:56:13] [PASSED] drm_test_format_block_height_two_plane
[04:56:13] [PASSED] drm_test_format_block_height_three_plane
[04:56:13] [PASSED] drm_test_format_block_height_tiled
[04:56:13] [PASSED] drm_test_format_min_pitch_invalid
[04:56:13] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[04:56:13] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[04:56:13] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[04:56:13] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[04:56:13] [PASSED] drm_test_format_min_pitch_two_plane
[04:56:13] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[04:56:13] [PASSED] drm_test_format_min_pitch_tiled
[04:56:13] =================== [PASSED] drm_format ====================
[04:56:13] ============== drm_framebuffer (10 subtests) ===============
[04:56:13] ========== drm_test_framebuffer_check_src_coords ==========
[04:56:13] [PASSED] Success: source fits into fb
[04:56:13] [PASSED] Fail: overflowing fb with x-axis coordinate
[04:56:13] [PASSED] Fail: overflowing fb with y-axis coordinate
[04:56:13] [PASSED] Fail: overflowing fb with source width
[04:56:13] [PASSED] Fail: overflowing fb with source height
[04:56:13] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[04:56:13] [PASSED] drm_test_framebuffer_cleanup
[04:56:13] =============== drm_test_framebuffer_create ===============
[04:56:13] [PASSED] ABGR8888 normal sizes
[04:56:13] [PASSED] ABGR8888 max sizes
[04:56:13] [PASSED] ABGR8888 pitch greater than min required
[04:56:13] [PASSED] ABGR8888 pitch less than min required
[04:56:13] [PASSED] ABGR8888 Invalid width
[04:56:13] [PASSED] ABGR8888 Invalid buffer handle
[04:56:13] [PASSED] No pixel format
[04:56:13] [PASSED] ABGR8888 Width 0
[04:56:13] [PASSED] ABGR8888 Height 0
[04:56:13] [PASSED] ABGR8888 Out of bound height * pitch combination
[04:56:13] [PASSED] ABGR8888 Large buffer offset
[04:56:13] [PASSED] ABGR8888 Buffer offset for inexistent plane
[04:56:13] [PASSED] ABGR8888 Invalid flag
[04:56:13] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[04:56:13] [PASSED] ABGR8888 Valid buffer modifier
[04:56:13] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[04:56:13] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[04:56:13] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[04:56:13] [PASSED] NV12 Normal sizes
[04:56:13] [PASSED] NV12 Max sizes
[04:56:13] [PASSED] NV12 Invalid pitch
[04:56:13] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[04:56:13] [PASSED] NV12 different modifier per-plane
[04:56:13] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[04:56:13] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[04:56:13] [PASSED] NV12 Modifier for inexistent plane
[04:56:13] [PASSED] NV12 Handle for inexistent plane
[04:56:13] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[04:56:13] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[04:56:13] [PASSED] YVU420 Normal sizes
[04:56:13] [PASSED] YVU420 Max sizes
[04:56:13] [PASSED] YVU420 Invalid pitch
[04:56:13] [PASSED] YVU420 Different pitches
[04:56:13] [PASSED] YVU420 Different buffer offsets/pitches
[04:56:13] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[04:56:13] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[04:56:13] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[04:56:13] [PASSED] YVU420 Valid modifier
[04:56:13] [PASSED] YVU420 Different modifiers per plane
[04:56:13] [PASSED] YVU420 Modifier for inexistent plane
[04:56:13] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[04:56:13] [PASSED] X0L2 Normal sizes
[04:56:13] [PASSED] X0L2 Max sizes
[04:56:13] [PASSED] X0L2 Invalid pitch
[04:56:13] [PASSED] X0L2 Pitch greater than minimum required
[04:56:13] [PASSED] X0L2 Handle for inexistent plane
[04:56:13] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[04:56:13] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[04:56:13] [PASSED] X0L2 Valid modifier
[04:56:13] [PASSED] X0L2 Modifier for inexistent plane
[04:56:13] =========== [PASSED] drm_test_framebuffer_create ===========
[04:56:13] [PASSED] drm_test_framebuffer_free
[04:56:13] [PASSED] drm_test_framebuffer_init
[04:56:13] [PASSED] drm_test_framebuffer_init_bad_format
[04:56:13] [PASSED] drm_test_framebuffer_init_dev_mismatch
[04:56:13] [PASSED] drm_test_framebuffer_lookup
[04:56:13] [PASSED] drm_test_framebuffer_lookup_inexistent
[04:56:13] [PASSED] drm_test_framebuffer_modifiers_not_supported
[04:56:13] ================= [PASSED] drm_framebuffer =================
[04:56:13] ================ drm_gem_shmem (8 subtests) ================
[04:56:13] [PASSED] drm_gem_shmem_test_obj_create
[04:56:13] [PASSED] drm_gem_shmem_test_obj_create_private
[04:56:13] [PASSED] drm_gem_shmem_test_pin_pages
[04:56:13] [PASSED] drm_gem_shmem_test_vmap
[04:56:13] [PASSED] drm_gem_shmem_test_get_sg_table
[04:56:13] [PASSED] drm_gem_shmem_test_get_pages_sgt
[04:56:13] [PASSED] drm_gem_shmem_test_madvise
[04:56:13] [PASSED] drm_gem_shmem_test_purge
[04:56:13] ================== [PASSED] drm_gem_shmem ==================
[04:56:13] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[04:56:13] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[04:56:13] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[04:56:13] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[04:56:13] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[04:56:13] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[04:56:13] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[04:56:13] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[04:56:13] [PASSED] Automatic
[04:56:13] [PASSED] Full
[04:56:13] [PASSED] Limited 16:235
[04:56:13] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[04:56:13] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[04:56:13] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[04:56:13] [PASSED] drm_test_check_disable_connector
[04:56:13] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[04:56:13] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[04:56:13] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[04:56:13] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[04:56:13] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[04:56:13] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[04:56:13] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[04:56:13] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[04:56:13] [PASSED] drm_test_check_output_bpc_dvi
[04:56:13] [PASSED] drm_test_check_output_bpc_format_vic_1
[04:56:13] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[04:56:13] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[04:56:13] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[04:56:13] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[04:56:13] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[04:56:13] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[04:56:13] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[04:56:13] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[04:56:13] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[04:56:13] [PASSED] drm_test_check_broadcast_rgb_value
[04:56:13] [PASSED] drm_test_check_bpc_8_value
[04:56:13] [PASSED] drm_test_check_bpc_10_value
[04:56:13] [PASSED] drm_test_check_bpc_12_value
[04:56:13] [PASSED] drm_test_check_format_value
[04:56:13] [PASSED] drm_test_check_tmds_char_value
[04:56:13] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[04:56:13] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[04:56:13] [PASSED] drm_test_check_mode_valid
[04:56:13] [PASSED] drm_test_check_mode_valid_reject
[04:56:13] [PASSED] drm_test_check_mode_valid_reject_rate
[04:56:13] [PASSED] drm_test_check_mode_valid_reject_max_clock
[04:56:13] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[04:56:13] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[04:56:13] [PASSED] drm_test_check_infoframes
[04:56:13] [PASSED] drm_test_check_reject_avi_infoframe
[04:56:13] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[04:56:13] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[04:56:13] [PASSED] drm_test_check_reject_audio_infoframe
[04:56:13] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[04:56:13] ================= drm_managed (2 subtests) =================
[04:56:13] [PASSED] drm_test_managed_release_action
[04:56:13] [PASSED] drm_test_managed_run_action
[04:56:13] =================== [PASSED] drm_managed ===================
[04:56:13] =================== drm_mm (6 subtests) ====================
[04:56:13] [PASSED] drm_test_mm_init
[04:56:13] [PASSED] drm_test_mm_debug
[04:56:13] [PASSED] drm_test_mm_align32
[04:56:13] [PASSED] drm_test_mm_align64
[04:56:13] [PASSED] drm_test_mm_lowest
[04:56:13] [PASSED] drm_test_mm_highest
[04:56:13] ===================== [PASSED] drm_mm ======================
[04:56:13] ============= drm_modes_analog_tv (5 subtests) =============
[04:56:13] [PASSED] drm_test_modes_analog_tv_mono_576i
[04:56:13] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[04:56:13] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[04:56:13] [PASSED] drm_test_modes_analog_tv_pal_576i
[04:56:13] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[04:56:13] =============== [PASSED] drm_modes_analog_tv ===============
[04:56:13] ============== drm_plane_helper (2 subtests) ===============
[04:56:13] =============== drm_test_check_plane_state ================
[04:56:13] [PASSED] clipping_simple
[04:56:13] [PASSED] clipping_rotate_reflect
[04:56:13] [PASSED] positioning_simple
[04:56:13] [PASSED] upscaling
[04:56:13] [PASSED] downscaling
[04:56:13] [PASSED] rounding1
[04:56:13] [PASSED] rounding2
[04:56:13] [PASSED] rounding3
[04:56:13] [PASSED] rounding4
[04:56:13] =========== [PASSED] drm_test_check_plane_state ============
[04:56:13] =========== drm_test_check_invalid_plane_state ============
[04:56:13] [PASSED] positioning_invalid
[04:56:13] [PASSED] upscaling_invalid
[04:56:13] [PASSED] downscaling_invalid
[04:56:13] ======= [PASSED] drm_test_check_invalid_plane_state ========
[04:56:13] ================ [PASSED] drm_plane_helper =================
[04:56:13] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[04:56:13] ====== drm_test_connector_helper_tv_get_modes_check =======
[04:56:13] [PASSED] None
[04:56:13] [PASSED] PAL
[04:56:13] [PASSED] NTSC
[04:56:13] [PASSED] Both, NTSC Default
[04:56:13] [PASSED] Both, PAL Default
[04:56:13] [PASSED] Both, NTSC Default, with PAL on command-line
[04:56:13] [PASSED] Both, PAL Default, with NTSC on command-line
[04:56:13] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[04:56:13] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[04:56:13] ================== drm_rect (9 subtests) ===================
[04:56:13] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[04:56:13] [PASSED] drm_test_rect_clip_scaled_not_clipped
[04:56:13] [PASSED] drm_test_rect_clip_scaled_clipped
[04:56:13] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[04:56:13] ================= drm_test_rect_intersect =================
[04:56:13] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[04:56:13] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[04:56:13] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[04:56:13] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[04:56:13] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[04:56:13] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[04:56:13] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[04:56:13] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[04:56:13] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[04:56:13] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[04:56:13] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[04:56:13] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[04:56:13] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[04:56:13] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[04:56:13] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
stty: 'standard input': Inappropriate ioctl for device
[04:56:13] ============= [PASSED] drm_test_rect_intersect =============
[04:56:13] ================ drm_test_rect_calc_hscale ================
[04:56:13] [PASSED] normal use
[04:56:13] [PASSED] out of max range
[04:56:13] [PASSED] out of min range
[04:56:13] [PASSED] zero dst
[04:56:13] [PASSED] negative src
[04:56:13] [PASSED] negative dst
[04:56:13] ============ [PASSED] drm_test_rect_calc_hscale ============
[04:56:13] ================ drm_test_rect_calc_vscale ================
[04:56:13] [PASSED] normal use
[04:56:13] [PASSED] out of max range
[04:56:13] [PASSED] out of min range
[04:56:13] [PASSED] zero dst
[04:56:13] [PASSED] negative src
[04:56:13] [PASSED] negative dst
[04:56:13] ============ [PASSED] drm_test_rect_calc_vscale ============
[04:56:13] ================== drm_test_rect_rotate ===================
[04:56:13] [PASSED] reflect-x
[04:56:13] [PASSED] reflect-y
[04:56:13] [PASSED] rotate-0
[04:56:13] [PASSED] rotate-90
[04:56:13] [PASSED] rotate-180
[04:56:13] [PASSED] rotate-270
[04:56:13] ============== [PASSED] drm_test_rect_rotate ===============
[04:56:13] ================ drm_test_rect_rotate_inv =================
[04:56:13] [PASSED] reflect-x
[04:56:13] [PASSED] reflect-y
[04:56:13] [PASSED] rotate-0
[04:56:13] [PASSED] rotate-90
[04:56:13] [PASSED] rotate-180
[04:56:13] [PASSED] rotate-270
[04:56:13] ============ [PASSED] drm_test_rect_rotate_inv =============
[04:56:13] ==================== [PASSED] drm_rect =====================
[04:56:13] ============ drm_sysfb_modeset_test (1 subtest) ============
[04:56:13] ============ drm_test_sysfb_build_fourcc_list =============
[04:56:13] [PASSED] no native formats
[04:56:13] [PASSED] XRGB8888 as native format
[04:56:13] [PASSED] remove duplicates
[04:56:13] [PASSED] convert alpha formats
[04:56:13] [PASSED] random formats
[04:56:13] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[04:56:13] ============= [PASSED] drm_sysfb_modeset_test ==============
[04:56:13] ================== drm_fixp (2 subtests) ===================
[04:56:13] [PASSED] drm_test_int2fixp
[04:56:13] [PASSED] drm_test_sm2fixp
[04:56:13] ==================== [PASSED] drm_fixp =====================
[04:56:13] ============================================================
[04:56:13] Testing complete. Ran 630 tests: passed: 630
[04:56:13] Elapsed time: 27.512s total, 1.630s configuring, 25.464s building, 0.385s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[04:56:13] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[04:56:15] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[04:56:24] Starting KUnit Kernel (1/1)...
[04:56:24] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[04:56:24] ================= ttm_device (5 subtests) ==================
[04:56:24] [PASSED] ttm_device_init_basic
[04:56:24] [PASSED] ttm_device_init_multiple
[04:56:24] [PASSED] ttm_device_fini_basic
[04:56:24] [PASSED] ttm_device_init_no_vma_man
[04:56:24] ================== ttm_device_init_pools ==================
[04:56:24] [PASSED] No DMA allocations, no DMA32 required
[04:56:24] [PASSED] DMA allocations, DMA32 required
[04:56:24] [PASSED] No DMA allocations, DMA32 required
[04:56:24] [PASSED] DMA allocations, no DMA32 required
[04:56:24] ============== [PASSED] ttm_device_init_pools ==============
[04:56:24] =================== [PASSED] ttm_device ====================
[04:56:24] ================== ttm_pool (8 subtests) ===================
[04:56:24] ================== ttm_pool_alloc_basic ===================
[04:56:24] [PASSED] One page
[04:56:24] [PASSED] More than one page
[04:56:24] [PASSED] Above the allocation limit
[04:56:24] [PASSED] One page, with coherent DMA mappings enabled
[04:56:24] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[04:56:24] ============== [PASSED] ttm_pool_alloc_basic ===============
[04:56:24] ============== ttm_pool_alloc_basic_dma_addr ==============
[04:56:24] [PASSED] One page
[04:56:24] [PASSED] More than one page
[04:56:24] [PASSED] Above the allocation limit
[04:56:24] [PASSED] One page, with coherent DMA mappings enabled
[04:56:24] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[04:56:24] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[04:56:24] [PASSED] ttm_pool_alloc_order_caching_match
[04:56:24] [PASSED] ttm_pool_alloc_caching_mismatch
[04:56:24] [PASSED] ttm_pool_alloc_order_mismatch
[04:56:24] [PASSED] ttm_pool_free_dma_alloc
[04:56:24] [PASSED] ttm_pool_free_no_dma_alloc
[04:56:24] [PASSED] ttm_pool_fini_basic
[04:56:24] ==================== [PASSED] ttm_pool =====================
[04:56:24] ================ ttm_resource (8 subtests) =================
[04:56:24] ================= ttm_resource_init_basic =================
[04:56:24] [PASSED] Init resource in TTM_PL_SYSTEM
[04:56:24] [PASSED] Init resource in TTM_PL_VRAM
[04:56:24] [PASSED] Init resource in a private placement
[04:56:24] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[04:56:24] ============= [PASSED] ttm_resource_init_basic =============
[04:56:24] [PASSED] ttm_resource_init_pinned
[04:56:24] [PASSED] ttm_resource_fini_basic
[04:56:24] [PASSED] ttm_resource_manager_init_basic
[04:56:24] [PASSED] ttm_resource_manager_usage_basic
[04:56:24] [PASSED] ttm_resource_manager_set_used_basic
[04:56:24] [PASSED] ttm_sys_man_alloc_basic
[04:56:24] [PASSED] ttm_sys_man_free_basic
[04:56:24] ================== [PASSED] ttm_resource ===================
[04:56:24] =================== ttm_tt (15 subtests) ===================
[04:56:24] ==================== ttm_tt_init_basic ====================
[04:56:24] [PASSED] Page-aligned size
[04:56:24] [PASSED] Extra pages requested
[04:56:24] ================ [PASSED] ttm_tt_init_basic ================
[04:56:24] [PASSED] ttm_tt_init_misaligned
[04:56:24] [PASSED] ttm_tt_fini_basic
[04:56:24] [PASSED] ttm_tt_fini_sg
[04:56:24] [PASSED] ttm_tt_fini_shmem
[04:56:24] [PASSED] ttm_tt_create_basic
[04:56:24] [PASSED] ttm_tt_create_invalid_bo_type
[04:56:24] [PASSED] ttm_tt_create_ttm_exists
[04:56:24] [PASSED] ttm_tt_create_failed
[04:56:24] [PASSED] ttm_tt_destroy_basic
[04:56:24] [PASSED] ttm_tt_populate_null_ttm
[04:56:24] [PASSED] ttm_tt_populate_populated_ttm
[04:56:24] [PASSED] ttm_tt_unpopulate_basic
[04:56:24] [PASSED] ttm_tt_unpopulate_empty_ttm
[04:56:24] [PASSED] ttm_tt_swapin_basic
[04:56:24] ===================== [PASSED] ttm_tt ======================
[04:56:24] =================== ttm_bo (14 subtests) ===================
[04:56:24] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[04:56:24] [PASSED] Cannot be interrupted and sleeps
[04:56:24] [PASSED] Cannot be interrupted, locks straight away
[04:56:24] [PASSED] Can be interrupted, sleeps
[04:56:24] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[04:56:24] [PASSED] ttm_bo_reserve_locked_no_sleep
[04:56:24] [PASSED] ttm_bo_reserve_no_wait_ticket
[04:56:24] [PASSED] ttm_bo_reserve_double_resv
[04:56:24] [PASSED] ttm_bo_reserve_interrupted
[04:56:24] [PASSED] ttm_bo_reserve_deadlock
[04:56:24] [PASSED] ttm_bo_unreserve_basic
[04:56:24] [PASSED] ttm_bo_unreserve_pinned
[04:56:24] [PASSED] ttm_bo_unreserve_bulk
[04:56:24] [PASSED] ttm_bo_fini_basic
[04:56:24] [PASSED] ttm_bo_fini_shared_resv
[04:56:24] [PASSED] ttm_bo_pin_basic
[04:56:24] [PASSED] ttm_bo_pin_unpin_resource
[04:56:24] [PASSED] ttm_bo_multiple_pin_one_unpin
[04:56:24] ===================== [PASSED] ttm_bo ======================
[04:56:24] ============== ttm_bo_validate (21 subtests) ===============
[04:56:24] ============== ttm_bo_init_reserved_sys_man ===============
[04:56:24] [PASSED] Buffer object for userspace
[04:56:24] [PASSED] Kernel buffer object
[04:56:24] [PASSED] Shared buffer object
[04:56:24] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[04:56:24] ============== ttm_bo_init_reserved_mock_man ==============
[04:56:24] [PASSED] Buffer object for userspace
[04:56:24] [PASSED] Kernel buffer object
[04:56:24] [PASSED] Shared buffer object
[04:56:24] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[04:56:24] [PASSED] ttm_bo_init_reserved_resv
[04:56:24] ================== ttm_bo_validate_basic ==================
[04:56:24] [PASSED] Buffer object for userspace
[04:56:24] [PASSED] Kernel buffer object
[04:56:24] [PASSED] Shared buffer object
[04:56:24] ============== [PASSED] ttm_bo_validate_basic ==============
[04:56:24] [PASSED] ttm_bo_validate_invalid_placement
[04:56:24] ============= ttm_bo_validate_same_placement ==============
[04:56:24] [PASSED] System manager
[04:56:24] [PASSED] VRAM manager
[04:56:24] ========= [PASSED] ttm_bo_validate_same_placement ==========
[04:56:24] [PASSED] ttm_bo_validate_failed_alloc
[04:56:24] [PASSED] ttm_bo_validate_pinned
[04:56:24] [PASSED] ttm_bo_validate_busy_placement
[04:56:24] ================ ttm_bo_validate_multihop =================
[04:56:24] [PASSED] Buffer object for userspace
[04:56:24] [PASSED] Kernel buffer object
[04:56:24] [PASSED] Shared buffer object
[04:56:24] ============ [PASSED] ttm_bo_validate_multihop =============
[04:56:24] ========== ttm_bo_validate_no_placement_signaled ==========
[04:56:24] [PASSED] Buffer object in system domain, no page vector
[04:56:24] [PASSED] Buffer object in system domain with an existing page vector
[04:56:24] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[04:56:24] ======== ttm_bo_validate_no_placement_not_signaled ========
[04:56:24] [PASSED] Buffer object for userspace
[04:56:24] [PASSED] Kernel buffer object
[04:56:24] [PASSED] Shared buffer object
[04:56:24] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[04:56:24] [PASSED] ttm_bo_validate_move_fence_signaled
[04:56:25] ========= ttm_bo_validate_move_fence_not_signaled =========
[04:56:25] [PASSED] Waits for GPU
[04:56:25] [PASSED] Tries to lock straight away
[04:56:25] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[04:56:25] [PASSED] ttm_bo_validate_happy_evict
[04:56:25] [PASSED] ttm_bo_validate_all_pinned_evict
[04:56:25] [PASSED] ttm_bo_validate_allowed_only_evict
[04:56:25] [PASSED] ttm_bo_validate_deleted_evict
[04:56:25] [PASSED] ttm_bo_validate_busy_domain_evict
[04:56:25] [PASSED] ttm_bo_validate_evict_gutting
[04:56:25] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[04:56:25] ================= [PASSED] ttm_bo_validate =================
[04:56:25] ============================================================
[04:56:25] Testing complete. Ran 101 tests: passed: 101
[04:56:25] Elapsed time: 11.343s total, 1.667s configuring, 9.410s building, 0.228s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Xe.CI.BAT: success for drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd
2026-01-28 4:49 [PATCH] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd Suraj Kandpal
2026-01-28 4:56 ` ✓ CI.KUnit: success for " Patchwork
@ 2026-01-28 5:31 ` Patchwork
2026-01-28 11:08 ` [PATCH] " Jani Nikula
` (6 subsequent siblings)
8 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-01-28 5:31 UTC (permalink / raw)
To: Suraj Kandpal; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1524 bytes --]
== Series Details ==
Series: drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd
URL : https://patchwork.freedesktop.org/series/160734/
State : success
== Summary ==
CI Bug Log - changes from xe-4463-7c611617a14e6cbad8d277f84f64b4c63dfe1634_BAT -> xe-pw-160734v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (12 -> 12)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-160734v1_BAT that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@xe_waitfence@abstime:
- bat-dg2-oem2: [TIMEOUT][1] ([Intel XE#6506]) -> [PASS][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4463-7c611617a14e6cbad8d277f84f64b4c63dfe1634/bat-dg2-oem2/igt@xe_waitfence@abstime.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160734v1/bat-dg2-oem2/igt@xe_waitfence@abstime.html
[Intel XE#6506]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6506
Build changes
-------------
* Linux: xe-4463-7c611617a14e6cbad8d277f84f64b4c63dfe1634 -> xe-pw-160734v1
IGT_8721: 3707bb4267de22a18d61b232c4ab5fbaf61db90c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4463-7c611617a14e6cbad8d277f84f64b4c63dfe1634: 7c611617a14e6cbad8d277f84f64b4c63dfe1634
xe-pw-160734v1: 160734v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160734v1/index.html
[-- Attachment #2: Type: text/html, Size: 2089 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd
2026-01-28 4:49 [PATCH] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd Suraj Kandpal
2026-01-28 4:56 ` ✓ CI.KUnit: success for " Patchwork
2026-01-28 5:31 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-01-28 11:08 ` Jani Nikula
2026-01-29 4:13 ` Kandpal, Suraj
2026-01-29 4:18 ` [PATCH v2] " Suraj Kandpal
` (5 subsequent siblings)
8 siblings, 1 reply; 13+ messages in thread
From: Jani Nikula @ 2026-01-28 11:08 UTC (permalink / raw)
To: Suraj Kandpal, intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, Suraj Kandpal
On Wed, 28 Jan 2026, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> Add a meaningful return to intel_dp_read_dsc_dpcd so tha we avoid
> unwanted DPCD reads which are not needed once we know DSC DPCD
> read fails. While we are at it remove the drm_err since we do not
> shout error during intel_dp_detect phase since it may take time
> to come up after pps_on is called for eDP scenario.
Please pay more attention to the commit message.
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 24 +++++++++++++++---------
> 1 file changed, 15 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 79fd3b8d8b25..d2ed8ec145a2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -4281,20 +4281,21 @@ static bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp)
> return dprx & DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED;
> }
>
> -static void intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux,
> - u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
> +static int intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux,
> + u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
> {
> if (drm_dp_dpcd_read(aux, DP_DSC_SUPPORT, dsc_dpcd,
> DP_DSC_RECEIVER_CAP_SIZE) < 0) {
> - drm_err(aux->drm_dev,
> - "Failed to read DPCD register 0x%x\n",
> - DP_DSC_SUPPORT);
> - return;
> + drm_dbg_kms(aux->drm_dev,
> + "Could not read DSC DPCD register 0x%x\n",
> + DP_DSC_SUPPORT);
> + return -EINVAL;
If we want to do this properly, then let's propagate the actual error
code instead of inventing -EINVAL here. And switch to
drm_dp_dpcd_read_data(), which returns an error if not all bytes were
transferred (also a case the current implementation completely ignores).
Finlly, the debug logging could log the error code. A combo of %pe in
the format string and ERR_PTR(ret) in the corresponding parameter will
do it nicely.
> }
>
> drm_dbg_kms(aux->drm_dev, "DSC DPCD: %*ph\n",
> DP_DSC_RECEIVER_CAP_SIZE,
> dsc_dpcd);
> + return 0;
> }
>
> static void init_dsc_overall_throughput_limits(struct intel_connector *connector, bool is_branch)
> @@ -4345,8 +4346,11 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
> if (dpcd_rev < DP_DPCD_REV_14)
> return;
>
> - intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
> - connector->dp.dsc_dpcd);
> + if (intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
> + connector->dp.dsc_dpcd) < 0) {
> + drm_err(display->drm, "Failed to read DSC DPCD register\n");
> + return;
> + }
>
> if (drm_dp_dpcd_readb(connector->dp.dsc_decompression_aux, DP_FEC_CAPABILITY,
> &connector->dp.fec_capability) < 0) {
> @@ -4376,7 +4380,9 @@ static void intel_edp_get_dsc_sink_cap(u8 edp_dpcd_rev, struct intel_connector *
> if (edp_dpcd_rev < DP_EDP_14)
> return;
>
> - intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux, connector->dp.dsc_dpcd);
> + if (intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
> + connector->dp.dsc_dpcd) < 0)
> + return;
>
> if (connector->dp.dsc_dpcd[0] & DP_DSC_DECOMPRESSION_IS_SUPPORTED)
> init_dsc_overall_throughput_limits(connector, false);
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 13+ messages in thread
* RE: [PATCH] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd
2026-01-28 11:08 ` [PATCH] " Jani Nikula
@ 2026-01-29 4:13 ` Kandpal, Suraj
0 siblings, 0 replies; 13+ messages in thread
From: Kandpal, Suraj @ 2026-01-29 4:13 UTC (permalink / raw)
To: Jani Nikula, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
Cc: Nautiyal, Ankit K, Murthy, Arun R
> Subject: Re: [PATCH] drm/i915/dp: Add a meaningful return to
> intel_dp_read_dsc_dpcd
>
> On Wed, 28 Jan 2026, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> > Add a meaningful return to intel_dp_read_dsc_dpcd so tha we avoid
> > unwanted DPCD reads which are not needed once we know DSC DPCD read
> > fails. While we are at it remove the drm_err since we do not shout
> > error during intel_dp_detect phase since it may take time to come up
> > after pps_on is called for eDP scenario.
>
> Please pay more attention to the commit message.
Got it will fix it up
>
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_dp.c | 24 +++++++++++++++---------
> > 1 file changed, 15 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 79fd3b8d8b25..d2ed8ec145a2 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -4281,20 +4281,21 @@ static bool
> intel_dp_get_colorimetry_status(struct intel_dp *intel_dp)
> > return dprx & DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED;
> > }
> >
> > -static void intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux,
> > - u8
> dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
> > +static int intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux,
> > + u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
> > {
> > if (drm_dp_dpcd_read(aux, DP_DSC_SUPPORT, dsc_dpcd,
> > DP_DSC_RECEIVER_CAP_SIZE) < 0) {
> > - drm_err(aux->drm_dev,
> > - "Failed to read DPCD register 0x%x\n",
> > - DP_DSC_SUPPORT);
> > - return;
> > + drm_dbg_kms(aux->drm_dev,
> > + "Could not read DSC DPCD register 0x%x\n",
> > + DP_DSC_SUPPORT);
> > + return -EINVAL;
>
> If we want to do this properly, then let's propagate the actual error code
> instead of inventing -EINVAL here. And switch to drm_dp_dpcd_read_data(),
> which returns an error if not all bytes were transferred (also a case the
> current implementation completely ignores).
>
> Finlly, the debug logging could log the error code. A combo of %pe in the
> format string and ERR_PTR(ret) in the corresponding parameter will do it
> nicely.
Sure seems like good fix will get this done int the next revision.
Regards,
Suraj Kandpal
>
> > }
> >
> > drm_dbg_kms(aux->drm_dev, "DSC DPCD: %*ph\n",
> > DP_DSC_RECEIVER_CAP_SIZE,
> > dsc_dpcd);
> > + return 0;
> > }
> >
> > static void init_dsc_overall_throughput_limits(struct intel_connector
> > *connector, bool is_branch) @@ -4345,8 +4346,11 @@ void
> intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
> > if (dpcd_rev < DP_DPCD_REV_14)
> > return;
> >
> > - intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
> > - connector->dp.dsc_dpcd);
> > + if (intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
> > + connector->dp.dsc_dpcd) < 0) {
> > + drm_err(display->drm, "Failed to read DSC DPCD register\n");
> > + return;
> > + }
> >
> > if (drm_dp_dpcd_readb(connector->dp.dsc_decompression_aux,
> DP_FEC_CAPABILITY,
> > &connector->dp.fec_capability) < 0) { @@ -4376,7
> +4380,9 @@
> > static void intel_edp_get_dsc_sink_cap(u8 edp_dpcd_rev, struct
> intel_connector *
> > if (edp_dpcd_rev < DP_EDP_14)
> > return;
> >
> > - intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
> connector->dp.dsc_dpcd);
> > + if (intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
> > + connector->dp.dsc_dpcd) < 0)
> > + return;
> >
> > if (connector->dp.dsc_dpcd[0] &
> DP_DSC_DECOMPRESSION_IS_SUPPORTED)
> > init_dsc_overall_throughput_limits(connector, false);
>
> --
> Jani Nikula, Intel
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v2] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd
2026-01-28 4:49 [PATCH] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd Suraj Kandpal
` (2 preceding siblings ...)
2026-01-28 11:08 ` [PATCH] " Jani Nikula
@ 2026-01-29 4:18 ` Suraj Kandpal
2026-02-02 8:00 ` Nautiyal, Ankit K
2026-01-29 4:25 ` ✓ CI.KUnit: success for drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd (rev2) Patchwork
` (4 subsequent siblings)
8 siblings, 1 reply; 13+ messages in thread
From: Suraj Kandpal @ 2026-01-29 4:18 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: ankit.k.nautiyal, arun.r.murthy, Suraj Kandpal
Add a meaningful return to intel_dp_read_dsc_dpcd. This is to avoid
unwanted DPCD reads which are not needed once we know DSC DPCD
read fails. To do this convert drm_dp_dpcd_read to drm_dp_dpcd_read_data
which returns a meaningful error which can be propogated up when all
bits are not read.
While we are at it convert the drm_err in intel_dp_read_dsc_dpcd to
drm_dbg_kms. This is because we do not want a hard ERROR when we
call this function, during the intel_dp_detect phase since AUX may not
be up, it is expected to fail but we do not expect a failure in read
when we call intel_dp_dsc_get_sink_cap so we move the drm_err there.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
V1 -> V2:
-Commit message fixup (Jani)
-Convert drm_dp_dpcd_read to drm_dp_dpcd_read_data (Jani)
-Propogate the error sent by drm_dp_dpcd_read_data up (Jani)
-Use %pe and ERR_PTR() to log the extact error (Jani)
drivers/gpu/drm/i915/display/intel_dp.c | 33 ++++++++++++++++---------
1 file changed, 21 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 79fd3b8d8b25..ec277dcb24bc 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4281,20 +4281,24 @@ static bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp)
return dprx & DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED;
}
-static void intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux,
- u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
-{
- if (drm_dp_dpcd_read(aux, DP_DSC_SUPPORT, dsc_dpcd,
- DP_DSC_RECEIVER_CAP_SIZE) < 0) {
- drm_err(aux->drm_dev,
- "Failed to read DPCD register 0x%x\n",
- DP_DSC_SUPPORT);
- return;
+static int intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux,
+ u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
+{
+ int ret;
+
+ ret = drm_dp_dpcd_read_data(aux, DP_DSC_SUPPORT, dsc_dpcd,
+ DP_DSC_RECEIVER_CAP_SIZE);
+ if (ret) {
+ drm_dbg_kms(aux->drm_dev,
+ "Could not read DSC DPCD register 0x%x Error: %pe\n",
+ DP_DSC_SUPPORT, ERR_PTR(ret));
+ return ret;
}
drm_dbg_kms(aux->drm_dev, "DSC DPCD: %*ph\n",
DP_DSC_RECEIVER_CAP_SIZE,
dsc_dpcd);
+ return 0;
}
static void init_dsc_overall_throughput_limits(struct intel_connector *connector, bool is_branch)
@@ -4345,8 +4349,11 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
if (dpcd_rev < DP_DPCD_REV_14)
return;
- intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
- connector->dp.dsc_dpcd);
+ if (intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
+ connector->dp.dsc_dpcd) < 0) {
+ drm_err(display->drm, "Failed to read DSC DPCD register\n");
+ return;
+ }
if (drm_dp_dpcd_readb(connector->dp.dsc_decompression_aux, DP_FEC_CAPABILITY,
&connector->dp.fec_capability) < 0) {
@@ -4376,7 +4383,9 @@ static void intel_edp_get_dsc_sink_cap(u8 edp_dpcd_rev, struct intel_connector *
if (edp_dpcd_rev < DP_EDP_14)
return;
- intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux, connector->dp.dsc_dpcd);
+ if (intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
+ connector->dp.dsc_dpcd) < 0)
+ return;
if (connector->dp.dsc_dpcd[0] & DP_DSC_DECOMPRESSION_IS_SUPPORTED)
init_dsc_overall_throughput_limits(connector, false);
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* ✓ CI.KUnit: success for drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd (rev2)
2026-01-28 4:49 [PATCH] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd Suraj Kandpal
` (3 preceding siblings ...)
2026-01-29 4:18 ` [PATCH v2] " Suraj Kandpal
@ 2026-01-29 4:25 ` Patchwork
2026-01-29 4:59 ` ✓ Xe.CI.BAT: " Patchwork
` (3 subsequent siblings)
8 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-01-29 4:25 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-xe
== Series Details ==
Series: drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd (rev2)
URL : https://patchwork.freedesktop.org/series/160734/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[04:24:01] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[04:24:06] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[04:24:37] Starting KUnit Kernel (1/1)...
[04:24:37] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[04:24:37] ================== guc_buf (11 subtests) ===================
[04:24:37] [PASSED] test_smallest
[04:24:37] [PASSED] test_largest
[04:24:37] [PASSED] test_granular
[04:24:37] [PASSED] test_unique
[04:24:37] [PASSED] test_overlap
[04:24:37] [PASSED] test_reusable
[04:24:37] [PASSED] test_too_big
[04:24:37] [PASSED] test_flush
[04:24:37] [PASSED] test_lookup
[04:24:37] [PASSED] test_data
[04:24:37] [PASSED] test_class
[04:24:37] ===================== [PASSED] guc_buf =====================
[04:24:37] =================== guc_dbm (7 subtests) ===================
[04:24:37] [PASSED] test_empty
[04:24:37] [PASSED] test_default
[04:24:37] ======================== test_size ========================
[04:24:37] [PASSED] 4
[04:24:37] [PASSED] 8
[04:24:37] [PASSED] 32
[04:24:37] [PASSED] 256
[04:24:37] ==================== [PASSED] test_size ====================
[04:24:37] ======================= test_reuse ========================
[04:24:37] [PASSED] 4
[04:24:37] [PASSED] 8
[04:24:37] [PASSED] 32
[04:24:37] [PASSED] 256
[04:24:37] =================== [PASSED] test_reuse ====================
[04:24:37] =================== test_range_overlap ====================
[04:24:37] [PASSED] 4
[04:24:37] [PASSED] 8
[04:24:37] [PASSED] 32
[04:24:37] [PASSED] 256
[04:24:37] =============== [PASSED] test_range_overlap ================
[04:24:37] =================== test_range_compact ====================
[04:24:37] [PASSED] 4
[04:24:37] [PASSED] 8
[04:24:37] [PASSED] 32
[04:24:37] [PASSED] 256
[04:24:37] =============== [PASSED] test_range_compact ================
[04:24:37] ==================== test_range_spare =====================
[04:24:37] [PASSED] 4
[04:24:37] [PASSED] 8
[04:24:37] [PASSED] 32
[04:24:37] [PASSED] 256
[04:24:37] ================ [PASSED] test_range_spare =================
[04:24:37] ===================== [PASSED] guc_dbm =====================
[04:24:37] =================== guc_idm (6 subtests) ===================
[04:24:37] [PASSED] bad_init
[04:24:37] [PASSED] no_init
[04:24:37] [PASSED] init_fini
[04:24:37] [PASSED] check_used
[04:24:37] [PASSED] check_quota
[04:24:37] [PASSED] check_all
[04:24:37] ===================== [PASSED] guc_idm =====================
[04:24:37] ================== no_relay (3 subtests) ===================
[04:24:37] [PASSED] xe_drops_guc2pf_if_not_ready
[04:24:37] [PASSED] xe_drops_guc2vf_if_not_ready
[04:24:37] [PASSED] xe_rejects_send_if_not_ready
[04:24:37] ==================== [PASSED] no_relay =====================
[04:24:37] ================== pf_relay (14 subtests) ==================
[04:24:37] [PASSED] pf_rejects_guc2pf_too_short
[04:24:37] [PASSED] pf_rejects_guc2pf_too_long
[04:24:37] [PASSED] pf_rejects_guc2pf_no_payload
[04:24:37] [PASSED] pf_fails_no_payload
[04:24:37] [PASSED] pf_fails_bad_origin
[04:24:37] [PASSED] pf_fails_bad_type
[04:24:37] [PASSED] pf_txn_reports_error
[04:24:37] [PASSED] pf_txn_sends_pf2guc
[04:24:37] [PASSED] pf_sends_pf2guc
[04:24:37] [SKIPPED] pf_loopback_nop
[04:24:37] [SKIPPED] pf_loopback_echo
[04:24:37] [SKIPPED] pf_loopback_fail
[04:24:37] [SKIPPED] pf_loopback_busy
[04:24:37] [SKIPPED] pf_loopback_retry
[04:24:37] ==================== [PASSED] pf_relay =====================
[04:24:37] ================== vf_relay (3 subtests) ===================
[04:24:37] [PASSED] vf_rejects_guc2vf_too_short
[04:24:37] [PASSED] vf_rejects_guc2vf_too_long
[04:24:37] [PASSED] vf_rejects_guc2vf_no_payload
[04:24:37] ==================== [PASSED] vf_relay =====================
[04:24:37] ================ pf_gt_config (6 subtests) =================
[04:24:37] [PASSED] fair_contexts_1vf
[04:24:37] [PASSED] fair_doorbells_1vf
[04:24:37] [PASSED] fair_ggtt_1vf
[04:24:37] ====================== fair_contexts ======================
[04:24:37] [PASSED] 1 VF
[04:24:37] [PASSED] 2 VFs
[04:24:37] [PASSED] 3 VFs
[04:24:37] [PASSED] 4 VFs
[04:24:37] [PASSED] 5 VFs
[04:24:37] [PASSED] 6 VFs
[04:24:37] [PASSED] 7 VFs
[04:24:38] [PASSED] 8 VFs
[04:24:38] [PASSED] 9 VFs
[04:24:38] [PASSED] 10 VFs
[04:24:38] [PASSED] 11 VFs
[04:24:38] [PASSED] 12 VFs
[04:24:38] [PASSED] 13 VFs
[04:24:38] [PASSED] 14 VFs
[04:24:38] [PASSED] 15 VFs
[04:24:38] [PASSED] 16 VFs
[04:24:38] [PASSED] 17 VFs
[04:24:38] [PASSED] 18 VFs
[04:24:38] [PASSED] 19 VFs
[04:24:38] [PASSED] 20 VFs
[04:24:38] [PASSED] 21 VFs
[04:24:38] [PASSED] 22 VFs
[04:24:38] [PASSED] 23 VFs
[04:24:38] [PASSED] 24 VFs
[04:24:38] [PASSED] 25 VFs
[04:24:38] [PASSED] 26 VFs
[04:24:38] [PASSED] 27 VFs
[04:24:38] [PASSED] 28 VFs
[04:24:38] [PASSED] 29 VFs
[04:24:38] [PASSED] 30 VFs
[04:24:38] [PASSED] 31 VFs
[04:24:38] [PASSED] 32 VFs
[04:24:38] [PASSED] 33 VFs
[04:24:38] [PASSED] 34 VFs
[04:24:38] [PASSED] 35 VFs
[04:24:38] [PASSED] 36 VFs
[04:24:38] [PASSED] 37 VFs
[04:24:38] [PASSED] 38 VFs
[04:24:38] [PASSED] 39 VFs
[04:24:38] [PASSED] 40 VFs
[04:24:38] [PASSED] 41 VFs
[04:24:38] [PASSED] 42 VFs
[04:24:38] [PASSED] 43 VFs
[04:24:38] [PASSED] 44 VFs
[04:24:38] [PASSED] 45 VFs
[04:24:38] [PASSED] 46 VFs
[04:24:38] [PASSED] 47 VFs
[04:24:38] [PASSED] 48 VFs
[04:24:38] [PASSED] 49 VFs
[04:24:38] [PASSED] 50 VFs
[04:24:38] [PASSED] 51 VFs
[04:24:38] [PASSED] 52 VFs
[04:24:38] [PASSED] 53 VFs
[04:24:38] [PASSED] 54 VFs
[04:24:38] [PASSED] 55 VFs
[04:24:38] [PASSED] 56 VFs
[04:24:38] [PASSED] 57 VFs
[04:24:38] [PASSED] 58 VFs
[04:24:38] [PASSED] 59 VFs
[04:24:38] [PASSED] 60 VFs
[04:24:38] [PASSED] 61 VFs
[04:24:38] [PASSED] 62 VFs
[04:24:38] [PASSED] 63 VFs
[04:24:38] ================== [PASSED] fair_contexts ==================
[04:24:38] ===================== fair_doorbells ======================
[04:24:38] [PASSED] 1 VF
[04:24:38] [PASSED] 2 VFs
[04:24:38] [PASSED] 3 VFs
[04:24:38] [PASSED] 4 VFs
[04:24:38] [PASSED] 5 VFs
[04:24:38] [PASSED] 6 VFs
[04:24:38] [PASSED] 7 VFs
[04:24:38] [PASSED] 8 VFs
[04:24:38] [PASSED] 9 VFs
[04:24:38] [PASSED] 10 VFs
[04:24:38] [PASSED] 11 VFs
[04:24:38] [PASSED] 12 VFs
[04:24:38] [PASSED] 13 VFs
[04:24:38] [PASSED] 14 VFs
[04:24:38] [PASSED] 15 VFs
[04:24:38] [PASSED] 16 VFs
[04:24:38] [PASSED] 17 VFs
[04:24:38] [PASSED] 18 VFs
[04:24:38] [PASSED] 19 VFs
[04:24:38] [PASSED] 20 VFs
[04:24:38] [PASSED] 21 VFs
[04:24:38] [PASSED] 22 VFs
[04:24:38] [PASSED] 23 VFs
[04:24:38] [PASSED] 24 VFs
[04:24:38] [PASSED] 25 VFs
[04:24:38] [PASSED] 26 VFs
[04:24:38] [PASSED] 27 VFs
[04:24:38] [PASSED] 28 VFs
[04:24:38] [PASSED] 29 VFs
[04:24:38] [PASSED] 30 VFs
[04:24:38] [PASSED] 31 VFs
[04:24:38] [PASSED] 32 VFs
[04:24:38] [PASSED] 33 VFs
[04:24:38] [PASSED] 34 VFs
[04:24:38] [PASSED] 35 VFs
[04:24:38] [PASSED] 36 VFs
[04:24:38] [PASSED] 37 VFs
[04:24:38] [PASSED] 38 VFs
[04:24:38] [PASSED] 39 VFs
[04:24:38] [PASSED] 40 VFs
[04:24:38] [PASSED] 41 VFs
[04:24:38] [PASSED] 42 VFs
[04:24:38] [PASSED] 43 VFs
[04:24:38] [PASSED] 44 VFs
[04:24:38] [PASSED] 45 VFs
[04:24:38] [PASSED] 46 VFs
[04:24:38] [PASSED] 47 VFs
[04:24:38] [PASSED] 48 VFs
[04:24:38] [PASSED] 49 VFs
[04:24:38] [PASSED] 50 VFs
[04:24:38] [PASSED] 51 VFs
[04:24:38] [PASSED] 52 VFs
[04:24:38] [PASSED] 53 VFs
[04:24:38] [PASSED] 54 VFs
[04:24:38] [PASSED] 55 VFs
[04:24:38] [PASSED] 56 VFs
[04:24:38] [PASSED] 57 VFs
[04:24:38] [PASSED] 58 VFs
[04:24:38] [PASSED] 59 VFs
[04:24:38] [PASSED] 60 VFs
[04:24:38] [PASSED] 61 VFs
[04:24:38] [PASSED] 62 VFs
[04:24:38] [PASSED] 63 VFs
[04:24:38] ================= [PASSED] fair_doorbells ==================
[04:24:38] ======================== fair_ggtt ========================
[04:24:38] [PASSED] 1 VF
[04:24:38] [PASSED] 2 VFs
[04:24:38] [PASSED] 3 VFs
[04:24:38] [PASSED] 4 VFs
[04:24:38] [PASSED] 5 VFs
[04:24:38] [PASSED] 6 VFs
[04:24:38] [PASSED] 7 VFs
[04:24:38] [PASSED] 8 VFs
[04:24:38] [PASSED] 9 VFs
[04:24:38] [PASSED] 10 VFs
[04:24:38] [PASSED] 11 VFs
[04:24:38] [PASSED] 12 VFs
[04:24:38] [PASSED] 13 VFs
[04:24:38] [PASSED] 14 VFs
[04:24:38] [PASSED] 15 VFs
[04:24:38] [PASSED] 16 VFs
[04:24:38] [PASSED] 17 VFs
[04:24:38] [PASSED] 18 VFs
[04:24:38] [PASSED] 19 VFs
[04:24:38] [PASSED] 20 VFs
[04:24:38] [PASSED] 21 VFs
[04:24:38] [PASSED] 22 VFs
[04:24:38] [PASSED] 23 VFs
[04:24:38] [PASSED] 24 VFs
[04:24:38] [PASSED] 25 VFs
[04:24:38] [PASSED] 26 VFs
[04:24:38] [PASSED] 27 VFs
[04:24:38] [PASSED] 28 VFs
[04:24:38] [PASSED] 29 VFs
[04:24:38] [PASSED] 30 VFs
[04:24:38] [PASSED] 31 VFs
[04:24:38] [PASSED] 32 VFs
[04:24:38] [PASSED] 33 VFs
[04:24:38] [PASSED] 34 VFs
[04:24:38] [PASSED] 35 VFs
[04:24:38] [PASSED] 36 VFs
[04:24:38] [PASSED] 37 VFs
[04:24:38] [PASSED] 38 VFs
[04:24:38] [PASSED] 39 VFs
[04:24:38] [PASSED] 40 VFs
[04:24:38] [PASSED] 41 VFs
[04:24:38] [PASSED] 42 VFs
[04:24:38] [PASSED] 43 VFs
[04:24:38] [PASSED] 44 VFs
[04:24:38] [PASSED] 45 VFs
[04:24:38] [PASSED] 46 VFs
[04:24:38] [PASSED] 47 VFs
[04:24:38] [PASSED] 48 VFs
[04:24:38] [PASSED] 49 VFs
[04:24:38] [PASSED] 50 VFs
[04:24:38] [PASSED] 51 VFs
[04:24:38] [PASSED] 52 VFs
[04:24:38] [PASSED] 53 VFs
[04:24:38] [PASSED] 54 VFs
[04:24:38] [PASSED] 55 VFs
[04:24:38] [PASSED] 56 VFs
[04:24:38] [PASSED] 57 VFs
[04:24:38] [PASSED] 58 VFs
[04:24:38] [PASSED] 59 VFs
[04:24:38] [PASSED] 60 VFs
[04:24:38] [PASSED] 61 VFs
[04:24:38] [PASSED] 62 VFs
[04:24:38] [PASSED] 63 VFs
[04:24:38] ==================== [PASSED] fair_ggtt ====================
[04:24:38] ================== [PASSED] pf_gt_config ===================
[04:24:38] ===================== lmtt (1 subtest) =====================
[04:24:38] ======================== test_ops =========================
[04:24:38] [PASSED] 2-level
[04:24:38] [PASSED] multi-level
[04:24:38] ==================== [PASSED] test_ops =====================
[04:24:38] ====================== [PASSED] lmtt =======================
[04:24:38] ================= pf_service (11 subtests) =================
[04:24:38] [PASSED] pf_negotiate_any
[04:24:38] [PASSED] pf_negotiate_base_match
[04:24:38] [PASSED] pf_negotiate_base_newer
[04:24:38] [PASSED] pf_negotiate_base_next
[04:24:38] [SKIPPED] pf_negotiate_base_older
[04:24:38] [PASSED] pf_negotiate_base_prev
[04:24:38] [PASSED] pf_negotiate_latest_match
[04:24:38] [PASSED] pf_negotiate_latest_newer
[04:24:38] [PASSED] pf_negotiate_latest_next
[04:24:38] [SKIPPED] pf_negotiate_latest_older
[04:24:38] [SKIPPED] pf_negotiate_latest_prev
[04:24:38] =================== [PASSED] pf_service ====================
[04:24:38] ================= xe_guc_g2g (2 subtests) ==================
[04:24:38] ============== xe_live_guc_g2g_kunit_default ==============
[04:24:38] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[04:24:38] ============== xe_live_guc_g2g_kunit_allmem ===============
[04:24:38] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[04:24:38] =================== [SKIPPED] xe_guc_g2g ===================
[04:24:38] =================== xe_mocs (2 subtests) ===================
[04:24:38] ================ xe_live_mocs_kernel_kunit ================
[04:24:38] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[04:24:38] ================ xe_live_mocs_reset_kunit =================
[04:24:38] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[04:24:38] ==================== [SKIPPED] xe_mocs =====================
[04:24:38] ================= xe_migrate (2 subtests) ==================
[04:24:38] ================= xe_migrate_sanity_kunit =================
[04:24:38] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[04:24:38] ================== xe_validate_ccs_kunit ==================
[04:24:38] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[04:24:38] =================== [SKIPPED] xe_migrate ===================
[04:24:38] ================== xe_dma_buf (1 subtest) ==================
[04:24:38] ==================== xe_dma_buf_kunit =====================
[04:24:38] ================ [SKIPPED] xe_dma_buf_kunit ================
[04:24:38] =================== [SKIPPED] xe_dma_buf ===================
[04:24:38] ================= xe_bo_shrink (1 subtest) =================
[04:24:38] =================== xe_bo_shrink_kunit ====================
[04:24:38] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[04:24:38] ================== [SKIPPED] xe_bo_shrink ==================
[04:24:38] ==================== xe_bo (2 subtests) ====================
[04:24:38] ================== xe_ccs_migrate_kunit ===================
[04:24:38] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[04:24:38] ==================== xe_bo_evict_kunit ====================
[04:24:38] =============== [SKIPPED] xe_bo_evict_kunit ================
[04:24:38] ===================== [SKIPPED] xe_bo ======================
[04:24:38] ==================== args (13 subtests) ====================
[04:24:38] [PASSED] count_args_test
[04:24:38] [PASSED] call_args_example
[04:24:38] [PASSED] call_args_test
[04:24:38] [PASSED] drop_first_arg_example
[04:24:38] [PASSED] drop_first_arg_test
[04:24:38] [PASSED] first_arg_example
[04:24:38] [PASSED] first_arg_test
[04:24:38] [PASSED] last_arg_example
[04:24:38] [PASSED] last_arg_test
[04:24:38] [PASSED] pick_arg_example
[04:24:38] [PASSED] if_args_example
[04:24:38] [PASSED] if_args_test
[04:24:38] [PASSED] sep_comma_example
[04:24:38] ====================== [PASSED] args =======================
[04:24:38] =================== xe_pci (3 subtests) ====================
[04:24:38] ==================== check_graphics_ip ====================
[04:24:38] [PASSED] 12.00 Xe_LP
[04:24:38] [PASSED] 12.10 Xe_LP+
[04:24:38] [PASSED] 12.55 Xe_HPG
[04:24:38] [PASSED] 12.60 Xe_HPC
[04:24:38] [PASSED] 12.70 Xe_LPG
[04:24:38] [PASSED] 12.71 Xe_LPG
[04:24:38] [PASSED] 12.74 Xe_LPG+
[04:24:38] [PASSED] 20.01 Xe2_HPG
[04:24:38] [PASSED] 20.02 Xe2_HPG
[04:24:38] [PASSED] 20.04 Xe2_LPG
[04:24:38] [PASSED] 30.00 Xe3_LPG
[04:24:38] [PASSED] 30.01 Xe3_LPG
[04:24:38] [PASSED] 30.03 Xe3_LPG
[04:24:38] [PASSED] 30.04 Xe3_LPG
[04:24:38] [PASSED] 30.05 Xe3_LPG
[04:24:38] [PASSED] 35.11 Xe3p_XPC
[04:24:38] ================ [PASSED] check_graphics_ip ================
[04:24:38] ===================== check_media_ip ======================
[04:24:38] [PASSED] 12.00 Xe_M
[04:24:38] [PASSED] 12.55 Xe_HPM
[04:24:38] [PASSED] 13.00 Xe_LPM+
[04:24:38] [PASSED] 13.01 Xe2_HPM
[04:24:38] [PASSED] 20.00 Xe2_LPM
[04:24:38] [PASSED] 30.00 Xe3_LPM
[04:24:38] [PASSED] 30.02 Xe3_LPM
[04:24:38] [PASSED] 35.00 Xe3p_LPM
[04:24:38] [PASSED] 35.03 Xe3p_HPM
[04:24:38] ================= [PASSED] check_media_ip ==================
[04:24:38] =================== check_platform_desc ===================
[04:24:38] [PASSED] 0x9A60 (TIGERLAKE)
[04:24:38] [PASSED] 0x9A68 (TIGERLAKE)
[04:24:38] [PASSED] 0x9A70 (TIGERLAKE)
[04:24:38] [PASSED] 0x9A40 (TIGERLAKE)
[04:24:38] [PASSED] 0x9A49 (TIGERLAKE)
[04:24:38] [PASSED] 0x9A59 (TIGERLAKE)
[04:24:38] [PASSED] 0x9A78 (TIGERLAKE)
[04:24:38] [PASSED] 0x9AC0 (TIGERLAKE)
[04:24:38] [PASSED] 0x9AC9 (TIGERLAKE)
[04:24:38] [PASSED] 0x9AD9 (TIGERLAKE)
[04:24:38] [PASSED] 0x9AF8 (TIGERLAKE)
[04:24:38] [PASSED] 0x4C80 (ROCKETLAKE)
[04:24:38] [PASSED] 0x4C8A (ROCKETLAKE)
[04:24:38] [PASSED] 0x4C8B (ROCKETLAKE)
[04:24:38] [PASSED] 0x4C8C (ROCKETLAKE)
[04:24:38] [PASSED] 0x4C90 (ROCKETLAKE)
[04:24:38] [PASSED] 0x4C9A (ROCKETLAKE)
[04:24:38] [PASSED] 0x4680 (ALDERLAKE_S)
[04:24:38] [PASSED] 0x4682 (ALDERLAKE_S)
[04:24:38] [PASSED] 0x4688 (ALDERLAKE_S)
[04:24:38] [PASSED] 0x468A (ALDERLAKE_S)
[04:24:38] [PASSED] 0x468B (ALDERLAKE_S)
[04:24:38] [PASSED] 0x4690 (ALDERLAKE_S)
[04:24:38] [PASSED] 0x4692 (ALDERLAKE_S)
[04:24:38] [PASSED] 0x4693 (ALDERLAKE_S)
[04:24:38] [PASSED] 0x46A0 (ALDERLAKE_P)
[04:24:38] [PASSED] 0x46A1 (ALDERLAKE_P)
[04:24:38] [PASSED] 0x46A2 (ALDERLAKE_P)
[04:24:38] [PASSED] 0x46A3 (ALDERLAKE_P)
[04:24:38] [PASSED] 0x46A6 (ALDERLAKE_P)
[04:24:38] [PASSED] 0x46A8 (ALDERLAKE_P)
[04:24:38] [PASSED] 0x46AA (ALDERLAKE_P)
[04:24:38] [PASSED] 0x462A (ALDERLAKE_P)
[04:24:38] [PASSED] 0x4626 (ALDERLAKE_P)
[04:24:38] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[04:24:38] [PASSED] 0x46B0 (ALDERLAKE_P)
[04:24:38] [PASSED] 0x46B1 (ALDERLAKE_P)
[04:24:38] [PASSED] 0x46B2 (ALDERLAKE_P)
[04:24:38] [PASSED] 0x46B3 (ALDERLAKE_P)
[04:24:38] [PASSED] 0x46C0 (ALDERLAKE_P)
[04:24:38] [PASSED] 0x46C1 (ALDERLAKE_P)
[04:24:38] [PASSED] 0x46C2 (ALDERLAKE_P)
[04:24:38] [PASSED] 0x46C3 (ALDERLAKE_P)
[04:24:38] [PASSED] 0x46D0 (ALDERLAKE_N)
[04:24:38] [PASSED] 0x46D1 (ALDERLAKE_N)
[04:24:38] [PASSED] 0x46D2 (ALDERLAKE_N)
[04:24:38] [PASSED] 0x46D3 (ALDERLAKE_N)
[04:24:38] [PASSED] 0x46D4 (ALDERLAKE_N)
[04:24:38] [PASSED] 0xA721 (ALDERLAKE_P)
[04:24:38] [PASSED] 0xA7A1 (ALDERLAKE_P)
[04:24:38] [PASSED] 0xA7A9 (ALDERLAKE_P)
[04:24:38] [PASSED] 0xA7AC (ALDERLAKE_P)
[04:24:38] [PASSED] 0xA7AD (ALDERLAKE_P)
[04:24:38] [PASSED] 0xA720 (ALDERLAKE_P)
[04:24:38] [PASSED] 0xA7A0 (ALDERLAKE_P)
[04:24:38] [PASSED] 0xA7A8 (ALDERLAKE_P)
[04:24:38] [PASSED] 0xA7AA (ALDERLAKE_P)
[04:24:38] [PASSED] 0xA7AB (ALDERLAKE_P)
[04:24:38] [PASSED] 0xA780 (ALDERLAKE_S)
[04:24:38] [PASSED] 0xA781 (ALDERLAKE_S)
[04:24:38] [PASSED] 0xA782 (ALDERLAKE_S)
[04:24:38] [PASSED] 0xA783 (ALDERLAKE_S)
[04:24:38] [PASSED] 0xA788 (ALDERLAKE_S)
[04:24:38] [PASSED] 0xA789 (ALDERLAKE_S)
[04:24:38] [PASSED] 0xA78A (ALDERLAKE_S)
[04:24:38] [PASSED] 0xA78B (ALDERLAKE_S)
[04:24:38] [PASSED] 0x4905 (DG1)
[04:24:38] [PASSED] 0x4906 (DG1)
[04:24:38] [PASSED] 0x4907 (DG1)
[04:24:38] [PASSED] 0x4908 (DG1)
[04:24:38] [PASSED] 0x4909 (DG1)
[04:24:38] [PASSED] 0x56C0 (DG2)
[04:24:38] [PASSED] 0x56C2 (DG2)
[04:24:38] [PASSED] 0x56C1 (DG2)
[04:24:38] [PASSED] 0x7D51 (METEORLAKE)
[04:24:38] [PASSED] 0x7DD1 (METEORLAKE)
[04:24:38] [PASSED] 0x7D41 (METEORLAKE)
[04:24:38] [PASSED] 0x7D67 (METEORLAKE)
[04:24:38] [PASSED] 0xB640 (METEORLAKE)
[04:24:38] [PASSED] 0x56A0 (DG2)
[04:24:38] [PASSED] 0x56A1 (DG2)
[04:24:38] [PASSED] 0x56A2 (DG2)
[04:24:38] [PASSED] 0x56BE (DG2)
[04:24:38] [PASSED] 0x56BF (DG2)
[04:24:38] [PASSED] 0x5690 (DG2)
[04:24:38] [PASSED] 0x5691 (DG2)
[04:24:38] [PASSED] 0x5692 (DG2)
[04:24:38] [PASSED] 0x56A5 (DG2)
[04:24:38] [PASSED] 0x56A6 (DG2)
[04:24:38] [PASSED] 0x56B0 (DG2)
[04:24:38] [PASSED] 0x56B1 (DG2)
[04:24:38] [PASSED] 0x56BA (DG2)
[04:24:38] [PASSED] 0x56BB (DG2)
[04:24:38] [PASSED] 0x56BC (DG2)
[04:24:38] [PASSED] 0x56BD (DG2)
[04:24:38] [PASSED] 0x5693 (DG2)
[04:24:38] [PASSED] 0x5694 (DG2)
[04:24:38] [PASSED] 0x5695 (DG2)
[04:24:38] [PASSED] 0x56A3 (DG2)
[04:24:38] [PASSED] 0x56A4 (DG2)
[04:24:38] [PASSED] 0x56B2 (DG2)
[04:24:38] [PASSED] 0x56B3 (DG2)
[04:24:38] [PASSED] 0x5696 (DG2)
[04:24:38] [PASSED] 0x5697 (DG2)
[04:24:38] [PASSED] 0xB69 (PVC)
[04:24:38] [PASSED] 0xB6E (PVC)
[04:24:38] [PASSED] 0xBD4 (PVC)
[04:24:38] [PASSED] 0xBD5 (PVC)
[04:24:38] [PASSED] 0xBD6 (PVC)
[04:24:38] [PASSED] 0xBD7 (PVC)
[04:24:38] [PASSED] 0xBD8 (PVC)
[04:24:38] [PASSED] 0xBD9 (PVC)
[04:24:38] [PASSED] 0xBDA (PVC)
[04:24:38] [PASSED] 0xBDB (PVC)
[04:24:38] [PASSED] 0xBE0 (PVC)
[04:24:38] [PASSED] 0xBE1 (PVC)
[04:24:38] [PASSED] 0xBE5 (PVC)
[04:24:38] [PASSED] 0x7D40 (METEORLAKE)
[04:24:38] [PASSED] 0x7D45 (METEORLAKE)
[04:24:38] [PASSED] 0x7D55 (METEORLAKE)
[04:24:38] [PASSED] 0x7D60 (METEORLAKE)
[04:24:38] [PASSED] 0x7DD5 (METEORLAKE)
[04:24:38] [PASSED] 0x6420 (LUNARLAKE)
[04:24:38] [PASSED] 0x64A0 (LUNARLAKE)
[04:24:38] [PASSED] 0x64B0 (LUNARLAKE)
[04:24:38] [PASSED] 0xE202 (BATTLEMAGE)
[04:24:38] [PASSED] 0xE209 (BATTLEMAGE)
[04:24:38] [PASSED] 0xE20B (BATTLEMAGE)
[04:24:38] [PASSED] 0xE20C (BATTLEMAGE)
[04:24:38] [PASSED] 0xE20D (BATTLEMAGE)
[04:24:38] [PASSED] 0xE210 (BATTLEMAGE)
[04:24:38] [PASSED] 0xE211 (BATTLEMAGE)
[04:24:38] [PASSED] 0xE212 (BATTLEMAGE)
[04:24:38] [PASSED] 0xE216 (BATTLEMAGE)
[04:24:38] [PASSED] 0xE220 (BATTLEMAGE)
[04:24:38] [PASSED] 0xE221 (BATTLEMAGE)
[04:24:38] [PASSED] 0xE222 (BATTLEMAGE)
[04:24:38] [PASSED] 0xE223 (BATTLEMAGE)
[04:24:38] [PASSED] 0xB080 (PANTHERLAKE)
[04:24:38] [PASSED] 0xB081 (PANTHERLAKE)
[04:24:38] [PASSED] 0xB082 (PANTHERLAKE)
[04:24:38] [PASSED] 0xB083 (PANTHERLAKE)
[04:24:38] [PASSED] 0xB084 (PANTHERLAKE)
[04:24:38] [PASSED] 0xB085 (PANTHERLAKE)
[04:24:38] [PASSED] 0xB086 (PANTHERLAKE)
[04:24:38] [PASSED] 0xB087 (PANTHERLAKE)
[04:24:38] [PASSED] 0xB08F (PANTHERLAKE)
[04:24:38] [PASSED] 0xB090 (PANTHERLAKE)
[04:24:38] [PASSED] 0xB0A0 (PANTHERLAKE)
[04:24:38] [PASSED] 0xB0B0 (PANTHERLAKE)
[04:24:38] [PASSED] 0xFD80 (PANTHERLAKE)
[04:24:38] [PASSED] 0xFD81 (PANTHERLAKE)
[04:24:38] [PASSED] 0xD740 (NOVALAKE_S)
[04:24:38] [PASSED] 0xD741 (NOVALAKE_S)
[04:24:38] [PASSED] 0xD742 (NOVALAKE_S)
[04:24:38] [PASSED] 0xD743 (NOVALAKE_S)
[04:24:38] [PASSED] 0xD744 (NOVALAKE_S)
[04:24:38] [PASSED] 0xD745 (NOVALAKE_S)
[04:24:38] [PASSED] 0x674C (CRESCENTISLAND)
[04:24:38] =============== [PASSED] check_platform_desc ===============
[04:24:38] ===================== [PASSED] xe_pci ======================
[04:24:38] =================== xe_rtp (2 subtests) ====================
[04:24:38] =============== xe_rtp_process_to_sr_tests ================
[04:24:38] [PASSED] coalesce-same-reg
[04:24:38] [PASSED] no-match-no-add
[04:24:38] [PASSED] match-or
[04:24:38] [PASSED] match-or-xfail
[04:24:38] [PASSED] no-match-no-add-multiple-rules
[04:24:38] [PASSED] two-regs-two-entries
[04:24:38] [PASSED] clr-one-set-other
[04:24:38] [PASSED] set-field
[04:24:38] [PASSED] conflict-duplicate
[04:24:38] [PASSED] conflict-not-disjoint
[04:24:38] [PASSED] conflict-reg-type
[04:24:38] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[04:24:38] ================== xe_rtp_process_tests ===================
[04:24:38] [PASSED] active1
[04:24:38] [PASSED] active2
[04:24:38] [PASSED] active-inactive
[04:24:38] [PASSED] inactive-active
[04:24:38] [PASSED] inactive-1st_or_active-inactive
[04:24:38] [PASSED] inactive-2nd_or_active-inactive
[04:24:38] [PASSED] inactive-last_or_active-inactive
[04:24:38] [PASSED] inactive-no_or_active-inactive
[04:24:38] ============== [PASSED] xe_rtp_process_tests ===============
[04:24:38] ===================== [PASSED] xe_rtp ======================
[04:24:38] ==================== xe_wa (1 subtest) =====================
[04:24:38] ======================== xe_wa_gt =========================
[04:24:38] [PASSED] TIGERLAKE B0
[04:24:38] [PASSED] DG1 A0
[04:24:38] [PASSED] DG1 B0
[04:24:38] [PASSED] ALDERLAKE_S A0
[04:24:38] [PASSED] ALDERLAKE_S B0
[04:24:38] [PASSED] ALDERLAKE_S C0
[04:24:38] [PASSED] ALDERLAKE_S D0
[04:24:38] [PASSED] ALDERLAKE_P A0
[04:24:38] [PASSED] ALDERLAKE_P B0
[04:24:38] [PASSED] ALDERLAKE_P C0
[04:24:38] [PASSED] ALDERLAKE_S RPLS D0
[04:24:38] [PASSED] ALDERLAKE_P RPLU E0
[04:24:38] [PASSED] DG2 G10 C0
[04:24:38] [PASSED] DG2 G11 B1
[04:24:38] [PASSED] DG2 G12 A1
[04:24:38] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[04:24:38] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[04:24:38] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[04:24:38] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[04:24:38] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[04:24:38] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[04:24:38] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[04:24:38] ==================== [PASSED] xe_wa_gt =====================
[04:24:38] ====================== [PASSED] xe_wa ======================
[04:24:38] ============================================================
[04:24:38] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[04:24:38] Elapsed time: 36.359s total, 4.228s configuring, 31.614s building, 0.473s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[04:24:38] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[04:24:40] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[04:25:05] Starting KUnit Kernel (1/1)...
[04:25:05] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[04:25:05] ============ drm_test_pick_cmdline (2 subtests) ============
[04:25:05] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[04:25:05] =============== drm_test_pick_cmdline_named ===============
[04:25:05] [PASSED] NTSC
[04:25:05] [PASSED] NTSC-J
[04:25:05] [PASSED] PAL
[04:25:05] [PASSED] PAL-M
[04:25:05] =========== [PASSED] drm_test_pick_cmdline_named ===========
[04:25:05] ============== [PASSED] drm_test_pick_cmdline ==============
[04:25:05] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[04:25:05] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[04:25:05] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[04:25:05] =========== drm_validate_clone_mode (2 subtests) ===========
[04:25:05] ============== drm_test_check_in_clone_mode ===============
[04:25:05] [PASSED] in_clone_mode
[04:25:05] [PASSED] not_in_clone_mode
[04:25:05] ========== [PASSED] drm_test_check_in_clone_mode ===========
[04:25:05] =============== drm_test_check_valid_clones ===============
[04:25:05] [PASSED] not_in_clone_mode
[04:25:05] [PASSED] valid_clone
[04:25:05] [PASSED] invalid_clone
[04:25:05] =========== [PASSED] drm_test_check_valid_clones ===========
[04:25:05] ============= [PASSED] drm_validate_clone_mode =============
[04:25:05] ============= drm_validate_modeset (1 subtest) =============
[04:25:05] [PASSED] drm_test_check_connector_changed_modeset
[04:25:05] ============== [PASSED] drm_validate_modeset ===============
[04:25:05] ====== drm_test_bridge_get_current_state (2 subtests) ======
[04:25:05] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[04:25:05] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[04:25:05] ======== [PASSED] drm_test_bridge_get_current_state ========
[04:25:05] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[04:25:05] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[04:25:05] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[04:25:05] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[04:25:05] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[04:25:05] ============== drm_bridge_alloc (2 subtests) ===============
[04:25:05] [PASSED] drm_test_drm_bridge_alloc_basic
[04:25:05] [PASSED] drm_test_drm_bridge_alloc_get_put
[04:25:05] ================ [PASSED] drm_bridge_alloc =================
[04:25:05] ================== drm_buddy (9 subtests) ==================
[04:25:05] [PASSED] drm_test_buddy_alloc_limit
[04:25:05] [PASSED] drm_test_buddy_alloc_optimistic
[04:25:05] [PASSED] drm_test_buddy_alloc_pessimistic
[04:25:05] [PASSED] drm_test_buddy_alloc_pathological
[04:25:05] [PASSED] drm_test_buddy_alloc_contiguous
[04:25:05] [PASSED] drm_test_buddy_alloc_clear
[04:25:05] [PASSED] drm_test_buddy_alloc_range_bias
[04:25:05] [PASSED] drm_test_buddy_fragmentation_performance
[04:25:05] [PASSED] drm_test_buddy_alloc_exceeds_max_order
[04:25:05] ==================== [PASSED] drm_buddy ====================
[04:25:05] ============= drm_cmdline_parser (40 subtests) =============
[04:25:05] [PASSED] drm_test_cmdline_force_d_only
[04:25:05] [PASSED] drm_test_cmdline_force_D_only_dvi
[04:25:05] [PASSED] drm_test_cmdline_force_D_only_hdmi
[04:25:05] [PASSED] drm_test_cmdline_force_D_only_not_digital
[04:25:05] [PASSED] drm_test_cmdline_force_e_only
[04:25:05] [PASSED] drm_test_cmdline_res
[04:25:05] [PASSED] drm_test_cmdline_res_vesa
[04:25:05] [PASSED] drm_test_cmdline_res_vesa_rblank
[04:25:05] [PASSED] drm_test_cmdline_res_rblank
[04:25:05] [PASSED] drm_test_cmdline_res_bpp
[04:25:05] [PASSED] drm_test_cmdline_res_refresh
[04:25:05] [PASSED] drm_test_cmdline_res_bpp_refresh
[04:25:05] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[04:25:05] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[04:25:05] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[04:25:05] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[04:25:05] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[04:25:05] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[04:25:05] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[04:25:05] [PASSED] drm_test_cmdline_res_margins_force_on
[04:25:05] [PASSED] drm_test_cmdline_res_vesa_margins
[04:25:05] [PASSED] drm_test_cmdline_name
[04:25:05] [PASSED] drm_test_cmdline_name_bpp
[04:25:05] [PASSED] drm_test_cmdline_name_option
[04:25:05] [PASSED] drm_test_cmdline_name_bpp_option
[04:25:05] [PASSED] drm_test_cmdline_rotate_0
[04:25:05] [PASSED] drm_test_cmdline_rotate_90
[04:25:05] [PASSED] drm_test_cmdline_rotate_180
[04:25:05] [PASSED] drm_test_cmdline_rotate_270
[04:25:05] [PASSED] drm_test_cmdline_hmirror
[04:25:05] [PASSED] drm_test_cmdline_vmirror
[04:25:05] [PASSED] drm_test_cmdline_margin_options
[04:25:05] [PASSED] drm_test_cmdline_multiple_options
[04:25:05] [PASSED] drm_test_cmdline_bpp_extra_and_option
[04:25:05] [PASSED] drm_test_cmdline_extra_and_option
[04:25:05] [PASSED] drm_test_cmdline_freestanding_options
[04:25:05] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[04:25:05] [PASSED] drm_test_cmdline_panel_orientation
[04:25:05] ================ drm_test_cmdline_invalid =================
[04:25:05] [PASSED] margin_only
[04:25:05] [PASSED] interlace_only
[04:25:05] [PASSED] res_missing_x
[04:25:05] [PASSED] res_missing_y
[04:25:05] [PASSED] res_bad_y
[04:25:05] [PASSED] res_missing_y_bpp
[04:25:05] [PASSED] res_bad_bpp
[04:25:05] [PASSED] res_bad_refresh
[04:25:05] [PASSED] res_bpp_refresh_force_on_off
[04:25:05] [PASSED] res_invalid_mode
[04:25:05] [PASSED] res_bpp_wrong_place_mode
[04:25:05] [PASSED] name_bpp_refresh
[04:25:05] [PASSED] name_refresh
[04:25:05] [PASSED] name_refresh_wrong_mode
[04:25:05] [PASSED] name_refresh_invalid_mode
[04:25:05] [PASSED] rotate_multiple
[04:25:05] [PASSED] rotate_invalid_val
[04:25:05] [PASSED] rotate_truncated
[04:25:05] [PASSED] invalid_option
[04:25:05] [PASSED] invalid_tv_option
[04:25:05] [PASSED] truncated_tv_option
[04:25:05] ============ [PASSED] drm_test_cmdline_invalid =============
[04:25:05] =============== drm_test_cmdline_tv_options ===============
[04:25:05] [PASSED] NTSC
[04:25:05] [PASSED] NTSC_443
[04:25:05] [PASSED] NTSC_J
[04:25:05] [PASSED] PAL
[04:25:05] [PASSED] PAL_M
[04:25:05] [PASSED] PAL_N
[04:25:05] [PASSED] SECAM
[04:25:05] [PASSED] MONO_525
[04:25:05] [PASSED] MONO_625
[04:25:05] =========== [PASSED] drm_test_cmdline_tv_options ===========
[04:25:05] =============== [PASSED] drm_cmdline_parser ================
[04:25:05] ========== drmm_connector_hdmi_init (20 subtests) ==========
[04:25:05] [PASSED] drm_test_connector_hdmi_init_valid
[04:25:05] [PASSED] drm_test_connector_hdmi_init_bpc_8
[04:25:05] [PASSED] drm_test_connector_hdmi_init_bpc_10
[04:25:05] [PASSED] drm_test_connector_hdmi_init_bpc_12
[04:25:05] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[04:25:05] [PASSED] drm_test_connector_hdmi_init_bpc_null
[04:25:05] [PASSED] drm_test_connector_hdmi_init_formats_empty
[04:25:05] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[04:25:05] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[04:25:05] [PASSED] supported_formats=0x9 yuv420_allowed=1
[04:25:05] [PASSED] supported_formats=0x9 yuv420_allowed=0
[04:25:05] [PASSED] supported_formats=0x3 yuv420_allowed=1
[04:25:05] [PASSED] supported_formats=0x3 yuv420_allowed=0
[04:25:05] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[04:25:05] [PASSED] drm_test_connector_hdmi_init_null_ddc
[04:25:05] [PASSED] drm_test_connector_hdmi_init_null_product
[04:25:05] [PASSED] drm_test_connector_hdmi_init_null_vendor
[04:25:05] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[04:25:05] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[04:25:05] [PASSED] drm_test_connector_hdmi_init_product_valid
[04:25:05] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[04:25:05] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[04:25:05] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[04:25:05] ========= drm_test_connector_hdmi_init_type_valid =========
[04:25:05] [PASSED] HDMI-A
[04:25:05] [PASSED] HDMI-B
[04:25:05] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[04:25:05] ======== drm_test_connector_hdmi_init_type_invalid ========
[04:25:05] [PASSED] Unknown
[04:25:05] [PASSED] VGA
[04:25:05] [PASSED] DVI-I
[04:25:05] [PASSED] DVI-D
[04:25:05] [PASSED] DVI-A
[04:25:05] [PASSED] Composite
[04:25:05] [PASSED] SVIDEO
[04:25:05] [PASSED] LVDS
[04:25:05] [PASSED] Component
[04:25:05] [PASSED] DIN
[04:25:05] [PASSED] DP
[04:25:05] [PASSED] TV
[04:25:05] [PASSED] eDP
[04:25:05] [PASSED] Virtual
[04:25:05] [PASSED] DSI
[04:25:05] [PASSED] DPI
[04:25:05] [PASSED] Writeback
[04:25:05] [PASSED] SPI
[04:25:05] [PASSED] USB
[04:25:05] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[04:25:05] ============ [PASSED] drmm_connector_hdmi_init =============
[04:25:05] ============= drmm_connector_init (3 subtests) =============
[04:25:05] [PASSED] drm_test_drmm_connector_init
[04:25:05] [PASSED] drm_test_drmm_connector_init_null_ddc
[04:25:05] ========= drm_test_drmm_connector_init_type_valid =========
[04:25:05] [PASSED] Unknown
[04:25:05] [PASSED] VGA
[04:25:05] [PASSED] DVI-I
[04:25:05] [PASSED] DVI-D
[04:25:05] [PASSED] DVI-A
[04:25:05] [PASSED] Composite
[04:25:05] [PASSED] SVIDEO
[04:25:05] [PASSED] LVDS
[04:25:05] [PASSED] Component
[04:25:05] [PASSED] DIN
[04:25:05] [PASSED] DP
[04:25:05] [PASSED] HDMI-A
[04:25:05] [PASSED] HDMI-B
[04:25:05] [PASSED] TV
[04:25:05] [PASSED] eDP
[04:25:05] [PASSED] Virtual
[04:25:05] [PASSED] DSI
[04:25:05] [PASSED] DPI
[04:25:05] [PASSED] Writeback
[04:25:05] [PASSED] SPI
[04:25:05] [PASSED] USB
[04:25:05] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[04:25:05] =============== [PASSED] drmm_connector_init ===============
[04:25:05] ========= drm_connector_dynamic_init (6 subtests) ==========
[04:25:05] [PASSED] drm_test_drm_connector_dynamic_init
[04:25:05] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[04:25:05] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[04:25:05] [PASSED] drm_test_drm_connector_dynamic_init_properties
[04:25:05] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[04:25:05] [PASSED] Unknown
[04:25:05] [PASSED] VGA
[04:25:05] [PASSED] DVI-I
[04:25:05] [PASSED] DVI-D
[04:25:05] [PASSED] DVI-A
[04:25:05] [PASSED] Composite
[04:25:05] [PASSED] SVIDEO
[04:25:05] [PASSED] LVDS
[04:25:05] [PASSED] Component
[04:25:05] [PASSED] DIN
[04:25:05] [PASSED] DP
[04:25:05] [PASSED] HDMI-A
[04:25:05] [PASSED] HDMI-B
[04:25:05] [PASSED] TV
[04:25:05] [PASSED] eDP
[04:25:05] [PASSED] Virtual
[04:25:05] [PASSED] DSI
[04:25:05] [PASSED] DPI
[04:25:05] [PASSED] Writeback
[04:25:05] [PASSED] SPI
[04:25:05] [PASSED] USB
[04:25:05] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[04:25:05] ======== drm_test_drm_connector_dynamic_init_name =========
[04:25:05] [PASSED] Unknown
[04:25:05] [PASSED] VGA
[04:25:05] [PASSED] DVI-I
[04:25:05] [PASSED] DVI-D
[04:25:05] [PASSED] DVI-A
[04:25:05] [PASSED] Composite
[04:25:05] [PASSED] SVIDEO
[04:25:05] [PASSED] LVDS
[04:25:05] [PASSED] Component
[04:25:05] [PASSED] DIN
[04:25:05] [PASSED] DP
[04:25:05] [PASSED] HDMI-A
[04:25:05] [PASSED] HDMI-B
[04:25:05] [PASSED] TV
[04:25:05] [PASSED] eDP
[04:25:05] [PASSED] Virtual
[04:25:05] [PASSED] DSI
[04:25:05] [PASSED] DPI
[04:25:05] [PASSED] Writeback
[04:25:05] [PASSED] SPI
[04:25:05] [PASSED] USB
[04:25:05] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[04:25:05] =========== [PASSED] drm_connector_dynamic_init ============
[04:25:05] ==== drm_connector_dynamic_register_early (4 subtests) =====
[04:25:05] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[04:25:05] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[04:25:05] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[04:25:05] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[04:25:05] ====== [PASSED] drm_connector_dynamic_register_early =======
[04:25:05] ======= drm_connector_dynamic_register (7 subtests) ========
[04:25:05] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[04:25:05] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[04:25:05] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[04:25:05] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[04:25:05] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[04:25:05] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[04:25:05] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[04:25:05] ========= [PASSED] drm_connector_dynamic_register ==========
[04:25:05] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[04:25:05] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[04:25:05] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[04:25:05] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[04:25:05] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[04:25:05] ========== drm_test_get_tv_mode_from_name_valid ===========
[04:25:05] [PASSED] NTSC
[04:25:05] [PASSED] NTSC-443
[04:25:05] [PASSED] NTSC-J
[04:25:05] [PASSED] PAL
[04:25:05] [PASSED] PAL-M
[04:25:05] [PASSED] PAL-N
[04:25:05] [PASSED] SECAM
[04:25:05] [PASSED] Mono
[04:25:05] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[04:25:05] [PASSED] drm_test_get_tv_mode_from_name_truncated
[04:25:05] ============ [PASSED] drm_get_tv_mode_from_name ============
[04:25:05] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[04:25:05] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[04:25:05] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[04:25:05] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[04:25:05] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[04:25:05] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[04:25:05] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[04:25:05] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[04:25:05] [PASSED] VIC 96
[04:25:05] [PASSED] VIC 97
[04:25:05] [PASSED] VIC 101
[04:25:05] [PASSED] VIC 102
[04:25:05] [PASSED] VIC 106
[04:25:05] [PASSED] VIC 107
[04:25:05] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[04:25:05] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[04:25:05] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[04:25:05] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[04:25:05] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[04:25:05] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[04:25:05] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[04:25:05] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[04:25:05] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[04:25:05] [PASSED] Automatic
[04:25:05] [PASSED] Full
[04:25:05] [PASSED] Limited 16:235
[04:25:05] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[04:25:05] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[04:25:05] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[04:25:05] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[04:25:05] === drm_test_drm_hdmi_connector_get_output_format_name ====
[04:25:05] [PASSED] RGB
[04:25:05] [PASSED] YUV 4:2:0
[04:25:05] [PASSED] YUV 4:2:2
[04:25:05] [PASSED] YUV 4:4:4
[04:25:05] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[04:25:05] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[04:25:05] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[04:25:05] ============= drm_damage_helper (21 subtests) ==============
[04:25:05] [PASSED] drm_test_damage_iter_no_damage
[04:25:05] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[04:25:05] [PASSED] drm_test_damage_iter_no_damage_src_moved
[04:25:05] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[04:25:05] [PASSED] drm_test_damage_iter_no_damage_not_visible
[04:25:05] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[04:25:05] [PASSED] drm_test_damage_iter_no_damage_no_fb
[04:25:05] [PASSED] drm_test_damage_iter_simple_damage
[04:25:05] [PASSED] drm_test_damage_iter_single_damage
[04:25:05] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[04:25:05] [PASSED] drm_test_damage_iter_single_damage_outside_src
[04:25:05] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[04:25:05] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[04:25:05] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[04:25:05] [PASSED] drm_test_damage_iter_single_damage_src_moved
[04:25:05] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[04:25:05] [PASSED] drm_test_damage_iter_damage
[04:25:05] [PASSED] drm_test_damage_iter_damage_one_intersect
[04:25:05] [PASSED] drm_test_damage_iter_damage_one_outside
[04:25:05] [PASSED] drm_test_damage_iter_damage_src_moved
[04:25:05] [PASSED] drm_test_damage_iter_damage_not_visible
[04:25:05] ================ [PASSED] drm_damage_helper ================
[04:25:05] ============== drm_dp_mst_helper (3 subtests) ==============
[04:25:05] ============== drm_test_dp_mst_calc_pbn_mode ==============
[04:25:05] [PASSED] Clock 154000 BPP 30 DSC disabled
[04:25:05] [PASSED] Clock 234000 BPP 30 DSC disabled
[04:25:05] [PASSED] Clock 297000 BPP 24 DSC disabled
[04:25:05] [PASSED] Clock 332880 BPP 24 DSC enabled
[04:25:05] [PASSED] Clock 324540 BPP 24 DSC enabled
[04:25:05] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[04:25:05] ============== drm_test_dp_mst_calc_pbn_div ===============
[04:25:05] [PASSED] Link rate 2000000 lane count 4
[04:25:05] [PASSED] Link rate 2000000 lane count 2
[04:25:05] [PASSED] Link rate 2000000 lane count 1
[04:25:05] [PASSED] Link rate 1350000 lane count 4
[04:25:05] [PASSED] Link rate 1350000 lane count 2
[04:25:05] [PASSED] Link rate 1350000 lane count 1
[04:25:05] [PASSED] Link rate 1000000 lane count 4
[04:25:05] [PASSED] Link rate 1000000 lane count 2
[04:25:05] [PASSED] Link rate 1000000 lane count 1
[04:25:05] [PASSED] Link rate 810000 lane count 4
[04:25:05] [PASSED] Link rate 810000 lane count 2
[04:25:05] [PASSED] Link rate 810000 lane count 1
[04:25:05] [PASSED] Link rate 540000 lane count 4
[04:25:05] [PASSED] Link rate 540000 lane count 2
[04:25:05] [PASSED] Link rate 540000 lane count 1
[04:25:05] [PASSED] Link rate 270000 lane count 4
[04:25:05] [PASSED] Link rate 270000 lane count 2
[04:25:05] [PASSED] Link rate 270000 lane count 1
[04:25:05] [PASSED] Link rate 162000 lane count 4
[04:25:05] [PASSED] Link rate 162000 lane count 2
[04:25:05] [PASSED] Link rate 162000 lane count 1
[04:25:05] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[04:25:05] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[04:25:05] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[04:25:05] [PASSED] DP_POWER_UP_PHY with port number
[04:25:05] [PASSED] DP_POWER_DOWN_PHY with port number
[04:25:05] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[04:25:05] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[04:25:05] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[04:25:05] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[04:25:05] [PASSED] DP_QUERY_PAYLOAD with port number
[04:25:05] [PASSED] DP_QUERY_PAYLOAD with VCPI
[04:25:05] [PASSED] DP_REMOTE_DPCD_READ with port number
[04:25:05] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[04:25:05] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[04:25:05] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[04:25:05] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[04:25:05] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[04:25:05] [PASSED] DP_REMOTE_I2C_READ with port number
[04:25:05] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[04:25:05] [PASSED] DP_REMOTE_I2C_READ with transactions array
[04:25:05] [PASSED] DP_REMOTE_I2C_WRITE with port number
[04:25:05] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[04:25:05] [PASSED] DP_REMOTE_I2C_WRITE with data array
[04:25:05] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[04:25:05] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[04:25:05] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[04:25:05] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[04:25:05] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[04:25:05] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[04:25:05] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[04:25:05] ================ [PASSED] drm_dp_mst_helper ================
[04:25:05] ================== drm_exec (7 subtests) ===================
[04:25:05] [PASSED] sanitycheck
[04:25:05] [PASSED] test_lock
[04:25:05] [PASSED] test_lock_unlock
[04:25:05] [PASSED] test_duplicates
[04:25:05] [PASSED] test_prepare
[04:25:05] [PASSED] test_prepare_array
[04:25:05] [PASSED] test_multiple_loops
[04:25:05] ==================== [PASSED] drm_exec =====================
[04:25:05] =========== drm_format_helper_test (17 subtests) ===========
[04:25:05] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[04:25:05] [PASSED] single_pixel_source_buffer
[04:25:05] [PASSED] single_pixel_clip_rectangle
[04:25:05] [PASSED] well_known_colors
[04:25:05] [PASSED] destination_pitch
[04:25:05] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[04:25:05] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[04:25:05] [PASSED] single_pixel_source_buffer
[04:25:05] [PASSED] single_pixel_clip_rectangle
[04:25:05] [PASSED] well_known_colors
[04:25:05] [PASSED] destination_pitch
[04:25:05] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[04:25:05] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[04:25:05] [PASSED] single_pixel_source_buffer
[04:25:05] [PASSED] single_pixel_clip_rectangle
[04:25:05] [PASSED] well_known_colors
[04:25:05] [PASSED] destination_pitch
[04:25:05] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[04:25:05] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[04:25:05] [PASSED] single_pixel_source_buffer
[04:25:05] [PASSED] single_pixel_clip_rectangle
[04:25:05] [PASSED] well_known_colors
[04:25:05] [PASSED] destination_pitch
[04:25:05] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[04:25:05] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[04:25:05] [PASSED] single_pixel_source_buffer
[04:25:05] [PASSED] single_pixel_clip_rectangle
[04:25:05] [PASSED] well_known_colors
[04:25:05] [PASSED] destination_pitch
[04:25:05] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[04:25:05] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[04:25:05] [PASSED] single_pixel_source_buffer
[04:25:05] [PASSED] single_pixel_clip_rectangle
[04:25:05] [PASSED] well_known_colors
[04:25:05] [PASSED] destination_pitch
[04:25:05] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[04:25:05] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[04:25:05] [PASSED] single_pixel_source_buffer
[04:25:05] [PASSED] single_pixel_clip_rectangle
[04:25:05] [PASSED] well_known_colors
[04:25:05] [PASSED] destination_pitch
[04:25:05] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[04:25:05] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[04:25:05] [PASSED] single_pixel_source_buffer
[04:25:05] [PASSED] single_pixel_clip_rectangle
[04:25:05] [PASSED] well_known_colors
[04:25:05] [PASSED] destination_pitch
[04:25:05] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[04:25:05] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[04:25:05] [PASSED] single_pixel_source_buffer
[04:25:05] [PASSED] single_pixel_clip_rectangle
[04:25:05] [PASSED] well_known_colors
[04:25:05] [PASSED] destination_pitch
[04:25:05] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[04:25:05] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[04:25:05] [PASSED] single_pixel_source_buffer
[04:25:05] [PASSED] single_pixel_clip_rectangle
[04:25:05] [PASSED] well_known_colors
[04:25:05] [PASSED] destination_pitch
[04:25:05] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[04:25:05] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[04:25:05] [PASSED] single_pixel_source_buffer
[04:25:05] [PASSED] single_pixel_clip_rectangle
[04:25:05] [PASSED] well_known_colors
[04:25:05] [PASSED] destination_pitch
[04:25:05] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[04:25:05] ============== drm_test_fb_xrgb8888_to_mono ===============
[04:25:05] [PASSED] single_pixel_source_buffer
[04:25:05] [PASSED] single_pixel_clip_rectangle
[04:25:05] [PASSED] well_known_colors
[04:25:05] [PASSED] destination_pitch
[04:25:05] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[04:25:05] ==================== drm_test_fb_swab =====================
[04:25:05] [PASSED] single_pixel_source_buffer
[04:25:05] [PASSED] single_pixel_clip_rectangle
[04:25:05] [PASSED] well_known_colors
[04:25:05] [PASSED] destination_pitch
[04:25:05] ================ [PASSED] drm_test_fb_swab =================
[04:25:05] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[04:25:05] [PASSED] single_pixel_source_buffer
[04:25:05] [PASSED] single_pixel_clip_rectangle
[04:25:05] [PASSED] well_known_colors
[04:25:05] [PASSED] destination_pitch
[04:25:05] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[04:25:05] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[04:25:05] [PASSED] single_pixel_source_buffer
[04:25:05] [PASSED] single_pixel_clip_rectangle
[04:25:05] [PASSED] well_known_colors
[04:25:05] [PASSED] destination_pitch
[04:25:05] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[04:25:05] ================= drm_test_fb_clip_offset =================
[04:25:05] [PASSED] pass through
[04:25:05] [PASSED] horizontal offset
[04:25:05] [PASSED] vertical offset
[04:25:05] [PASSED] horizontal and vertical offset
[04:25:05] [PASSED] horizontal offset (custom pitch)
[04:25:05] [PASSED] vertical offset (custom pitch)
[04:25:05] [PASSED] horizontal and vertical offset (custom pitch)
[04:25:05] ============= [PASSED] drm_test_fb_clip_offset =============
[04:25:05] =================== drm_test_fb_memcpy ====================
[04:25:05] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[04:25:05] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[04:25:05] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[04:25:05] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[04:25:05] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[04:25:05] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[04:25:05] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[04:25:05] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[04:25:05] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[04:25:05] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[04:25:05] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[04:25:05] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[04:25:05] =============== [PASSED] drm_test_fb_memcpy ================
[04:25:05] ============= [PASSED] drm_format_helper_test ==============
[04:25:05] ================= drm_format (18 subtests) =================
[04:25:05] [PASSED] drm_test_format_block_width_invalid
[04:25:05] [PASSED] drm_test_format_block_width_one_plane
[04:25:05] [PASSED] drm_test_format_block_width_two_plane
[04:25:05] [PASSED] drm_test_format_block_width_three_plane
[04:25:05] [PASSED] drm_test_format_block_width_tiled
[04:25:05] [PASSED] drm_test_format_block_height_invalid
[04:25:05] [PASSED] drm_test_format_block_height_one_plane
[04:25:05] [PASSED] drm_test_format_block_height_two_plane
[04:25:05] [PASSED] drm_test_format_block_height_three_plane
[04:25:05] [PASSED] drm_test_format_block_height_tiled
[04:25:05] [PASSED] drm_test_format_min_pitch_invalid
[04:25:05] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[04:25:05] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[04:25:05] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[04:25:05] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[04:25:05] [PASSED] drm_test_format_min_pitch_two_plane
[04:25:05] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[04:25:05] [PASSED] drm_test_format_min_pitch_tiled
[04:25:05] =================== [PASSED] drm_format ====================
[04:25:05] ============== drm_framebuffer (10 subtests) ===============
[04:25:05] ========== drm_test_framebuffer_check_src_coords ==========
[04:25:05] [PASSED] Success: source fits into fb
[04:25:05] [PASSED] Fail: overflowing fb with x-axis coordinate
[04:25:05] [PASSED] Fail: overflowing fb with y-axis coordinate
[04:25:05] [PASSED] Fail: overflowing fb with source width
[04:25:05] [PASSED] Fail: overflowing fb with source height
[04:25:05] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[04:25:05] [PASSED] drm_test_framebuffer_cleanup
[04:25:05] =============== drm_test_framebuffer_create ===============
[04:25:05] [PASSED] ABGR8888 normal sizes
[04:25:05] [PASSED] ABGR8888 max sizes
[04:25:05] [PASSED] ABGR8888 pitch greater than min required
[04:25:05] [PASSED] ABGR8888 pitch less than min required
[04:25:05] [PASSED] ABGR8888 Invalid width
[04:25:05] [PASSED] ABGR8888 Invalid buffer handle
[04:25:05] [PASSED] No pixel format
[04:25:05] [PASSED] ABGR8888 Width 0
[04:25:05] [PASSED] ABGR8888 Height 0
[04:25:05] [PASSED] ABGR8888 Out of bound height * pitch combination
[04:25:05] [PASSED] ABGR8888 Large buffer offset
[04:25:05] [PASSED] ABGR8888 Buffer offset for inexistent plane
[04:25:05] [PASSED] ABGR8888 Invalid flag
[04:25:05] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[04:25:05] [PASSED] ABGR8888 Valid buffer modifier
[04:25:05] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[04:25:05] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[04:25:05] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[04:25:05] [PASSED] NV12 Normal sizes
[04:25:05] [PASSED] NV12 Max sizes
[04:25:05] [PASSED] NV12 Invalid pitch
[04:25:05] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[04:25:05] [PASSED] NV12 different modifier per-plane
[04:25:05] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[04:25:05] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[04:25:05] [PASSED] NV12 Modifier for inexistent plane
[04:25:05] [PASSED] NV12 Handle for inexistent plane
[04:25:05] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[04:25:05] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[04:25:05] [PASSED] YVU420 Normal sizes
[04:25:05] [PASSED] YVU420 Max sizes
[04:25:05] [PASSED] YVU420 Invalid pitch
[04:25:05] [PASSED] YVU420 Different pitches
[04:25:05] [PASSED] YVU420 Different buffer offsets/pitches
[04:25:05] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[04:25:05] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[04:25:05] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[04:25:05] [PASSED] YVU420 Valid modifier
[04:25:05] [PASSED] YVU420 Different modifiers per plane
[04:25:05] [PASSED] YVU420 Modifier for inexistent plane
[04:25:05] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[04:25:05] [PASSED] X0L2 Normal sizes
[04:25:05] [PASSED] X0L2 Max sizes
[04:25:05] [PASSED] X0L2 Invalid pitch
[04:25:05] [PASSED] X0L2 Pitch greater than minimum required
[04:25:05] [PASSED] X0L2 Handle for inexistent plane
[04:25:05] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[04:25:05] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[04:25:05] [PASSED] X0L2 Valid modifier
[04:25:05] [PASSED] X0L2 Modifier for inexistent plane
[04:25:05] =========== [PASSED] drm_test_framebuffer_create ===========
[04:25:05] [PASSED] drm_test_framebuffer_free
[04:25:05] [PASSED] drm_test_framebuffer_init
[04:25:05] [PASSED] drm_test_framebuffer_init_bad_format
[04:25:05] [PASSED] drm_test_framebuffer_init_dev_mismatch
[04:25:05] [PASSED] drm_test_framebuffer_lookup
[04:25:05] [PASSED] drm_test_framebuffer_lookup_inexistent
[04:25:05] [PASSED] drm_test_framebuffer_modifiers_not_supported
[04:25:05] ================= [PASSED] drm_framebuffer =================
[04:25:05] ================ drm_gem_shmem (8 subtests) ================
[04:25:05] [PASSED] drm_gem_shmem_test_obj_create
[04:25:05] [PASSED] drm_gem_shmem_test_obj_create_private
[04:25:05] [PASSED] drm_gem_shmem_test_pin_pages
[04:25:05] [PASSED] drm_gem_shmem_test_vmap
[04:25:05] [PASSED] drm_gem_shmem_test_get_sg_table
[04:25:05] [PASSED] drm_gem_shmem_test_get_pages_sgt
[04:25:05] [PASSED] drm_gem_shmem_test_madvise
[04:25:05] [PASSED] drm_gem_shmem_test_purge
[04:25:05] ================== [PASSED] drm_gem_shmem ==================
[04:25:05] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[04:25:05] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[04:25:05] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[04:25:05] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[04:25:05] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[04:25:05] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[04:25:05] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[04:25:05] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[04:25:05] [PASSED] Automatic
[04:25:05] [PASSED] Full
[04:25:05] [PASSED] Limited 16:235
[04:25:05] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[04:25:05] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[04:25:05] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[04:25:05] [PASSED] drm_test_check_disable_connector
[04:25:05] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[04:25:05] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[04:25:05] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[04:25:05] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[04:25:05] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[04:25:05] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[04:25:05] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[04:25:05] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[04:25:05] [PASSED] drm_test_check_output_bpc_dvi
[04:25:05] [PASSED] drm_test_check_output_bpc_format_vic_1
[04:25:05] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[04:25:05] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[04:25:05] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[04:25:05] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[04:25:05] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[04:25:05] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[04:25:05] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[04:25:05] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[04:25:05] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[04:25:05] [PASSED] drm_test_check_broadcast_rgb_value
[04:25:05] [PASSED] drm_test_check_bpc_8_value
[04:25:05] [PASSED] drm_test_check_bpc_10_value
[04:25:05] [PASSED] drm_test_check_bpc_12_value
[04:25:05] [PASSED] drm_test_check_format_value
[04:25:05] [PASSED] drm_test_check_tmds_char_value
[04:25:05] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[04:25:05] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[04:25:05] [PASSED] drm_test_check_mode_valid
[04:25:05] [PASSED] drm_test_check_mode_valid_reject
[04:25:05] [PASSED] drm_test_check_mode_valid_reject_rate
[04:25:05] [PASSED] drm_test_check_mode_valid_reject_max_clock
[04:25:05] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[04:25:05] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[04:25:05] [PASSED] drm_test_check_infoframes
[04:25:05] [PASSED] drm_test_check_reject_avi_infoframe
[04:25:05] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[04:25:05] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[04:25:05] [PASSED] drm_test_check_reject_audio_infoframe
[04:25:05] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[04:25:05] ================= drm_managed (2 subtests) =================
[04:25:05] [PASSED] drm_test_managed_release_action
[04:25:05] [PASSED] drm_test_managed_run_action
[04:25:05] =================== [PASSED] drm_managed ===================
[04:25:05] =================== drm_mm (6 subtests) ====================
[04:25:05] [PASSED] drm_test_mm_init
[04:25:05] [PASSED] drm_test_mm_debug
[04:25:05] [PASSED] drm_test_mm_align32
[04:25:05] [PASSED] drm_test_mm_align64
[04:25:05] [PASSED] drm_test_mm_lowest
[04:25:05] [PASSED] drm_test_mm_highest
[04:25:05] ===================== [PASSED] drm_mm ======================
[04:25:05] ============= drm_modes_analog_tv (5 subtests) =============
[04:25:05] [PASSED] drm_test_modes_analog_tv_mono_576i
[04:25:05] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[04:25:05] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[04:25:05] [PASSED] drm_test_modes_analog_tv_pal_576i
[04:25:05] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[04:25:05] =============== [PASSED] drm_modes_analog_tv ===============
[04:25:05] ============== drm_plane_helper (2 subtests) ===============
[04:25:05] =============== drm_test_check_plane_state ================
[04:25:05] [PASSED] clipping_simple
[04:25:05] [PASSED] clipping_rotate_reflect
[04:25:05] [PASSED] positioning_simple
[04:25:05] [PASSED] upscaling
[04:25:05] [PASSED] downscaling
[04:25:05] [PASSED] rounding1
[04:25:05] [PASSED] rounding2
[04:25:05] [PASSED] rounding3
[04:25:05] [PASSED] rounding4
[04:25:05] =========== [PASSED] drm_test_check_plane_state ============
[04:25:05] =========== drm_test_check_invalid_plane_state ============
[04:25:05] [PASSED] positioning_invalid
[04:25:05] [PASSED] upscaling_invalid
[04:25:05] [PASSED] downscaling_invalid
[04:25:05] ======= [PASSED] drm_test_check_invalid_plane_state ========
[04:25:05] ================ [PASSED] drm_plane_helper =================
[04:25:05] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[04:25:05] ====== drm_test_connector_helper_tv_get_modes_check =======
[04:25:05] [PASSED] None
[04:25:05] [PASSED] PAL
[04:25:05] [PASSED] NTSC
[04:25:05] [PASSED] Both, NTSC Default
[04:25:05] [PASSED] Both, PAL Default
[04:25:05] [PASSED] Both, NTSC Default, with PAL on command-line
[04:25:05] [PASSED] Both, PAL Default, with NTSC on command-line
[04:25:05] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[04:25:05] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[04:25:05] ================== drm_rect (9 subtests) ===================
[04:25:05] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[04:25:05] [PASSED] drm_test_rect_clip_scaled_not_clipped
[04:25:05] [PASSED] drm_test_rect_clip_scaled_clipped
[04:25:05] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[04:25:05] ================= drm_test_rect_intersect =================
[04:25:05] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[04:25:05] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[04:25:05] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[04:25:05] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[04:25:05] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[04:25:05] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[04:25:05] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[04:25:05] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[04:25:05] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[04:25:05] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[04:25:05] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[04:25:05] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[04:25:05] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[04:25:05] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[04:25:05] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
stty: 'standard input': Inappropriate ioctl for device
[04:25:05] ============= [PASSED] drm_test_rect_intersect =============
[04:25:05] ================ drm_test_rect_calc_hscale ================
[04:25:05] [PASSED] normal use
[04:25:05] [PASSED] out of max range
[04:25:05] [PASSED] out of min range
[04:25:05] [PASSED] zero dst
[04:25:05] [PASSED] negative src
[04:25:05] [PASSED] negative dst
[04:25:05] ============ [PASSED] drm_test_rect_calc_hscale ============
[04:25:05] ================ drm_test_rect_calc_vscale ================
[04:25:05] [PASSED] normal use
[04:25:05] [PASSED] out of max range
[04:25:05] [PASSED] out of min range
[04:25:05] [PASSED] zero dst
[04:25:05] [PASSED] negative src
[04:25:05] [PASSED] negative dst
[04:25:05] ============ [PASSED] drm_test_rect_calc_vscale ============
[04:25:05] ================== drm_test_rect_rotate ===================
[04:25:05] [PASSED] reflect-x
[04:25:05] [PASSED] reflect-y
[04:25:05] [PASSED] rotate-0
[04:25:05] [PASSED] rotate-90
[04:25:05] [PASSED] rotate-180
[04:25:05] [PASSED] rotate-270
[04:25:05] ============== [PASSED] drm_test_rect_rotate ===============
[04:25:05] ================ drm_test_rect_rotate_inv =================
[04:25:05] [PASSED] reflect-x
[04:25:05] [PASSED] reflect-y
[04:25:05] [PASSED] rotate-0
[04:25:05] [PASSED] rotate-90
[04:25:05] [PASSED] rotate-180
[04:25:05] [PASSED] rotate-270
[04:25:05] ============ [PASSED] drm_test_rect_rotate_inv =============
[04:25:05] ==================== [PASSED] drm_rect =====================
[04:25:05] ============ drm_sysfb_modeset_test (1 subtest) ============
[04:25:05] ============ drm_test_sysfb_build_fourcc_list =============
[04:25:05] [PASSED] no native formats
[04:25:05] [PASSED] XRGB8888 as native format
[04:25:05] [PASSED] remove duplicates
[04:25:05] [PASSED] convert alpha formats
[04:25:05] [PASSED] random formats
[04:25:05] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[04:25:05] ============= [PASSED] drm_sysfb_modeset_test ==============
[04:25:05] ================== drm_fixp (2 subtests) ===================
[04:25:05] [PASSED] drm_test_int2fixp
[04:25:05] [PASSED] drm_test_sm2fixp
[04:25:05] ==================== [PASSED] drm_fixp =====================
[04:25:05] ============================================================
[04:25:05] Testing complete. Ran 630 tests: passed: 630
[04:25:05] Elapsed time: 27.667s total, 1.695s configuring, 25.553s building, 0.382s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[04:25:06] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[04:25:07] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[04:25:17] Starting KUnit Kernel (1/1)...
[04:25:17] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[04:25:17] ================= ttm_device (5 subtests) ==================
[04:25:17] [PASSED] ttm_device_init_basic
[04:25:17] [PASSED] ttm_device_init_multiple
[04:25:17] [PASSED] ttm_device_fini_basic
[04:25:17] [PASSED] ttm_device_init_no_vma_man
[04:25:17] ================== ttm_device_init_pools ==================
[04:25:17] [PASSED] No DMA allocations, no DMA32 required
[04:25:17] [PASSED] DMA allocations, DMA32 required
[04:25:17] [PASSED] No DMA allocations, DMA32 required
[04:25:17] [PASSED] DMA allocations, no DMA32 required
[04:25:17] ============== [PASSED] ttm_device_init_pools ==============
[04:25:17] =================== [PASSED] ttm_device ====================
[04:25:17] ================== ttm_pool (8 subtests) ===================
[04:25:17] ================== ttm_pool_alloc_basic ===================
[04:25:17] [PASSED] One page
[04:25:17] [PASSED] More than one page
[04:25:17] [PASSED] Above the allocation limit
[04:25:17] [PASSED] One page, with coherent DMA mappings enabled
[04:25:17] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[04:25:17] ============== [PASSED] ttm_pool_alloc_basic ===============
[04:25:17] ============== ttm_pool_alloc_basic_dma_addr ==============
[04:25:17] [PASSED] One page
[04:25:17] [PASSED] More than one page
[04:25:17] [PASSED] Above the allocation limit
[04:25:17] [PASSED] One page, with coherent DMA mappings enabled
[04:25:17] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[04:25:17] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[04:25:17] [PASSED] ttm_pool_alloc_order_caching_match
[04:25:17] [PASSED] ttm_pool_alloc_caching_mismatch
[04:25:17] [PASSED] ttm_pool_alloc_order_mismatch
[04:25:17] [PASSED] ttm_pool_free_dma_alloc
[04:25:17] [PASSED] ttm_pool_free_no_dma_alloc
[04:25:17] [PASSED] ttm_pool_fini_basic
[04:25:17] ==================== [PASSED] ttm_pool =====================
[04:25:17] ================ ttm_resource (8 subtests) =================
[04:25:17] ================= ttm_resource_init_basic =================
[04:25:17] [PASSED] Init resource in TTM_PL_SYSTEM
[04:25:17] [PASSED] Init resource in TTM_PL_VRAM
[04:25:17] [PASSED] Init resource in a private placement
[04:25:17] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[04:25:17] ============= [PASSED] ttm_resource_init_basic =============
[04:25:17] [PASSED] ttm_resource_init_pinned
[04:25:17] [PASSED] ttm_resource_fini_basic
[04:25:17] [PASSED] ttm_resource_manager_init_basic
[04:25:17] [PASSED] ttm_resource_manager_usage_basic
[04:25:17] [PASSED] ttm_resource_manager_set_used_basic
[04:25:17] [PASSED] ttm_sys_man_alloc_basic
[04:25:17] [PASSED] ttm_sys_man_free_basic
[04:25:17] ================== [PASSED] ttm_resource ===================
[04:25:17] =================== ttm_tt (15 subtests) ===================
[04:25:17] ==================== ttm_tt_init_basic ====================
[04:25:17] [PASSED] Page-aligned size
[04:25:17] [PASSED] Extra pages requested
[04:25:17] ================ [PASSED] ttm_tt_init_basic ================
[04:25:17] [PASSED] ttm_tt_init_misaligned
[04:25:17] [PASSED] ttm_tt_fini_basic
[04:25:17] [PASSED] ttm_tt_fini_sg
[04:25:17] [PASSED] ttm_tt_fini_shmem
[04:25:17] [PASSED] ttm_tt_create_basic
[04:25:17] [PASSED] ttm_tt_create_invalid_bo_type
[04:25:17] [PASSED] ttm_tt_create_ttm_exists
[04:25:17] [PASSED] ttm_tt_create_failed
[04:25:17] [PASSED] ttm_tt_destroy_basic
[04:25:17] [PASSED] ttm_tt_populate_null_ttm
[04:25:17] [PASSED] ttm_tt_populate_populated_ttm
[04:25:17] [PASSED] ttm_tt_unpopulate_basic
[04:25:17] [PASSED] ttm_tt_unpopulate_empty_ttm
[04:25:17] [PASSED] ttm_tt_swapin_basic
[04:25:17] ===================== [PASSED] ttm_tt ======================
[04:25:17] =================== ttm_bo (14 subtests) ===================
[04:25:17] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[04:25:17] [PASSED] Cannot be interrupted and sleeps
[04:25:17] [PASSED] Cannot be interrupted, locks straight away
[04:25:17] [PASSED] Can be interrupted, sleeps
[04:25:17] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[04:25:17] [PASSED] ttm_bo_reserve_locked_no_sleep
[04:25:17] [PASSED] ttm_bo_reserve_no_wait_ticket
[04:25:17] [PASSED] ttm_bo_reserve_double_resv
[04:25:17] [PASSED] ttm_bo_reserve_interrupted
[04:25:17] [PASSED] ttm_bo_reserve_deadlock
[04:25:17] [PASSED] ttm_bo_unreserve_basic
[04:25:17] [PASSED] ttm_bo_unreserve_pinned
[04:25:17] [PASSED] ttm_bo_unreserve_bulk
[04:25:17] [PASSED] ttm_bo_fini_basic
[04:25:17] [PASSED] ttm_bo_fini_shared_resv
[04:25:17] [PASSED] ttm_bo_pin_basic
[04:25:17] [PASSED] ttm_bo_pin_unpin_resource
[04:25:17] [PASSED] ttm_bo_multiple_pin_one_unpin
[04:25:17] ===================== [PASSED] ttm_bo ======================
[04:25:17] ============== ttm_bo_validate (21 subtests) ===============
[04:25:17] ============== ttm_bo_init_reserved_sys_man ===============
[04:25:17] [PASSED] Buffer object for userspace
[04:25:17] [PASSED] Kernel buffer object
[04:25:17] [PASSED] Shared buffer object
[04:25:17] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[04:25:17] ============== ttm_bo_init_reserved_mock_man ==============
[04:25:17] [PASSED] Buffer object for userspace
[04:25:17] [PASSED] Kernel buffer object
[04:25:17] [PASSED] Shared buffer object
[04:25:17] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[04:25:17] [PASSED] ttm_bo_init_reserved_resv
[04:25:17] ================== ttm_bo_validate_basic ==================
[04:25:17] [PASSED] Buffer object for userspace
[04:25:17] [PASSED] Kernel buffer object
[04:25:17] [PASSED] Shared buffer object
[04:25:17] ============== [PASSED] ttm_bo_validate_basic ==============
[04:25:17] [PASSED] ttm_bo_validate_invalid_placement
[04:25:17] ============= ttm_bo_validate_same_placement ==============
[04:25:17] [PASSED] System manager
[04:25:17] [PASSED] VRAM manager
[04:25:17] ========= [PASSED] ttm_bo_validate_same_placement ==========
[04:25:17] [PASSED] ttm_bo_validate_failed_alloc
[04:25:17] [PASSED] ttm_bo_validate_pinned
[04:25:17] [PASSED] ttm_bo_validate_busy_placement
[04:25:17] ================ ttm_bo_validate_multihop =================
[04:25:17] [PASSED] Buffer object for userspace
[04:25:17] [PASSED] Kernel buffer object
[04:25:17] [PASSED] Shared buffer object
[04:25:17] ============ [PASSED] ttm_bo_validate_multihop =============
[04:25:17] ========== ttm_bo_validate_no_placement_signaled ==========
[04:25:17] [PASSED] Buffer object in system domain, no page vector
[04:25:17] [PASSED] Buffer object in system domain with an existing page vector
[04:25:17] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[04:25:17] ======== ttm_bo_validate_no_placement_not_signaled ========
[04:25:17] [PASSED] Buffer object for userspace
[04:25:17] [PASSED] Kernel buffer object
[04:25:17] [PASSED] Shared buffer object
[04:25:17] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[04:25:17] [PASSED] ttm_bo_validate_move_fence_signaled
[04:25:17] ========= ttm_bo_validate_move_fence_not_signaled =========
[04:25:17] [PASSED] Waits for GPU
[04:25:17] [PASSED] Tries to lock straight away
[04:25:17] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[04:25:17] [PASSED] ttm_bo_validate_happy_evict
[04:25:17] [PASSED] ttm_bo_validate_all_pinned_evict
[04:25:17] [PASSED] ttm_bo_validate_allowed_only_evict
[04:25:17] [PASSED] ttm_bo_validate_deleted_evict
[04:25:17] [PASSED] ttm_bo_validate_busy_domain_evict
[04:25:17] [PASSED] ttm_bo_validate_evict_gutting
[04:25:17] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[04:25:17] ================= [PASSED] ttm_bo_validate =================
[04:25:17] ============================================================
[04:25:17] Testing complete. Ran 101 tests: passed: 101
[04:25:17] Elapsed time: 11.468s total, 1.700s configuring, 9.552s building, 0.188s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Xe.CI.BAT: success for drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd (rev2)
2026-01-28 4:49 [PATCH] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd Suraj Kandpal
` (4 preceding siblings ...)
2026-01-29 4:25 ` ✓ CI.KUnit: success for drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd (rev2) Patchwork
@ 2026-01-29 4:59 ` Patchwork
2026-02-02 8:18 ` [PATCH v3] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd Suraj Kandpal
` (2 subsequent siblings)
8 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-01-29 4:59 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1440 bytes --]
== Series Details ==
Series: drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd (rev2)
URL : https://patchwork.freedesktop.org/series/160734/
State : success
== Summary ==
CI Bug Log - changes from xe-4467-6a3c9a03d943eb112c916c7419a837bc7de3a296_BAT -> xe-pw-160734v2_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (12 -> 12)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-160734v2_BAT that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@xe_waitfence@abstime:
- bat-dg2-oem2: [TIMEOUT][1] ([Intel XE#6506]) -> [PASS][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4467-6a3c9a03d943eb112c916c7419a837bc7de3a296/bat-dg2-oem2/igt@xe_waitfence@abstime.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160734v2/bat-dg2-oem2/igt@xe_waitfence@abstime.html
[Intel XE#6506]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6506
Build changes
-------------
* Linux: xe-4467-6a3c9a03d943eb112c916c7419a837bc7de3a296 -> xe-pw-160734v2
IGT_8723: 8723
xe-4467-6a3c9a03d943eb112c916c7419a837bc7de3a296: 6a3c9a03d943eb112c916c7419a837bc7de3a296
xe-pw-160734v2: 160734v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160734v2/index.html
[-- Attachment #2: Type: text/html, Size: 2005 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd
2026-01-29 4:18 ` [PATCH v2] " Suraj Kandpal
@ 2026-02-02 8:00 ` Nautiyal, Ankit K
0 siblings, 0 replies; 13+ messages in thread
From: Nautiyal, Ankit K @ 2026-02-02 8:00 UTC (permalink / raw)
To: Suraj Kandpal, intel-xe, intel-gfx; +Cc: arun.r.murthy
On 1/29/2026 9:48 AM, Suraj Kandpal wrote:
> Add a meaningful return to intel_dp_read_dsc_dpcd. This is to avoid
> unwanted DPCD reads which are not needed once we know DSC DPCD
> read fails. To do this convert drm_dp_dpcd_read to drm_dp_dpcd_read_data
> which returns a meaningful error which can be propogated up when all
> bits are not read.
> While we are at it convert the drm_err in intel_dp_read_dsc_dpcd to
> drm_dbg_kms. This is because we do not want a hard ERROR when we
> call this function, during the intel_dp_detect phase since AUX may not
> be up, it is expected to fail but we do not expect a failure in read
> when we call intel_dp_dsc_get_sink_cap so we move the drm_err there.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> V1 -> V2:
> -Commit message fixup (Jani)
> -Convert drm_dp_dpcd_read to drm_dp_dpcd_read_data (Jani)
> -Propogate the error sent by drm_dp_dpcd_read_data up (Jani)
> -Use %pe and ERR_PTR() to log the extact error (Jani)
>
> drivers/gpu/drm/i915/display/intel_dp.c | 33 ++++++++++++++++---------
> 1 file changed, 21 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 79fd3b8d8b25..ec277dcb24bc 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -4281,20 +4281,24 @@ static bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp)
> return dprx & DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED;
> }
>
> -static void intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux,
> - u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
> -{
> - if (drm_dp_dpcd_read(aux, DP_DSC_SUPPORT, dsc_dpcd,
> - DP_DSC_RECEIVER_CAP_SIZE) < 0) {
> - drm_err(aux->drm_dev,
> - "Failed to read DPCD register 0x%x\n",
> - DP_DSC_SUPPORT);
> - return;
> +static int intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux,
> + u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
> +{
> + int ret;
> +
> + ret = drm_dp_dpcd_read_data(aux, DP_DSC_SUPPORT, dsc_dpcd,
> + DP_DSC_RECEIVER_CAP_SIZE);
> + if (ret) {
> + drm_dbg_kms(aux->drm_dev,
> + "Could not read DSC DPCD register 0x%x Error: %pe\n",
> + DP_DSC_SUPPORT, ERR_PTR(ret));
> + return ret;
> }
>
> drm_dbg_kms(aux->drm_dev, "DSC DPCD: %*ph\n",
> DP_DSC_RECEIVER_CAP_SIZE,
> dsc_dpcd);
> + return 0;
> }
>
> static void init_dsc_overall_throughput_limits(struct intel_connector *connector, bool is_branch)
> @@ -4345,8 +4349,11 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
> if (dpcd_rev < DP_DPCD_REV_14)
> return;
>
> - intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
> - connector->dp.dsc_dpcd);
> + if (intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
> + connector->dp.dsc_dpcd) < 0) {
> + drm_err(display->drm, "Failed to read DSC DPCD register\n");
> + return;
I think we can skip this. We have already mentioned the dbg msg in
intel_dp_read_dsc_dpcd().
Also that way DP/eDP will both have symmetrical behavior as far as
reading DSC DPCD is concerned.
Regards,
Ankit
> + }
>
> if (drm_dp_dpcd_readb(connector->dp.dsc_decompression_aux, DP_FEC_CAPABILITY,
> &connector->dp.fec_capability) < 0) {
> @@ -4376,7 +4383,9 @@ static void intel_edp_get_dsc_sink_cap(u8 edp_dpcd_rev, struct intel_connector *
> if (edp_dpcd_rev < DP_EDP_14)
> return;
>
> - intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux, connector->dp.dsc_dpcd);
> + if (intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
> + connector->dp.dsc_dpcd) < 0)
> + return;
>
> if (connector->dp.dsc_dpcd[0] & DP_DSC_DECOMPRESSION_IS_SUPPORTED)
> init_dsc_overall_throughput_limits(connector, false);
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v3] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd
2026-01-28 4:49 [PATCH] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd Suraj Kandpal
` (5 preceding siblings ...)
2026-01-29 4:59 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-02-02 8:18 ` Suraj Kandpal
2026-02-02 8:47 ` Nautiyal, Ankit K
2026-02-02 16:58 ` ✓ CI.KUnit: success for drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd (rev3) Patchwork
2026-02-02 17:32 ` ✓ Xe.CI.BAT: " Patchwork
8 siblings, 1 reply; 13+ messages in thread
From: Suraj Kandpal @ 2026-02-02 8:18 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: ankit.k.nautiyal, arun.r.murthy, Suraj Kandpal
Add a meaningful return to intel_dp_read_dsc_dpcd. This is to avoid
unwanted DPCD reads which are not needed once we know DSC DPCD
read fails. To do this convert drm_dp_dpcd_read to drm_dp_dpcd_read_data
which returns a meaningful error which can be propogated up when all
bits are not read.
While we are at it convert the drm_err in intel_dp_read_dsc_dpcd to
drm_dbg_kms. This is because we do not want a hard ERROR when we
call this function, during the intel_dp_detect phase since AUX may not
be up, it is expected to fail but we do not expect a failure in read
when we call intel_dp_dsc_get_sink_cap so we move the drm_err there.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
V1 -> V2:
-Commit message fixup (Jani)
-Convert drm_dp_dpcd_read to drm_dp_dpcd_read_data (Jani)
-Propogate the error sent by drm_dp_dpcd_read_data up (Jani)
-Use %pe and ERR_PTR() to log the extact error (Jani)
V2 -> V3:
-No need for the extra drm_err (Ankit)
drivers/gpu/drm/i915/display/intel_dp.c | 31 +++++++++++++++----------
1 file changed, 19 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 79fd3b8d8b25..380d9801c377 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4281,20 +4281,24 @@ static bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp)
return dprx & DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED;
}
-static void intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux,
- u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
-{
- if (drm_dp_dpcd_read(aux, DP_DSC_SUPPORT, dsc_dpcd,
- DP_DSC_RECEIVER_CAP_SIZE) < 0) {
- drm_err(aux->drm_dev,
- "Failed to read DPCD register 0x%x\n",
- DP_DSC_SUPPORT);
- return;
+static int intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux,
+ u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
+{
+ int ret;
+
+ ret = drm_dp_dpcd_read_data(aux, DP_DSC_SUPPORT, dsc_dpcd,
+ DP_DSC_RECEIVER_CAP_SIZE);
+ if (ret) {
+ drm_dbg_kms(aux->drm_dev,
+ "Could not read DSC DPCD register 0x%x Error: %pe\n",
+ DP_DSC_SUPPORT, ERR_PTR(ret));
+ return ret;
}
drm_dbg_kms(aux->drm_dev, "DSC DPCD: %*ph\n",
DP_DSC_RECEIVER_CAP_SIZE,
dsc_dpcd);
+ return 0;
}
static void init_dsc_overall_throughput_limits(struct intel_connector *connector, bool is_branch)
@@ -4345,8 +4349,9 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
if (dpcd_rev < DP_DPCD_REV_14)
return;
- intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
- connector->dp.dsc_dpcd);
+ if (intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
+ connector->dp.dsc_dpcd) < 0)
+ return;
if (drm_dp_dpcd_readb(connector->dp.dsc_decompression_aux, DP_FEC_CAPABILITY,
&connector->dp.fec_capability) < 0) {
@@ -4376,7 +4381,9 @@ static void intel_edp_get_dsc_sink_cap(u8 edp_dpcd_rev, struct intel_connector *
if (edp_dpcd_rev < DP_EDP_14)
return;
- intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux, connector->dp.dsc_dpcd);
+ if (intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
+ connector->dp.dsc_dpcd) < 0)
+ return;
if (connector->dp.dsc_dpcd[0] & DP_DSC_DECOMPRESSION_IS_SUPPORTED)
init_dsc_overall_throughput_limits(connector, false);
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v3] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd
2026-02-02 8:18 ` [PATCH v3] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd Suraj Kandpal
@ 2026-02-02 8:47 ` Nautiyal, Ankit K
0 siblings, 0 replies; 13+ messages in thread
From: Nautiyal, Ankit K @ 2026-02-02 8:47 UTC (permalink / raw)
To: Suraj Kandpal, intel-xe, intel-gfx; +Cc: arun.r.murthy
On 2/2/2026 1:48 PM, Suraj Kandpal wrote:
> Add a meaningful return to intel_dp_read_dsc_dpcd. This is to avoid
> unwanted DPCD reads which are not needed once we know DSC DPCD
> read fails. To do this convert drm_dp_dpcd_read to drm_dp_dpcd_read_data
> which returns a meaningful error which can be propogated up when all
> bits are not read.
> While we are at it convert the drm_err in intel_dp_read_dsc_dpcd to
> drm_dbg_kms. This is because we do not want a hard ERROR when we
> call this function, during the intel_dp_detect phase since AUX may not
> be up, it is expected to fail but we do not expect a failure in read
> when we call intel_dp_dsc_get_sink_cap so we move the drm_err there.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
LGTM.
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> V1 -> V2:
> -Commit message fixup (Jani)
> -Convert drm_dp_dpcd_read to drm_dp_dpcd_read_data (Jani)
> -Propogate the error sent by drm_dp_dpcd_read_data up (Jani)
> -Use %pe and ERR_PTR() to log the extact error (Jani)
>
> V2 -> V3:
> -No need for the extra drm_err (Ankit)
>
> drivers/gpu/drm/i915/display/intel_dp.c | 31 +++++++++++++++----------
> 1 file changed, 19 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 79fd3b8d8b25..380d9801c377 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -4281,20 +4281,24 @@ static bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp)
> return dprx & DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED;
> }
>
> -static void intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux,
> - u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
> -{
> - if (drm_dp_dpcd_read(aux, DP_DSC_SUPPORT, dsc_dpcd,
> - DP_DSC_RECEIVER_CAP_SIZE) < 0) {
> - drm_err(aux->drm_dev,
> - "Failed to read DPCD register 0x%x\n",
> - DP_DSC_SUPPORT);
> - return;
> +static int intel_dp_read_dsc_dpcd(struct drm_dp_aux *aux,
> + u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
> +{
> + int ret;
> +
> + ret = drm_dp_dpcd_read_data(aux, DP_DSC_SUPPORT, dsc_dpcd,
> + DP_DSC_RECEIVER_CAP_SIZE);
> + if (ret) {
> + drm_dbg_kms(aux->drm_dev,
> + "Could not read DSC DPCD register 0x%x Error: %pe\n",
> + DP_DSC_SUPPORT, ERR_PTR(ret));
> + return ret;
> }
>
> drm_dbg_kms(aux->drm_dev, "DSC DPCD: %*ph\n",
> DP_DSC_RECEIVER_CAP_SIZE,
> dsc_dpcd);
> + return 0;
> }
>
> static void init_dsc_overall_throughput_limits(struct intel_connector *connector, bool is_branch)
> @@ -4345,8 +4349,9 @@ void intel_dp_get_dsc_sink_cap(u8 dpcd_rev,
> if (dpcd_rev < DP_DPCD_REV_14)
> return;
>
> - intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
> - connector->dp.dsc_dpcd);
> + if (intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
> + connector->dp.dsc_dpcd) < 0)
> + return;
>
> if (drm_dp_dpcd_readb(connector->dp.dsc_decompression_aux, DP_FEC_CAPABILITY,
> &connector->dp.fec_capability) < 0) {
> @@ -4376,7 +4381,9 @@ static void intel_edp_get_dsc_sink_cap(u8 edp_dpcd_rev, struct intel_connector *
> if (edp_dpcd_rev < DP_EDP_14)
> return;
>
> - intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux, connector->dp.dsc_dpcd);
> + if (intel_dp_read_dsc_dpcd(connector->dp.dsc_decompression_aux,
> + connector->dp.dsc_dpcd) < 0)
> + return;
>
> if (connector->dp.dsc_dpcd[0] & DP_DSC_DECOMPRESSION_IS_SUPPORTED)
> init_dsc_overall_throughput_limits(connector, false);
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ CI.KUnit: success for drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd (rev3)
2026-01-28 4:49 [PATCH] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd Suraj Kandpal
` (6 preceding siblings ...)
2026-02-02 8:18 ` [PATCH v3] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd Suraj Kandpal
@ 2026-02-02 16:58 ` Patchwork
2026-02-02 17:32 ` ✓ Xe.CI.BAT: " Patchwork
8 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-02-02 16:58 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-xe
== Series Details ==
Series: drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd (rev3)
URL : https://patchwork.freedesktop.org/series/160734/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[16:56:44] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:56:48] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:57:20] Starting KUnit Kernel (1/1)...
[16:57:20] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:57:20] ================== guc_buf (11 subtests) ===================
[16:57:20] [PASSED] test_smallest
[16:57:20] [PASSED] test_largest
[16:57:20] [PASSED] test_granular
[16:57:20] [PASSED] test_unique
[16:57:20] [PASSED] test_overlap
[16:57:20] [PASSED] test_reusable
[16:57:20] [PASSED] test_too_big
[16:57:20] [PASSED] test_flush
[16:57:20] [PASSED] test_lookup
[16:57:20] [PASSED] test_data
[16:57:20] [PASSED] test_class
[16:57:20] ===================== [PASSED] guc_buf =====================
[16:57:20] =================== guc_dbm (7 subtests) ===================
[16:57:20] [PASSED] test_empty
[16:57:20] [PASSED] test_default
[16:57:20] ======================== test_size ========================
[16:57:20] [PASSED] 4
[16:57:20] [PASSED] 8
[16:57:20] [PASSED] 32
[16:57:20] [PASSED] 256
[16:57:20] ==================== [PASSED] test_size ====================
[16:57:20] ======================= test_reuse ========================
[16:57:20] [PASSED] 4
[16:57:20] [PASSED] 8
[16:57:20] [PASSED] 32
[16:57:20] [PASSED] 256
[16:57:20] =================== [PASSED] test_reuse ====================
[16:57:20] =================== test_range_overlap ====================
[16:57:20] [PASSED] 4
[16:57:20] [PASSED] 8
[16:57:20] [PASSED] 32
[16:57:20] [PASSED] 256
[16:57:20] =============== [PASSED] test_range_overlap ================
[16:57:20] =================== test_range_compact ====================
[16:57:20] [PASSED] 4
[16:57:20] [PASSED] 8
[16:57:20] [PASSED] 32
[16:57:20] [PASSED] 256
[16:57:20] =============== [PASSED] test_range_compact ================
[16:57:20] ==================== test_range_spare =====================
[16:57:20] [PASSED] 4
[16:57:20] [PASSED] 8
[16:57:20] [PASSED] 32
[16:57:20] [PASSED] 256
[16:57:20] ================ [PASSED] test_range_spare =================
[16:57:20] ===================== [PASSED] guc_dbm =====================
[16:57:20] =================== guc_idm (6 subtests) ===================
[16:57:20] [PASSED] bad_init
[16:57:20] [PASSED] no_init
[16:57:20] [PASSED] init_fini
[16:57:20] [PASSED] check_used
[16:57:20] [PASSED] check_quota
[16:57:20] [PASSED] check_all
[16:57:20] ===================== [PASSED] guc_idm =====================
[16:57:20] ================== no_relay (3 subtests) ===================
[16:57:20] [PASSED] xe_drops_guc2pf_if_not_ready
[16:57:20] [PASSED] xe_drops_guc2vf_if_not_ready
[16:57:20] [PASSED] xe_rejects_send_if_not_ready
[16:57:20] ==================== [PASSED] no_relay =====================
[16:57:20] ================== pf_relay (14 subtests) ==================
[16:57:20] [PASSED] pf_rejects_guc2pf_too_short
[16:57:20] [PASSED] pf_rejects_guc2pf_too_long
[16:57:20] [PASSED] pf_rejects_guc2pf_no_payload
[16:57:20] [PASSED] pf_fails_no_payload
[16:57:20] [PASSED] pf_fails_bad_origin
[16:57:20] [PASSED] pf_fails_bad_type
[16:57:20] [PASSED] pf_txn_reports_error
[16:57:20] [PASSED] pf_txn_sends_pf2guc
[16:57:20] [PASSED] pf_sends_pf2guc
[16:57:20] [SKIPPED] pf_loopback_nop
[16:57:20] [SKIPPED] pf_loopback_echo
[16:57:20] [SKIPPED] pf_loopback_fail
[16:57:20] [SKIPPED] pf_loopback_busy
[16:57:20] [SKIPPED] pf_loopback_retry
[16:57:20] ==================== [PASSED] pf_relay =====================
[16:57:20] ================== vf_relay (3 subtests) ===================
[16:57:20] [PASSED] vf_rejects_guc2vf_too_short
[16:57:20] [PASSED] vf_rejects_guc2vf_too_long
[16:57:20] [PASSED] vf_rejects_guc2vf_no_payload
[16:57:20] ==================== [PASSED] vf_relay =====================
[16:57:20] ================ pf_gt_config (6 subtests) =================
[16:57:20] [PASSED] fair_contexts_1vf
[16:57:20] [PASSED] fair_doorbells_1vf
[16:57:20] [PASSED] fair_ggtt_1vf
[16:57:20] ====================== fair_contexts ======================
[16:57:20] [PASSED] 1 VF
[16:57:20] [PASSED] 2 VFs
[16:57:20] [PASSED] 3 VFs
[16:57:20] [PASSED] 4 VFs
[16:57:20] [PASSED] 5 VFs
[16:57:20] [PASSED] 6 VFs
[16:57:20] [PASSED] 7 VFs
[16:57:20] [PASSED] 8 VFs
[16:57:20] [PASSED] 9 VFs
[16:57:20] [PASSED] 10 VFs
[16:57:20] [PASSED] 11 VFs
[16:57:20] [PASSED] 12 VFs
[16:57:20] [PASSED] 13 VFs
[16:57:20] [PASSED] 14 VFs
[16:57:20] [PASSED] 15 VFs
[16:57:20] [PASSED] 16 VFs
[16:57:20] [PASSED] 17 VFs
[16:57:20] [PASSED] 18 VFs
[16:57:20] [PASSED] 19 VFs
[16:57:20] [PASSED] 20 VFs
[16:57:20] [PASSED] 21 VFs
[16:57:20] [PASSED] 22 VFs
[16:57:20] [PASSED] 23 VFs
[16:57:20] [PASSED] 24 VFs
[16:57:20] [PASSED] 25 VFs
[16:57:20] [PASSED] 26 VFs
[16:57:20] [PASSED] 27 VFs
[16:57:20] [PASSED] 28 VFs
[16:57:20] [PASSED] 29 VFs
[16:57:20] [PASSED] 30 VFs
[16:57:20] [PASSED] 31 VFs
[16:57:20] [PASSED] 32 VFs
[16:57:20] [PASSED] 33 VFs
[16:57:20] [PASSED] 34 VFs
[16:57:20] [PASSED] 35 VFs
[16:57:20] [PASSED] 36 VFs
[16:57:20] [PASSED] 37 VFs
[16:57:20] [PASSED] 38 VFs
[16:57:20] [PASSED] 39 VFs
[16:57:20] [PASSED] 40 VFs
[16:57:20] [PASSED] 41 VFs
[16:57:20] [PASSED] 42 VFs
[16:57:20] [PASSED] 43 VFs
[16:57:20] [PASSED] 44 VFs
[16:57:20] [PASSED] 45 VFs
[16:57:20] [PASSED] 46 VFs
[16:57:20] [PASSED] 47 VFs
[16:57:20] [PASSED] 48 VFs
[16:57:20] [PASSED] 49 VFs
[16:57:20] [PASSED] 50 VFs
[16:57:20] [PASSED] 51 VFs
[16:57:20] [PASSED] 52 VFs
[16:57:20] [PASSED] 53 VFs
[16:57:20] [PASSED] 54 VFs
[16:57:20] [PASSED] 55 VFs
[16:57:20] [PASSED] 56 VFs
[16:57:20] [PASSED] 57 VFs
[16:57:20] [PASSED] 58 VFs
[16:57:20] [PASSED] 59 VFs
[16:57:20] [PASSED] 60 VFs
[16:57:20] [PASSED] 61 VFs
[16:57:20] [PASSED] 62 VFs
[16:57:20] [PASSED] 63 VFs
[16:57:20] ================== [PASSED] fair_contexts ==================
[16:57:20] ===================== fair_doorbells ======================
[16:57:20] [PASSED] 1 VF
[16:57:20] [PASSED] 2 VFs
[16:57:20] [PASSED] 3 VFs
[16:57:20] [PASSED] 4 VFs
[16:57:20] [PASSED] 5 VFs
[16:57:20] [PASSED] 6 VFs
[16:57:20] [PASSED] 7 VFs
[16:57:20] [PASSED] 8 VFs
[16:57:20] [PASSED] 9 VFs
[16:57:20] [PASSED] 10 VFs
[16:57:20] [PASSED] 11 VFs
[16:57:20] [PASSED] 12 VFs
[16:57:20] [PASSED] 13 VFs
[16:57:20] [PASSED] 14 VFs
[16:57:20] [PASSED] 15 VFs
[16:57:20] [PASSED] 16 VFs
[16:57:20] [PASSED] 17 VFs
[16:57:20] [PASSED] 18 VFs
[16:57:20] [PASSED] 19 VFs
[16:57:20] [PASSED] 20 VFs
[16:57:20] [PASSED] 21 VFs
[16:57:20] [PASSED] 22 VFs
[16:57:20] [PASSED] 23 VFs
[16:57:20] [PASSED] 24 VFs
[16:57:20] [PASSED] 25 VFs
[16:57:20] [PASSED] 26 VFs
[16:57:20] [PASSED] 27 VFs
[16:57:20] [PASSED] 28 VFs
[16:57:20] [PASSED] 29 VFs
[16:57:20] [PASSED] 30 VFs
[16:57:20] [PASSED] 31 VFs
[16:57:20] [PASSED] 32 VFs
[16:57:20] [PASSED] 33 VFs
[16:57:20] [PASSED] 34 VFs
[16:57:20] [PASSED] 35 VFs
[16:57:20] [PASSED] 36 VFs
[16:57:20] [PASSED] 37 VFs
[16:57:20] [PASSED] 38 VFs
[16:57:20] [PASSED] 39 VFs
[16:57:20] [PASSED] 40 VFs
[16:57:20] [PASSED] 41 VFs
[16:57:20] [PASSED] 42 VFs
[16:57:20] [PASSED] 43 VFs
[16:57:20] [PASSED] 44 VFs
[16:57:20] [PASSED] 45 VFs
[16:57:20] [PASSED] 46 VFs
[16:57:20] [PASSED] 47 VFs
[16:57:20] [PASSED] 48 VFs
[16:57:20] [PASSED] 49 VFs
[16:57:20] [PASSED] 50 VFs
[16:57:20] [PASSED] 51 VFs
[16:57:20] [PASSED] 52 VFs
[16:57:20] [PASSED] 53 VFs
[16:57:20] [PASSED] 54 VFs
[16:57:20] [PASSED] 55 VFs
[16:57:20] [PASSED] 56 VFs
[16:57:20] [PASSED] 57 VFs
[16:57:20] [PASSED] 58 VFs
[16:57:20] [PASSED] 59 VFs
[16:57:20] [PASSED] 60 VFs
[16:57:20] [PASSED] 61 VFs
[16:57:20] [PASSED] 62 VFs
[16:57:20] [PASSED] 63 VFs
[16:57:20] ================= [PASSED] fair_doorbells ==================
[16:57:20] ======================== fair_ggtt ========================
[16:57:20] [PASSED] 1 VF
[16:57:20] [PASSED] 2 VFs
[16:57:20] [PASSED] 3 VFs
[16:57:20] [PASSED] 4 VFs
[16:57:20] [PASSED] 5 VFs
[16:57:20] [PASSED] 6 VFs
[16:57:20] [PASSED] 7 VFs
[16:57:20] [PASSED] 8 VFs
[16:57:20] [PASSED] 9 VFs
[16:57:20] [PASSED] 10 VFs
[16:57:20] [PASSED] 11 VFs
[16:57:20] [PASSED] 12 VFs
[16:57:20] [PASSED] 13 VFs
[16:57:20] [PASSED] 14 VFs
[16:57:20] [PASSED] 15 VFs
[16:57:20] [PASSED] 16 VFs
[16:57:20] [PASSED] 17 VFs
[16:57:20] [PASSED] 18 VFs
[16:57:20] [PASSED] 19 VFs
[16:57:20] [PASSED] 20 VFs
[16:57:20] [PASSED] 21 VFs
[16:57:20] [PASSED] 22 VFs
[16:57:20] [PASSED] 23 VFs
[16:57:20] [PASSED] 24 VFs
[16:57:20] [PASSED] 25 VFs
[16:57:20] [PASSED] 26 VFs
[16:57:20] [PASSED] 27 VFs
[16:57:20] [PASSED] 28 VFs
[16:57:20] [PASSED] 29 VFs
[16:57:20] [PASSED] 30 VFs
[16:57:20] [PASSED] 31 VFs
[16:57:20] [PASSED] 32 VFs
[16:57:20] [PASSED] 33 VFs
[16:57:20] [PASSED] 34 VFs
[16:57:20] [PASSED] 35 VFs
[16:57:20] [PASSED] 36 VFs
[16:57:20] [PASSED] 37 VFs
[16:57:20] [PASSED] 38 VFs
[16:57:20] [PASSED] 39 VFs
[16:57:20] [PASSED] 40 VFs
[16:57:20] [PASSED] 41 VFs
[16:57:20] [PASSED] 42 VFs
[16:57:20] [PASSED] 43 VFs
[16:57:20] [PASSED] 44 VFs
[16:57:20] [PASSED] 45 VFs
[16:57:20] [PASSED] 46 VFs
[16:57:20] [PASSED] 47 VFs
[16:57:20] [PASSED] 48 VFs
[16:57:20] [PASSED] 49 VFs
[16:57:20] [PASSED] 50 VFs
[16:57:20] [PASSED] 51 VFs
[16:57:20] [PASSED] 52 VFs
[16:57:20] [PASSED] 53 VFs
[16:57:20] [PASSED] 54 VFs
[16:57:20] [PASSED] 55 VFs
[16:57:20] [PASSED] 56 VFs
[16:57:20] [PASSED] 57 VFs
[16:57:20] [PASSED] 58 VFs
[16:57:20] [PASSED] 59 VFs
[16:57:20] [PASSED] 60 VFs
[16:57:20] [PASSED] 61 VFs
[16:57:20] [PASSED] 62 VFs
[16:57:20] [PASSED] 63 VFs
[16:57:20] ==================== [PASSED] fair_ggtt ====================
[16:57:20] ================== [PASSED] pf_gt_config ===================
[16:57:20] ===================== lmtt (1 subtest) =====================
[16:57:20] ======================== test_ops =========================
[16:57:20] [PASSED] 2-level
[16:57:20] [PASSED] multi-level
[16:57:20] ==================== [PASSED] test_ops =====================
[16:57:20] ====================== [PASSED] lmtt =======================
[16:57:20] ================= pf_service (11 subtests) =================
[16:57:20] [PASSED] pf_negotiate_any
[16:57:20] [PASSED] pf_negotiate_base_match
[16:57:20] [PASSED] pf_negotiate_base_newer
[16:57:20] [PASSED] pf_negotiate_base_next
[16:57:20] [SKIPPED] pf_negotiate_base_older
[16:57:20] [PASSED] pf_negotiate_base_prev
[16:57:20] [PASSED] pf_negotiate_latest_match
[16:57:20] [PASSED] pf_negotiate_latest_newer
[16:57:20] [PASSED] pf_negotiate_latest_next
[16:57:20] [SKIPPED] pf_negotiate_latest_older
[16:57:20] [SKIPPED] pf_negotiate_latest_prev
[16:57:20] =================== [PASSED] pf_service ====================
[16:57:20] ================= xe_guc_g2g (2 subtests) ==================
[16:57:20] ============== xe_live_guc_g2g_kunit_default ==============
[16:57:20] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[16:57:20] ============== xe_live_guc_g2g_kunit_allmem ===============
[16:57:20] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[16:57:20] =================== [SKIPPED] xe_guc_g2g ===================
[16:57:20] =================== xe_mocs (2 subtests) ===================
[16:57:20] ================ xe_live_mocs_kernel_kunit ================
[16:57:20] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[16:57:20] ================ xe_live_mocs_reset_kunit =================
[16:57:20] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[16:57:20] ==================== [SKIPPED] xe_mocs =====================
[16:57:20] ================= xe_migrate (2 subtests) ==================
[16:57:20] ================= xe_migrate_sanity_kunit =================
[16:57:20] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[16:57:20] ================== xe_validate_ccs_kunit ==================
[16:57:20] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[16:57:20] =================== [SKIPPED] xe_migrate ===================
[16:57:20] ================== xe_dma_buf (1 subtest) ==================
[16:57:20] ==================== xe_dma_buf_kunit =====================
[16:57:20] ================ [SKIPPED] xe_dma_buf_kunit ================
[16:57:20] =================== [SKIPPED] xe_dma_buf ===================
[16:57:20] ================= xe_bo_shrink (1 subtest) =================
[16:57:20] =================== xe_bo_shrink_kunit ====================
[16:57:20] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[16:57:20] ================== [SKIPPED] xe_bo_shrink ==================
[16:57:20] ==================== xe_bo (2 subtests) ====================
[16:57:20] ================== xe_ccs_migrate_kunit ===================
[16:57:20] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[16:57:20] ==================== xe_bo_evict_kunit ====================
[16:57:20] =============== [SKIPPED] xe_bo_evict_kunit ================
[16:57:20] ===================== [SKIPPED] xe_bo ======================
[16:57:20] ==================== args (13 subtests) ====================
[16:57:20] [PASSED] count_args_test
[16:57:20] [PASSED] call_args_example
[16:57:20] [PASSED] call_args_test
[16:57:20] [PASSED] drop_first_arg_example
[16:57:20] [PASSED] drop_first_arg_test
[16:57:20] [PASSED] first_arg_example
[16:57:20] [PASSED] first_arg_test
[16:57:20] [PASSED] last_arg_example
[16:57:20] [PASSED] last_arg_test
[16:57:20] [PASSED] pick_arg_example
[16:57:20] [PASSED] if_args_example
[16:57:20] [PASSED] if_args_test
[16:57:20] [PASSED] sep_comma_example
[16:57:20] ====================== [PASSED] args =======================
[16:57:20] =================== xe_pci (3 subtests) ====================
[16:57:20] ==================== check_graphics_ip ====================
[16:57:20] [PASSED] 12.00 Xe_LP
[16:57:20] [PASSED] 12.10 Xe_LP+
[16:57:20] [PASSED] 12.55 Xe_HPG
[16:57:20] [PASSED] 12.60 Xe_HPC
[16:57:20] [PASSED] 12.70 Xe_LPG
[16:57:20] [PASSED] 12.71 Xe_LPG
[16:57:20] [PASSED] 12.74 Xe_LPG+
[16:57:20] [PASSED] 20.01 Xe2_HPG
[16:57:20] [PASSED] 20.02 Xe2_HPG
[16:57:20] [PASSED] 20.04 Xe2_LPG
[16:57:20] [PASSED] 30.00 Xe3_LPG
[16:57:20] [PASSED] 30.01 Xe3_LPG
[16:57:20] [PASSED] 30.03 Xe3_LPG
[16:57:20] [PASSED] 30.04 Xe3_LPG
[16:57:20] [PASSED] 30.05 Xe3_LPG
[16:57:20] [PASSED] 35.11 Xe3p_XPC
[16:57:20] ================ [PASSED] check_graphics_ip ================
[16:57:20] ===================== check_media_ip ======================
[16:57:20] [PASSED] 12.00 Xe_M
[16:57:20] [PASSED] 12.55 Xe_HPM
[16:57:20] [PASSED] 13.00 Xe_LPM+
[16:57:20] [PASSED] 13.01 Xe2_HPM
[16:57:20] [PASSED] 20.00 Xe2_LPM
[16:57:20] [PASSED] 30.00 Xe3_LPM
[16:57:20] [PASSED] 30.02 Xe3_LPM
[16:57:20] [PASSED] 35.00 Xe3p_LPM
[16:57:20] [PASSED] 35.03 Xe3p_HPM
[16:57:20] ================= [PASSED] check_media_ip ==================
[16:57:20] =================== check_platform_desc ===================
[16:57:20] [PASSED] 0x9A60 (TIGERLAKE)
[16:57:20] [PASSED] 0x9A68 (TIGERLAKE)
[16:57:20] [PASSED] 0x9A70 (TIGERLAKE)
[16:57:20] [PASSED] 0x9A40 (TIGERLAKE)
[16:57:20] [PASSED] 0x9A49 (TIGERLAKE)
[16:57:20] [PASSED] 0x9A59 (TIGERLAKE)
[16:57:20] [PASSED] 0x9A78 (TIGERLAKE)
[16:57:20] [PASSED] 0x9AC0 (TIGERLAKE)
[16:57:20] [PASSED] 0x9AC9 (TIGERLAKE)
[16:57:20] [PASSED] 0x9AD9 (TIGERLAKE)
[16:57:20] [PASSED] 0x9AF8 (TIGERLAKE)
[16:57:20] [PASSED] 0x4C80 (ROCKETLAKE)
[16:57:20] [PASSED] 0x4C8A (ROCKETLAKE)
[16:57:20] [PASSED] 0x4C8B (ROCKETLAKE)
[16:57:20] [PASSED] 0x4C8C (ROCKETLAKE)
[16:57:20] [PASSED] 0x4C90 (ROCKETLAKE)
[16:57:20] [PASSED] 0x4C9A (ROCKETLAKE)
[16:57:20] [PASSED] 0x4680 (ALDERLAKE_S)
[16:57:20] [PASSED] 0x4682 (ALDERLAKE_S)
[16:57:20] [PASSED] 0x4688 (ALDERLAKE_S)
[16:57:20] [PASSED] 0x468A (ALDERLAKE_S)
[16:57:20] [PASSED] 0x468B (ALDERLAKE_S)
[16:57:20] [PASSED] 0x4690 (ALDERLAKE_S)
[16:57:20] [PASSED] 0x4692 (ALDERLAKE_S)
[16:57:20] [PASSED] 0x4693 (ALDERLAKE_S)
[16:57:20] [PASSED] 0x46A0 (ALDERLAKE_P)
[16:57:20] [PASSED] 0x46A1 (ALDERLAKE_P)
[16:57:20] [PASSED] 0x46A2 (ALDERLAKE_P)
[16:57:20] [PASSED] 0x46A3 (ALDERLAKE_P)
[16:57:20] [PASSED] 0x46A6 (ALDERLAKE_P)
[16:57:20] [PASSED] 0x46A8 (ALDERLAKE_P)
[16:57:20] [PASSED] 0x46AA (ALDERLAKE_P)
[16:57:20] [PASSED] 0x462A (ALDERLAKE_P)
[16:57:20] [PASSED] 0x4626 (ALDERLAKE_P)
[16:57:20] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[16:57:20] [PASSED] 0x46B0 (ALDERLAKE_P)
[16:57:20] [PASSED] 0x46B1 (ALDERLAKE_P)
[16:57:20] [PASSED] 0x46B2 (ALDERLAKE_P)
[16:57:20] [PASSED] 0x46B3 (ALDERLAKE_P)
[16:57:20] [PASSED] 0x46C0 (ALDERLAKE_P)
[16:57:20] [PASSED] 0x46C1 (ALDERLAKE_P)
[16:57:20] [PASSED] 0x46C2 (ALDERLAKE_P)
[16:57:20] [PASSED] 0x46C3 (ALDERLAKE_P)
[16:57:20] [PASSED] 0x46D0 (ALDERLAKE_N)
[16:57:20] [PASSED] 0x46D1 (ALDERLAKE_N)
[16:57:20] [PASSED] 0x46D2 (ALDERLAKE_N)
[16:57:20] [PASSED] 0x46D3 (ALDERLAKE_N)
[16:57:20] [PASSED] 0x46D4 (ALDERLAKE_N)
[16:57:20] [PASSED] 0xA721 (ALDERLAKE_P)
[16:57:20] [PASSED] 0xA7A1 (ALDERLAKE_P)
[16:57:20] [PASSED] 0xA7A9 (ALDERLAKE_P)
[16:57:20] [PASSED] 0xA7AC (ALDERLAKE_P)
[16:57:20] [PASSED] 0xA7AD (ALDERLAKE_P)
[16:57:20] [PASSED] 0xA720 (ALDERLAKE_P)
[16:57:20] [PASSED] 0xA7A0 (ALDERLAKE_P)
[16:57:20] [PASSED] 0xA7A8 (ALDERLAKE_P)
[16:57:20] [PASSED] 0xA7AA (ALDERLAKE_P)
[16:57:20] [PASSED] 0xA7AB (ALDERLAKE_P)
[16:57:20] [PASSED] 0xA780 (ALDERLAKE_S)
[16:57:20] [PASSED] 0xA781 (ALDERLAKE_S)
[16:57:20] [PASSED] 0xA782 (ALDERLAKE_S)
[16:57:20] [PASSED] 0xA783 (ALDERLAKE_S)
[16:57:20] [PASSED] 0xA788 (ALDERLAKE_S)
[16:57:20] [PASSED] 0xA789 (ALDERLAKE_S)
[16:57:20] [PASSED] 0xA78A (ALDERLAKE_S)
[16:57:20] [PASSED] 0xA78B (ALDERLAKE_S)
[16:57:20] [PASSED] 0x4905 (DG1)
[16:57:20] [PASSED] 0x4906 (DG1)
[16:57:20] [PASSED] 0x4907 (DG1)
[16:57:20] [PASSED] 0x4908 (DG1)
[16:57:20] [PASSED] 0x4909 (DG1)
[16:57:20] [PASSED] 0x56C0 (DG2)
[16:57:20] [PASSED] 0x56C2 (DG2)
[16:57:20] [PASSED] 0x56C1 (DG2)
[16:57:20] [PASSED] 0x7D51 (METEORLAKE)
[16:57:20] [PASSED] 0x7DD1 (METEORLAKE)
[16:57:20] [PASSED] 0x7D41 (METEORLAKE)
[16:57:20] [PASSED] 0x7D67 (METEORLAKE)
[16:57:20] [PASSED] 0xB640 (METEORLAKE)
[16:57:20] [PASSED] 0x56A0 (DG2)
[16:57:20] [PASSED] 0x56A1 (DG2)
[16:57:20] [PASSED] 0x56A2 (DG2)
[16:57:20] [PASSED] 0x56BE (DG2)
[16:57:20] [PASSED] 0x56BF (DG2)
[16:57:20] [PASSED] 0x5690 (DG2)
[16:57:20] [PASSED] 0x5691 (DG2)
[16:57:20] [PASSED] 0x5692 (DG2)
[16:57:20] [PASSED] 0x56A5 (DG2)
[16:57:20] [PASSED] 0x56A6 (DG2)
[16:57:20] [PASSED] 0x56B0 (DG2)
[16:57:20] [PASSED] 0x56B1 (DG2)
[16:57:20] [PASSED] 0x56BA (DG2)
[16:57:20] [PASSED] 0x56BB (DG2)
[16:57:20] [PASSED] 0x56BC (DG2)
[16:57:20] [PASSED] 0x56BD (DG2)
[16:57:20] [PASSED] 0x5693 (DG2)
[16:57:20] [PASSED] 0x5694 (DG2)
[16:57:20] [PASSED] 0x5695 (DG2)
[16:57:20] [PASSED] 0x56A3 (DG2)
[16:57:20] [PASSED] 0x56A4 (DG2)
[16:57:20] [PASSED] 0x56B2 (DG2)
[16:57:20] [PASSED] 0x56B3 (DG2)
[16:57:20] [PASSED] 0x5696 (DG2)
[16:57:20] [PASSED] 0x5697 (DG2)
[16:57:20] [PASSED] 0xB69 (PVC)
[16:57:20] [PASSED] 0xB6E (PVC)
[16:57:20] [PASSED] 0xBD4 (PVC)
[16:57:20] [PASSED] 0xBD5 (PVC)
[16:57:20] [PASSED] 0xBD6 (PVC)
[16:57:20] [PASSED] 0xBD7 (PVC)
[16:57:20] [PASSED] 0xBD8 (PVC)
[16:57:20] [PASSED] 0xBD9 (PVC)
[16:57:20] [PASSED] 0xBDA (PVC)
[16:57:20] [PASSED] 0xBDB (PVC)
[16:57:20] [PASSED] 0xBE0 (PVC)
[16:57:20] [PASSED] 0xBE1 (PVC)
[16:57:20] [PASSED] 0xBE5 (PVC)
[16:57:20] [PASSED] 0x7D40 (METEORLAKE)
[16:57:20] [PASSED] 0x7D45 (METEORLAKE)
[16:57:20] [PASSED] 0x7D55 (METEORLAKE)
[16:57:20] [PASSED] 0x7D60 (METEORLAKE)
[16:57:20] [PASSED] 0x7DD5 (METEORLAKE)
[16:57:20] [PASSED] 0x6420 (LUNARLAKE)
[16:57:20] [PASSED] 0x64A0 (LUNARLAKE)
[16:57:20] [PASSED] 0x64B0 (LUNARLAKE)
[16:57:20] [PASSED] 0xE202 (BATTLEMAGE)
[16:57:20] [PASSED] 0xE209 (BATTLEMAGE)
[16:57:20] [PASSED] 0xE20B (BATTLEMAGE)
[16:57:20] [PASSED] 0xE20C (BATTLEMAGE)
[16:57:20] [PASSED] 0xE20D (BATTLEMAGE)
[16:57:20] [PASSED] 0xE210 (BATTLEMAGE)
[16:57:20] [PASSED] 0xE211 (BATTLEMAGE)
[16:57:20] [PASSED] 0xE212 (BATTLEMAGE)
[16:57:20] [PASSED] 0xE216 (BATTLEMAGE)
[16:57:20] [PASSED] 0xE220 (BATTLEMAGE)
[16:57:20] [PASSED] 0xE221 (BATTLEMAGE)
[16:57:20] [PASSED] 0xE222 (BATTLEMAGE)
[16:57:20] [PASSED] 0xE223 (BATTLEMAGE)
[16:57:20] [PASSED] 0xB080 (PANTHERLAKE)
[16:57:20] [PASSED] 0xB081 (PANTHERLAKE)
[16:57:20] [PASSED] 0xB082 (PANTHERLAKE)
[16:57:20] [PASSED] 0xB083 (PANTHERLAKE)
[16:57:20] [PASSED] 0xB084 (PANTHERLAKE)
[16:57:20] [PASSED] 0xB085 (PANTHERLAKE)
[16:57:20] [PASSED] 0xB086 (PANTHERLAKE)
[16:57:20] [PASSED] 0xB087 (PANTHERLAKE)
[16:57:20] [PASSED] 0xB08F (PANTHERLAKE)
[16:57:20] [PASSED] 0xB090 (PANTHERLAKE)
[16:57:20] [PASSED] 0xB0A0 (PANTHERLAKE)
[16:57:20] [PASSED] 0xB0B0 (PANTHERLAKE)
[16:57:20] [PASSED] 0xFD80 (PANTHERLAKE)
[16:57:20] [PASSED] 0xFD81 (PANTHERLAKE)
[16:57:20] [PASSED] 0xD740 (NOVALAKE_S)
[16:57:20] [PASSED] 0xD741 (NOVALAKE_S)
[16:57:20] [PASSED] 0xD742 (NOVALAKE_S)
[16:57:20] [PASSED] 0xD743 (NOVALAKE_S)
[16:57:20] [PASSED] 0xD744 (NOVALAKE_S)
[16:57:20] [PASSED] 0xD745 (NOVALAKE_S)
[16:57:20] [PASSED] 0x674C (CRESCENTISLAND)
[16:57:20] =============== [PASSED] check_platform_desc ===============
[16:57:20] ===================== [PASSED] xe_pci ======================
[16:57:20] =================== xe_rtp (2 subtests) ====================
[16:57:20] =============== xe_rtp_process_to_sr_tests ================
[16:57:20] [PASSED] coalesce-same-reg
[16:57:20] [PASSED] no-match-no-add
[16:57:20] [PASSED] match-or
[16:57:20] [PASSED] match-or-xfail
[16:57:20] [PASSED] no-match-no-add-multiple-rules
[16:57:20] [PASSED] two-regs-two-entries
[16:57:20] [PASSED] clr-one-set-other
[16:57:20] [PASSED] set-field
[16:57:20] [PASSED] conflict-duplicate
[16:57:20] [PASSED] conflict-not-disjoint
[16:57:20] [PASSED] conflict-reg-type
[16:57:20] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[16:57:20] ================== xe_rtp_process_tests ===================
[16:57:20] [PASSED] active1
[16:57:20] [PASSED] active2
[16:57:20] [PASSED] active-inactive
[16:57:20] [PASSED] inactive-active
[16:57:20] [PASSED] inactive-1st_or_active-inactive
[16:57:20] [PASSED] inactive-2nd_or_active-inactive
[16:57:20] [PASSED] inactive-last_or_active-inactive
[16:57:20] [PASSED] inactive-no_or_active-inactive
[16:57:20] ============== [PASSED] xe_rtp_process_tests ===============
[16:57:20] ===================== [PASSED] xe_rtp ======================
[16:57:20] ==================== xe_wa (1 subtest) =====================
[16:57:20] ======================== xe_wa_gt =========================
[16:57:20] [PASSED] TIGERLAKE B0
[16:57:20] [PASSED] DG1 A0
[16:57:20] [PASSED] DG1 B0
[16:57:20] [PASSED] ALDERLAKE_S A0
[16:57:20] [PASSED] ALDERLAKE_S B0
[16:57:20] [PASSED] ALDERLAKE_S C0
[16:57:20] [PASSED] ALDERLAKE_S D0
[16:57:20] [PASSED] ALDERLAKE_P A0
[16:57:20] [PASSED] ALDERLAKE_P B0
[16:57:20] [PASSED] ALDERLAKE_P C0
[16:57:20] [PASSED] ALDERLAKE_S RPLS D0
[16:57:20] [PASSED] ALDERLAKE_P RPLU E0
[16:57:20] [PASSED] DG2 G10 C0
[16:57:20] [PASSED] DG2 G11 B1
[16:57:20] [PASSED] DG2 G12 A1
[16:57:20] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[16:57:20] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[16:57:20] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[16:57:20] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[16:57:20] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[16:57:20] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[16:57:20] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[16:57:20] ==================== [PASSED] xe_wa_gt =====================
[16:57:20] ====================== [PASSED] xe_wa ======================
[16:57:20] ============================================================
[16:57:20] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[16:57:20] Elapsed time: 36.293s total, 4.186s configuring, 31.589s building, 0.477s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[16:57:21] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:57:22] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:57:48] Starting KUnit Kernel (1/1)...
[16:57:48] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:57:48] ============ drm_test_pick_cmdline (2 subtests) ============
[16:57:48] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[16:57:48] =============== drm_test_pick_cmdline_named ===============
[16:57:48] [PASSED] NTSC
[16:57:48] [PASSED] NTSC-J
[16:57:48] [PASSED] PAL
[16:57:48] [PASSED] PAL-M
[16:57:48] =========== [PASSED] drm_test_pick_cmdline_named ===========
[16:57:48] ============== [PASSED] drm_test_pick_cmdline ==============
[16:57:48] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[16:57:48] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[16:57:48] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[16:57:48] =========== drm_validate_clone_mode (2 subtests) ===========
[16:57:48] ============== drm_test_check_in_clone_mode ===============
[16:57:48] [PASSED] in_clone_mode
[16:57:48] [PASSED] not_in_clone_mode
[16:57:48] ========== [PASSED] drm_test_check_in_clone_mode ===========
[16:57:48] =============== drm_test_check_valid_clones ===============
[16:57:48] [PASSED] not_in_clone_mode
[16:57:48] [PASSED] valid_clone
[16:57:48] [PASSED] invalid_clone
[16:57:48] =========== [PASSED] drm_test_check_valid_clones ===========
[16:57:48] ============= [PASSED] drm_validate_clone_mode =============
[16:57:48] ============= drm_validate_modeset (1 subtest) =============
[16:57:48] [PASSED] drm_test_check_connector_changed_modeset
[16:57:48] ============== [PASSED] drm_validate_modeset ===============
[16:57:48] ====== drm_test_bridge_get_current_state (2 subtests) ======
[16:57:48] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[16:57:48] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[16:57:48] ======== [PASSED] drm_test_bridge_get_current_state ========
[16:57:48] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[16:57:48] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[16:57:48] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[16:57:48] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[16:57:48] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[16:57:48] ============== drm_bridge_alloc (2 subtests) ===============
[16:57:48] [PASSED] drm_test_drm_bridge_alloc_basic
[16:57:48] [PASSED] drm_test_drm_bridge_alloc_get_put
[16:57:48] ================ [PASSED] drm_bridge_alloc =================
[16:57:48] ================== drm_buddy (9 subtests) ==================
[16:57:48] [PASSED] drm_test_buddy_alloc_limit
[16:57:48] [PASSED] drm_test_buddy_alloc_optimistic
[16:57:48] [PASSED] drm_test_buddy_alloc_pessimistic
[16:57:48] [PASSED] drm_test_buddy_alloc_pathological
[16:57:48] [PASSED] drm_test_buddy_alloc_contiguous
[16:57:48] [PASSED] drm_test_buddy_alloc_clear
[16:57:48] [PASSED] drm_test_buddy_alloc_range_bias
[16:57:48] [PASSED] drm_test_buddy_fragmentation_performance
[16:57:48] [PASSED] drm_test_buddy_alloc_exceeds_max_order
[16:57:48] ==================== [PASSED] drm_buddy ====================
[16:57:48] ============= drm_cmdline_parser (40 subtests) =============
[16:57:48] [PASSED] drm_test_cmdline_force_d_only
[16:57:48] [PASSED] drm_test_cmdline_force_D_only_dvi
[16:57:48] [PASSED] drm_test_cmdline_force_D_only_hdmi
[16:57:48] [PASSED] drm_test_cmdline_force_D_only_not_digital
[16:57:48] [PASSED] drm_test_cmdline_force_e_only
[16:57:48] [PASSED] drm_test_cmdline_res
[16:57:48] [PASSED] drm_test_cmdline_res_vesa
[16:57:48] [PASSED] drm_test_cmdline_res_vesa_rblank
[16:57:48] [PASSED] drm_test_cmdline_res_rblank
[16:57:48] [PASSED] drm_test_cmdline_res_bpp
[16:57:48] [PASSED] drm_test_cmdline_res_refresh
[16:57:48] [PASSED] drm_test_cmdline_res_bpp_refresh
[16:57:48] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[16:57:48] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[16:57:48] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[16:57:48] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[16:57:48] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[16:57:48] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[16:57:48] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[16:57:48] [PASSED] drm_test_cmdline_res_margins_force_on
[16:57:48] [PASSED] drm_test_cmdline_res_vesa_margins
[16:57:48] [PASSED] drm_test_cmdline_name
[16:57:48] [PASSED] drm_test_cmdline_name_bpp
[16:57:48] [PASSED] drm_test_cmdline_name_option
[16:57:48] [PASSED] drm_test_cmdline_name_bpp_option
[16:57:48] [PASSED] drm_test_cmdline_rotate_0
[16:57:48] [PASSED] drm_test_cmdline_rotate_90
[16:57:48] [PASSED] drm_test_cmdline_rotate_180
[16:57:48] [PASSED] drm_test_cmdline_rotate_270
[16:57:48] [PASSED] drm_test_cmdline_hmirror
[16:57:48] [PASSED] drm_test_cmdline_vmirror
[16:57:48] [PASSED] drm_test_cmdline_margin_options
[16:57:48] [PASSED] drm_test_cmdline_multiple_options
[16:57:48] [PASSED] drm_test_cmdline_bpp_extra_and_option
[16:57:48] [PASSED] drm_test_cmdline_extra_and_option
[16:57:48] [PASSED] drm_test_cmdline_freestanding_options
[16:57:48] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[16:57:48] [PASSED] drm_test_cmdline_panel_orientation
[16:57:48] ================ drm_test_cmdline_invalid =================
[16:57:48] [PASSED] margin_only
[16:57:48] [PASSED] interlace_only
[16:57:48] [PASSED] res_missing_x
[16:57:48] [PASSED] res_missing_y
[16:57:48] [PASSED] res_bad_y
[16:57:48] [PASSED] res_missing_y_bpp
[16:57:48] [PASSED] res_bad_bpp
[16:57:48] [PASSED] res_bad_refresh
[16:57:48] [PASSED] res_bpp_refresh_force_on_off
[16:57:48] [PASSED] res_invalid_mode
[16:57:48] [PASSED] res_bpp_wrong_place_mode
[16:57:48] [PASSED] name_bpp_refresh
[16:57:48] [PASSED] name_refresh
[16:57:48] [PASSED] name_refresh_wrong_mode
[16:57:48] [PASSED] name_refresh_invalid_mode
[16:57:48] [PASSED] rotate_multiple
[16:57:48] [PASSED] rotate_invalid_val
[16:57:48] [PASSED] rotate_truncated
[16:57:48] [PASSED] invalid_option
[16:57:48] [PASSED] invalid_tv_option
[16:57:48] [PASSED] truncated_tv_option
[16:57:48] ============ [PASSED] drm_test_cmdline_invalid =============
[16:57:48] =============== drm_test_cmdline_tv_options ===============
[16:57:48] [PASSED] NTSC
[16:57:48] [PASSED] NTSC_443
[16:57:48] [PASSED] NTSC_J
[16:57:48] [PASSED] PAL
[16:57:48] [PASSED] PAL_M
[16:57:48] [PASSED] PAL_N
[16:57:48] [PASSED] SECAM
[16:57:48] [PASSED] MONO_525
[16:57:48] [PASSED] MONO_625
[16:57:48] =========== [PASSED] drm_test_cmdline_tv_options ===========
[16:57:48] =============== [PASSED] drm_cmdline_parser ================
[16:57:48] ========== drmm_connector_hdmi_init (20 subtests) ==========
[16:57:48] [PASSED] drm_test_connector_hdmi_init_valid
[16:57:48] [PASSED] drm_test_connector_hdmi_init_bpc_8
[16:57:48] [PASSED] drm_test_connector_hdmi_init_bpc_10
[16:57:48] [PASSED] drm_test_connector_hdmi_init_bpc_12
[16:57:48] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[16:57:48] [PASSED] drm_test_connector_hdmi_init_bpc_null
[16:57:48] [PASSED] drm_test_connector_hdmi_init_formats_empty
[16:57:48] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[16:57:48] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[16:57:48] [PASSED] supported_formats=0x9 yuv420_allowed=1
[16:57:48] [PASSED] supported_formats=0x9 yuv420_allowed=0
[16:57:48] [PASSED] supported_formats=0x3 yuv420_allowed=1
[16:57:48] [PASSED] supported_formats=0x3 yuv420_allowed=0
[16:57:48] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[16:57:48] [PASSED] drm_test_connector_hdmi_init_null_ddc
[16:57:48] [PASSED] drm_test_connector_hdmi_init_null_product
[16:57:48] [PASSED] drm_test_connector_hdmi_init_null_vendor
[16:57:48] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[16:57:48] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[16:57:48] [PASSED] drm_test_connector_hdmi_init_product_valid
[16:57:48] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[16:57:48] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[16:57:48] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[16:57:48] ========= drm_test_connector_hdmi_init_type_valid =========
[16:57:48] [PASSED] HDMI-A
[16:57:48] [PASSED] HDMI-B
[16:57:48] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[16:57:48] ======== drm_test_connector_hdmi_init_type_invalid ========
[16:57:48] [PASSED] Unknown
[16:57:48] [PASSED] VGA
[16:57:48] [PASSED] DVI-I
[16:57:48] [PASSED] DVI-D
[16:57:48] [PASSED] DVI-A
[16:57:48] [PASSED] Composite
[16:57:48] [PASSED] SVIDEO
[16:57:48] [PASSED] LVDS
[16:57:48] [PASSED] Component
[16:57:48] [PASSED] DIN
[16:57:48] [PASSED] DP
[16:57:48] [PASSED] TV
[16:57:48] [PASSED] eDP
[16:57:48] [PASSED] Virtual
[16:57:48] [PASSED] DSI
[16:57:48] [PASSED] DPI
[16:57:48] [PASSED] Writeback
[16:57:48] [PASSED] SPI
[16:57:48] [PASSED] USB
[16:57:48] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[16:57:48] ============ [PASSED] drmm_connector_hdmi_init =============
[16:57:48] ============= drmm_connector_init (3 subtests) =============
[16:57:48] [PASSED] drm_test_drmm_connector_init
[16:57:48] [PASSED] drm_test_drmm_connector_init_null_ddc
[16:57:48] ========= drm_test_drmm_connector_init_type_valid =========
[16:57:48] [PASSED] Unknown
[16:57:48] [PASSED] VGA
[16:57:48] [PASSED] DVI-I
[16:57:48] [PASSED] DVI-D
[16:57:48] [PASSED] DVI-A
[16:57:48] [PASSED] Composite
[16:57:48] [PASSED] SVIDEO
[16:57:48] [PASSED] LVDS
[16:57:48] [PASSED] Component
[16:57:48] [PASSED] DIN
[16:57:48] [PASSED] DP
[16:57:48] [PASSED] HDMI-A
[16:57:48] [PASSED] HDMI-B
[16:57:48] [PASSED] TV
[16:57:48] [PASSED] eDP
[16:57:48] [PASSED] Virtual
[16:57:48] [PASSED] DSI
[16:57:48] [PASSED] DPI
[16:57:48] [PASSED] Writeback
[16:57:48] [PASSED] SPI
[16:57:48] [PASSED] USB
[16:57:48] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[16:57:48] =============== [PASSED] drmm_connector_init ===============
[16:57:48] ========= drm_connector_dynamic_init (6 subtests) ==========
[16:57:48] [PASSED] drm_test_drm_connector_dynamic_init
[16:57:48] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[16:57:48] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[16:57:48] [PASSED] drm_test_drm_connector_dynamic_init_properties
[16:57:48] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[16:57:48] [PASSED] Unknown
[16:57:48] [PASSED] VGA
[16:57:48] [PASSED] DVI-I
[16:57:48] [PASSED] DVI-D
[16:57:48] [PASSED] DVI-A
[16:57:48] [PASSED] Composite
[16:57:48] [PASSED] SVIDEO
[16:57:48] [PASSED] LVDS
[16:57:48] [PASSED] Component
[16:57:48] [PASSED] DIN
[16:57:48] [PASSED] DP
[16:57:48] [PASSED] HDMI-A
[16:57:48] [PASSED] HDMI-B
[16:57:48] [PASSED] TV
[16:57:48] [PASSED] eDP
[16:57:48] [PASSED] Virtual
[16:57:48] [PASSED] DSI
[16:57:48] [PASSED] DPI
[16:57:48] [PASSED] Writeback
[16:57:48] [PASSED] SPI
[16:57:48] [PASSED] USB
[16:57:48] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[16:57:48] ======== drm_test_drm_connector_dynamic_init_name =========
[16:57:48] [PASSED] Unknown
[16:57:48] [PASSED] VGA
[16:57:48] [PASSED] DVI-I
[16:57:48] [PASSED] DVI-D
[16:57:48] [PASSED] DVI-A
[16:57:48] [PASSED] Composite
[16:57:48] [PASSED] SVIDEO
[16:57:48] [PASSED] LVDS
[16:57:48] [PASSED] Component
[16:57:48] [PASSED] DIN
[16:57:48] [PASSED] DP
[16:57:48] [PASSED] HDMI-A
[16:57:48] [PASSED] HDMI-B
[16:57:48] [PASSED] TV
[16:57:48] [PASSED] eDP
[16:57:48] [PASSED] Virtual
[16:57:48] [PASSED] DSI
[16:57:48] [PASSED] DPI
[16:57:48] [PASSED] Writeback
[16:57:48] [PASSED] SPI
[16:57:48] [PASSED] USB
[16:57:48] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[16:57:48] =========== [PASSED] drm_connector_dynamic_init ============
[16:57:48] ==== drm_connector_dynamic_register_early (4 subtests) =====
[16:57:48] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[16:57:48] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[16:57:48] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[16:57:48] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[16:57:48] ====== [PASSED] drm_connector_dynamic_register_early =======
[16:57:48] ======= drm_connector_dynamic_register (7 subtests) ========
[16:57:48] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[16:57:48] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[16:57:48] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[16:57:48] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[16:57:48] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[16:57:48] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[16:57:48] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[16:57:48] ========= [PASSED] drm_connector_dynamic_register ==========
[16:57:48] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[16:57:48] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[16:57:48] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[16:57:48] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[16:57:48] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[16:57:48] ========== drm_test_get_tv_mode_from_name_valid ===========
[16:57:48] [PASSED] NTSC
[16:57:48] [PASSED] NTSC-443
[16:57:48] [PASSED] NTSC-J
[16:57:48] [PASSED] PAL
[16:57:48] [PASSED] PAL-M
[16:57:48] [PASSED] PAL-N
[16:57:48] [PASSED] SECAM
[16:57:48] [PASSED] Mono
[16:57:48] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[16:57:48] [PASSED] drm_test_get_tv_mode_from_name_truncated
[16:57:48] ============ [PASSED] drm_get_tv_mode_from_name ============
[16:57:48] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[16:57:48] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[16:57:48] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[16:57:48] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[16:57:48] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[16:57:48] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[16:57:48] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[16:57:48] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[16:57:48] [PASSED] VIC 96
[16:57:48] [PASSED] VIC 97
[16:57:48] [PASSED] VIC 101
[16:57:48] [PASSED] VIC 102
[16:57:48] [PASSED] VIC 106
[16:57:48] [PASSED] VIC 107
[16:57:48] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[16:57:48] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[16:57:48] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[16:57:48] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[16:57:48] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[16:57:48] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[16:57:48] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[16:57:48] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[16:57:48] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[16:57:48] [PASSED] Automatic
[16:57:48] [PASSED] Full
[16:57:48] [PASSED] Limited 16:235
[16:57:48] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[16:57:48] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[16:57:48] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[16:57:48] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[16:57:48] === drm_test_drm_hdmi_connector_get_output_format_name ====
[16:57:48] [PASSED] RGB
[16:57:48] [PASSED] YUV 4:2:0
[16:57:48] [PASSED] YUV 4:2:2
[16:57:48] [PASSED] YUV 4:4:4
[16:57:48] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[16:57:48] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[16:57:48] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[16:57:48] ============= drm_damage_helper (21 subtests) ==============
[16:57:48] [PASSED] drm_test_damage_iter_no_damage
[16:57:48] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[16:57:48] [PASSED] drm_test_damage_iter_no_damage_src_moved
[16:57:48] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[16:57:48] [PASSED] drm_test_damage_iter_no_damage_not_visible
[16:57:48] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[16:57:48] [PASSED] drm_test_damage_iter_no_damage_no_fb
[16:57:48] [PASSED] drm_test_damage_iter_simple_damage
[16:57:48] [PASSED] drm_test_damage_iter_single_damage
[16:57:48] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[16:57:48] [PASSED] drm_test_damage_iter_single_damage_outside_src
[16:57:48] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[16:57:48] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[16:57:48] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[16:57:48] [PASSED] drm_test_damage_iter_single_damage_src_moved
[16:57:48] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[16:57:48] [PASSED] drm_test_damage_iter_damage
[16:57:48] [PASSED] drm_test_damage_iter_damage_one_intersect
[16:57:48] [PASSED] drm_test_damage_iter_damage_one_outside
[16:57:48] [PASSED] drm_test_damage_iter_damage_src_moved
[16:57:48] [PASSED] drm_test_damage_iter_damage_not_visible
[16:57:48] ================ [PASSED] drm_damage_helper ================
[16:57:48] ============== drm_dp_mst_helper (3 subtests) ==============
[16:57:48] ============== drm_test_dp_mst_calc_pbn_mode ==============
[16:57:48] [PASSED] Clock 154000 BPP 30 DSC disabled
[16:57:48] [PASSED] Clock 234000 BPP 30 DSC disabled
[16:57:48] [PASSED] Clock 297000 BPP 24 DSC disabled
[16:57:48] [PASSED] Clock 332880 BPP 24 DSC enabled
[16:57:48] [PASSED] Clock 324540 BPP 24 DSC enabled
[16:57:48] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[16:57:48] ============== drm_test_dp_mst_calc_pbn_div ===============
[16:57:48] [PASSED] Link rate 2000000 lane count 4
[16:57:48] [PASSED] Link rate 2000000 lane count 2
[16:57:48] [PASSED] Link rate 2000000 lane count 1
[16:57:48] [PASSED] Link rate 1350000 lane count 4
[16:57:48] [PASSED] Link rate 1350000 lane count 2
[16:57:48] [PASSED] Link rate 1350000 lane count 1
[16:57:48] [PASSED] Link rate 1000000 lane count 4
[16:57:48] [PASSED] Link rate 1000000 lane count 2
[16:57:48] [PASSED] Link rate 1000000 lane count 1
[16:57:48] [PASSED] Link rate 810000 lane count 4
[16:57:48] [PASSED] Link rate 810000 lane count 2
[16:57:48] [PASSED] Link rate 810000 lane count 1
[16:57:48] [PASSED] Link rate 540000 lane count 4
[16:57:48] [PASSED] Link rate 540000 lane count 2
[16:57:48] [PASSED] Link rate 540000 lane count 1
[16:57:48] [PASSED] Link rate 270000 lane count 4
[16:57:48] [PASSED] Link rate 270000 lane count 2
[16:57:48] [PASSED] Link rate 270000 lane count 1
[16:57:48] [PASSED] Link rate 162000 lane count 4
[16:57:48] [PASSED] Link rate 162000 lane count 2
[16:57:48] [PASSED] Link rate 162000 lane count 1
[16:57:48] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[16:57:48] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[16:57:48] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[16:57:48] [PASSED] DP_POWER_UP_PHY with port number
[16:57:48] [PASSED] DP_POWER_DOWN_PHY with port number
[16:57:48] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[16:57:48] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[16:57:48] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[16:57:48] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[16:57:48] [PASSED] DP_QUERY_PAYLOAD with port number
[16:57:48] [PASSED] DP_QUERY_PAYLOAD with VCPI
[16:57:48] [PASSED] DP_REMOTE_DPCD_READ with port number
[16:57:48] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[16:57:48] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[16:57:48] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[16:57:48] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[16:57:48] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[16:57:48] [PASSED] DP_REMOTE_I2C_READ with port number
[16:57:48] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[16:57:48] [PASSED] DP_REMOTE_I2C_READ with transactions array
[16:57:48] [PASSED] DP_REMOTE_I2C_WRITE with port number
[16:57:48] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[16:57:48] [PASSED] DP_REMOTE_I2C_WRITE with data array
[16:57:48] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[16:57:48] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[16:57:48] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[16:57:48] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[16:57:48] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[16:57:48] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[16:57:48] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[16:57:48] ================ [PASSED] drm_dp_mst_helper ================
[16:57:48] ================== drm_exec (7 subtests) ===================
[16:57:48] [PASSED] sanitycheck
[16:57:48] [PASSED] test_lock
[16:57:48] [PASSED] test_lock_unlock
[16:57:48] [PASSED] test_duplicates
[16:57:48] [PASSED] test_prepare
[16:57:48] [PASSED] test_prepare_array
[16:57:48] [PASSED] test_multiple_loops
[16:57:48] ==================== [PASSED] drm_exec =====================
[16:57:48] =========== drm_format_helper_test (17 subtests) ===========
[16:57:48] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[16:57:48] [PASSED] single_pixel_source_buffer
[16:57:48] [PASSED] single_pixel_clip_rectangle
[16:57:48] [PASSED] well_known_colors
[16:57:48] [PASSED] destination_pitch
[16:57:48] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[16:57:48] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[16:57:48] [PASSED] single_pixel_source_buffer
[16:57:48] [PASSED] single_pixel_clip_rectangle
[16:57:48] [PASSED] well_known_colors
[16:57:48] [PASSED] destination_pitch
[16:57:48] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[16:57:48] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[16:57:48] [PASSED] single_pixel_source_buffer
[16:57:48] [PASSED] single_pixel_clip_rectangle
[16:57:48] [PASSED] well_known_colors
[16:57:48] [PASSED] destination_pitch
[16:57:48] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[16:57:48] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[16:57:48] [PASSED] single_pixel_source_buffer
[16:57:48] [PASSED] single_pixel_clip_rectangle
[16:57:48] [PASSED] well_known_colors
[16:57:48] [PASSED] destination_pitch
[16:57:48] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[16:57:48] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[16:57:48] [PASSED] single_pixel_source_buffer
[16:57:48] [PASSED] single_pixel_clip_rectangle
[16:57:48] [PASSED] well_known_colors
[16:57:48] [PASSED] destination_pitch
[16:57:48] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[16:57:48] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[16:57:48] [PASSED] single_pixel_source_buffer
[16:57:48] [PASSED] single_pixel_clip_rectangle
[16:57:48] [PASSED] well_known_colors
[16:57:48] [PASSED] destination_pitch
[16:57:48] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[16:57:48] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[16:57:48] [PASSED] single_pixel_source_buffer
[16:57:48] [PASSED] single_pixel_clip_rectangle
[16:57:48] [PASSED] well_known_colors
[16:57:48] [PASSED] destination_pitch
[16:57:48] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[16:57:48] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[16:57:48] [PASSED] single_pixel_source_buffer
[16:57:48] [PASSED] single_pixel_clip_rectangle
[16:57:48] [PASSED] well_known_colors
[16:57:48] [PASSED] destination_pitch
[16:57:48] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[16:57:48] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[16:57:48] [PASSED] single_pixel_source_buffer
[16:57:48] [PASSED] single_pixel_clip_rectangle
[16:57:48] [PASSED] well_known_colors
[16:57:48] [PASSED] destination_pitch
[16:57:48] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[16:57:48] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[16:57:48] [PASSED] single_pixel_source_buffer
[16:57:48] [PASSED] single_pixel_clip_rectangle
[16:57:48] [PASSED] well_known_colors
[16:57:48] [PASSED] destination_pitch
[16:57:48] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[16:57:48] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[16:57:48] [PASSED] single_pixel_source_buffer
[16:57:48] [PASSED] single_pixel_clip_rectangle
[16:57:48] [PASSED] well_known_colors
[16:57:48] [PASSED] destination_pitch
[16:57:48] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[16:57:48] ============== drm_test_fb_xrgb8888_to_mono ===============
[16:57:48] [PASSED] single_pixel_source_buffer
[16:57:48] [PASSED] single_pixel_clip_rectangle
[16:57:48] [PASSED] well_known_colors
[16:57:48] [PASSED] destination_pitch
[16:57:48] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[16:57:48] ==================== drm_test_fb_swab =====================
[16:57:48] [PASSED] single_pixel_source_buffer
[16:57:48] [PASSED] single_pixel_clip_rectangle
[16:57:48] [PASSED] well_known_colors
[16:57:48] [PASSED] destination_pitch
[16:57:48] ================ [PASSED] drm_test_fb_swab =================
[16:57:48] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[16:57:48] [PASSED] single_pixel_source_buffer
[16:57:48] [PASSED] single_pixel_clip_rectangle
[16:57:48] [PASSED] well_known_colors
[16:57:48] [PASSED] destination_pitch
[16:57:48] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[16:57:48] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[16:57:48] [PASSED] single_pixel_source_buffer
[16:57:48] [PASSED] single_pixel_clip_rectangle
[16:57:48] [PASSED] well_known_colors
[16:57:48] [PASSED] destination_pitch
[16:57:48] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[16:57:48] ================= drm_test_fb_clip_offset =================
[16:57:48] [PASSED] pass through
[16:57:48] [PASSED] horizontal offset
[16:57:48] [PASSED] vertical offset
[16:57:48] [PASSED] horizontal and vertical offset
[16:57:48] [PASSED] horizontal offset (custom pitch)
[16:57:48] [PASSED] vertical offset (custom pitch)
[16:57:48] [PASSED] horizontal and vertical offset (custom pitch)
[16:57:48] ============= [PASSED] drm_test_fb_clip_offset =============
[16:57:48] =================== drm_test_fb_memcpy ====================
[16:57:48] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[16:57:48] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[16:57:48] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[16:57:48] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[16:57:48] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[16:57:48] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[16:57:48] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[16:57:48] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[16:57:48] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[16:57:48] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[16:57:48] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[16:57:48] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[16:57:48] =============== [PASSED] drm_test_fb_memcpy ================
[16:57:48] ============= [PASSED] drm_format_helper_test ==============
[16:57:48] ================= drm_format (18 subtests) =================
[16:57:48] [PASSED] drm_test_format_block_width_invalid
[16:57:48] [PASSED] drm_test_format_block_width_one_plane
[16:57:48] [PASSED] drm_test_format_block_width_two_plane
[16:57:48] [PASSED] drm_test_format_block_width_three_plane
[16:57:48] [PASSED] drm_test_format_block_width_tiled
[16:57:48] [PASSED] drm_test_format_block_height_invalid
[16:57:48] [PASSED] drm_test_format_block_height_one_plane
[16:57:48] [PASSED] drm_test_format_block_height_two_plane
[16:57:48] [PASSED] drm_test_format_block_height_three_plane
[16:57:48] [PASSED] drm_test_format_block_height_tiled
[16:57:48] [PASSED] drm_test_format_min_pitch_invalid
[16:57:48] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[16:57:48] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[16:57:48] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[16:57:48] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[16:57:48] [PASSED] drm_test_format_min_pitch_two_plane
[16:57:48] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[16:57:48] [PASSED] drm_test_format_min_pitch_tiled
[16:57:48] =================== [PASSED] drm_format ====================
[16:57:48] ============== drm_framebuffer (10 subtests) ===============
[16:57:48] ========== drm_test_framebuffer_check_src_coords ==========
[16:57:48] [PASSED] Success: source fits into fb
[16:57:48] [PASSED] Fail: overflowing fb with x-axis coordinate
[16:57:48] [PASSED] Fail: overflowing fb with y-axis coordinate
[16:57:48] [PASSED] Fail: overflowing fb with source width
[16:57:48] [PASSED] Fail: overflowing fb with source height
[16:57:48] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[16:57:48] [PASSED] drm_test_framebuffer_cleanup
[16:57:48] =============== drm_test_framebuffer_create ===============
[16:57:48] [PASSED] ABGR8888 normal sizes
[16:57:48] [PASSED] ABGR8888 max sizes
[16:57:48] [PASSED] ABGR8888 pitch greater than min required
[16:57:48] [PASSED] ABGR8888 pitch less than min required
[16:57:48] [PASSED] ABGR8888 Invalid width
[16:57:48] [PASSED] ABGR8888 Invalid buffer handle
[16:57:48] [PASSED] No pixel format
[16:57:48] [PASSED] ABGR8888 Width 0
[16:57:48] [PASSED] ABGR8888 Height 0
[16:57:48] [PASSED] ABGR8888 Out of bound height * pitch combination
[16:57:48] [PASSED] ABGR8888 Large buffer offset
[16:57:48] [PASSED] ABGR8888 Buffer offset for inexistent plane
[16:57:48] [PASSED] ABGR8888 Invalid flag
[16:57:48] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[16:57:48] [PASSED] ABGR8888 Valid buffer modifier
[16:57:48] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[16:57:48] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[16:57:48] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[16:57:48] [PASSED] NV12 Normal sizes
[16:57:48] [PASSED] NV12 Max sizes
[16:57:48] [PASSED] NV12 Invalid pitch
[16:57:48] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[16:57:48] [PASSED] NV12 different modifier per-plane
[16:57:48] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[16:57:48] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[16:57:48] [PASSED] NV12 Modifier for inexistent plane
[16:57:48] [PASSED] NV12 Handle for inexistent plane
[16:57:48] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[16:57:48] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[16:57:48] [PASSED] YVU420 Normal sizes
[16:57:48] [PASSED] YVU420 Max sizes
[16:57:48] [PASSED] YVU420 Invalid pitch
[16:57:48] [PASSED] YVU420 Different pitches
[16:57:48] [PASSED] YVU420 Different buffer offsets/pitches
[16:57:48] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[16:57:48] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[16:57:48] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[16:57:48] [PASSED] YVU420 Valid modifier
[16:57:48] [PASSED] YVU420 Different modifiers per plane
[16:57:48] [PASSED] YVU420 Modifier for inexistent plane
[16:57:48] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[16:57:48] [PASSED] X0L2 Normal sizes
[16:57:48] [PASSED] X0L2 Max sizes
[16:57:48] [PASSED] X0L2 Invalid pitch
[16:57:48] [PASSED] X0L2 Pitch greater than minimum required
[16:57:48] [PASSED] X0L2 Handle for inexistent plane
[16:57:48] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[16:57:48] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[16:57:48] [PASSED] X0L2 Valid modifier
[16:57:48] [PASSED] X0L2 Modifier for inexistent plane
[16:57:48] =========== [PASSED] drm_test_framebuffer_create ===========
[16:57:48] [PASSED] drm_test_framebuffer_free
[16:57:48] [PASSED] drm_test_framebuffer_init
[16:57:48] [PASSED] drm_test_framebuffer_init_bad_format
[16:57:48] [PASSED] drm_test_framebuffer_init_dev_mismatch
[16:57:48] [PASSED] drm_test_framebuffer_lookup
[16:57:48] [PASSED] drm_test_framebuffer_lookup_inexistent
[16:57:48] [PASSED] drm_test_framebuffer_modifiers_not_supported
[16:57:48] ================= [PASSED] drm_framebuffer =================
[16:57:48] ================ drm_gem_shmem (8 subtests) ================
[16:57:48] [PASSED] drm_gem_shmem_test_obj_create
[16:57:48] [PASSED] drm_gem_shmem_test_obj_create_private
[16:57:48] [PASSED] drm_gem_shmem_test_pin_pages
[16:57:48] [PASSED] drm_gem_shmem_test_vmap
[16:57:48] [PASSED] drm_gem_shmem_test_get_sg_table
[16:57:48] [PASSED] drm_gem_shmem_test_get_pages_sgt
[16:57:48] [PASSED] drm_gem_shmem_test_madvise
[16:57:48] [PASSED] drm_gem_shmem_test_purge
[16:57:48] ================== [PASSED] drm_gem_shmem ==================
[16:57:48] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[16:57:48] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[16:57:48] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[16:57:48] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[16:57:48] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[16:57:48] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[16:57:48] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[16:57:48] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[16:57:48] [PASSED] Automatic
[16:57:48] [PASSED] Full
[16:57:48] [PASSED] Limited 16:235
[16:57:48] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[16:57:48] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[16:57:48] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[16:57:48] [PASSED] drm_test_check_disable_connector
[16:57:48] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[16:57:48] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[16:57:48] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[16:57:48] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[16:57:48] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[16:57:48] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[16:57:48] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[16:57:48] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[16:57:48] [PASSED] drm_test_check_output_bpc_dvi
[16:57:48] [PASSED] drm_test_check_output_bpc_format_vic_1
[16:57:48] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[16:57:48] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[16:57:48] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[16:57:48] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[16:57:48] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[16:57:48] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[16:57:48] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[16:57:48] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[16:57:48] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[16:57:48] [PASSED] drm_test_check_broadcast_rgb_value
[16:57:48] [PASSED] drm_test_check_bpc_8_value
[16:57:48] [PASSED] drm_test_check_bpc_10_value
[16:57:48] [PASSED] drm_test_check_bpc_12_value
[16:57:48] [PASSED] drm_test_check_format_value
[16:57:48] [PASSED] drm_test_check_tmds_char_value
[16:57:48] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[16:57:48] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[16:57:48] [PASSED] drm_test_check_mode_valid
[16:57:48] [PASSED] drm_test_check_mode_valid_reject
[16:57:48] [PASSED] drm_test_check_mode_valid_reject_rate
[16:57:48] [PASSED] drm_test_check_mode_valid_reject_max_clock
[16:57:48] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[16:57:48] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[16:57:48] [PASSED] drm_test_check_infoframes
[16:57:48] [PASSED] drm_test_check_reject_avi_infoframe
[16:57:48] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[16:57:48] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[16:57:48] [PASSED] drm_test_check_reject_audio_infoframe
[16:57:48] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[16:57:48] ================= drm_managed (2 subtests) =================
[16:57:48] [PASSED] drm_test_managed_release_action
[16:57:48] [PASSED] drm_test_managed_run_action
[16:57:48] =================== [PASSED] drm_managed ===================
[16:57:48] =================== drm_mm (6 subtests) ====================
[16:57:48] [PASSED] drm_test_mm_init
[16:57:48] [PASSED] drm_test_mm_debug
[16:57:48] [PASSED] drm_test_mm_align32
[16:57:48] [PASSED] drm_test_mm_align64
[16:57:48] [PASSED] drm_test_mm_lowest
[16:57:48] [PASSED] drm_test_mm_highest
[16:57:48] ===================== [PASSED] drm_mm ======================
[16:57:48] ============= drm_modes_analog_tv (5 subtests) =============
[16:57:48] [PASSED] drm_test_modes_analog_tv_mono_576i
[16:57:48] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[16:57:48] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[16:57:48] [PASSED] drm_test_modes_analog_tv_pal_576i
[16:57:48] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[16:57:48] =============== [PASSED] drm_modes_analog_tv ===============
[16:57:48] ============== drm_plane_helper (2 subtests) ===============
[16:57:48] =============== drm_test_check_plane_state ================
[16:57:48] [PASSED] clipping_simple
[16:57:48] [PASSED] clipping_rotate_reflect
[16:57:48] [PASSED] positioning_simple
[16:57:48] [PASSED] upscaling
[16:57:48] [PASSED] downscaling
[16:57:48] [PASSED] rounding1
[16:57:48] [PASSED] rounding2
[16:57:48] [PASSED] rounding3
[16:57:48] [PASSED] rounding4
[16:57:48] =========== [PASSED] drm_test_check_plane_state ============
[16:57:48] =========== drm_test_check_invalid_plane_state ============
[16:57:48] [PASSED] positioning_invalid
[16:57:48] [PASSED] upscaling_invalid
[16:57:48] [PASSED] downscaling_invalid
[16:57:48] ======= [PASSED] drm_test_check_invalid_plane_state ========
[16:57:48] ================ [PASSED] drm_plane_helper =================
[16:57:48] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[16:57:48] ====== drm_test_connector_helper_tv_get_modes_check =======
[16:57:48] [PASSED] None
[16:57:48] [PASSED] PAL
[16:57:48] [PASSED] NTSC
[16:57:48] [PASSED] Both, NTSC Default
[16:57:48] [PASSED] Both, PAL Default
[16:57:48] [PASSED] Both, NTSC Default, with PAL on command-line
[16:57:48] [PASSED] Both, PAL Default, with NTSC on command-line
[16:57:48] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[16:57:48] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[16:57:48] ================== drm_rect (9 subtests) ===================
[16:57:48] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[16:57:48] [PASSED] drm_test_rect_clip_scaled_not_clipped
[16:57:48] [PASSED] drm_test_rect_clip_scaled_clipped
[16:57:48] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[16:57:48] ================= drm_test_rect_intersect =================
[16:57:48] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[16:57:48] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[16:57:48] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[16:57:48] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[16:57:48] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[16:57:48] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[16:57:48] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[16:57:48] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[16:57:48] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[16:57:48] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[16:57:48] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[16:57:48] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[16:57:48] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[16:57:48] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[16:57:48] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
stty: 'standard input': Inappropriate ioctl for device
[16:57:48] ============= [PASSED] drm_test_rect_intersect =============
[16:57:48] ================ drm_test_rect_calc_hscale ================
[16:57:48] [PASSED] normal use
[16:57:48] [PASSED] out of max range
[16:57:48] [PASSED] out of min range
[16:57:48] [PASSED] zero dst
[16:57:48] [PASSED] negative src
[16:57:48] [PASSED] negative dst
[16:57:48] ============ [PASSED] drm_test_rect_calc_hscale ============
[16:57:48] ================ drm_test_rect_calc_vscale ================
[16:57:48] [PASSED] normal use
[16:57:48] [PASSED] out of max range
[16:57:48] [PASSED] out of min range
[16:57:48] [PASSED] zero dst
[16:57:48] [PASSED] negative src
[16:57:48] [PASSED] negative dst
[16:57:48] ============ [PASSED] drm_test_rect_calc_vscale ============
[16:57:48] ================== drm_test_rect_rotate ===================
[16:57:48] [PASSED] reflect-x
[16:57:48] [PASSED] reflect-y
[16:57:48] [PASSED] rotate-0
[16:57:48] [PASSED] rotate-90
[16:57:48] [PASSED] rotate-180
[16:57:48] [PASSED] rotate-270
[16:57:48] ============== [PASSED] drm_test_rect_rotate ===============
[16:57:48] ================ drm_test_rect_rotate_inv =================
[16:57:48] [PASSED] reflect-x
[16:57:48] [PASSED] reflect-y
[16:57:48] [PASSED] rotate-0
[16:57:48] [PASSED] rotate-90
[16:57:48] [PASSED] rotate-180
[16:57:48] [PASSED] rotate-270
[16:57:48] ============ [PASSED] drm_test_rect_rotate_inv =============
[16:57:48] ==================== [PASSED] drm_rect =====================
[16:57:48] ============ drm_sysfb_modeset_test (1 subtest) ============
[16:57:48] ============ drm_test_sysfb_build_fourcc_list =============
[16:57:48] [PASSED] no native formats
[16:57:48] [PASSED] XRGB8888 as native format
[16:57:48] [PASSED] remove duplicates
[16:57:48] [PASSED] convert alpha formats
[16:57:48] [PASSED] random formats
[16:57:48] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[16:57:48] ============= [PASSED] drm_sysfb_modeset_test ==============
[16:57:48] ================== drm_fixp (2 subtests) ===================
[16:57:48] [PASSED] drm_test_int2fixp
[16:57:48] [PASSED] drm_test_sm2fixp
[16:57:48] ==================== [PASSED] drm_fixp =====================
[16:57:48] ============================================================
[16:57:48] Testing complete. Ran 630 tests: passed: 630
[16:57:48] Elapsed time: 27.627s total, 1.667s configuring, 25.542s building, 0.386s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[16:57:48] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:57:50] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:57:59] Starting KUnit Kernel (1/1)...
[16:57:59] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:58:00] ================= ttm_device (5 subtests) ==================
[16:58:00] [PASSED] ttm_device_init_basic
[16:58:00] [PASSED] ttm_device_init_multiple
[16:58:00] [PASSED] ttm_device_fini_basic
[16:58:00] [PASSED] ttm_device_init_no_vma_man
[16:58:00] ================== ttm_device_init_pools ==================
[16:58:00] [PASSED] No DMA allocations, no DMA32 required
[16:58:00] [PASSED] DMA allocations, DMA32 required
[16:58:00] [PASSED] No DMA allocations, DMA32 required
[16:58:00] [PASSED] DMA allocations, no DMA32 required
[16:58:00] ============== [PASSED] ttm_device_init_pools ==============
[16:58:00] =================== [PASSED] ttm_device ====================
[16:58:00] ================== ttm_pool (8 subtests) ===================
[16:58:00] ================== ttm_pool_alloc_basic ===================
[16:58:00] [PASSED] One page
[16:58:00] [PASSED] More than one page
[16:58:00] [PASSED] Above the allocation limit
[16:58:00] [PASSED] One page, with coherent DMA mappings enabled
[16:58:00] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:58:00] ============== [PASSED] ttm_pool_alloc_basic ===============
[16:58:00] ============== ttm_pool_alloc_basic_dma_addr ==============
[16:58:00] [PASSED] One page
[16:58:00] [PASSED] More than one page
[16:58:00] [PASSED] Above the allocation limit
[16:58:00] [PASSED] One page, with coherent DMA mappings enabled
[16:58:00] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:58:00] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[16:58:00] [PASSED] ttm_pool_alloc_order_caching_match
[16:58:00] [PASSED] ttm_pool_alloc_caching_mismatch
[16:58:00] [PASSED] ttm_pool_alloc_order_mismatch
[16:58:00] [PASSED] ttm_pool_free_dma_alloc
[16:58:00] [PASSED] ttm_pool_free_no_dma_alloc
[16:58:00] [PASSED] ttm_pool_fini_basic
[16:58:00] ==================== [PASSED] ttm_pool =====================
[16:58:00] ================ ttm_resource (8 subtests) =================
[16:58:00] ================= ttm_resource_init_basic =================
[16:58:00] [PASSED] Init resource in TTM_PL_SYSTEM
[16:58:00] [PASSED] Init resource in TTM_PL_VRAM
[16:58:00] [PASSED] Init resource in a private placement
[16:58:00] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[16:58:00] ============= [PASSED] ttm_resource_init_basic =============
[16:58:00] [PASSED] ttm_resource_init_pinned
[16:58:00] [PASSED] ttm_resource_fini_basic
[16:58:00] [PASSED] ttm_resource_manager_init_basic
[16:58:00] [PASSED] ttm_resource_manager_usage_basic
[16:58:00] [PASSED] ttm_resource_manager_set_used_basic
[16:58:00] [PASSED] ttm_sys_man_alloc_basic
[16:58:00] [PASSED] ttm_sys_man_free_basic
[16:58:00] ================== [PASSED] ttm_resource ===================
[16:58:00] =================== ttm_tt (15 subtests) ===================
[16:58:00] ==================== ttm_tt_init_basic ====================
[16:58:00] [PASSED] Page-aligned size
[16:58:00] [PASSED] Extra pages requested
[16:58:00] ================ [PASSED] ttm_tt_init_basic ================
[16:58:00] [PASSED] ttm_tt_init_misaligned
[16:58:00] [PASSED] ttm_tt_fini_basic
[16:58:00] [PASSED] ttm_tt_fini_sg
[16:58:00] [PASSED] ttm_tt_fini_shmem
[16:58:00] [PASSED] ttm_tt_create_basic
[16:58:00] [PASSED] ttm_tt_create_invalid_bo_type
[16:58:00] [PASSED] ttm_tt_create_ttm_exists
[16:58:00] [PASSED] ttm_tt_create_failed
[16:58:00] [PASSED] ttm_tt_destroy_basic
[16:58:00] [PASSED] ttm_tt_populate_null_ttm
[16:58:00] [PASSED] ttm_tt_populate_populated_ttm
[16:58:00] [PASSED] ttm_tt_unpopulate_basic
[16:58:00] [PASSED] ttm_tt_unpopulate_empty_ttm
[16:58:00] [PASSED] ttm_tt_swapin_basic
[16:58:00] ===================== [PASSED] ttm_tt ======================
[16:58:00] =================== ttm_bo (14 subtests) ===================
[16:58:00] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[16:58:00] [PASSED] Cannot be interrupted and sleeps
[16:58:00] [PASSED] Cannot be interrupted, locks straight away
[16:58:00] [PASSED] Can be interrupted, sleeps
[16:58:00] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[16:58:00] [PASSED] ttm_bo_reserve_locked_no_sleep
[16:58:00] [PASSED] ttm_bo_reserve_no_wait_ticket
[16:58:00] [PASSED] ttm_bo_reserve_double_resv
[16:58:00] [PASSED] ttm_bo_reserve_interrupted
[16:58:00] [PASSED] ttm_bo_reserve_deadlock
[16:58:00] [PASSED] ttm_bo_unreserve_basic
[16:58:00] [PASSED] ttm_bo_unreserve_pinned
[16:58:00] [PASSED] ttm_bo_unreserve_bulk
[16:58:00] [PASSED] ttm_bo_fini_basic
[16:58:00] [PASSED] ttm_bo_fini_shared_resv
[16:58:00] [PASSED] ttm_bo_pin_basic
[16:58:00] [PASSED] ttm_bo_pin_unpin_resource
[16:58:00] [PASSED] ttm_bo_multiple_pin_one_unpin
[16:58:00] ===================== [PASSED] ttm_bo ======================
[16:58:00] ============== ttm_bo_validate (21 subtests) ===============
[16:58:00] ============== ttm_bo_init_reserved_sys_man ===============
[16:58:00] [PASSED] Buffer object for userspace
[16:58:00] [PASSED] Kernel buffer object
[16:58:00] [PASSED] Shared buffer object
[16:58:00] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[16:58:00] ============== ttm_bo_init_reserved_mock_man ==============
[16:58:00] [PASSED] Buffer object for userspace
[16:58:00] [PASSED] Kernel buffer object
[16:58:00] [PASSED] Shared buffer object
[16:58:00] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[16:58:00] [PASSED] ttm_bo_init_reserved_resv
[16:58:00] ================== ttm_bo_validate_basic ==================
[16:58:00] [PASSED] Buffer object for userspace
[16:58:00] [PASSED] Kernel buffer object
[16:58:00] [PASSED] Shared buffer object
[16:58:00] ============== [PASSED] ttm_bo_validate_basic ==============
[16:58:00] [PASSED] ttm_bo_validate_invalid_placement
[16:58:00] ============= ttm_bo_validate_same_placement ==============
[16:58:00] [PASSED] System manager
[16:58:00] [PASSED] VRAM manager
[16:58:00] ========= [PASSED] ttm_bo_validate_same_placement ==========
[16:58:00] [PASSED] ttm_bo_validate_failed_alloc
[16:58:00] [PASSED] ttm_bo_validate_pinned
[16:58:00] [PASSED] ttm_bo_validate_busy_placement
[16:58:00] ================ ttm_bo_validate_multihop =================
[16:58:00] [PASSED] Buffer object for userspace
[16:58:00] [PASSED] Kernel buffer object
[16:58:00] [PASSED] Shared buffer object
[16:58:00] ============ [PASSED] ttm_bo_validate_multihop =============
[16:58:00] ========== ttm_bo_validate_no_placement_signaled ==========
[16:58:00] [PASSED] Buffer object in system domain, no page vector
[16:58:00] [PASSED] Buffer object in system domain with an existing page vector
[16:58:00] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[16:58:00] ======== ttm_bo_validate_no_placement_not_signaled ========
[16:58:00] [PASSED] Buffer object for userspace
[16:58:00] [PASSED] Kernel buffer object
[16:58:00] [PASSED] Shared buffer object
[16:58:00] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[16:58:00] [PASSED] ttm_bo_validate_move_fence_signaled
[16:58:00] ========= ttm_bo_validate_move_fence_not_signaled =========
[16:58:00] [PASSED] Waits for GPU
[16:58:00] [PASSED] Tries to lock straight away
[16:58:00] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[16:58:00] [PASSED] ttm_bo_validate_happy_evict
[16:58:00] [PASSED] ttm_bo_validate_all_pinned_evict
[16:58:00] [PASSED] ttm_bo_validate_allowed_only_evict
[16:58:00] [PASSED] ttm_bo_validate_deleted_evict
[16:58:00] [PASSED] ttm_bo_validate_busy_domain_evict
[16:58:00] [PASSED] ttm_bo_validate_evict_gutting
[16:58:00] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[16:58:00] ================= [PASSED] ttm_bo_validate =================
[16:58:00] ============================================================
[16:58:00] Testing complete. Ran 101 tests: passed: 101
[16:58:00] Elapsed time: 11.469s total, 1.682s configuring, 9.570s building, 0.185s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Xe.CI.BAT: success for drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd (rev3)
2026-01-28 4:49 [PATCH] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd Suraj Kandpal
` (7 preceding siblings ...)
2026-02-02 16:58 ` ✓ CI.KUnit: success for drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd (rev3) Patchwork
@ 2026-02-02 17:32 ` Patchwork
8 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-02-02 17:32 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1430 bytes --]
== Series Details ==
Series: drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd (rev3)
URL : https://patchwork.freedesktop.org/series/160734/
State : success
== Summary ==
CI Bug Log - changes from xe-4481-cd1fd615b2ba56ea3fb033262d4fbd0503055d3c_BAT -> xe-pw-160734v3_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (12 -> 12)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-160734v3_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_waitfence@engine:
- bat-dg2-oem2: [PASS][1] -> [FAIL][2] ([Intel XE#6519])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4481-cd1fd615b2ba56ea3fb033262d4fbd0503055d3c/bat-dg2-oem2/igt@xe_waitfence@engine.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160734v3/bat-dg2-oem2/igt@xe_waitfence@engine.html
[Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
Build changes
-------------
* Linux: xe-4481-cd1fd615b2ba56ea3fb033262d4fbd0503055d3c -> xe-pw-160734v3
IGT_8729: 8729
xe-4481-cd1fd615b2ba56ea3fb033262d4fbd0503055d3c: cd1fd615b2ba56ea3fb033262d4fbd0503055d3c
xe-pw-160734v3: 160734v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160734v3/index.html
[-- Attachment #2: Type: text/html, Size: 1995 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
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-- links below jump to the message on this page --
2026-01-28 4:49 [PATCH] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd Suraj Kandpal
2026-01-28 4:56 ` ✓ CI.KUnit: success for " Patchwork
2026-01-28 5:31 ` ✓ Xe.CI.BAT: " Patchwork
2026-01-28 11:08 ` [PATCH] " Jani Nikula
2026-01-29 4:13 ` Kandpal, Suraj
2026-01-29 4:18 ` [PATCH v2] " Suraj Kandpal
2026-02-02 8:00 ` Nautiyal, Ankit K
2026-01-29 4:25 ` ✓ CI.KUnit: success for drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd (rev2) Patchwork
2026-01-29 4:59 ` ✓ Xe.CI.BAT: " Patchwork
2026-02-02 8:18 ` [PATCH v3] drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd Suraj Kandpal
2026-02-02 8:47 ` Nautiyal, Ankit K
2026-02-02 16:58 ` ✓ CI.KUnit: success for drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcd (rev3) Patchwork
2026-02-02 17:32 ` ✓ Xe.CI.BAT: " Patchwork
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